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IRDROPanalysis
uWhatisIRdrop?
nVoltagedropsinpower(andbouncesinground)networkduetoelectricalparameters(resistance,
capacitance,inductance)ofpower(ground)network
uWhatistheimpact?
nDecreasespowersupplyvoltageacrossthecells
nLeadstoincreasedcelldelayanddegradedperformance
nSevereIRdropcanleadtofunctionalityfailuresandreducedyield
uWhatistheprevention?
nRobustpower&groundrouting

nSufficientamountofdecouplingcaps
uStaticIRdrop
nAveragevoltage,Vavgdropacrossthepower/groundnetwork,basedonaveragepowerorcurrenti.e.Iavg*
Ronchip
uDynamicIRdrop
nTimevaryingV(t)droponpower/groundnetwork
nDynamicIRdropadditionallymodelsthefollowing
Packageinductance
DecouplingCapacitance
Dynamiccurrentneed(di/dt)
Oneofthemostwidelyusedtechniquestoreducepeakvoltagedropofpowersuppliesistoadddecoupling
capacitorcellsintheaffectedareas.Decouplingcapacitorscanprovidelocalchargestoragepointscloseto
highinstantaneouscurrentsinks,therebyreducinginstantaneouscurrentneedsfromthesupplypads.

Moderndesignsareverysensitivetonoise,duetothepresenceofalargernumberofpotentialnoise
generatorsthatconsumethenoisemarginsbuiltintoadesign.Thepowergrid,whichprovidesthesupplyand
groundsignalsthroughoutthechips,isoneofthemostimportantsourcesofnoise.
Onchipdecouplingcapacitors,ordecaps,areattachedtothepowerandgroundnetworktodecreasenoise
effects.DecouplingcapacitorsarealsoaneffectivewaytoreduceorminimizepeakIRdrop.
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Figure1representstwovoltagewaveformsawaveformbeforedecouplingcapacitorinsertionandawaveform
afterdecouplingcapacitorinsertion.Theidealsupplyvoltageissetto1.2V.Thepeakdropinthevoltage
waveformbeforedecouplingcapacitorinsertionexceedsthetolerancevoltagelevel.Thisisshownintheblue
waveform.Thepurplewaveformrepresentsthevoltagewaveformafterdecouplingcapacitorinsertion.The
peakvoltagedropisnowreducedandwellwithinthetolerancelevel.

Figure2representsanequivalentcircuitrepresentationofthepowerandgroundnetworkwithadecoupling
capacitorcellattached.Thedecouplingcapacitorcellisessentiallyalowpassfilterwithanintrinsicresistance
andcapacitance.ThisisrepresentedasRdecapandCdecapinFigure2.Rmeshrepresentstheresistanceof
thepowerandgroundnetwork,VDDisthevoltagesourceandIloadrepresentstheloadcurrent.

KnowledgeofLeakageNumbers

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Unlikefillercells,decouplingcapacitorshavehighleakagecurrentandshouldnotbeinsertedintothedesign
liberallyasisdonewithfillercells.Knowingthedecouplingcapacitorleakagenumbersfromthelibraryisamust
beforeinsertingthesecells.

LocationoftheDecouplingCapacitorCell

ThelocationofthedecouplingcapacitorcellisveryimportantinreducingthepeakIRdrop.Thedecoupling
capacitorcellshouldbeinsertedinanareathatisclosetothepeakIRdrop.
Therearealsosomepossiblesituationswheredecouplingcapacitorinsertionmightnotbeeffective.These
includethefollowing:

Staticcauses:Thepowerandgroundnetworkisnotproperlyrouted,causingsomeinstancestobeisolatedor
farawayfromtheidealsupply.Inthiscase,ahighdynamicvoltagedropiscreatedduetoalargeresistance
value.Thisscenariomightrequireunrealisticallylargedecouplingcapacitorvaluestoreducethevoltagedrop.

Inductivecauses:Inductive(Ldi/dt)noiseisthedominantportionofdynamicvoltagedrop.Theamountof
affordableonchipdecouplingcapacitorinsertionmightbemuchlessthanwhatisneededtoreducethenoise
effectively.
IdentifyingtherootcausesofIRdropisamust,andpropercaremustbetakentoeliminatetheIRdrop
contributionsfromsourcesdescribedabove.

FillercellsareinsertedduringthechipfinishingstageinICCompiler.Fillercellsmustbeinsertedinthedesign
forthedecouplingcapacitorinsertionflowdescribedhere,becausetheflowswapsfillercellsfordecoupling
capacitorcellswhereneeded.Also,theflowrequirescharacterizedlibrariesforthedecouplingcapacitorcells.

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TheICCompilerdecouplingcapacitoranalysisflowfocusesonachievingtheuserspecifiedtargetdynamicIR
voltagedrop,whileminimizingthedecouplingcapacitorinsertioncost.Thiscostisafunctionofthetotalarea
andleakageoftheinserteddecouplingcapacitors.Figure4illustratestheinsertionflow.ICCompilerfirstlooks
atthepreplacedfillercells(showninwhite),andreplacesthemthenvirtuallywithdecouplingcapacitorcells
(showninblue).Theavailablefillerareaisusedascandidatelocationsfordecouplingcapacitorcellswapping.
Ateachanalysisstep,ICCompilerremovesunneededdecouplingcapacitorcellstominimizethecostfunction
oftheinserteddecouplingcapacitors,whilemeetingtheuserprovidedvoltagedropreductiontarget.IC
Compilermightperformseveraldecouplingcapacitorremovaliterationsduringthevoltagedropanalysisto
determineanoptimalsolution.Whentheanalysisiscomplete,ICCompilerprovidessuggestionsfordecoupling
capacitorinsertionandwritesoutafilecontainingthelistoffillerinstancesthatshouldbereplacedwith
decouplingcapacitorcells.

TherequiredinputsneededtoperformdecouplingcapacitoranalysisinICCompilerarelistedbelow.

DesiredortargetIRdropreduction
ThisisthetargetIRdropreductiontheuserwishestoachieve.Thedefaultreductionissetto10%.Usethe
set_rail_optionsvd_thresholdICCompilercommandtospecifythetargetIRdropreduction.
Fillercellanddecouplingcapacitorcellmasters
Thesearethelibrarycellmasternamesofthefilleranddecouplingcapacitorcellsthatcanbeswapped.The
cellfootprintforthedecouplingcapacitormastersmustmatchthecorrespondingfillercells.Forexample,a
FILLX4fillermastermusthaveDCAPX4decouplingcapacitormaster.Usetheset_rail_optionsfiller_lib_cells
commandtospecifyfillerlibcells,andtheset_rail_optionsdecap_lib_cellscommandtospecifythedecoupling
capacitorlibcells.
PrimeRailandPTPXbinaries
Theanalyze_railcommandusesthePrimeRailandPrimeTimePXtoolstoperformdecouplingcapacitor
analysis.MakesurethatICCompilercanlocatethesebinaries.Bydefault,ICCompilerusesthebinaries
definedinthedefaultUNIXpath.Theset_rail_optionspr_exec_dircommandandtheset_rail_options
pt_exec_dircommandcanalsobeusedtospecifythePrimeRailandPrimeTimePXbinarylocations
respectively.
Theanalyze_raildecap{net_name}ICCompilercommandperformsdecouplingcapacitoranalysis.Multiple
netnamesarenotcurrentlysupportedtheanalysisnethastobeasinglenet.Also,theanalysismodemustbe
settodynamictoperformdecouplingcapacitoranalysis.Thisissetbyusingtheset_rail_options
analysis_modedynamiccommand.YoucanseethesampleICCompilerdecouplingcapacitoranalysisscriptin
theAppendix.
Duringthedecouplingcapacitoranalysis,ICCompilerwritesahiddenASCIIECOfile(.file)thatcontainsthelist
ofthefillerinstancesthatneedtobeswappedwiththecorrespondingdecouplingcapacitorcellmasters.IC
CompilerwritesthisECOfileonceperanalysisiteration.Bydefault,ICCompilerwritestheECOfileandlogfile
(analyze_rail.log*)topr_<current_design>ortothedirectoryspecifiedbyusingtheset_rail_optionsoutput_dir
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command.AsamplelogfileillustratingthisiterationprocessisshowninFigure5.ThislogfileincludesIRdrop,
capacitancenumbers,leakage,andotheranalysisresultsfromtheinitialdecouplingcapacitorinsertion,and
fromeachiterationofdecouplingcapacitorremovalastheanalysisconvergestowardthetargetvoltagedrop.
Figure5Decouplingcapacitoranalysisresultsfromlogfile
finishVDD
DECAP:[ITERATION0][VOLTAGEDROP1.17519mV(91.5%)][TOTALCAP1942.81nF][FILLERCAP
1942.75nF][DECAPLEAKAGE2537.21nA]
DECAP:udefile.decap_ude_0iscreated.
DECAP:[ITERATION1][VOLTAGEDROP6.72546mV(51.5%)][TOTALCAP71.3119nF][FILLERCAP
71.2954nF][DECAPLEAKAGE101.624nA]
DECAP:udefile.decap_ude_1iscreated.
DECAP:[ITERATION2][VOLTAGEDROP6.74446mV(51.3%)][TOTALCAP30.7109nF][FILLERCAP
30.6944nF][DECAPLEAKAGE34.2418nA]

TheexampleinFigure6liststhecontentsoftheECOfile.The.decap_ude_2fileisthehiddenECO(.file)that
wascreatedbyICCompiler.
Figure6ECOfilecontents
unix_shell>catpr_decap/.decap_ude_2
replace_cell_reference[get_cellsall\xofiller_FILL8LVT_707]lib_cellDCAP8LVT#FILL8LVT
replace_cell_reference[get_cellsall\xofiller_FILL16LVT_427]lib_cellDCAP16LVT#FILL16LVT
replace_cell_reference[get_cellsall\xofiller_FILL32LVT_575]lib_cellDCAP32LVT#FILL32LVT
replace_cell_reference[get_cellsall\xofiller_FILL64LVT_1684]lib_cellDCAP64LVT#FILL64LVT
Thefilecontainsthereplace_cell_referenceICCompilercommandwhichreplacesvariousinstancesfroma
fillermastertoadecouplingcapacitormaster.
AftergeneratingtheECOfile,decouplingcapacitorinsertioncanbeperformedbysourcingtheECOfileinIC
Compiler.SelecttheECOfilecorrespondingtotheiterationthatbestfitstheIRdroptargetandleakage
numbers.
icc_shell>sourceechopr_decap/.decap_ude_2

icc_shell>sourceechopr_decap/.decap_ude_2
replace_cell_reference[get_cellsall\xofiller_FILL8LVT_707]lib_cellDCAP8LVT#FILL8LVT
1
replace_cell_reference[get_cellsall\xofiller_FILL16LVT_427]lib_cellDCAP16LVT#FILL16LVT
1
replace_cell_reference[get_cellsall\xofiller_FILL32LVT_575]lib_cellDCAP32LVT#FILL32LVT
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1
replace_cell_reference[get_cellsall\xofiller_FILL64LVT_1684]lib_cellDCAP64LVT#FILL64LVT
1
ThisscriptreplacesthefillercellsintheECOfilewithdecouplingcapacitorcells.

SampleICCompilerdecouplingcapacitorECOscript
sourcescripts/icc_setup.tcl
##OPENDESIGN
##############
open_mw_libChipTop_LIB
open_mw_celdecap
link
##SETRAILANALYSISOPTIONS
############################
set_rail_optionsuse_pins_as_padstrue\
output_dirpr_decap\
switching_activity{vcdresults/sim_iccg.vcdtb/ChipTop}\
filler_lib_cells"FILL4LVTFILL8LVTFILL16LVTFILL32LVTFILL64LVT"\
decap_lib_cells"DCAP4LVTDCAP8LVTDCAP16LVTDCAP32LVTDCAP64LVT"\
analysis_modedynamic
report_rail_options
##DECAPANALYSIS
##################
##ANALYZEVDDRAIL
analyze_raildecap{VDD}
##INSERTDECAPCELLS
######################
sourceechopr_decap/.decap

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