C Dot
C Dot
T-12F
MDF
1
32 channels 0
TG 0
TG 1
TRUNK
TG 2
S/N
TG 3
1
1
0 0
1
0
Operator /
PSU SP TIC Maintenance
Console
1 Introduction 1
2 Power Supply Unit Card 9
IRISET
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http://www.iriset.ac.in
CHAPTER 1
INTRODUCTION
1.0. INTRODUCTION
And there are four such terminal groups available in one 128 port RAX. So for a
terminal group there are 32 terminations or ports possible. Thus from four Terminal
groups or 16 terminal interfaces we get 128 ports which are connected to the switching
network.
The port configuration of 128 port C-DOT RAX is as shown in the table 1.1
MDF 1
32 channels 0
TG 0
TG 1
S/N
TRUNK
TG 2
TG 3
1 1 1 1
PSU
0
SP 0 TIC
0
RCP
0
MP
It is a group of four peripheral cards/ service cards. All the subscriber lines are
terminated on the line circuit card (LCC) and trunk lines are terminated on the trunk
card (Two way trunk circuit card or E&M trunk circuit cards depends on the type of
trunk) respectively. These terminal interfaces are generally known as peripheral
cards. Tones like dial tone, busy tone etc are generated and interfaced with the
subscriber lines and trunks by TGD circuit card. Conference among the subscribers is
achieved by Conference circuit card. The conference and TGD circuit cards are known
as service cards.
There are four such peripheral/service cards in one Terminal group. In this exchange
there can be eight terminations in each terminal(peripheral/service) card. Four such
cards form a Terminal Group (TG) comprising of 32 channels
It detects the Loop extended by line circuits and trunk circuits. It receives the digits
when calling subscriber dials the called subscriber number. It also drives the ring feed
relay of the called party. It has a memory, to store the scanned information.
This block comprises of switching and interfacing between SP and RAX Control
Processor (RCP). Multiplexing, demultiplexing of terminal groups takes place here.
Switching between calling and called party is established here. It (TIC) also controls
the output of TGD (Tone Generator and Diagnostics) to be fed to peripheral cards
(LINE & TRUNK cards). This card also has internal bus with RCP. This card uses
65C02 Micro Processor IC and has 16K RAM and 32K EPROM.
This card uses 65C02 Micro Processor and has 12K RAM, 48K EPROM & 16K
EEPROM memories. This contains the information pertaining to peripheral cards,
metering and other administrative functions to be performed. Maintenance panel is
connected directly to RCP by which any changes in the data of the exchange can be
made (adding, deleting, modifying of subscriber or trunks etc.).
The SP, TIC/SN & RCP are called common control cards and are duplicated. These
cards monitor each other's health and act accordingly. Normally SP0, TIC/SN0, RCP0
form one group and SP1, TIC/SN1,RCP1 form another group. These groups are
known as copy 0 and copy 1. When copy 0 is active copy 1 is in passive mode. If any
card of a particular copy goes faulty the system changes over to other copy, and
exchange works on this copy till the faulty card is repaired and the copy becomes
active.
The input voltage is 48+/-4V. The RAX system requires various internal working
voltage sources. PSU card provides the following output voltages for internal working.
1) +5V-8A For microprocessor and other digital components.
2) 9V-0.5A Codec
3) +12V-1A Relays
4) 5V-0.1A For other digital components.
5) 48V For speech
Maintenance can be made easier when the maintenance personnel are acquainted
with both the physical and functional description of the system.
The frame has 26 slots to guide the circuit cards. However a maximum of 24 printed
circuit cards can be housed in the system. These PCBs are jacked in to the mother
board using Euro connectors. The cabling from the MDF is extended to the rear side of
the mother board using similar euro connectors to each circuit card required.
The equipment frame is as shown in fig 1.2 with the different cards jacked in.
L
L
P P T C T L L L L L C
T T C
S S G O R C C C C C C
I I C
U U D N K C C C C C /
C R R C L L L L L / T P P
F S S T
/ C C / C C C C C T G S S
P P R
S P P S C C C C C R D U U
K
N N K
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
The PSU card occupies two slots since its width is more. So 2 PSU cards occupies 4
card slots. Thats why it is a 26 slot and 24 card arrangements. Slots numbers 22 and
23 are optional to have trunk or LCC.
1.1.8 Maintenance Panel: MP is connected to the RCP through RS232C for the system
administration and maintenance function. Microprocessor 65C02 is used to perform
the above functions.
1.2.1 Line Test Unit : LTU is also connected to exchange through RS 232C connector. Any
subscriber or Trunk line can be connected to line test unit by giving suitable command
through maintenance panel. When line is connected to this unit, different tests on
subscribers line or on subscribers telephone can be conducted. After tests are
completed, subscribers line/telephone, a release command has to be given, otherwise
the line continues to get connected to line test unit and subscriber cannot access
exchange.
1.2.2 Total Failure Alarm Unit: This unit is optional and connected to one of the ports in the
exchange, normally to port no. 80. This port is a nominated port for this purpose .If this
alarm is installed, port no. 80 and cannot be used for connection of any other
equipment or subscribers number. It gives an audible and visible alarm to maintenance
staff in case of total failure of the exchange. This equipment is also connected to the
exchange through RS232C connector.
1.4 Summary :
The C-DOT RAX is housed in a cabinet and equipped with the following cards:
CHAPTER 2
POWER SUPPLY UNIT
2.1.0 Introduction :
The PSU card used in RAX is a DC-DC converter cum-ringer unit working on DC -48V
supply. They are duplicated for redundancy. The O/P from both the PSUs are made
common at the O/P and given to the load via change over diodes. In case of fault in
any one unit the other unit will instantly take over the full load of the RAX system.
This resulting square wave is fed into an isolation stepdown transformer and the
secondary voltage is rectified and filtered to produce the low voltage DC output.
In order to regulate the O/P load, the O/P voltage is monitored and a portion of it is fed
back into the control logic circuit (PWM (Pulse Width Modulator) controller chip).
Which in turn compares this voltage to a reference voltage and adjusts the conduction
period of the switching element to regulate the output.
The RAX system requires various voltage sources and PSU Card (duplicated)
provides:
1) + 5V - 8A
2) - 9V - 0.5A
3) + 12V - 1A
4) - 5V - 0.1A
for its functioning and also 75 V rms 25 Hz for ringing with a current capacity 0.1A in 3
phases for ringing supply to the RAX.
(1) Switcher A (2) Switcher B (3) Ringer (switcher stands for switched mode DC-DC
converter).
Switcher A : This unit takes -48V DC I/P, filters, chops into 20KHz square wave AC,
passes through a step down transformer which has taps for 5V and 9V. +5V, 8A being
a heavy load is generated by forward converter mode. The +5V O/P is monitored by a
portion of it being fed back to (IC No. SG 3524) PWM which regulates the O/P -9V
supply is generated by another winding from the transformer O/P unregulated -9V
0.5A.
Switcher B: The I/P -48V DC is filtered, switched to 20 KHz and passed through a
stepdown transformer which has taps for 12V and 5V. +12V 1.0A is generated by
rectifying the O/P of the transformer and filtered. This O/P is being monitored and
controlled by PWM chip controller (SG 3524). -5V is derived by inverting another O/P
of a winding and regulated through a regulator chip.
Ringer : It is basically a sine weighted PWM inverter whose O/P is filtered in order to
get 25Hz sine wave O/P. The O/P is distributed on three mutually exclusive phases
by means of three Opto - Triacs which are triggered as per the cadence of 0.4 sec on,
2.0 sec. off and this cadence is triggered and controlled by a PROM.
i) Ringer Generator : The supply to the ringer generator is +5V. A 8.192 MHz
crystal oscillator is used to generate 8.192 MHz pulses. 32K byte memory stores
the sine wave amplitude in the binary form. The ringer generates the cadence
for ringing out put.
The 3 phase sine wave ringing voltage is produced by suitably switching the 3
Opto Triacs at the output stage. The control for these switches is also generated
in the ringer generator. Pulse Width Modulator (PWM) pulses needed
to produce the sine wave are also produced in this stage.
ii) Ringer output stage: The input to this stage is 12.8KHz signal operating one bi-
directional switch and a sine wave PWM signal operates another bi-directional
switch. The output of the bi-directional switches is pulse width modulated sine
wave which is converted to smooth sine wave by means of an inductor. The
output stage includes the three switches at the three phase outputs, which are
operated by control signals from the ringer generator.
iii) Change Over Relay: The relay has 4 contacts. The inputs to 3 of the contacts
are 3 phase outputs of the sine wave ringing. The 3 phase output is connected
to 3 phase ringer bus when the relay contacts are closed. The relay coil is
actuated by relay drive signal. The relay drive signal is controlled by TIC
(Terminal Interface Controller) card. At a time, only one copy of PSU can supply
ringing since the closing of one relay contracts necessarily opens the contacts of
the relay on the other copy.
iv) RELAY DRIVE CIRCUIT: The TIC I/P signal, duplicate PSU error signal, and self
PSU error signal are used to control the closing or opening of the relay contacts.
2.1.2. ERROR MONITORING AND PROTECTION: Error monitoring circuits within the card
provide for the monitoring the following:
3) Ringer fail.
When the input voltage goes below -44V, Q2 will not turn ON. With the result Q3 will
be ON and hence the opto coupler switches ON and the signal take OFF point is
pulled high and this signal is extended to the Terminal Interface Controller Card.
A 2.5V reference voltage from PWM (pulse width modulator) controller (SG 3524)
serves as one input to all the four comparators. +5V and +12V are adjusted by resistor
and capacitor networks suitably at the other input to all the comparators so as to keep
the output of the comparator "high.
In the event of any one output getting low / high or absent, the output of the
corresponding comparator goes low which in turn saturates an output transistor to pull
the output low. This low output gives as one input of AND gate (U 18) and the output
goes low which is inverted and given as an "active high" PSU (power supply unit)
error signal to "TIC" (Terminal interface Controller) card. A crow bar circuit is also
present which gets activated during high voltage condition and shorts the output.
3) Ringer Fail: The input at this stage is single phase sine wave ringing out-put. It
is given to an AC/ DC to digital opto isolator. Its output is used as master reset for a
parallel in serial out shift register. Absence of ringer output gives a "high" signal at the
output of the shift register.
Majority of present switch mode power supply systems are of PWM type, which varies
the conduction time of the switching element during the ON period to control and
regulate the output voltage to a predetermined value.
The role of SMPS (Switch Mode Power Supply) is two fold. It has to provide a well
regulated output voltage and also high input-to-output isolation in order to protect the
user and the equipment from shock hazards due to high voltage or leakage current.
In recent years a number of ICs have been developed which include all functions
necessary to build a pulse width modulated switching power supply in a single
package with addition of a few external components. SG-3524 is one such chip being
used extensively depicts the basic building block of simple (PWM) pulse width
modulated controller. The circuit functions are as follows:
An Op. Amp compares the feed back signal from the output of the power supply to a
fixed reference voltage v. The error signal (if any) is amplified and fed into the
inverting input of a comparator. The other input of the comparator is connected to a
saw toothed wave form with a linear slope, generated by a fixed frequency oscillator.
The oscillator output is also given to toggle a flip -flop producing a square wave. The
comparator square wave output and the flip flop output are both used to drive the AND
gate, enabling the output when both input to the gate are high. The result is a variable
duty cycle pulse train.
Now the output pulse width is modulated when the error signal changes its amplitude.
CHAPTER - 3
3.0 INTRODUCTION:
The main functions RCP are Call processing, Administration and Maintenance. The
functional block diagram is shown in fig 3.1.
PROCESSOR AND MEMORY: This is the main control processor, 65C02 micro
processor chip is used for this purpose. The frequency of the processor clock is fixed
at 1.8432MHz. Processor will get interrupted by all devices within the RAX Control
Processor circuit card. External buffers are used for addressing memory and for
transferring data.
Clock Generation: 1.8432 MHz required clock is generated by using clock generation
logic. Asynchronous Communication used the same clock as processor. Pulse Time
Modulation uses 128 KHz and 64 Hz is used to drive High level data link controls.
Address decoder and Read/ Write Generator: The buffered address bus (driven by
processor) is decoded to drive chip select of memory and devices. All the devices are
accessed by processor. The address space allowed for devices is 1K (3000-33 FF).
Device selection logic gets selected only in the address range of (3000-33 FF). At that
time Device selection logic selects one of the devices except high level Data Link
Control where high level Data Link gets selected by processor address bit. Read/Write
control signal for memory and program timer module is generated by using processor
clock qualified with processor Read/Write.
Error Monitoring: PIA is used to monitor all system errors and self RAX control
processor error. All the error signals from Terminal interface controller and switching
network, Tone generator with Diagnostics, Power Supply Unit, other copy of RAX
control processor and maintenance panel will be terminated and buffered. Finally they
are connected to the port pins of PIA. PIA interrupts processor on NMI (Non Maskable
Interrupt) to give priority for the system failures.
EEPROM and RTC (Real Time Clock) Interface: (PIA) Peripheral Interface Adaptor 1
is used to interface EEPROM and Real Time Clock. Processor can address upto 64 K
but EEPROM or EPROM (12 K) and RAM 48 K covers almost all the locations out of
64 K. So to address EEPROM, 2 separate 8 bit registers are used and it is also used
to select one out of 2 EEPROMs at a time Reading/Writing from /to EEPROM is
controlled by Peripheral Interface Adaptor.
Real time clock (RTC) is used to provide day & time of the day with the alarm
capability. RTC is also controlled by PIA1 & RTC interrupts processor by using PIA 1.
(HDLC) High level data link control: HDLC is used for synchronous communication
with the other processor in the system. Pulse Time Modulation provides clock for
HDLC. High level data link control in (RCP) RAX control processor receives its serial
message from the HDLC of Terminal interface controller and Switching network
(TIC/SN). Where RCP and HDLC (self) converts this message into 8 bit parallel data
to the processor for processing. After processing, the processor transfers the data to
TIC/SN in the message format by using HDLC to the HDLC of TIC/SN.
3.2.0 CALL PROCESSING: RCP processes the information received and gives appropriate
message through a synchronous message link (HDLC) to the TIC/SN for further
action.
13. If the port is a valid one then RCP checks if the called port is free. If it is not free
then RCP informs TIC to feed busy tone to the calling subscriber and state is
changed to busy state.
14. If it is free then RCP informs TIC to feed ringing voltage to the called port and RBT
(Ring Back Tone) to calling port and state of the calling is changed to RBT state
and status of the called port is changed into busy state.
15. Once the called port goes off-hook TIC informs RCP line low on that port and then
RCP informs Terminal interface controller to connect two ports (calling and called)
and state of the subscriber is changed to conversation.
changed to a busy state and clear forward signal is sent on the trunk to remove the
seize and the state of the trunk is changed to Release Guard state.
15. If answer signal comes from the TAX within 150 sec. then RCP sends a message
to TIC to connect subscribers.
16. The state of subscribers and trunk is changed to conversation.
14. If answer signal comes from parent or adjacent exchange within 150 secs, then
RCP sends message to TIC to connect the subscriber and the trunk. And the state
of the calling and trunk is changed to conversation.
1. For an incoming trunk to RAX, a line low will come on that trunk port from the
distant exchange. RCP then checks whether the trunk is connected or not to RAX
If not connected then N U tone is fed to that trunk.
2. If the trunk is connected to RAX then RCP checks for the direction of the trunk (0,8,9).
3. If it is a direction 9 trunk then a message is sent to TIC from RCP to feed D.T. to
that trunk and trunk state is changed to dial begin state.
4. The first digit expected in this case be "2" only. If any other digit comes then RCP
informs TIC to feed N.U. tone to the trunk and trunk state is changed to N.U. state.
5. If the first digit is '2' then trunk state is changed to dialling state.
6. Then RCP translates last 2 digits into port number (since digit expected are 2XX) if
the translated port is invalid then RCP informs TIC to feed N.U. tone and trunk
state is changed to N.U. state.
7. If the translated port is valid one, RCP checks for the status of that port free/busy.
If busy then RCP informs TIC to feed BT.
8. If the called number is free then RCP informs TIC to feed ringing voltage to the
RAX subscriber and RBT to the trunk. The trunk state is changed to RBT state and
subscriber state is changed to ringing state.
9. If the calling port answers the call then a message is sent to TIC to connect two
ports (both subscriber and trunk) and give a battery reversal to incoming trunk port.
10. The state of Trunk port and called port is changed to conversation.
3.2.6 DIRECT (8) Incoming: Same as DIRECT '9' for unit free number.
1. The first digit expected is "2". If any other digit comes on it then RCP informs TIC
to feed NU Tone to trunk and the state is changed to busy.
2. If the first digit dialled is 2 then trunk state is changed to dialling state.
3. Once the first digit is "2" then RCP translates the last 2 digits to port number. If the
port number is invalid then RCP informs TIC to feed NU Tone to the trunk and
trunk state is changed to busy.
4. If the translated port is not free then RCP informs TIC to feed BT to the trunk and
trunk state is changed to busy state.
5. If the called port is free then RCP sends message to TIC to feed RBT to the calling
and ringing voltage to the called port and trunk state is changed to RBT and called
port is changed to Ringing state.
6. Once the called party answers then TIC informs RCP about the line low on that
port. Then RCP informs TIC to connect incoming trunk and called port. And also
informs to send battery reversal to the incoming trunk. Then the status of incoming
trunk and called port is changed to conversation state.
TRUNK OFFER: This facility is used for trunk operator in the trunk direction 9 or the
trunk from manual trunk exchange on a carrier line. This is to be used when operator
finds RAX subscriber is busy. If trunk operator wants the RAX subscriber urgently then
over the busy tone, digit 1 is dialled, it is treated as Trunk offer signal and operator is
connected to RAX port number through 4 party conference unit. The operator then
informs the RAX subscriber about the trunk call (Trunk offer to 298 is not allowed).
The MP (Maintenance Panel) is connected to the 2 copies of RCP through serial
RS-232C link. The MP does all administration and maintenance function by inputting
commands through key board. Communication between MP and RCP is through well
defined messages. The messages from MP is filled in transit buffer and transferred to
receive buffer in active RCP. After analysing the message the response message is
stored in Transmit Buffer in RCP and then transferred to receive buffer in MP.
3.3.0 ADMINISTRATION: Non-volatile storage E E ROM is used for billing, statistics of the
subscriber such as metering status and system information.
1. Subscriber administration
2. Trunk administration
3. Traffic administration
4. Timing administration
3.3.1 Subscriber Administration: It is done through "Sub" function key when only if the
user has logged in with a valid password. The various sub operations are:
1) Addition of subs.
2) Deletion of subs.
5) Test Access.
3.3.2. Trunk Administration: It is done through Trunk function key when only if user has
logged in with a valid password. The various Trunk operations such as:
The above function can be carried out for all 3 types of trunks (incoming/outgoing/both
way).
(a) Traffic Administration is done through TRF function key on MP after logging
through valid password.
(b) The following timing operations can be carried out from maintenance panel (MP).
Additional functions like PBX hunt group, status of ports, subscriber /trunk line testing,
exchange parameters setting, and password scheme implementation etc, can be done by
MISC" key on MP. Metering information can be obtained by METER key on MP.
3.4 MAINTENANCE:
When fault occurs in MP or RCP, MP generates a beep at every 2 sec. The various
hardware functional blocks of MP like LCD, Beeper, LED bank, functional key,
functional LEDs and Keyboard can be tested through "TEST function key .
CHAPTER 4
TIC/SN MODULE
The TIC/SN is essentially a generic card. It switches voice between the 128 ports,
controls signalling, support diagnostics and duplication under the intelligence of RCP.
It can be understood this way also. The signalling of the termination cards is handled
by the signal processor (SP) and voice by the Switching Network (SN). Both SP and
SN are under the control of Terminal Interface Controller (TIC) which works under
instruction from RCP.
4.2 FUNCTIONS
1) TIC/SN Switches the PCM (Pulse Code Modulation) digital voice information. This
is to enable the subscribers to converse with each other and to be fed with
different tones at different stages of the call.
2) TIC (Terminal Interface Controller) derives the identities of the calling and called
terminals and establishes a path through SN (Switching Network) between these
terminals. TIC communicates with RCP on HDLC (High Level Data Link Control)
for call related information.
3) Using SPC (Signal Processor Card) it receives status indication for all the 128 port
(terminals) i.e. scan signalling information. This information is passed on to RCP.
Also it gets the message from RCP to drive events on terminals and passes the
Drive signalling information to signal processor.
Note: (HDLC) is to ensure that data is transferred quickly and correctly.
4) It keeps on doing periodic diagnostic on the terminal cards including itself and
informing RCP through HDLC messages.
a. Terminal Cards:
Each termination card caters for 8 ports (subs/trunks). Four such cards form one
Terminal Group(TG). There are four time division multiplexed, 32 channel ( PCM )
voice links working at 2.048 Mbps.
IRISET 24 DIGITAL EXCHANGE C-DOT
TIC/SN
The signals, required to control the multiplexing and demultiplexing these PCM links
are generated by TIC / SN. The main clock in TIC is 8.192 MHz and it is used to derive
2.048 MHz PCM clock for the terminations. The same clock is used to derive card
select signals and port (subscriber) select signals through counter chain.
Card select signal is used to select one of the 16 cards (in the RAX). Once the card is
selected, one of the 8 subscribers is selected by using subscriber select signal.
To support duplication and copy change over, TIC/SN generates control signals
towards TGs. There is an exchange of clock, sync, and control signals between two
copies of TIC/SN in the system to support change over.
RCP communicates with TIC/SN through the 64 Kbps HDLC. Whenever, TIC receives
information from SP, it writes the information in the RAM (of TIC) in required format.
This formatted information is sent to RCP on HDLC. Similarly RCP sends message to
TIC on HDLC link and is written in the RAM. TIC acts according to the instructions of
RCP.
For switching purposes TIC/SN generates various control signals to get various voice
data from each line. Various signals generated towards termination cards are as
follows:
(1) TCS (Terminal Card Select): To select one termination card among four
Termination cards (TG) on a TDM link, TCS signals are used. Totally there are four
TCS signals. This signal of 8 KHz frequency selects a particular card for about 31.5
(125/4) micro seconds (selects a TG for 125 microseconds).
(2) TA0, TA1, TA2: These are used as Port select (or subscriber select or Terminal
select) signals. Since each termination card contains 8 ports, three subscriber select
signals are provided for selecting a particular port. A port is selected for 4
microseconds out of 32 micro seconds for a terminal card.
(3) PCLK (PCM CLOCK): PCM clock of 2.048 MHz enables the TIC interface of the
terminal card to generate a 32 Channel PCM voice link. But timing information for
voice data is given by PCM clock.
(4) Sync: TIC interface generates a "Sync Signal" of 8 KHz required by the CODEC
for the voice data sampling. Sync signal indicates starting of the Time slot "0" for 32
time slot PCM (TDM) serial link.
Since TIC / SN has to switch voice / Data communication and also control other
devices, the hardware can be identified as:
4.4.1 Controller:
(1) Micro processor (65C02) with Data Memory ( RAM )and programme Memory
(EPROM):
This is also known as processing kernel. Along with 8 bit processing unit (65C02),
program memory (EPROM) and data memory (RAM) forms the processing kernel.
This is the controlling unit for the card and main microprocessor for processing the
information. On any interruption from any of the associated devices or SP, it takes
appropriate action like informing RCP through a massage. It informs SAM (Switch
Address Memory) for switching the appropriate ports depending upon the information it
received from RCP. Also from the data received from RCP after proper analysis, it
writes into SP for further action (if any)
(i) Peripheral Interface Adapter ( PIA ): To enable control over the switch ,
microprocessor has PIA. It has programmable I/O ports and two interrupts for ports
A and B respectively. It provides to monitor the error signals from all peripherals like
TGD,CONF.
(ii) Advance/High Level Data Link Controller (ADLC/HDLC): This is a bidirectional data
communication link between the TIC and RCP and works at the rate of 64 Kbps.
This is a synchronous communication link which works on 2 MHz clock. The clock to
this ADLC/HDLC is supplied by RCP. The data to be transmitted is first stored in a
transmit buffer. When the link is free, it transmits the data on the link.
(iv) Timer: This has three input clock for three independent 16 bit counters. Clock 1 is a
2MHz. With this, counter 1 is programmed to generate the 16 bits/sec. clock which
is used as ACIA input clock for transmitting and receiving sections.
Second timer gets the output of the first timer as its input clock. With this, counter 2
is programmed to generate real time clock signal i.e. interrupt requests (IRQ).
(i) Information Memory ( IM ): The incoming bit streams from termination cards are
multiplexed and given out as one 128 chls (time slots) PCM link. The output of
multiplexer goes to IM. This Memory will hold voice information (PCM or digital data) of
128 subscribers for one sample at a time.
There are two information Memories each of 1 K capacity. Each information Memory is
divided into two portions - one for reading and other for writing, on alternate cycles of 2
millisec. The other information Memory is identical to the earlier one. One of the two
information Memories is located in trans path, and the other in the receive path.
The 128 time slots are divided into ports as 0-31, 32-63, 64-95 and 96-127.The
messages from the 4 line/trunk cards, which forms the PCM link of 32 time slots are
allotted to the ports accordingly. The message which are multiplexed are stored in
sequential order so that the messages of port numbers and time slots are identical.
In the IM, one location is allotted per subscriber (port). Thus while writing, it is written
in the sequential order of subscriber port numbers. A counter is used to generate
address for Information Memory.
(ii) Switch Address Memory ( SAM ): To control switching, SAM is provided under
the control of processor which will write port numbers of subscribers to be switched,
into this SAM. The actual switching of voice information between the time slots is
done in SAM. This information of switching is available to (65C02) TIC processor
(which gets instruction from RCP ).
The switching is done during the Read cycle of Information Memory, which holds the
sample of the subscriber to be switched, has to be addressed as per switching
requirement.
In order to provide address information for reading the information Memory, there is a
separate Memory which has locations for each subscriber. This Memory is called
switch address memory (SAM). This will get address information ( of Information
Memory ) from counters to identify the proper subscriber time slots.
The data coming out from Information Memory is now a switched information. This bit
stream is again converted into four 32 channels PCM links by a Demultiplexer.
(iii) Multiplexer and Demultiplexer ( MUX and DEMUX ): There are four 32 ch. PCM
links which carry data to and from termination cards. Each link work at the rate of
2.048 mbps. These four 32 ch. PCM links of 2.048 mbps are multiplexed by a
multiplexer to form one 128 ch. PCM link of 8.192 mbps. The message available here
is written sequentially in the Information Memory.
Similarly after being read sequentially from Information Memory the message on 128
ch. PCM link of 8. 192 mbps is demultiplexed by the Demultiplexer to form four
numbers of 32 ch. PCM links of 2.048 mbps.
(iv) Counter Chain ( circuit ) Logic: This logic is used to derive the number of clock
pulses(periods) for different purposes. The frequency of the main clock is 8.192 MHz.
Using the dividers it is divided to derive various clock pulses. From these clock pulses
card select, subscriber sleet (port - select ) and synchronous signals are derived.
CHAPTER 5
5.1 INTRODUCTION: Tone Generator card is used to generate call supervisory and test
tones for system like PABX and RAX. It has also capability to diagnosis the tones it
produces and there by can conform sanity check of the voice path.
(a) A tone is a simple audio signal having distinct frequency or set of frequencies
(usually a voice frequency i.e. between 20 Hz to 20KHz ).
(b) A tone may be continuous or may have cadence i.e. signal has certain ON - OFF
period.
(d) A tone component may mean a single frequency signal (400 Hz) or a modulated
frequency signal (400 Hz modulated by 25 Hz) or it can be an addition of two sine
waves of different frequencies as well.
(e) These tone components which contain the PCM samples of a particular frequency
or group of frequencies reside in a bank of memory called tone memory.
(f) Each bank of this tone memory consist s one tone component.
(g) When a tone consists of more than one tone component the second tone
component may be just silence (regarded as unaudible d. c. signal).
(h) If in a tone (like RBT) there is one tone component followed by silence then the
tone is said to have cadence.
How does the exchange produce such responses? An exchange is a switch. It can
basically switch the subscriber voices. It is little wonder than to expect the exchange to
switch these responses to the subscriber in need of such responses henceforth referred to
as tones.
5.2.1 TONES AS SUBSCRIBERS: The tones are available at certain termination for the
exchange to the subscribers in need of them. In what aspect the exchange will look at the
TGD, which produces such tones as a termination card, giving the voices of 8 special
subscribers called tones.
The TIC /SN card (which has the switch and the controller embedded in it), interfaces with
the TGD in much the same way as with a line card.
Let us take a typical tone called RBT. It is made of a tone component with a sine wave of
frequency 400 Hz modulated by 25Hz as one tone component and silence as the other.
This tone is such that 400 / 25 Hz tone component is ON for 400 ms, OFF for 200 ms ON
for 400 ms and OFF for 2000 ms. This tone component (400/25 Hz) is stored in PCM
samples in a tone bank. During the OFF period silence tone is sent. The PCM bit stream
sent continuously produces the effect of silence and this tone is called silence tone. This
silence tone is also stored in tone memory in one of its banks.
TONE ROM (Tone Memory): The tone of 25 Hz (320 samples) and 400 Hz (20 samples)
are stored in a PROM, called tone ROM (6K X 8). This PROM is divided into 16 banks
and each bank contain tone components. To select any one of the 16 tones to be
switched to 16 channels, we store the address of Banks in BAM (Bank Address Memory).
Each location of BAM corresponds to a channel.
A computer addresses this memory to give the series of samples stored in consecutive
locations of the bank of memory. Since any voice sample is to be sampled at 8 KHz rate,
all tone samples are read out from a bank of tone Memory once in 125 micro second and
put on a channel to form a tone.
In fact the same tone Memory can be read several times in the 125 micro seconds
period to give samples pertaining to the other channels as well. In TGD 16 samples
are read from various banks of tone memory and put on 16 consecutive channels of
PCM highway.
Each of these channels are the time slots on the PCM highway in a period of 125
micro seconds. Since the PCM highway is (125/32) apprx. 4 microseconds duration.
Each sample from tone Memory is read once in 4 microseconds and converted into
serial and transmitted at 2.048 MHz on PCM link during the next 4 microseconds.
5.2.4 BANK ADDRESS MEMORY (BAM): An eight location RAM called as BAM gives the
address of the bank of tone memory in a particular channel. So which bank of memory
has to be read out in which channel is automatically taken care of by writing that bank
address in the corresponding location of BAM.
Once all the channels have given the address to the tone Memory one after another in
125 micro seconds period and thereby read out their corresponding sample on the PCM
highway, the tone memory automatically gets updated (by 8 KHz clock) to next sample in
each of the banks. In each bank there are 320 such samples after which there is a wrap
around in the banks samples.
5.2.5 CADENCE GENERATION: Any tone component can be sent on any channel by writing
into the corresponding location of Bank address Memory, the particular tone components
address (Bank address). Each location in BAM thus corresponds to a channel and thus
holds the tone component Bank address from where the samples have to be read out in
the channel.
Now if periodically the tone components address in BAM can be changed to put different
tone components on the channel thereby producing cadence on the channel. The
processor in TGD card takes care of the changes in BAM location to ensure the cadences
of the tones on all 16 channels.
5.2.6 CLOCK STRETCHING: The Bank Address Memory is generally read by the counter to
produce the Bank address for a channel. This reading is continuous and therefore
BAM is always being accessed by the counter. However the processor has to write
occasionally (wherever there is need to change the cadence of a tone) different Bank
address in different location of Bank Address Memory.
To ensure that with processor and counter access Bank Address Memory in different
times, the processor clock is stretched and synchronized with the counter clock so that
processor writes into Bank address Memory soon after the counter has read from
BAM, when the need arises for the processor.
5.2.7 SANITY CHECK OF TONES: The tones produced by TGD are duplicated and sent to the
controller (TIC/SN). TIC, in turn, switches them to the needy subscriber. However
there has to be a provision for the TIC to test the sanity of tones. To ensure that, the
tones and hence the TGD are sane enough, the TIC/SN switches back the tone output
of TGD to itself. The diagnostics on TGD tests this tone input and informs the TIC/SN
if the tones are in fact correct. If any tones are bad, the TGD asserts a signal towards
TIC called TGERR. (Tone Generator Error).
5.2.8 THE DIAGNOSTICS: The incoming PCM stream can be made parallel. The processor
extracts a particular channel from the Pulse code Modulation (PCM) stream and
compares the sample on the channel with idle pattern. This comparison signal
indicates if that channel has tone or silence at that particular time.
By monitoring this signal (Tone or silence signal) for a particular channel, the
processor can have an estimate of the cadence of tone. By doing such checks
regularly on several channels, the sanity of tones can be ascertained. Any irregularity
can be reported to TIC/ SN through TGERR.
In fact the TIC / SN can test the functioning of diagnostics on Tone Generator
Diagnostic by creating an error or switching wrong tone back into one of the slots of
TGD. An assertion of TGERR for this test from TGD will ensure proper functioning of
diagnostics logic itself.
There is a provision on the TGD card to collect samples of a particular channel and
compare or calculate the check sum of the samples to ensure correct tones.
CHAPTER 6
6. Main Functions:
1. Subscriber Administration.
2. Trunk Administration.
3. Subscriber Metering.
This OPR card interface with the keyboard and display card for accepting key
commands and displaying information with the RCP for signalling and switching.
All signalling information on the operator console unit is detected by appropriate key
closures and sent to the RCP through the Rs. 232C link.
The OPR card interfaces with the keyboard and display card for accepting keyboard
commands and displaying the related information. Commands are formatted into
messages and communicated to the RCP through an asynchronous serial interface
likewise, messages from the same are displayed on the LCD or LED displays. The
functional blocks constituting the OPR card are:
6. Buzzer Driver.
7. Power Supply.
The clock input to the MPU of the console is 1.8432 MHz and it is generated in the card itself.
The MPU logic consists of 8 bit Microprocessor with 8 K / 32 K bytes of program memory and 2
K bytes of RAM (depending upon the system requirement). Address decoders are provided to
divide the processor address space of 64 K bytes into blocks of 8 K bytes each and to derive
the select signals for memories, peripherals and LED Drivers.
PIA
The console communicates with the RCP via a standard serial asynchronous RS-232C
link. Messages that are generated by the MPU are formatted and transmitted by means
of an asynchronous communication Interface Adapter (ACIA) which is programmed to
operate at 1200 bauds, 8 bit word length and 2 stop bits. The ACIA indicates the
presence of data received from RCP through an interrupt line to the MPU. The MPU on
recognising this signal receives the data and processes it.
The keyboard has an array of 23 keys. Ten of which are for selecting the digits and
rest are being command function keys. A dedicated keyboard interface controller
scans the keyboard via scan lines S1-S8 and drivelines D1 - D5. When key closure is
detected, it interacts with the MPU through a peripheral I/O Controller ( PIAT ). The
keyboard interface has a data available (DA) line which goes low when a key is
depressed. This line then initiates an interrupt signal to the MPU through the PIAT.
The MPU obtains the code of the key pressed by the help of encoder, to take further
action.
A display driver circuitry for 16 character DOT Matrix display is provided. The display
interfaces through 8 data lines, 3 control signals.
There are 24 cards and 3 states of the system. Active, passive and fail (condition of
the card). Correspondingly 3 rows of 24 LEDs each (total 72 LEDs ). Diagnostic
related data received by the MPU is stored in the LED Drive RAM. A bi-directional
buffer enables the CPU (Central Processing Unit) to access data in the RAM (Random
Access Memory) by means of a diagnostic enable signal. When MPU does not access
the RAM, the data is in the "READ" mode and the information is displayed on the
diagnostic LED.
This provides audio feedback to draw the attention of the operator by giving an audio
signal on the buzzer.
6.2.8.POWER SUPPLY:
The console obtain its supply from the system. A 3 pin voltage regulator provides the on board
supply. In addition - 5V supply is also obtained for operating the RS 232-C interface.
On receiving a response from the system the ACIA interface interrupts the MPU by asserting
the interrupt signal. The MPU reads the information from this device by asserting the
appropriate device Select Signal. The firmware analyses this message and takes suitable
action. This may include lighting up a particular LED by asserting the LED device select or
writing suitable information into the display. It may also initiate a trigger pulse through the PIAT
to active the buzzer. If a diagnostic massage is received, it writes this information into the LED
RAM by asserting the appropriate Device select signal.
CHAPTER 7
7.1.0 Introduction:
(a) Receiving supervisory signals such as on - hook / off hook/ hook switch flash and
decadic (dial) pulses from termination and also for transient validation (noise
rejection).
(b) Controlling ringing towards subscriber and providing automatic ring trip when the
called subscriber goes off - hook.
(c) Controlling metering signals.
In order to support all the functions given above, the card has four scan points ( or
buses ) viz., A,B,C and D and four Drive points A,B,C and D.
On scan A, both level and pulse transmissions ( including decadic pulses ) from
terminals can be detected. Other scan buses B,C and D have the capability to validate
level signalling, only when the Bus A has completed an event. The detection time for
signalling validation (on - hook, off - hook status) is software programmable. On Drive
A, both level and pulse transmission ( including decadic pulses ) can be driven towards
terminals. Drive B also supports level and pulse signalling. Drive C is used for
diagnostics. Drive D is used to control test access for terminations. Diagnostic facilities
are also provided in the card. Diagnostics can be achieved by looping back the drive
signals to the scan side on any termination. The card also has built in self
synchronization facility and it can synchronize itself with the duplicate copy of the
signalling processor.
IRISET 39 DIGITAL EXCHANGE C-DOT
SIGNAL PROCESSOR CARD
The signal processor card acts as an interface with the termination card ( TCs ) on one
hand and both the copies of Terminal interface controller and Switching Network ( TIC/
SN ) card. For interfacing with termination cards, the SP card is capable of scanning
and driving 128 terminations. The SP card interfaces with the TIC/SN card via a time
multiplex bidirectional bus. The received signalling information from the terminations is
given to the TIC ( Microprocessor of make Rockwell 65C02) through a standard 6502
bus interface. The TIC also programmes the SP drive functions through this interface.
The SP card is duplicated for fault tolerant system operation. Each copy (copy 0 and
copy 1 ) is interfaced with the corresponding copy of the TIC i.e. copy " 0 " of SP to
Copy " 0 " of TIC and copy " 1 " of SP to copy 1 of TIC.
In order to achieve scan and drive signalling information for all 128 terminations in 2
milli sec., SP generates the following signals towards the terminal cards.
The signal processor generates 16 card select signals SCS 1 to SCS 16 for 16
Terminal cards (TC 1 to TC 16). SCS 1 goes to TC 1,SCS 2 goes to TC 2 and so on.
The card select signals are generated by decoding four counter output bits. This is
done by using 4 to 16 decoder in SP. Whenever SCS connected to a TC, is low
(active), that particular TC is selected for a duration of 125-micro see. (2 milli sec / 16
= 125 micro sec).
Each line card caters for 8 subscribers. The SP supplies three bits-A0, A1 and A2
towards the TIC card. Through these signals eight terminal circuits of TC (Terminal
Card) are selected one by one i.e. one subscriber out of eight subscribers is selected.
Each terminal circuit is selected by SP for 15.6 micro sec. (125 micro sec./8=15.6 micro
sec.). These signals are decoded by a 3 to 8 decoder which is positioned in the line
card.
This signal from SP to terminal cards control Drive / Scan logics ( periods ). Every
terminal is processed for 15.6 micro sec. Out of 15.6 micro sec ( time a port or terminal
is selected by SP ) first 3.6 micro sec. are allotted by SP, for driving the events on
terminal and during this period the signal processor direction goes high to drive signals
from SP to Termination card ( ring / test access/diagnostic to particular termination from
signal processor ). The last 12.0 micro sec. (out of 15.6 micro sec ) are allotted for
scanning the events from the terminal. During this period of 12.0 micro sec. SP DIR
goes low to scan subscriber status and to report to Signal Processor.
To distinguish between scan and drive operation a S/D signal ( scan / drive signal) is
generated at the line card. Four data signals are used for signalling purposes. These
signals are time multiplexed and bidirectional. They are called as:
SCAN A Drive A.
SCAN B Drive B.
SCAN C Drive C.
SCAN D Drive D.
This latches the drive information. It is active for 500 nano sec.
7.2.0 FUNCTIONAL BLOCKS: The Signal processor card has the following functional blocks.
Each signal processor receives its clock from the main clock corresponding to the copy
of TIC. Copy 0 of SP receives its clock from copy 0 of TIC and similarly copy 1 - SP
gets its clock from copy 1 - TIC.
If the clock circuitry in the SP fails then there is a need to select the duplicate copy of
the clock supplied from duplicate copy of TIC. Self clock and Duplicate clock are given
to 2 to 1 selector where selection of the clock is controlled by the control register. Fifth
bit of the control register (CLK SEL) controls the select ( S ) input of 2 to 1 selector
where this ( fifth bit ) being written by TIC. If duplicate copy is selected, the
synchronization between the active and passive copy is done by synchronisation logic.
Signal processor keeps a track of the time elapsed from the start of a signalling event
viz on hook, off - book, hook switch flash, decadic pulses etc. A periodic pulse of 16
milli sec of 2 milli sec width ( high ) is used for scan time count operations. In addition
to this, a periodic clock of 32 milli see. With 2 mill sec. Width (high) is used for drive
operations.
Signal processor accesses the memory for processing and updating signalling
information. In order to facilitate this, the memory address has to be generated. A
1.024 MHz clock forms the basis for SPs operation. This clock drives a synchronous
counter chain and the outputs of this chain provide the memory address during SPs
internal processing.
Each port in the line card circuit is allocated with 8 bytes within State Information
Memory. 10 bits of address is required to address state information - where first 3 bits
are used to select one out of 8 bit allotted to each channel ( port ) and remaining 7 bits
are to select one out of 128 channels ( port ).
Each termination is scanned once in every 2 milli sec. and the state of hardware for
that channel ( port) is saved in the memory. This information is restored to the
hardware at the beginning of channels (port) in next time slot and operations continue.
The memory is accessed by the CPU (TIC) to update the drive and timing information.
16 card select signals, each of 125 micro seconds width ( 8 ports x 15. 6 micro,
seconds per port = 125 micro seconds. ) are generated by decoding four counter
output bits. This is done by using 4 (binary bits 0000 to 1111) to 16 (decimal)
decoders in signal processor.
Each line card caters for 8 subscribers. Signal processor supplies three counter bits
A0, A1, and A2 for selecting one out of eight subscribers. These signals are decoded
by a 3 to 8 decoder which is positioned in the line card.
State information memory receives address from signal processor and TIC at different
phases.
7.2.2 Phase generation: Each port is scanned for a period of 15.6 microseconds which is
divided into 16 phases each of approximately of 1 micro second duration. Those 16
phases are generated for synchronous hardware operations. In each cycle of 1 micro
second, only 500 nano seconds (n.sec.) are used for validation. Out of 16 phases, first
eight phases are used as Read phase from state information memory (for loading) into
the various registers, counters, filp-flops, latches etc. for processing. During next
seven phases i.e. phases 9 to 15 writing or updating of the processed signalling
information into the SIM through buffer takes place. For example information read
during the 9th phase is written back into SIM after processing during 0 phase through
allocated buffer.
Sixteenth phase is exclusively used either for transferring the address and memory
contents of the TIC to SP's SIM for write operations or for transferring the address and
memory contents from SPs SIM to the TIC for read operations. In other words 16th
phase is used for TIC/SN Reading / Writing operation. Both these read / write operations
are done ' through SP 's programming interface.
Signal processor scans all 128 terminal circuits in 2 milli seconds. Thus it allots 15.6
micro seconds. ( 2 / 128 ) to each terminal circuit. Whenever a terminal circuit reports
any new signalling event on ABCD bus, Signal processor validates the timing for that
event. A signal transition is valid only if the last three successive samples pertaining to
a particular channel ( termination ) are of the same level and are different from the
stable state which is signified by the previous valid level. Timings for different events
are programmable. After validating the signalling event, if the new event meets the
timing requirement, signal processor stores the event for that terminal circuit with
terminal circuit number in its register. At the same time, signal processor gives
interrupt to the TIC card. Terminal interface controller on getting signal processor
interrupt, reads signal processor register through the data bus provided between
Terminal interface controller and signal processor and knows the event reported by the
particular terminal.
Encoded information towards the Terminal interfaces is used to control functions like
ringing on subscriber lines and outpulsing on trunks.
Whenever Terminal interface controller has to drive any event on a particular terminal,
Terminal interface controller writes the drive information in signal processor register
along with terminal circuit number. Signal processor decodes this information and
places the corresponding drive ABCD value on ABCD bus towards the terminal circuit
in the timeslot allotted for that particular terminal circuit.
Each channel ( port ) is processed for 15.6 micro sec. in every 2 milli sec. Therefore to
store the status of each channel, a set of registers is required. This is organised as an 8
byte memory for each channel ( termination or port ). The 128 terminations therefore
require 1024 bytes of memory. This memory ( SIM ) is accessed both by signal
processor and TIC at different phases and can be addressed externally and internally.
The signal processor access the state information memory internally for processing and
updating signalling information. The Terminal interface controller accesses the SIM
externally via the micro processor interface for memory initialisation.
The State information memory holds the status of each port ( subscriber )in a particular
memory location. Each port is allocated with 8 bytes within state information memory.
Therefore 128 terminations ( subscribers ) are allocated with 1024 bytes ( 128 x 8 bytes
or 1024 x 8 = 8192 bits ) of memory.
The memory is accessed by a ten bit address. First three bits are used to select one out
of 8 bytes allocated to each channel ( port ) and remaining 7 bits to select one out of 128
channels ( port ).
Out of 8 bytes allocated for each channel, first 3 bytes are allocated for drive and
remaining 5 bytes for scan. Drive bytes are written by the Terminal interface controller
during the 16tb phase by using Data Write Register.
Each termination is scanned once in every 2 milli seconds and processed for 15.6 micro
seconds. In other words each byte is accessed for about 2 micro seconds ( 15.6.micro
seconds / 8 ) i.e 1 micro second for Read and 1 micro second for write. Out of 1 micro
second. Only 500 nano seconds are used for validation. The state of hardware for the
processed termination ( for 15.6 micro seconds ) is saved in the memory. This
information is restored to the hardware at the beginning of channels ( terminal or port ) in
next time slot and operations continue.
The memory ( SIM ) is accessed by the CPU ( TIC ) to update the drive and timing
information. Memory access is controlled by 16 phases as discussed in the Phase
Generation.
Memory address and memory data buses are available on various registers in order to
enable the Terminal interface controller access signal processors SIM for initialisation
and for controlling drive or loop back operations on bidirectional buses A,B,C and D.
This helps in the transfer of data to and from state information memory ( SIM ) during the
16th phase. This interface contains address decoding for CPU (TIC) access to signal
processors control, status and data registers. Terminal interface controller reads from
and writes into state information memory ( SIM ) by using registers.
There are totally 9 registers for accessing the memory. These registers are addressed
by using A0, A1 and A2 address signal ( three address bits ) with qualified, processor
control signals. Out of these 9 registers 4 are write only and 5 are Read only registers.
These registers are 8 bit wide.
(a) Memory Write Registers ( 4 nos.): There are four types of write registers.
1) Address Register ( AR) - Port Selection: This register selects one out of 128
channels during TIC interfaces with SP. From this, TIC reads the memory data and also
writes the memory data in it.
2) Memory Control Register (MCR ): (Byte selection and Read and write control ) This
register is used for addressing ( selecting ) one of the 8 memory locations i.e. selects
one byte since each channel ( subscriber ) is allocated 8 bits within SIM. Three bits from
the byte address.
The fourth bit in (MCR) memory control register called (R / W) Read / Write bit is used to
control read and write operations of state information memory. When this bit is set (1)
Memory is in Read mode, where as the same bit is reset, the memory is in write mode.
The memory can be read from the data bus or written into the data bus of
microprocessor during 16th phase.
3) Control Register (CR): This register is used to control the reporting through interrupts,
of events like parity error and completion of scan / drive operations to the terminal
interface controller.
Through this register, the terminal interface controller ( CPU ) can selectively enable
interrupts to , initialise signal processor etc. The different interrupts are:
Data in the form of bits is written by the microprocessor. What is to be written into the
particular memory location during the 16'h phase, is first written into this register by
addressing this register. This memory is addressed by memory control Register and
address Register.
(i) Data Read Register (DRR): Data from the internal memory is made
available on the micro processor bus using Data Read Register during the
16th phase by addressing Data read register. Memory control Register and
Address Register provide the address of memory location from where data
is read into Data Read Register.
(ii) Scanner Termination Number Register (STNR): This register gives the
data (bits) loaded from the counter output after completion of scan
signalling event of a particular channel ( port or subs ). The data represents
the address of the channel on which scan signalling event is completed. By
addressing this register the data is available on microprocessor bus.
(iii) Drive Termination Number Register (DTNR): This register gives the data (
bits ) loaded from counter output after completion of Drive signalling event of
a particular channel. The data represents the address of the channel on
which Drive signalling event is completed. By addressing this register, the
data is available on micro - processor bus.
(iv) Status Register (SR): This register reflects the occurrence of events
within signal processor.
(v) Scan Data Register ( SDR): The scan data is made available on this
register. This register contains the four bus conditions A, B, C and D and
digit collected on the termination, which completed a signalling event. The
data represent the stable state attained by the A, B, C, D. buses required
for call processing.
CHAPTER 8
8.1.0 Introduction:
Line circuit card is one of the termination cards and It is the first link in the chain of
cards comprising the exchange.
Line circuit card ( LCC ) is the direct interface between the exchange and subscriber.
Each card has 8 identical circuits on which it receives 8 pairs of subscriber telephone
wires. Each of these circuits does the following function.
The basic function of Line Circuit Card ( Termination cards ) is collectively termed as
BORSCHT an acronym for -
B - Battery Feed.
O - Over Voltage Protection.
R - Ringing.
S - Supervision.
C - Coding & Decoding
H - Hybrid Conversion ( 2 / 4 wire conversion)
T - Testing.
Battery Feed: -48v battery With current limiting circuit is supplied to subscriber loops for
signalling and energising the Microphone of the handset. Maximum current is limited to 35
ma by current limiting circuit to prevent excessive current on short loops.
Over Voltage Protection: A Hybrid transformer in the line circuit with back to back
Zener diodes suppress the voltage transferred to the secondary even though surge
arrestors across the lines (GD Tube) provide protection against surge voltage. It (over
voltage) may be carried through the subscriber line to the exchange before the GD
(Gas Discharge) tube in the MDF(Main Distribution Frame) is activated i.e. during the
response time of the GD Tube.
Ringing: Ringing is extended to subscriber circuit under the control of TIC & SP.
Each subscriber line circuit has independent ringer relay.
Supervision: Three opto-couplers are used to sense the line status and detect the
signalling events, such as on/off hook detection, dialling, ring trip, seizure, digits
reception, clear forward etc.
Coding: To provide for speech path, Analog/Digital (A/D) and Digital/Analog (D/A)
conversion is done by CODEC (Coder and Decoder) in the line circuit card
(termination card). Coding refers to encoding of analog voice to digital form (8 bit, A -
law PCM) through a coder/decoder(codec). Outputs of 32 codecs of each TG, are time
multiplexed to form a 32 channel PCM link of 2.048 Mbps. For every line circuit,
separate Codec is used. This reduces the phenomenon of cross talk.
Hybrid Conversion (2/4 Wire Conversion): The transformer associated with Hybrid
Micro Circuit 2 to 4 - wire conversion circuit ) does 2 to 4 wire (and also 4 to 2 wire)
conversion to give two unidirectional speech paths.
Testing: In order to perform various routine and other tests, metallic access to lines is
provided through Test Access Relay in each and every line circuit.
There are essentially two types of information flowing over the analog lines (1) Voice
Information, and (2) Signalling information. The analog circuitry has to cater for both.
The line circuit card interfaces with TIC card for voice information and with SP card for
signalling information.
In order to get voice data from each line, various signals are generated by TIC towards
the line card. Those are as given below:
(iii) P CLK ( PCM CLOCK): PCM clock of 2.048 MHz from Terminal Interface
Controller enables interface of the line card to generate a 32 channel PCM link.
(iv) SYNC: TIC interface generates a Sync. signal of 8 KHz required by the codec for
voice data sampling. Sync signal indicates the starting of time slot "0, for 32 time slot
PCM serial link.
Signalling information like on - hook, off hook, Ring Trip is detected by the signal
processor when there is a change in the subscriber line status.
Signal processor generates the following control signals towards the line card ( terminal
card)
generates 16 SCS signals - one for each termination card which is selected for 125 micro
seconds (2 m sec/16 ). SCS 1 goes to TC1,SCS2 to TC 2 and so on.
(iii) (SPDIR) SIGNAL PROCESSOR DIRECTION: This signal from signal processor
to terminal cards controls Drive / scan logics (periods ).Every terminal is processed by
signal processor for 15.6 micro seconds. Out of this period during first 3.6
microseconds,SPDIR goes high to drive signal from SP to Terminal Card (Ring/Test
Access/Diagnostics to particular termination from SP). During the remaining 12.0
micro sec., SPDIR goes low to scan subscriber status and to report to signal
processor.
Further four data signals are used for signalling purposes. These signals are time
multiplexed and bidirectional. They are called as:
SCAN A DRIVE A
SCAN B DRIVE B
SCAN C DRIVE C
SCAN D DRIVE D
Scan signals carry information about terminations (ports) during scan operation from
line card (Termination card) to signal processor.
Drive signal carry the information to drive ringing/test access relay control circuits and
come from signal processor to (LCC) Termination card.
(iv) (D CLK) Direction clock: This latches the drive information. It is active for
500 nano seconds.
There are 8 identical subscriber line circuits in the line circuit card. The functional block
diagram is shown in the fig 8.1.
(a) FROM SUBSCRIBER TO EXCHANGE: Tip and Ring wires coming from the
subscriber are connected through the capacitor to the primary of the Hybrid transformer.
Here D.C. is blocked and only A.C voice signal is available on the secondary of the
Hybrid transformer.
of the terminal group. Thus each line card will convert digital voice samples for 8 time
slots in analog form and give analog voice to the respective subscribers.
The incoming PCM voice (Digital Voice ) is given to all the 8 Codecs of the line card but
each Codec convert it into analog form in different time slots. The analog voice signal
goes to 2 to 4 wire converter to convert the signal from uni-directional to bi-directional.
Then the signal is given to secondary of the Hybrid transformer. At the primary of the
Hybrid transformer, the voice signal is super-imposed on D.C. level, present on the line
and is given to the, subscriber via Tip and Ring wires.
8.3.2 SIGNALLING:
(a) D.C. FEED: Line circuit card ( LCC ) uses method of D.C. loop signalling. Carbon
microphone requires D.C. The -48 V battery is fed across the Tip and Ring through
current limiting circuit (CLC) on both the limbs so that the current does not exceed 35 ma
even if Tip and Ring are short circuited.
(b) LINE STATUS SENSING: It is done by the LCDC (Line Condition Detection
Circuit) which monitors the presence or absence of D.C. (Direct Current) in both the
limbs. Line condition detection consists of opto couplers or current sensors which detect
10 - 35 ma as PRESENCE of current and less then 10 ma as ABSENCE of current.
SCAN - A HIGH
SCAN - B HIGH
(ii) OFF - HOOK: When subscriber lifts the hand - set ( goes off - book ),it is
signalled by completion of the D.C. loop. Low resistance is offered and D.C. flows
across Tip and Ring. So the flow of D.C. of 10 - 35 m a, sensed by the opto - couplers
on both the limbs, is interpreted as off - book state.
The status of the Scan A and Scan B line for off - hook is
SCAN - A Low
SCAN - B High
The ring is Fed to a particular subscriber through ringer relay which is operated under
control of TIC and SP. Drive B from signal processor drives ring feed relay driver
circuit for that particular subscriber. The input of the ringer relay is connected to the
ringer bus which carries a 75 V rms 25 Hz ring signal with a fixed cadence (0.4 sec -
ON - 0.2 see - OFF - 0.4 sec. ON - 2 sec. OFF ).
When signal processor selects the line circuit and gives Drive command to feed ring in
A, B, C, D form during the drive period, the line circuit closes the ringer relay. This
connects Tip and Ring to ringer bus and isolates Tip and Ring from Hybrid
Transformer.
Each subscriber line circuit has got independent ringer relay.
In the On - hook state of the subscriber, only AC can flow in the line as. D.C. is
blocked by the capacitor in the subscriber instrument.
When subscriber lifts the handset ( OFF - HOOK ) during ringing the (LCC) line circuit
card trips the ring by using signal processor drive information.
SCAN - A HIGH.
SCAN - B LOW.
On receipt of scan A (high ) and scan B ( Low ),signal processor releases ring feed
relay for tripping the ringing current. This OFF HOOK state is detected by LCDC (Line
Condition Detection Circuit) 'which removes, ringer bus from Tip and Ring and
connects them to Hybrid Transformer.
The capacitor being removed, low resistance is offered allowing D.C. to flow in
subscribers instrument.
For conducting the lines side and exchange side tests, subscriber line is isolated
through TA (Test Access) relay. Drive D is used to control the operation of the TA
relay. Whenever a line circuit receives a Drive D command in A, B, C, D form from
SP, it ( line circuit ) operates its TA relay. On operating, the TA relay separates out the
line and exchange LCC (Line Circuit Card) sides and connects the Tip and Ring
terminal of LCC to two points TLC and RLC (Tip and Ring of Line Circuit) in the (LCT)
Line Card Tester. Now all line and exchange side tests can be performed. The Line
card Tester tests the LCC functions and checks the health of the subscriber lines.
There is a separate TA relay in each line circuit but only one line circuit at a time can
be tested.
8.3.6 DIAGNOSTICS:
A bidirectional multiplexed line, line C (Drive C and scan C) is used for diagnostics.
The state of the C bits at any time contains information about the two copies of 2.048
MHz PCM clock, the copy of the TIC / SN card that the LCC has selected, whether or
not a PCM loop back is in progress and the general health of the Line circuit card.
To ensure continued operation of the system in the event of faults in cards other than
Line circuit card, all signals to the Line circuit card come from two TIC/SN and two SP
cards working in parallel. If either of these two develops a fault, it informs the (LCC)
Line circuit card of its fault through its Hardware Error (HE), Active and passive (A/P)
and WD (Watch Dog) outputs. The LCC selects the other copy of inputs through its 2
to 1 selector and continues to operate on these (inputs). A copy is selected only if HE,
A/P and WD signals are all high for that copy.
Actually all cards except termination cards (Line cards, Trunk cards etc) are duplicated
and are termed as copy " 0 " (passive copy) and copy 1 (Active Copy ). Both copies
will be sending copy selection signals to termination cards but only active copy will be
able to select the termination card. Any time active copy fails, passive copy
immediately becomes active and selects the termination cards. Thus the service will
not be disturbed.
8.3.8 PROTECTION:
The above mentioned protections are provided on all 8 line circuits of the line card.
The LCC gets several power inputs from the back plane (generally known as mother
board) through connector. These are supplied by the PSU 0/1 card. These are:
The ( LCC )Line circuit card receives + 12 v and - 48 v supplies from PSU 1 card of the
unit through back plane connector. +5v and - 5v are generated by using 3 terminal
voltage regulators from input voltage of + 12 V and - 9 V respectively.
Coin collection box card interfaces lines coming from CCB equipment with the
exchange. Each card holds 8 identical line circuits. This card is identical in design to
the line circuit card except that it has provision for Battery reversal also in each of the
CCB line circuit.
Its basic functions are BORSCHT which are similar to those in line circuit card.
Normally battery feed circuit puts - 48 v on Tip and GND on Ring wire. Coin collection
box line card has got a BR (Battery - Reversal ) relay in battery feed portion of the card
when BR relay operates, GND is applied to Tip and - 48 V to ring wire.
CHAPTER 9
9.1 Introduction:
Let us first consider the case of C - DOT 128 P RAX. This exchange is ideal to replace
the small intercom exchanges, which remain unmanned and do not require many
facilities. These have only two types of trunk connections - 2Wire signalling (loop, no
loop) and 4Wire (E & M) signalling.
9.2.0 TWT(Two wire trunk) Card :The block diagram of the TWT card is as shown in fig 9.1
Functions:
TWT is used to establish connections between two Exchanges.
TWT Card caters 8 channels
Each channel is dynamically configurable as either Incoming or Out going or Both
ways through software
Configuration of pins is similar to line card
TWT interfaces with SP for signalling and TIC for voice switching.
Two way Trunk means:
1) It can receive a call when the other exchange seizes the loop to initiate the
call Incoming mode
2) It can seize the loop to initiate the call Out going mode
Both short and long loops can be handled
2 to 4 wire conversion
Coding and Decoding
TIC interface for voice switching
Scan and drive interface Signalling to SP
Copy selection and diagnostics
Protection
Power supply
9.3.0 Working Mode : It is selected by a changeover relay known as Mode change over relay.
When this relay is activated the trunk circuit goes into Outgoing mode. Normally it is
kept on Incoming mode.
9.3.1 Incoming Mode : Battery is fed through current limiting circuit in each limb.
Battery is fed through current limiting circuits in each line. Two Opto current sensors are
provided on the DC loop path, one each on ring and tip limbs to monitor the status of the
trunk.
9.3.2 Outgoing Mode : It extends loop to seize the incoming selector juncture of the distant
exchange. Sends decadic pulses over junction.
In outgoing mode, there are 2 drive points for trunk. The first drive point is meant for
offering loop and outgoing pulsing. When the trunk is set to outgoing mode a 30Kohm
resistance is introduced in series with the loop. This resistance is by passed by means of
a switch, so that full loop current stays flowing, normal current sensor is activated and
the loop is seized.
The 2W trunk (TWT) card interconnects C - DOT exchanges with 2Wire trunk, working
on loop basis and so can directly be connected to a Strowger Exchange or to OKI
exchange etc. There are 8 circuits per card, each one of which can be programmed as
either incoming, outgoing or both way circuit. Thus the C - DOT 128P RAX can be
connected to 4 lines of one Exchange and 4 lines of another exchange by using one
TWT card. I/C (incoming) trunk reverses polarity to acknowledge seizure of the trunk.
9.4.0 E and M Trunk circuit card: The block diagram of E&M trunk card is as shown below
9.4.1 INTRODUCTION:
The 4Wire (E & M) trunk card is used to interface the RAX to another Exchange through
carrier equipment. It can be connected to OKI exchange via ODBWTDE card and ARIA
exchange via EMIB card.
E&M four wire trunk card is an extension interface between the switching
system and the E&M trunk lines leading to another exchange.
It carries the signals of the trunk condition through two different leads called
E&M (Ear and Mouth)
E Lead carries signals to the switching system.
M Lead sends signals from the switching system to the other exchange.
The two leads are connected to the trunk lines through a carrier equipment
(or trunk signalling equipment) which decodes the DC signalling conditions
into out band signalling with a specified (3825Hz) tone.
The carrier equipments transmit the voice and signalling conditions through a
single line.
One EMF card occupies eight ports of the switching system as it caters for
eight E&M 4 wire trunks.
Chapter 10
CDOT-128 P PBX
PBX stands for Private Branch Exchange.
The public network lines for a PBX may be local/STD/ISD lines from any PSTN. The
extensions may be served by a conventional analogue telephone network.
10.1.0 The block diagram of the C DOT 128 P PBX is shown in fig.10.1
MDF
1
32 channels 0
TG 0
S/N
TG 1
TRUNK
TG 2
TG 3
1
1
0
1
Operator /
0 0
PSU SP TIC Maintenance
Console
1)TG(Terminal group): C-DOT 128 P PBX has three types of voice terminal
interfaces. The interface with extensions also referred to as subscriber line interface ,
the interface with the central office trunks (CO) also referred as junction line interface
IRISET 61 DIGITAL EXCHANGE C-DOT
C DOT 128 P PBX
and tie line interface used to connect other PBXs. Each terminal card caters to 8
terminations, and has one CODEC per termination. Four cards together put out digital
PCM voice onto a 32 channel time multiplexed link. This link terminates onto both
copies of the switching network (SN) and represents a Terminal Group. The TG
consists extension line circuit/tie line circuit/DTMF dialing circuit/Conferencing circuit.
2)SP card : The Signal Processor Card performs the function of,
Receiving supervisory (on-hook/off-hook/hook switch flash) signals and decadic dial
pulses on extension DC loops.
Controlling ringing towards extensions and providing automatic ring-trip when
extension goes off-hook.
Recognizing incoming ring on ring-down Central office trunks (junctions).
Controlling out pulsing on outgoing calls.
SP card interfaces with terminal cards and TIC just similar to the SP card in C-DOT
128P RAX.
3) TIC/SN : TIC/SN contains the central control and switching network of the exchange. It is
the main processor and the complete exchange data is stored in this card. Switching
controls for speech paths are generated here and distributed to terminal cards. A non
blocking time switch with stored program control is used to achieve switching.
This TIC/SN card is not similar to the TIC/SN card used in C-DOT 128p RAX. The new
versions of PBX refers this TIC/SN card as XSC card (Expandable Switching Control).
This card performs the function of both RCP and TIC/SN of C-DOT 128P RAX.
4)PSU card : This is just similar to the PSU card used in C-DOT 128P RAX. This produces
different voltages like 48V, +5V, +12V, -9V and 75V AC required for the working of
the exchange.
This Operator console is provided with a handset used for voice communication between
Operator and system users. No DC signaling is done over this line. All digits and off/on
hook signals are simulated via command keys from the key board. The Operator console
handset terminates like any extension on the terminal card.
All terminations (extensions, central office trunks and data lines etc) are interfaced to
the Switching Network through terminal interfaces called Terminal cards. It is here that
the analog to digital conversion and formation of 64 kbps PCM channels for voice are
achieved. A time division multiplexing (TDM) is performed over 32 such (64 kbps)
channels to generate a PCM 32 line with a bit rate of 2.048 million bits per second.
Four such PCM 32 links representing all the 128 terminations, are connected to the
switching network (SN) of the system.
The switching network (SN) consists of a secondary multiplexing of the PCM 32 links
(to form a 128 channel link at 8 Mbps), a non-blocking Time slot Interchanger and the
demultiplexing of the resultant PCM 128 channel link to (four PCM 32 links which carry
switched information back toward the terminals).
The data bits from each terminal form another Time Multiplexed link, on which data
from each terminal can exist at 8 kbps. The switching of data bits (between terminals
already interconnected for speech) takes place in the Switching Network. Thus, the
data path and voice path are established between the same set of terminals at no
additional effort on part of the subscriber.
The non-blocking nature of the Switching Network allows for high traffic handling
capacity, ie. Every terminal is guaranteed a path to a free destination terminal.
Signaling information (origination detection, dialed digits collection, Central office ring
detection, etc) is separated at the terminal cards and is sent to the Signal Processor
Card (SPC), on a time multiplexed PCM link. The SPC processes the information and
passes it on to the Terminal Interface Controller (TIC).
The TIC is a microprocessor based unit which handles the Call Processing
maintenance and administration functions. Signaling information which is formatted by
the SPC is analysed by the TIC. The TIC having derived the identities of the calling
and the called terminals, establishes a path by connecting the two through Switching
Network.
C DOT 128 P is housed in a cabinet. The front of the cabinet has a hinged door. The
sides of the cabinet are enclosed with lift off panels. The cabinet contains one
equipment frame. Each frame has 26 card slot guides. However, a maximum 24
printed circuit boards can be housed in the system. All PCBs have Euro-connectors.
Inter-card connections are made by printed circuit traces on the systems back plane
called the mother board. External, voice and data connections are made on the Main
Distribution Frame (MDF).
P P T J L L L L L L X S D D X S R T L L L C J T P P
S S G U C C C C C C S P T T S P M R C C C O U G S S
U U D N C C C C C C C C A A C C F K C C C N N D U U
F
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
Fig.10.2 Hardware Architecture of C-DOT 128P PBX
The control cards, TGD cards and PSU cards are duplicated for fault tolerant,
uninterrupted service.
Out calls
STD calls
Call if Buffers full
Room Extension
Tie line
Conference
Public Address
Call Forward
DND (others)
DND ( self)
Conference set
ISD call
OG call Q
Executive
Admin Allowed
DTMF facility