Junction Leakage
Junction Leakage
1. Summary
Leakage in reverse biased transistors and diodes includes the effects of carrier generation,
related to residual damage density and location relative to the junction boundary, as well
as structure and bias dependent effects of gate oxide leakage, band-to-band tunneling at
the drain junction and thermionic emission from metal contacts. All of these effects
depend on process conditions, through dependence on dopant activation and profile
shape, junction location and local electric fields. However, only the
generation/recombination current is strongly sensitive to the residual defect density and
location relative to the junction boundaries, which are strongly dependent on implant and
annealing process conditions.
The p-n junction (for example, a p+ top junction with n+ sub-junction doping) leakage
current under reverse bias includes the contributions of diffusion current, Jdiff, space
charge generation current, Jgen, band-to-band tunneling current, Jtun, and thermionic
emission current, Jthem, [1]:
Additional terms for MOS transistors include leakage from gate oxide conductance, as
sketched in Fig. 1.
Well
Substrate
Carrier Thermionic
Recombination Emission
Figure 1. Sketch of leakage mechanisms in p-n junctions and transistors.
Carrier recombination/generation
Carrier recombination leakage, observed under forward bias, is determined primarily by
the sub-junction doping density (which determines the width of the depletion layer) and
the density and location of the residual damage after annealing from the accumulated
damage due to the various implantation cycles. Damage accumulation during
implantation depends on the ion type, target (usually Si), ion energy and dose as well as
process specifics such as the ion beam current and wafer temperature during
implantation. Under reverse bias conditions, defect centers are sources of carrier
generation, with similar amplitude to the recombination rate. The generation current is
described by:
qW qε S ε 0 ( Na + Nd )(Vbi − Vrb )
J gen = σ ⋅ vth ni N = σ ⋅ vth ni N t (2)
2 2N A N D
where Nt, σ are the concentration of recombination centers and their capture cross section
in a depletion region of p-n junction, W is depletion width, vth is thermal velocity of
carriers, q is the charge of the electron, ε0 is permittivity of vacuum, εS is dielectric
constant of silicon, Na, Nd are doping in top and bottom layers of p-n junction, ni is
intrinsic concentration of carriers in silicon, Vbi is build in voltage of p-n junction, , Vrb is
applied reverse bias [2].
The rate of carrier recombination, U(z), in the depleted layer is given by the Shockley-
Read-Hall equation:
⎡ ⎛ qV ⎞ ⎤
σ nσ p vth N t ( z )ni ⎢exp⎜ ⎟ − 1⎥
⎣ ⎝ ⎠
kT⎦ (3)
U ( z) =
⎡ ⎛ ψ − ϕn ⎞ ⎛ E − E i ⎞⎤ ⎡ ⎛ ϕ − ψ ⎞ ⎛ E − Et ⎞⎤
σ n ⎢exp⎜ q ⎟ + exp⎜ t ⎟⎥ + σ p ⎢exp⎜⎜ q ⎟ + exp⎜ q i ⎟⎥
p
⎟
⎣ ⎝ kT ⎠ ⎝ kT ⎠⎦ ⎣⎢ ⎝ kT ⎠ ⎝ kT ⎠⎦⎥
where and V is the JPV, ψ=-Ei/q is the internal potential corresponding to the intrinsic
level, Ei, ϕn , ϕp are the potentials corresponding to quasi-Fermi levels for electrons and
holes, vth, σn ,σp are thermal velocity and the capture cross sections of electrons and
holes, Et, Nt is the energy level and concentration of recombination centers, ni is intrinsic
carrier concentration.
The leakage current is the integral of the recombination rate over the thickness of the
depletion layer:
W
J rec = ∫0
qU ( z ) dz (4)
The recombination profile and leakage current, Io, can be calculated for low photo-
voltage V=ϕn - ϕp << kT/q for an abrupt p-n junction, for the example with a junction
depth, Xj = 100 A, with the residual damage profile described by:
⎡ ( z − z max ) 2 ⎤
N t ( z ) = N t max exp ⎢− ⎥ + N tsub (5)
⎣ ∆2 ⎦
where the peak concentration of recombination sites Ntmax= 1018 traps/cm3 at a depth of
zmax= 200 A, with a trap profile width of ∆ = 150 A, σn ,σp = 10-14 cm2 , Et=Ei, and Ntsub=
1012 traps/cm3 is the concentration of recombination centers in the substrate, much deeper
Comparison of leakage currents in RsL measurements and transistors
January 4, 2006
Page 3 of 9
than zmax. These parameters are descriptive of conditions for a shallow junction formed
in an implanted halo profile. The recombination rate profiles, U(z), for substrate doping
of 1015, 1017 and 1019 dopants/cm3 are shown in Fig. 2. And the integral leakage currents
for three damage density values are shown in Fig. 3 [3].
Figure 2. Recombination rate profiles below a shallow junction (Xj = 100 A) for a model
end-of-range damage profile (dotted line) and substrate doping levels of 1015, 1017 and
1019 dopants/cm3.
Figure 3. Leakage currents as a function of substrate doping for three trap densities.
The increase in junction leakage with increased sub-junction doping and the presence of
residual damage has been clearly illustrated for the case of “diffusionless” anneals at 650
C after Ge pre-amorphization implants and shallow B doping [4].
Carrier diffusion
The carrier diffusion contribution to leakage is given by [1,2]:
D p ni2
J diff = q (6)
τ p NA
τ p = 1 C p N A2 (7)
D p ni2
J diff =q ~ q *ni2* (Dp*Cp)1/2. (8)
τ p NA
For biased transistors with metal junction contacts, the additional leakage mechanisms
include structure-dependent effects of band-to-band tunneling at the drain junction,
thermionic emission from the metal contact and gate-to-channel leakage through the gate
dielectric.
πq 2 mrVrb E g E m
J tun = exp(− E 0 / E m ) (9)
h 3 E0
2ε S ε 0 (Vbi − Vrb ) ⎛ N A + N D ⎞
W (Vrb ) = ⎜⎜ ⎟⎟ (10)
q ⎝ NAND ⎠
Vbi − Vrb
Em ≈ (11)
W
Thermionic emission
Thermionic emission of carriers from metal contacts through shallow junctions depends
on the junction doping level, depth and profile shape, with lower carrier flows for
junctions with abrupt, or box-like, profiles [6]. For practical transistors, the effects of
thermionc emission are minimized by the deeper junctions used for the source/drain
contacts, however this can be a significant issue for measurements with direct contact
probes onto shallow extension junctions.
Additional leakage effects includes surface recombination currents, which are small for
heavily-doped, well-activated surface junctions (but could become more important for
poorly activated junctions, such as those resulting from unsuccessful ms-timescale
anneals), as well as a variety sub-threshold leakage current effects in short-channel
CMOS transistors.
The recombination current amplitude, Io, is measured under forward bias in RsL but is
also equal to the reverse bias leakage of an “ideal” diode dominated by carrier generation.
In the case of RsL, leakage is measured under very small forward bias, V<<kT/q, created
by photo carriers. In this case leakage current includes only contribution of diffusion
current Jdiff and space charge generation current Jgen (operating in this case as a
recombination current):
D p ni2 qε S ε 0 ( Na + Nd )Vbi
J leakRsL = J diff + J gen = q + σ ⋅ v th n i N t . (13)
τ p NA 2N A N D
The effect of trap density, Nt, on leakage current for forward (RsL) and reverse
(transistors) bias is shown in Fig. 4. In this calculation, the surface junction is heavily
doped (so Jdiff is small), the sub-junction doping levels are high (~5x1018 dopants/cm3)
approximating the levels for a halo profile near a SDE junction, and the capture cross-
section is σ ~10-16 cm2. For the reverse bias (assumed to be -1V) case, the main
additional leakage contribution is assumed to be band-to-band tunneling at a level of Jtun
~5x10-4 A/cm2 [5], which sets the leakage current limit for the case of low trap densities.
1 .10
3 Reverse bias
4
1 .10
5
1 .10
6
1 .10
1 .10
7 Forward bias
8
1 .10
14 15 16 17 18 19 20
1 .10 1 .10 1 .10 1 .10 1 .10 1 .10 1 .10
.
Trap concentration per cm3
Fig. 4. Leakage current versus trap concentration for reverse bias (-1 V, red curve) and
forward bias (+50 mV, blue). The reverse bias curve corresponds to leakage current
measurements with diodes and transistors and the weak forward bias case occurs in RsL
measurements.
It is important to note that the strong effect of trap (residual damage) density on leakage
current shown in Fig. 4 is observed for heavily-doped sub-junction regions similar to the
case of SDE junctions formed in halo/well profiles, where the depletion layer thickness,
W, is small (~20 nm). For SDE junctions formed in lightly-doped wafers (~ 10 Ohm-
cm), the depletion layer is large (~1 um) so the main carrier recombination and
generation occurs deep (~ 0.5 um) below the SDE junction and far from the EOR damage
layer [3]. In the lightly-doped substrate case, the recombination leakage current will be
much lower and show little or no dependence on trap density.
References:
[1] S.M. Sze, Physics of Semiconductor Devices.
[2] D. K. Schroder, Semiconductor Material and Device Characterization.
[3] V. N. Faifer et al., Proc. of USJ05, to appear in JVST-B, Jan06.
[4] R. Lindsay et al., JVST B22(1), (2004) 306.
[5] P. M. Solomon, et al., IEDM03.
[6] E. C. Jones, N. W. Cheung, JVST B14(1), (1996) 236.