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Gujarat Technological University: Instructions

This document is an exam for the subject Digital Logic Design. It contains 5 questions worth a total of 70 marks. Question 1 asks to convert decimal numbers to various bases. Question 2 offers two parts, either designing a full subtractor from a full adder or a BCD to excess-3 converter. Question 3 offers two parts, either simplifying a Boolean function using K-maps or explaining the tabulation method. Question 4 offers two parts on counter design using T flip-flops or explaining a BCD ripple counter. Question 5 offers two parts on explaining microoperations or distinguishing microprogram and hardwired control.

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43 views1 page

Gujarat Technological University: Instructions

This document is an exam for the subject Digital Logic Design. It contains 5 questions worth a total of 70 marks. Question 1 asks to convert decimal numbers to various bases. Question 2 offers two parts, either designing a full subtractor from a full adder or a BCD to excess-3 converter. Question 3 offers two parts, either simplifying a Boolean function using K-maps or explaining the tabulation method. Question 4 offers two parts on counter design using T flip-flops or explaining a BCD ripple counter. Question 5 offers two parts on explaining microoperations or distinguishing microprogram and hardwired control.

Uploaded by

mkollam
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Seat No.: ________ Enrolment No.

___________

GUJARAT TECHNOLOGICAL UNIVERSITY


B. E. - SEMESTER III EXAMINATION WINTER 2012

Subject code: 130701 Date: 04-01-2013


Subject Name: Digital Logic Design
Time: 10.30 am 01.00 pm Total Marks: 70
Instructions:
1. Attempt all questions.
2. Make suitable assumptions wherever necessary.
3. Figures to the right indicate full marks.

Q.1 Convert the decimal number 250.5 to base 3, base 4, base 7, base 8 and 14
base 16

Q.2 (a) Show how a full-adder can be converted to a full-subtractor with the 07
addition of one inverter circuit.
(b) Design a combinational circuit with four input lines that represent a 07
decimal digit in BCD and four output lines that generate the 9s
complement of the input digit.
OR
(b) Construct 4x16 decoder with two 3x8 decoders. 07

Q.3 (a) Find the complement of the following Boolean function and reduce to a 07
minimum number of literals.
BD + ABC + ACD + ABC
(b) Obtain the simplified expressions in sum of products using K-map: xz 07
+ wxy + w(xy + xy)
OR
Q.3 (a) Simplify the following Boolean function by means of the tabulation 07
method:
F(A,B,C,D,E,F,G) = (20,28,38,39,52,60,102,103,127)
(b) Explain JK Flipflop. What is the disadvantage of it and how it can be 07
eliminated?

Q.4 (a) Design a counter with the following binary sequence: 07


0, 1, 3, 7, 6, 4 and repeat. Use T flipflop.
(b) Explain BCD Ripple counter and draw its logic diagram and timing 07
diagram.
OR
Q.4 (a) Explain in detail bidirectional shift register with parallel load. 07
Q.4 (b) Explain PLA with necessary diagrams. 07

Q.5 Explain arithmetic, logic and shift microoperations in detail. 14


OR
Q.5 (a) Explain bus organization for four processor register and ALU connected 07
through common buses.
(b) Distinguish between microprogram control and hard-wired control. 07

*************

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