Conversion of Negative Numbers to Binary Numbers

 Sign Magnitude
 Sign magnitude (sometimes also referred to as sign modulus) is the easiest
of the methods we may use.
 With sign magnitude we designate one of the bits (usually the far left, also
known as the most significant bit) to indicate whether a number is positive or
negative. Usually a '0' indicates the number is positive and a '1' indicates the
number is negative.
 Mathematical numbers are generally made up of a sign and a value
(magnitude) in which the sign indicates whether the number is positive, ( + )
or negative, ( – ) with the value indicating the size of the number, for example
23, +156 or -274. Presenting numbers is this fashion is called “sign-
magnitude” representation since the left most digit can be used to indicate
the sign and the remaining digits the magnitude or value of the number.
 Sign-magnitude notation is the simplest and one of the most common
methods of representing positive and negative numbers either side of zero,
(0). Thus negative numbers are obtained simply by changing the sign of the
corresponding positive number as each positive or unsigned number will
have a signed opposite, for example, +2 and -2, +10 and -10, etc.
 But how do we represent signed binary numbers if all we have is a bunch of
one’s and zero’s. We know that binary digits, or bits only have two values,
either a “1” or a “0” and conveniently for us, a sign also has only two values,
being a “+” or a “–“.
 Then we can use a single bit to identify the sign of a signed binary number as
being positive or negative in value. So to represent a positive binary number
(+n) and a negative (-n) binary number, we can use them with the addition of
a sign.
 For signed binary numbers the most significant bit (MSB) is used as the sign
bit. If the sign bit is “0”, this means the number is positive in value. If the sign
bit is “1”, then the number is negative in value. The remaining bits in the
number are used to represent the magnitude of the binary number in the
usual unsigned binary number format way.
 Then we can see that the Sign-and-Magnitude (SM) notation stores positive
and negative values by dividing the “n” total bits into two parts: 1 bit for the
sign and n–1 bits for the value which is a pure binary number. For example,
the decimal number 53 can be expressed as an 8-bit signed binary number
as follows.
 The largest number we may represent (With a given number of bits is
effectively halved. This is because there are still the same number of
combinations of 1's and 0's but now half of them are given to representing
 negative numbers. In fact, with sign magnitude we actually have just under
half because zero may be represented as either 1000000 or 00000000. With
unsigned (or no negative numbers) with 8 bits we have:
00000000 - representing 0, the smallest number possible.
11111111 - representing 255, the largest number possible.
For a total of 256 possible numbers represented.
For Sign Magnitude
11111111 - representing -127, the smallest number possible.
10000000 - representing 0.
00000000 - also representing 0.
01111111 - representing 127, the largest possible number.
For a total of 255 possible numbers represented.
Positive Signed Binary Numbers

Negative Signed Binary Numbers

 The disadvantage here is that whereas before we had a full range n-

bit unsigned binary number, we now have an n-1 bit signed binary number
giving a reduced range of digits from:
 -2(n-1) to +2(n-1)
Signed Binary Numbers Example No1
Convert the following decimal values into signed binary numbers using the sign-
magnitude format:
-1510 as a 6-bit number ⇒ 1011112

+2310 as a 6-bit number ⇒ 0101112

-5610 as a 8-bit number ⇒ 101110002

+8510 as a 8-bit number ⇒ 010101012

-12710 as a 8-bit number ⇒ 111111112
Note that for a 4-bit, 6-bit, 8-bit, 16-bit or 32-bit signed binary number all the bits MUST
have a value, therefore “0’s” are used to fill the spaces between the leftmost sign bit and
the first or highest value “1”.
The sign-magnitude representation of a binary number is a simple method to use and
understand for representing signed binary numbers, as we use this system all the time
with normal decimal (base 10) numbers in mathematics. Adding a “1” to the front of it if
the binary number is negative and a “0” if it is positive.

 1's Complement of a Signed Binary Number

 One’s Complement or 1’s Complement as it is also termed, is another
method which we can use to represent negative binary numbers in a signed
binary number system. In one’s complement, positive numbers (also known
as non-complements) remain unchanged as before with the sign-magnitude
numbers.
 Negative numbers however, are represented by taking the one’s complement
(inversion, negation) of the unsigned positive number. Since positive
numbers always start with a “0”, the complement will always start with a “1” to
indicate a negative number.
 1's Complement is the next step on from sign magnitude. Similar to sign
magnitude the most siginificant bit indicates the sign of the number. For
negative numbers, however, we invert the bits from what they would normally
be. Let's look at an example (again with 8 bits):
For sign magnitude:
4 would be represented as : 00000100
-4 would be represented as : 100000100
With 1's Complement we have:
4 would be represented as : 00000100
-4 would be represented as : 11111011
 1’s Complement Using Inverters
  Then we can see that it is very easy to find the one’s complement of a binary
number N as all we need do is simply change the 1’s to 0’s and the 0’s to 1’s
to give us a -N equivalent. Also just like the previous sign-magnitude
representation, one’s complement can also have n-bit notation to represent
numbers in the range from: -2(n-1) and +2(n-1) – 1. For example, a 4-bit
representation in the one’s complement format can be used to represent
decimal numbers in the range from -7 to +7 with two representations of
zero: 0000 (+0) and 1111 (-0) the same as before.
 2's Complement of a Signed Binary Number
 Two’s Complement or 2’s Complement as it is also termed, is another
method like the previous sign-magnitude and one’s complement form, which
we can use to represent negative binary numbers in a signed binary number
system. In two’s complement, the positive numbers are exactly the same as
before for unsigned binary numbers. A negative number, however, is
represented by a binary number, which when added to its corresponding
positive equivalent results in zero.
 In two’s complement form, a negative number is the 2’s complement of its
positive number with the subtraction of two numbers being A – B = A + ( 2’s
complement of B )using much the same process as before as basically, two’s
complement is one’s complement + 1.
 The main advantage of two’s complement over the previous one’s
complement is that there is no double-zero problem plus it is a lot easier to
generate the two’s complement of a signed binary number. Therefore,
arithmetic operations are relatively easier to perform when the numbers are
represented in the two’s complement format.

4-bit Signed Binary Number Comparison

Signed Signed One’s Signed Two’s

Decimal
Magnitude Complement Complement

+7 0111 0111 0111

+6 0110 0110 0110

+5 0101 0101 0101

+4 0100 0100 0100

+3 0011 0011 0011

+2 0010 0010 0010

+1 0001 0001 0001

+0 0000 0000 0000

-0 1000 1111 –

-1 1001 1110 1111

-2 1010 1101 1110

-3 1011 1100 1101

-4 1100 1011 1100

-5 1101 1010 1011

-6 1110 1001 1010

-7 1111 1000 1001

 Signed-complement forms of binary numbers can use either 1’s complement or

2’s complement. The 1’s complement and the 2’s complement of a binary
number are important because they permit the representation of negative
numbers.
 The method of 2’s complement arithmetic is commonly used in computers to
handle negative numbers the only disadvantage is that if we want to represent
negative binary numbers in the signed binary number format, we must give up
some of the range of the positive number we had before.
ELEMENTS OF DIGITAL COMMUNICATION SYSTEMS
A. The figure 1.2 shows the functional elements of a digital communication system.
Source of Information:
1. Analog Information Sources.
2. Digital Information Sources.
Analog Information Sources → Microphone actuated by a speech, TV Camera
scanning a scene, continuous amplitude signals.
Digital Information Sources → These are teletype or the numerical output of
computer
which consists of a sequence of discrete symbols or letters.
An Analog information is transformed into a discrete information through the
process of sampling and quantizing.
Digital Communication System

B. SOURCE ENCODER / DECODER:

The Source encoder ( or Source coder) converts the input i.e. symbol sequence
into a binary sequence of 0’s and 1’s by assigning code words to the symbols in
the input sequence. For eg. :-If a source set is having hundred symbols, then the
number of bits used to represent each symbol will be 7 because 27=128 unique
combinations are available. The important parameters of a source encoder are
block size, code word lengths, average data rate and the efficiency of the coder
(i.e. actual output data rate
compared to the minimum achievable rate)
At the receiver, the source decoder converts the binary output of the channel
decoder into a symbol sequence. The decoder for a system using fixed – length
code words is quite simple, but the decoder for a system using variable – length
code words will be very complex.
Aim of the source coding is to remove the redundancy in the transmitting
 information, so that bandwidth required for transmission is minimized. Based on
the probability of the symbol code word is assigned. Higher the probability,
shorter is the codeword.
Ex: Huffman coding.
C. CHANNEL ENCODER / DECODER:
Error control is accomplished by the channel coding operation that consists of
systematically adding extra bits to the output of the source coder. These extra
bits do not convey any information but helps the receiver to detect and / or
correct some of the errors in the information bearing bits.
There are two methods of channel coding:
1. Block Coding: The encoder takes a block of ‘k’ information bits from the
source encoder and adds ‘r’ error control bits, where ‘r’ is dependent on ‘k’ and
error control capabilities desired.
2. Convolution Coding: The information bearing message stream is encoded in
a continuous fashion by continuously interleaving information bits and error
control bits.
The Channel decoder recovers the information bearing bits from the coded
binary stream.
Error detection and possible correction is also performed by the channel
decoder.
The important parameters of coder / decoder are: Method of coding, efficiency,
error control capabilities and complexity of the circuit.
D. MODULATOR:
The Modulator converts the input bit stream into an electrical waveform suitable
for transmission over the communication channel. Modulator can be effectively
used to minimize the effects of channel noise, to match the frequency spectrum
of transmitted signal with channel characteristics, to provide the capability to
multiplex many signals.
E. DEMODULATOR:
The extraction of the message from the information bearing waveform produced
by the modulation is accomplished by the demodulator. The output of the
demodulator is bit stream. The important parameter is the method of
demodulation.
F. CHANNEL:
The Channel provides the electrical connection between the source and
destination. The different channels are: Pair of wires, Coaxial cable, Optical fibre,
Radio channel, Satellite channel or combination of any of these. The
communication channels have only finite Bandwidth, non-ideal frequency
response, the signal often suffers amplitude and phase distortion as it travels
over the channel. Also, the signal power decreases due to the attenuation of the
channel. The signal is corrupted by unwanted, unpredictable electrical signals
referred to as noise.
The important parameters of the channel are Signal to Noise power Ratio (SNR),
usable bandwidth, amplitude and phase response and the statistical properties of
noise.

Some additional blocks as shown in the block diagram are used in most of
digital communication system:
 Encryptor: Encryptor prevents unauthorized users from understanding the
messages and from injecting false messages into the system.
 MUX : Multiplexer is used for combining signals from different sources so that
they share a portion of the communication system.
 DeMUX: DeMultiplexer is used for separating the different signals so that they
reach their respective destinations.
 Decryptor: It does the reverse operation of that of the Encryptor.
Synchronization: Synchronization involves the estimation of both time and
frequency
coherent systems need to synchronize their frequency reference with carrier in
both
frequency and phase.
PCM [Pulse Code Modulation]
PCM is an important method of analog –to-digital conversion. In this modulation
the analog signal is converted into an electrical waveform of two or more levels. A
simple two level waveform is shown in fig 3.1.

The PCM system block diagram is shown in fig 3.2. The essential operations in the
transmitter of a PCM system are Sampling, Quantizing and Coding. The Quantizing and
encoding operations are usually performed by the same circuit, normally referred to as
analog to digital converter.
The essential operations in the receiver are regeneration, decoding and
demodulation of the quantized samples. Regenerative repeaters are used to reconstruct
the transmitted sequence of coded pulses in order to combat the accumulated effects of
signal distortion and noise.
PCM Transmitter:
Basic Blocks:
1. Anti aliasing Filter
2. Sampler
3. Quantizer
4. Encoder
An anti-aliasing filter is basically a filter used to ensure that the input signal to sampler is
free from the unwanted frequency components.
For most of the applications these are low-pass filters. It removes the frequency
components of the signal which are above the cutoff frequency of the filter. The cutoff
frequency of the filter is chosen such it is very close to the highest frequency component
of the signal.
Sampler unit samples the input signal and these samples are then fed to the Quantizer
which outputs the quantized values for each of the samples. The quantizer output is fed
to an encoder which generates the binary code for every sample. The quantizer and
encoder together is called as analog to digital converter.
Differential Pulse Code Modulation (DPCM)
For the signals which does not change rapidly from one sample to next sample, the
PCM scheme is not preferred. When such highly correlated samples are encoded the
resulting encoded signal contains redundant information. By removing this redundancy
before encoding an efficient coded signal can be obtained. One of such scheme is the
DPCM technique. By knowing the past behavior of a signal up to a certain point in time,
it is possible to make some inference about the future values. The transmitter and
receiver of the DPCM scheme is shown in the fig3.12 and fig 3.13
respectively. Transmitter: Let x(t) be the signal to be sampled and x(nTs) be it’s
samples. In this scheme the input to the quantizer is a signal

where x^(nTs) is the prediction for unquantized sample x(nTs). This predicted value is
produced by using a predictor whose input, consists of a quantized versions of the input
signal x(nTs). The signal e(nTs) is called the prediction error.
By encoding the quantizer output, in this method, we obtain a modified version of the
PCM called differential pulse code modulation (DPCM).

The receiver consists of a decoder to reconstruct the quantized error signal. The
quantized version of the original input is reconstructed from the decoder output using
the same predictor as used in the transmitter. In the absence of noise the encoded
signal at the receiver input is identical to the encoded signal at the transmitter output.
Correspondingly the receive output is equal to u(nTs), which differs from the input x(nts)
only by the quantizing error q(nTs).
Prediction Gain ( Gp):
The output signal-to-quantization noise ratio of a signal coder is defined as
DPCM Transmitter
The DPCM Transmitter consists of Quantizer and Predictor with two summer circuits.
Following is the block diagram of DPCM transmitter.

The signals at each point are named as − x(nTs)x(nTs) is the sampled input
xˆ(nTs)x^(nTs) is the predicted sample e(nTs)e(nTs) is the difference of sampled input
and predicted output, often called as prediction error v(nTs)v(nTs) is the quantized
output u(nTs)u(nTs) is the predictor input which is actually the summer output of the
predictor output and the quantizer output.
The predictor produces the assumed samples from the previous outputs of the
transmitter circuit. The input to this predictor is the quantized versions of the input
signal x(nTs)x(nTs).
Quantizer Output is represented as − v(nTs)=Q[e(nTs)]v(nTs)=Q[e(nTs)]
=e(nTs)+q(nTs)=e(nTs)+q(nTs)
Where q (nTs) is the quantization error
Predictor input is the sum of quantizer output and predictor output,
u(nTs)=xˆ(nTs)+v(nTs)u(nTs)=x^(nTs)+v(nTs)
u(nTs)=xˆ(nTs)+e(nTs)+q(nTs)u(nTs)=x^(nTs)+e(nTs)+q(nTs)
u(nTs)=x(nTs)+q(nTs)u(nTs)=x(nTs)+q(nTs)
The same predictor circuit is used in the decoder to reconstruct the original input.
DPCM Receiver
The block diagram of DPCM Receiver consists of a decoder, a predictor, and a summer
circuit. Following is the diagram of DPCM Receiver.

The notation of the signals is the same as the previous ones. In the absence of noise,
the encoded receiver input will be the same as the encoded transmitter output.
As mentioned before, the predictor assumes a value, based on the previous outputs.
The input given to the decoder is processed and that output is summed up with the
output of the predictor, to obtain a better output.
Delta Modulation (DM)
Delta Modulation is a special case of DPCM. In DPCM scheme if the base band signal
is sampled at a rate much higher than the Nyquist rate purposely to increase the
correlation between adjacent samples of the signal, so as to permit the use of a simple
quantizing strategy for constructing the encoded signal, Delta modulation (DM) is
precisely such as scheme. Delta Modulation is the one-bit (or two-level) versions of
DPCM.
DM provides a staircase approximation to the over sampled version of an input base
band signal. The difference between the input and the approximation is quantized into
only two levels, namely, ±δ corresponding to positive and negative differences,
respectively, Thus, if the approximation falls below the signal at any sampling epoch, it
is increased by δ. Provided that the signal does not change too rapidly from sample to
sample, we find that the stair case approximation remains within ±δ of the input signal.
The symbol δ denotes the absolute value of the two representation levels of the one-bit
quantizer used in the DM. These two levels are indicated in the transfer characteristic of
Fig 3.14. The step size  of the quantizer is related to δ by
Let the input signal be x(t) and the staircase approximation to it is u(t). Then, the basic
principle of delta modulation may be formalized in the following set of relations:
In the receiver, shown in fig.3.16, the stair case approximation u(t) is reconstructed by
passing the incoming sequence of positive and negative pulses through an accumulator
in
a manner similar to that used in the transmitter. The out-of –band quantization noise in
the high frequency staircase waveform u(t) is rejected by passing it through a low-pass
filter with a band-width equal to the original signal bandwidth.
Delta modulation offers two unique features:
1. No need for Word Framing because of one-bit code word.
2. Simple design for both Transmitter and Receiver

Features of Delta Modulation

Following are some of the features of delta modulation.
An over-sampled input is taken to make full use of the signal correlation.
The quantization design is simple.
The input sequence is much higher than the Nyquist rate.
The quality is moderate.
The design of the modulator and the demodulator is simple.
The stair-case approximation of output waveform.
The step-size is very small, i.e., Δ (delta).
The bit rate can be decided by the user.
This involves simpler implementation.
Delta Modulation is a simplified form of DPCM technique, also viewed as 1-bit DPCM
scheme. As the sampling interval is reduced, the signal correlation will be higher.
Delta Modulator
The Delta Modulator comprises of a 1-bit quantizer and a delay circuit along with two
summer circuits. Following is the block diagram of a delta modulator.

The predictor circuit in DPCM is replaced by a simple delay circuit in DM.

From the above diagram, we have the notations as −
x(nTs)x(nTs) = over sampled input
ep(nTs)ep(nTs) = summer output and quantizer input
eq(nTs)eq(nTs) = quantizer output = v(nTs)v(nTs)
xˆ(nTs)x^(nTs) = output of delay circuit
u(nTs)u(nTs) = input of delay circuit
Using these notations, now we shall try to figure out the process of delta modulation.
ep(nTs)=x(nTs)−xˆ(nTs)ep(nTs)=x(nTs)−x^(nTs)
---------equation 1
=x(nTs)−u([n−1]Ts)=x(nTs)−u([n−1]Ts)
=x(nTs)−[xˆ[[n−1]Ts]+v[[n−1]Ts]]=x(nTs)−[x^[[n−1]Ts]+v[[n−1]Ts]]
---------equation 2
Further,
v(nTs)=eq(nTs)=S.sig.[ep(nTs)]v(nTs)=eq(nTs)=S.sig.[ep(nTs)]
---------equation 3
u(nTs)=xˆ(nTs)+eq(nTs)u(nTs)=x^(nTs)+eq(nTs)
Where,
xˆ(nTs)x^(nTs) = the previous value of the delay circuit
eq(nTs)eq(nTs) = quantizer output = v(nTs)v(nTs)
Hence,
u(nTs)=u([n−1]Ts)+v(nTs)u(nTs)=u([n−1]Ts)+v(nTs)
---------equation 4
Which means,
The present input of the delay unit
= (The previous output of the delay unit) + (the present quantizer output)
Assuming zero condition of Accumulation,
u(nTs)=S∑j=1nsig[ep(jTs)]u(nTs)=S∑j=1nsig[ep(jTs)]
Accumulated version of DM output = ∑j=1nv(jTs)∑j=1nv(jTs)
---------equation 5
Now, note that
xˆ(nTs)=u([n−1]Ts)x^(nTs)=u([n−1]Ts)
=∑j=1n−1v(jTs)=∑j=1n−1v(jTs)
---------equation 6
Delay unit output is an Accumulator output lagging by one sample.
From equations 5 & 6, we get a possible structure for the demodulator.
A Stair-case approximated waveform will be the output of the delta modulator with the
step-size as delta (Δ). The output quality of the waveform is moderate.
Delta Demodulator
The delta demodulator comprises of a low pass filter, a summer, and a delay circuit.
The predictor circuit is eliminated here and hence no assumed input is given to the
demodulator.
Following is the diagram for delta demodulator.
From the above diagram, we have the notations as −
vˆ(nTs)v^(nTs) is the input sample
uˆ(nTs)u^(nTs) is the summer output
x¯(nTs)x¯(nTs) is the delayed output
A binary sequence will be given as an input to the demodulator. The stair-case
approximated output is given to the LPF.
Low pass filter is used for many reasons, but the prominent reason is noise elimination
for out-of-band signals. The step-size error that may occur at the transmitter is
called granular noise, which is eliminated here. If there is no noise present, then the
modulator output equals the demodulator input.
Advantages of DM Over DPCM
1-bit quantizer
Very easy design of the modulator and the demodulator
However, there exists some noise in DM.
Slope Over load distortion (when Δ is small)
Granular noise (when Δ is large)
Adaptive Delta Modulation (ADM)
In digital modulation, we have come across certain problem of determining the step-
size, which influences the quality of the output wave.
A larger step-size is needed in the steep slope of modulating signal and a smaller
stepsize is needed where the message has a small slope. The minute details get
missed in the process. So, it would be better if we can control the adjustment of step-
size, according to our requirement in order to obtain the sampling in a desired fashion.
This is the concept of Adaptive Delta Modulation.
Following is the block diagram of Adaptive delta modulator.
The gain of the voltage controlled amplifier is adjusted by the output signal from the
sampler. The amplifier gain determines the step-size and both are proportional.
ADM quantizes the difference between the value of the current sample and the
predicted value of the next sample. It uses a variable step height to predict the next
values, for the faithful reproduction of the fast varying values.
Adaptive Delta Modulation
The performance of a delta modulator can be improved significantly by making the step
size of the modulator assume a time-varying form. In particular, during a steep segment
of the input signal the step size is increased. Conversely, when the input signal is
varying
slowly, the step size is reduced. In this way, the size is adapted to the level of the input
signal. The resulting method is called adaptive delta modulation (ADM).
There are several types of ADM, depending on the type of scheme used for adjusting
the
step size. In this ADM, a discrete set of values is provided for the step size. Fig.3.17
shows the block diagram of the transmitter and receiver of an ADM System.
In practical implementations of the system, the step size