Abstract— Modular multilevel converter (MMC) is one of the low (dv/dt), superior harmonic performance, uses a low
most promising topologies for medium to high-voltage high- cost and low-voltage semiconductor technology, generates an
power applications. The main features of MMC are modularity, output current with a smaller ripple, requires a smaller size
voltage and power scalability, fault tolerant and transformer-less
operation, and high-quality output waveforms. Over the past of input and output filter (if necessary), high-efficiency, and
few years, several research studies are conducted to address the generates low common-mode voltage (CMV) [6]–[8].
technical challenges associated with the operation and control of The integrated multilevel converters are commercially
the MMC. This paper presents the development of MMC circuit available with a voltage rating of 2.3–4.16 kV [9]. Moreover,
topologies and their mathematical models over the years. Also, these converters require significant modifications to increase
the evolution and technical challenges of the classical and model
predictive control methods are discussed. Finally, the MMC their operating voltage and output voltage levels, which is
applications and their future trends are presented. not cost-effective [10]–[14]. Further, these converters should
be shut down during the faults and device failures, which
Index Terms— Capacitor voltage ripple, circulating currents,
high-power converters, high-voltage direct current (HVdc) leads to a significant loss of production in the industrial
transmission, medium-voltage motor drive, model predictive process [15]–[18]. On the other hand, the multicell converters
control (MPC), modular multilevel converters (MMCs), multi- are constructed with a cascade connection of low-power
level converters, power quality, pulsewidth modulation (PWM), submodules (SMs). These converters are suitable for the
submodule (SM) capacitor voltage control. fault tolerant operation as well. The operating voltage of
I. I NTRODUCTION multicell converters can be increased by adding the SMs
in each phase [19]. The commercially available multicell
T HE high-power voltage source converters (VSCs) have
higher market penetration and more evident develop-
ments compared with the current source and the matrix
converters are shown in Fig. 1. Among them, the cascaded
H-bridge (CHB) and H-bridge neutral-point clamped (HNPC)
converters [1]–[5]. Over the past few years, several VSCs are converters require a phase-shifting transformer with multiple
developed and their classification is shown in Fig. 1. Among secondary windings to generate the isolated dc source for
them, very few topologies are commercially available in the each SM. The phase-shifting transformer increases the
form of customized and standard products. The high-power physical size and cost of the converter system. Hence, their
multilevel converters have significant advantages compared operating voltage is limited to 6–13.8 kV [20], [21].
with the two-level converters. Some of the advantages are Recently, the modular multilevel converter (MMC) has
been developed to address the problems associated with the
Manuscript received February 11, 2017; revised May 15, 2017 and CHB and HNPC topologies. The MMC also belongs to
July 23, 2017; accepted August 10, 2017. Date of publication August 21, the multicell converter family, and it was first introduced
2017; date of current version October 30, 2017. This work was supported in
part by the Fondecyt Iniciación 2016 under Project 11160227 and in part by by Prof. R. Marquardt in 2001 for high-voltage applications
the Advanced Center for Electrical and Electronics Engineering AC3E under such as the high-voltage direct current (HVdc) transmission
Grant CONICYT/FB0008. Recommended for publication by Associate Editor systems [22]–[25]. This topology is further extended to other
Jon A. Suul. (Corresponding author: Apparao Dekka.)
A. Dekka and B. Wu are with the Department of Electrical and Computer applications such as medium-voltage motor drives and power
Engineering, Ryerson University, Toronto, ON M5B 2K3, Canada (e-mail: quality improvement [26]–[28].
dapparao@ieee.org; bwu@ee.ryerson.ca). Each application of MMC requires a control scheme to
R. L. Fuentes is with the Department of Environment and Energy,
Universidad Católica de la Santísima Concepción, Concepción 4090541, Chile meet several objectives such as SM capacitor voltage control,
(e-mail: ricardolizana@ucsc.cl). output current control, minimization of circulating currents,
M. Perez is with the Department of Electronics, Universidad Técnica Fed- and the reduction of SM capacitor voltage ripple. Earlier,
erico Santa Maria, Valparaíso 110-V, Chile (e-mail: marcelo.perez@usm.cl).
N. R. Zargari is with the Medium Voltage R&D Department, the open-loop classical control strategy is presented in [29].
Rockwell Automation, Cambridge, ON N1R 5X1, Canada (e-mail: In this method, the imposed modulation indices are calculated
nrzargari@ra.rockwell.com). from the required input and output voltages. Later, the closed-
Color versions of one or more of the figures in this paper are available
online at http://ieeexplore.ieee.org. loop classical control methods in the stationary-abc and the
Digital Object Identifier 10.1109/JESTPE.2017.2742938 synchronous-dq frames are developed [30]. The performance
2168-6777 © 2017 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
1632 IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, VOL. 5, NO. 4, DECEMBER 2017
Fig. 3. Circuit configuration of SMs. (a) HB. (b) FB. (c) CHB. (d) NPC. (e) ANPC. (f) NPP. (g) FC. (h) CD-SM.
and the static synchronous compensators (STATCOMs) high efficiency. The output voltage of HB-SM consists of posi-
employ 15–200 SM/arm to reach an operating voltage tive voltage levels (“0” and “vC1 ”) only and cannot support the
of 13.9–220 kV [44], [45]. bipolar operation and dc fault blocking [48]. An antiparallel
The MMC can be realized using different SMs to meet connection of thyristors across the ac output terminals of the
the application requirements such as dc-side fault current HB-SM was proposed in [49] to limit the dc-side fault current.
blocking, smaller capacitor voltage ripple and circulating cur- The full-bridge SM (FB-SM) is also known as an
rents, and high efficiency [46]. The most popular and widely H-bridge circuit and its configuration is shown in Fig. 3(b).
used SM configurations in MMC are shown in Fig. 3. The The FB-SM requires twice the number of semiconductor
half-bridge SM (HB-SM) is often referred to as a chopper- devices as compared with the HB-SM for the same voltage
cell and its circuit configuration is shown in Fig. 3(a). The rating. However, the control and design complexity are similar
HB-SM is commercially used in the MMC-HVdc transmission to that of the HB-SM. In the FB-SM, two devices carry the
systems [47]. Its simple construction results in a simple control current during the normal operation, resulting in a higher
and design. During the normal operation, only one device will device power loss and low efficiency. The FB-SM generates
be in “ON” state. Hence, the HB-SM has low power loss and three voltage levels of “0,” “vC1 ,” and “−vC1 .” The negative
1634 IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, VOL. 5, NO. 4, DECEMBER 2017
voltage level is used to eliminate the dc-side fault current from The three-level flying capacitor SM (3L-FC-SM) has a
the system [50], [51]. With the identical power rating and the nested cell structure, and it requires four semiconductor
number of SMs, the FB-SM-based MMC requires only 50% devices as shown in Fig. 3(g). The FC-SM can be operated
of total dc-bus voltage (Vd ) to generate the same amount of ac as an HB-SM by applying identical gating signals to the
output voltage in comparison with the HB-SM-based MMC. devices S1 and S2 . This feature allows the researchers to
Hence, each FB-SM capacitor can be designed with a voltage investigate the performance of HB-SM, FC-SM, and hybrid
rating equal to 75% of HB-SM rated voltage [52], [53]. Also, MMC (combination of HB and FC-SM) systems using FC-SM
the FB-SM-based MMC has a smaller capacitor voltage ripple itself [62]. The FC-SM-based MMC has a smaller capacitor
compared with HB-SM-based MMC. With the FB-SM, it is voltage ripple and circulating currents compared with the
also possible to create hybrid MMC configurations such as HB-SM-based MMC [63]. Hence, the FC-SM has a better
alternative arm converter and star-channel MMC [54], [55]. efficiency compared with the HB-SM. The FC-SM generates
The performance and efficiency of the SMs can be improved positive voltage levels only and cannot block the dc-side fault
by replacing the standard SMs with the multilevel SMs. These current.
SMs reduce the converter footprint size but increase the design The clamp-double SM (CD-SM) is a three-level hybrid
complexity. With the multilevel SMs, the available redundancy SM [64]. The CD-SM is realized by connecting two HB-SMs
switching states are quite high in an MMC. These redundancy in series along with two additional diodes and a single IGBT
switching states significantly improve the controllability of device as shown in Fig. 3(h). During the normal operation,
the SM capacitor voltage. Over the past few years, several the device S B is continuously in “ON” state and resulting in a
multilevel SMs are developed and studied for an MMC. cascade connection of two HB-SMs. When a dc fault occurs,
Some of the SM configurations are shown in Fig. 3. The all the devices in CD-SM are turned “OFF,” and it generates
CHB-SM (CH-SM) can be realized by connecting two positive or negative voltage levels at the output, depending on
HB-SMs in series as shown in Fig. 3(c). The resultant circuit the current direction. Hence, the CD-SM can be used in the
generates three voltage levels at the SM ac output terminals. HVdc applications to block the dc-side fault current [65], [66].
The main features are easy of control and less design com- However, the power losses, efficiency, and design complexity
plexity. Further, the CH-SM has a low device power loss and are significantly high due to the additional devices. Several
high efficiency similar to the HB-SM. Currently, the CH-SM hybrid SMs are developed to handle the dc-side faults, to
is commercially used in the MMC-based motor drive improve the efficiency with less device count, and to achieve
systems [56]. the better capacitor voltage controllability [67]–[74]. These
The configuration of three-level NPC SM (3L-NPC-SM) SMs are still in the research and development stage, yet to
is shown in Fig. 3(d). The 3L-NPC-SM is constructed with implement in the commercial products.
four semiconductor devices, two clamping diodes, and two
capacitors. The loss distribution between the devices and III. M ATHEMATICAL M ODELING OF M ODULAR
the neutral-point voltage balance are the major issues in the M ULTILEVEL C ONVERTER
NPC-SM [57]. Due to the neutral-point balancing issue, the In an MMC, the interaction between the arm and line quanti-
operating region of NPC-SM is limited at the higher mod- ties (variables) generates low- and high-frequency components
ulation indices [58]. The NPC-SM has higher device power on the ac and dc side of the SM [75]. Due to this interaction,
losses and low efficiency compared with the HB-SM. From it is very difficult to understand the operation and behavior
the control and design perspective, the NPC-SM is not an of the MMC during the steady-state and dynamic conditions.
attractive solution for an MMC. The simulation studies are widely employed to analyze the
The three-level active NPC SM (3L-ANPC-SM) can be behavior of an MMC. However, the simulation process con-
realized by replacing the clamping diodes in the NPC-SM sumes a lot of time, due to the larger number of SMs per arm.
with the active devices. The configuration of 3L-ANPC-SM is Also, a control scheme is required to handle multiple control
shown in Fig. 3(e). The active devices provide the additional objectives of an MMC. The designing of multiobjective control
redundancy switching states to control the neutral point scheme is a difficult and challenging task. To address the above
current and to ensure the equal loss distribution between the problems, several equivalent mathematical models have been
devices [59], [60]. The ANPC-SM generates positive voltage proposed in the literature.
levels only. Hence, it cannot block the dc-side fault current.
The power losses and efficiency of ANPC-SM is quite similar
to the NPC-SM. Another variation of a three-level SM is a A. Equivalent Circuit Models
neutral-point piloted SM (3L-NPP-SM) and its configuration The simplified equivalent model of a three-phase MMC
is shown in Fig. 3(f). In NPP configuration, the neutral point is shown in Fig. 4(a), in which the SM terminal volt-
is connected to the output terminal through an antiseries con- age in each arm is modeled as a single equivalent voltage
nection of IGBT devices. Also, the devices in each leg should source [76]–[80]. This model is very simple and easy to
be designed with two times the voltage blocking capability analyze and the simulation process becomes faster. With this
of the NPC and ANPC SMs [61]. The NPP-SM generates model, it is also possible to obtain the decoupled current
three positive voltage levels only. This SM is not suitable models. These models are used to control various current
for the bipolar operation and cannot block the dc-side fault components flowing through the arm [81]. The simplified
current. model is valid under the following assumptions: 1) the SM
DEKKA et al.: EVOLUTION OF TOPOLOGIES, MODELING, CONTROL SCHEMES, AND APPLICATIONS OF MMCS 1635
Fig. 4. Equivalent models of a three-phase MMC. (a) Model with ideal arm voltage sources. (b) Model with nonideal arm voltage sources. (c) AVM.
capacitance is a large enough to model as a constant dc voltage voltage source, whereas the dc side of the SMs is modeled as
source and 2) each arm of MMC should be equipped with a controlled current source [84]. The controlled current source
a larger number of SMs, so that the harmonic components represents the charging and discharging of the SM capacitors.
corresponding to the voltage source can be neglected. The aim of AVM approach is to replicate the average response
Alternatively, each arm of MMC is modeled as a nonlinear of the switching devices, the converter, and the control scheme
capacitor with a time-variant sinusoidal capacitance, while the using simple mathematical equations. The AVM equations are
capacitor voltage is considered as a controlled voltage source very accurate and emulate the fundamental system behavior
as shown in Fig. 4(b). To deal with the capacitor voltage on the ac side of the SM, but it requires a longer simu-
dynamics, the total energy stored in each arm is used to control lation time and is difficult to analyze due to the coupled
the arm capacitor voltage. The summation of upper and lower dynamics. These equations are derived in the abc-frame and
arm energy is regulated corresponding to the load active power are suitable for the time-domain simulations only [85], [86].
demand, and their difference is controlled to maintain the Further, the mathematical models in dq-frame are presented in
voltage balance between the upper and lower arms [82]. [87] and [88]. Using the dq-frame, the arm and line quantities
To simplify the analysis, the average value models (AVMs) can be decoupled, which simplifies the controller design.
are presented in [83]. The AVM of MMC is shown in Fig. 4(c). A state-space approach or matrix representation was pre-
In this model, the ac side of the SMs is modeled as a controlled sented in [89] to simplify the analysis and simulation models.
1636 IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, VOL. 5, NO. 4, DECEMBER 2017
Also, the phasor approach is employed in the mathematical To analyze the dynamic behavior of MMC, the dc cur-
modeling of an MMC [90]. These models are valid in steady- rent (i d ), ac circulating current (i x z ), and ac system cur-
state and use a graphical representation of the converter cur- rent (i ox ) components are considered in the arm current (i yx ).
rents and voltages. The mathematical models are also available From the equivalent model shown in Fig. 4(a), the upper and
in the frequency domain [91], [92]. In this domain, the design lower arm current of phase-a is given by
of the controller is easy and straightforward. In overall, the
simplified models reduce the simulation running time and i ua = 0.5 i oa + i d + i az
provide a straightforward analysis, but the effect of switch- i la = 0.5 i oa − i d − i az . (1)
ing devices and modulation schemes cannot be investigated.
On the other hand, the complex models provide accurate The phase-a ac system current is formulated as
results and a better understanding of the converter operation,
and its behavior. Depending on the application requirement, i oa = 2 i a + 2 i cm . (2)
one of the equivalent models is adopted to analyze the system Similarly, the current flowing through the upper and lower
behavior. dc-bus of MMC is given by
B. Mathematical Modeling i u = i ua + i ub + i uc = 3 i cm + 3 i d
i l = i la + i lb + i lc = 3 i cm − 3 i d . (3)
In this section, a detailed mathematical model of arm
currents in the MMC is presented. The mathematical model From Fig. 4(a), the phase-a and the upper and lower arm
has four independent current components associated with the voltages are given by
input (dc current), output (ac output current), ac circulating, ⎫
and common-mode currents. Even though the common-mode d iu d i ua ⎪
Vu = L d + rd i u + v ua + L ⎪
⎪
current model is not used in the HVdc applications, it could dt dt ⎪ ⎪
⎪
⎪
+ ro i oa + v an ⎪
d i oa
be useful for other applications (motor drives). In overall, the + r i ua + L o ⎬
proposed models are simple, and it can be used to analyze dt (4)
d il d i la ⎪
the converter dynamic behavior. Further, the continuous-time −Vl = L d + rd i l − vla + L ⎪
⎪
dt dt ⎪ ⎪
⎪
and discrete-time models are used to design and implement ⎪
+ ro i oa + v an . ⎪
d i oa
+ r i la + L o ⎭
(simulation and experimental studies) the classical and dt
MPC methods.
The MMC consists of N-SMs in series with an arm inductor Subtraction of lower arm voltage in (4) from the upper arm
in each arm. The N-SMs are modeled as a controlled voltage voltage results in
source (v yx ) as shown in Fig. 4(a). The dc system is repre- d (i u − i l )
sented with a split dc voltage source [Vu = Vl = (Vd /2)], Vd = L d + rd (i u − i l ) + v ua
dt
and it is connected to the converter legs through a dc line. d (i ua − i la )
The ac system of MMC is connected to the ac voltage source + vla + L + r (i ua − i la ). (5)
dt
through an ac line. The list of variables and symbols used in
the mathematical model is defined as follows: Similarly, the summation of phase-a and the upper
and lower arm voltages in (4) outcomes the following
x ∈ {a, b, c} phase;
equation:
y ∈ {u, l} arm;
Vd total dc system voltage; d (i u + i l ) d (i ua +i la )
Vu , Vl upper and lower dc-bus voltages; 0 = Ld + rd (i u + i l ) + v ua − vla + L
dt dt
i u , il upper and lower dc-bus currents; d i oa
v ua , v ub , v uc three-phase upper arm voltages; + r (i ua + i la ) + 2L o + 2ro i oa + 2v an . (6)
dt
i ua , i ub , i uc three-phase upper arm currents;
1) Modeling of DC Current Component: The magnitude
vla , vlb , vlc three-phase lower arm voltages;
of dc current component (i d ) depends on the active power
i la , i lb , i lc three-phase lower arm currents;
demanded by load along with the voltage difference between
v an , v bn , v cn three-phase ac system voltages;
the dc-bus voltage and the SM capacitor voltage in each
i oa , i ob , i oc three-phase ac system currents;
converter leg. From (3), the dc current component is given
i az , i bz , i cz three-phase ac circulating currents;
by
ia , ib, ic three-phase ac output currents;
i cm common-mode current; i u − il
id dc current component; id = . (7)
6
L d , rd , inductance and resistance of a dc line;
L, r , inductance and resistance of an arm inductor; Equations (1) and (7) are substituted in (5), which results in
L o , ro , inductance and resistance of an ac line; d id
() p predictive variable; Vd = 6L d + 6rd i d + v ua + vla
dt
()m measured variable, d id d i az
Ts sampling time. + 2L + 2r i d + 2L + 2r i az . (8)
dt dt
DEKKA et al.: EVOLUTION OF TOPOLOGIES, MODELING, CONTROL SCHEMES, AND APPLICATIONS OF MMCS 1637
Similarly, the phase-b and -c voltage equations are obtained With the forward Euler approximation, the discrete-time
as follows: model of three-phase ac circulating currents is formulated as
⎫ ⎡
Vd = 6L d
d id
+ 6rd i d + v ub + vlb ⎪
⎪ v ux p p
⎪
⎪ (k) + vlx (k)
dt ⎪
⎪ ixz (k + 1) = z ⎣
⎪
+ 2r i bz ⎪
d id d i bz 6
+2L + 2r i d + 2L ⎬ x=a,b,c
dt dt (9) p p
Vd = 6L d
d id
+ 6rd i d + v uc + vlc ⎪
⎪ vux (k) + vlx (k)
⎪
⎪ − + z ixz
m
(k), (17)
dt ⎪
⎪ 2
⎪
+ 2r i cz . ⎪
d id d i cz
+2L + 2r i d + 2L ⎭
dt dt
where
The dynamic model of dc current component is obtained by
adding (8) and (9) as Ts r Ts
z = , z = 1 − . (18)
⎡ ⎤ L L
d id 1 V v ux + vlx 3) Modeling of Common-Mode Current: With the assump-
= ⎣ d
− − (3rd + r ) i d ⎦.
dt 3L d + L 2 6 tion that the ac and dc system grounds are connected, then the
x=a,b,c
magnitude of common-mode current (i cm ) is derived from (3)
(10)
as
The continuous-time model of dc current component given i u + il
in (10) is transformed into the discrete-time domain using i cm = . (19)
6
forward Euler approximation and results in
⎡ ⎤ Substitution of (2) and (19) into (6) results in the following
V m (k) v
p
(k) + v
p
(k) equation:
i d (k + 1) = d ⎣ d ⎦
p ux lx
−
2 6 d i cm d i cm
x=a,b,c 0 = 6L d + 6rd i cm + v ua − vla + 2L
+ d i dm (k) (11) dt dt
d ia d i cm
+ 2r i cm + 2L + 2r i a + 4L o
where superscript “ p” denotes the predicted variable, dt dt
d ia
“m” denotes the measured variable, and Ts represents the + 4ro i cm + 4L o + 4ro i a + 2v an . (20)
sampling time. The discrete-time parameters are given by dt
where
Ts (3rd + r + 2ro ) Ts as follows:
cm = , cm = 1 − . ⎡
3L d + L + 2L o 3L d + L + 2L o
(24) ⎢ p
⎢ v (k) − vp (k)
p ⎢ ux
ix (k + 1) = o ⎢ lx
4) Modeling of AC Output Current: The ac output current is ⎢ 2
equally distributed among the upper and lower arms. From (1), ⎣
the magnitude of phase-a, ac output current, is given by
⎤
i ua + i la ⎥
ia = − i cm . (25) ⎥
2 v p (k) − v ux
p
(k) p ⎥
lx
− − vxn ⎥ + o ixm (k)
The dynamic model of phase-a is obtained by solving (20), 6 ⎥
x=a,b,c ⎦
(22), and (25) as
⎡ Zero Sequence Voltage
(29)
⎢
⎢v − v vlx − v ux
d ia 1 ⎢ la ua where
= ⎢ −
dt L + 2L o ⎢ 2 6 Ts (r + 2ro ) Ts
⎣ x=a,b,c o = , o = 1 − . (30)
L + 2L o L + 2L o
Zero Sequence Voltage
⎤ The above mathematical model is developed for the MMC
⎥ with dc ground, but these equations are also applicable to the
⎥ MMC without dc ground. In an MMC without dc ground,
⎥
−v an − (r + 2ro ) i a ⎥. (26) there is no path for the common-mode current. Hence, the
⎥
⎦ dynamic model corresponding to the common-mode current
can be neglected. There is no change in the ac output current,
ac circulating current, and dc current component models.
From (26), the generalized dynamic model of three-phase Equation (27) shows that the ac output current model consists
ac output current is given by of a zero sequence voltage that is used to minimize the ripple
⎡ in the SM capacitor voltage and dc-bus current in an MMC
⎢ during the balanced and unbalanced operating conditions.
⎢v − v vlx − v ux
d ix 1 ⎢ lx ux
= ⎢ −
dt L + 2L o ⎢ 2 6 IV. C LASSICAL C ONTROL M ETHODS FOR MMC
⎣ x=a,b,c
The digital control schemes enable a safe, reliable, and
Zero Sequence Voltage
⎤ efficient operation of an MMC. These control schemes provide
a superior dynamic and steady state performance. The control
⎥
⎥ of MMC is quite challenging, and it involves multiple control
⎥
− vxn − (r + 2ro ) ix ⎥ (27) objectives, as shown in Fig. 5. The MMC control objectives
⎥
⎦ are divided into two categories of primary and secondary. The
control of output current and SM capacitor voltages are the
primary objectives, associated with the operation of MMC.
where On the other hand, the minimization of circulating current
⎡ ⎤ ⎡ ⎤ and SM capacitor voltage ripple belongs to the secondary
ia v an
ix = ⎣i b ⎦ , vxn = ⎣v bn ⎦. (28) objectives. These objectives can be achieved using either
ic v cn classical control methods or MPC methods. In this section,
the overview of classical control methods and their limitations
The continuous-time model given in (27) is transformed into are presented. In classical control methods, each objective is
the discrete-time domain using forward Euler approximation achieved using an independent PI regulator. Also, a simple
DEKKA et al.: EVOLUTION OF TOPOLOGIES, MODELING, CONTROL SCHEMES, AND APPLICATIONS OF MMCS 1639
drives, and STATCOMs [119]. Each application uses a differ- is added to the main modulation signals.
ent technique to control their output currents. For example, The voltage balance between SMs in the arm is achieved
the voltage oriented control (VOC) is used in the HVdc by the capacitor voltage balance method. The capacitor volt-
applications [119], while the field oriented control (FOC) age balancing can be performed at either control stage or
and direct torque control schemes are applied to motor drive modulation stage. Based on the capacitor voltage balancing,
systems [120]. In the case of STATCOM, the output cur- the capacitor voltage control methods are categorized into
rents are controlled to meet the reactive power or power distributed and centralized control approaches. The block
factor requirement [121], [122]. These control techniques are diagram of distributed control approach is shown in Fig. 8.
DEKKA et al.: EVOLUTION OF TOPOLOGIES, MODELING, CONTROL SCHEMES, AND APPLICATIONS OF MMCS 1641
Fig. 15. Control block diagram of FCS-MPC. Fig. 17. Control block diagram of dual-stage MPC.
TABLE I TABLE II
C OMMERCIAL MMC-BASED HVDC S YSTEMS C OMMERCIAL M ULTITERMINAL MMC-BASED HVDC S YSTEMS
(P OINT- TO -P OINT C ONNECTION )
Fig. 21. MMC-HVdc with submarine cable for an off-shore wind farm.
TABLE III
C OMMERCIAL MMC-HVDC-BASED O FFSHORE W IND FARMS
TABLE IV
C OMMERCIAL MMC-BASED M OTOR D RIVE S YSTEMS
Fig. 26. Advanced and hybrid configurations of MMC. (a) Alternate arm MMC. (b) Middle-SM MMC. (c) Hybrid MMC. (d) FC MMC. (e) Active
cross-connected MMC.
the research on the MMC can be opened to the new applica- of battery energy systems. Another interesting application is
tions such as medium/high-voltage dc–dc converters to form the variable-speed wind energy conversion systems. Currently,
the dc-grids, medium-frequency traction applications as a 8-MW wind turbines are available in the market, and some
power electronic transformer, and medium-voltage variable- manufacturers announced a wind turbine of 10–15 MW in
speed drive with constant torque applications. their future projects. Considering this change, the MMC can
The modular characterization of MMC can be used in the be a good fit for these applications, and it can be used in the
PV plants to increase the energy storage so that the plants future wind energy projects.
can supply the power to consumers during the night time. Another important issue is the dc-side fault blocking capa-
This modular feature is also useful for the grid integration bility in the HVdc systems. Most of the MMC-HVdc systems
1650 IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, VOL. 5, NO. 4, DECEMBER 2017
Fig. 27. Modular ac–ac converters. (a) Matrix MMC. (b) Hexagonal MMC.
are designed with HB-SM and cannot block the dc-side fault Also, the state-of-the-art and emerging technologies in MMCs
current. The FB-SM and CD-SM can eliminate the dc-side are discussed. Finally, the list of commercial applications
fault current, but these SMs are not used in the commercial based on the MMC and their technical details are provided.
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multilevel converter with integrated storage for solar photovoltaic appli- He joined the Universidad Católica de la Santisima
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of Concepción, Concepción, Chile, in 2000, 2003,
and 2006, respectively.
Apparao Dekka (S’10) received the B.Tech. degree From 2006 to 2009, he was a Post-Doctoral
in electrical and electronics engineering from Jawa- Research Fellow with Universidad Técnica Federico
harlal Nehru Technological University, Hyderabad, Santa Maria, Valparaiso, Chile, where he was an
India, in 2007, the M.Tech. degree in electrical Associate Researcher in 2009 and an Assistant
engineering from the Indian Institute of Technology Professor in 2015. He is currently an Associate
Bombay, Mumbai, India, in 2010, and the Ph.D. Researcher with the Solar Energy Research Center, Santiago, Chile, and
degree in electrical and computer engineering from a main Researcher with the Advanced Center for Electrical and Elec-
Ryerson University, Toronto, ON, Canada, in 2017. tronics Engineering, Universidad Técnica Federico Santa Maria. He has
From 2010 to 2012, he was a Research Engineer co-authored two book chapters and more than 90 journal and conference
with the Power Electronics Laboratory, The Petro- papers. His current research interests include power converter topologies and
leum Institute, Abu Dhabi, United Arab Emirates. control, multilevel converters, simulation, electro-mobility, smart grids, and
He is currently a Post-Doctoral Fellow with Ryerson University. He has HVdc systems.
authored more than 25 technical papers, and co-authored a book Modu- Dr. Perez received the Best Paper Award from the IEEE T RANSACTIONS
lar Multilevel Converters: Analysis, Control, and Applications (Wiley-IEEE ON I NDUSTRY A PPLICATIONS M AGAZINE in 2012 and the Second Best Paper
Press, 2018). His current research interests include high-power converters, Award from the IEEE T RANSACTIONS ON P OWER E LECTRONICS in 2015.
pulsewidth modulation schemes, renewable energy systems, and advanced He is an Associate Editor of the IEEE T RANSACTIONS ON P OWER E LEC -
control schemes. TRONICS and the IEEE T RANSACTIONS ON I NDUSTRIAL E LECTRONICS .
Dr. Dekka was a recipient of the Student Research Award from Toronto He is the Coordinator of the IEEE-IES Region-9 Latin-America Chapter and
Hydro and Connect Canada in 2013 and 2015, respectively, and the Research the President of the IEEE-IES Chapter Chile.
Excellence Award from the Department of Electrical and Computer Engineer-
ing, Ryerson University, in 2014, 2015, and 2016, the Outstanding Reviewer
Award in 2015 from the IEEE T RANSACTIONS ON P OWER E LECTRONICS
in 2016, and the Student Paper Travel Award for IEEE-ICIT’16 from the IEEE
Industrial Electronics Society in 2016.