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ADC0809

The ADC0809 is an 8-bit analog-to-digital converter that uses successive approximation. It has 8 input channels that can be selected via an address decoder to convert analog voltage signals from a temperature sensor and battery circuit. The converter consists of a 256R voltage divider ladder network, successive approximation register, and a high impedance chopper-stabilized comparator to perform the 8-bit conversions rapidly and accurately.

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Bhaskar Rao P
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350 views5 pages

ADC0809

The ADC0809 is an 8-bit analog-to-digital converter that uses successive approximation. It has 8 input channels that can be selected via an address decoder to convert analog voltage signals from a temperature sensor and battery circuit. The converter consists of a 256R voltage divider ladder network, successive approximation register, and a high impedance chopper-stabilized comparator to perform the 8-bit conversions rapidly and accurately.

Uploaded by

Bhaskar Rao P
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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2.2.

ADC0809
ADC0809 is an 8-bit analog to digital converter. It is used to convert the analog
voltage of temperature sensor and battery circuit. The reference voltage of ADC0809 is
5V. It is an 8 channel ADC. The temperature sensor is connected to channel 0 and battery
circuit is connected to channel 1.

The 8-bit A/D converter uses successive approximation as the conversion technique. The
converter features a high impedance chopper stabilized comparator, a 256R voltage
divider with analog switch tree and a successive approximation register. The 8-channel
multiplexer can directly access any of 8-single-ended analog signals.

2.2.1. Block Diagram

2.2.2. Pin Diagram


The device contains an 8-channel single-ended analog signal multiplexer. A
particular input channel is selected by using the address decoder. Table shows the input
states for the address lines to select any channel. The address is latched into the decoder
on the low-to-high transition of the address latch enable signal.
+5V

U 1
B A TT D C V O LTA G E
1 2 8
2 IN 3 IN 2 2 7
3 IN 4 IN 1 2 6
4 IN 5 IN 0 2 5
IN 6 AD D A A D C 09_M U X_A
5 2 4 A D C 09_M U X_B
TEM PER ATU R E IN 7 AD D B
6 2 3 A D C 09_M U X_C
7 S TA R T AD D C 2 2
8 EO C ALE 2 1
2 (5 ) 2 (1 )M S B A D C 7
9 2 0 A D C 6
1 0 O /P E N 2 (2 ) 1 9
AD C 09_STAR T C LK C LO C K 2 (3 ) A D C 5
AD C 09_EO C 1 1 1 8 A D C 4
1 2 VC C 2 (4 ) 1 7
AD C 09_O P_EN V R E F (+ ) 2 (8 )L S B A D C 3
AD C 09_ALE 1 3 1 6 A D C 2
1 4 G N D V R E F (-) 1 5
2 (7 ) 2 (6 ) A D C 1
A D C 0
AD C 0809

2.2.3. Functional Description

The heart of this single chip data acquisition system is its 8-bit analog-to-digital
converter. The converter is designed to give fast, accurate, and repeatable conversions
over a wide range of temperatures. The converter is partitioned into 3 major sections: the
256R ladder network, the successive approximation register, and the comparator. The
converter’s digital outputs are positive true.

The 256R ladder network approach was chosen over the conventional R/2R
ladder because of its inherent monotonicity, which guarantees no missing digital codes.
Monotonicity is particularly important in closed loop feedback control systems. A non-
monotonic relationship can cause oscillations that will be catastrophic for the system.
Additionally, the 256R network does not cause load variations on the reference voltage.

The bottom resistor and the top resistor of the ladder network in Figure are not the
same value as the remainder of the network. The difference in these resistors causes the
output characteristic to be symmetrical with the zero and

Full-scale points of the transfer curve. The first output transition occurs when the analog
signal has reached +1⁄2 LSB and succeeding output transitions occur every 1 LSB later
up to full-scale.
The successive approximation register (SAR) performs 8 iterations to
approximate the input voltage. For any SAR type converter, n-iterations are required for
an n-bit converter. Figure shows a typical example of a 3-bit converter. In the ADC0809,
the approximation technique is extended to 8 bits using the 256R network.

The A/D converter’s successive approximation register (SAR) is reset on the


positive edge of the start conversion (SC) pulse. The conversion is begun on the falling
edge of the start conversion pulse. A conversion in process will be interrupted by receipt
of a new start conversion pulse. Continuous conversion may be accomplished by tying
the end-of-conversion (EOC) output to the SC input. If used in this mode, an external
start conversion pulse should be applied after power up. End-of-conversion will go low
between 0 and 8 clock pulses after the rising edge of start conversion.
The most important section of the A/D converter is the comparator. It is this
section which is responsible for the ultimate accuracy of the entire converter. It is also the
comparator drift which has the greatest influence on the repeatability of the device. A
chopper-stabilized comparator provides the most effective method of satisfying all the
converter requirements.

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