STW34NB20

N-CHANNEL 200V - 0.062 Ω - 34A TO-247

PowerMESH™ MOSFET

Table 1. General Features Figure 1. Package

Type VDSS RDS(on) ID

STW34NB20 200 V < 0.075 Ω 34 A

FEATURES SUMMARY
■ TYPICAL RDS(on) = 0.062 Ω

■ EXTREMELY HIGH dv/dt CAPABILITY

3
■ 100% AVALANCHE TESTED 2
■ VERY LOW INTRINSIC CAPACITANCES 1

■ GATE CHARGE MINIMIZED

TO-247

DESCRIPTION
Using the latest high voltage MESH OVERLAY™
process, STMicroelectronics has designed an ad-
vanced family of power MOSFETs with outstand- Figure 2. Internal Schematic Diagram
ing performances. The new patent pending strip
layout coupled with the Company’s proprietary
edge termination structure, gives the lowest
RDS(on) per area, exceptional avalanche and dv/dt
capabilities and unrivalled gate charge and switch-
ing characteristics.

APPLICATIONS
■ SWITCH MODE POWER SUPPLIES (SMPS)

■ DC-AC CONVERTERS FOR WELDING

EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVE
■ HIGH CURRENT, HIGH SPEED SWITCHING

Table 2. Order Codes

Part Number Marking Package Packaging
STW34NB20 W34NB20 TO-247 TUBE

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Table 3. Absolute Maximum Ratings

Symbol Parameter Value Unit
VDS Drain-source Voltage (VGS = 0) 200 V
VDGR Drain- gate Voltage (RGS = 20 kΩ) 200 V
VGS Gate-source Voltage ± 30 V
ID Drain Current (cont.) at TC = 25 °C 34 A
ID Drain Current (cont.) at TC = 100 °C 21 A

IDM (1) Drain Current (pulsed) 136 A

Ptot Total Dissipation at TC = 25 °C 180 W

Derating Factor 1.44 W°/C
Tstg Storage Temperature -65 to 150 °C
Tj Max. Operating Junction Temperature 150 °C
Note: 1. Pulse width limited by safe operating area

Table 4. Thermal Data

Symbol Parameter Value Unit
Rthj-case Thermal Resistance Junction-case Max 0.69 °C/W
Rthj-amb Thermal Resistance Junction-ambient Max 30 °C/W
Tl Maximum Lead Temperature For Soldering Purpose 300 °C

Table 5. Avalanche Characteristics

Symbol Parameter Max Value Unit
IAR Avalanche Current, Repetitive or Not-Repetitive 34 A
(pulse width limited by Tj max, δ < 1%)
EAS Single Pulse Avalanche Energy 650 mJ
(starting Tj = 25 °C; ID = IAR; VDD = 50 V)

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ELECTRICAL CHARACTERISTICS (Tcase = 25°C unless otherwise specified)

Table 6. Off
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V(BR)DSS Drain-source ID = 250 µA VGS = 0 200 V
Breakdown Voltage
IDSS Zero Gate Voltage VDS = Max Rating 1 µA
Drain Current (VGS = 0) VDS = Max Rating Tc = 125 °C 10 µA
IGSS Gate-body Leakage VGS = ± 30 V ± 100 nA
Current (VDS = 0)

Table 7. On (1)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VGS(th) Gate Threshold Voltage VDS = VGS; ID = 250 µA 3 4 5 V
RDS(on) Static Drain-source On VGS = 10V; ID = 17 A 0.062 0.075 Ω
Resistance
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %

Table 8. Dynamic
Symbol Parameter Test Conditions Min. Typ. Max. Unit

gfs (1) Forward VDS > ID(on) x RDS(on)max; ID = 17 A 8 17 S

Transconductance
Ciss Input Capacitance VDS = 25 V; f = 1 MHz; VGS = 0 2400 3300 pF
Coss Output Capacitance 650 900 pF
Crss Reverse Transfer 90 130 pF
Capacitance
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %

Table 9. Switching On
Symbol Parameter Test Conditions Min. Typ. Max. Unit
td(on) Turn-on Time VDD = 100 V; ID = 17 A; RG = 4.7 Ω 30 40 ns
tr Rise Time VGS = 10 V (see test circuit, Figure 16) 40 55 ns
Qg Total Gate Charge VDD = 160 V; ID = 34 A; VGS = 10 V 60 80 nC
Qgs Gate-Source Charge 19 nC
Qgd Gate-Drain Charge 29 nC

Table 10. Switching Off

Symbol Parameter Test Conditions Min. Typ. Max. Unit
tr(Voff) Off-voltage Rise Time VDD = 160 V; ID = 34 A; RG = 4.7 Ω 17 23 ns
tf Fall Time VGS = 10 V (see test circuit, Figure 18) 18 24 ns
tc Cross-over Time 35 47 ns

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Table 11. Source Drain Diode

Symbol Parameter Test Conditions Min. Typ. Max. Unit
ISD Source-drain Current 34 A

ISDM (1) Source-drain Current 136 A

(pulsed)

VSD (2) Forward On Voltage ISD = 34 A; VGS = 0 1.5 V

trr Reverse Recovery Time ISD = 34 A; di/dt = 100 A/µs 290 ns

Qrr Reverse RecoveryCharge VDD = 50 V; Tj = 150 °C 2.7 µC
(see test circuit, Figure 18)
IRRAM Reverse RecoveryCharge 18.5 A
Note: 1. Pulse width limited by safe operating area
2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %

Figure 3. Safe Operating Area Figure 4. Thermal Impedance

Figure 5. Output Characteristics Figure 6. Transfer Characteristics

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Figure 7. Transconductance Figure 8. Static Drain-source On Resistance

Figure 9. Gate Charge vs Gate-source Voltage Figure 10. Capacitance Variations

Figure 11. Normalized Gate Thresold Voltage Figure 12. Normalized On Resistance vs
vs Temperature Temperature

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Figure 13. Source-drain Diode Forward

Characteristics

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Figure 14. Unclamped Inductive Load Test Figure 15. Unclamped Inductive Waveforms
Circuit

Figure 16. Switching Times Test Circuits For Figure 17. Gate Charge Test Circuit
Resistive Load

Figure 18. Test Circuit For Inductive Load

Switching And Diode Recovery Times

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PACKAGE MECHANICAL

Table 12. TO-247 Mechanical Data

millimeters inches
Symbol
Min Typ Max Min Typ Max
A 4.85 5.15 0.19 0.20
A1 2.20 2.60 0.086 0.102
b 1.0 1.40 0.039 0.055
b1 2.0 2.40 0.079 0.094
b2 3.0 3.40 0.118 0.134
c 0.40 0.80 0.015 0.03
D 19.85 20.15 0.781 0.793
E 15.45 15.75 0.608 0.620
e 5.45 0.214
L 14.20 14.80 0.560 0.582
L1 3.70 4.30 0.14 0.17
L2 18.50 0.728
ØP 3.55 3.65 0.140 0.143
ØR 4.50 5.50 0.177 0.216
S 5.50 0.216

Figure 19. TO-247 Package Dimensions

Note: Drawing is not to scale.

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REVISION HISTORY

Table 13. Revision History

Date Revision Description of Changes

January-1998 1 First Issue

14-Apr-2004 2 Stylesheet update. No content change.

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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.

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© 2004 STMicroelectronics - All rights reserved

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