Th

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pp
ti
s
pr
ep
ar
ed
by
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ed
ev
iV
.T
Inverters

,V
IT
U
ni
ve
rsi
ty
,C
he
nn
ai
 ai
Introduction

nn
he
,C
ty
si
• A static power converter that converts dc input

r
ve
ni
U
power into ac output power at any specified voltage

IT
,V
and frequency is called an inverter.

.T
iV
• Important applications

ev
ed
• Adjustable speed ac drives re
S
r.
D

• UPS for computers

by
ed
ar

• Stand by aircraft power supplies

ep
pr
s
ti
pp
e
Th
 ai
classification

nn
he
,C
ty
si
• Based on the number of output phases

r
ve
ni
U
• Single phase

IT
,V
.T
• Three phase

iV
ev
•
ed
Based on the nature of dc sources feeding the
inverter re
S
r.
D
by

• Voltage fed inverter (VSI)

ed
ar

• Current fed inverter (CSI)

ep
pr
s
ti
pp
e
Th
 ai
classification

nn
he
,C
ty
• A voltage fed inverter is the one fed by a stiff voltage

si
r
ve
source, whose voltage is constant and independent of the

ni
U
load.

IT
,V
• In this type, the load voltage is determined by the inverter

.T
iV
• But the load current waveform is dependent on the load

ev
ed
• In contrast, a current fed inverter is supplied by a stiff
re
current source that is constant and independent of the
r.
S
load.
D
by

• The load current is dependent on the inverter but the load

ed
ar

voltage is dependent on the load parameters.

ep
pr
s
ti
pp
e
Th
Th
e
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pr
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U
Classification

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ve
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ty
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nn
ai
 Single phase bridge voltage source

ai
nn
he
inverter

,C
ty
si
• Bridge inverters can produce single phase or three

r
ve
ni
phase outputs.

U
IT
• The input to a voltage source inverter is a stiff dc

,V
.T
voltage supply , which may be a battery or the output

iV
ev
of a phase controlled rectifier.

ed
re
• Both single phase and three phase voltage source
S
r.
D

inverters are widely used in the industry.

by
ed

• Thyristors, power MOSFETs can be used as the

ar
ep

switching devices
pr
s
ti

• First we will start with a single phase half bridge

pp
e

configuration
Th
Schematic of single phase voltage

ai
nn
he
source half bridge inverter

,C
ty
si
r
ve
ni
U
IT
,V
.T
iV
ev
ed
re
S
r.
D
by
ed
ar
ep
pr
s
ti
pp
e
Th
 single phase voltage source half bridge

ai
nn
inverter

he
,C
ty
si
• The dc input to the half bridge is from a split dc

r
ve
ni
power supply

U
IT
,V
• That is besides positive and negative outer

.T
iV
terminals, a mid-point terminals is also available

ev
ed
making it a three-wire dc supply.
re
S
• Switches S1 and S2 are ON/OFF solid state switches.
r.
D
by

• The diodes D1 and D2 are known as feedback

ed
ar

diodes.
ep
pr

• They are connected in anti-parallel with switches S1

s
ti
pp

and S2
e
Th
Th
e
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ti
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pr
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ar
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Sre
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IT
U
ni
ve
rsi
ty
Mathematical Analysis

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he
nn
ai
Th
e
pp
ti
s
pr
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ar
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by
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Sre
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ev
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.T
,V
IT
U
ni
ve
rsi
ty
,C
Mathematical Analysis

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nn
ai
Th
e
pp
ti
s
pr
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ar
ed
by
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Sre
ed
ev
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.T
,V
IT
U
ni
ve
rsi
ty
,C
Mathematical Analysis

he
nn
ai
Th
e
pp
ti
s
pr
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ed
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Sre
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ev
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.T
,V
IT
U
ni
ve
rsi
ty
Mathematical Analysis

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he
nn
ai
Th
e
pp
ti
s
pr
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ar
ed
by
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Sre
ed
ev
iV
.T
,V
IT
U
ni
ve
rsi
ty
,C
Mathematical Analysis

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nn
ai
 ai
Single phase full bridge inverter

nn
he
,C
ty
si
• The main drawback of half bridge inverter is that it

r
ve
ni
U
requires a three-wire dc supply.

IT
,V
• This difficulty can overcome by the use of a full

.T
iV
ev
bridge inverter.

ed
re
• The amplitude of output voltage is also doubled in
S
r.
D

this converter as compared to that of the half

by
ed

bridge inverter.
ar
ep
pr
s
ti
pp
e
Th
Th
e
pp
ti
s
pr
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ar
ed
by
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Sre
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iV
.T
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IT
U
ni
ve
rsi
ty
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nn
ai
Single phase full bridge inverter
 ai
Operation

nn
he
,C
ty
• For the full bridge inverter, load voltage is V when S1

si
r
ve
and S2 are ON and when S3 and S4 conduct, load

ni
U
voltage is –V as shown in fig.

IT
,V
• The sequence of gating signals and output voltage are

.T
iV
shown in fig.

ev
• Frequency of output voltage can be controlled by

ed
re
varying time period T r.
S
• For resistive loads, SCRs are sufficient making the
D
by

feedback diodes unnecessary because load current and

ed

load voltage are in phase.

ar
ep

• But this is not the case for RL and RLC loads

pr
s
ti
pp
e
Th
 ai
Single phase full bridge inverter

nn
he
,C
ty
si
• It should be ensured that two switches in the same

r
ve
ni
U
branch, such as S1 and S2 do not conduct

IT
,V
simultaneously as this would lead to a direct short

.T
iV
circuit of the source.

ev
ed
re
• For RL, RLC loads current Io will not be in phase
r.
S
D

with voltage Vo and the diodes connected in anti-

by
ed

parallel with thyristors allow the load current to

ar
ep

flow when the main thyristors are turned off.

pr
s
ti
pp
e
Th
Th
e
pp
ti
s
pr
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ar
ed
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Sre
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IT
U
ni
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ty
,C
Mathematical analysis

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nn
ai
Th
e
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ti
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pr
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ed
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IT
U
ni
ve
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he
nn
ai
Th
e
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ti
s
pr
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ar
ed
by
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Sre
ed
ev
iV
.T
,V
IT
U
ni
ve
r
PWM Techniques

si
ty
,C
he
nn
ai
 Voltage control in single phase

ai
nn
he
inverters

,C
ty
• This section examines various methods of output

si
r
ve
voltage control by means of inverter gain control.

ni
U
IT
• The inverter gain is defined as the ratio of the output ac

,V
voltage to input dc voltage.

.T
iV
• Such gain control is useful in many applications where

ev
ed
the variations of ac output voltage cannot be tolerated
re
S
due to variations in dc input voltage.
r.
D
by

• It is also necessary when volts/Hertz control of

ed

induction motor speeds has to be implemented.

ar
ep

• The control of motor voltage is required along with

pr
s

frequency in order to avoid saturation of the motor

ti
pp

magnetic circuit.
e
Th
 Voltage control in single phase inverters

ai
nn
he
• Various techniques are available for varying the inverter

,C
ty
gain.

si
r
ve
• The most efficient method of controlling the gain and

ni
U
therefore the output voltage is to incorporate PWM

IT
,V
control within the inverters.

.T
iV
• PWM-Pulse width Modulation Control

ev
ed
• In addition to PWM method, there are methods
re
S
involving external control of ac output voltage and dc
r.
D

input voltage
by
ed

• To distinguish these methods from the PWM method,

ar
ep

PWM method is referred to as the internal control

pr

method since the output voltage control is realized by

s
ti
pp

means of modifications in the conduction patterns of

e

the inverter switches.

Th
 ai
Pulse Width Modulation control

nn
he
,C
ty
• A fixed dc input voltage is given to the inverter and a

si
r
ve
controlled ac output voltage is obtained by adjusting

ni
U
the on and off period periods of the inverter

IT
,V
components.

.T
iV
• This is the most popular method.

ev
ed
• The advantages of PWM control technique are
re
S
 The output voltage control with this method is
r.
D
by

obtained without any additional components.

ed

 Lower order harmonics can be eliminated or minimized

ar
ep

along with their output voltage control.

pr
s
ti

 As higher order harmonics can be filtered easily, the

pp

filtering requirements are minimized.

e
Th
 ai
Pulse Width Modulation control

nn
he
,C
ty
si
• PWM pulses are characterized by constant

r
ve
ni
U
amplitude pulses.

IT
,V
• The width of these pulses is, however modulated to

.T
iV
ev
obtain inverter output voltage control and to

ed
re
reduce simultaneously its harmonic content.
r.
S
D

• Different PWM Techniques are

by
ed

Single Pulse Width Modulation

ar
ep
pr

Multiple Pulse Width Modulation

s
ti
pp

Sinusoidal Pulse Width Modulation

e
Th
 Single –Pulse Width Modulation

ai
nn
he
,C
ty
si
• In single–pulse width modulation control,

r
ve
ni
U
there is only one pulse per half cycle and the

IT
,V
width of the pulse is varied to control the

.T
iV
inverter output voltage.

ev
ed
re
S
r.
D
by
ed
ar
ep
pr
s
ti
pp
e
Th
Th
e
pp
ti
s
pr
ep
ar
ed
by
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Sre
ed
ev
iV
.T
,V
IT
U
ni
ve
rsi
ty
,C
he
nn
ai
Th
e
pp
ti
s
pr
ep
ar
ed
by
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Sre
ed
ev
iV
.T
,V
IT
U
ni
ve
rsi
ty
,C
he
nn
ai
Single Pulse Width Modulation
 Single Pulse Width Modulation

ai
nn
he
control

,C
ty
• The output voltage from a single phase full bridge inverter is

si
r
shown in fig (a)

ve
ni
• When this waveform is modulated the output voltage obtained is

U
IT
of the form shown in fig (a).

,V
• It consists of a pulse of width 2d located symmetrically about pi/2

.T
iV
and another pulse of same width 2d located symmetrically about

ev
3pi/2.

ed
re
• The pulse width is varied from 0 to pi.
r.
S
• The output voltage is controlled by varying the pulse width 2d.
D
by

• The shape of the output voltage is shown in fig.(c)

ed
ar

• Positive and negative half cycles are symmetrical about pi/2 and
ep

3pi/2
pr
s

• In addition, positive and negative half cycles are also identical.

ti
pp
e
Th
 Single Pulse Width Modulation

ai
nn
he
control

,C
ty
• The rms value of output voltage,

si
r
ve
• Vor=V√2d/pi

ni
U
IT
• The gating pulses can be generated to achieve this kind of

,V
modulation as depicted in fig.

.T
iV
• The gating signals are generated by comparing a rectangular

ev
ed
reference signal of amplitude Ar with triangular carrier wave
re
of amplitude Ac. r.
S
D

• The fundamental frequency of output voltage is determined

by

by the frequency of the reference signal.

ed
ar

• The pulse width 2d can be varied from 0 to pi by varying Ar

ep
pr

from 0 to Ac. The ratio of Ar to Ac is taken as the control

s

variable and is defined as amplitude modulation index., M=

ti
pp

Ar/Ac.
e
Th
 ai
Disadvantages

nn
he
,C
ty
si
• In this method of voltage control, a great deal

r
ve
ni
U
of harmonic content is introduced in the

IT
,V
output voltage.

.T
iV
ev
ed
re
S
r.
D
by
ed
ar
ep
pr
s
ti
pp
e
Th
 Multiple pulse width modulation

ai
nn
he
,C
ty
si
• The harmonic content can be reduced by using

r
ve
ni
U
several pulses in each half cycle of the output

IT
,V
voltage instead of a single pulse as in single pulse

.T
iV
width modulated converters.

ev
ed
re
• The turning on and off of transistors or any other
r.
S
D

power semiconductor switches can be done by

by
ed

generating the gating signal as shown in fig, by

ar
ep

comparing a reference signal with a triangular

pr
s
ti

carrier wave.
pp
e
Th
 Multiple pulse width modulation

ai
nn
he
• The harmonic content can be reduced by using several

,C
ty
si
pulses in each half cycle of output voltage.

r
ve
ni
• The carrier frequency determines the number of pulses

U
IT
per half cycle, p.

,V
.T
• The modulation index controls the output voltage.

iV
ev
ed
• This type of modulation is also referred as uniform
pulse width modulation (UPWM) re
S
r.
D

• The number of pulses per half cycle , p is computed

by
ed

from
ar
ep

• P= fc/2fo=mf/2
pr
s
ti

• Where mf=fc/fo, is the frequency modulation ratio.

pp
e
Th
Th
e
pp
ti
s
pr
ep
ar
ed
by
D
r.
Sre
ed
ev
iV
.T
,V
IT
U
ni
ve
rsi
ty
,C
he
nn
ai
Multiple pulse width modulation
Th
e
pp
ti
s
pr
ep
ar
ed
by
D
r.
Sre
ed
ev
iV
.T
,V
IT
U
ni
ve
rsi
ty
,C
he
nn
ai
Multiple pulse width modulation
 ai
Multiple pulse width modulation

nn
he
,C
ty
si
• Since this type of modulation employs large number of

r
ve
ni
pulses, p, involving larger number of switch ONs and

U
IT
switch OFFs, switching losses are more.

,V
.T
• Larger P reduces the amplitudes of lower order

iV
ev
harmonics but increases the amplitudes of some higher

ed
re
order harmonics at the same time.
r.
S
D

• However, such higher order harmonics produce

by
ed

negligible ripple and can easily be filtered out.

ar
ep
pr
s
ti
pp
e
Th
 ai
Sinusoidal pulse width modulation

nn
he
,C
ty
si
• In this method of modulation also, several

r
ve
ni
U
pulses per half cycle are used as in the case of

IT
,V
UPWM.

.T
iV
• The pulses are of equal width in UPWM

ev
ed
re
• But in SPWM the pulse width varies as a
S
r.
D

sinusoidal function of the angular position of

by
ed

the pulse in a cycle, as shown fig.

ar
ep
pr
s
ti
pp
e
Th
Th
e
pp
ti
s
pr
ep
ar
ed
by
D
r.
Sre
ed
ev
iV
.T
,V
IT
U
ni
ve
rsi
ty
,C
he
nn
ai