A DESIGNER’S GUIDE TO

INSTRUMENTATION AMPLIFIERS

by
Charles Kitchin and Lew Counts
All rights reserved. This publication, or parts thereof, may not be
reproduced in any form without permission of the copyright owner.
Information furnished by Analog Devices, Inc., is believed to be
accurate and reliable. However, no responsibility is assumed by
Analog Devices, Inc., for its use.
Analog Devices, Inc., makes no representation that the inter-
connection of its circuits as described herein will not infringe on
existing or future patent rights, nor do the descriptions contained
herein imply the granting of licenses to make, use, or sell equipment
constructed in accordance therewith.
Specifications and prices are subject to change without notice.

©2000 Analog Devices, Inc. Printed in U.S.A.

G3783-30-1/00 (rev. 0)
b TABLE OF CONTENTS
CHAPTER I—BASIC IN-AMP THEORY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
WHAT IS AN INSTRUMENTATION AMPLIFIER? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
WHAT OTHER PROPERTIES DEFINE A HIGH QUALITY IN-AMP? . . . . . . . . . . . . . . . . . . . . . . . . . 2
High AC (and DC) Common-Mode Rejection (CMR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Low Offset Voltage and Offset Voltage Drift . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
A Matched, High Input Impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Low Input Bias and Offset Current Errors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Low Noise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Low Nonlinearity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Simple Gain Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Adequate Bandwidth . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
WHERE IS AN INSTRUMENTATION AMPLIFIER USED? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Data Acquisition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Medical Instrumentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Monitor and Control Electronics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Software-Programmable Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Audio Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
High-Speed Signal Conditioning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Video Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Power Control Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
IN-AMPS: AN EXTERNAL VIEW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
INSIDE AN INSTRUMENTATION AMPLIFIER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
A Simple Op-Amp Subtractor Provides an In-Amp Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Improving the Simple Subtractor with Input Buffering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
The Three Op-Amp In-Amp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
The Basic Two Op-Amp Instrumentation Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Two Op-Amp In-Amps—Common-Mode Design Considerations for Single Supply Operation . . . . . . . . 9
Make vs. Buy: A Two Op-Amp In-Amp Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

CHAPTER II—MONOLITHIC INSTRUMENTATION AMPLIFIERS . . . . . . . . . . . . . . . . . . . . . . . 13

ADVANTAGES OVER OP-AMP IN-AMPS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
MONOLITHIC IN-AMP DESIGN—THE INSIDE STORY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Monolithic In-Amps Optimized for High Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
AD620 In-Amp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
AD622 In-Amp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
AD621 In-Amp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Monolithic In-Amps Optimized for Single Supply Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
AD623 In-Amp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
AD627 In-Amp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Difference (Subtractor) Amplifier Products . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
AMP03 Differential Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
AD626 Differential Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
AD629 Differential Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Video Speed In-Amp Products . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
AD830 Video Speed Differencing Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

–iii–
CHAPTER III—APPLYING IN-AMPS EFFECTIVELY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
DUAL SUPPLY OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
SINGLE SUPPLY OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
POWER SUPPLY BYPASSING, DECOUPLING, AND STABILITY ISSUES . . . . . . . . . . . . . . . . . . . . 27
THE IMPORTANCE OF AN INPUT GROUND RETURN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
CABLE TERMINATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
INPUT PROTECTION BASICS FOR ADI IN-AMPS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Input Protection from ESD and DC Overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Adding External Protection Diodes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
ESD and Transient Overload Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
DESIGN ISSUES AFFECTING DC ACCURACY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Designing For the Lowest Possible Offset Voltage Drift . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Designing For the Lowest Possible Gain Drift . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Practical Solutions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
RTI and RTO Errors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Reducing Errors Due to Radio Frequency Interference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Miscellaneous Design Issues . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

CHAPTER IV—REAL-WORLD IN-AMP APPLICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

DATA ACQUISITION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Bridge Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Transducer Interface Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Calculating ADC Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
High-Speed Data Acquisition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
MISCELLANEOUS APPLICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
An AC-Coupled Line Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Remote Load Sensing Technique . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
A Precision Voltage-to-Current Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
A Current Sensor Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Output Buffering For Low Power In-Amps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
A 4 mA-to-20 mA Single Supply Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
A Single Supply Thermocouple Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
SPECIALTY PRODUCTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

APPENDIX A—INSTRUMENTATION AMPLIFIER SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . 53

(A) Specifications (Conditions) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
(B) Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
(C) Gain Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
(D) Gain Error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
(E) Nonlinearity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
(F) Gain vs. Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
(G) Voltage Offset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
(H) Input Bias and Offset Currents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
(I) Key Specifications for Single Supply In-Amps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
(J) Common-Mode Rejection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
(K) Settling Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
(L) Quiescent Supply Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

–iv–
APPENDIX B—MONOLITHIC IN-AMPS AVAILABLE FROM ANALOG DEVICES . . . . . . . . . 59

APPENDIX C—DEVICE PINOUTS FOR OLDER IN-AMP PRODUCTS . . . . . . . . . . . . . . . . . . . 61

SUBJECT INDEX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

DEVICE INDEX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

–v–
 BIBLIOGRAPHY/FURTHER READING
Jung, Walter. “IC Op-Amp Cookbook,” 3rd edition. Howard W. Sams & Co., 1986. ISBN# 0-672-
22453-4.
Kester, Walt. “Practical Design Techniques for Sensor Signal Conditioning,” Analog Devices, Inc.,
1999 Section 10. ISBN-0-916550-20-6
Brokaw, Paul. “An I.C. Amplifier Users’ Guide to Decoupling, Grounding, and Making Things Go
Right for a Change.” Application Note AN-202, Analog Devices, 1990.
Wurcer, Scott; Jung, Walt. “Instrumentation Amplifiers Solve Unusual Design Problems,” Applica-
tion Note AN-245, Applications Reference Manual, Analog Devices.
Sheingold, Dan, ed. “Transducer Interface Handbook.” Analog Devices, 1980, pp. 28-30.
Nash, Eamon. “Errors and Error Budget Analysis in Instrumentation Amplifier Applications,”
Application Note AN-539, Analog Devices.
Nash, Eamon. “A Practical Review of Common-Mode and Instrumentation Amplifiers,” Sensors
Magazine, July 1998, Article Reprint Available from Analog Devices.

ACKNOWLEDGMENTS
We gratefully acknowledge the support and assistance of the following: Scott Wurcer, Moshe
Gerstenhaber, and David Quinn for answering countless technical questions. Eamon Nash,
Bob Marwin, Paul Hendrix, Walt Kester, Jim Staley, and John Hayes for their many
applications inputs, Matt Gaug and Cheryl O’Connor for their marketing insights,
Sharon Hubbard for creating the cover art for this guide, and finally, the entire staff
(Marie Barlow, Kristine Chmiel-Lafleur, Joan Costa, Elinor Fagone, Kathy Hurd, Ernie Lehtonen,
Peter Sanfacon, Claire Shaw) of Analog Devices’ Communications Services Department under
Jill Connolly for the clear rendering of the illustrations and the proficient typesetting of this guide.

All brand or product names mentioned are trademarks or registered trademarks of their
respective holders.

–vi–
Chapter I
Basic In-Amp Theory
INTRODUCTION terminals are balanced and have high values, typi-
The fact that some op-amps are dubbed instrumenta- cally 109 Ω or greater. The input bias currents should
tion amplifiers (or in-amps) by their suppliers does not also be low, typically 1 nA to 50 nA. As with op-amps,
make them in-amps, even though they may be used in output impedance is very low, nominally only a few
instrumentation. Likewise, an isolation amplifier is not milli Ohms, at low frequencies.
necessarily an instrumentation amplifier. This applica- Unlike an op-amp, which has its closed-loop gain
tion note will explain what an in-amp actually is, how it determined by external resistors connected between its
operates, and how and where to use it. inverting input and its output, an in-amp employs an
internal feedback resistor network that is isolated from
WHAT IS AN INSTRUMENTATION its signal input terminals. With the input signal applied
AMPLIFIER? across the two differential inputs, gain is either preset
An instrumentation amplifier is a closed-loop gain internally or is user-set (via pins) by an internal or external
block that has a differential input and an output that gain resistor, which is also isolated from the signal
is single-ended with respect to a reference terminal. inputs. Figure 1 contrasts the differences between op-
Most commonly, the impedances of the two input amp and in-amp input characteristics.
IN-LINE CURRENT MEASUREMENT
THE VERY HIGH VALUE CLOSELY MATCHED INPUT I
RESISTANCES CHARACTERISTIC OF IN-AMPS
MAKES THEM IDEAL FOR MEASURING LOW R
LEVEL VOLTAGES AND CURRENTS—WITHOUT R–
LOADING DOWN THE SIGNAL SOURCE OUTPUT
V IN-AMP
REFERENCE R+
VOLTAGE R1 R3 REFERENCE

THE INPUT RESISTANCE OF A TYPICAL IN-AMP

R2 R4 R– IS VERY HIGH AND IS EQUAL ON BOTH INPUTS.
OUTPUT INPUT CURRENT IS LOW, SUCH THAT IB X R
IN-AMP CREATES A NEGLIGIBLE ERROR VOLTAGE
R+
R– = R+ = 109V TO 1012V
VOLTAGE REFERENCE
MEASUREMENT
FROM A BRIDGE
IN-AMP INPUT CHARACTERISTICS

R2
RIN = R1 (≈ 1kV TO 1MV) R1 R– R–
GAIN = R2/R1 TYPICAL OUTPUT
TYPICAL OP-AMP
OUTPUT
RIN = R+ (106V TO 1012V) R+ OP-AMP R+
GAIN = 1 + (R2/R1)
A MODEL SHOWING THE INPUT
A MODEL SHOWING THE INPUT RESISTANCE RESISTANCE OF A TYPICAL OP-AMP
OF A TYPICAL OP-AMP OPERATING AS AN INVERTING IN THE OPEN-LOOP CONDITION
AMPLIFIER—AS SEEN BY THE INPUT SOURCE
(R–) = (R+) = 106V TO 1015V

OP-AMP INPUT CHARACTERISTICS

Figure 1. Op-Amp vs. In-Amp Input Characteristics

–1–
Common-mode rejection, the property of canceling out connected as subtractors, also provide common-mode
any signals that are common (the same potential on rejection, the user must provide closely matched exter-
both inputs), while amplifying any signals that are nal resistors (to provide adequate CMRR). On the
differential (a potential difference between the inputs), other hand, monolithic in-amps with their pretrimmed
is the most important function an instrumentation resistor networks, are far easier to apply.
amplifier provides. Both dc and ac common-mode
rejection are important in-amp specifications. Any WHAT OTHER PROPERTIES DEFINE A
errors due to a dc common-mode voltage (i.e., a dc HIGH QUALITY IN-AMP?
voltage present at both inputs) will be reduced 80 dB to Possessing a high common-mode rejection ratio, an
120 dB by any decent quality modern in-amp. instrumentation amplifier needs the following properties:
However, inadequate ac CMR causes a large, time- High AC (and DC) Common-Mode Rejection
varying error that often changes greatly with frequency (CMR)
and so is difficult to remove at the IA’s output. Fortu- At a minimum, the in-amp’s CMR should be high over
nately, most modern monolithic IC in-amps provide the range of input frequencies that need to be rejected.
excellent ac and dc common-mode rejection. This includes high CMR at power line frequencies and
Common-mode gain (ACM) is related to common- at the second harmonic of the power line frequency.
mode rejection and is the ratio of change in output Low Offset Voltage and Offset Voltage Drift
voltage to a change in common-mode input voltage. As with an operational amplifier, an in-amp must have
This is the net gain (or attenuation) from input to a low offset voltage. Since an instrumentation amplifier
output for voltages common to both inputs. For ex- consists of two independent sections: an input stage
ample, an in-amp with a common-mode gain of 1/1,000 and an output amplifier, total output offset will equal
and a 10-volt common-mode voltage at its inputs will the sum of the gain, times the input offset, plus the
exhibit a 10 mV output change. The differential or output offset. Typical values for input and output offset
“normal mode” gain (AD) is the gain between input and drift are 1 µV/°C and 10 µV/°C, respectively. Although
output for voltages applied differentially (or across) the the initial offset voltage may be nulled with external
two inputs. The common-mode rejection ratio (CMRR) trimming, offset voltage drift cannot be adjusted out. As
is simply the ratio of the differential gain, AD, to the with initial offset, offset drift has two components, with
common-mode gain (ACM). Note that in an ideal in- the input and output section of the in-amp each con-
amp, CMRR will increase in proportion to gain. tributing its portion of error to the total. As gain is
Common-mode rejection is usually specified for a full- increased, the offset drift of the input stage becomes the
range common-mode voltage (CMV) change at a given dominant source of offset error.
frequency, and a specified imbalance of source imped- A Matched, High Input Impedance
ance (e.g., l kΩ source unbalance, at 60 Hz). The term The impedances of the inverting and noninverting
CMR is a logarithmic expression of the common-mode input terminals of an in-amp must be high and closely
rejection ratio (CMRR). matched to one another. Values of 109 Ω to 1012 Ω are
That is: CMR = 20 Log10 CMRR. typical. Difference amplifiers, such as the AD626, have
lower input impedances, but can be very effective in
In order to be effective, an in-amp needs to be able to high common-mode voltage applications.
amplify microvolt-level signals while simultaneously
rejecting volts of common-mode at its inputs. It is Low Input Bias and Offset Current Errors
particularly important that the in-amp is able to reject Again, as with an op-amp, an instrumentation amplifier
common-mode signals over the bandwidth of interest. has bias currents that flow into, or out of, its input
For techniques on reducing errors due to out-of-band terminals: bipolar in-amps with their base currents and
signals that may appear as a dc output offset, please FET amplifiers with gate leakage currents. This bias
refer to the RFI section of this guide. current flowing through an imbalance in the signal
source resistance will create an offset error. Note that if
This requires that instrumentation amplifiers have very the input source resistance becomes infinite, as with ac
high common-mode rejection over the main frequency (capacitive) input coupling without a resistive return to
of interest and its harmonics. Typical dc values of CMR power supply ground, the input common-mode voltage
are 70 dB to over 100 dB, with CMR usually improving will climb until the amplifier saturates. A high value
at higher gains. While it is true that operational amplifiers, resistor, (such that IB × R < VCM) connected between

–2–
each input and ground, is normally used to prevent this WHERE IS AN INSTRUMENTATION
problem. Typically, the input bias current multiplied by AMPLIFIER USED?
the resistor’s value in Ohms should be less than the Data Acquisition
common-mode voltage. Input offset current errors are In-amps find their primary use amplifying signals from
defined as the mismatch between the bias currents low output transducers in noisy environments. The
flowing in the two inputs. Typical values of input bias amplification of pressure or temperature transducer
current for a bipolar in-amp range from 1 nA to 50 nA; signals is a common in-amp application. Common
for a FET input device, values of 1 pA to 50 pA are bridge applications include strain and weight measure-
typical at room temperature. ment using “load cells” and temperature measurement
Low Noise using resistive temperature detectors or “RTDs.”
Because it must be able to handle very low level input Medical Instrumentation
voltages, an in-amp must not add its own noise to that In-amps are also widely used in medical equipment
of the signal. An input noise level of 10 nV/√Hz @ 1 kHz such as EKG and EEG monitors, blood pressure moni-
referred to input (RTI) or lower is desirable. Micro- tors, and defibrillators.
power in-amps are optimized for the lowest possible Monitor and Control Electronics
input stage current and so typically have higher noise In-amps may be used to monitor voltages or currents in
levels than their higher current cousins. a system and then trigger alarm systems when nominal
Low Nonlinearity operating levels are exceeded.
Input offset and scale factor errors can be corrected by Software-Programmable Applications
external trimming, but nonlinearity is an inherent per- An in-amp may be used with a software-programmable
formance limitation of the device and cannot be removed resistor chip to allow software control of hardware
by external adjustment. Low nonlinearity must be de- systems.
signed in by the manufacturer. Nonlinearity is normally
specified in percent-of-full-scale where the manufac- Audio Applications
turer measures the in-amp’s error at the plus and minus Again, because of their high common-mode rejection,
full-scale voltage and at zero. A nonlinearity error of instrumentation amplifiers are sometimes used for
0.01% is typical for a high quality in-amp; some even audio (as microphone preamps, etc.), to extract a weak
have levels as low as 0.0001%. signal from a noisy environment and to minimize offsets
and noise due to ground loops. Refer to Table XI, (Page
Simple Gain Selection 51) Specialty Products Available from Analog Devices.
Gain selection should be easy to apply. The use of a
single external gain resistor is common, but the gain High-Speed Signal Conditioning
resistor will affect the circuit’s accuracy and gain drift As the speed and accuracy of modern video data acqui-
with temperature. In-amps such as the AD621 provide sition systems have increased, there is now a growing
a choice of internally preset gains that are pin selectable. need for high bandwidth instrumentation amplifiers,
particularly in the field of CCD imaging equipment
Adequate Bandwidth where offset correction and input buffering are re-
An instrumentation amplifier must provide bandwidth quired. Double-correlated sampling techniques are often
sufficient for the particular application. Since typical used here for offset correction of the CCD image. Two
unity gain small-signal bandwidths fall between 500 sample-and-hold amplifiers monitor the pixel and refer-
kHz and 4 MHz, performance at low gains is easily ence levels, and a dc-corrected output is provided by
achieved, but at higher gains, bandwidth becomes much feeding their signals into an instrumentation amplifier.
more of an issue. Micropower in-amps typically have
lower bandwidth than comparable standard in-amps, as Video Applications
micropower input stages are operated at much lower High-speed in-amps may be used in many video and
current levels. cable RF systems to amplify or process high fre-
quency signals.

–3–
Power Control Applications very effective means for minimizing ground loops in the
In-amps can be used for motor monitoring (to monitor circuit; however some residual “common-mode” ground
and control motor speed, torque, etc.) by measuring the currents will still remain. These currents flowing
voltages, currents, and phase relationships of a three- through RCM will develop a common-mode voltage
phase ac phase motor. error, VCM. The in-amp, by virtue of its high common-
mode rejection, will amplify the differential signal while
IN-AMPS: AN EXTERNAL VIEW rejecting VCM and any common-mode noise.
Figure 2 shows a functional block diagram of an instru- Of course, power must be supplied to the in-amp—as
mentation amplifier. with op-amps, this is normally a dual supply voltage that
Since an ideal instrumentation amplifier detects only will operate the in-amp over a specified range. Alterna-
the difference in voltage between its inputs, any common- tively, an in-amp specified for “single supply”
mode signals (potentials that are equal on both inputs), (rail-to-rail) operation may be used.
such as noise or voltage drops in ground lines, are An instrumentation amplifier may be assembled using
rejected at the input stage without being amplified. one or more operational amplifiers or it may be of
Normally, a single resistor is used to program the in- monolithic construction. Both technologies have their
amp for the desired gain. The user can calculate the virtues and limitations. In general, discrete (op-amp)
required value of resistance for a given gain, using the in-amps offer wide flexibility at low cost and can some-
gain equation listed in the in-amp’s spec sheet. times provide performance unattainable with
The output of an instrumentation amplifier often has its monolithic designs, such as very high bandwidth. In
own sense and reference terminals which, among their contrast, monolithic designs provide the complete in-
other uses, allow the in-amp to drive a load that may be in amp function, fully specified, usually factory trimmed,
a distant location. and often to higher dc precision than discrete designs.
Monolithic in-amps are also much smaller in size, lower
Figure 2 shows the input and output commons being in cost, and easier to apply. Discrete op-amp designs
returned to the same potential, in this case to power will be discussed first.
supply “ground.” This “star” ground connection is a

NOISE GAIN
SELECT DC
SU PO
PP WE
SIGNAL LIE R
SOURCE S

NON-
INVERTING
RDIF INPUT
2 SENSE

RCM VOUT
VDIF INSTRUMENTATION
AMPLIFIER

NOISE
RDIF LOAD
INVERTING REFERENCE
2
INPUT

VCM COMMON-MODE NOISE

VOLTAGE

GAIN SELECTION IS ACCOMPLISHED EITHER BY

TYING PINS TOGETHER OR BY THE USE OF
EXTERNAL GAIN SETTING RESISTORS SUPPLY GROUND
(LOAD RETURN)

Figure 2. Basic Instrumentation Amplifier

–4–
INSIDE AN INSTRUMENTATION mismatch in just one of the resistors will degrade the
AMPLIFIER CMR to a level of 66 dB (1 part in 2000). Similarly,
A Simple Op-Amp Subtractor Provides an a source resistance imbalance of 100 Ω will degrade
In-Amp Function CMR by 6 dB.
The simplest (but still very useful) method of imple- In spite of these problems, this type of “bare bones” in-
menting a differential gain block is shown in Figure 3. amp circuit, often called a “difference amplifier or
If R1 = R3 and R2 = R4, then: subtractor,” is useful as a building block within higher
VOUT = (VIN#2 – VIN#1) (R2/R1) performance in-amps. It is also very practical as a stand-
alone functional circuit in video and other high-speed
Although this circuit does provide in-amp function- uses, or in low frequency, high CMV applications,
amplifying differential signals while rejecting those that where the input resistors divide down the input voltage
are common-mode—it also has some serious limita- as well as provide input protection for the amplifier.
tions. First, the impedances of the inverting and Some monolithic in-amps such as the Analog Devices’
noninverting inputs are relatively low and unequal. In AD629 employ a variation of the simple subtractor in
this example, the input impedance to VIN#1 equals their design. This allows the in-amp to handle common-
100 kΩ, while the impedance of VIN#2 is twice that, mode input voltages higher than its own supply voltage.
equaling 200 kΩ. Therefore, when voltage is applied to For example, when powered from a ± 15 V supply, the
one input, while grounding the other, different currents AD629 can amplify signals with common-mode volt-
will flow, depending on which input receives the applied ages as high as ± 270 V.
voltage (this unbalance in the sources resistances will
degrade the circuit’s CMRR). Improving the Simple Subtractor with Input
Buffering
Furthermore, this circuit requires a very close ratio An obvious way to significantly improve performance
match between resistor pairs R1/R2 and R3/R4; other- is to add high input impedance buffer amplifiers
wise, the gain from each input will be different—directly ahead of the simple subtractor circuit, as shown in the
affecting common-mode rejection. For example, at a three op-amp instrumentation amplifier circuit of
gain of 1, with all resistors of equal value, a 0.1% Figure 4.
R1 R2
100kV 100kV
VIN#1
INVERTING
INPUT 2
R2 A1 6 VOUT
VOUT = (VIN#2 – VIN#1)(–––)
R1
FOR R1 = R3, R2 = R4 3 A1 = AD705, OP97
R3 R4
100kV 100kV
VIN#2 REFERENCE
NONINVERTING
INPUT

Figure 3. A One Op-Amp In-Amp Circuit Functional Diagram

A1 & A2: AD706, OP297

A3: AD705, OP97
VIN#1 3
10kV 10kV
INVERTING 1
INPUT
A1
R1 R2
2

2
R2 VOUT
VOUT = (VIN#2 – VIN#1)( ——) A3 6
R1
FOR R1 = R3, R2 = R4 3

6
R3 R4 REFERENCE
A2 7
VIN#2 10kV 10kV
5
NONINVERTING INPUT OUTPUT
INPUT SECTION SECTION

Figure 4. A Subtractor Circuit with Input Buffering

–5–
This circuit now provides matched, high impedance The “classic” three op-amp in-amp circuit is a clever
inputs so that the impedances of the input sources will modification of the buffered subtractor circuit of Figure
have a minimal effect on the circuit’s common-mode 5. As with the previous circuit, op-amps A1 and A2 of
rejection. The use of a dual op-amp for the two input Figure 6 buffer the input voltage. But in this configura-
buffer amplifiers is preferred since they will better track tion, a single gain resistor, RG, is connected between the
each other over temperature and save board space. summing junctions of the two input buffers, replacing
Although the resistance values are different, this circuit R6 and R7. The full differential input voltage will now
has the same transfer function as the circuit of Figure 3. appear across RG (because the voltage at the summing
Figure 5 shows a further improvement: now the input junction of each amplifier is equal to the voltage applied
buffers are operating with gain, which provides a circuit to its + input). Since the amplified input voltage (at the
with more flexibility. If R5 = R8 and R6 = R7 and, as outputs of A1 and A2) appears differentially across the
before R1 = R3 and R2 = R4, then: three resistors, R5, RG, and R6, the differential gain may
be varied by just changing RG.
VOUT = (VIN#2 – VIN#1) (1 + R5/R6) (R2/R1)
Another advantage of this connection is that once the
While the circuit of Figure 5 does increase gain (equally) subtractor circuit has been set up with its ratio-matched
for differential signals, it also increases the gain for resistors, no further resistor matching is required when
common-mode signals. changing gains. If R5 = R6 and R1 = R3 and R2 = R4,
The Three Op-Amp In-Amp then:
The circuit of Figure 6 provides a final refinement and VOUT = (VIN#2 – VIN#I) (1 + 2R5/RG)(R2/R1)
has become the most popular configuration for instru-
mentation amplifier design.
A1 & A2: AD706, OP297
A3: AD705, OP97
VIN#1 3
10kV 10kV
INVERTING 1
INPUT
A1
R1 R2
2
R5

R5 R2 R6
VOUT = (VIN#2 – VIN#1)( 1 + ——)(——) 2
R6 R1 1kV
A3 6 VOUT
FOR R1 = R3, R2 = R4, R5 = R8, R6 = R7 R7
1kV 3

6 R8
R3 R4 REFERENCE
A2 7
VIN#2 10kV 10kV
5
NONINVERTING INPUT OUTPUT
INPUT SECTION SECTION

Figure 5. A Buffered Subtractor Circuit with Buffer Amplifiers Operating with Gain

A1 & A2: AD706, OP297

A3: AD705, OP97
VIN#1 3
10kV 10kV
INVERTING 1 SENSE
INPUT
A1
R1 R2
2
R5
2
2R5 R2 RG
VOUT = (VIN#2 – VIN#1)( 1 + ——)(——) A3 6 VOUT
GR R1 2kV
FOR R1 = R3, R2 = R4, R5 = R6 3

6 R6
R3 R4 REFERENCE
A2 7
VIN#2 10kV 10kV
5
NONINVERTING INPUT OUTPUT
INPUT SECTION SECTION

Figure 6. The “Classic” Three Op-Amp In-Amp Circuit

–6–
Since the voltage across RG equals VIN, the current very high (>106 Ω) source impedances. FET amplifiers
through RG will equal: (VIN/RG). Amplifiers A1 and A2 usually have lower CMR, higher offset voltage, and
will, therefore, operate with gain and amplify the input higher offset drift than bipolar amplifiers. They also may
signal. Note, however, that if a common-mode voltage provide a higher slew rate for a given amount of power.
is applied to the amplifier inputs, the voltages on each The sense and reference terminals (Figure 6) permit the
side of RG will be equal and no current will flow through user to change A3’s feedback and ground connections.
this resistor. Since no current flows through RG (and, The sense pin may be externally driven for servo and
therefore, through R5 and R6), amplifiers A1 and A2 other applications where the gain of A3 needs to be
will operate as unity gain followers. Therefore, common- varied. Likewise, the reference terminal allows an exter-
mode signals will be passed through the input buffers at nal offset voltage to be applied to A3. For normal
unity gain, but differential voltages will be amplified by operation the sense and output terminals are tied to-
the factor (1 + (2 RF/RG)). gether, as are reference and ground.
In theory, this means that the user may take as much Amplifiers with bipolar input stages will tend to
gain in the front end as desired (as determined by RG) achieve both higher CMR and lower input offset
without increasing the common-mode gain and error. voltage drift than FET input amplifiers. Superbeta
That is, the differential signal will be increased by gain, bipolar input stages combine many of the benefits of
but the common-mode error will not, so the ratio (Gain both FET and bipolar processes, with even lower IB
(VDIFF)/(VERROR CM)) will increase. Thus, CMRR will drift than FET devices.
theoretically increase in direct proportion to gain—a
very useful property. A common (but frequently overlooked) pitfall for the
unwary designer using a three op-amp in-amp design is
Finally, because of the symmetry of this configuration, the reduction of common-mode voltage range which
common-mode errors in the input amplifiers, if they occurs when the in-amp is operating at high gain. Figure
track, tend to be canceled out by the output stage 7 is a schematic of a three op-amp in-amp operating at
subtractor. This includes such errors as common-mode a gain of 1000.
rejection vs. frequency. These features explain the popu-
larity of this configuration. In this example, the input amplifiers, A1 and A2, are
operating at a gain of 1000, while the output amplifier
Three Op-Amp In-Amp Design Considerations is providing unity gain. This means that the voltage at
Three op-amp instrumentation amplifiers may be con- the output of each input amplifier will equal one-half
structed using either FET or bipolar input operational the peak-to-peak input voltage times 1000, plus any
amplifiers. FET input op-amps have very low bias common-mode voltage that is present on the inputs (the
currents and are generally well-suited for use with common-mode voltage will pass through at unity gain
+5 VOLTS PLUS CMV*
3
10kV 10kV
A1 1

2
50kV
INVERTING 2
INPUT VOUT
A3 6
SIGNAL VOLTAGE
100V
10mV p-p 3
NONINVERTING
INPUT *WITH 10mV p-p INPUT SIGNAL
APPLIED, OUTPUT FROM A1 & A2
COMMON-MODE WILL BE: 5mV 3 1000 = 5V PLUS
6 50kV
ERROR VOLTAGE THE COMMON-MODE VOLTAGE, CMV
A2 7
10kV 10kV
5
–5 VOLTS PLUS CMV*

Figure 7. A Three Op-Amp In-Amp Showing Reduced CMV Range

–7–
regardless of the differential gain). Therefore, if a 10 mV Input resistance is high and balanced, thus permit-
differential signal is applied to the amplifier inputs, ting the signal source to have an unbalanced output
amplifier Al’s output will equal +5 volts plus the impedance. The circuit’s input bias currents are set by
common-mode voltage and A2’s output will be –5 volts the input current requirements of the noninverting
plus the common-mode voltage. If the amplifiers are input of the two op-amps which, typically, are very low.
operating from +15 volt supplies, they will usually Disadvantages of this circuit include the inability to
have 7 volts or so of headroom left, thus permitting an operate at unity gain, a decreased common-mode volt-
8-volt common-mode voltage—but not the full age range as circuit gain is lowered, and its usually poor
12 volts of CMV which, typically, would be available ac common-mode rejection. The poor CMR is due to
at unity gain (for a 10 mV input). Higher gains, or the unequal phase shift occurring in the two inputs,
lower supply voltages, will further reduce the common- VIN#1 and VIN#2. That is, the signal must travel through
mode voltage range. amplifier A1 before it is subtracted from VIN#2 by ampli-
The Basic Two Op-Amp Instrumentation fier A2. Thus, the voltage at the output of A1 is slightly
Amplifier delayed or phase-shifted with respect to VIN#1.
Figure 8 is a schematic of a typical two op-amp in-amp Minimum circuit gains of 5 are commonly used with
circuit. It has the obvious advantage of requiring only the two op-amp in-amp circuit, as this permits an
two, rather than three, operational amplifiers with sub- adequate dc common-mode input range and also pro-
sequent savings in cost and power consumption. vides sufficient bandwidth for most applications. The
However, the nonsymmetrical topology of the two op- use of rail-to-rail (single supply) amplifiers will provide
amp in-amp circuit can lead to several disadvantages a common-mode voltage range that extends down to
compared to the three op-amp design, most notably –VS (or “ground” in single supply operation), plus true
lower ac CMRR, which limits its usefulness. “rail-to-rail” output voltage range (i.e., an output swing
The transfer function of this circuit is: from +VS to –VS).
VOUT = (VIN#2 – VIN#1) (1 + R4/R3)
for R1 = R4 and R2 = R3

RG (OPTIONAL)
A1 & A2: AD706, OP297

R1 R2 R3 R4

49.9kV 49.9kV
0.1mF

2 8
A1 1 5
RP*
VIN#1 3 A2 7 VOUT
49.9kV 6 4 0.1mF
RP*
VIN#2
49.9kV –VS

R4 + (––––)
VOUT = (VIN#2 – VIN#1)(1 + –––) 2R4
R3 RG * OPTIONAL INPUT PROTECTION
RESISTOR FOR GAINS GREATER
FOR R1 = R4, R2 = R3 THAN 100 OR INPUT VOLTAGES
EXCEEDING THE SUPPLY VOLTAGE

Figure 8. A Two Op-Amp In-Amp Circuit

–8–
Table I shows amplifier gain vs. circuit gain for the voltage at both of the signal inputs, VIN1 and VIN2, is
circuit of Figure 8 and gives practical 1% resistor values zero, the output of A1 will equal:
for several common circuit gains. VO1 = –VREF (R2/R3)
Table I. Operating Gains of Amplifiers A1 and A2 A positive voltage applied to VREF will tend to drive the
and Practical 1% Resistor Values for the Circuit of output voltage of A1 negative, which is clearly NOT
Figure 8 possible if the amplifier is operating from a single power
supply voltage (+VS and 0 V).
Circuit Gain Gain R2, R3 R1, R4
The gain from the output of amplifier A1 to the circuit’s
Gain of A1 of A2 (k⍀) (k⍀)
output, VOUT, at A2, is equal to:
1.10 11.00 1.10 499 49.9 VOUT = –VO1 (R4/R3)
1.33 4.01 1.33 150 49.9
1.50 3.00 1.50 100 49.9 The gain from VREF to VOUT is the product of these two
2.00 2.00 2.00 49.9 49.9 gains and equals:
10.1 1.11 10.10 5.49 49.9 VOUT = (–VREF (R2/R3))(–R4/R3)
101.0 1.01 101.0 499 49.9
In this case, R1 = R4 and R2 = R3. Therefore, the
1001 1.001 1001 49.9 49.9
“reference gain” is +1 as expected. Note that this is the
result of two inversions, in contrast to the noninverting
Two Op-Amp In-Amps—Common-Mode Design signal path of the reference input in a typical three op-
Considerations for Single Supply Operation amp IA circuit.
If the two op-amp in-amp circuit of Figure 9a is exam-
ined from the reference input, it can be seen that it is Just as with the three op-amp IA, the common-mode
simply a cascade of two inverters. Assuming that the voltage range of the two op-amp IA can be limited by
single supply operation and by the choice of refer-
ence voltage.

R1 R2 R3 R4
VREF
4kV 1kV 1kV 4kV

A1
VO1 A2 VOUT

VIN#1
VIN#2

Figure 9a. The Two Op-Amp In-Amp Architecture

–9–
 +5V
2.5V 3 –0.25 = 0.625V

+2.5V R1 R2 R3 R4

AD580, 4kV 1kV 1kV 4kV

AD584 0V –0.625V
GAIN = –4
A1 VO1 0V
VIN#1 A2 VOUT
0V GAIN = 0.25
0V

VIN#2 –0.625V 3 –4 = +2.5

0V

Figure 9b. Output Swing Limitations of Two Op-Amp In-Amp Using A +2.5 V Reference

Figure 9b is a schematic of a two op-amp in-amp Assume that a sinusoidal common-mode voltage, VCM,
operating from a single +5 V power supply. The refer- at a frequency FCM, is applied (common-mode) to
ence input is tied to VS/2 which, in this case, is +2.5 V. inputs VIN1 and VIN2 (Figure 9b). Ideally, the amplitude
The output voltage should ideally be +2.5 V for a of the resulting ac output voltage (the common-mode
differential input voltage of zero volts and for any error) should be zero, independent of frequency, FCM,
common-mode voltage within the power supply voltage at least over the range of normal ac power line (“mains”)
range (0 V to +5 V). frequencies: 50 Hz to 400 Hz. Power lines tend to be
As the common-mode voltage is increased from +2.5 V the source of much “common-mode interference.”
toward +5 V, the output voltage of A1 (VO1) will equal: If the ac common-mode error is zero, amplifier A2 and
VO1 = VCM + ((VCM – VREF) (R2/R1)) gain network R3, R4 must see zero instantaneous differ-
ence between the common-mode voltage, applied
In this case, VREF = +2.5 V and R2/R1 = 1/4. The directly to VIN2, and the version of the common-mode
output voltage of A1 will reach +5 V when VCM = voltage that is amplified by A1 and its associated gain
+4.5 V. Further increases in common-mode voltage network R1, R2. Any “dc” common-mode error
obviously cannot be rejected. In practice, the input (assuming negligible error from the amplifier’s own
voltage range limitations of amplifiers A1 and A2 may CMRR) can be nulled by trimming the ratios of R1, R2,
limit the IA’s common-mode voltage range to less than R3, and R4, to achieve the balance:
+4.5 V.
R1 ≡ R4 and R2 ≡ R3
Similarly, as the common-mode voltage is reduced from
+2.5 V toward zero volts, the output voltage of A1 will However, any phase shift (delay) introduced by ampli-
“hit” zero for a VCM of 0.5 V. Clearly, the output of A1 fier A1 will cause the phase of VO1 to slightly lag behind
cannot go more negative than the negative supply line the phase of the directly applied common-mode voltage
(assuming no “charge pump”), which, for a single of VIN2. This difference in phase will result in an
supply connection, equals zero volts. This negative or instantaneous (vector) difference in VO1 and VIN2, even
“zero in” common-mode range limitation can be over- if the amplitude of both voltages are at their ideal levels.
come by proper design of the in-amp’s internal level This will cause a frequency-dependent common-mode
shifting, as in the AD627 monolithic two op-amp IA. error voltage at the circuit’s output, VOUT. Further, this
However, even with good design, some positive com- ac common-mode error will increase linearly with
mon-mode voltage range will be “traded-off” to achieve common-mode frequency, because the phase shift
operation at zero common-mode voltage. through A1 (assuming a single-pole roll-off) will in-
crease directly with frequency. In fact, for frequencies
Another, and perhaps more serious, limitation of the less than 1/10th the closed-loop bandwidth (fT1) of A1,
standard two amplifier IA circuit, compared to three the common-mode error (referred to the input of the
amplifier designs, is the intrinsic difficulty of achieving in-amp) can be approximated by:
high ac common-mode rejection. This limitation stems

(100%) = (100%)
from the inherent imbalance in the common-mode VE /G fCM
signal path of the two-amplifier circuit. % CM Error =
VCM fTI

–10–
 +5V

A2
VIN–
1/2
A1 OP296 VOUT
VIN+
1/2
OP296

–5V
R1 R2 R3 R4
9999.5V 999.76V 1000.2V 9997.7V

Figure 10a. “Homebrew In-Amp” Example

Where VE is the common-mode error voltage at VOUT, (common-mode voltage = +2.5 V) is to be amplified.
and G is the differential gain, in this case five. This example compares the resulting errors from a
For example, if A1 has a closed-loop bandwidth of discrete two op-amp in-amp and from the AD627. The
100 kHz (a typical value for a micropower op-amp), discrete implementation uses a four-resistor precision
when operating at the gain set by R1 and R2, and the network (1% match, 50 ppm/°C tracking).
common-mode frequency is 100 Hz, then:
+5V

% CM Error =
100 Hz
100 kHz
(100%) = 0.1%
A common-mode error of 0.1% is equivalent to 60 dB RG
of common-mode rejection. So, in this example, even if 40.2kV
1% AD627A VOUT
this circuit were trimmed to achieve 100 dB CMR at dc, +10PPM/°C
RG
this would be valid only for frequencies less than 1 Hz. 2.5V
At 100 Hz, the CMR could never be better than 60 dB.
The AD627 monolithic in-amp embodies an advanced
version of the two op-amp IA circuit which overcomes GAIN = 9.98 (5 + (200kV/RG))
these ac common-mode rejection limitations. As illus-
trated in Figure 31, the AD627 maintains over 80 dB of Figure 10b. AD627 Monolithic In-Amp Circuit
CMR out to 8 kHz (Gain of 1000), even though the The errors associated with each implementation show
bandwidth of amplifiers A1 and A2 is only 150 kHz. the integrated in-amp to be more precise, both at
Make vs. Buy: A Two Op-Amp In-Amp Example ambient and over temperature. It should be noted that
The examples in Figures 10a and 10b serve as a the discrete implementation is also more expensive.
good comparison between the errors associated This is primarily due to the relatively high cost of the low
with an integrated and a discrete in-amp implemen- drift precision resistor network.
tation. A ± 100 mV signal from a resistive bridge

–11–
Note that a mismatch of 0.1% between the four gain 180 Hz (the third harmonic of the 60 Hz ac power line
setting resistors will determine the low frequency CMR frequency) would result in an output voltage of approxi-
of a two op-amp in-amp. The plot in Figure 11a shows mately 800 µV p-p, compared to a level of 160 µV p-p at
the practical results, at ambient temperature, of resistor the 60 Hz fundamental. To put this in context, a 12-bit
mismatch. The CMR of the circuit in Figure 10a (Gain data acquisition system with an input range of 0 V to
= 11) was measured using four resistors which had a 2.5 V, has an LSB weighting of 610 µV.
mismatch of almost exactly 0.1% (R1 = 9999.5 Ω, R2 By contrast, the AD627 uses precision laser trimming of
= 999.76 Ω, R3 = 1000.2 Ω, R4 = 9997.7 Ω). internal resistors along with patented ac CMR balanc-
ing circuit to achieve a higher dc CMR and a wider
120
bandwidth over which the CMR is flat. This is shown in
110 Figure 11b.
100
120
90
110
80
CMR – dB

100

70 90
G = 1000
80
60

CMR – dB
70
50 G = 100
60
40
50
G=5
30 40
20 30
1 10 100 1k 10k 100k
FREQUENCY – Hz 20

10
Figure 11a. CMR over Frequency of
0
“Homebrew” In-Amp 1 10 100 1k 10k 100k
FREQUENCY – Hz
As expected, the CMR at dc was measured at about
84 dB (calculated value is 85 dB). However, as the Figure 11b. CMR over Frequency of AD627 In-
frequency increases, the CMR quickly degrades. For Amp Circuit
example, a 200 mV p-p common-mode voltage at

–12–
Chapter II
Monolithic Instrumentation Amplifiers
ADVANTAGES OVER OP-AMP IN-AMPS addition, these components will stay matched over tem-
To satisfy the demand for in-amps that would be easier perature, assuring excellent performance over a wide
to apply, monolithic IC instrumentation amplifiers temperature range. IC technologies such as laser wafer
were developed. These circuits incorporate variations trimming allow monolithic integrated circuits to be
in the three op-amp and two op-amp in-amp circuits “tuned-up” to very high accuracy and provide low cost,
previously described, while providing laser-trimmed high volume manufacturing. A final advantage of mono-
resistors and other benefits of monolithic IC technol- lithic devices is that they are available in very small, very
ogy. Since both active and passive components are now low cost SOIC, or microSOIC packages designed for use
within the same die they can be closely matched—this in high volume production. Table II provides a quick
will ensure that the device provides a high CMR. In performance summary of Analog Devices’ in-amps.

Table II. Latest Generation Analog Devices In-Amps Summarized

Input RTI Input

Supply BW Offset Input Noise Bias
Current kHz Voltage Offset nV/√Hz Current
Product Features (Typ) (G = 1) (Max) Drift (G = 10) (Max)
AD620 General Purpose 0.9 mA 800 125 µV 1 µV/°C 12 Typ 2 nA
AD622 Low Cost 0.9 mA 800 125 µV 1 µV/°C 14 Typ 5 nA
AD621 Precise Gain 0.9 mA 800 250 µV (RTI) 2.5 µV/°C (RTI) 13 Typ (RTI) 2 nA
AD623 Low Cost, Single Supply 375 µA 800 200 µV 2 µV/°C 35 Typ 25 nA
AD627 Micropower 60 µA 80 250 µV 3 µV/°C 42 Typ 10 nA
AD626 High CMV 1.5 mA 100 500 µV 1 µV/°C 250 Typ NS
AD830 Video In-Amp 15 mA 85 MHz 1500 µV 70 µV/°C 27 Typ 10 µA
AD629 High CMV Diff Amp 0.9 mA 500 kHz 1 mV 6 µV/°C 550 Typ (G = 1) NA
AMP03 High BW, G = 1 3.5 mA 3 MHz 400 µV NS 750 (RTO) NS
NS: Not Specified.
NA: Not Applicable.

–13–
MONOLITHIC IN-AMP DESIGN—THE The value of RG also determines the transconductance
INSIDE STORY of the preamp stage. As RG is reduced for larger gains,
Monolithic In-Amps Optimized for High the transconductance increases asymptotically to that
Performance of the input transistors. This has three important
Analog Devices introduced the first high perform- advantages: First, the open-loop gain is boosted for
ance monolithic instrumentation amplifier, the increasing programmed gain, thus reducing gain
AD520, in 1971. related errors.
In 1992, the AD620 was introduced and has now Next, the gain bandwidth product (determined by C1,
become the industry standard high-performance, low C2 and the preamp transconductance) increases with
cost in-amp. The AD620 is a complete monolithic programmed gain, thus optimizing the amplifier’s fre-
instrumentation amplifier offered in both 8-lead DIP quency response. Figure 13 shows the AD620’s
and SOIC packages. The user can program any de- closed-loop gain vs. frequency.
sired gain from 1 to 1000 using a single external
resistor. By design, the required resistor values for 1000

gains of 10 and 100 are standard 1% metal film

resistor values.
100
+VS

GAIN – V/V
I1 20␮A VB 20␮A I2
IB 10
COMPENSATION IB COMPENSATION
A1 A2
10k⍀
C1 C2
10k⍀
1
A3 OUTPUT

R3 10k⍀ 10k⍀
R1 R2 REF
400⍀
– IN Q1 Q2 +IN
R4
RG 400⍀ 0.1
100 1k 10k 100k 1M 10M
GAIN GAIN FREQUENCY – Hz
SENSE SENSE

Figure 13. AD620 Closed-Loop Gain vs. Frequency

–VS
The AD620 also has superior CMR over a wide fre-
Figure 12. A Simplified Schematic of the AD620 quency range as shown by Figure 14.
The AD620 is a second-generation version of the classic
AD524 in-amp and embodies a modification of the 160

classic three op-amp circuit. Laser trimming of on-chip G = 1000

140
thin film resistors R1 and R2 allows the user to accu-
rately set the gain—to 100 within ± 0.5% max error, 120
G = 100

using only one external resistor. Monolithic construc- G = 10

100
tion and laser wafer trimming allow the tight matching
CMR – dB

G=1
and tracking of circuit components. 80
A preamp section comprised of Q1 and Q2 provides
60
additional gain up front. Feedback through the Q1-A1-
R1 loop and the Q2-A2-R2 loop maintains a constant 40
collector current through the input devices Q1, Q2,
thereby impressing the input voltage across the external 20

gain setting resistor RG. This creates a differential gain 0

from the inputs to the A1/A2 outputs given by G = 0.1 1 10 100 1k 10k 100k 1M
(R1 + R2)/RG + 1. The unity gain subtractor A3 FREQUENCY – Hz

removes any common-mode signal, yielding a single- Figure 14. AD620 CMR vs. Frequency
ended output referred to the REF pin potential.

–14–
Figures 15 and 16 show the AD620’s gain nonlinearity So that:
and small signal pulse response.
49.4 kΩ
RG =
G −1
Where resistor RG is in kΩ.
.... .... .... ........ .... .... .... ........
The value of 24.7 kΩ was chosen so that standard 1%
resistor values could be used to set the most popular gains.
The AD620 was the first in a series of high performance,
low cost monolithic in-amps. Table III provides a brief
comparison of the basic performance of the AD620 in-
amp family.

.... .... .... ........ .... .... .... ........ Table III. AD620 Series In-Amps

Max Max
Input Input Input Stage
Voltage Bias Operating
Figure 15. The AD620’s Gain Nonlinearity. Model Noise Current Current (Typ)
G = 100, RL = 10 kΩ, Vert Scale: 100 µ V = 10 ppm,
Horiz Scale 2 V/Div. AD620 13 nV/√Hz 2 nA 20 µA
AD621 13 nV/√Hz 2 nA 20 µA
AD622 14 nV/√Hz 5 nA 20 µA
AD623 35 nV/√Hz 25 nA* 1.5 µA
AD627 42 nV/√Hz 10 nA* 0.8 µA
.... .... .... ........ ........ .... ........
*Note that the AD623 and AD627 are single supply devices.
Because of this, they do not include input current compensation
in their design.
The AD622 is a low cost version of the AD620 (see
AD620 simplified schematic). The AD622 uses stream-
lined production methods to provide most of the
performance of the AD620, at lower cost.
.... .... .... ........ ........ .... ........
Figures 17, 18, and 19 show the AD622’s CMR vs.
frequency, gain nonlinearity, and closed-loop gain vs.
frequency.
Figure 16. The Small Signal Pulse Response of 160
the AD620. G = 10, RL= 2 kΩ, CL = 100 pF.
140 G = 1000
Finally, the input voltage noise is reduced to a value of
120 G = 100
9 nV/√Hz, determined mainly by the collector current
and base resistance of the input devices. 100 G = 10
CMR – dB

The internal gain resistors, R1 and R2 are trimmed to

80 G=1
an absolute value of 24.7 kΩ, allowing the gain to be
programmed accurately with a single external resistor. 60
The gain equation is then:
40

49.4 kΩ
G = 20
RG
0
0.1 1 10 100 1k 10k 100k 1M
FREQUENCY – Hz

Figure 17. AD622 CMR vs. Frequency (RTI) 0 to

1 kΩ Source Imbalance
–15–
 1000 error of 0.15% and ± 5 ppm/°C gain drift, the AD621
has much greater built-in accuracy than the AD620.

100
10µV 2V
GAIN – V/V

100

90
10

ø
1

10
0%
0
100 1k 10k 100k 1M 10M
FREQUENCY – Hz

Figure 18. AD622 Closed-Loop Gain vs. Frequency

Figure 19. The AD622’s Gain Nonlinearity
The AD621 is also similar to the AD620, except that G = 1, RL = 10 kΩ, Vert Scale: 20 µ V = 2 ppm
for gains of 10 and 100, the gain setting resistors are
The AD621 may also be operated at gains between 10
on the die—no external resistors are used. A single
and 100 by using an external gain resistor, although gain
external jumper (between Pins 1 and 8) is all that is
error and gain drift over temperature will be degraded.
needed to select a gain of 100. For a gain of 10, leave Pin
Using external resistors, device gain is equal to:
1 and Pin 8 open. This provides excellent gain stability
over temperature, as the on-chip gain resistor tracks G = (R1 + R2) / RG + 1
the TC of the feedback resistor. Figure 20 is a simpli-
fied schematic of the AD621. With a max total gain

+VS

I1 20mA VB 20mA I2
IB
COMPENSATION IB COMPENSATION
A1 A2 10kV
C1 C2
10kV
OUTPUT
A3
6
25kV 10kV 10kV
R3 R1 25kV R2
REF
400V R5 5
– IN Q1 5555.6V Q2 +IN
2 R4 3
R6 400V
555.6V
1 8
G = 100 G = 100

4
–VS

Figure 20. A Simplified Schematic of the AD621

–16–
Figures 21 and 22 show the AD621’s CMR vs. fre- Figures 23 and 24 show the AD621’s gain nonlinearity
quency and closed-loop gain vs. frequency. and small signal pulse response.
160
100mV 2V
140 GAIN = 100
100
120 90

100 GAIN = 10
CMR – dB

80

60

10
40
0%

20

0
0.1 1 10 100 1k 10k 100k 1M
FREQUENCY – Hz
Figure 23. The AD621’s Gain Nonlinearity.
G = 10, RL = 10 kΩ, Vert Scale: 100 µ V/
Figure 21. AD621 CMR vs. Frequency. Div = 100 ppm/Div, Horiz Scale 2 V/Div.
1000

20mV 10ms

100
100
CLOSED-LOOP GAIN – V/V

90

10

10
1
0%

0.1
100 1k 10k 100k 1M 10M
FREQUENCY – Hz Figure 24. The Small Signal Pulse Response of
the AD621. G = 10, RL = 2 kΩ, CL = 100 pF.
Figure 22. AD621 Closed-Loop Gain vs. Frequency

–17–
Monolithic In-Amps Optimized for Single Since the inputs (i.e., the bases of Q1 and Q2) can
Supply Operation operate at “ground” i.e., 0 V (or, more correctly, at
Single supply in-amps have special design problems 200 mV below ground), it was not possible to provide
that need to be addressed. The input stage needs to be input current compensation for the AD623. However,
able to amplify signals that are at ground potential (or the input bias current of the AD623 is still very small:
very close to ground), and the output stage needs to be only 25 nA max.
able to swing to within a few millivolts of ground or the The output voltage at Pin 6 is measured with respect to
supply rail. Low power supply current is also important. the “reference” potential at Pin 5. The impedance of the
And, when operating from low power supply voltages, reference pin is 100 kΩ. Internal ESD clamping diodes
the in-amp needs to have an adequate gain-bandwidth allow the input, reference, output, and gain terminals of
product, low offset voltage drift, and good CMR vs. gain the AD623 to safely withstand overvoltages of 0.3 V
and frequency. above or below the supplies. This is true for all gains,
The AD623 is an instrumentation amplifier based on and with power on or off. This last case is particularly
the three op-amp in-amp circuit, modified to assure important since the signal source and the in-amp may be
operation on either single or dual power supplies, even powered separately. If the overvoltage is expected to
at common-mode voltages at or even below the nega- exceed this value, the current through these diodes
tive supply rail (or below “ground” in single supply should be limited to 10 mA, using external current
operation). Other features include: rail-to-rail output limiting resistors (see Input Protection section). The
voltage swing, low supply current, microSOIC packag- value of these resistors is defined by the in-amp’s
ing, low input and output voltage offset, microvolt/dc noise level, the supply voltage, and the required
offset level drift, high common-mode rejection, and overvoltage protection needed.
only one external resistor to set the gain. The bandwidth of the AD623 is reduced as the gain is
As shown in Figure 25, the input signal is applied to increased, since A1 and A2 are voltage feedback op-
PNP transistors acting as voltage buffers and dc level- amps. However, even at higher gains, the AD623 still
shifters. A resistor trimmed to within 0.1% of 50 kΩ in has enough bandwidth for many applications.
each amplifiers’ (A1 and A2) feedback path assures
accurate gain programmability. +VS
7
The differential output is:
1.5mA
 100 kΩ  +
VO = 1 +  + VC
+IN
Q1 –A1
 RG  3
50kV 50kV 50kV
where RG is in kΩ. 4 1
–
–VS GAIN A3 OUTPUT
The differential voltage is then converted to a single- RESISTOR + 6
+VS 8
ended voltage using the output difference amplifier, 7 50kV 50kV 50kV
REF
which also rejects any common-mode signal at the 5
output of the input amplifiers. 1.5mA
–
A2
Since all the amplifiers can swing to either supply rail, –IN +
Q2
as well as have their common-mode range extended to 2
below the negative supply rail, the range over which the
AD623 can operate is further enhanced. 4
–VS
Note that the base currents of Q1 and Q2 flow directly
“out” of the input terminals, unlike dual supply input- Figure 25. AD623 Simplified Schematic
current compensated in-amps such as the AD620.

–18–
The AD623’s gain is resistor-programmed by RG or, Table IV shows required values of RG for various gains.
more precisely, by whatever impedance appears be- Note that for G = 1, the RG terminals are unconnected
tween Pins 1 and 8. Figure 26 shows the gain vs. (RG = ∞ ). For any arbitrary gain, RG can be calculated
frequency of the AD623. The AD623 is laser-trimmed by using the formula:
to achieve accurate gains using 0.1% to 1% tolerance RG = 100 kΩ/(G – 1)
resistors.
Figure 27 shows the AD623’s CMR vs. Frequency.
70
Note that the CMR increases with gain up to a gain of
VREF = 2.5V 100 and that CMR also remains high over frequency,
60
up to 200 Hz. This ensures the attenuation of power line
50 common-mode signals (and their harmonics).
40
120
30
GAIN – dB

110
20
x1000
100
10
x10
0 90
x1

CMR – dB
–10 80
x100
–20 70
–30
100 1k 10k 100k 1M 60
FREQUENCY – Hz
50

Figure 26. AD623 Closed-Loop Gain vs. Frequency 40 VREF = 2.5V

30
Table IV. Required Value of Gain Resistor 1 10 100 1k 10k 100k
FREQUENCY – Hz
Desired 1% Std Table Calculated Gain
Gain Value of RG, ⍀ Using 1% Resistors Figure 27. AD623 CMR vs. Frequency, VS = ±5 V
The AD627 is a single supply, micropower instrumen-
2 100 k 2
tation amplifier that can be configured for gains
5 24.9 k 5.02
between 5 and 1,000, using just a single external
10 11 k 10.09
resistor. It provides a rail-to-rail output voltage swing,
20 5.23 k 20.12
using a single +3 V to +30 V power supply. With a
33 3.09 k 33.36
quiescent supply current of only 60 µA (typical), its
40 2.55 k 40.21
total power consumption is less than 180 µW, operating
50 2.05 k 49.78
from a +3 V supply.
65 1.58 k 64.29
100 1.02 k 99.04
200 499 201.4
500 200 501
1000 100 1001

–19–
Figure 28 shows the gain nonlinearity of the AD623. Figure 30 is a simplified schematic of the AD627. The
AD627 is a true “instrumentation amplifier” built using
two feedback loops. Its general properties are similar to
those of the classic “two op-amp” instrumentation
amplifier configuration, and can be regarded as such,
but internally the details are somewhat different. The
AD627 uses a modified “current feedback” scheme
which, coupled with interstage feedforward frequency
compensation, results in a much better CMRR
(Common-Mode Rejection Ratio) at frequencies
above dc (notably the line frequency of 50 Hz–60 Hz)
than might otherwise be expected of a low power
instrumentation amplifier.
As shown by Figure 30, A1 completes a feedback loop
which, in conjunction with V1 and R5, forces a constant
Figure 28. AD623 Gain Nonlinearity. collector current in Q1. Assume that the gain-setting
G = –10, 50 ppm/Div resistor (RG) is not present for the moment. Resistors
R2 and R1 complete the loop and force the output of A1
Figure 29 shows the small signal pulse response of the
to be equal to the voltage on the inverting terminal with
AD623.
a gain of (almost exactly) 1.25. A nearly identical feed-
back loop completed by A2 forces a current in Q2,
which is substantially identical to that in Q1, and A2
also provides the output voltage. When both loops are
balanced, the gain from the noninverting terminal to
VOUT is equal to 5, whereas the gain from the output of
A1 to VOUT is equal to –4. The inverting terminal gain
of A1, (1.25) times the gain of A2, (–4) makes the gain
from the inverting and noninverting terminals equal.
The differential mode gain is equal to 1 + R4/R3,
nominally five, and is factory trimmed to 0.01% final
accuracy (AD627B typ). Adding an external gain set-
ting resistor (RG) increases the gain by an amount equal
to (R4 + R1)/RG. The output voltage of the AD627 is
given by the following equation.
Figure 29. AD623 Small Signal Pulse Response.
G = 10, RL = 10 kΩ, CL = 100 pF. VOUT = [VIN(+) – VIN(–)] × (5 + 200 kΩ/RG) + VREF

EXTERNAL GAIN RESISTOR

R1 RG R4
100kV 100kV
REF
R2 R3
+VS
+VS 25kV 25kV
2kV
2kV Q2 +IN
–IN Q1

–VS
–VS
A1
A2 OUTPUT

R5 V1 R6
200kV 200kV
–VS

Figure 30. AD627 Simplified Schematic

–20–
Laser trims are performed on resistors R1 through R4 to
20mV/DIV
ensure that their values are as close as possible to the
absolute values in the gain equation. This ensures low
gain error and high common-mode rejection at all
practical gains.
Figure 31 shows the AD627’s CMR vs. frequency.

120
110

100
90
G = 1000 VOUT
80 0.5V/DIV
CMR – dB

70
G = 100
60
Figure 33. AD627 Gain Nonlinearity. VS = ± 2.5 V,
50 G=5
G=5
40
The AD627 also has excellent dynamic response, as
30
shown by Figure 34.
20
10
0
1 10 100 1k 10k 100k
FREQUENCY – Hz

Figure 31. AD627 CMR vs. Frequency

Figures 32 and 33 show the AD627’s gain vs. frequency
and gain nonlinearity.
70
G = 1000
60

50
CLOSED-LOOP GAIN – dB

G = 100
40

30
G = 10
20
Figure 34. The Small Signal Pulse Response of
the AD627. VS = ± 5 V, G = +10, RL = 20 kΩ, CL =
10 G=5
50 pF
0

–10

–20

–30
100 1k 10k 100k
FREQUENCY – Hz

Figure 32. AD627 Closed-Loop Gain vs. Frequency

–21–
Difference (Subtractor) Amplifier Products 120
TA = +258C
The AMP03 is a monolithic unity-gain, 3 MHz differ- 110
VS = 615V

COMMON-MODE REJECTION – dB
ential amplifier. Incorporating a matched thin-film 100
resistor network, the AMP03 features stable operation 90
over temperature without requiring expensive external 80

matched components. The AMP03 is a basic analog 70

building block for differential amplifier and instrumen- 60

50
tation applications (Figure 35).
40
The differential amplifier topology of the AMP03 serves 30
both to amplify the difference between two signals and to 20
provide extremely high rejection of the common-mode 10
input voltage. With a typical common-mode rejection 0
1 10 100 1k 10k 100k 1M
of 100 dB, the AMP03 solves common problems en- FREQUENCY – Hz
countered in instrumentation design. It is ideal for
performing either the addition or subtraction of two Figure 36. AMP03 CMR vs. Frequency
input signals without using expensive externally-matched
50
TA = +25°C
AMP03 40 VS = 615V

CLOSED-LOOP GAIN – dB
25kV 25kV 30
–IN 2 5 SENSE
20

7 +VCC 10

0
6 OUTPUT
–10

4 –VEE
–20

25kV 25kV –30

+IN 3 1 REFERENCE 100 1k 10k 100k 1M 10M
FREQUENCY – Hz

Figure 35. AMP03 Functional Block Diagram Figure 37. AMP03 Closed-Loop Gain vs. Frequency
precision resistors. Due to its high CMR over fre- Figure 38 shows the small signal pulse response of the
quency, the AMP03 is an ideal general-purpose amplifier AMP03.
for data acquisition systems that must operate in a noisy
environment. Figures 36 and 37 show the AMP03’s
CMR and closed-loop gain vs. frequency.

Figure 38. AMP03 Small Signal Pulse Response

–22–
The AD626 is a single or dual supply differential a resistor between Pin 7 and Analog GND. Because the
amplifier consisting of a precision balanced attenuator, on-chip resistors have an absolute tolerance of ± 20%
a very low drift preamplifier (A1), and an output buffer (although they are ratio matched to within 0.1%), at
amplifier (A2). It has been designed so that small least a 20% adjustment range must be provided. The
differential signals can be accurately amplified and nominal value for this gain setting resistor is equal to:
filtered in the presence of large common-mode voltages
(much greater than the supply voltage) without the use  50, 000 Ω 
R =   − 555 Ω
of any other active components.  GAIN − 10 
Figure 39 shows the main elements of the AD626. The
signal inputs at Pins 1 and 8 are first applied to dual
resistive attenuators R1 through R4 whose purpose is to
reduce the peak common-mode voltage at the input to
100
the preamplifier—a feedback stage based on the very 90
low drift op-amp A1. This allows the differential input
voltage to be accurately amplified in the presence of
large common-mode voltages—six times greater than
that which can be tolerated by the actual input to A1.
As a result, the input common-mode range extends to
six times the quantity (VS – 1 V). The overall common-
10
mode error is minimized by precise laser-trimming of 0%

R3 and R4, thus giving the AD626 a common-mode

rejection ratio of at least 10,000:1 (80 dB). The output
of A1 is connected to the input of A2 via a 100 kΩ (R12)
resistor to facilitate the low-pass filtering of the signal of
Figure 40. The Large Signal Pulse Response of
interest. The AD626 is easily configured for gains of 10
the AD626. G = 10
or 100. For a gain of 10, Pin 7 is simply left uncon-
nected; similarly, for a gain of 100, Pin 7 is grounded. Figure 40 shows the large signal pulse response of the
Gains between 10 and 100 are easily set by connecting AD626.

+VS FILTER

C1 AD626
R1 5pF
200kV R12
+IN 100kV
A1
–IN A2 OUT
R2 C2
200kV 5pF
R17
R3 R4 95kV
41kV 41kV R15
R9 10kV
10kV

R5
4.2kV R7 R8 R10 R14 R13
R11 R6
10kV 500V 500V 10kV 10kV 555V 10kV

GND GAIN = 100 –VS

Figure 39. AD626 Simplified Schematic

–23–
The AD629 is a unity gain difference amplifier designed Video Speed In-Amp Products
for applications that require the measurement of signals The AD830 is a wideband, differencing amplifier de-
with common-mode input voltages of up to ± 270 V. signed for general purpose signal processing from dc to
The AD629 has excellent ac and dc specifications that 10 MHz (Figure 43). High impedance inputs ease in-
keep errors low when measuring small difference volt- terfacing to finite source impedances and thus preserve
ages over a wide temperature range. Additionally, the its excellent common-mode rejection. In many respects,
AD629 keeps errors to a minimum by providing excel- such as high frequency common-mode rejection, it
lent CMR in the presence of high common-mode input offers significant improvements over discrete difference
voltages. Finally, it can operate from a wide power amplifier designs.
supply range of ± 2.5 V to ± 18 V.
The AD629 can replace costly isolation amplifiers in
applications that do not require galvanic isolation. Fig- 1 AD830 8
ure 41 is the connection diagram of the AD629. Figure GM
42 shows the AD629’s CMR vs. Frequency. 2 7
A=1
3 6
21.1kV AD629
REF A 1 8 NC GM C
380kV 380kV 4 5
–IN 2 7 +VS

380kV –
+IN 3 6 OUTPUT
Figure 43. AD830 Connection Diagram
+

–VS 4 5 REF B The AD830 uses an active feedback topology to provide

20kV inherent advantages in the handling of differential sig-
NC = NO CONNECT nals, differing system commons, level-shifting and low
distortion, high frequency amplification.
Figure 41. AD629 Connection Diagram
The AD830’s topology, reduced to its elemental form,
100 is shown in Figure 44. The key feature of this topology
is the use of two identical voltage-to-current converters,
95
GM, that make up the input and feedback signal inter-
90 faces. They are labeled with inputs VX and VY,
85 respectively. These voltage-to-current converters pos-
80
sess fully differential inputs, high linearity, high input
CMR – dB

impedance and wide voltage range operation.

75
The two GM stage current outputs IX and IY, sum
70
together at a high impedance node that is character-
65 ized by an equivalent resistance and capacitance
60
connected to an “ac common.” A unity voltage gain
stage follows the high impedance node, to provide
55
buffering from loads.
50
20 100 1k 10k 20k
FREQUENCY – Hz

Figure 42. Common-Mode Rejection vs. Frequency

–24–
 VX1
GM
VX2
IX

IZ
A=1 VOUT

IY IX = (VX1 – VX2) GM
VY1
CC IY = (VY1 – VY2) GM
GM RP
IZ = IX + IY
VY2

GM RP
AOLS =
1 + S (CC RP)

Figure 44. Topology Diagram

VX1
Precise amplification is accomplished through closed-
GM loop operation of this topology. Voltage feedback is
VX2 implemented via the Y GM stage in which the output
IX is connected to the –Y input for negative feedback as
shown in Figure 45. An input signal is applied across the
X GM stage, either differentially or single-ended, which
A=1 VOUT
produces a current that is summed at the high imped-
IY ance node with the output current from the Y GM stage.

VY1 CC Negative feedback nulls this sum to a small error

GM current necessary to develop the output voltage at the
VY2 high impedance node. The error current is usually
negligible, so the null condition essentially forces the
Y GM output stage current to exactly equal the X GM
VX1 – VX2 = VY2 – VY1
output current.
FOR VY2 = VOUT
1 Since the two transconductances are identical, the dif-
VOUT = (VX1 – VX2 + VY1)
1 + S(CC /GM)
ferential voltage across the Y inputs equals the negative
Figure 45. Closed-Loop Connection of the differential voltage across the X input. It is impor-
tant to note that the bandwidth and general dynamic
behavior is symmetrical (identical) for the noninverting
and the inverting connections of the AD830.

–25–
Figures 46 and 47 show the AD830’s CMR vs. fre- 9
quency and normalized gain vs. frequency. VS = ±5V
6
RL = 150V
110 3

CLOSED-LOOP GAIN – dB
CL = 33pF
0
100
–3 CL = 4.7pF
90
–6
80
–9
CMR – dB

70 Vs = ±15V –12
CL = 15pF
–15
60
Vs = ±5V –18
50
–21
10k 100k 1M 10M 100M 1G
40
FREQUENCY – Hz

30
1k 10k 100k 1M 10M
Figure 47. AD830 Closed-Loop Gain vs. Frequency
FREQUENCY – Hz For details concerning the entire line of monolithic in-
Figure 46. AD830 CMR vs. Frequency amps produced by Analog Devices, refer to Appendix B.

–26–
Chapter III
Applying In-Amps Effectively
DUAL SUPPLY OPERATION
The conventional way to power an in-amp has been
3
from a “split” or dual polarity power supply. This has
1
the obvious advantage of allowing both a positive and a
negative input and output swing. AD620 6 VOUT
8 7

5
SINGLE SUPPLY OPERATION 2

Single supply operation has become an increasingly 4

0.33 0.33
desirable characteristic of a modern in-amp. Many mF mF
present-day data acquisition systems are powered from
a single low voltage supply. For these systems, there are
two vitally important characteristics. The first is that the 0.01 0.01
mF mF
in-amp’s input common-mode range should extend –VS +VS
between the positive supply and the negative supply (or
ground). Second, the amplifier’s output should be “rail- Figure 48. Recommended Method for Power
to-rail” as well, providing an output swing to within Supply Bypassing
100 mV or less of either supply rail or ground. In In general, most monolithic in-amps have their integra-
contrast, a standard dual supply in-amp can only swing tors referenced to the negative supply (such as the
to within a volt or two of either supply or ground. When AD620 in-amp series) and should be decoupled with
operated from a 5 V single supply, these in-amps have respect to the output reference terminal. This means
only a volt or two of output voltage swing, while a true that for each chip a bypass capacitor should be con-
rail-to-rail amplifier can provide a peak-to-peak output nected between each power supply pin and the point on
nearly as great as the supply voltage. Another important the board where the in-amp’s reference terminal is
point is that a single supply or “rail-to-rail” in-amp will connected, as shown in Figure 48.
still operate well (or even better) from a dual supply and
For a much more comprehensive discussion of these
it will often operate at lower power than a conventional
issues refer to the application note: “An I.C. Amplifier
dual supply device.
Users’ Guide to Decoupling, Grounding, and Making
Things Go Right for a Change,” by Paul Brokaw,
POWER SUPPLY BYPASSING,
available free from Analog Devices.
DECOUPLING AND STABILITY ISSUES
Power supply decoupling is an important detail that is
THE IMPORTANCE OF AN INPUT GROUND
often overlooked by designers. Normally, bypass
RETURN
capacitors (values of 0.1 µF are typical) are connected
One of the most common applications problems when
between the power supply pins of each IC and ground.
using in-amp circuits is failure to provide a dc return
While usually adequate, this practice can be ineffective
path for the in-amp’s input bias currents. This usually
or even create worse transients than no bypassing at all.
happens when the in-amp’s inputs are capacitively-
It is important to consider where the circuit’s currents
coupled. Figure 49a shows just such an arrangement.
originate, where they will return, and by what path.
Here the input bias currents quickly “charge up”
Once that has been established, bypass these currents
capacitors C1 and C2 until the in-amp’s output “rails”
around ground and other signal paths.
either to the supply or ground.

–27–
 +VS +VS

0.33mF 0.01mF 0.33mF 0.01mF

C1 C1
–IN 3 7 –IN 3 7
1 1
R1
RG AD620 6 VOUT RG AD620 6 VOUT
C2 8 5 C2 8 5
+IN 2 4 +IN 2 4

R2
0.33mF 0.01mF 0.33mF 0.01mF
THIS CIRCUIT WILL
NOT WORK!
–VS –VS

Figure 49a. An AC-Coupled In-Amp Circuit With- Figure 49b. A High Value Resistor Between Each
out An Input Ground Return Input and Ground Provides an Effective DC Return
The solution is to add a high value resistance (R1, R2) Path
between each input and ground, as shown in Figure Figure 50 shows the recommended dc return for a
49b. Practical values for R1 and R2 are typically 1 MΩ transformer-coupled input.
or less. The choice of resistor value is a trade-off: the
larger the resistor, the greater the offset voltage error CABLE TERMINATION
due to input offset currents. With lower resistance When in-amps are used at frequencies above a few
values, larger input capacitors must be used for C1 and hundred kilohertz, properly terminated 50 Ω or 75 Ω
C2 to provide the same 3 dB corner frequency coaxial cable should be used for input and output con-
(1/2πR1C1) where R1 = R2 and C1 = C2. The input bias nections. Normally, cable termination is simply a 50 Ω
currents can now flow freely to ground and do not build or 75 Ω resistor connected between the cable center
up a large input offset as before. In the vacuum tube conductor and its shield at the end of the coaxial cable.
circuits of years past, a similar effect occurred, requiring Note that a buffer amplifier may be required to drive
a “grid leak” resistance between the grid (input) and these loads to useful levels.
ground to drain off the accumulated charge (the elec-
trons on the grid).

+VS
– INPUT

RG AD620 VOUT

LOAD

+ INPUT
REFERENCE
–VS

TO POWER
SUPPLY
GROUND

Figure 50. Recommended DC Return Path For A Transformer Coupled Input

–28–
INPUT PROTECTION BASICS FOR ADI IN- maximum safe input level is ± 23 volts. Additional
AMPS external series resistors can be added to increase this
Input Protection from ESD and DC Overload level considerably, at the expense of a higher circuit
As interface amplifiers for data acquisition systems, noise level.
instrumentation amplifiers are often subjected to input Because the AD620 series in-amps are very low noise
overloads, i.e., voltage levels in excess of their full scale devices, typically 9 nV/√Hz, a single 1 kΩ resistor will
for the selected gain range or even in excess of the supply add approximately 1.7 nV/√Hz of noise. This would raise
voltage. These overloads fall into two general classes: the maximum dc input level to approximately 28 volts
those that are steady state and those that are transient above each supply or ± 43 volts with 15 volt supplies.
(ESD, etc.), which occur for only a fraction of a
second. With three op-amp in-amp designs, when
+VS +VS
operating at low gains (10 or less), the gain resistor acts
as a current-limiting element in series with their resistor
inputs. At high gains, the lower value of RG may not
adequately protect the inputs from excessive currents. 400V
Q1 Q2
400V
+IN
–IN
Standard practice is to place current-limiting resistors
in each input, but adding this protection also increases
the circuit’s noise level. A reasonable “balance” needs RG
to be found between the protection provided and the
20mA MAX INPUT CURRENT
increased resistor (Johnson) noise introduced. Circuits
using in-amps with a relatively high noise level can Figure 51a. AD620 Series (AD620, AD621, AD622)
tolerate more series protection without seriously in- In-Amp Input Circuit
creasing their total circuit noise.
Figure 51b shows the input architecture for the AD627
Of course, the less added noise the better, but a good in-amp. This two op-amp in-amp design was optimized
rule of thumb is that circuits needing this extra protec- for the lowest possible operating current consistent with
tion can easily tolerate resistor values that generate 30% good performance. Because of this, the input stage
of the total circuit noise. For example, a circuit using an operates at lower current levels than the AD620 series
in-amp with a rated noise level of 20 nV/√Hz can and, as a consequence, is higher in noise.
tolerate an additional 6 nV/√Hz of Johnson noise.
A “cookbook” method to translate this number into a +VS +VS
practical resistance value follows. The Johnson noise of +VS +VS
a 1 kΩ resistor is approximately 4 nV/√Hz. Now, this
value varies as the square root of the resistance. So a 2kV 2kV
20 kΩ resistor would have √20 times as much noise as –IN Q1 Q2 +IN
the 1 kΩ resistor, which is 17.88 nV/√Hz (4.4721
times 4 nV/√Hz). Because both inputs need to be pro- 200kV
tected, two resistors are needed and their combined
noise will add as the square root of the number of –VS –VS
–VS –VS
resistors (the root sum of squares value). In this case, 20mA MAX INPUT CURRENT
the total added noise from the two 20 kΩ resistors will
be 25.3 nV/√Hz (17.88 times 1.414). Figure 51b. AD627 In-Amp Input Circuit
Figure 51a provides details on the input architecture of Like the AD620 series, the AD627 can tolerate 20 mA
the AD620 series in-amps. As shown, the AD620 series transient input currents. But the AD627 has built-in
has internal 400 Ω resistors that are in series with the 2 kΩ resistors and can handle input voltages 40 volts
input transistor junctions and their protection diodes. higher than its supply lines (20 mA times 2 kΩ). This
The AD620 series was designed to handle maximum level of protection is quite beneficial since, because of its
input currents of 20 mA steady state (or dc). Their low power, many of the AD627’s applications will use
internal resistors and diodes will protect the device from a low voltage single power supply. If even more protec-
input voltages 8 volts greater than either supply voltage tion is needed, quite large external resistors can be
(20 mA × 0.4 kΩ). Therefore, for ± 15 volts supplies, the added without seriously degrading the AD627’s

–29–
38 nV/√Hz noise level. In this case, adding two 5 kΩ input protection resistors which, in turn, reduces the
resistors will raise the circuits noise approximately circuit’s noise.
13 nV/√Hz (30 percent) but would provide an addi- Unfortunately, most ordinary diodes (Schottky, silicon,
tional ± 100 volts of transient overload protection. etc.) have high leakage currents that will cause large
Figure 51c shows the input architecture of the AD623 offset errors at the in-amp’s output; this leakage in-
in-amp. In this design, the internal (ESD) diodes are creases exponentially with temperature. This tends to
located before the input resistors and as a consequence, rule out the use of external diodes in applications where
this provides less protection than the other designs. The the in-amp is used with high impedance sources.
AD623 can tolerate 10 mA maximum input current Specialty diodes with much lower leakage are available,
but, in many cases, some external series resistance will but these are often difficult to find and expensive. For
be needed to keep input current below this level. the vast majority of applications, limiting resistors alone
provides adequate protection for ESD and longer dura-
+VS +VS tion input transients.
+VS +VS

+VS
1kV 1kV
–IN Q1 Q2 +IN +VS 0.33mF 0.01mF

D1
RLIM
–IN
–VS –VS D2
–VS –VS –VS RG IA VOUT
10mA MAX INPUT CURRENT D3
+IN
RLIM
Figure 51c. AD623 In-Amp Input Circuit D4
0.33mF 0.01mF
Since the AD623’s device noise is approximately
+VS
35 nV/√Hz, up to 5 kΩ of external resistance can be –VS
added here to provide 50 V of dc overload protection
D1–D4 ARE INTERNATIONAL RECTIFIER SD101 SERIES
while only increasing input noise to 38 nV/√Hz total. FAST SCHOTTKY BARRIER RECTIFIERS.

Table V provides recommended series protection resis- Figure 52. Using External Components to
tor values for a 10% or 40% increase in circuit noise. Increase Input Protection
Despite their limitations, external diodes are often
Table V. Recommended Series Protection Resistor
required in some special applications such as electric
Values
shock defibrillators, which utilize short duration, high
External Resistors voltage pulses. The combination of external diodes and
Max Recommended* very large input resistors (as high as 100 kΩ) may be
In-Amp Input For 10% For 40% needed to adequately protect the in-amp.
Noise Overload Additional Additional It is a good idea to check the diodes’ specifications, to
Device (eni) Current Noise (⍀) Noise (k⍀) ensure that their conduction begins well before the in-
AD620 9 nV/√Hz 20 mA 348 2.49 amp’s internal protection diodes start drawing current.
AD627 38 nV/√Hz 20 mA 10.0 k 45.3 Although they provide excellent input protection, stan-
AD627 35 nV/√Hz 10 mA 8.08 k 40.2 dard Schottky diodes can have leakage up to several
mA. However, as in the example of Figure 52, fast
*This noise level is for two resistors, one in series with each input
of the in-amp.
Schottky barrier rectifiers such as the international
rectifier type SD101 series can be used; these devices
Adding External Protection Diodes have 200 nA max leakage currents and 400 mW typical
Device input protection may be increased with the power dissipations.
addition of external clamping diodes as shown in Figure
52. As high current diodes are used, input protection is
increased which allows the use of much lower resistance

–30–
ESD and Transient Overload Protection Designing For the Lowest Possible Offset Volt-
Protecting in-amp inputs from high voltage transients age Drift
and ESD events is all-important for a circuit’s long- Offset drift errors include not just those associated with
term reliability. Power dissipation is often a critical the active device (IC in-amp or discrete in-amp design
factor as input resistors, whether internal or external, using op-amps) being used, but also include thermo-
must be able to handle most of the power of the input couple effects in the circuit’s components or wiring.
pulse without failing. The in-amp’s input bias and input offset currents flow-
ESD events, while they may be very high voltage, are ing through unbalanced source impedances also create
usually of very short duration and are normally one-time additional offset errors. In discrete op-amp in-amp
events. Since the circuit has plenty of time to cool down designs, these errors can increase with temperature
before the next event occurs, modest input protection is unless precision op-amps are used.
sufficient to protect the device from damage. Designing For the Lowest Possible Gain Drift
On the other hand, regularly occurring short duration When planning for gain errors, the effects of board
input transients can easily overheat and burn out the layout, the circuit’s thermal gradients, and the charac-
input resistors or the in-amps input stage. A 1 kΩ teristics of any external gain-setting resistors are often
resistor, in series with an in-amp input terminal overlooked. A gain resistor’s absolute tolerance, its
drawing 20 mA, will dissipate 0.4 watts which can thermal temperature coefficient, its physical position
easily be handled by a standard one-half watt or relative to other resistors in the same gain network, and
greater surface mount resistor. If the input current is even its physical orientation (vertical or horizontal), are
doubled, power consumption goes up 4×, as it all-important design considerations if high dc accuracy
increases as the square of the input current (or as the is needed.
square of the applied voltage). In many ADC preamp circuits, an external user-
Although it is a simple matter to use a higher power selected resistor sets the gain of the in-amp, so the
protection resistor, this is a dangerous practice, as the absolute tolerance of this resistor and its variation over
power dissipation will also increase in the in-amp’s temperature, compared to that of the IC’s on-chip
input stage. This can easily lead to device failure (see the resistors, will affect the circuit’s gain accuracy. Resistors
preceding section on input protection basics for input commonly used include through-hole 1% 1/4 watt
current limitations of ADI in-amps). Except for ESD metal film types and 1% 1/8th watt chip resistors. Both
events, it is always best to adopt a conservative approach types typically have a 100 ppm/°C temperature coeffi-
and treat all transient input signals as full duration cient. However, some chip resistors can have TCs of
inputs. 200 or even 250 ppm/°C.
Designs that are expected to survive such events over Even when using a 1% 100 ppm/°C resistor, the gain
long periods of time, must use resistors with enough accuracy of the in-amp will be degraded. The resistor’s
resistance to protect the in-amp’s input circuitry from initial room temperature accuracy is only ± 1% and the
failure and enough power to prevent resistor burnout. resistor will drift another 0.01% (100 ppm/°C) for every
degree C change in temperature. The initial gain error
DESIGN ISSUES AFFECTING DC can easily be subtracted-out in software, but to correct
ACCURACY for the error vs. temperature, frequent recalibrations
The modern in-amp is continually being improved, (and a temperature sensor) would be required.
providing the user with ever-increasing accuracy and If the circuit is initially calibrated, the overall gain
versatility at a lower price. Despite these improvements accuracy is reduced to approximately 10 bits (0.1%)
in product performance, there remain some fundamen- accuracy for a 10°C change. An in-amp with a standard
tal applications issues that seriously affect device 1% metal film gain resistor should never be used ahead
accuracy. Now that low cost high resolution ADCs are of even a 12-bit converter and it would totally destroy
in common use, system designers need to ensure that the accuracy of a 14- or 16-bit converter.
if an in-amp is used as a preamplifier ahead of the
converter, that the in-amp’s accuracy matches that of
the ADC.

–31–
Additional error sources associated with external signal level can still occur. The use of larger (i.e., higher
resistors also affect gain accuracy. The first are varia- power) resistors will reduce these effects but accurate,
tions in resistor heating caused by input signal level. low TC power resistors are expensive and hard to find.
Figure 53, a simple op-amp voltage amplifier, provides When using a discrete three op-amp in-amp, as shown
a practical example. in Figure 54, these errors will be reduced. In a three op-
amp in-amp, there are two feedback resistors, R1 and
R1 = 100
G = 1 + —— R2, and one gain resistor, RG. Since the in-amp uses two
R2
feedback resistors while the op-amp uses only one, each
of the in-amp’s resistors only needs to dissipate half the
R1 = 9.9kV, 1/4W
power (for the same gain). Monolithic in-amps such as
the AD620 offer a further advantage by using relatively
large value (25 kΩ) feedback resistors. For a given gain
R2 = 1kV, 1/4W and output voltage, large feedback resistors will dissi-
pate less power (i.e., P = V2/RF). Of course, a discrete
Figure 53. An Example of How Differences In in-amp can be designed to use large value, low TC
Input Signal Level Can Introduce Gain Errors resistors as well, but with added cost and complexity.
Under zero signal conditions, there is no output signal Another less serious, but still significant, error source is
and no resistor heating. When an input signal is applied, the so-called “thermocouple effect” sometimes referred
however, an (amplified) voltage appears at the op-amp to as “thermal EMF.” This occurs when two different
output. When the amplifier is operating with gain, conductors, such as copper and metal film, are tied
Resistor R1 will now be greater than R2. This means together. When this bimetallic junction is heated, a
that there will be more voltage across R1 than across R2. simple thermocouple is created. When using similar
The power dissipated in each resistor equals the square metals such as a copper-to-copper junction, a thermo-
of the voltage across it divided by its resistance in ohms. electric error voltage of up to 0.2 mV/°C may be
The power dissipated, and therefore the internal heating of produced. An example of these effects is shown in
the resistor, will increase in proportion to the value of Figure 55.
the resistor. A final error source occurs when there is a thermal
In the example, R1 is 9.9 kΩ and R2 1 kΩ. Conse- gradient across the external gain resistor. Something as
quently, R1 will dissipate 9.9 times more power than simple as mounting a resistor on end, in order to
R2. This leads to a gain error that will vary with input conserve board space, will invariably produce a tem-
level. The use of resistors with different temperature perature gradient across the resistor. Placing the resistor
coefficients can also introduce gain errors. flat down against the PC board will cure this problem
unless there is air flowing along the axis of the resistor
Even when resistors with matched temperature coeffi- (where the air flow cools one side of the resistor more
cients (TC) are used, gain errors that vary with input

R3 R4
10kV 10kV
A1 SENSE
R1
25kV

RG A3 OUTPUT

R2
25kV
A2 REF
R5 R6
10kV 10kV

Figure 54. A Typical Discrete Three Op-Amp In-Amp Using Large Value, Low TC Feedback
Resistors

–32–
than the other side). Orienting the resistor so that its axis very small and gain error drift is guaranteed and
is perpendicular to the airflow will minimize this effect. specified to very high standards.
At a gain of 10, the AD621 has a guaranteed maxi-
mum dc offset shift of less than 2.5 µV/°C and a
RESISTOR
T1 MATERIAL T2 maximum gain drift of ± 5 ppm/°C, which is only 0.0005
percent/°C.
RTI and RTO Errors
RESISTOR LEADS
Another important design consideration is how circuit
gain affects many in-amp error sources such as dc offset
TYPICAL RESISTOR THERMOCOUPLE EMFs and noise. An in-amp should be regarded as a two stage
• CARBON COMPOSITION 400mV/ C amplifier with both an input and an output section.
• METAL FILM 20mV/ C
• EVENOHM OR MANGANIN WIRE-
Each section has its own error sources.
WOUND 2mV/ C Because the errors of the output section are multiplied
• RCD COMPONENTS HP-SERIES 0.05mV/ C
by a fixed gain (usually two), this section is often the
Figure 55. Thermocouple Effects Inside Discrete principle error source at low circuit gains. When the in-
Resistors amp is operating at higher gains, the gain of the input
Practical Solutions stage is increased. As the gain is raised, errors contrib-
As outlined, a number of dc offset and gain errors are uted by the input section are multiplied, while output
introduced when external resistors are used with a errors are not. So, at high gains it is the input stage errors
monolithic in-amp. And discrete designs tend to have that dominate.
even larger errors. There are three practical solutions to Since device specifications on different data sheets
this problem: use higher quality resistors, use software often refer to different types of errors, it is very easy for
correction, or, better still, use an in-amp that has all of the unwary designer to make an inaccurate comparison
its gain resistors on-chip, such as the AD621. between products. Any (or several) of four basic error
Option 1: Use A Better Quality Gain Resistor categories may be listed: input errors, outputs errors,
As a general rule, only 12- or 13-bit gain performance total error RTI and total error RTO. Here follows an
is possible using commonly available 1% resistors, attempt to list, and hopefully simplify, an otherwise
which assumes that some type of initial calibration is complicated set of definitions.
performed. Input errors are those contributed by the amplifier’s
A practical solution to this problem is simply to use a input stage alone; output errors are those due to the
better quality resistor. A significant improvement can output section. Input-related specifications are often
be made by using a 0.1% 1/10th watt surface mount combined and classified together as a “referred to
resistor. Aside from having a 10× better initial accuracy, input” (RTI) error while all output-related specifica-
they typically have a TC of only 25 ppm/°C which will tions are considered “referred to output” (RTO) errors.
provide better than 13-bit accuracy over a 10°C tem- For a given gain, an in-amp’s input and output errors
perature range. can be calculated by using the following formulas:
If even better gain accuracy is needed, there are spe- Total Error, RTI = Input Error + (Output Error/Gain)
cialty houses that sell resistors with lower TCs, but Total Error, RTO = (Gain × Input Error) + Output Error
these are usually expensive military varieties.
Sometimes the spec page will list an error term as RTI
Option 2: Use The AD621 or RTO for a specified gain, in other cases it is up to the
By far, the best overall dc performance is provided by user to calculate the error for the desired gain.
using a monolithic in-amp such as the AD621 in
which all the resistors are contained within the IC and Offset Error
gain is pin programmable. Now, all resistors have Using offset error as an example, the total voltage offset
identical TCs, all are at virtually the same tempera- error of the AD620A in-amp when operating at a gain
ture, and any thermal gradients across the chip are of ten can be calculated using the individual errors
listed on its specifications page. The (typical) input
offset of the AD620 (VOSI), is listed as 30 µV. Its output

–33–
offset (VOSO) is listed as 400 µV. Thus, the total voltage signals present at the in-amp’s input are normally greatly
offset referred to input, RTI, is equal to: reduced by the amplifier’s common-mode rejection
Total RTI Error = VOSI + (VOSO/G) = 30 µV + (400 µV/ but, at RF frequencies, most in-amps have no common-
10) = 30 µV + 40 µV = 70 µV. mode rejection. If the RF interference is modulated,
keyed, or otherwise of an intermittent nature, this dc
The total voltage offset referred to the output, RTO, is offset can vary over time and lead to measurement
equal to: errors that are difficult to detect.
Total Offset Error RTO = (G (VOSI )) + VOSO = (10
(30 µV)) + 400 µV = 700 µV. +VS

0.33mF 0.01mF
Note that the two error numbers (RTI vs. RTO) are 10× C1
R1 1000pF
in value and logically they should be, as, at a gain of ten, 4.02kV
1%
5%
the error at the output of the in-amp should be ten times +IN 3 7

the error at its input. 1

C3 RG AD620 6 VOUT
Noise Errors R2 0.047mF
8
4.02kV
In-amp noise errors also need to be considered in a 1%
5
–IN 2
similar way. Since the output section of a typical three C2
4

op-amp in-amp operates at unity gain, the noise contri- 1000pF 0.33mF 0.01mF
5%
bution from the output stage is usually very small. But
there are three op-amp in-amps that operate the output –VS
stage at higher gains and two op-amp in-amps regularly LOCATE C1–C3 AS CLOSE TO THE INPUT PINS AS
operate the second amplifier at gain. When either sec- POSSIBLE. USE SHORT LEADS AND A GROUND PLANE ON
THE PC BOARD.
tion is operated at gain, its noise is amplified along with
the input signal. Both RTI and RTO noise errors are Figure 56. A Practical RFI Suppression Circuit
calculated the same way as offset errors except that the For the AD620 In-Amp
noise of two sections adds as the root-mean-square. The circuit of Figure 56 is recommended for AD620
That is: series in-amps and provides good RFI suppression at
the expense of reducing the (differential) bandwidth. In
Input Noise = eni , Output Noise = eno addition, this RC input network also provides addi-
tional input overload protection (see input protection
(eni ) + ( eno/Gain )
2 2
Total Noise RTI = section). Resistors R1 and R2 were selected to be high
enough in value to isolate the circuit’s input from

(Gain (eni)) + (eno) capacitors C1–C3, but without significantly increasing

2 2
Total Noise RTO = the circuit’s noise.
R1/R2 and C1/C2 form a bridge circuit whose output
For example, the (typical) noise of the AD620A is appears across the in-amp’s input pins. Any mismatch
specified as 9 nV/√Hz eni and 72 nV/√Hz eno. There- between the C1/R1 and C2/R2 time constant will un-
fore, the total RTI noise of the AD620A operating at a balance the bridge and reduce common-mode rejection.
gain of 10 is equal to: C3 ensures that any RF signals are common-mode
(the same on both in-amp inputs) and are not applied
(eni ) + ( eno/Gain ) differentially.
2 2
Total Noise RTI = =
This low-pass network has a –3 dB BW equal to:

(9) + (72 / 10)

2 2
= 11.5 nV / Hz 1

Reducing Errors Due to Radio Frequency (2π (R1 + R2)(C 3 + C1 + C2)) .

Interference
In real-world applications, a potential problem is that of Using a C3 value of 0.047 µF as shown, the –3 dB signal
radio frequency interference (RFI) finding its way into BW of this circuit is approximately 400 Hz. When
the in-amp being rectified, and then appearing as a dc operating at a gain of 1000, the typical dc offset shift
offset error at the in-amp’s output. Common-mode over a frequency range of 1 Hz to 20 MHz will be less

–34–
than 1.5 µV RTI and the circuit’s RF signal rejection +VS
will be better than 71 dB. At a gain of 100, the dc offset 0.33mF 0.01mF
C1
shift is well below 1 mV RTI and RF rejection better R1 1000pF
10kV 5%
than 70 dB. 1%
3 7
The 3 dB signal bandwidth of this circuit may be +IN
increased to 900 Hz by reducing resistors R1 and R2 to 1 VOUT
C3 RG AD623 6
2.2 kΩ. The performance is similar to that using 4 kΩ R2 0.022mF
8
resistors, except that the circuitry preceding the in-amp 10kV 5
1%
must drive a lower impedance load. 2 4
–IN C2
This circuit should be built using a PC board with a 1000pF 0.33mF 0.01mF
ground plane on both sides. All component leads should 5%

be made as short as possible. Resistors R1 and R2 can –VS

be common 1% metal film units, but capacitors C1 and LOCATE C1–C3 AS CLOSE TO THE INPUT PINS AS
C2 need to be ± 5% tolerance devices to avoid degrading POSSIBLE. USE SHORT LEADS AND A GROUND PLANE ON
THE PC BOARD.
the circuit’s common-mode rejection. Either the tradi-
tional 5% silver micas, miniature size micas, or the new Figure 58. An RFI Suppression Circuit For the
Panasonic ± 2% PPS film capacitors (Digi-key part# AD623 In-Amp
PS1H102G-ND) are recommended.
Figure 58 shows the recommended RFI circuit for use
with the AD623 in-amp. As this device is less prone to
+VS
RFI than the AD627, the input resistors can be reduced
0.33mF 0.01mF
R1
C1 in value from 20 kΩ to 10 kΩ, to increase the circuit’s
1000pF
20kV 5% signal bandwidth and lower the resistor noise contribu-
1% tion, and the 10 kΩ resistors still provide very effective
3 7
+IN input protection. The filter bandwidth is approximately
1 VOUT 400 Hz. Operating at a gain of 100, the maximum dc
C3 RG AD627 6
R2 0.022mF
8
offset shift with a 1 volt p-p input applied is less than
20kV
1%
5 1 µV RTI. At the same gain, the circuit’s RF signal
2 4 rejection is better than 74 dB.
–IN C2
1000pF 0.01mF
0.33mF
5% +VS

0.33mF 0.01mF
–VS PULSE ENGINEERING
#B4001 COMMON-MODE
LOCATE C1–C3 AS CLOSE TO THE INPUT PINS AS RF CHOKE
POSSIBLE. USE SHORT LEADS AND A GROUND PLANE ON
THE PC BOARD. 3 7
+IN
Figure 57. An RFI Suppression Circuit For the 1 VOUT
RG AD620 6
AD627 In-Amp
8
5
The circuit of Figure 57 is recommended for the
2 4
AD627 micropower in-amp. Since this in-amp has –IN
higher noise (38 nV/√Hz) than the AD620 series de- 0.33mF 0.01mF
vices, higher value input resistors can be used without
seriously degrading its noise performance. –VS
The filter bandwidth is approximately 200 Hz. At a gain
Figure 59. Using a Commercial Common-Mode
of 100, maximum dc offset shift with a 1 volt p-p input
RF Choke for RFI Suppression.
applied is approximately 400 µV RTI over an input
range of 1 Hz to 20 MHz. At the same gain, the circuit’s
RF signal rejection (RF level at output/RF applied to
the input) will be better than 61 dB.

–35–
As an alternative to using an RC input filter, a commer- RFI Testing
cial common-mode RF choke may be connected in Figure 60 shows a typical setup for measuring RFI
front of the AD620 series in-amps as shown in Figure rejection. To test these circuits for RFI suppression,
59. A common-mode choke is a two-winding RF choke connect the two input terminals together using very
using a common core. Any RF signals that are common short leads. Connect a good quality sine wave generator
to both inputs will be attenuated by the choke. The to this input via a 50 Ω terminated cable.
common-mode choke provides a simple means for Using an oscilloscope, adjust the generator for a 1 volt
reducing RFI with a minimum of components and it peak-to-peak output at the generator end of the cable.
provides a greater signal passband, but the effectiveness Set the in-amp to operate at high gain (such as a gain of
of this method depends on the quality of the particular 100). dc offset shift is simply read directly at the in-
common-mode choke being used. A choke with good amp’s output using a DVM. For measuring high
internal matching is preferred. Another potential prob- frequency CMR, use an oscilloscope connected to the
lem with using the choke is that there is no increase in in-amp output by a compensated scope probe, and
input protection as is provided by the RC RFI filters. measure the peak-to-peak output voltage (i.e.,
Using the RF choke specified, at a gain of 1000, and a feedthrough) vs. input frequency. When calculating
1 V p-p common-mode sine wave applied to the input, CMRR vs. frequency, remember to take into account
the circuit of Figure 59 reduces the dc offset shift to less the input termination (VIN/2) and the gain of the in-
than 4.5 microvolts RTI. amp. The CMRR = 20 log of ((VIN/2)/(VOUT/Gain)).
The ac feedthrough was also greatly reduced, as shown Miscellaneous Design Issues
by Table VI. Ratiometric vs. Voltage-Reference-Based Systems
Two common methods are used for ensuring that
Table VI. AC CMR vs. Frequency, measurement accuracy does not degrade with changes
Using the Circuit of Figure 59 in power supply voltage. The traditional approach has
been to operate (or control) the entire circuit from a
Frequency AC CMR good quality voltage reference. More recently, many
100 kHz 100 dB designs use an unregulated power supply to power the
333 kHz 83 dB circuit and also use this same voltage source as a
350 kHz 79 dB common reference for the circuit. If the individual
500 kHz 88 dB circuit components, such as the in-amp and the ADC,
1 MHz 96 dB are referenced via voltage dividers, etc., from a common
power supply line, the individual device drifts will tend
Because the AD627 is more susceptible to RFI than the to track each other and cancel out.
AD620/AD621/AD622 in-amps (due to its “micro-
power” circuit architecture), the CM choke is not
recommended for this amplifier; an RC input filter is a
better choice here.
+VS

0.33mF 0.01mF

RF +IN
SIGNAL
GENERATOR 50V RFI OSCILLOSCOPE
INPUT RG IN-AMP VOUT
FILTER
TO SCOPE
OR DVM
–IN

0.33mF 0.01mF
FOR DC OFFSET SHIFT, READ
OUTPUT ON DVM. FOR AC FEED-
THROUGH MEASUREMENT,
–VS DIGITAL VOLT
CONNECT IN AMP OUTPUT TO
OSCILLOSCOPE. METER

Figure 60. Typical Test Setup For Measuring An In-Amp’s RFI Rejection
–36–
 +5V
+5V +5V
0.1mF
0.1mF
R1 R3
ADxxx
R2 R4 RG AD623 AIN
+5V

REF R5 REFOUT
REFIN
R6

Figure 61. An In-Amp/ADC Circuit Using a Ratiometric Reference

The circuit of Figure 61 provides an example. Both the Using Low-Pass Filtering To Improve Signal-
in-amp and the ADC are referenced by voltage divider to-Noise Ratio
R5/R6. If the supply voltage decreases by 10%, the When trying to extract data from a noisy measurement,
in-amp’s zero signal output voltage will go down by low-pass filtering can be used to greatly improve the
10% and, at the same time, the ADC’s input reference signal-to-noise ratio of the measurement, by removing
voltage also decreases by 10%. all signals that are not within the signal bandwidth. In
Ratiometric circuits use fewer components, consume some cases, bandpass filtering (reducing response
less power and are lower in cost than an equivalent both below and above the signal frequency) can be
voltage-referenced-based circuit. However, care must employed for an even greater improvement in mea-
be taken that every device in the circuit “chain” is surement resolution.
ratiometeric; otherwise, the net difference in drift be- The 1 Hz, 4-pole active filter of Figure 62 is an example
tween the regulated and ratiometric devices can produce of a very effective low-pass filter that would normally
very severe drift. be added after the signal has been amplified by the in-
amp. This filter provides high dc precision at low cost
while requiring a minimum number of components.

Q1 = C1 Q2 = C3
4C2 4C4
1 1
W= W=
R6 C1C2 R8 C3C4
R6 = R7 R8 = R9

C1 C3
R6 R7
R8 R9
1/4
1MV 1MV
C2 AD704 1/4
1MV 1MV C4 AD704 OUTPUT

R10 2MV
R10 2MV
C5 0.01µF
C5 0.01mF

A1, A2 ARE AD706 OR OP296

OPTIONAL BALANCE
RESISTOR NETWORKS
CAN BE REPLACED CAPACITORS C2 – C4 ARE
WITH A SHORT SOUTHERN ELECTRONICS
MPCC, POLYCARBONATE,
±5%, 50 VOLT

Figure 62. A 4-Pole Low-Pass Filter for Data Acquisition

–37–
 Table VII. 1 Hz, 4-Pole Low-Pass Filter Recommended Component Values

Section 1 Section 2
Desired Low Freq Freq C1 C2 C3 C4
Pass Response (Hz) Q (Hz) Q (␮F) (␮F) (␮F) (␮F)
Bessel 1.43 0.522 1.60 0.806 0.116 0.107 0.160 0.0616
Butterworth 1.00 0.541 1.00 1.31 0.172 0.147 0.416 0.0609
0.1 dB Chebychev 0.648 0.619 0.948 2.18 0.304 0.198 0.733 0.0385
0.2 dB Chebychev 0.603 0.646 0.941 2.44 0.341 0.204 0.823 0.0347
0.5 dB Chebychev 0.540 0.705 0.932 2.94 0.416 0.209 1.00 0.0290
1.0 dB Chebychev 0.492 0.785 0.925 3.56 0.508 0.206 1.23 0.0242
AC CMR TRIM CT
VIN#1
INVERTING
INPUT R1 R2
A1 SENSE
R5

RG A3 OUTPUT
COMMON-MODE
INPUT SIGNAL
DC CMR TRIM
(AC OR DC)
R6

VIN#2 A2 REF
R3 R4
NONINVERTING 1/2 CT
INPUT

Figure 63. External DC and AC CMRR Trim Circuit for A Discrete Three Op-Amp In-Amp

Note that component values can simply be scaled to or a combination of op-amps and a high bandwidth
provide corner frequencies other than 1 Hz (see Table subtractor amplifier. These discrete designs may be
VII). If a two-pole filter is preferred, simply take the readily “tuned-up” for best CMR performance by
output from the first op-amp. external trimming. A typical circuit is shown in Figure
The low levels of current noise, input offset and input 63. The dc CMR should always be trimmed first, since
bias currents in the quad op-amp (either an AD704 or it affects CMRR at all frequencies.
OP497) allow the use of 1 MΩ resistors without sacri- The +VIN and –VIN terminals should be tied together
ficing the 1 µV/°C drift of the op-amp. Thus lower and a dc input voltage applied between the two inputs
capacitor values may be used, reducing cost and space. and ground. The voltage should be adjusted to provide
Furthermore, since the input bias current of these op- a 10 volt dc input. A dc CMR trimming potentiometer
amps is as low as their input offset currents over most of is then adjusted so that the outputs are equal, and as low
the MIL temperature range, there rarely is a need to use as possible, with both a positive and a negative dc
the normal balancing resistor (along with its noise- voltage applied.
reducing bypass capacitor). Note, however, that adding AC CMR trimming is accomplished in a similar man-
the optional balancing resistor will enhance perfor- ner, except that this time an ac input signal is applied.
mance at temperatures above 100°C. The input frequency used should be somewhat lower
Specified values are for a –3 dB point of 1.0 Hz. For than the –3 dB bandwidth of the circuit.
other frequencies simply scale capacitors C1 through The input amplitude should be set at 20 volts peak-to-
C4 directly; i.e., for 3 Hz Bessel response, C1 = peak with the inputs tied together. The ac CMR trimmer
0.0387 µF, C2 = 0.0357 µF, C3 = 0.0533 µF, C4 = is then nulled-set to provide the lowest output possible.
0.0205 µF. If the best possible settling time is needed, the ac CMR
External CMR and Settling Time Adjustments trimmer may be used, while observing the output wave
When a very high speed, wide bandwidth in-amp is form on an oscilloscope. Note that, in some cases, there
needed, one common approach is to use several op-amps, will be a compromise between the best CMR and the
fastest settling time.
–38–
Chapter IV:
Real-World In-Amp Applications
DATA ACQUISITION application. A good example of this is when the REF pin
Bridge Applications is tied to the VREF pin of an Analog-to-Digital Converter
Instrumentation amplifiers are widely used for buffer- (ADC) whose input range is (VREF ± VIN). With an
ing and amplifying the small voltage output from available output swing on the AD627 of (–VS + 100 mV)
transducers that make use of the classic four resistor to (+VS – 150 mV) the maximum programmable gain is
Wheatstone bridge. simply this output range divided by the input range.
A Classic Bridge Circuit A Single Supply Data Acquisition System
Figure 64 shows the AD627 configured to amplify the The bridge circuit of Figure 65 is excited by a +5 V
signal from a classic resistive bridge. This circuit will supply. The full-scale output voltage from the bridge
work in either dual or single supply mode. Typically the (± 10 mV) therefore has a common-mode level of 2.5 V.
bridge will be excited by the same voltage used to power The AD623 removes the common-V mode component
the in-amp. Connecting the bottom of the bridge to the and amplifies the input signal by a factor of 100 (RGAIN
negative supply of the in-amp (usually either 0, –5 V, = 1.02 kΩ). This results in an output signal of ± 1 V.
–12 V or –15 V), sets up an input common-mode In order to prevent this signal from running into the
voltage that is optimally located midway between the AD623’s ground rail, the voltage on the REF pin has to
supply voltages. It is also appropriate to set the voltage be raised to at least 1 V. In this example, the 2 V
on the REF pin to midway between the supplies, espe- reference voltage from the AD7776 ADC is used to bias
cially if the input signal will be bipolar. However, the the AD623’s output voltage to 2 V ± 1 V. This corre-
voltage on the REF pin can be varied to suit the sponds to the input range of the ADC.
+VS

0.1mF

VDIFF RG = 200kV AD627 VOUT

GAIN-5
VREF
0.1mF

–VS

Figure 64. A Classic Bridge Circuit

+5V
+5V +5V
0.1mF
0.1mF

AD7776
RG
610mV AD623 AIN
1.02kV
REF
REFOUT
REFIN

Figure 65. A Single Supply Data Acquisition System

–39–
A Low Dropout Bipolar Bridge Driver Transducer Interface Applications
The AD822 can be used for driving a 350 Ω Whet- Instrumentation amplifiers have long been used as
stone bridge. Figure 66 shows one-half of the AD822 preamplifiers in transducer applications. High-quality
being used to buffer the AD589, a 1.235 V low power transducers typically provide a highly linear output, but
reference. The output of +4.5 V can be used to drive an at a very low level, and a characteristically high-output
A/D converter front-end. The other half of the AD822 impedance. This requires the use of a high-gain buffer/
is configured as a unity-gain inverter and generates the preamplifier that will not contribute any discernible
other bridge input of –4.5 V. noise of its own to that of the signal. Furthermore, the
Resistors R1 and R2 provide a constant current for bridge high-output impedance of the typical transducer may
excitation. The AD620 low power instrumentation amp- require that the in-amp have a low input bias current.
lifier is used to condition the differential output voltage Table VIII gives typical characteristics for some common
of the bridge. The gain of the AD620 is programmed transducer types.
using an external resistor, RG, and determined by: Since most transducers are slow, bandwidth require-
ments of the in-amp are modest: a 1 MHz small signal
49.4 kΩ
G = +1 bandwidth at unity gain is quite adequate for most
RG applications.

+VS

49.9kV
R1
+1.235V 20V
+
1/2
AD589 AD822
–
10kV 26.4kV, 1%
1% TO A/D CONVERTER
REFERENCE INPUT
+VS
350V 350V
–
350V 350V RG AD620

+
10kV VREF

10kV 1% –VS
+
1% 1/2 +VS +5V
–4.5V + +
AD822 0.1mF 1mF
– R2 GND + +
20V 0.1mF 1mF
–VS –VS –5V

Figure 66. Low Dropout Bipolar Bridge Driver

–40–
 Table VIII. Typical Transducer Characteristics

Recommended
Transducer Type Type of Output Output Z ADI In-Amp
Thermistor Resistance Changes 50 Ω to 1 MΩ AD627, AD629,
with Temperature (–TC) @ +25°C AD620, AD621
4%/°C @ +25°C
High Nonlinear Output
Single Supply
Thermocouple Low Source Z 20 Ω to 2 kΩ AD627, AD620,
10 to 100 µV/°C (10 Ω typ) AD621
mV Output Level
@ +25°C Single Supply
Resistance Temperature Resistance Changes 20 Ω to 2 kΩ AD627, AD620,
Detector (RTD) with Temperature (+TC) @ 0°C AD621, AD626
(In Bridge Circuit) 0.1%/°C to 0.66%/°C
Single or Dual Supply
Level Sensors
Thermal Types Thermistor Output (Low) 500 Ω to 2 kΩ AD626
Float Types Variable Resistance 100 Ω to 2 kΩ
Outputs of mV to Several Volts
Single Supply
Load Cell Variable Resistance AD620, AD621
(Strain-Gage Bridge) 2 mV/V of Excitation 120 Ω to 1 kΩ
(Weight Measurement) 0.1% Typical Full-Scale Change
Single or Dual Supply
Current Sense (Shunt) Low Value Resistor Output A Few Ohms AD626, AD629
High Common-Mode Voltage (or Less)
EKG Monitors Low Level Differential AD623, AD627,
(Single Supply Output Voltage 500 kΩ AD820 (Buffer)
Bridge Configuration) 5 mV Output Typical
Single or Dual Supply
Photodiode Sensor Current Increases 109 Ω AD627, AD623
with Light Intensity.
1 pA–1 µA IOUTPUT
Single Supply
Hall-Effect Magnetic 5 mV/kG–120 mV/kG 1 Ω to 1 kΩ AD627, AD623

–41–
 PATIENT/CIRCUIT
PROTECTION/ISOLATION
IN AMP#1 IN AMP#3
BUFFER 0.03Hz 0.03Hz
AMPLIFIERS HIGH- HIGH-
A-B A-C
PASS PASS
A A FILTER FILTER
A
B
B
B

C C
C
0.03Hz
F CX HIGH-
C-B
PASS
FILTER
IN AMP#2

Figure 67. A Medical EKG Monitor Circuit

Medical EKG Applications Calculating ADC Requirements

This is a challenging real-world application, as a small The resolution of commercial ADCs is specified in bits.
5 mV signal must be extracted in the presence of much In an ADC, the available resolution equals 2n, where n
larger 60 Hz noise and large dc common-mode offset is the number of bits. For example, an 8-bit converter
variations. Figure 67 shows a block diagram of a typical provides a resolution of 28 which equals 256. In this
EKG monitor circuit. The value of capacitor CX is case, the full-scale input range of the converter divided
chosen to maintain stability of the right leg drive loop. by 256 will equal the smallest signal it can resolve. For
Three outputs from the patent are shown here, although example an 8-bit ADC with a 5 volt full-scale input
several more may be used. The output buffer amplifiers range will have a limiting resolution of 19.5 mV.
should be low noise, low input bias current FET op- In selecting an appropriate ADC to use, we need to find
amps, since the patent sensors are typically very high a device that has a resolution better than the measure-
impedance and signal levels may be quite low. A three ment resolution but, for economy’s sake, not a great
resistor summing network is used to establish a com- deal better.
mon sense point to drive the force amplifier. The output For many applications, an 8- or 10-bit converter is
from the force amplifier servos current through the appropriate. The decision to use a high-resolution con-
patient until the net sum output from the three buffer verter alone, or to use a gain stage ahead of a lower
amplifiers is zero. resolution converter, depends on which is more impor-
Three in-amps are used to provide three separate out- tant: component cost or parts count and ease of assembly.
puts for monitoring the patient’s condition. Suitable Adding amplification before the ADC will also re-
ADI products include the AD627 and AD623 in-amps duce the circuit’s full-scale input range but it will lower
and the AD820 op-amp for use as the buffer. Each in- the resolution requirements (and therefore the cost) of
amp is followed by a high-pass filter that removes the dc the ADC.
component from the signal. It is common practice to
omit one of the in-amps and determine the third output For example, using an in-amp with a gain of 10 ahead
by software (or hardware) calculation. of an 8- bit, 5 volt, ADC will increase circuit resolution
from 19.5 mV (5 V/256) to 1.95 mV. At the same time,
Proper safeguards, such as isolation, must be added to the full-scale input range of the circuit will be reduced
this circuit to protect the patient from possible harm. to 500 mV (5 V/10).

–42–
 Table IX. Typical System Resolutions Using Some Popular ADCs

Converter
Resolution FS System
Converter mV/Bit In-Amp Range Resolution
Type 2n (5 V/2n) Gain (V p-p) (mV p-p)
8-Bit 256 19.5 mV None 5 19.5
8-Bit 256 19.5 mV 2 2.5 9.75
8-Bit 256 19.5 mV 5 1 3.9
8-Bit 256 19.5 mV 10 0.5 1.95

10-Bit 1,024 4.9 mV None 5 4.9

10-Bit 1,024 4.9 mV 2 2.5 2.45
10-Bit 1,024 4.9 mV 5 1 0.98
10-Bit 1,024 4.9 mV 10 0.5 0.49

12-Bit 4,096 1.2 mV None 5 1.2

12-Bit 4,096 1.2 mV 2 2.5 0.6
12-Bit 4,096 1.2 mV 5 1 0.24
12-Bit 4,096 1.2 mV 10 0.5 0.12

Table IX provides input resolution and full-scale input range using an ADC with, or without, an in-amp
preamplifier. Note that the system resolution specified in the figure refers to that provided by the converter together
with the in-amp preamp (if used). Note that for any low level measurement, not only are low noise semiconductor
devices needed, but also careful attention to component layout, grounding, power supply bypassing, and often, the
use of balanced, shielded inputs.

–43–
Matching ADI In-Amps With Some Popular ADCs
Table X shows recommended ADCs for use with the latest generation of ADI in-amps.

Table X. Recommended ADCS for Use with ADI In-Amps

ADI In-Amp AD620 ADI In-Amp AD623

BW 1 MHz BW 800 kHz
Noise 9 nV/√Hz Noise 35 nV/√Hz
VOS 125 µV VOS 200 µV
Accuracy 0.02% (12 Bits) Accuracy 0.1% (10 Bits)
Supply Current 1.3 mA Supply Current 575 µA
Settling Time 15 µs Settling Time 20 µs
Recommended Recommended
ADI ADC#1 AD676/AD677 ADI ADC#1 AD7862/AD7864
Resolution 16-Bit Resolution 12-Bit
Input Range ± 10 V, ± 5 V Input Range ± 10 V , ± 2.5 V, 0 to +2.5 V
Sampling Rt 100 ksps Sampling Rt 250 ksps
S/D Supply +5 V, ± 12 V S/D Supply Single +5 V
Power 360 mW Power 60 mW
Comments Highly Accurate Parallel/Serial Comments 2- and 4-Channel ADCs
Output Devices Use in front of the AD7716 Data
Acquisition System for use in bio-
Recommended medical applications.
ADI ADC#2 AD974/AD976/AD977
Resolution 16-Bit Recommended
Input Range ± 3 V to ± 10 V ADI ADC#2 AD7863/AD7865
Sampling Rt 100/200 ksps Resolution 14-Bit
S/D Supply 0 V to +4 V, 0 V to +12 V Input Range ± 10 V, ± 2.5 V, 0 to +2.5 V
Power 100 mW Sampling Rt 250 ksps
Comments Highly Accurate Data Acquisition S/D Supply Single +5 V
System Power 60 mW
Comments 2- and 4-Channel ADCs
Recommended for providing
CMRR and input scaling in 2.5 V
motor control applications.
Recommended AD7890/AD7891/AD7892/AD7895
ADI ADC#3 Series ADCs
Resolution 12-bit
Input Range 0 to 2.5 V
Sampling Rt 600 ksps
S/D Supply Single +5 V
Power 20-85 mW
Comments The ADCs in this series are ideal
for use with the AD623 In-Amp
in low power, single supply
applications. Use the AD7894 for
14-bit applications.

–44–
Device AD627 High-Speed Data Acquisition
As the speed and accuracy of modern data acquisition
BW 80 kHz systems have increased, a growing need for high-
Noise 38 nV/√Hz bandwidth instrumentation amplifiers has developed
VOS 200 µV —particularly in the field of CCD imaging equipment
Accuracy 0.1% (10 Bits) where offset correction and input buffering are
Supply Current 60 µA required. Here double-correlated sampling techniques
Settling Time 135 µs are often used for offset correction of the CCD
imager. As shown in Figure 68a, two sample-and-
Recommended hold amplifiers monitor the pixel and reference levels
ADI ADC#1 AD7853/AD7854/AD7858/AD7859 and a dc-corrected output is provided by feeding their
Resolution 12-Bit signals into an instrumentation amplifier.
Input Range 0 V–5 V Figure 68b shows how a single multiplexed high-band-
Sampling Rt 100-200 ksps width in-amp can replace several slow speed
S/D Supply Single +3 V, +5 V nonmultiplexed buffers. The system benefits from the
Power 5 mW–15 mW common-mode noise reduction, and subsequent
Comments Very low power, single and dual increase in dynamic range provided by the in-amp.
power supply ADCs. For use with
the AD627 In-Amp. Previously, the low bandwidths of commonly available
instrumentation amplifiers, plus their inability to drive
Recommended 50 Ω loads has restricted their use to low frequency
ADI ADC#2 AD7887/AD7888 or AduC812 applications—generally below 1 MHz. Some higher
bandwidth amplifiers have been available, but these
Resolution 12-Bit have been fixed-gain types with internal resistors. With
Input Range +2.3 V to +5 V these amplifiers, there was no access to the inverting and
Sampling Rt 200 ksps noninverting terminals of the amplifier. Using modern
S/D Supply Single +5 V op-amps, employing the complementary bipolar or “CB”
Power 3.6 mW (AD7888) process, video bandwidth instrumentation amplifiers
Comments Use the AD7888 MicroPower that offer both high bandwidths and impressive dc
ADC for the lowest possible power specifications may now be constructed. Common-mode
level. The AduC812 is a complete rejection may be optimized by trimming or by using low
5 V data acquisition system with cost resistor arrays.
embedded MCU.

Recommended
ADI ADC#3 AD7851 and AD7856
Resolution 14-Bit
Input Range Pseudo-Differential Inputs 0–VREF
Sampling Rt 285 ksps–333 ksps
S/D Supply Single +5 V
Power 60 mW
Comments Single supply 14-bit converters
with multiple unipolar inputs.

–45–
 PIXEL PIXEL
#1 #2
PIXEL LEVEL

REFERENCE
LEVEL

INSTRUMENTATION
AMPLIFIER
PIXEL LEVEL
INPUT 2MHz
NEED 12-BIT 500ns
SAMPLE ADC
& HOLD ACCURACY DC
@1MHz AD671
REFERENCE CORRECTED
LEVEL INPUT OUTPUT

TOTAL SETTLING TIME FOR SAMPLE/HOLD AND

IN-AMP MUST BE LESS THAN 500ns

Figure 68a. In Amp Buffers ADC and Provides DC Correction

ADC, the sampling rate is 500 ns. This means that, for
a total throughput rate of less than 1 µs, these same input
MUX
buffer/sample hold sections must have a total settling
SIGNAL HIGH SPEED IA
INPUTS time of less than 500 ns.
A High-Speed In-Amp Circuit for Data Acquisition
Figure 69 shows a discrete in-amp circuit using two
ADC
AD671 AD825 op-amps and an AMP03 differential (subtrac-
tor) amplifier. This design provides both high
MUX performance and high speed at moderate gains. Cir-
SIGNAL
cuit gain is set by resistor RG where Gain = 1 + 2 RF/RG.
INPUTS Resistors RF should be kept at around 1 kΩ to ensure
maximum bandwidth. Operating at a gain of 10 (using
a 222 Ω resistor for RG) the –3 dB bandwidth of this
circuit is approximately 3.4 MHz. The ac common-
Figure 68b. Single High-Speed In-Amp and Mux mode rejection ratio (gain of 10, 1 V p-p common-mode
Replace Several Slow Speed Buffers signal applied to the inputs) is 60 dB from 1 Hz to 200
kHz and 43 dB at 2 MHz. And it provides better than 46
The bandwidth and settling time requirements demanded
dB CMRR from 4 MHz to 7 MHz. The RFI rejection
of an in-amp buffering an ADC, and for the sample-
characteristics of this amplifier are also excellent: the
and-hold function preceding it, can be quite severe. The
change in dc offset voltage vs. common-mode fre-
input buffer must pass the signal along fast enough so
quency is better than 80 dB from 1 Hz up to 15 MHz.
that the signal is fully settled before the ADC takes its
Quiescent supply current for this circuit is 15 mA.
next sample. At least two samples per cycle are required
for an ADC to unambiguously process an input signal For lower speed applications requiring a low input
(FS/2)—this is referred to as the “Nyquist criteria.” current device, the AD823 FET input op-amp can be
Therefore, a 2 MHz ADC, such as the AD671, requires substituted for the AD825.
that the input buffer/sample hold sections preceding it This circuit can be used to drive a modern, high-speed
provide 12-bit accuracy at a 1 MHz bandwidth. Settling ADC such as the AD871 or AD9240, and provide very
time is equally important: the sampling rate of an ADC high-speed data acquisition. The AD830 can also be
is the inverse of its sampling frequency—for the 2 MHz used for many high-speed applications.

–46–
 +VS 0.01mF

–VIN VOUT 25kV 25kV

–IN SENSE
AD825 2 5

0.01mF
RF 1kV
7 +VS
–VS

OUTPUT
RG 222kV AMP03 6
+VS 0.01mF
4 –VS
RF 1kV

+IN 25kV 25kV REF

AD825 3 1
+VIN
0.01mF

–VS

Figure 69. A High-Performance, High-Speed In-Amp Circuit

MISCELLANEOUS APPLICATIONS The 10 kΩ resistors to each input bias the X GM stage

An AC-Coupled Line Receiver with sufficiently high impedance to keep the input
The AD830 is configurable as an ac-coupled differen- coupling corner frequency low, but not so large that
tial amplifier on a single or bipolar supply voltages. All residual bias current induced offset voltage becomes
that is needed is inclusion of a few noncritical passive troublesome. For dual supply operation, the 10 kΩ
components as illustrated in Figure 70. A simple resis- resistors may go directly to ground. The output common
tive network at the X G M input establishes a is conveniently set by a Zener diode for a low impedance
common-mode bias. Here, the common-mode is cen- reference to preserve the high-frequency CMR. How-
tered at 6 volts but, in principle, can be any voltage ever, a simple resistive divider will work fine and good
within the common-mode limits of the AD830. high-frequency CMR can be maintained by placing a
compensating resistor in series with the +Y input.

+12V
INPUT 0.1mF
10mF AD830
SIGNAL +
1 8 75V
GM
RT COAX
VOUT 75V CABLE
+
ZCM 2 7
10mF A=1 1000mF
10kV 10kV 75V
+VS 3 6
2kV* GM
C

10kV 4 5 +12V

10kV 4.7kV

*OPTIONAL TUNING FOR 1N4736 6.8V

IMPROVING VERY LOW
FREQUENCY CMR.

Figure 70. AC-Coupled Line Receiver

–47–
The excellent CMRR response of the circuit is shown in 0.1
Figure 71. A plot of the 0.1 dB flatness from 10 Hz is 0
shown in Figure 72. With the use of 10 µF input
–0.1
capacitors, the CMR is >90 dB down to a few tens of

AMPLITUDE RESPONSE – dB
Hertz. This level of performance is almost impossible to –0.2
achieve with discrete solutions. –0.3

–0.4
120
WITH CIRCUIT TRIMMED –0.5
USING EXTERNAL 2kV
POTENTIOMETER
COMMON-MODE REJECTION – dB

–0.6
100
–0.7

–0.8
80 WITHOUT EXTERNAL
2kV POTENTIOMETER
–0.9
10 100 1k 10k 100k 1M 10M
FREQUENCY – Hz
60
Figure 72. Amplitude Response vs. Frequency
for Line Receiver
40
Remote Load-Sensing Technique
The circuit of Figure 73 is a unity gain instrumentation
20 amplifier that uses its sense and reference pins to
10 100 1k 10k 100k 1M 10M 100M
FREQUENCY – Hz minimize any errors due to parasitic voltage drops
within the circuit. If heavy output currents are expected,
Figure 71. Common-Mode Rejection vs.
and there is a need to sense a load that is some distance
Frequency for Line Receiver
away from the circuit, voltage drops due to trace or
wire resistance can cause errors. These voltage drops
are particularly troublesome with low resistance loads,
such as 50 Ω.

–IN 25kV 25kV SENSE TWISTED

+VIN 2 5 PAIRS

*
7 +VCC

OUTPUT
AMP03 6
REMOTE
4 –VEE LOAD

+IN 25kV 25kV REFERENCE TWISTED

–VIN 3 1 PAIRS

OUTPUT
GROUND

* IN4148 DIODES ARE OPTIONAL. DIODES LIMIT THE OUTPUT

VOLTAGE EXCURSION IF SENSE AND/OR REFERENCE LINES
BECOME DISCONNECTED FROM THE LOAD.

Figure 73. A Remote Load Sensing Connection

–48–
The sense terminal completes the feedback path for the A Precision Voltage-to-Current Converter
instrumentation amplifier output stage and is normally Figure 74 is a precision voltage-to-current converter
connected directly to the in-amp output. Similarly, the whose scale factor is easily programmed for exact decade
reference terminal sets the reference voltage about ratios using standard 1% metal film resistor values. The
which the in-amp’s output will swing. This connection AD620 operates with full accuracy on standard 5 volt
puts the IR drops inside the feedback loop of the in-amp power supply voltages. Note that although the quies-
and virtually eliminates any IR errors. cent current of the AD620 is only 900 µA, the addition
This circuit will provide a 3 dB bandwidth better than of the AD705 will add an additional 380 µA current
3 MHz. Note that any net capacitance between the consumption.
twisted pairs is isolated from the in-amp’s output by A Current Sensor Interface
25 kΩ resistors, but any net capacitance between the Figure 75 shows a novel circuit for sensing low-level
twisted pairs and ground needs to be minimized to currents. It makes use of the large common-mode range
maintain stability. So, unshielded twisted-pair cable is of the AD626. The current being measured is sensed
recommended for this circuit. For low speed applica- across resistor RS. The value of RS should be less than
tions that require driving long lengths of shielded cable, 1 kΩ and should be selected so that the average differ-
the AMP01 should be substituted for the AMP03 ential voltage across this resistor is typically 100 mV.
device. The AMP01 can drive capacitance loads up to To produce a full-scale output of +4 V, a gain of 40 is
1 µF, while the AMP03 is limited to driving a few used, adjustable by +20% to absorb the tolerance in the
hundred pF.
+VS
0.1mF

VIN+ 3 7

8
+ VX –
RG AD620 6
R1
1 5
+VS 0.1mF
VIN– 2 4 IL

7 2
6
–VS AD705
Vx [(V IN+) – (V IN– )] G 4
I L= = 0.1mF
R1 R1 3
–VS
49,400 0.1mF LOAD
WHERE G = 1 +
RG

Figure 74. A Precision Voltage-to-Current Converter that Operates on ± 5 Volt Supplies

CURRENT IN

CURRENT
RS
SENSOR
–IN 200kV 200kV +IN
CURRENT OUT 1 8

1/6 RS
ANALOG
2 GND G = 100 7
G=30

–VS 3 –VS +VS 6 +VS

0.1mF 100kV 0.1mF
FILTER OUT
CF 4 G= 2 5 OUTPUT
OPTIONAL
LOW-PASS AD626
FILTER

Figure 75. Current Sensor Interface

–49–
sense resistor. Note that there is sufficient headroom to A 4 mA-to-20 mA Single Supply Receiver
allow at least a 10% overrange (to +4.4 V). Figure 77 shows how a signal from a 4 mA-to-20 mA
Output Buffering Low Power In-Amps transducer can be interfaced to the ADuC812, a 12-bit
The AD627 low power in-amp is designed to drive loads ADC with an embedded microcontroller. The signal
of 20 kΩ or greater, but can deliver up to 20 mA to from a 4 mA-to-20 mA transducer is single-ended. This
heavier loads at low output voltage swings. If more than initially suggests the need for a simple shunt resistor, to
20 mA of output current is required, the AD627’s convert the current to a voltage at the high-impedance
output should be buffered with a precision op-amp such analog input of the converter. However, any line resis-
as the AD820 as shown in Figure 76. This op-amp can tance in the return path (to the transducer) will add a
swing from 0 V to 4 V on its output while driving a load current-dependent offset error. So, the current must be
as small as 600 Ω. The addition of the AD820 isolates sensed differentially. In this example, a 24.9 Ω shunt
the in-amp from the load, thus greatly reducing any resistor generates a maximum differential input voltage
thermal effects. to the AD627 of between 100 mV (for 4 mA in) and
500 mV (for 20 mA in). With no gain resistor present,
+VS
the AD627 amplifies the 500 mV input voltage by a
factor of 5, to 2.5 V, the full-scale input voltage of the
0.1mF
7 ADC. The zero current of 4 mA corresponds to a code
3 0.1mF
1
of 819 and the LSB size is 4.9 mV.
6 3 7
RG AD627 A Single Supply Thermocouple Amplifier
8 5 Because the common-mode input range of the AD627
REF
AD820 6
VOUT
2 4 2
0.1mF 0.1mF
extends 0.1 V below ground, it is possible to measure
4 small differential signals with little or no common-mode
component. Figure 78 shows a thermocouple applica-
–VS –VS
tion where one side of the J-type thermocouple is
grounded. Over a temperature range from –200°C to
Figure 76. Output Buffer For Low Power In-Amps

+5V +5V +5V

0.1mF 0.1mF

0.1mF
3 7
VREF AVDD DVDD
1
4mA–20mA LINE 6 ADuC812
4mA–20mA 24.9V RG AD627 AIN 0–7
TRANSDUCER IMPEDANCE MicroConverterTM
8 5
AGND DGND
2 4 REF
G=5
MicroConverter is a trademark of Analog Devices, Inc.

Figure 77. A 4 mA-to-20 mA Receiver Circuit

COLD JUNCTION +5V

COMPENSATION 0.1mF
3
7
1
J-TYPE 6
RG AD627 VOUT
THERMOCOUPLE
8
5 REF
2 +2V
4
THERMOCOUPLE
WIRES COPPER
WIRES

Figure 78. A Thermocouple Amplifier Using A Low Power, Single Supply In-Amp

–50–
+200°C, the J-type thermocouple delivers a voltage SPECIALTY PRODUCTS
ranging from –7.890 mV to 10.777 mV. Analog Devices sells a number of specialty products,
A programmed gain on the AD627 of 100 (RG = 2.1 kΩ) many of which were designed for the audio market, that
and a voltage on the AD627 REF pin of 2 V, results in are useful for some in-amp applications. Table XI lists
the AD627’s output voltage ranging from 1.110 V to some of these products.
3.077 V relative to ground.

Table XI. Specialty Products Available from Analog Devices

Model CMR
Number Description BW (DC) Supply Features
SSM2141 Diff Line Receiver 3 MHz 100 dB ± 18 V High-CMR, Audio Subtractor
SSM2143 Diff Line Receiver 7 MHz (G = 0.5) 90 dB ± 6 V to ± 18 V Low Distortion, Audio Subtractor
SSM2017 Audio Preamp 4 MHz (G = 1) 54 dB ± 6 V to ± 22 V Low Noise, Low Distortion, Audio IA
All brand or product names mentioned are trademarks or registered trademarks of their respective holders.

–51–
–52–
Appendix A
Instrumentation Amplifier Specifications
To successfully apply any electronic component, a full will be discussed in terms of how they are measured and
understanding of its specifications is required. That is to what errors they might contribute to the overall perfor-
say, the numbers contained in a spec sheet are of little mance of the circuit.
value if the user does not have a clear picture of what Table XII shows a portion of the specification sheet for
each spec means. In this section, a typical monolithic the Analog Devices AD620 instrumentation amplifier.
instrumentation amplifier specification sheet will be
reviewed. Some of the more important specifications
Table XII. AD620 Specifications

A
AD620–SPECIFICATIONS (Typical @ +25ⴗC, V = ⴞ15 V, and R = 2 k⍀, unless otherwise noted)
S L

AD620A AD620B AD620S1

Model Conditions Min Typ Max Min Typ Max Min Typ Max Units

B GAIN G = 1 + (49.4 k/RG)

C Gain Range 1 10,000 1 10,000 1 10,000
D Gain Error2 VOUT = ± 10 V
G=1 0.03 0.10 0.01 0.02 0.03 0.10 %
G = 10 0.15 0.30 0.10 0.15 0.15 0.30 %
G = 100 0.15 0.30 0.10 0.15 0.15 0.30 %
G = 1000 0.40 0.70 0.35 0.50 0.40 0.70 %
E Nonlinearity, VOUT = –10 V to +10 V,
G = 1–1000 RL = 10 kΩ 10 40 10 40 10 40 ppm
G = 1–100 RL = 2 kΩ 10 95 10 95 10 95 ppm
F Gain vs. Temperature
G =1 10 10 10 ppm/°C
Gain >12 –50 –50 –50 ppm/°C

G VOLTAGE OFFSET (Total RTI Error = VOSI + VOSO/G)

Input Offset, VOSI VS = ± 5 V to ± 15 V 30 125 15 50 30 125 µV
Over Temperature VS = ± 5 V to ± 15 V 185 85 225 µV
Average TC VS = ± 5 V to ± 15 V 0.3 1.0 0.1 0.6 0.3 1.0 µV/°C
Output Offset, VOSO VS = ± 15 V 400 1000 200 500 400 1000 µV
VS = ± 5 V 1500 750 1500 µV
Over Temperature VS = ± 5 V to ± 15 V 2000 1000 2000 µV
Average TC VS = ± 5 V to ± 15 V 5.0 15 2.5 7.0 5.0 15 µV/°C
Offset Referred to the
Input vs.
Supply (PSR) VS = ± 2.3 V to ± 18 V
G=1 80 100 80 100 80 100 dB
G = 10 95 120 100 120 95 120 dB
G = 100 110 140 120 140 110 140 dB
G = 1000 110 140 120 140 110 140 dB

H INPUT CURRENT
Input Bias Current 0.5 2.0 0.5 1.0 0.5 2 nA
Over Temperature 2.5 1.5 4 nA
Average TC 3.0 3.0 8.0 pA/°C
Input Offset Current 0.3 1.0 0.3 0.5 0.3 1.0 nA
Over Temperature 1.5 0.75 2.0 nA
Average TC 1.5 1.5 8.0 pA/°C

–53–
 AD620A AD620B AD620S1
Model Conditions Min Typ Max Min Typ Max Min Typ Max Units

INPUT
Input Impedance
Differential 10储2 10储2 10储2 GΩ储pF
Common-Mode 10储2 10储2 10储2 GΩ储pF
I Input Voltage Range3 VS = ± 2.3 V to ± 5 V –VS + 1.9 +VS – 1.2 –VS + 1.9 +VS – 1.2 –VS + 1.9 +VS – 1.2 V
Over Temperature –VS + 2.1 +VS – 1.3 –VS + 2.1 +VS – 1.3 –VS + 2.1 +VS – 1.3 V
VS = ± 5 V to ± 18 V –VS + 1.9 +VS – 1.4 –VS + 1.9 +VS – 1.4 –VS + 1.9 +VS – 1.4 V
Over Temperature –VS + 2.1 +VS – 1.4 –VS + 2.1 +VS – 1.4 –VS + 2.3 +VS – 1.4 V
J Common-Mode Rejection
Ratio DC to 60 Hz with
I kΩ Source Imbalance VCM = 0 V to ± 10 V
G=1 73 90 80 90 73 90 dB
G = 10 93 110 100 110 93 110 dB
G = 100 110 130 120 130 110 130 dB
G = 1000 110 130 120 130 110 130 dB

OUTPUT
I Output Swing RL = 10 kΩ,
VS = ± 2.3 V to ± 5 V –VS + 1.1 +VS – 1.2 –VS + 1.1 +VS – 1.2 –VS + 1.1 +VS – 1.2 V
Over Temperature –VS + 1.4 +VS – 1.3 –VS + 1.4 +VS – 1.3 –VS + 1.6 +VS – 1.3 V
VS = ± 5 V to ± 18 V –VS + 1.2 +VS – 1.4 –VS + 1.2 +VS – 1.4 –VS + 1.2 +VS – 1.4 V
Over Temperature –VS + 1.6 +VS – 1.5 –VS + 1.6 +VS – 1.5 –VS + 2.3 +VS – 1.5 V
Short Current Circuit ± 18 ± 18 ± 18 mA

DYNAMIC RESPONSE
Small Signal –3 dB Bandwidth
G=1 1000 1000 1000 kHz
G = 10 800 800 800 kHz
G = 100 120 120 120 kHz
G = 1000 12 12 12 kHz
Slew Rate 0.75 1.2 0.75 1.2 0.75 1.2 V/µs
K Settling Time to 0.01% 10 V Step
G = 1–100 15 15 15 µs
G = 1000 150 150 150 µs

NOISE
2 2
Voltage Noise, 1 kHz Total RTI Noise = (e ni ) + (eno /G )
Input, Voltage Noise, eni 9 13 9 13 9 13 nV/√Hz
Output, Voltage Noise, eno 72 100 72 100 72 100 nV/√Hz
RTI, 0.1 Hz to 10 Hz
G=1 3.0 3.0 6.0 3.0 6.0 µV p-p
G = 10 0.55 0.55 0.8 0.55 0.8 µV p-p
G = 100–1000 0.28 0.28 0.4 0.28 0.4 µV p-p
Current Noise f = 1 kHz 100 100 100 fA/√Hz
0.1 Hz to 10 Hz 10 10 10 pA p-p

REFERENCE INPUT
RIN 20 20 20 kΩ
IIN VIN+ , VREF = 0 +50 +60 +50 +60 +50 +60 µA
Voltage Range –VS + 1.6 +VS – 1.6 –VS + 1.6 +VS – 1.6 –VS + 1.6 +VS – 1.6 V
Gain to Output 1 ± 0.0001 1 ± 0.0001 1 ± 0.0001

POWER SUPPLY
Operating Range4 ± 2.3 ± 18 ± 2.3 ± 18 ± 2.3 ± 18 V
L Quiescent Current VS = ± 2.3 V to ± 18 V 0.9 1.3 0.9 1.3 0.9 1.3 mA
Over Temperature 1.1 1.6 1.1 1.6 1.1 1.6 mA

TEMPERATURE RANGE
For Specified Performance –40 to +85 –40 to +85 –55 to +125 °C

NOTES
1
See Analog Devices military data sheet for 883B tested specifications.
2
Does not include effects of external resistor RG.
3
One input grounded. G = 1.
4
This is defined as the same supply range which is used to specify PSR.
Specifications subject to change without notice.

–54–
(A) Specifications (Conditions) Note that there will be a gain error if the standard
At the top of the spec sheet is the statement that the resistance values are different from those calculated. In
listed specs are typical @ VS = ± 15 V, RL = 2 kΩ and TA addition, the tolerance of the resistors used (normally
= +25°C unless otherwise noted. This tells the user that 1% metal film) will also affect accuracy. And there will
these are the normal operating conditions under which also be a gain drift, typically 50 ppm/°C to 100 ppm/°C,
the device is tested. Deviations from these conditions if standard resistors are used. Of course the user must
might degrade (or improve) performance. When devia- provide a very clean (low leakage) circuit board to
tions from the “normal” conditions are likely (such as a realize an accurate gain of 1, since even a 200 MΩ
change in temperature) the significant effects are usu- leakage resistance will cause a gain error of 0.2%.
ally indicated within the specs. This statement also tells Normal metal film resistors are within 1% of their stated
us that all numbers are typical unless noted; “typical” value, which means that any two resistors could be as
means that the manufacturer’s characterization process much as 2% different in value from one another.
has shown this number to be average, but individual Thin-film resistors in monolithic integrated circuits
devices may vary. have an absolute tolerance of only +20%, however the
Specifications not discussed in detail are self-explanatory matching between resistors on the same chip can be
and require only a basic knowledge of electronic mea- excellent: typically better than 0.1% and resistors on the
surements. Those specs do not apply uniquely to same chip will track each other thermally, so gain drift
instrumentation amplifiers. over temperature is greatly reduced.
Instrumentation amplifiers designed for true “rail-to- (C) Gain Range
rail” operation have a few critical specifications that Often specified as having a gain range of 1 to 1000, or
need to be considered. Their input voltage range should 1 to 10,000, many instrumentation amplifiers will often
allow the in-amp to accept input signal levels that are operate at higher gains, but the manufacturer will not
close to the power supply or ground. Their output promise a specific level of performance.
swing should be within 0.1 volts of the supply line or In practice, as the gain resistor becomes increasingly
ground. In contrast, a typical dual supply in-amp can smaller, any errors due to the resistance of the metal
only swing within two volts or more of the supply or runs and bond wires inside the IC package become
ground. In 5 volt single supply data acquisition systems, significant. These errors, along with an increase in noise
an extended output swing is vital as this allows the full and drift, may make higher gains impractical.
input range of the ADC to be used, providing high
resolution. (D) Gain Error
The number given by this specification describes maxi-
(B) Gain mum deviation from the gain equation. Monolithic
These specifications relate to the transfer function of in-amps such as the AD620 have very low factory
the device. The product’s gain equation is normally trimmed gain errors. Although externally connected
listed at the beginning of the specifications page. gain networks allow the user to set the gain exactly, the
The gain equation of the AD620 is: temperature coefficients of these external resistors and
the temperature differences between individual resis-
49, 400 Ω tors within the network, all contribute to the circuit’s
Gain = +1
RG overall gain error.

To select an RG for a given gain, solve the equation for RG: If the data is eventually digitized and fed to an “intelli-
gent system” (such as a microprocessor), it may be
49, 400 Ω possible to correct for gain errors by measuring a known
RG = reference voltage and then multiplying by a constant.
G −1
(E) Nonlinearity
For example, the calculated resistance for some com- Nonlinearity is defined as the deviation from a straight
mon gains: line on the plot of an in-amp’s output voltage versus
G = 1: RG = ∞ (Open Circuit) input voltage. Figure 79 shows the transfer function of
G = 9.998: RG = 5.49 kΩ a device with exaggerated nonlinearity.
G = 100: RG = 499 Ω
G = 991: RG = 49.9 Ω

–55–
The magnitude of this error is equal to: Regardless of the method used to specify nonlinearity,
the errors thus created are irreducible. That is to say:
Nonlinearity = Actual Output − Calculated Output these are neither fixed errors nor are they proportional
Rated Full −Scale Output Range
to input or output voltage and, therefore, can not be
This deviation can be specified relative to any straight reduced by external adjustment.
line or to a specific straight line. There are two com- (F) Gain vs. Temperature
monly used methods of specifying this ideal straight line These numbers provide both maximum and typical devia-
relative to the performance of the device. tions from the gain equation as a function of temperature.
The “Best Straight Line” method of defining nonlinear- This error can be subtracted out in software by using a
ity consists of measuring the peak positive and the peak temperature reference and calibration data.
negative deviation and then adjusting the gain and offset (G) Voltage Offset
of the in-amp so that these maximum positive and Voltage offset specifications are often considered a
negative errors are equal. For monolithic in-amps this is figure of merit for instrumentation amplifiers. While
usually accomplished by laser trimming thin-film resis- any initial offset may be adjusted to zero, using hard-
tors or by other means. The “Best Straight Line” ware or software, shifts in offset voltage due to
method provides impressive-looking specifications but temperature variations are more difficult to correct.
it is much more difficult to perform. The entire output Intelligent systems using a microprocessor can use a
signal range needs to be examined before trimming to temperature reference and calibration data to correct
determine the maximum positive and negative deviations. for this but there are many small-signal high-gain appli-
The “End-Point” method of specifying nonlinearity cations that don’t have this capability.
requires that any offset and/or gain calibrations are Voltage offset and drift comprise four separate error
performed at the minimum and maximum extremes of definitions: “room temperature” (+25°C) input and
the output range. Usually offset is trimmed at a very low output offset and offset drift over temperature referred
output level while scale factor is trimmed near the to both input and output.
maximum output level. This makes trimming much
easier to implement but may result in nonlinearity errors An in-amp should be regarded as a two-stage amplifier
of up to twice those attained using the “best straight line” with both an input and an output section. Each section
technique. This worst case error will occur when the has its own error sources. Because the errors of the
transfer function is “bowed” in one direction only. output section are multiplied by a fixed gain (usually
two), this section is often the principle error source at
Most linear devices, such as instrumentation amplifiers, low circuit gains. When the in-amp is operating at
are specified for best-straight-line linearity. This needs higher gains, the gain of the input stage is increased. As
to be considered when evaluating the error budget for a the gain is raised, errors contributed by the input section
particular application. are multiplied, while output errors are reduced. Thus, at
high gains the input stage errors dominate.

VOUT
GAIN
e + MAX IDEAL (STRAIGHT LINE)

ACTUAL RESPONSE

–VIN FULL SCALE

VIN
e – MAX +VIN FULL SCALE

|e + MAX| > |e – MAX|

|e + MAX| + |e – MAX| = K

Figure 79. Transfer Function Illustrating Exaggerated Nonlinearity

–56–
Input errors are those contributed by the input stage in-amps when source resistances in the two input termi-
alone; output errors are those due to the output section. nals are unequal.
Input-related specifications are often combined and Although instrumentation amplifiers have differential
classified together as “referred to input” (RTI) error inputs, there must be a return path for their bias
while all output-related specifications are considered currents to flow to common (“ground”).
“referred to output” (RTO) errors. It is important to
understand that although these two specifications If this return path is not provided, the bases (or gates)
often provide numbers that are not the same, either of the input devices are left “floating” (unconnected)
error term is correct, as each defines the total error in and the in-amp’s output will rapidly drift either to
a different way. common or to the supply.
For a given gain, an in-amp’s input and output errors Therefore, when amplifying “floating” input sources
can be calculated by using the following formulas: such as transformers (those without a center tap ground
connection) or ungrounded thermocouples, or any ac-
Total Error, RTI = Input Error + (Output Error/Gain) coupled input sources, there must still be a dc path from
Total Error, RTO = (Gain × Input Error) + Output Error each input to ground. A high value resistor of 1 MΩ to
Sometimes the spec page will list an error term as RTI 10 MΩ connected between each input and ground will
or RTO for a specified gain, in other cases it is up to the normally be all that it needed to correct this condition.
user to calculate the error for the desired gain. (I) Key Specifications For Single Supply In-Amps
As an example, the total voltage offset error of the There are some specific specifications that apply to
AD620A in-amp when operating at a gain of ten can be single supply (i.e., rail-to-rail) in-amp products which
calculated using the individual errors listed on its speci- are of great importance to designers powering in-amps
fications page. The (typical) input offset of the AD620 from low voltage, single supply voltages.
(VOSI), is listed as 30 µV. Its output offset (VOSO) is Input and Output Voltage Swing
listed as 400 µV. The total voltage offset referred to A single supply in-amp needs to be able to handle input
input, RTI, is equal to: voltages that are very close to the supply and ground. In
Total RTI Error = VOSI + (VOSO/G) = 30 µV + (400 µV/ a typical dual supply in-amp the input (and output)
10) = 30 µV + 40 µV = 70 µV. voltage range is within only about two volts of the supply
or ground. This becomes a real problem when the
The total voltage offset referred to the output, RTO, is device is powered from a 5 V or especially so when using
equal to: the new +3.3 V standard. A standard in-amp operat-
Total Offset Error RTO = (G (VOSI)) + VOSO = (10 ing from a +5 V single supply line has only about 1 volt
(30 µV)) + 400 µV = 700 µV. of “headroom” remaining; with a +3.3 V supply it has
virtually none.
Note that the two numbers are 10× in value and
logically, they should be as, at a gain of ten, the error Fortunately, a decent single supply in-amp such as the
at the output of the in-amp should be ten times the AD627 will allow an output swing within 100 mV of the
error at the input. supply and ground. The input level is somewhat less,
within 100 mV of ground and 1 V of the supply rail. In
(H) Input Bias and Offset Currents
critical applications, the reference terminal of the in-
Input bias currents are those currents flowing into, or
amp can be moved off center to allow a symmetrical
out of, the input terminals of the in-amp. In-amps using
input voltage range.
FET input stages have lower room-temperature bias
currents than their bipolar cousins, but FET input Operating Voltage Range
currents double approximately every 11°C. Input bias A single supply in-amp should have the same overall
currents can be considered as a source of voltage offset operating voltage range when using either single or dual
error (i.e., input current flowing through a source supplies. That is, a single supply in-amp, which is
resistance causes a voltage offset). Any change in bias specified to operate with dual supply voltages from ± 1 V
current is usually of more concern than the magnitude to ± 18 V, should also operate over a +2 V to +36 V range
of the bias current. with a single supply. But this may not always be the case.
In fact, some in-amps, such as the AD623, will operate
Input offset current is the difference between the two
to even lower equivalent voltage levels in single supply
input bias currents and this leads to offset errors in

–57–
mode than with a dual supply. For this reason, it is AC Common-Mode Rejection
always best to check the data sheet specifications. As might be expected, an in-amp’s common-mode
( J) Common-Mode Rejection rejection does vary with frequency. Usually, CMR is
Common-Mode Rejection (CMR) is a measure of the specified at dc or at very low input frequencies. At
change in output voltage when the same voltage is higher gains, an in-amp’s bandwidth does decrease,
applied to both inputs. These specifications may be lowering its gain and introducing additional phase shift
given either a full-range input voltage change or for a in its input stage.
specified source imbalance in Ohms. Since any imbalance in phase shift in the differential
Common-Mode Rejection Ratio (CMRR) is a ratio input stage will show up as a common-mode error, ac
expression while Common-Mode Rejection (CMR) is CMRR will usually decrease with frequency. Figure 80
the logarithm of that ratio. Both specifications are shows the CMR vs. frequency of the AD620.
normally referred to output (RTO). That is:
(K) Settling Time
Change in Output Voltage Settling time is defined as that length of time required
CMRR = for the output voltage to approach, and remain within,
Change in Common − Mode Input Voltage a certain tolerance of its final value. It is usually speci-
While: fied for a fast full-scale input step and includes output
slewing time. Since several factors contribute to the over-
CMR = 20 Log10 CMRR
all setting time, fast settling to 0.1% does not necessarily
For example, a CMRR of 10,000 corresponds to a mean proportionally fast settling to 0.01%. In addition,
CMR of 80 dB. For most in-amps, the CMR increases settling time is not necessarily a function of gain. Some
with gain. This is because most designs have a front-end of the contributing factors to long settling times include
configuration that rejects common-mode signals while slew rate limiting, underdamping (ringing) and thermal
amplifying differential (i.e., signal) voltages. gradients (long tails).
Common-mode rejection is usually specified for a full- (L) Quiescent Supply Current
range common-mode voltage (CMV) change at a given This specifies the quiescent or nonsignal power supply
frequency, and a specified imbalance of source imped- current consumed by an in-amp within a specified
ance (e.g., l kΩ source unbalance, at 60 Hz). operating voltage range. An in-amp’s quiescent supply
For most in-amps, CMR increases with gain. This is current is an increasingly important issue as an increasing
very beneficial, as it allows the extraction of very weak number of real applications need to be battery powered.
input signals from the background noise. With the increasing number of battery-powered appli-
cations, device power consumption has become a critical
160
design factor. Products such as the AD627 have a very
140 G = 1000
low quiescent current consumption of only 60 µA which
at +5 V is only 0.3 mW. Compare this power level to
G = 100
120 that of an older, “vintage,” dual supply product such as
G = 10 the AD526. The AD526 draws 14 mA with a ± 15 V
100
supply (30 V total) for a whopping 420 mW, 1400 times
CMR – dB

G=1
80 the power consumption of the AD627. The implica-
tions for battery life are dramatic.
60
With the introduction of products such as the AD627,
40 very impressive overall performance is provided while
consuming only microamps of supply current. Of course,
20
some trade-offs are always necessary, so micropower
0
in-amps tend to have lower bandwidth and higher noise
0.1 1 10 100 1k 10k 100k 1M than full power devices. The ability to operate rail-to-
FREQUENCY – Hz
rail from a single supply voltage is an essential feature of
Figure 80. A Typical Graph of Common-Mode any micropower in-amp.
Rejection vs. Frequency

–58–
Appendix B
Monolithic In-Amps Available From Analog Devices
Table XIII below is useful for comparing the specifica- available on CD ROM. For the very latest update on any
tions of Analog Devices In-Amp Products. In addition, ADI product, check the Analog Devices Website at:
the Analog Devices Designer’s Reference Manual is http://www.analog.com.
Table XIII. Specifications
Input
CMR Settling Input Voltage
@ 60 Hz, BW Time to Input Voltage Input Output Noise Gain Gain
Supply 1k Source @ 0.01%, Voltage Offset Bias Offset Density Range Error
Generic Current Operating Gain Imbalance, G = 10 G = 10 Offset TC Current Voltage (f = 1 kHz) Min @
Part (mA) Voltage Setting G = 10 (kHz) (␮s) (␮V) (␮V/°C) (nA) (mV) (nV/√Hz) to G = 10
Number Max Range (V) Method (dB) Min Typ Typ Max Max Max Max Max (%) Max
IN-AMPS FOR NEW DESIGNS
Low Cost In-Amps
AD622 1.3 ± 2.3 to ± 18 Resistor 86 800 10 125 1 5 1.5 12 (typ) 1 to 1k 0.5
AD623 0.575 ± 2.5 to ± 6 Resistor 90 100 20 200 2 25 1 35 (typ) 1 to 1k 0.35
Dual,
+3 to +12
Single
Single Supply In-Amps
AD623 0.575 ± 2.5 to ± 6 Resistor 90 100 20 200 2 25 1 35 (typ) 1 to 1k 0.35
Dual,
+3 to +12
Single
AD626 20.23 ± 2.5 to ± 6 Pin 67 100 24 500 1 (typ) ns ns 250 (typ) 10, 0.51
Dual, (f = 100
+2.4 to 100 Hz)
+10 Single
AD627 0.085 ± 1.2 to Resistor 77 80 135 200 3 10 1 38 5 to 0.35
± 18 Dual, (G = 5) (G = 5) 1000
+2.2 to +36
Single
AMP04 0.9 ± 5 to ± 15 Resistor 55 300 ns 600 6 40 6 45 1 to 1k 0.75
Dual, (typ) 700 900 3
+5 to +30 45 (typ)
Single
High Accuracy In-Amps
AD620 1.3 ± 2.3 to ± 18 Resistor 93 800 15 125 1 2 1 13 1 to 0.3
10000
AD621 1.3 ± 2.3 to ± 18 Pin 93 800 12 250 2.5 2 na 17 10, 100 0.15
(Total (Total (Total RTI)
RTI) RTI)
Wide Bandwidth
AMP03 3.5 ± 4.5 to ± 19 na 80 3000 1 (typ) ns ns ns ns 750 1 0.008
(Total RTO) (G = 1)
High CMV
AD629 1 ± 2.5 to ± 18 na 77 500 15 1 20 na na 550 na 0.05
(G = 1) (G = 1) (G = 1)
VINTAGE IN-AMPS
High Accuracy In-Amps
AD524 5 ± 6 to ± 18 Pin 85 400 15 250 2 50 5 7 1 to 1k 0.25
AMP01 4.8 ± 4.5 to ± 18 Resistor 95 100 13 100 1 6 6 59 0.1 to 0.8
10000
AMP02 6 ± 6 to ± 18 Resistor 95 300 10 200 4 20 8 18 (typ) 1 to 0.4
10000
Low Noise In-Amps
AD624 5 ± 6 to ± 18 Pin 90 1000 15 200 2 ± 50 5 4 1 to 1k ± 0.05
(G = 1) (G = 1)
AD625 5 ± 5 to ± 18 Resistor 90 400 15 200 2 ± 50 5 4 1 to 1k 0.05
Software-Programmable
AD526 14 ± 4.5 to Soft- ns 350 7 700 10 0.15 ns 30 1, 2, 4, 0.07
± 16.5 ware (G = 16) (G = 16) 8, 16 (G = 16)

–59–
–60–
Appendix C
Device Pinouts for Older In-Amp Products

–INPUT PROTECTION
DIG GND 1 16 A1
4.44kV AD524
G = 10 NULL 2 15 A0
404V
G = 100 VIN 3 14 CS
Vb 20kV
40V SENSE NULL 4 13 CLK
AD526
G = 1000
TOP VIEW
20kV 20kV ANALOG GND 2 5 (Not to Scale) 12 A2
RG1
VOUT ANALOG GND 1 6 11 B
RG2
20kV 20kV –VS 7 10 +VS
20kV
REFERENCE VOUT SENSE 8 9 VOUT FORCE

+INPUT PROTECTION

AD524 AD526

V+
RG 1 18 +IN
RG 2 17 VIOS NULL 3
+IN 7
–IN 3 16 VIOS NULL 1
RG1
VOOS NULL 4 15 RS RG 6
AMP02
VOOS NULL 5 14 RS 8
RG2 5
2
TEST PIN* 6 13 +VOP –IN 4
REFERENCE
SENSE 7 12 V+
REFERENCE 8 11 V– V–
OUTPUT 9 10 –VOP
AMP01 VOUT
R )
(50kV
G= = +1
TOP VIEW (+IN) – (–IN) G
(Not to Scale)
FOR SOL CONNECT SENSE TO OUTPUT
*MAKE NO ELECTRICAL CONNECTION

AMP01 AMP02

–61–
 INPUT 100kV
BUFFERS
R GAIN
IN(–) 2 1 8 VOUT
6
IN(+) 3
RG1 1 8 RG2
11kV
–IN 2 SSM2017 7 V+
TOP VIEW 6
11kV +IN 3 OUT
(Not to Scale)
V– 4 5 REFERENCE
100kV

5 REF

AMP04 SSM2017

REF 1 8 NC
REFERENCE 1 8 NC
–IN 2 SSM2141 7 V+ –IN 2 SSM2143 7 V+
TOP VIEW
+IN 3 TOP VIEW 6 OUTPUT +IN 3 (NOT TO SCALE)
6 VOUT
(Not to Scale)
V– 4 5 SENSE V– 4 5 SENSE
OP-482

NC = NO CONNECT NC = NO CONNECT

SSM2141 SSM2143

–INPUT 1 16 RG1
+INPUT 2 15 OUTPUT NULL
RG2 3 14 OUTPUT NULL
INPUT NULL 4 AD624 13 G = 100 SHORT TO
TOP VIEW RG2 FOR
INPUT NULL 5 (Not to Scale) 12 G = 200
DESIRED
REF 6 11 G = 500 GAIN
–VS 7 10 SENSE
+VS 8 9 OUTPUT

FOR GAINS OF 1000 SHORT RG1 TO PIN 12

AND PINS 11 AND 13 TO RG2

AD624

–62–
Subject Index:

A AD626:
AC-coupled line receiver: large signal pulse response, 23
amplitude response vs. frequency, 48 properties, 23
circuit, 47 simplified schematic, 23
CMR vs. frequency, 48 AD627:
in-amp application, 47–48 closed-loop gain vs. frequency, 21
AD524, device pinout, 61 CMR vs. frequency, 21
AD526, device pinout, 61 CMRR over frequency, 12
AD620: gain nonlinearity, 21
closed-loop gain vs. frequency, 14 in-amp input circuit, 29
CMR vs. frequency, 14 monolithic in-amp circuit, diagram, 11
CMRR, 14 RFI suppression circuit, 35
gain nonlinearity, 15 simplified schematic, 20
monolithic, high accuracy, 59, 63 small signal pulse response, 21
monolithic in-amp, 14–15 true in-amp, 20
properties, 14 AD629:
RFI suppression circuit, 34 CMR vs. frequency, 24
RFI suppression using RF choke, 35 connection diagram, 24
schematic, 13 properties, 24
series, 15 uses, 24
in-amp input circuit, 29 AD671, 12-bit ADC, 46
small signal pulse response, 15 AD822, Wheatstone bridge driver, 40
specifications, 53–54 AD830:
AD621: closed-loop connection, 25
best overall DC performance, 33 CMR vs. frequency, 26
closed-loop gain vs. frequency, 17 connection diagram, 24
CMR vs. frequency, 17 gain vs. frequency, 26
gain nonlinearity, 17 topology, 24–25
properties, 16 wideband differencing amplifier, 24
schematic, 16 ADC:
small signal pulse response, 17 calculation of requirements, 42–43
AD622: recommended for in-amps, table, 44–45
closed-loop gain vs. frequency, 16 resolution in bits, 42
CMR vs. frequency, 15 system resolutions, table, 43
gain nonlinearity, 16 AMP01, device pinout, 61
properties, 15 AMP02, device pinout, 61
AD623: AMP03:
closed-loop gain vs. frequency, 19 closed-loop gain vs. frequency, 22
CMRR vs. frequency, 19 CMR vs. frequency, 22
gain nonlinearity, 20 functional block diagram, 22
in-amp input circuit, 30 properties, 22
properties, 18–20 small signal pulse response, 22
resistor-programmed gain, value, 19 AMP04, device pinout, 62
RFI suppression circuit, 35 Audio:
simplified schematic, 18 in-amp, 3
small signal pulse response, 20 in-amp applications, table, 51
three op-amp in-amp, 18–20

–63–
B I
Bandwidth, in-amp, 3 Impedance, in-amp, 2
Bessel filter, values, 38 In-amp:
Bias, low input, in-amp, 2–3 AD620 series, protection resistor values, 30
Bridge applications: ADC buffer, DC correction, 46
classic circuit, 39 assembly, 4
low dropout bipolar driver, 40 basic theory, 1
single supply, 39 block diagram, 4
Butterworth filter, values, 38 characteristics, 1–2
circuitry, 5
C DC accuracy, design issues, 31–33
Cable termination, 28 definition, 1–2
CCD imaging, high-speed data acquisition, 45–46 difference products, 22–24
Chebychev filters, values, 38 effective application, 27–38
Clamping diodes, 30 error reduction, 33–36
Classic bridge circuit, 39 external view, 4
CMR: high accuracy, table, 59, 63
high CMV, table, 59, 63
AC, definition, 58
high speed, CMR performance, 38
definition, 2, 58
high-speed data acquisition, circuit, 46–47
in-amp, properties, 2
input protection, 29–31
CMR vs. frequency, graph, 58
ESD and DC overload, 29–30
CMRR, definition, 2, 58 ESD and transient overload, 31
Common mode voltage, see: CMV external protection diodes, 30
Common-mode gain, 2 low cost, table, 59, 63
Common-mode rejection, see: CMR low power, output buffering, circuit, 50
Common-mode rejection ratio, see: CMRR monolithic, 13–26
Current sensor interface, circuit, 49–50 advantages over op-amp in-amp, 13–14
available from Analog Devices, 59
D design, advantages, 14–26
Data acquisition: external resistors, errors, 33
bridge applications, 39–40 optimization,
in-amp, 3 high performance, 14–17
in-amp applications, 39–47 single supply operation, 18–21
DC offset error, monolithic in-amp, solutions, 33 performance summary, 13
DC return path, diagram, 28 and multiplex, for high-speed data acquisition, 46
Difference amplifier products, 22–24 older, device pinouts, 61–62
Dual supply, in-amp, 27 one op-amp, diagram, 5
op-amp subtractor, 5
E-F-G-H power source, 4
Electronics, monitoring and controlling, in-amp, 3 properties, 2–4
Filter: real-world, applications, 39–51
4-pole low pass, recommended ADCs, table, 44–45
diagram, 37 RFI rejection, testing setup, 36
values, 38 selection guide, 63
Gain: single supply,
definition, 55 key specifications, definition, 57–58
simple, in-amp, 3 table, 59, 63
Gain drift, lowest, design, 31–32 specifications, 53–58
Gain error, definition, 55 subtractor products, 22–24
Gain range, definition, 55 three op-amp, 6–8
CMRR trim circuit, 38
Gain resistor, monolithic in-amp, 33
design considerations, 7–8
Gain vs. temperature, definition, 56
diagram, 6
High-speed data acquisition, 45–47
–64–
 low TC feedback resistors, diagram, 32 Power supply:
reduced CMV range, diagram, 7 bypassing, 27
two op-amp, 8–9 diagram, 27
architecture, diagram, 9 decoupling, 27
common-mode design, single-supply operation, 9 stability, 27
diagram, 8 Precision voltage-to-current converter, circuit, 49
disadvantages, 8 Quiescent supply current, definition, 58
“homebrew,”
CMRR over frequency, 12 R
diagram, 11 Ratiometric vs. voltage-reference, system design,
operating gains and resistor values, 9 36–37
output swing limitations, 10 Remote load sensing circuit, 48–49
uses, 3–4 RF choke, AC CMR vs. frequency, table, 36
video speed products, 24–26 RFI error, reduction, 34
vintage, RFI testing, 36
high accuracy, table, 59, 63 RTI error, monolithic in-amp, 33–34
low noise, table, 59, 63 RTO error, monolithic in-amp, 33–34
software-programmable, table, 59, 63 S
wide bandwidth, table, 59, 63 Schottky barrier rectifiers, 30
In-amp circuit, AC-coupled, no input ground return, Settling time:
28 definition, 58
In-amp/ADC circuit, with ratiometric reference, 37 in-amp, 38
Input bias and offset currents, definition, 57 Signal conditioning, high-speed, in-amp, 3
Input buffering: Signal-to-noise ratio, see: SNR
simple subtractor, 5–6 Single supply, in-amp, 27
subtractor circuit, 5–6 Single supply data acquisition system, 39
diagram, 5 Single supply receiver, 4 mA-to-20 mA, circuit, 50
Input ground return, 27–28 Single supply thermocouple amplifier, circuit, 50–51
Input and output voltage swing, definition, 57 SNR, bettering, using low-pass filter, 37
Input signal levels, gain errors, circuit, 32 Software, programmable applications, in-amp, 3
L-M Specifications, definition, 55
Low dropout bipolar bridge driver, circuit, 40 SSM2017, device pinout, 62
Medical EKG monitor circuit, 42 SSM2141, device pinout, 62
Medical instrumentation, in-amp, 3 SSM2143, device pinout, 62
Subtractor:
N circuit, 5
Noise, low, in-amp, 3 buffer amplifiers with gain, 6
Noise error, 34 Subtractor amplifier products, 22–24
Nonlinearity:
definition, 55–56 T
low, in-amp, 3 Thermal EMF, 32
transfer function, graph, 56 Thermocouple amplifier, single supply, circuit, 50–51
Thermocouple effect, 32
O inside discrete resistors, 33
Offset current errors, in-amp, 2–3 Transducer:
Offset error, 33–34 characteristics, table, 41
Offset voltage drift: interface applications, 40–42
in-amp, 2 medical EKG applications, 42
lowest, design, 31
Op-amp, characteristics, 1 U-V
Operating voltage range, definition, 57–58 Unity gain in-amp, circuit, 48
Video, in-amp, 3
P-Q Video speed in-amp products, 24–26
Power control, in-amp, 4 Voltage, low offset, in-amp, 2
Voltage offset, definition, 56–57
–65–
Device Index:

Page Numbers Page Numbers

AD524 . . . . . . . . . . . . . . . . . . . . . . . 14, 59, 61, 63 AD976 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
AD526 . . . . . . . . . . . . . . . . . . . . . . . . . . 59, 61, 63 AD977 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
AD580 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 AD7776 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
AD584 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 AD7851 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
AD589 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 AD7853 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
AD620 . . . . . . 13–15, 27–30, 32–36, 40–41, 44, 49, AD7854 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 53–54, 59, 63 AD7856 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
AD621 . . . . . . . . 13, 15–17, 29, 33, 36, 41, 59, 63 AD7858 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
AD622 . . . . . . . . . . . . . . 13, 15–16, 29, 36, 59, 63 AD7859 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
AD623 . . . . . 13, 15, 18–20, 30, 35, 37, 39, 41–42, AD7862 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44, 59, 63 AD7863 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
AD624 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59, 63 AD7864 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
AD625 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59, 63 AD7865 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
AD626 . . . . . . . . . . . . . . . 5, 13, 23, 41, 49, 59, 63 AD7887 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
AD627 . . . . . . 10–13, 15, 19–21, 29–30, 35–36, 39, AD7888 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
. . . . . . . . . . . . . . . . . . . 41–42, 45, 50–51, 59, 63 AD7890 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
AD627A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 AD7891 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
AD629 . . . . . . . . . . . . . . . . . . 5, 13, 24, 41, 59, 63 AD7892 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
AD671 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 AD7895 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
AD676 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 AD9240 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
AD677 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 AduC812 . . . . . . . . . . . . . . . . . . . . . . . . . . . 45, 50
AD704 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 AMP01 . . . . . . . . . . . . . . . . . . . . . . 49, 59, 61, 63
AD705 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5–6, 49 AMP02 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59, 61
AD706 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5–6, 8 AMP03 . . . . . . . . . . . . . . . . 13, 22, 46–49, 59, 63
AD820 . . . . . . . . . . . . . . . . . . . . . . . . . . 41–42, 50 AMP04 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59, 62
AD822 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 OP97 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5–6
AD823 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 OP296 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
AD825 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46–47 OP297 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5–6, 8
AD830 . . . . . . . . . . . . . . . . . . . . 13, 24–26, 46–47 SSM2017 . . . . . . . . . . . . . . . . . . . . . . . . . . 51, 62
AD871 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 SSM2141 . . . . . . . . . . . . . . . . . . . . . . . . . . 51, 62
AD974 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 SSM2143 . . . . . . . . . . . . . . . . . . . . . . . . . . 51, 62

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