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Sakshi Telange completed a micro project on developing ladder logic to test the functionality of logic gates. The project involved building digital circuits using a PLC, developing ladder logic programs for various logic gates, testing the programs, and troubleshooting issues. Sakshi developed ladder logic for logic gates, tested the programs, collected information, and finalized a report on the project under the guidance of their teacher.

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SAKSHI TELANGE
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644 views9 pages

CSP Title

Sakshi Telange completed a micro project on developing ladder logic to test the functionality of logic gates. The project involved building digital circuits using a PLC, developing ladder logic programs for various logic gates, testing the programs, and troubleshooting issues. Sakshi developed ladder logic for logic gates, tested the programs, collected information, and finalized a report on the project under the guidance of their teacher.

Uploaded by

SAKSHI TELANGE
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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A Micro Project on:

Develop Ladder Logic to test the


functionality of the Logic Gates.

In

Diploma V Semester

Course Title: Control Systems & PLC

Course Code: 22531

Presented By:

01. Sakshi Telange

2019 - 2020

Guide: Mrs. Smita Kurade

PROGRAM OF ELECTRONICS,

Dr. D.Y. Patil, School of Polytechnic, Vidyanagar,

Sec-7, Nerul, Navi Mumbai 400706.


Develop Ladder Logic to test the
functionality of the Logic Gates.

Group member:

Sakshi Telange (01)

Brief Introduction:

For this micro-project we first finalized the topic on Logic Gates, Logic is the
ability to make decisions when one or more different factors must be taken into
account before an action is taken.This is the basis for the operation of PLC,where it
is required for the device to operate when certain conditions are met.

Aim of Micro-project

 Built up digital circuits using PLC.


 Develop ladder logic program for various logic gates.
 Test ladder logic programs for various logic gates.
 Troubleshoot ladder logic programs for various logic gates.
Action Plan

Name of
Sr.
Details of activity Plan started on Plan finished on responsible group
No.
members
Searching topic for
1.
micro-project
Discussion about
2. the title of micro-
project
Selection of proper
3.
subject
Discussion
Sakshi Telange
4. regarding the topic
with guide

Selection of proper
5.
information

Collecting the
6.
proper information

Completing the
7.
circuit and report

Working and
8. finalization of the
micro-project
Actual Resources Used

Sr. Name of
Specification Quantity Remark
NO Resources/Material

PLC system hardware &


1 PLC software for ladder 1
programming.
Intel Processor core 13&17 or
latest with mother board intel
chipset 41/61/latest with 4
2 Personal Computer USB,1SERIAL & LTP 1
port,LED monitor,USB
mouse,1Gigabit Network
card/Latest configuration.
Actual Procedure followed

Name of
Actual group
Procedure
members
Planned the report on Develop
Ladder Logic to test the
functionality of the Logic
Gates.

Collected proper Informatio on


Develop Ladder Logic to test
the functionality of the Logic Sakshi Telange
Gates.

Collected data for project report.


Displayed all the Data in document.
Finalization of the report.
Checking of the micro project from the
guide for corrections.
A Micro Project on:
Develop Ladder Logic to test the
functionality of the Logic Gates.

In

Diploma V Semester

Course Title: Control Systems & PLC

Course Code: 22531

Presented By:

01. Sakshi Telange

2019 - 2020

Guide: Mrs. Smita Kurade,

PROGRAM OF ELECTRONICS,

Dr. D.Y. Patil, School of Polytechnic, Vidyanagar,

Sec-7, Nerul, Navi Mumbai 400706.


CERTIFICATE

This is to certify that Sakshi Telange. Roll No:-01 has successfully completed his Micro
Project on Develop Ladder Logic to test the functionality of the Logic Gates.
In partial fullfillment of fourth semester of Diploma course in Electronics Engineering,
in the academic year 2019 -2020.

Date:
Place: Nerul, Navi Mumbai

Head of Subject Teacher


Dept. of Electronics Engg. Dept. of Electronics Engg.
DYPP, Nerul DYPP, Nerul

Principal
DYPP, Nerul
DEPARTMENT OF ELECTRONICS ENGINEERING
Dr. D.Y Patil School of Polytechnic, Vidyanagar,
Sec-7, Nerul, Navi Mumbai 400 706.
Acknowledgement

I take this opportunity to express deep sense of gratitude and sincere thanks for the
invaluable guidance that I have received at the worthy hands of my Guide Prof. Mrs.Smita
Kurade.

I express my sincere thanks to our H.O.D. Prof. Smita V. Kurade for permitting me to
do this project and also to the entire staff member who have helped me directly or indirectly.

I also express my thanks to my friends for their underlying support shown during the
preparation of this project.

-Sakshi Telange

EX 5(I)

DYPP, Nerul.

DEPARTMENT OF ELECTRONICS ENGINEERING


Dr. D.Y Patil, School of Polytechnic, Vidyanagar,
Sec-7, Nerul, Navi Mumbai 400 706
Micro Project Evaluation Sheet

Name of student: Sakshi Telange Enrolment No:


Name of Program: Electronics Engineering. Semester: V
Course Title: Control Systems & PLC. Code: 22531

Title of the Micro-Project: Develop Ladder Logic to test the functionality


of the Logic Gates.
Course Outcomes Achieved: -
a) Identify different types of control systems.
b) Determine the stability of the control systems.
c) Maintain various components of PLC based process control system.
d) Maintain PLC based process control systems.
e) Test the performance of various types of controllers.
Sr. Poor Average Good Excellent
Characteristics to be Sub
No. (Marks (Marks (Marks 6- (Marks
assessed Total
1-3) 4-5) 8) 9-10)
(A) Process and Product Assessment (Convert above total marks out of 6 Marks)

1. Relevance to the course


Literature Information
2.
Collection
Completion of the Target
3.
as Per project proposal
Analysis of Data and
4.
representation
Quality of
5.
Prototype/Model
6. Report Preparation

(B) Individual Presentation/Viva (Convert above total marks out of 4 marks)

7. Presentation

8. Viva
(A) Process and Product (B) Individual Presentation/viva
Total Marks (10)
Assessment (6 marks) (4marks)

Comments/Suggestions about team word/leadership/inter-personal communication (if any)


………………………………………………………………………………………………
Name and Designation of the Teacher: -
Dated Signature: -

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