DVD-Video Player DVD Module SD-5.

00SA_CH

Contents Page
1 Technical Specifications 2
2 Safety Instructions, Warnings, and Notes 6
3 Directions for Use (not available) 7
4 Mechanical Instructions 8
5 Test Instr. Mono Board DVD-SD4.00SA_CH 12
Diagnostic Software Description 24
6 Block Diagram and Testpoint Overview
Block Diagram 35
Testpoint Overview Mono Board 36
7 Electrical Diagrams & Pwb’s Diagr. PWB
Front-End Proc. and Laser Supply(Diagram M1) 37 47-49
Front-End Processor Iguana (Diagram M2) 38 47-49
Front-End Loader Interface (Diagram M3) 39 47-49
Back-End Memory (Diagram M4) 40 47-49
Memory and Service Interface (Diagram M5) 41 47-49
Back-End Host Processor (Diagram M6) 42 47-49
Power Supply & A/V Interface (Diagram M7) 43 47-49
SACD Decoder (Diagram M8) 44 47-49
System Clocks (Diagram M9) 45 47-49
DAC Interface (Diagram M10)46 47-49
8 Alignments (not available) 51
9 Circuit Description 51
List of Abbreviations 56
IC Data 57
10 Spare Part List 63
11 Revision List 66

©
Copyright 2003 Philips Consumer Electronics B.V. Eindhoven, The Netherlands.
All rights reserved. No part of this publication may be reproduced, stored in a
retrieval system or transmitted, in any form or by any means, electronic,
mechanical, photocopying, or otherwise without the prior permission of Philips.

Published by PF0367 Service Singapore Printed in the Netherlands Subject to modification EN 3122 785 13830
 EN 2 1. SD-5.00SA_CH Technical Specifications

1. Technical Specifications
1.1 Interfaces and Pin Assignments

SD5 00_SA CH supports both configurations of single-disc and

5-disc changer SACD player.
In table 1-1, interfaces or connectors stuffing options are given
for applications of single-disc and 5-disc changer.

Table 1-1 Interfaces or connectors stuffing options

Disc Type 1100 1300 1301 1302 1500 1701 1702 1703 1704 1900 1012 1013
Single-disc √ √ √ √ √ √ √ √ √
5-disc √ √ √ √ √ √ √ √ √ √

The interfaces or connectors are placed on both PCB layers of 5. B_REFGND

top and bottom as shown in figure 1-1 and figure 1-2 6. B_UB_output
respectively. 7. G_REFGND
8. G_YG_output
30 1
9. R_REFGND
AV_SACHI
1013 10. R_VR_output
Motor Driver Bd

AV_4.0
1

1705 1701
1703
AV_1000
1012
30 1 5 1 7 1 11. Y_REFGND
12. YY_output
1900

24 1
11

MONOBOARD
TOP VIEW 13. C_REFGND
14. CC_output
2
1

1014

OPU Connector 15. CVBS-REFGND

1100
16.
19

20

24 1 CVBSCVBS output
Sledge PCS

17. +3V3Power supply +3V3

SERVICE
1

1301

18.
1500

+3V3Power supply +3V3

1
7

19. +5VPower supply +5V

FRONT
20.
Spindle Motor
1

+12VPower supply +12V

11
Karaoke
1702

21.
Tray Motor
+12VPower supply +12V
1300

1302
1
8

1 4
22. MUTEAnalogue output Mute
CL 26532053_041.eps
130502 23. GNDGND
24. PCMSCLKPCM Bit clock
Figure 1-1 Interfaces placement on PCB top layer 25. PCMDATA0PCM data 0
26. GNDGND
Connector 1705 is an option for the usage of SACD1000 set 27. PCMCLKPCM Clock
only for connecting monoboard to front panel board. Connector 28. PCMLRCLKPCM Word clock
1701 is also an option for the monoboard power supply 12V/ 29. GNDGND
5V/3V3 in case of the requirements needed for further 30. SPDIFSPDIF outpu
improvement on audio performance of SACD.
Connector 1014 is for either DCU (Diagnostic Controller Unit) 1.2.2 Optional Interface AV_1000 at Location 1012:
or BST (Boundary Scan Test) used by industrial only.
1. GNDGND
2. 384FSDAC mastering clock 16.9344MHz
3. GNDGND
4. SEL_PCM/ DSD_LFELFE channel (Ch-3)
MONOBOARD 5. GNDGND
BOTTOM VIEW
6. DATA_CeLf/ DSD_CENTREFront Centre channel (Ch-2)
7. GNDGND
8. SEL_PCM/DSD_RsRight surround (Ch-5)
9. GNDGND
10. DATA_LsRs/DSD_LsLeft surround (Ch-4)
11. GNDGND
24

12. SEL_PCM/DSD_RIGHTFront Right Channel (Ch-1)

Digital YUV

FRONT

13. GNDGND
1704

14. DATA_LeRi/DSD_LEFTFront Left Channel (Ch-0)

1

CL 26532053_042.eps 15. GNDGND

130502
16. WORK_CLK/SEL_DSDDSD stereo
17. GNDGND
Figure 1-2 Interfaces placement on PCB bottom layer 18. BIT_CLK/DSD_CLKDSD clock
19. GNDGND
20. 256FSAudio Clock FS=32KHz, 44.1KHz, 48KHz and
1.2 Connections
96KHz
21. GNDGND
1.2.1 Interface AV_4.0 at Location 1703: 22. SCL-DACI2C SCL for DAC
23. SDA-DACI2C SDA for DAC
1. I2C_SCL/SIODATAI2C SCL 24. GNDGND
2. I2C_SDA/SIOCLKI2C SDA
3. SCART1low blanking 1 (0/6/12V)
4. SCART0low blanking 0 (0/6/12V)
 Technical Specifications SD-5.00SA_CH 1. EN 3

1.2.3 Optional Power Supply Connector at Location 1701: 3. SCLI2C SCL

4. Odd/Even
1. +3V3Power supply +3V3 5. HSYNCHorizontal Sync
2. +3V3Power supply +3V3 6. GNDGround
3. +5VPower supply +5V 7. 27MHz Clock27MHz Clock
4. GNDGround 8. GNDGround
5. GNDGround 9. YC0Digital video bit 0
6. MGNDPower ground 10. GNDGround
7. +12VPower supply +12 11. YC1Digital video bit 1
12. GNDGround
13. YC2Digital video bit 2
1.2.4 Optional Connector of Sacd1000 Set (From Monoboard to
Front Panel) at Location 1705: 14. GNDGround
15. YC3Digital video bit 3
16. +5VPower Supply +5V
1. SCLI2C SCL
17. YC4Digital video bit 4
2. GNDGround 18. +3V3Power Supply +3V3
3. SDAI2C SDA
19. YC5Digital video bit 5
4. STB_CONTStandby Control
20. +3V3Power Supply +3V3
5. P50Project P5 21. YC6Digital video bit 6
22. GNDGround
1.2.5 Interface AV_SACHI at Location 1013: 23. YC7Digital video bit 7
24. GNDGround
1. GNDGND
2. 384FSDAC mastering clock 16.9344MHz 1.2.8 Service connector at Location 1500:
3. GND GND
4. SEL_PCM/DSD_LFELFE channel (Ch-3)
1. TXD_SERTXD service UART
5. GNDGND 2. SERVICEService or normal mode select
6. DATA_CeLf/DSD_CENTREFront Centre channel (Ch-2)
3. RXD_SERRXD service UART
7. GNDGND
4. RTS_SERNot used (RTS service UART)
8. SEL_PCM/DSD_RsRight surround (Ch-5) 5. GNDGround
9. GNDGND
6. CTS_SERNot used (CTS service UART)
10. DATA_LsRs/DSD_LsLeft surround (Ch-4)
7. +5V_SERPositive 5V (isolated from internal +5V by ferrite
11. GNDGND bead
12. SEL_PCM/DSD_RIGHTFront Right Channel (Ch-1)
13. GNDGND
1.2.9 To Motor Driver Board Interface at Location 1900:
14. DATA_LeRi/DSD_LEFTFront Left Channel (Ch-0)
15. GNDGND
16. WORK_CLK/SEL_DSDDSD stereo 1. TBL-POSCarousel Rotation Position Detection
17. GNDGND 2. I2CSCLI2C Clock
18. BIT_CLK/DSD_CLKDSD clock 3. I2CSDAI2C Data
19. GNDGND 4. GNDGround
20. 256FSAudio Clock FS=32KHz, 44.1KHz, 48KHz and 5. Clockwise_CMCarousel Clockwise Rotation Control
96KHz 6. Counterclockwise_CMCarousel Counterclockwise
21. GNDGND Rotation Control
22. SCL-DAC I2CSCL for DAC 7. +5V+5V Power Supply
23. SDA-DAC I2CSDA for DAC 8. GNDGround
24. GNDGND 9. +12V+12V Power Supply
25. PCMDATA3/DSD_PCM8Option 1:PCMDATA3 Option 2: 10. +12V+12V Power Supply
DSD_Ch7 11. GNDGround
26. GNDGND
27. P50P50 (I2C Slave Data Available Interrupt)
1.3 Signal Specifications
28. GPIO2General I/O port 2 Option 1 : Supporting 3 control
line type DAC, DAC_CLK
29. GPIO3General I/O port 3 Option 1: Supporting 3 control This the specification of all signals as described under
line type DAC, DAC_DATA “Connections”
30. GPIO1General I/O port Option 1: Supporting 3 control line H = +5V ±0.5V
type DAC, DAC_C h = 3V3 ±0.3V
L = 0V ±0.5V
l = 0V ±0.3V
1.2.6 Karaoke Interface at Location 1702:
Stby : There is no standby
1. KOKSCLKKaraoke PCM bit clock (I2S format) mode at module level.
2. +12VPower Supply +12V The module operate
3. KOKLRCLKKaraoke PCM left-right / word clock (I2S in power-off and
format) power-on only.
4. GNDGround Standby control line : Not available on
5. KOKDATAKaraoke PCM data (I2S format) module level.
6. GNDGround P50 : Connection between
7. KOKPCMCLKKaraoke PCM system clock (I2S format) front and A/V board,
8. KOKVOCDETKaraoke vocal detect signal and can be used as
P50 signal line.
1.2.7 Digital YUV Interface at Location 1704: : The signal is not
connected to the
1. GNDGround module electronics.
2. SDAI2C SDA
 EN 4 1. SD-5.00SA_CH Technical Specifications

Slow blanking scart : This signal has three reference. To meet

levels which depend the standards a
on the level of the decouple circuit is
output ports SCART0 necessary.
and SCART1. It will
be converted by the 1.4.2 I2S Output
external board to 0/6/
12 voltage level use
Resolution : Up to 24bit.
for scart function Sample rate : 32kHz / 44.1kHz /
switching.
48kHz / 64kHz /
Audio mute : Can be used for audio
88.2kHz / 96kHz /
mute transistors 128kHz / 176.4kHz /
during stop or power
192kHz.
On/Off.
Standard : Philips I2S output
: Mute on : 3V3 ±0V3 Number of I2S outputs : Basic 6 channels:
: Mute off: 0V ±0V3
Front / Surround /
I2S data0 out : I2S front data output.
Center-LFE.
: Level - h / l : Additional 2 channels:
I2S wordselect / I2S bitclock : I2S timing signals
downmix stereo
: Level - h / l
Deemphasis : Internally processed
I2S systemclock : 256xFS audio by the module.
systemclock.
Audio source streams : PCM / LPCM /MPEG1
: Level - h / l
/ MPEG2 / AC3 / MP3
Clockwise/Counterclockwise_CM : Carousel output for 5- / DTS / MLP.
Disc changer
Audio processing : Dolby ProLogic
: Level - h / l
decoder / Dolby
TBL_POS : Position sensor for surround downmix /
carousel rotation of 5-
SRS TruSurround /
disc changer
Circle Surround /
: Level - h / l TruBass.
LFE_SEL : Low frequency effect
selection for the A/V
1.4.3 Analog Audio
board.
: LFE_SEL_low - l
: LFE_SEL_high - h The module has no analog audio
Center_on : Switches the center ouput. : The analog audio
audio to the scart specification will be
output. determined by the
: Center to scart - h external DAC circuit.
: L/R to scart - l
Karaoke : I2S input - h / l 1.4.4 Video.
: PCMCLK output - h / l
SPDIF out : Digital audio output Standards : The video output
level - H / L standard will follow
Hor. Sync : Video Horizontal the source material.
synchronisation : The OSD standard is
: Level - h / l switchable between
DSD/PCM output : Digital output for High PAL or NTSC.
End DAC Outputs : The module has 6
: Level - h / l analog outputs in 4
I2C clock / I2C data : I2C databus formats: Y/C; CVBS;
: Level - H / L at RGB / YUV. RGB /
modules connectors YUV component
TXD / RXD / RTS / CTS : Service UART to be video signals share
connected direct to the same lines.
PC serial input. Therefore, the module
: Output levels - H / L is unable to output
: Input levels RS232 both RGB and YUV
compliant simultanious.
Service activation : To activate service Specification. : The output comply
mode, this line is tied fully with [PQR-IMS]
to GND Class III.
: DC level - sync
bottom at 0.43V ±10%
1.4 Performance:
(100% white) and
0.9V ±10% (black).
1.4.1 Digital Output : Output impedance -
75Ohm.
CDDA/LPCM : according IEC60958 : The following
MPEG1 is converted to LPCM : specification points
MPEG2, AC3 audio.MP3 : according IEC1937 are significantly better
DTS. : according IEC61937 then [PQR_IMS]
amendment 1. : SNR on all video
: Digital output level is outputs is better then
0V / 5V with GND as 65dB.
 Technical Specifications SD-5.00SA_CH 1. EN 5

: Video bandwidth -
8MHz (±3dB) / 16MHz
(±3dB) for STi5588
progressive scan.
 EN 6 2. SD-5.00SA_CH Safety Instructions, Warnings, and Notes

2. Safety Instructions, Warnings, and Notes

2.1 Safety Instructions 2.2 Warnings

2.1.1 General Safety 2.2.1 General

Safety regulations require that during a repair: • All ICs and many other semiconductors are susceptible to
• Connect the unit to the mains via an isolation transformer. electrostatic discharges (ESD, w). Careless handling
• Replace safety components, indicated by the symbol h, during repair can reduce life drastically. Make sure that,
only by components identical to the original ones. Any during repair, you are at the same potential as the mass of
other component substitution (other than original type) may the set by a wristband with resistance. Keep components
increase risk of fire or electrical shock hazard. and tools at this same potential. Available ESD protection
equipment:
Safety regulations require that after a repair, you must return – Complete kit ESD3 (small tablemat, wristband,
the unit in its original condition. Pay, in particular, attention to connection box, extension cable and earth cable) 4822
the following points: 310 10671.
• Route the wires/cables correctly, and fix them with the – Wristband tester 4822 344 13999.
mounted cable clamps. • Be careful during measurements in the live voltage section.
• Check the insulation of the mains lead for external The primary side of the power supply (pos. 1005), including
damage. the heatsink, carries live mains voltage when you connect
• Check the electrical DC resistance between the mains plug the player to the mains (even when the player is "off"!). It is
and the secondary side: possible to touch copper tracks and/or components in this
1. Unplug the mains cord, and connect a wire between unshielded primary area, when you service the player.
the two pins of the mains plug. Service personnel must take precautions to prevent
2. Set the mains switch to the "on" position (keep the touching this area or components in this area. A "lightning
mains cord unplugged!). stroke" and a stripe-marked printing on the printed wiring
3. Measure the resistance value between the mains plug board, indicate the primary side of the power supply.
and the front panel, controls, and chassis bottom. • Never replace modules, or components, while the unit is
4. Repair or correct unit when the resistance ‘on’.
measurement is less than 1 MΩ.
5. Verify this, before you return the unit to the customer/ 2.2.2 Laser
user (ref. UL-standard no. 1492).
6. Switch the unit ‘off’, and remove the wire between the
• The use of optical instruments with this product, will
two pins of the mains plug.
increase eye hazard.
• Only qualified service personnel may remove the cover or
2.1.2 Laser Safety attempt to service this device, due to possible eye injury.
• Repair handling should take place as much as possible
This unit employs a laser. Only qualified service personnel may with a disc loaded inside the player.
remove the cover, or attempt to service this device (due to • Text below is placed inside the unit, on the laser cover
possible eye injury). shield:

Laser Device Unit CAUTION VISIBLE AND INVISIBLE LASER RADIATI ON WHEN OPEN AVO ID EXPOSURE TO BEAM
ADVARSEL SYNLIG OG USYNLIG LASERSTRÅLING VED ÅBNING UNDGÅ UDSÆTTELSE FOR STRÅLING
! ÅPNES UNNGÅ EKSPONERING FOR STRÅLEN
Type : Semiconductor laser ADVARSEL SYNLIG OG USYNLIG LASERSTRÅLING NÅR DEKSEL
VARNING SYNLIG OCH OSYNLIG LASERSTRÅLNING NÄR DENNA DEL ÄR ÖPPNAD BETRAKTA EJ STRÅLEN
VARO! AVATT AESSA OLET ALTTIINA NÄKYVÄLLE JA NÄKYMÄTT ÖMÄLLE LASER SÄTEILYLLE. ÄLÄ KAT SO SÄT EESEEN
GaAlAs VORSICHT SICHTBARE UND UNSICHTBARE LASERSTRAHLUNG WENN ABDECKUNG GEÖFFNET NICHT DEM STRAHL AUSSETSEN

Wavelength : 650 nm (DVD) DANGER VISIBLE AND INVISIBLE LASER RADIATI ON WHEN OPEN AVO ID DIRECT EXPOSURE TO BEAM
AT TENTION RAYO NNEMENT LASER VISIBLE ET INVISIBLE EN CAS D'OUVERTURE EXPOSITION DANGEREUSE AU FAISCEAU

: 780 nm (VCD/CD)
Output Power : 20 mW (DVD+RW
Figure 2-2
writing)
: 0.8 mW (DVD
reading) 2.2.3 Notes
: 0.3 mW (VCD/CD
reading) Dolby
Beam divergence : 60 degree Manufactered under licence from Dolby Laboratories. “Dolby”,
“Pro Logic” and the double-D symbol are trademarks of Dolby
Laboratories. Confidential Unpublished Works. ©1992-1997
Dolby Laboratories, Inc. All rights reserved.

Figure 2-3

Figure 2-1
Trusurround
TRUSURROUND, SRS and symbol (fig 2-4) are trademarks of
SRS Labs, Inc. TRUSURROUND technology is manufactured
Note: Use of controls or adjustments or performance of under licence frm SRS labs, Inc.
procedure other than those specified herein, may result in
hazardous radiation exposure. Avoid direct exposure to beam.

Figure 2-4
 Directions for Use SD-5.00SA_CH 3. EN 7

3. Directions for Use

There is no DFU available
 EN 8 4. SD-5.00SA_CH Mechanical Instructions

4. Mechanical Instructions
4.1 Dismantling Instruction for Single-disc loader

CL 26532053_072.eps
220502

Figure 4-1
 Mechanical Instructions SD-5.00SA_CH 4. EN 9

The SD5.0SACHI is designed in a multi-task way so that it can support the following
optional function.

5 DISC CHANGER
ELEVATOR CHANGER

SD5.0SACHI MONOBOARD

  


  !





 



 


 





SINGLE DISC

CL 36532056_015.eps
170703

Figure 4-2
 EN 10 4. SD-5.00SA_CH Mechanical Instructions

4.1.1 Dismantling of DVD Mono Board Figure 4-3.The Tray is now disengaged and can be pulled
outwards.
1. See Figure 4-1 for dismantling of DVD module.
When no disc is loaded, unlocking the Tray can also be done
by moving the Slider A in the direction as shown in Figure 4-4
2. Unlock the OPU conn 1100, Sledge motor conn 1301
and disc motor conn 1300 and remove the Flex and pull the Tray outwards.
connections.

3. Remove the wire connection to Tray motor conn 1302.

4. Remove 4 screws 10 to 13.

5. Remove the Mono Board

Note: Flex cables are very fragile,care should be taken during

dismounting and when mounting,ensure that Flex cables are
inserted properly into the Flex socket and locked.

4.1.2 Opening of Tray Manually

CL 06532147_043.eps
231100

Figure 4-5

Note: In this manual, only the dismantling instruction for

Single-disc loader is given.
Instruction for changer, refer to the respective player's service
manual.

CL 06532147_002.eps
151100

Figure 4-3

CL 06532147_003.eps
151100

Figure 4-4

It is possible to open the tray manually by moving the Slider in

the position as shown in Figure 4-2 and Figure 4-3
When the slider A is not accessible when a disc is loaded,
unlock the tray by pressing the slider B inward as shown in
 Mechanical Instructions SD-5.00SA_CH 4. EN 11

4.2 Service Hints

4.2.1 DVD Module

This module can be repaired as follows:

1. The VAL6011/14 is a combination of loading mechanism
and DVD-mechanism. Both the mechanism is not a
repairable unit and in case of failure it has to be replaced
with a new loader VAL6011/14.

Note: When replacing with a new VAL6011/14 two solder

joints have to be removed after connecting the OPU flex foil
to the board.
The solder joints which shortcircuits the laser diodes to
ground are for protection against ESD. Refer to Figure 4-5
and Figure 4-6 for location of solder points.

Figure 4-6

Figure 4-7

2. The mono board has to be repaired down to component

level. Repair handling of the monoboard requires a
workshop with sophisticated desoldering tools.
 EN 12 5. SD-5.00SA_CH Test Instructions Mono Board DVD-SD5.00SA_CH

5. Test Instructions Mono Board DVD-SD5.00SA_CH

5.1 General 5.2.2 Reset Check:

• Impedance of measuring-equipment should be > 1MΩ. To ensure a proper start-up of the monoboard, the back-end
• Most tests have to be done by software commands. reset signal RESETn is required at the STi55xx input (testpoint
Together with the software command you will find a Ref.# F906) after power-on.
nbr. This is the number of the diagnostic nulceus used for To check the reset timing, measure the RESETn (testpoint
this test. More detailed information can be find in the F906) and the +3V3ST supply (testpoint F784), reset circuit
chapter “Diagnostic Nuclei”. trigger signal.
• Levels: Most measurements are digital measurements.
The signal levels specification in this document are defined PM3380B
as follows: ch1: dT=73.0ms V1= 65.0mV
ch1
low:< 0.3V
high:> 3.0V ch2
LOW:< 0.4V
HIGH:> 4.5V
• All the waveforms measurement carried out in these test T
instruction will be base on the testpoint indicated in the
1
Monoboard schematic diagram in the service manual.

5.2 General Start-up Measurements

2

5.2.1 Supply Check:

CH1 2.00 V=
CH2 2.00 V= MTB50.0ms- 2.92dv ch1+
Table 5-1 Supply check CL 16532163_019.eps
290102

Testpoint Supply Used by

Figure 5-1 Reset
F781 +3V3 Main supply voltage
F782 +5V Main supply voltage Nb: The RESETn rising edge should be at least 100msec after
F783 +12V Main supply voltage the +3V3ST (refer to Figure 5-1).
F710 +3V3SA Analog 3V3 front-end circuitry If the reset input does not go high then check the reset circuit
F711 +3V3SD Digital 3V3 front-end circuitry around transistor 7409.
F785 FUR-3V3 Digital 3V3 Furore2 interface
circuitry 5.2.3 Clock Check
F784 +3V3ST Digital 3V3 back-end circuitry
To check the correct functioning of the STI55xx, we first have
F724 3V3D Digital 3V3 cicuitry
to check the presence of all clocks.
F787 FUR-1V8 Digital 1V8 Furore2 core circuitry All clocks to be measured with 0.02% tolerance.
F786 VDDA-FUR Analog 1V8 Furore2 circuitry
F717 +5VSA Analog 5V front-end circuitry Table 5-3 Clock check
F715 +5VSD Digital 5V front-end circuitry
F721 +5VAV Analog 5V back-end circuitry Name Testpoint Frequency Waveform
F718 +5VD Digital 5V back-end circuitry 384FS F042 16.9344MHz Refer to Fig 5-3
F727 VDDSTA Analog STi 55xx circuitry 27M_CLK_ST F932 27MHz Refer to Fig 5-2
F729 VDDSTC Core STi 55xx circuitry PCM_CLK_ST F885 11.2896MHz Refer to Fig 5-5
F725 VDDSTD Digital STi 55xx circuitry Audio_CLK F935 11.2896MHz Refer to Fig 5-5
Iguana_CLK F207 8.4672MHz Refer to Fig 5-4
STi 55xx uses various power supply voltages that depend on
which processor is being used
PM3380 B
Table 5-2 Back-end processor
ch1

Back-end VDDSTA VDDSTC VDDSTD

Processor ( Analog ) ( Core ) ( Digital )
STi 5580 +2V5 +2V5 +2V5
STi 5588 +1V8 +1V8 +3V3
STi 5519 +2V5 +2V5 +2V5

The module operates in power-off and power-on only. There is

no standby mode at module level. In power-off, the module
does not response to any communication or signals.
Before starting the measurement, ensure that all power supply
are connected to the monoboard via connector 1703 or 1701 CH1 2.00 V= MTB10.0ns ch1+
CL 26532053_062.eps
and that the PC interface cable is connected to the Service 210502
interface connector 1500 of the monoboard.
Figure 5-2 27M_CLK
 Test Instructions Mono Board DVD-SD5.00SA_CH SD-5.00SA_CH 5. EN 13

Table 5-4 PC connection

PM3380 B
Connector pin Signal
ch1
1500-1 TXT_SER (STi55xx out)
1500-2 SERVICE-mode select
1500-3 RXD_SER (STi55xx in)
1500-4 RTS_SER (Not in use)
1500-5 GND
1500-6 CTS_SER (Not in use)
1500-7 +5V_SER

Now start the terminal program. Make sure that the service-pin
(pin 1500-2) of the µP is pulled low.
CH1 2.00 V= MTB20.0ns ch1+ The terminal program of your PC should now display: “DVDv4
CL 26532053_063.eps Diagnostic software version ...”. This message already means
210502
that the µP is running. The first 5 commands from the
Figure 5-3 384FS diagnostic software will be carried out automatically during
diagnostic start-up. The other commands can be carried out by
selecting the “command input” and simply type the reference
PM3380B nbr. to do the test or select the “Menu - driven” test.
To be sure that the µP is able to run the diagnostic software,
ch1 serial port will be checked during start-up.

Table 5-5 Serial port check

Ref. # Reference Name Remark

(1) BasicSpAcc Serial port Access test/
initialisation
(2b) BasicInterconSdram Check SDRAM
interconnection with CPU
(4) BasicSdramWrR Check Basic SDRAM
memory
CH1 1.00 V= MTB50.0ns ch1+
CL 26532053_064.eps
210502 With this test, the serial communication is checked in both
directions.
Figure 5-4 Iguana_CLK

PM3380B

ch1

CH1 2.00 V= MTB20.0ns ch1+

CL 26532053_065.eps
210502

Figure 5-5 PCM_ST_CLK / Audio_CLK

5.3 µP Environment:

5.3.1 General:

All the tests are carried out by software tests. To start the
software tests, connect a PC to the serial bus of the STI55xx.
Use connector 1500 for this connection:
 EN 14 5. SD-5.00SA_CH Test Instructions Mono Board DVD-SD5.00SA_CH

5.3.2 Memory Check: 5.4.2 Audio Clock Switch Check

The µP has a data bus that is connected to a Flash and also The internally generated Audio clock can be set to either 44.1
internal link to the MPEG SDRAM inteface. kHz (CD_DA), 48 kHz (DVD) or 96 kHZ (DVD). To check the
At start-up,the SDRAM bus is checked different mode, use the following commands and measure the
waveform as correct operation cannot be detected by the
Table 5-6 Memory check Diagnostic Software.

Ref. # Command Name Remark Table 5-9 Audio clock switch check
(2b) BasicInterconSDRAM Data and address bus
Interconnection Command Test
6 PapChksFl Checksum FLASH Ref # Name Remark point Frequency
16 CompSdramWrR SDRAM Write Read 7a PapUclkAclk µClock A_CLK T885 11.2896MHz
Cdda in 44.1kHz 0.02%
mode( Fig 5-4 )
CompSdramWrR checks the complete SDRAM for failures 7b PapUclkAclk µClockA_CLK T885 12.288MHz
inside the IC.The BasicInterconSDRAM check is done by Dvd in 48kHz mode 0.02%
writing & reading some well chosen patterns to all address and ( Fig 5-5 )
data interconnections of the SDRAM. 7c PapUclkAclk µClock A_CLK T885 24.576MHz
The PapChksFI calculate and verify checksum of the FLASH.
Dvd96 in 96kHz mode 0.02%
This includes the binary file checksum and the four modules.
( Fig 5-6 )

5.4 General I/O Port & Peripherals Check

PM3380B
5.4.1 I2C Bus / EEprom Check
ch1

To access the EEprom, the I2C bus is used. So by writing and

reading to the EEprom the chip and the bus is checked. With
next commands a certain byte is written to the EEprom. The
original information will always be written back into the
EEprom.

Table 5-7 EEprom check

Ref. # Command Name Remark

11 PapI2cNvram I2C NVRAM access

CH1 2.00 V= MTB20.0ns ch1+

The complete Eeprom can also be checked on failures by CL 26532053_066.eps
210502
writing to all addresses and reading back. This test takes a long
time (110 sec).
Figure 5-6 µClock A_CLK in 44.1kHz mode
Table 5-8

Ref. # Command Name Remark PM3380B

15 PapNvramWrR NVRAM Write Read
ch1

CH1 2.00 V= MTB20.0ns ch1+

CL 26532053_067.eps
210502

Figure 5-7 µClockA_CLK in 48kHz mode

 Test Instructions Mono Board DVD-SD5.00SA_CH SD-5.00SA_CH 5. EN 15

Table 5-13 NameTestpointWaveform

PM3380B

Name Testpoint Waveform

ch1
PCMLRCLK F886 / F021 Refer to Figure 5-9
PCMSCLK F883 / F019 Refer to Figure 5-
10
PCMDATA0 F884 Refer to Figure 5-
11
1 DATA_LR/DSD_LEFT F025 Refer to Figure 5-
11
DATA_LsRs/DSD_Ls F029 Refer to Figure 5-
11
DATA_CL/ F034 Refer to Figure 5-
DSD_CENTRE 11
CH1 2.00 V= MTB20.0ns ch1+
PCMCLK F885 / F016 Refer to Figure 5-
CL 26532053_068.eps
210502 12
SPDIF F719 Refer to Figure 5-
Figure 5-8 µClock A_CLK in 96kHz mode 13

5.4.3 Audio Mute Check

Switch on the Mute circuit by sending next command: PM3394B

ch1
Table 5-10 Audio mute check

Ref. # Command Name Remark

19a AudioMuteOn AudioMuteOn

1
Check the Mute output again at testpoint T798: 3V3 ±10%
Switch off the Mute circuit by sending next command

Table 5-11 Audio mute check

Ref. # Command Name Remark

CH1 2.00 V~ MTB10.0us ch1+
19a AudioMuteOff AudioMuteOff CL06532065_008.eps
161100

Check the Mute output at testpoint T798: 0V ±0.3V Figure 5-9 PCMLRCLK

5.4.4 Audio I2S Check

To check the audio output, connect a audio DAC (on the A/V PM3394B
board) to the I2S output and start-up the audio test. Look at the ch1
audio outputs from the A/V board for both sine and pink noise.

Table 5-12 Audio I2S check

Command
Ref. # Name Remark Audio outputs 1

21a AudioSineOn Audio Sine Audio Sine signal On

signal Off Sine, 1kHz on stereo
Press stop button
20a AudioPinkNoi Audio Pink Noise on 6
seOn Pinknoise channels
On CH1 2.00 V~ MTB 100ns ch1+
20b AudioPinkNoi Audio CL06532065_009.eps
161100
seOff Pinknoise
Off
Figure 5-10 PCMSCLK

The audio signal (sine or pink noise) will also be present on the
digital ouput (SPDif). This can be checked by connecting an
amplifier with digital input.
Check the I2S output.
EN 16 5. SD-5.00SA_CH Test Instructions Mono Board DVD-SD5.00SA_CH

Alternatively, there is a check that can be done without A/V

board.
PM3394B First, let the decoder generate pink noise on the audio outputs.
ch1
Table 5-14

Ref. # Command Name Remark

20a AudioPinkNoiseOn Audio Pinknoise On

1
Measure then these signals on level and frequency.

Table 5-15

Signal Level between Frequency

CH1 1.00 V~ MTB 500ns ch1+ PCMLRCLK low/high 48kHz 0.02%
CL06532065_010.eps PCMSCLK low/high 3.072MHz 0.02%
161100
PCMCLK low/high 12.288MHz 0.02%
Figure 5-11 PCMDATA PCMDATA low/high N/A
SPDIF LOW/HIGH N/A

PM3380B

ch1
Put the pink noise off:

Table 5-16

Ref. # Command Name Remark

20b AudioPinkNoiseOff Audio Pinknoise Off
1

CH1 2.00 V= MTB20.0ns ch1+

CL 26532053_067.eps
210502

Figure 5-12 PCMCLK

PM3380B

ch1

CH1 2.00 V= BWL MTB100ns ch1+

CL 16532163_024.eps
230102

Figure 5-13 SPDIF

To switch the audio signal OFF, press the STOP button on the
front.
Without A/V board, the switching levels are as follows:
– DATA_LsRs and DATA_CL switch between low and high
for pink noise. For sine, this is low.
– PCMDATA0, PCMLRCLK, PCMCLK and PCMSCLK
switches between low and high for both pink noise and
sine.
– SPDIF switches between LOW and HIGH
 Test Instructions Mono Board DVD-SD5.00SA_CH SD-5.00SA_CH 5. EN 17

5.5 VIDEO
PM3380B
5.5.1 Video Output Check ch1

Measure the DC voltages at all video-outputs at conn 1703

while the video signal is turned off: 1V ± 10%
Generate a color-bar via next software commands:
Ref. # Command Name Remark
23a VideoColDencOn Colourbar DENC ON 1

61a VideoColOutRGB RGB Colourbar

61b VideoColOutYUV YUV Colourbar
23b VideoColDencOff Colourbar DENC OFF

Check video output at the next testpoints: RUN

Name Testpoint Waveform CH1 5 00mV~ BWL MTB20.0u s ch1+
CL 16532163_058.eps
R_VID (V) F795 Refer to Figure 5-14 5-20 290102

G_VID (Y) F796 Refer to Figure 5-15

B_VID (U) F799 Refer to Figure 5-16 5-21 Figure 5-16 B_VID (U) with video out at RGB
CVBS_VID F788 Refer to Figure 5-17
C_VID F791 Refer to Figure 5-18
PM3380B
Y_VID F792/F796 Refer to Figure 5-19
ch1

PM3380B

ch1

RUN
CH1 500mV~ BWL MTB20.0us ch1+
CL 16532163_059.eps
290102

CH1 500mV~ BWLMTB20.0us ch1+

Figure 5-17 CVBS_VID
CL 16532163_056.eps
290102

PM3380B
Figure 5-14 R_VID (V) with video out at RGB
ch1

PM3380B

ch1

CH1 500mV~ BWL MTB20.0us L=1 ch1p

CL 16532163_060.eps
290102

Figure 5-18 C_VID

CH1 500mV~ BWLMTB20.0us ch1+
CL 16532163_057.eps
290102

Figure 5-15 G_VID (Y) with video out at RGB

 EN 18 5. SD-5.00SA_CH Test Instructions Mono Board DVD-SD5.00SA_CH

PM3380B
PM3380B
ch1
ch1

1
1

CH1 500mV~ BWLMTB20.0us L=1 ch1p

CL 16532163_061.eps
CH1 500mV~ BWLMTB20.0us L=1 extp
290102 CL 16532163_026.eps
230102

Figure 5-19 Y_VID

Figure 5-21 B_VID (U) with video out at YUV

5.5.2 Slow Blanking Scart

PM3380B

ch1 An aditional part of the video-path is the scart function-

switching test. The scart function-switching pin has three levels
which depend on the level of the output ports SCART0 and
SCART1. These latter two signals are driven by the output pins
PIO3.6 and PIO3.7 of the STi55xx.
Check the level of SCART0 and SCART1 with the following
commands:
1

Table 5-17 Slow blanking scart

Command Scart0 Scart1 Level on Pin 8

Ref. # Name (PIO3.6) (PIO3.7) of scart
25a VideoScartLo 1 1 0-2V
CH1 500mV~ BWLMTB20.0us L=1 ext p 25b VideoScartMi 0 1 4.5-7V
CL 16532163_025.eps
230102 25c VideoScartHi 0 0 9.5-12V

Figure 5-20 R_VID (V) with video out at YUV

5.5.3 Video Hsync Check.

To measure the Video Hsync, the connector 1704 must be

connected to the external video processing device such as high
quality progressive scan codex and high quality Video DAC,
else there will not be any waveform. To check for the Hsync,
the following commands can be used:

Table 5-18 Video Hsync check

Ref. # Command Name Remark Value Waveform

23a VideoColDencOn ColourbarDENC ON 15.625 kHz 0.02% Vpeak-peak > 3V Refer to Fig 5-22
61a VideoColOutRGB RGB Colourbar ON 15.625 kHz 0.02% Vpeak-peak > 3V Refer to Fig 5-22
23b VideoColDencOff Colourbar DENC OFF No measurements needed
 Test Instructions Mono Board DVD-SD5.00SA_CH SD-5.00SA_CH 5. EN 19

PM3380B
PM3394B
ch1
ch1

1
1

CH1 2.00 V= MTB 200ns ch1+

CL 16532163_027.eps
CH1 2.00 V~ MTB20.0us ch1+ 230102

HSYNC CL06532065_019.eps
161100
Figure 5-23 BE_BCLK
Figure 5-22 Video H Sync

PM3380B
5.6 Servo
ch1

5.6.1 General Start-up Measurements:

Reset the Basic Engine part

Table 5-19 Reset basic engine part 1

Ref. # Command Name Remark

44 BeReset Reset the Basic Engine

Check if the Servo Reset (RSTN) at testpoint F258 goes from

CH1 2.00 V= MTB20.0ns ch1+
low to high after executing BeReset commands. CL 16532163_028.eps
230102

Check Vref
Figure 5-24 BE_DATA
Table 5-20 Vref check
PM3380B
Name Testpoint Value
ch1
Vref F111 2.5V 0.3V

Play DVD test Disc and check I2S interface

Table 5-21 I2S interface check

1

Name Testpoint Value Value

BE_BCLK F200 6.0 MHz ± 0.1 Refer to Figure 5-23
BE_WCLK F201 high Refer to Figure 5-25
BE_DATA F202 low Refer to Figure 5-24
BE_FLAG F203 low No waveform CH 1 2.00 V = MTB 200ns ch1 +
BE_V4 F255 low No waveform CL 16532163_029.eps
230102

BE_SYNC F256 low No waveform

Figure 5-25 BE_WCLK

5.6.2 Spindle Motor:

Before switching on the discmotor, check the following

testpoints:

Table 5-22 Spindle motor check

Name Testpoint Value

STDBY_MOTOR F308 low
MOTO1 F350 1V5 0.3
EN 20 5. SD-5.00SA_CH Test Instructions Mono Board DVD-SD5.00SA_CH

Switch the Discmotor ON/OFF with the following commands:

PM3380B

Table 5-23 Disc motor switching

ch1

Ref. # Command Name Remark

39a BeDiscmotorOn Discmotor on
39b BeDiscmotorOff Discmotor off

Check the following signals with the discmotor switched ON

and without DVD Disc inserted.

Table 5-24 Disc motor switching

Name Testpoint Frequency

CH1 5.00 V= MTB50.0ms ch1
STDBY_MOTOR F308 high CL 26532053_070.eps
210502
MOTO1 I241 4Vpp ± 0.5V Refer to
Figure 5-26 Figure 5-27 A1-A2-A3
A3 F301 Refer to Figure 5-27
A2 F302 Refer to Figure 5-27
A1 F303 Refer to Figure 5-27 PM3380B

T1 F210 Refer to Figure 5-28 ch1

T2 F211 Refer to Figure 5-28
T3 F212 Refer to Figure 5-28
H1+ F306 Refer to Figure 5-29
H1- F304 Refer to Figure 5-29
H2+ F309 Refer to Figure 5-29
H2- F305 Refer to Figure 5-29
1
H3+ F311 Refer to Figure 5-29
H3- F313 Refer to Figure 5-29

CH1 2.00 V= MTB5.00ms ch1+

PM3380B
CL 16532163_032.eps
230102

ch1
Figure 5-28 T1-T2-T3

PM3380B

ch1

CH1 1.00 V= MTB 250ns ch1

CL 26532053_069.eps
210502

Figure 5-26 Motor 1

CH1 200mV~ MTB5.00ms ch1

CL 26532053_071.eps
210502

Figure 5-29 H1+ ; H1- ; H2+ ; H2- ; H3+ ; H3-

When measurement is completed, switch the discmotor OFF

before executing next command

5.6.3 Radial

Radial ON will only work when the PCB is connected to a CDM

and DVD Disc is inserted.
Switch the Radial control ON/OFF with the following
commands:
 Test Instructions Mono Board DVD-SD5.00SA_CH SD-5.00SA_CH 5. EN 21

Table 5-25 Radial Table 5-27 Sledge

Ref. # Command Name Remark Ref. # Command Name Remark

40a BeRadialOn Radial control on 41a BeSledgeIn Sledge inwards
40b BeRadialOff Radial control off 41b BeSledgeOut Sledge outwards

Check the following signals before Radial control ON/OFF Check for the waveform ( Figure 5-32 ) of SL at testpoint F219

Table 5-26 Radial

PM3394B

Name Testpoint Value (Radial ON) ch1

Rad - F132 4.3V 0.5V
Rad + F133 4.3V 0.5V
RA F218 Refer to Figure 5-30 and 5-31

1
PM3380B

ch1

CH1 2.00 V~ MTB 250ns ch1+

CL 16532163_054
1 290102

Figure 5-32 SL

Check DC vtg on the following testpoint when Sledge at Inward

/ Outward position
CH1 1.00 V~ MTB 250ns ch1+
CL 16532163_035.eps
230102

Table 5-28 DC vtg check

Figure 5-30 RA (BeRadialOff)
Name Testpoint Value
SL - F327 4.5V 0.5V
PM3380B
SL + F326 4.5V 0.5V
ch1

Measure peak to peak signal on SL- and SL+ while moving

sledge outwards.
Signal will only appear momentary during command
BeSledgeOut
1

Table 5-29

Name Testpoint Waveform

STOP SL - F327 Refer to Figure 5-33
CH1 1.00 V~ MT B 250ns ch1+ SL + F326 Refer to Figure 5-33
CL 16532163_036.eps
230102

Figure 5-31 RA (BeRadialOn) Measure input sledge control (sledge in HOME position)

Visual check on the laser,when Radial control ON, if the

laserlight is visible. Table 5-30 Input sledge control
Once the check is completed,switch the Radial control OFF
before executing next command
Name Testpoint Value
SINPHI F347 1.5V 0.5V
5.6.4 Sledge
COSPHI F346 1.5V 0.5V
Test need a DVD disc in the DVD player to operate properly.
Use the following commands to move the sledge:
 EN 22 5. SD-5.00SA_CH Test Instructions Mono Board DVD-SD5.00SA_CH

PM3380B PM3380B
m1.1
ch1

CH1 2.00 V~ MTB 500ms ch1+ CH1 2 .00 V= MTB 500us ch1+
CL 16532163_046.eps
CL 06532147_010.eps 230102
161100

Figure 5-34 TRAY -

Figure 5-33 SL+ / SL- ( SLEDGE OUTWARDS )

5.6.5 Tray:
PM3380B

ch1
To open and close the tray use the following commands:

Table 5-31 Tray

Ref. # Command Name Remark

43a BeTrayIn Tray in
43b BeTrayOut Tray out

Measure voltage at the driver outputs of the BA5938FM for the 1

tray closed.

CH1 2.00 V= MTB 500us ch1+

CL 16532163_053.eps
Table 5-32 Tray closes 230102

Name Testpoint Value (Tray closed) Figure 5-35 TRAY +

TRAY - F340 4.3V 2.0V
TRAY + F338 4.3V 2.0V 5.6.6 Focus

Test need a DVD disc in the DVD player to operate properly.

Measure voltage and waveform at driver outputs while the tray To switch the Focus motor on/off, use the following commands:
is opening.
Table 5-34 Focus motor switching
Table 5-33 Tray opens
Ref. # Command Name Remark
Name Testpoint Value (Tray opening) 38a BeFocusOn Focus on
TRAY - F340 2.0V 1.0V 38b BefocusOff Focus off
TRAY + F338 6.0V 1.0V
Measure the driver outputs of the BA5938FM for the Focus
OFF.

Table 5-35 Focus motor switching

Name Testpoint Value (Focus OFF)

FOC - F134 5V 0.5V
FOC + F130 5V 0.5V
FO F220 1.5V 0.3V

Switch the focus ON and measure again the driver outputs

 Test Instructions Mono Board DVD-SD5.00SA_CH SD-5.00SA_CH 5. EN 23

Table 5-36 Focus motor switching Visual check on the laser,when Focus control ON, if the
laserlight is visible.
Name Testpoint Value Waveform Once the check is completed,switch the focus control OFF
before executing next command.
FOC - F134 1Vpp 0.2V Refer to Figure 5-36
FOC + F130 1Vpp 0.2V Refer to Figure 5-36
5.6.7 Hf Path
FO F220 Refer to Figure 5-37/38

Play DVD Test Disc.

Measure outputs of diodes Ax, B, C, D, E, F.

PM3394B

ch1 Table 5-37

Name Testpoint Value

Ax F119 2.6V 0.2%
B F127 2.6V 0.2%
1
C F124 2.6V 0.2%
D F122 2.6V 0.2%
E F115 2.6V 0.2%
F F117 2.6V 0.2%

At outputs of diodes A, B, C, D the following waveform can be

CH1 500mV~ MTB 100us ch1+ measured: Refer to Figure 5-39
CL06532065_029.eps
180500

PM3394B
Figure 5-36 FOC+ (BefocusOn)
ch1

PM3394B

ch1

CH1 100mV~ MTB 500ns ch1+

CL06532065_031.eps
161100

Figure 5-39 Output of diodes A,B,C,D

CH1 2.00 V~ MTB 500ns ch1+
CL06532065_030.eps
161100

Figure 5-37 FO (BefocusOff)

PM3380B Measure DVDALAS outputs

Ch1

Table 5-38 DVDALAS outputs

Name Testpoint Value

OA F104 1V 10%
T
1
OB F107 1V 10%
OC F108 1V 10%
OD F110 1V 10%
S1 F113 1V 10%
S2 F112 1V 10%

CH1 2.00 V~ MTB 500ns ch1

CL 06532147_011.eps
161100
At output HFN, the following waveform can be measured :
Refer to Figure 5-40
Figure 5-38 FO (BefocusOn)
 EN 24 5. SD-5.00SA_CH Test Instructions Mono Board DVD-SD5.00SA_CH

Table 5-39 Interface overview

PM3394B
Logical Physical interface
ch1 Interface Description components
Menu Menu-driven Service PC running a
Interface activation of terminal emulation
individual nuclei, program, connected to
used for Level 2/ the RS232 port of the
Second Line DVD player Test pin
1 diagnostic mode.
Users are service or
repair people
Command Used during Level 1 Control PC, running a
Line diagnostic mode. control program (e.g.
Interface Used to send Asterix), connected to
commands from the RS232 port of the DVD
CH1 500mV~ MTB 250ns ch1+
CL06532065_032.eps Control PC into the player Test pin
161100 DVD hardware.
Script Used to execute Local keyboard Local
Figure 5-40 HFN / HFP Interface Player Test Script display
(including reading
the error log) and
5.7 Diagnostic Software Description Dealer Test Script.
S2B Used for S2B Service PC, running a
5.7.1 Introduction interface communication with S2B monitor program,
the Basic Engine connected to the
Purpose RS232 port of DVD
This document describes all interfaces from the outside world player Test pin
to the diagnostic software, what is needed to use these Download Used to download Service PC running a
interfaces and how to access them. Interface diagnostic software terminal emulation
into the DVD player program, connected to
Scope the RS232 port of the
This document has been realised within the framework of the DVD player Test pin
DVD video player.

• In the next chapters the logical user interfaces are

5.7.2 Definitions and Abbreviations
described in more detail including the exact use of the
physical interface components.
Definitions • Front Panel Key Usage: Some of the nuclei used in the
Control PC Automatic test equipment, part of the diagnostic software require user intervention through the
production control system in the front panel key.
factory, to control the execution of
Diagnostic Nuclei in the DVD player.
Diagnostic Nucleus Part of the Diagnostic Software. Each 5.9 Description of Interfaces
nucleus contains an atomic and
software independent diagnostic test, 5.9.1 Menu Interface
testing a functional part of the DVD
player hardware on component level.
The menu interface is part of the Level 2 / Second Line
Script Part of the Diagnostic Software. Each
diagnostic mode. Via the menu interface it is possible to control
script contains a sequence of
the execution of the Diagnostic Nuclei.
Diagnostic Nuclei to be executed.
Service PC PC used by a service- or repair-person
to communicate with the Diagnostic Set-up Physical Interface Components
Software in the DVD player. Hardware required:
• Service PC
• one free COM port on the Service PC
Abbreviations
• special cable to connect DVD player to Service PC
FDS Full Diagnostic Software
The service PC must have a terminal emulation program (e.g.
5.8 Overview of Interfaces OS2 WarpTerminal or Procomm /Windows Hyperterminal)
installed and must have a free COM port (e.g. COM1). Activate
the terminal emulation program and check that the port settings
The table below shows an overview of the user interfaces of the
for the free COM port are: 19200 bps, 8 data bits, no parity, 1
Diagnostic Software. The table is based on logical interface,
stop bit and no flow control. The free COM port must be
interfaces as seen from user perspective. A logical interface
connected via a special cable to the RS232 port of the DVD
can use one or more physical interface components. The DVD
player. This special cable will also connect the test pin, which
has only a single RS232 port, implying that all interfaces using
is available on the connector, to ground (i.e. activate test pin).
this port are mutually exclusive.

Activation
Switch the player on and the following text will appear on the
screen of the terminal (program):
 Test Instructions Mono Board DVD-SD5.00SA_CH SD-5.00SA_CH 5. EN 25

5.9.2 Command Line Interface

DVDv4 Diagnostic Software version 5.03

(M)enu, (C)ommand or (S)2B interface ? [M]:@ m <enter> The command line interface is part of level 1 diagnostic mode.
SDRAM Interconnection test passed
Via a command line interface the execution of Diagnostic
Basic SDRAM test passed Nuclei can be controlled.
Slave Processor: SLAVE2

Press ENTER to go to Main Menu Set-up Physical Interface Components

CC: > CL 26532053_045.eps
130502
Hardware required:
• Control PC
• one free COM port on the Control PC
Figure 5-41
• special cable to connect DVD player to the Control PC
1. The first line indicates that the Diagnostic software has
The control PC must use the following port settings for the used
been activated and contains the version number of the
COM port: 19200 bps, 8 data bits, no parity, 1 stop bit and no
diagnostic; this is also an indication that the first basic
flow control. The control PC is connected with a special cable
nucleus (nucleus number 1) has been executed
to the RS232 port of the DVD player. Via the same connection
succesfully.
the test pin will be connected to ground.
2. The second line is the prompt asking the user to choose the
interface format. Enter ‘M’ to select Menu mode and the
next three lines are the successful result of the two Activation
subsequent basic tests (nuclei 2, 4 and the detection of the After power on the next text will sent to the control PC
display type used by the panel respectively).
3. The third line indicates the results ofthe shared SDRAM DVDv4 Diagnostic Software version 5.03

interconnection test. (M)enu, (C)ommand, or (S)2B interface ? [M]:@ C <enter>

4. The fourth line indicates the results of tyhe shared SDRAM
SDRAM Interconnection test passed
read/write test. Basic SDRAM test passed
5. The fifth line indicates what front panel processor was Front Panel Processor: SLAVE2

connected to the monoboard. It could be one of the DD: >

following: SLAVE2, SLAVE3, SLAVE 4, or Not Detected. CL 26532053_073.eps
6. The last line is the prompt (‘CC>’). Press ‘ENTER’ key and 220502

the main menu will appear. For the layout of the menus,
see chapter ‘Layout of Menu and Submenu’ The first line indicates that the Diagnostic software has been
activated and contains the version number; this is also an
To switch between interfaces, the DVD player needs to be indication that the first basic nucleus (nucleus number 1) has
switched off and on again. been executed succesfully. The second line lets the user
choose the interface format. Enter ‘C’ to select Command
Note: For player that has no Mechanical power switch, it can Mode and the next three lines are the succesful result of the
be turned on by connecting the power-cable. two subsequent basic tests (nuclei 2, 4 and the detection of the
display type used by the panel respectively). If not all these
Usage messages appear on the terminal screen, then the related
To select, type the number of the chosen menu-item at the nucleus found an error. The last line is the prompt ("DD>"). The
prompt. Each entry must be terminated with a ‘RETURN’. diagnostic software is now ready to receive commands.
Invalid selections will cause an error message by the Menu
Handler Note: For player that has no Mechanical power switch, it can
Example: be turned on by connecting the power-cable.

Usage
Select > 99 The commands that can be given are the numbers of the
Invalid menu choice, number out of range ER @
Press RETURN to continue @ nuclei. A command must be terminated with a <RETURN>
character from the control PC. When typing commands, the
CL 16532163_038.eps backspace key can be used to make corrections.
230102
In case of typing errors in the command, an error message is
returned. Example:
Result and output of an activated (and terminated) nucleus will
be sent back to the service terminal. Example:
DD: > CompSdarmWrR? (Nuclei name cannot be accepted)
0001 Unknown command ER @
DD: >
Select > 3
1601 Data line X is not connected to the SDRAM ER @ CL 16532163_041.eps
Press RETURN to continue @ 230102

CL 16532163_039.eps
230102
If the command (the nucleus number) is recognised, the
nucleus is executed. Result and output of an activated (and
After the user presses a key, the current menu is rebuilt on terminated) nucleus will be sent back to the control PC
screen. according to the standard layout.
Pressing “RETURN” at the prompt without any further input at
the terminal will always rebuild the main menu. Example for a command without error:

Termination
DD: > 16 (Execute CompSdramWrR nuclei)
The menu interface is terminated by switching off the DVD 1600 OK @
player. DD: >

CL 16532163_042.eps
230102
 EN 26 5. SD-5.00SA_CH Test Instructions Mono Board DVD-SD5.00SA_CH

Example for a command with error: First Level Submenus

MAIN > AUDIO MENU

DD: > 16 1 Mute...
1601 Address line X not connected to the SDRAM @
DD: > 2 Pink Noise...
3 Sine Wave...
CL 16532163_043.eps 4 Digital Ports...
230102
5 Ext. DAC Board...

Termination MAIN > VIDEO MENU

The command line interface is terminated by switching off the 1 Colourbar...
DVD player. 2 Scart...
3 Digital Port...
5.9.3 S2B Interface
MAIN > FRONT PANEL MENU
Set-up Physical Interface Components 1 Slave Processor...
Hardware needed: 2 VFT Display [30a]
• Control PC 3 LCD Display [30b]
• one free COM port on the Control PC 4 LCD BkLight [30c]
• special cable to connect DVD player to Control PC 5 Keyboard [27]
• S2B monitor tool running on the Control PC 6 LEDs...
7 Remote Control [28]
8 P50 Check [60]
Activation
To start the S2B interface, connect the RS232 cable to the
Control PC in the correct manner. Then start the PC, start the MAIN > BASIC ENGINE MENU
monitor tool and start the DVD player; turn off the monitor tool, 1 Reset [44]
turn on S2B monitor tool. The S2B monitor tool now takes all 2 Version [37]
communication. 3 S2B...
The S2B interface is activated by sending the bit pattern 110x 4 Loader Mechanism...
xxxx with the first character to the DVD player, when the user 5 Special Diagnostics...
is asked to choose an interface type. The command handler
will then activate the S2B pass-through nucleus. The character MAIN > PROCESSOR PERIPHERALS MENU
sent will be passed to this nucleus without loss. 1 Clock...
2 Flash...
Note: For player that has no Mechanical power switch, it can 3 NVRAM...
be turned on by connecting the power-cable. 4 SDRAM Write/Read [16]

Termination MAIN > ERROR LOG MENU

To terminate S2B pass-through mode, switch off the DVD 1 Read Last Errors [31]
player. 2 Read Error Bits [32]
3 Reset Error Log [33]

5.10 Script Interfaces MAIN > FURORE MENU

1 SDRAM Write/Read [63]
This interface is used during execution of the Player Script and 2 SDRAM Write/Read Fast [64]
the Dealer Script to display output and error messages on the 3 Chip Revision ID [65]
local display of the stand-alone DVD player. 4 Set DSD_PCM Output High [84a]
5 Set DSD_PCM Output Low [84b]
The activation and the usage can refer to the respective stand- 6 Reset Furore IC [83]
alone DVD player service manual
MAIN > MISCELLANEOUS MENU
5.10.1 Layout of Menu and Submenu 1 Statistics Info...
2 Read DVD Application version[46]
Layout Of Menus And Submenus For The Service Terminal
NOTE: a symbol “--” in the menu layouts indicates that that Second Level Submenus
specific menu choice will invoke the display of a submenu. This
symbol will also be used in the implementation of the menus MAIN > AUDIO > MUTE MENU
(i.e. the “--” will also appear in the user interface).
1 Mute On [19a]
2 Mute Off [19b]
Menus 3 Mute Front LR On (963 only) [19c]
4 Mute Front LR Off (963 only) [19d]
MAIN MENU
1 Audio... MAIN > AUDIO > PINK NOISE MENU
2 Video... 1 Pink Noise On [20a]
3 Front Panel... 2 Pink Noise Off [20b]
4 Basic Engine... 3 Beep Tone On [20c]
5 Processor Peripherals...
6 Error Log... MAIN > AUDIO > SINE WAVE MENU
7 Furore...
1 Audio Sine On [21a]
8 Miscellaneous...
2 Audio Burst On [21b]
 Test Instructions Mono Board DVD-SD5.00SA_CH SD-5.00SA_CH 5. EN 27

MAIN > AUDIO > DIGITAL PORTS MENU MAIN > PROCESSOR PERIPHERALS > NVRAM MENU
1 LFE_SEL High [56a] 1 I2C NVRAM Acces [11]
1 LFE_SEL Low [56b] 2 NVRAM Config [34]
3 NVRAM Reset [35]
MAIN > AUDIO > EXT DAC BOARD MENU 4 NVRAM Modify [36]
1. DAC Reset [79] 5 NVRAM Read/Wr Test [15]
2. I2C Test...
3. Clock... MAIN > MISCELLANEOUS > STATISTICS INFO MENU
4. Audio... 1 Total Nr Of Times Tray Open [47a]
5. Low Power Standby... 2 Total Time Power On [47b]
6. DAC Mode... 3 Total Play-Time CDDA & VCD [47c]
4 Total Play-Time DVD [47d]
MAIN > VIDEO > COLOURBAR MENU
1 Colourbar DENC On (PAL) [23a] Third Level Submenus
2 Colourbar DENC On (NTSC) [23c]
3 Colourbar DENC/PSCAN Off [23a] MAIN > AUDIO > EXT DAC BOARD MENU > I2C TEST MENU
4 Ext Prog Scan Pattern On [24a] 1. I2C Test [66a]
5 Int Prog Scan Pattern On [24c] 2. I2C Enable Pin On [66b]
6 Enhanced YUV mpeg On [24b] 3. I2C Enable Pin Off [66c]
7 Set Video Out To RGB [61a]
8 Set Video Out To YUV [61b]
MAIN > AUDIO > EXT DAC BOARD MENU > CLOCK MENU
1. Clock Internal [67a]
MAIN > VIDEO > SCART MENU 2. Clock External [67b]
1 I2C Scart IC Check [54] 3. Clock Upsampling 192k (963 only) [82a]
2 Scart To DVD [55a] 4. Clock Upsampling 96k (963 only) [82b]
3 Scart Pass Through [55b] 5. Clock Upsampling On (963 only) [82c]
4 Scart Pin 8 Low (0 to 2)V [25a]
5 Scart Pin 8 Mid (4.5 to 7)V [25b]
MAIN > AUDIO > EXT DAC BOARD MENU > AUDIO
6 Scart Pin 8 Hi(9.5 to 12)V [25c]
1. Audio Pre-Mute On [68a]
2. Audio Pre-Mute Off [68b]
MAIN > VIDEO > DIGITAL PORT MENU 3. Audio Center On [69a]
1 Video Port Out 0xAA [17a] 4. Audio Center Off [69b]
2 Video Port Out 0x55 [17b]
3 P-scan board IO exp [17c] MAIN > AUDIO > EXT DAC BOARD MENU > LOW POWER
STANDBY
MAIN > FRONT PANEL > SLAVE PROCESSOR MENU 1. Low Power Standby On [81a]
1 Bus Comms Check [12] 2. Low Power Standby Off [81b]
2 S/W Version [26]
MAIN > AUDIO > EXT DAC BOARD MENU > DAC MODE
MAIN > FRONT PANEL > LEDS MENU MENU
1 Test Front Panel LEDS [29] 1. DAC CDDA Mode [80a]
2 I2C comm check IO Exp. [29a] 2. DAC DVD48 Mode [80b]
3. DAC DVD96 Mode [80c]
MAIN > BASIC ENGINE > S2B MENU
1 S2B Echo [13] MAIN > BASIC ENGINE > MECHANISM > DISC MOTOR
2 S2B Pass-Through [14] MENU
1 Disc Motor On [39a]
MAIN > BASIC ENGINE > MECHANISM MENU 2 Disc Motor Off [39b]
1 Disc Motor...
2 Laser... MAIN > BASIC ENGINE > MECHANISM > LASER MENU
3 Changer mechanism... 1 CD Laser On [58a]
4 Focus... 2 CD Laser Off [58b]
5 Radial... 3 DVD Laser On [58c]
6 Sledge... 4 DVD Laser Off [58d]
7 Grooves...
MAIN > BASIC ENGINE > MECHANISM > CHANGER MENU
MAIN > BASIC ENGINE > SPECIAL DIAGNOSTICS MENU 1 Initialize [91a]
1 Read FlashID [70] 2 Tray Open [91b]
2 ROM Checksum [71] 3 Tray Close [91c]
3 Scratch Circuit [72] 4 Disc Clamp Down [91d]
5 Disc Clamp Up [91e]
MAIN > PROCESSOR PERIPHERALS > PCM CLOCK MENU 6 Rotate CW <n> times [92a]
1 Ext PCM_CLK In CDDA Mode (11.3MHz) [7a] 7 Rotate CCW <n> times [92b]
2 Ext PCM_CLK In DVD Mode (12.3MHz) [7b] 8 IO Expander I2C Comm [92c]
3 Ext PCM_CLK In DVD96kHz Mode (24.6MHz) [7c]
1 Int PCM_CLK In CDDA Mode (11.3MHz) [8a] MAIN > BASIC ENGINE > MECHANISM > FOCUS MENU
2 Int PCM_CLK In DVD Mode (12.3MHz) [8b] 1 Focus On [38a] (load DVD first)
3 Int PCM_CLK In DVD96kHz Mode (24.6MHz) [8c] 2 Focus Off [39b]

MAIN > PROCESSOR PERIPHERALS > FLASH MENU MAIN > BASIC ENGINE > MECHANISM > RADIAL MENU
1 Verify FLASH Checksum [6] 1 Radial Control On [40a] (load DVD first)
2 Show FLASH Checksum [62] 2 Radial Control Off [40b]
EN 28 5. SD-5.00SA_CH Test Instructions Mono Board DVD-SD5.00SA_CH

MAIN > BASIC ENGINE > MECHANISM > SLEDGE MENU

1 Sledge Inwards [41a]
2 Sledge Outwards [41b] 1. 0001 Unknown command ER @
2. 3100 OK @
3. 0901 Data line X is not connected to the DRAM ER @
MAIN > BASIC ENGINE > MECHANISM > GROOVES (Uses 4. Device ID: 0x01
Manufac ID: 0xC2
DVD) MENU 7000 OK @
1 Jump To Inside Grooves [42a] CL 16532163_045.eps
230102
2 Jump To Middle Grooves [42b]
3 Jump To Outside Grooves [42c]

Screen Layout With Menus 5.11 Diagnostic Nuclei

When menus are used, no specific screen layout can be given:
menu information will not be in a special format, except for the Each nucleus contains an atomic and independent diagnostic
layout as mentioned in the previous paragraphs. test, testing a functional part of the DVD player hardware on
component level. Each Nucleus returns a result message to its
A typical menu session can look as follows: caller. Some tests (e.g. generating a colour bar) can only return
an "OK" result. Internal communication will be done via a
DVDv4 Diagnostic Software version 5.03 uniform interface between the diagnostic Engine, Scripts and
the Diagnostic Nuclei.
(M)enu, (C)ommand or (S)2B interface ? [M]:@ <enter> The diagnostic Engine can only operate if a certain (minimal)
SDRAM Interconnection test passed set of hardware is functioning properly. To test this set of
Basic SDRAM test passed
Slave Processor: SLAVE2 hardware, a set of basic diagnostic nuclei is embedded in the
DVD player. Each basic diagnostic nucleus will only test that
Press ENTER to go to main menu
part of the hardware which is required for execution of the
CC: > <enter> diagnostic Engine, e.g. a RAM test will only test that part of
RAM that is used by the diagnostic engine. After the Diagnostic
MAIN MENU
Engine is operational it is possible to do a full RAM diagnostic.
1. Audio ...
2. Video ...
All basic diagnostic nuclei start with prefix "Basic".
3. Front Panel ... In the overview each Diagnostic Nucleus consists of a
4. Basic Engine ...
5. Processor Peripherals ...
reference number, a reference name and remarks. Reference
7. Furore ... number and name are coupled and one of them is enough for
8. Miscellaneous ...
unique identification.
Select > 4 <enter>

MAIN > BASIC ENGINE MENU Table 5-40 Basic diagnostic nuclei
1. Reset [44]
2. Version [37] Ref. # Reference Name Remark
3. S2B
4. Loader Mechanism ... 1 BasicSpAcc Serial port Access test/
5. Special Diagnostics ...
initialization
Press Enter to go to Main Menu 2a BasicInterconDram Data and address bus
Select > 5 <enter> Interconnection (only for
MAIN > BASIC ENGINE > SPECIAL DIAGNOSTIC MENU
development)
2b BasicInterconSdram Data and address bus
1. Read flashID [70]
2. ROM checksum [71] interconnection
3. Scratsh detector test [72]
Press Enter to go to Main Menu CL 26532053_047.eps 3 BasicDramWrR DRAM Write Read (only for
240502 development)
4 BasicSdramWrR SDRAM Write Read
Figure 5-42

Depending on the height of the screen, the text will start Table 5-41 Processor and peripherals
scrolling off the top of the screen.
Ref. # Reference Name Remark
Layout Of Results Diagnostic Nuclei On Control/service Pc 6 PapChksFl Checksum FLASH
Results returned from a Diagnostic Nucleus to the control/ 7a PapUclkAclkCdda uClock A_CLK in CD-DA
service PC will have a maximum length of 300 characters and mode
are terminated by a CR character (included in the string length) 7b PapUclkAclkDvd uClock A_CLK in DVD mode
The result has the following layout
7c PapUclkAclkDvd96 uClock A_CLK in DVD
< number >< string > [OK l ER] @< CR >
(96kHz) mode
The use of the "@" enables the Asterix system on the Control
PC to parse the output string of each nucleus into a database. 10 PapFlashWrAcc FLASH Write Access (only for
development)
< number > is a 4-digit decimal number padded with leading 11 PapI2cNvram I2C NVRAM access
zeros if its value is less than 4 digits. The first two digits identify 12 PapI2cDisp I2C Display PWB
the generating nucleus (or goup of nuclei), the latter two digits 13 PapS2bEcho S2B Echo
indicate the error number.
14 PapS2bPass S2B Pass-through
< string > is a text string containing information about the result 15 PapNvramWrR NVRAM Write Read
of the Diagnostic Nucleus. 62 PapChksSum Show checksums stored in
flash
< number > and < string > are defined in [SDD_DN] in the
output sections of each Nucleus.
Examples:
 Test Instructions Mono Board DVD-SD5.00SA_CH SD-5.00SA_CH 5. EN 29

Table 5-42 Components Table 5-44 Video

Ref. # Reference Name Remark Ref. # Reference Name Remark

16 CompSdramWrR SDRAM Write Read 17a VidPortOutAA Output the value 0XAA at
the Digital Video Interfac
e Port
Table 5-43 Audio
17b VidPortOut55 Output the value 0X55 at
the Digital Video Interfac
Ref. # Reference Name Remark
e Port
19a AudioMuteOn Audio Mute On
23a VideoColDencOnPAL Colourbar (PAL) DENC
19b AudioMuteOff Audio Mute Off On
20a AudioPinkNoiseOn Audio Pinknoise On 23b VideoColDencOff Colourbar DENC Off
20b AudioPinkNoiseOff Audio Pinknoise (or beep 23c VideoColDencOnNTSC Colourbar (NTSC) DENC
tone) Off On
20c AudioBeepToneOn Audio Beep Tone On 24a VideoEXtPscanPattern External Progressive
21a AudioSineOn Audio Sine signal On/Off scan board Colour Bar
21b AudioSineBurst Audio Sine signal Burst pattern ON
56a AudioLfePortHigh Set the LFE_SEL port to 24b VideoYuvMPEGon Enhanced YUV -
HIGH DigitalVideo Colour Bar
56b AudioLfePortLow Set the LFE_SEL port to 24c VidIntPscanColourBarOn Internal ST5588
LOW Progressive scan colour
bar pattern ON
66a DAC_I2C Resets DAC and check
I2C communication with 25a VideoScartLo Scart Low
DAC 25b VideoScartMi Scart Medium
66b DAC_I2CEnable Enable I2C 25c VideoScartHi Scart High
communication to AV 54 VideoScartSwComm Scart Switch
board communication
66c DAC_I2CDisable Disable I2C 55a VideoScartSwDvd Scart Switch Dvd
communication to AV
55b VideoScartSwPass Scart Switch Pass-
board
through
67a DAC_ClockInternal Uses internal clock from
57a VideoScartPinLo PIO-pins as used in 2A
monoboard for DAC for Scart-switching
(256fs)
57b VideoScartPinMi PIO-pins as used in 2A
67b DAC_ClockExternal Uses external clock for for Scart-switching
DAC (384fs)
57c VideoScartPinHi PIO-pins as used in 2A
68a DAC_AudioPreMuteOn Enable Audio Pre-mute
for Scart-switching
pin
61a VideoColOutRGB Output RGB from
68b DAC_AudioPreMuteOff Disable Audio Pre-mute
(ST5508) ST5508
pin
61b VideoColOutYUV Output YUV from
69a DAC_CenterOn Enable Center on pin (ST5508) ST5508
69b DAC_CenterOff Disable Center on pin
79 DAC_Reset Resets DAC
Table 5-45 Display (slave processor)
80a DAC_ModeCDDA Sets DAC to CDDA
mode
Ref. # Reference Name Remark
80b DAC_ModeDVD48 Sets DAC to DVD mode
26 DispVer Version number
(48kHz)
27 DispKeyb Keyboard
80c DAC_ModeDVD96 Sets DAC to DVD mode
(96kHz) 28 DispRc Remote Control
80d DAC_ModeDSD Sets DAC to DSD mode 29 DispLed LEDs
81a DAC_LowPowerStandby Enable Low Power 29a PapI2cLedIOExp Tests the I2C expander
On Standby used to control the front
81b DAC_LowPowerStandby Disable Low Power panel LEDs
Off Standby 30a DispDisplay VFT Display test
82a DAC_UpsamplingFreq19 Sets Upsampling 30b DispLCDisplay LCD Display test
2k frequency to 192kHz 30c DispLCDBkLight LCD Backlight test
82b DAC_UpsamplingFreq96 Sets Upsampling 60 DispP50 P50 loopback test
k frequency to 96kHz
82c DAC_UpsamplingOn Enable upsampling
Table 5-46 Log (Error logging in Nvram)
82d DAC_UpsamplingOff Disable upsampling
Ref. # Reference Name Remark
31 LogReadErr Read last Errors
32 LogReadBits Read errors Bits
33 LogReset Reset
EN 30 5. SD-5.00SA_CH Test Instructions Mono Board DVD-SD5.00SA_CH

Table 5-47 Miscellaneous Ref. # Reference Name Remark

92b ChangerTrayCCW Rotates the carousel n
Ref. # Reference Name Remark (n = 1 to 5) times in the
34 MiscReadConfig Read Configuration area counter clockwise
from NVRAM direction
35 MiscNvramReset NVRAM Reset 92c ChangerI2cExp Tests the I2C expander
36 MiscNvramMod Modify NVRAM contents used to control the
changer mechanism.
46 MiscApplVer Read version of
application software
47a MiscTrayOpenNr Read the number of Table 5-49 Furore IC
times the tray opened
Ref. # Reference Name Remark
47b MiscPowerOnTime Read the total time the
player's power has been 63 Furore_SdramWrR Furore SDRAM Write Read
on test
47c MiscPlayTimeCddaVcd Read the Playtime of 64 Furore_SdramWrR Furore SDRAM
CDDA and VCD discs Fast interconnection test
47d MiscPlayTimeDvd Read the Playtime of 65 Furore_Id Furore version ID check
DVD discs 83 Furore_Reset Furore reset
84a Furore_High Sets Furore output pins
DSD_PCM0-9 to high
Table 5-48 Basic Engine
84b Furore_Low Sets Furore output pins
DSD_PCM0-9 to low
Ref. # Reference Name Remark
37 BeVer Version number
38a BeFocusOn Focus On Table 5-50 Karaoke (not available)
38b BeFocusOff Focus Off
Ref. # Reference Name Remark
39a BeDiscmotorOn Discmotor On
48a KaraokeModeOff Switch Karaoke mode off
39b BeDiscmotorOff Discmotor Off
48b KaraokeModeOn Switch Karaoke mode on
40a BeRadialOn Radial control On
49 KaraokeMicInput Check path from the
40b BeRadialOff Radial control Off
microphone input to audio
41a BeSledgeIn Sledge Inwards output
41b BeSledgeOut Sledge Outwards
50a KaraokeKeyOn Set Karaoke Key to the
42a BeGroovesIn Jump Grooves to Inside maximum level (1200 cent)
42b BeGroovesMid Jump Grooves to Middle 50b KaraokeKeyOff Set Karaoke Key to flat octave
42c BeGroovesOut Jump Grooves to Outside (0 cent)
43a BeTrayIn Tray In 51a KaraokeEchoOn Set Echo Control fuction on
43b BeTrayOut Tray Out 51b KaraokeEchoOff Set Echo Control function off
44 BeReset Reset Basic Engine
58a LaserCdOn CD Laser on
5.12 Nuclei Error Codes
58b LaserCdOff CD Laser off
58c LaserDvdOn on DVD Laser on
In the following tables the error description of the error codes
58d LaserDvdOff DVD Laser off will be described.
70 BedReadFlashID Read flash memory
manufacturer and 5.12.1 Audio Nuclei
device ID
71 BedCalcRomChksum Calculate ROM
checksum Error Error text
code
72 BedScratchTest Test scratch
detection circuit 1800 Audio Deemp On OK
91a ChangerInitialize Initialize Changer 1820 Audio Deemp Off OK
mechanism to closed 1880 Audio Deemp Tri OK
state with tray 1 at play 1900 Audio mute On OK
91b ChangerTrayOut Opens the tray 1920 Audio mute Off OK
91c ChangerTrayIn Closes the tray, then 1940 Audio Front LR mute On OK
rotates the carousel 1 slot 1960 Audio Front LR mute Off OK
clockwise
2000 Audio Pinknosie On OK
91d ChangerClampDown Lowers the disc clamping
2001 Audio Pinknoise On DAC fail
mechanism
2020 Audio Pinknoise Off OK
91e ChangerClampUp Raises the disc clamping
mechanism to play 2040 Audio Beep tone On OK
position 2041 Audio Beep tone On DAC fail
92a ChangerTrayCW Rotates the carousel n 2100 Audio Sine On OK
(n = 1 to 5) times in the 2101 Audio Sine On DAC fail
clockwise direction 2120 Audio Sine Burst OK
2121 Audio Sine Burst DAC fail
6600 DAC I2C OK
6601 DAC I2C Bus busy
 Test Instructions Mono Board DVD-SD5.00SA_CH SD-5.00SA_CH 5. EN 31

Error Error text 5.12.2 Basic Engine Nuclei

code
6602 DAC I2C expander Error
6603 DAC I2C DAC 4362 code Error text
6620 DAC I2C enable OK 3900 Test successful
6640 DAC I2C disable OK 3901 Parity error from Basic Engine to Serial
6700 DAC Clk internal OK 3902 Unexpected response from Basic Engine
6701 DAC Clk internal I2C bus busy 3903 Communication time-out error
6702 DAC Clk internal I2C failed 3904 Basic Engine returned error number 0xXX
6720 DAC Clk external OK 3921 Parity error from Basic Engine to Serial
6721 DAC Clk external I2Cbus busy 3922 Unexpected response from Basic Engine
6722 DAC Clk external I2C failed 3923 Communication time-out error
6800 DAC Audio pre-mute On OK 3924 Basic Engine returned error number 0xXX
6801 DAC Audio pre-mute On I2C bus busy
6802 DAC Audio pre-mute On I2C failed 3800 Test successful
6820 DAC Audio pre-mute Off OK 3801 Parity error from Basic Engine to Serial
6821 DAC Audio pre-mute Off I2C bus busy 3802 Unexpected response from Basic Engine
6822 DAC Audio pre-mute Off I2C failed 3803 Communication time-out error
6900 DAC Center On OK 3804 Basic Engine returned error number 0xXX
6901 DAC Center On I2C bus busy 3805 Focus loop could not be closed
6902 DAC Center On I2C failed 3820 Test successful
6920 DAC Center Off OK 3821 Parity error from Basic Engine to Serial
6921 DAC Center Off I2C bus busy 3822 Unexpected response from Basic Engine
6922 DAC Center Off I2C failed 3823 Communication time-out error
7900 DAC Reset OK 3824 Basic Engine returned error number 0xXX
7901 DAC Reset I2C bus busy
7902 DAC Reset I2C expander 4200 Test successful
8000 DAC Mode CDDA OK 4201 Parity error from Basic Engine to Serial
8001 DAC Mode CDDA I2C bus busy 4202 Unexpected response from Basic Engine
8002 DAC Mode CDDA I2C failed 4203 Communication time-out error
8020 DAC Mode DVD48 OK 4204 Basic Engine returned error number 0xXX
8021 DAC Mode DVD48 I2C bus busy 4205 Sledge could not be moved to home position
8022 DAC Mode DVD48 I2C failed 4206 Focus loop could not be closed
8040 DAC Mode DVD96 OK 4207 Motor not on speed within time-out
8041 DAC Mode DVD96 I2C bus busy 4208 Radial loop could not be closed
8042 DAC Mode DVD96 I2C failed 4209 PLL could not lock in accessing or tracking
8060 DAC Mode DSD OK state
8061 DAC Mode DSD I2C bus busy 4210 Subcode or sector information could not be
read
8062 DAC Mode DSD I2C failed
4211 Requested subcode item could not be found
8100 DAC Low Power Standby On OK
4212 TOC could not be read in time
8101 DAC Low Power Standby On I2C bus busy
4213 Seek could not be performed
8102 DAC Low Power Standby On I2C failed
4220 Test successful
8120 DAC Low Power Standby Off OK
4221 Parity error from Basic Engine to Serial
8121 DAC Low Power Standby Off I2C bus busy
4222 Unexpected response from Basic Engine
8122 DAC Low Power Standby Off I2C failed
4223 Communication time-out error
8200 DAC Upsample 192k OK
4224 Basic Engine returned error number 0xXX
8201 DAC Upsample 192k I2C bus busy
4225 Sledge could not be moved to home position
8202 DAC Upsample 192k I2C failed
4226 Focus loop could not be closed
8220 DAC Upsample 96k OK
4227 Motor not on speed within time-out
8221 DAC Upsample 96k I2C bus busy
4228 Radial loop could not be closed
8222 DAC Upsample 96k I2C failed
4229 PLL could not lock in accessing or tracking
8240 DAC UpSample On OK
state
8241 DAC UpSample On bus busy
4230 Subcode or sector information could not be
8242 DAC UpSample On I2C failed read
8260 DAC UpSample Off OK 4231 Requested subcode item could not be found
8261 DAC UpSample Off bus busy 4232 TOC could not be read in time
8262 DAC UpSample Off I2C failed 4233 Seek could not be performed
4240 Test successful
4241 Parity error from Basic Engine to Serial
4242 Unexpected response from Basic Engine
4243 Communication time-out error
4244 Basic Engine returned error number 0xXX
EN 32 5. SD-5.00SA_CH Test Instructions Mono Board DVD-SD5.00SA_CH

Error Error
code Error text code Error text
4245 Sledge could not be moved to home position 7001 Comm Test Failed
4246 Focus loop could not be closed 7002 Load Cmd Failed
4247 Motor not on speed within time-out 7003 Load Dat Failed
4248 Radial loop could not be closed 7004 Run Cmd Failed
4249 PLL could not lock in accessing or tracking 7100 ROM Checksum: XXXX
state 7101 Comm Test Failed
4250 Subcode or sector information could not be 7102 Load Cmd Failed
read 7103 Load Dat Failed
4251 Requested subcode item could not be found 7104 Run Cmd Failed
4252 TOC could not be read in time 7201 Comm Test Failed
4253 Seek could not be performed 7200 Test successful
7202 Load Cmd Failed
4000 Test successful 7203 Load Dat Failed
4001 Parity error from Basic Engine to Serial 7204 Run Cmd Failed
4002 Unexpected response from Basic Engine 7205 Scratch circuit not OK
4003 Communication time-out error
4004 Basic Engine returned error number 0xXX 9101 CHGR IO EXP COMM FAIL
4005 Radial loop could not be closed 9102 CHGR CLAMPUP DN SW STUCK LOW
4020 Test successful 9103 CHGR CLAMPDOWN TIMEOUT
4021 Parity error from Basic Engine to Serial 9104 CHGR CLAMPUP TIMEOUT
4022 Unexpected response from Basic Engine 9105 CHGR OPEN CLOSE SW STUCK LOW
4023 Communication time-out error 9106 CHGR TRAYOPEN TIMEOUT
4024 Basic Engine returned error number 0xXX 9107 CHGR TRAYCLOSE TIMEOUT
9108 CHGR STUCK HIGH ROTA SENSOR
4400 Test successful 9109 CHGR STUCK LOW ROTA SENSOR
4401 Test successful 9100 CHGR INITIALIZE OK
9120 CHGR TRAYOPEN OK
4100 Test successful
9140 CHGR TRAYCLOSE OK
4101 Parity error from Basic Engine to Serial
9160 CHGR CLAMPDOWN OK
4102 Unexpected response from Basic Engine
9180 CHGR CLAMPUP OK
4103 Communication time-out error
9199 CHGR UNKNOWN
4104 Basic Engine returned error number XX
9200 CHGR CW ROTATE OK
4120 Test successful
9220 CHGR CCW ROTATE OK
4121 Parity error from Basic Engine to Serial
9240 CHGR IOEXP COMM OK
4122 Unexpected response from Basic Engine
9280 CHGR IDLE OK
4123 Communication time-out error
4124 Basic Engine returned error number XX 5.12.3 Display PWB Nuclei

4300 Test successful

Error
4301 Parity error from Basic Engine to Serial code Error text
4302 Unexpected response from Basic Engine 3000 Test successful
4303 Communication time-out error 3001 Disp not responding
4304 Basic Engine returned error number 0xXX 3002 Disp key no response
4320 Test successful 3003 One or more patterns not correct
4321 Parity error from Basic Engine to Serial 3004 Disp type invalid
4322 Unexpected response from Basic Engine 3020 Test successful
4323 Communication time-out error 3021 Disp not responding
4324 Basic Engine returned error number 0xXX 3022 Disp key no response
3023 One or more patterns not correct
3700 Version: X.Y.Z 3040 Test successful
3701 Parity error from Basic Engine to Serial 3041 Disp not responding
3702 Unexpected response from Basic Engine 3042 Disp key no response
3703 Communication time-out error 3043 One or more patterns not correct
3704 Basic Engine returned error number 0xXX
2700 Model name in wich the test is running
5800 Test successful 2701 Disp key no response
5820 Test successful 2702 Disp not responding
5840 Test successful 2707 Stop key not pressed
5860 Test successful 2708 Pause key not pressed
5801 Unexpected response from Basic Engine 2709 Play key not pressed
7000 Manuf. ID: <XX> Device ID: <YY>
 Test Instructions Mono Board DVD-SD5.00SA_CH SD-5.00SA_CH 5. EN 33

Error Error
code Error text code Error text
2710 Open/close key not pressed 5902 I2C bus not working
2713 Previous key not pressed 5904 DTS chip response not correct
2714 Next key not pressed
2715 More than one key not pressed 1300 Test successful
2716 Audio key not pressed 1301 Parity error from basic engine to serial
1302 Parity error from serial to basic engine
2900 DispLED OK 1303 No communication between serial and basic
2901 DispLED not responding engine
2902 DispLED keyboard not responding 1304 Communication time-out error
2903 DispLED Standby led not working
2904 DispLED pattern error 1600 Test successful
2905 DispLED IO expander not responding 1601 The DVD SDRAM is faulty

2800 Test successful 5.12.5 Log Nuclei

2801 Slave display controller not responding

2802 Slave keyboard not responding Error
2803 No key press received from remote control code Error text
3100 Show error log

2600 The ROM version of the slave processor = 3101 Error log is invalid
0xXX, and the internal ID = 0xYY 3102 Error log could not be read from NVRAM
2601 I2CI2C bus busy 3103 I2C bus busy before start
2602 I2C bus not working
3200 Show error bit
6000 P50 test 3201 Error log is invalid
6001 No readback on P50 3202 I2C bus busy before start
6002 Disp not responding 3203 Error log could not be read from NVRAM
6003 P50 readback error
3300 Error log is cleared
5.12.4 Processor & Peripherals Nuclei 3301 Error log could not be cleared
3302 I2C bus busy before start
Error
5.12.6 Miscellaneous Nuclei
code Error text
700 Test successful
720 Test successful Error
code Error text
740 Test successful
3400 Test successful
3401 The configuration data could not be read from
600 All checksums are correct
NVRAM
601 Following checksum is faulty: BootCode1
3402 I2C bus busy before start
Checksum is 0xY2 and is not correct (must be
0xZ2)
601 This test is not available when stand-alone 3500 NVRAM is cleared
compiled 3501 The NVRAM could not be reset.
3502 I2C bus busy before start
6200 Checksums = 0xA1, 0xB1, 0xC1, 0xD1
6201 This test is not available when stand-alone 3600 NVRAM contents updated.
compiled NVRAM contents and configuration
checksum updated.
1000 Test successful 3601 NVRAM contents could not be updated.
1001 Test successful 3602 I2C bus busy before start
1020 Test successful 3603 NVRAM contents could not be read
1021 Test successful 3604 NVRAM not accessible.
3605 NVRAM checksum could not be updated.
1100 Test successful
1104 NVRAM reply time-out 1500 Test successful
1502 NVRAM access time-out
1200 Test successful 1504 NVRAM fails
1202 Slave bus not working
1203 Slave controller not responding 5400 Test successful
1204 Slave response is not correct 5401 I2C bus busy
5900 Test successful 5402 I2C bus not working
5901 I2C bus busy 5403 Scart switch controller not responding
 EN 34 5. SD-5.00SA_CH Test Instructions Mono Board DVD-SD5.00SA_CH

Error Error Error text

code Error text code
5404 Scart switch controller response not correct 2404 ADV7300 com response error
2420 FLI2200 com OK
5500 Test successful 2421 I2C FLI2200 com bus busy
5501 I2C bus busy 2422 FLI2200 com transmit error
5502 I2C bus not working 2423 No ack from FLI2200 com
2424 FLI2200 com response error
5520 Test successful 2460 Proscan com OK
5521 I2C bus busy 2440 ADV7190 com OK
5522 I2C bus not working 2441 I2C ADV7190 com bus busy
5523 Scart switch controller not responding 2442 ADV7190 com transmit error
2443 No ack from ADV7190 com
5200 Test successful 2444 ADV7190 com response response
5201 I2C bus busy 2500 Video scart Low OK
5202 I2C bus not working 2501 I2C Scart Low bus busy
5300 Test successful 2502 Scart Low transmit error
5301 I2C bus busy 2520 Video scart Mid OK
5302 I2C bus not working 2521 I2C Scart Mid bua busy
5320 Test successful 2522 Scart Mid transmit error
5321 I2C bus busy 2540 Video scart High OK
5322 I2C bus not working 2541 I2C Scart High bus busy
2542 Scart High transmit error
4700 Number of times Tray went Open :XX 6100 Video colour RGB OK
4701 The total number of times tray went open 6120 Video colour YUV OK
could not be read from NVRAM.
4702 I2C bus busy before start 5.12.8 Furore Nuclei
4720 Total Power On time (minutes) : XX
4721 The total power-on time could not be read Error Error text
from NVRAM. code
4722 I2C bus busy before start 6300 Furore Sdram WRR_L OK
4740 Total CDDA & VCD disks Play-time (minutes) 6301 Furore Sdram WRR_L DB fail
: XX 6302 Furore Sdram WRR_L AB fail
4741 The playtime of CDDA & VCD disks could not 6303 Furore Sdram WRR_L DVC fail
be read from NVRAM.
6320 Furore Sdram WRR_H OK
4742 I2C bus busy before start
6321 Furore Sdram WRR_H DB fail
4760 Total DVD disks Play-time (minutes) : XX
6322 Furore Sdram WRR_H AB fail
4761 The playtime of DVD disks could not be read
6323 Furore Sdram WRR_H DVC fail
from NVRAM.
6400 Furore Sdram WRR_F_L OK
4762 I2C bus busy before start
6401 Furore Sdram WRR_F_L DB fail
6402 Furore Sdram WRR_F_L AB fail
4600 Version of Application Software : XX
6403 Furore Sdram WRR_F_L DVC fail
4601 The application version could not be read
from NVRAM. 6420 Furore Sdram WRR_F_H OK
4602 I2C bus busy before start 6421 Furore Sdram WRR_F_H DB fail
6422 Furore Sdram WRR_F_H AB fail
5.12.7 Video Nuclei 6423 Furore Sdram WRR_F_H DVC fail
6500 Furore ID OK
Error Error text 6501 Furore ID invalid
code 8300 Furore reset OK
1700 Video digital port OK 8301 Furore reset ID NOK
1701 Video digital port failed 8400 Furore High OK
1720 Pscan IO exp OK 8420 Furore Low OK
1721 Pscan IO exp com failed
2300 Video colourbar On OK
2301 Color Denc On transmit error
2302 I2C Color Denc On bus busy
2320 Video colourbar Off OK
2340 Video colourbar On NTSC OK
2400 ADV7300 com OK
2401 I2C ADV7300 com bus busy
2402 ADV7300 com transit error
2403 No ack from ADV7300 com
 Block Diagram SD-5.00SACH 6. 35

6. Block Diagram
Block Diagram



  
    




 
 










 
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CL 36532056_014.eps
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 Block Diagram SD-5.00SACH 6. 36

Testpoint Overview

F013 C2 F030 B10 F052 C12 F111 G7 F130 F6 F147 F7 F182 F7 F203 G5 F223 D3 F243 E2 F264 E2 F287 G3 F308 H3 F335 I3 F411 C4 F504 F12 F521 B8 F604 G10 F624 H7 F649 G7 F709 D1 F726 I6 F743 C6 F762 C5 F779 B6 F796 B5 F817 E8 F895 B6 F915 D11
F014 C2 F031 C10 F053 D12 F112 G5 F131 H6 F156 E6 F183 E6 F204 E5 F224 E2 F244 E2 F265 F2 F288 H3 F309 H3 F337 H2 F412 C3 F505 F12 F522 F10 F605 G10 F625 H8 F650 H7 F710 F1 F727 H7 F744 C6 F763 H6 F780 H13 F797 B6 F818 D10 F896 B5 F916 D12
F015 C10 F032 B10 F054 C12 F113 G5 F132 F5 F157 E6 F184 F7 F206 G5 F225 E2 F245 E2 F266 F2 F289 G3 F310 G1 F338 H1 F414 E9 F506 F12 F523 F10 F606 I7 F626 H8 F651 H7 F711 E1 F728 H6 F745 C5 F764 C4 F781 I1 F798 B6 F880 E12 F900 F13 F917 D12
F016 B10 F033 C9 F056 C12 F115 E7 F133 G5 F158 E6 F188 I8 F207 F5 F226 E5 F246 E2 F267 F2 F290 H3 F311 H2 F340 H1 F415 D12 F507 F13 F524 I11 F607 G10 F627 H8 F652 G7 F712 B4 F729 E9 F746 C5 F765 I7 F782 I4 F799 B5 F881 C6 F901 F13 F918 C11
F017 B11 F034 B9 F057 C12 F116 G5 F134 E6 F159 E6 F189 I8 F208 G3 F227 D5 F247 C2 F270 E5 F291 F3 F312 H4 F342 D5 F416 F11 F508 G12 F525 H10 F608 A11 F628 H10 F653 H7 F713 G6 F730 C5 F747 C3 F766 B6 F783 A8 F800 E9 F882 B7 F902 F13 F919 C11
F018 C10 F035 C9 F060 E13 F117 F7 F135 G6 F163 E7 F190 E7 F209 G2 F229 D6 F248 C3 F271 E5 F292 E5 F313 H3 F343 D5 F417 D9 F509 F13 F526 I12 F609 B10 F629 H10 F654 H7 F714 H10 F731 C5 F748 D5 F767 I7 F784 H7 F801 D10 F883 B6 F903 F13 F920 D11
F019 B10 F036 B11 F100 G5 F118 G6 F136 F7 F164 E7 F191 F5 F210 F5 F230 D5 F250 F2 F272 E5 F293 G4 F316 H4 F344 H2 F418 F11 F510 F12 F527 H12 F610 G7 F630 H10 F655 G10 F715 I4 F732 H10 F749 C5 F768 C6 F785 C7 F802 E9 F884 B6 F904 F13 F922 D10
F020 C10 F037 B11 F101 E5 F119 F6 F137 G5 F166 E6 F192 F5 F211 G5 F231 D5 F252 F1 F273 E2 F294 F7 F318 F2 F346 G2 F419 C9 F511 G12 F528 H12 F611 G6 F631 H10 F656 G10 F716 B7 F733 C5 F750 C5 F769 I7 F786 D7 F804 E8 F885 B6 F905 E13 F923 D10
F021 B10 F038 C11 F102 G6 F120 H5 F138 H5 F168 G5 F193 G6 F212 G5 F234 F3 F253 E1 F278 D5 F295 F3 F319 H8 F347 G3 F420 C9 F512 G12 F529 I11 F612 G7 F637 F7 F700 G6 F717 B7 F734 C5 F751 C5 F770 B5 F787 D7 F806 D9 F886 B6 F906 E13 F925 C11
F022 B11 F039 C11 F103 G6 F121 I8 F139 H5 F169 E6 F194 G6 F213 F5 F235 F3 F254 E1 F279 D5 F300 G1 F320 F2 F348 G1 F422 E12 F513 G13 F530 I10 F613 G6 F641 G7 F701 F6 F718 B7 F735 C6 F753 C5 F771 H7 F788 B6 F809 D9 F887 B4 F907 F13 F926 B13
F023 E7 F040 B11 F104 H5 F122 E7 F140 H7 F170 G5 F195 D9 F214 E5 F236 G4 F255 G2 F280 H4 F301 I2 F321 F2 F349 F1 F423 C10 F514 G12 F531 F11 F614 G7 F642 F7 F702 F6 F719 B7 F736 C6 F754 C5 F772 B5 F789 B5 F810 D9 F888 C3 F908 F8 F927 E7
F024 C10 F041 C11 F105 E6 F123 H5 F141 H5 F171 D4 F196 I8 F215 E5 F237 G4 F256 F2 F281 G4 F302 I3 F322 F2 F350 H4 F427 E10 F515 G11 F532 H9 F615 F7 F643 F7 F703 B6 F720 B7 F737 H10 F755 C6 F773 I7 F790 B5 F811 D9 F889 B6 F909 F8 F929 E10
F025 B10 F042 B9 F106 E7 F124 E7 F142 H7 F172 G7 F197 E7 F218 D6 F238 G5 F258 E2 F282 H4 F303 I2 F323 F2 F352 G2 F428 E10 F516 H12 F533 B9 F616 E8 F644 H6 F704 H6 F721 C7 F738 C6 F756 C6 F774 B5 F791 B5 F812 E9 F890 A8 F910 B13 F930 C11
F026 C10 F043 B11 F107 E5 F125 H5 F143 G5 F173 H6 F198 F7 F219 D6 F239 G5 F259 E2 F283 G4 F304 I3 F325 I3 F400 D11 F429 E12 F517 G12 F534 I9 F617 E8 F645 H6 F705 H6 F722 C4 F739 C6 F758 C6 F775 H7 F792 B5 F813 E8 F891 D7 F911 H7 F931 C10
F027 B10 F044 B9 F108 E5 F127 E7 F144 G7 F177 G7 F200 G4 F220 D5 F240 E2 F260 E2 F284 H4 F305 I2 F326 G1 F401 D11 F501 F12 F518 B8 F601 G10 F621 H7 F646 G6 F706 B5 F723 H10 F740 C6 F759 C6 F776 H13 F793 B5 F814 D9 F892 C2 F912 I8 F932 C11
F028 C10 F050 C12 F109 F7 F128 H5 F145 F6 F179 E7 F201 G4 F221 D5 F241 G5 F261 F2 F285 G4 F306 I3 F327 F3 F402 E12 F502 H10 F519 C9 F602 E8 F622 H8 F647 G7 F707 B4 F724 C4 F741 C6 F760 C4 F777 H13 F794 B5 F815 E8 F893 C2 F913 G12 F933 B13
F029 B10 F051 C12 F110 H4 F129 H6 F146 H5 F180 F7 F202 G5 F222 D5 F242 E1 F263 E1 F286 H3 F307 I2 F329 F1 F410 D4 F503 F12 F520 I11 F603 E8 F623 H5 F648 G7 F708 B6 F725 I6 F742 H13 F761 B4 F778 I7 F795 B5 F816 E8 F894 C3 F914 C13 F934 B13
F935 D11
T001 C2
T002 D2
T003 D2
T004 D2
T005 D2
T006 D2
T007 D3
T008 D3
T009 D3
T010 B2
T011 C3
T012 D3
T013 D3
T014 D3
T015 C2
T016 C2
T017 C3
T018 C3
T019 C2
T020 C1
T021 D3
T022 D3
T023 E3
T024 B1
T025 E2
T026 B1
T027 G5
T028 E2
T029 C3
T030 D2

CL 36532056_013.eps
3139 243 3076.2 240703
 Electrical Diagrams and PWB’s SD-5.00SACH 7. 37

7. Electrical Diagrams and PWB’s

Front-End Processor and Laser Supply
1100 G1 7105 D9
1 2 3 4 5 6 7 8 9 10 11 12 13 2100 A10 7106-A F12
2101 F4 7106-B G7
2102 B10 7107 H3
2103 F4 7108 I4
Front-end processor and laser supply 2104 B2
2105 B5
7109 B5
7110 H7
2106 B4 7111 H10
2107 B3 F100 A11
2108 C12 F101 B11
2109 C11 F102 B11
A A

M1-23
2110 F6 F103 B11

DVD_R
M2-22
2.5V DVD-R 2112 D11 F104 C12
+5VSA F100
HFN M2-20 2113 D7 F105 B2

RFN1
2114 E12 F106 D3
2100
* 3149 2115 F5 F107 D12
F171
+5VSA 47p 1R 2116 E12 F108 D12

3102

22K
3105 F101
HFP 2117 F8 F109 D3

3107
M2-19

82R
3101
3100

3103
2118 G11 F110 D12
56K

1K
2133 82R 3150
1K
2147 3104
* F102
2119 G10
2120 G9
F111 F3
F112 D12
100n F135 1R VCOM
F156 M2-18
7101-A AGNDS 2121 G6 F113 D12
8 12K 100n
6 7100-A 3 AGNDS 10n AGNDS 1% 2122 F3 F115 E3
B F105 2104
2V 2 6100
MC34072 F170
B 2123 E3 F116 B10

F116

F118
BC847BPN 2105 3106 2131 2102
BAS316 1 2V5
2106 2124 I2 F117 E3
100n
1 2V5 AGNDS RFP1 M1-24
F157
2107 2 1u 220R AGNDS 100n 2125 F4 F118 B10
1V5 0V7
F158 68n F103 5100 2126 F4 F119 F3
4 7109
1u 3108 7103
+5VSA 2127 F5 F120 C11
F159 2V5 AGNDS BST82 BLM11
BC847B 2128 F5 F121 F12

0
BAS316
2K2 F168 AGNDS
6101
0V 2129 G7 F122 E3
3112 2V5 3113
220R
3110

3111

100n

2109

100n

2108
68K

F163 2131 B8 F123 D11

1V6 2134

0V8 2135
4 10K F164 33K 2132 G10 F124 E3
7100-B 1K8 AGNDS 2133 B5 F125 D11
F166

2V

1V2

4V8
4V8

1V2

4V8
+12V

0V

0V
5 BC847BPN 0V5 2134 C10 F127 F3
3114 AGNDS AGNDS
C AGNDS F169
3
0V4
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
C 2135 C10
2137 H8
F128 D11
F129 D11
2139 D2 F130 G2
3116

1K

2140 H7 F131 D11

390R
3117

PLACE CLOSE TO IGUANA 2141 H10 F132 G2

1 48 0V8 F120 3118 F104 2142 I8 F133 G2
2V5 OA M2-17
AGNDS 2143 I11 F134 G2
2 47 0V8 F123 3119 10K F107 2144 I8 F135 B9
OB M2-16
2145 I12 F136 F9
3 46 0V8 F125 10K 3120 F108
OC M2-15 2146 I4 F137 F9
2139 4 45 0V8 F128 3121 10K F110 2147 B6 F138 F9
OD M2-14 3100 B2 F139 F10
D 24
220n AGNDS 5 44 4V8 100n 10K D 3101 B3 F140 F10
23 3102 B4 F141 F10
LD-DVD F106 4104 2V5 6 43 2112
3103 B6 F142 F10
TO/FROM LOADER OPU

22 F109 7 42 F129 AGNDS 3123 F112 3104 B8 F143 F10

PD-DVD 2V5 0V8 S1 M2-13 3105 B10 F144 G11
21 F179 2113 8 41 F131 F113
3122 91R 4V8 7105
0V8
3125 10K S2 M2-12 3106 B6 F145 F3
AGNDS 3107 B10 F146 F13
20 F197 9 40
3124
1% 2R2 100n 0V
10K
3108 B4 F147 F3
+5VSA
19
220n 2123 AGNDS 0V 10 TZA1033HL 39
0V
F172 3110 C2 F156 B3
3111 C3 F157 B2
18 AGNDS
11
DVDALAS2PLUS 38 F173 3112 C4 F158 B3
0V
3113 C5 F159 B3
E 17 E F115 3142 F182
2V5
12 37 E 3114 C6 F163 C4

2116

2114
3116 C3 F164 C4

82p

82p
16 F F117 0R 3143 F183 13 36 2V5
2V5
2.5V 3117 C4 F166 C3
15 D F122 3144 0R F184
2V5
14 35 * * 3118 C12 F168 B6
14 3119 D12 F169 C4
C F124 0R 3145 15 34
2V5 3120 D12 F170 B6
13 B F127 3146 0R 16 33 F177 3121 D12 F171 A6
F198 2V5 1V2 AGNDS
3122 D3 F172 E11
12 LD-CD F145 0R * OPTION 3123 D12 F173 E11
3124 E3 F177 F11

3126

2117
22R

22n
11 Ax F119 3147
+5VSA 3125 D12 F179 D3
F 10 PD-CD F147 0R AGNDS 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
F 3126 F7
3127 G9
F180 F3
F182 E4
9 F111

3V3
3128 G11 F183 E4

3V3

4V8
7106-A

0V

0V

0V

0V

0V
F121 3 8
8 4100 MC34072 3129 G10 F184 E4
0R 0V 3130 G6 F188 H5
1 F146

F136

F137

F138

F139

F140

F141

F142

F143
+3V3SA CALF M2-11
2122

100n

2101

2125

2103

2126

2127

2128

2115

2110

3131 G6 F189 H4
4n7

15p

15p

15p

15p

4n7

7 AGNDS
1n

1n

F180 +5VSA 0V2

3132 91R 3132 G3 F190 H2
AGNDS 2

F144
6
1%
AGNDS
* * * * 2129 3127
4
3133 H4
3134 I4
F191 H7
F192 I7

2118
3130

18p
2K2

5 RAD- F132 100n 10K AGNDS

3136 H3 F193 H10

BLM11
RAD-
AGNDS AGNDS AGNDS AGNDS AGNDS AGNDS AGNDS AGNDS AGNDS

220R

470K
3129

3128
7106-B

2132

100n

100n

2119

5101
4
FOC+ F130 8 3138 I5 F194 I11
FOC+ AGNDS 2V5 5 MC34072

BLM11
F196 3142 E3 F195 I12
G G

5102

2120

100n
3
FOC- F134
HEAVYFINGER PRINT 3143 E3 F196 G6

STDBY_DALAS
FOC- 7
2.5V 3144 E3 F197 E3
3131

2121
6K8

22n

2
RAD+ F133 2V5 6 3145 E3 F198 F7

+5VSA
RAD+
1 4 AGNDS AGNDS AGNDS 3146 F3
+3V3SA AGNDS
To Diagram
1100 3147 F3

SIDA

COO
SICL

SILD
AGNDS
AGNDS AGNDS 3149 A11
2137
3150 B11
3152 H7
100n

M2-10
3153 H8

M2-6
M2-7

M2-8

M2-9
+12V
AGNDS 3154 H10
3155 H11
+5VSA 3136 LAS_SW 3156 I8
H M2-5
H
M1-23

M1-24

M8-25
100K
3157 I12
3152 3153 3154 3155 3158 I7
RFN1

RFP1
7102 +5VSA +5VSA +5VSA +5VSA 3159 I7

RFP
7107 12V F189 3133
4103

12V 3V3 7110 7111

* L78L05ACD
BC807-25 4K7
F188 22K
BFS20
22R 22K
BFS20
22R 3160 I10
VOL-DVD 3161 I11
F190 1 8 3162 2140 F191 3163 2141 F193
2146

3162 H6
1n

VOUT VIN
0V 0V BC817-25 3V 3V 3163 H10
100R 680p F192 2142 3156 100R 680p F194 2143 3157 F195
GND 7108 4100 F12
2V3 2V3
6n8 100R 6n8 100R 4103 H2
*
2124

100n

3138
3134

10K
4K7

7 6 3 2
4104 D3
820R

820R
3158

3159

3160

3161
2144

2145
39K

39K
8p2

8p2
AGNDS 5100 B12
I I 5101 G11
5102 G9
AGNDS +3V3SA +3V3SA
* OPTION AGNDS 6100 B3
AGNDS AGNDS AGNDS AGNDS AGNDS AGNDS 6101 C3
V vtg measured in STOP MODE
7100-A B3
7100-B C4
7101-A B5
CL 36532056_001.eps 7102 H3
3139 243 3076.2 240703 7103 B6

1 2 3 4 5 6 7 8 9 10 11 12 13
 Electrical Diagrams and PWB’s SD-5.00SACH 7. 38

Front-End Processor Iguana

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 1200 A3 3289 M15
1201 G3 3290 M15
2200 B12 3291 M15
2201 B12 3293 M24

M2-76,M6-76
M6-71,M8-71
M6-70,M8-70
M6-69,M8-69
M2-53

M2-68

M6-54

M2-53
2202 B13 3294 P9
+3V3SD
A A 2203 B13 4200 N9
Decoupling Cap For 7200
* 1200 3200
* 3201 2204 C12 4201 P11

M8-76,
Front-end 9
CFLAG M2-61 22K
* 3203 22K 3204
(SAA7812HL IGUANA) 2205 C12 4203 C23

RSTN

# RES_P

# RES_U
8 2206 F14 4204 D14
Processor * 3206 2207 C13 4205 D13

FOR DEBUGGING
3205 22K 22K F250 3207

2201

2202

100n
2203

100n
2200

100n
3V3

100n
7 7200 2208 C13 5200 D5

RES_P

BE_BCLK
BE_WCLK

CL1
BE_FLAG
BE_FLAG M2-76

BE_DATA
B IGUANA 6
M2-60
22K
* 3208 22K 3209 NCP301LSN45T 1 1K
B
2209 C14
2210 E14
5201 D5
5202 G2

3202
MEAS1 RESET_
* 3211

1K
3210 22K 22K 2 5 +3V3SD 2211 E14 5203 H19
5 +5VSD IN
CL0 M2-46 2212 C15 5204 H19
4
CL1 M2-68
22K 3212 22K
* 3213 GND
NC 3214
2213 C15 7101-B M23
3 4
3 * 3215 22K 3216 22K 4K7 2214 C16
2215 D3
7200 B19
7201 C21

2204

100n
2205

100n

2207

100n
2208

100n
2209

100n

2212

100n
2213

100n
2214

100n
DEB M2-57 22K
* 3217 22K 3218 7201

F203
F202
F200
F201

3219

4203
2216 E22 7202-A E22

4K7
3V

0R
2 F264 BC857B
C MON_D M2-58 C 2217 E3 7202-B D24
1
MON_A M2-59
* 3221 22K 3222 22K +5VSD
0V
2218 E23 7203-A D18
22K 3223 22K
* 3224
3226 F267
2219 G3 7203-B E20

F265
2220 G3 7204 D20
3227 22K
* 3228 22K F293

1 3229-A 8
7
6
5
+3V3SD +3V3SD

3225
2221 I20 7207 I9

1K
RES ARRAY
+5VSD 1K
2222 J15 7208 I19

2
22K 22K

3233

3234
XDD(15)
XDD(14)
XDD(13)
XDD(12)
XDD(11)
XDD(10)
XDD(9)
XDD(8)
XDD(7)
XDD(6)
XDD(5)

2K7

4K7
F295 2223 M14 7209 M22
D 4205
* 4204 3V3 D

100R
BLM11
* 3235 2224 M14 F200 C6

2
3
4
5200 F260 4

3236
6

5201

4K7
3237 F261 7202-B

F252

F263
BLM11 2 7203-A 7204 3V3 2225 M16 F201 C6

F280
F281
F282
F283
F284
F285
F286
F287
F288
F289
F290
2215 47R 100n BC847BPN

6
F237 BC847BS BC847B 5 2226 M16 F202 C6
7202-A 1K
1 3 2227 N2 F203 C6
100n 2211

560R
3238
F208 3V3 BC847BPN
F209 3239 0V 2228 N2 F204 I5
M3-26 VDRIVE 3V3 100n F266
3 2229 N3 F206 E4

2216

1u
202 0V8 F238
2217 F253 3240 F254 220K
E E 2230 N4 F207 G5

F236
7203-B

3V3
3V3

3V3

3V3

3V3
F239 2210

0V
0V
0V
0V

0V

0V

3241
0V BC847BS 2231 N4 F208 E5

1K
5

201 1V6
100n 470R

200 3V
F241 3V3 100n 4 2232 N4 F209 E5
F206 22K
M3-73 MOTO1 0V8

208
207
206
205
204
203

199
198
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
159
158
157
2218 2233 N22 F210 F5
M3-51

F242
3242 2206 DRIVEMUTE
2234 P2 F211 F5

BCA
POR_NEG
TEST10
TEST9
TEST8

BCLK_SCKI
WCLK_WSI
VSS3C4
VDD3C4
MCK
IECO_CL1
VDD3P8
VSS3P8
XDD15
XDD14
XDD13
XDD12
XDD11
XDD10
XDD9
XDD8
XDD7
XDD6
XDD5
XDD4
XDD3
XDD2
XDD1
XDD0
VSS3P7

XWR
XCAS_LO
XCAS_HI
XRAS
VSS3C3
VDD3C3

VSS3P6
VDD3P6
FLAG

XDA10

XDA9
XDA8
XDA7
XDA6
XDA5
XDA4
XDA3
XDA2
XDA1
XDA0
MOTO1

DATA_SDI
1u 2235 P3 F212 F5

820R
3243

3244

33R
F235 3245 F255 2236 P3 F213 G5
F 3V3 1
VDD3P1 DASP
156 0V BE_V4 M6-55 F 2237 P4 F214 L5
2 155
M3-27 F210 VSS3P1 CS1 100R 2238 P4 F215 K5
T1 4V8 3 T1 CS0
154
M3-28 T2 F211 4V8 4 T2 153 2239 I3 F218 N6
VSS5P1
M3-29 T3 F212 4V8 5 T3 152 2240 L24 F219 O6
VDD5P1
+3V3SA
2219
6
7
DAC_RP DA2_GRD
151
150
*OPTION 2241 N24
3200 A7
F220 O6
F221 O6
22p F213 DAC_RN DA0 F234 3246 F256
8 149 BE_SYNC M6-56
AT-41CD2

0V
8M4672

G DAC_VPOS PDIAG
G 3201 A10 F222 O6
1201

9 148
DAC_VNEG DA1_GWR 100R T001 GNDZ UDA(0) T002 3202 B20 F223 O10
10 147
DAC_LP IOCS16
11 146 3203 A8 F224 K14
BLM11

2220 3247 F207 DAC_LN INTRQ F291 T003 UDA(1) UDA(2) T004
5202

12 145 IDMACK 3204 A10 F225 K14

TEST1 DMACK_GRQ
13 144
22p 330R TEST2 IORDY T005 UDA(3) UDA(4) T006 3205 B7 F226 J5
1V6 14 143
1V6 15
CRIN DIOR
142 +5VSD +3V3SD 3206 B10 F227 K5
AGNDS CROUT DIOW T007 UDA(5) UDA(6) T008 3207 B20 F229 N3
3V3 16 141
VDDA1 DMARQ_GACK
H 17
VSSA1 VSS5P2
140
T009 UDA(7) GNDZ T010
H 3208 B8 F230 O3
M1-20 HFN 1V6 18
HFIN_DN VDD5P2
139 3209 B10 F231 O3
M1-19 HFP 0V8 19
HFIN_DP DD15
138 T011 3210 B7 F234 G15

BLM11
UA(8) UA(9) T012

BLM11
* 3284

5203

5204
0R 1V2 20 137
M1-18 VCOM 1V2 21
HFIN_SE DD0
136 3211 B10 F235 F15
VCOM DD14 T013 UA(10) UA(11) T014 3212 B8 F236 E7
*
2239 100n
3250 F204
1V2 22
23
IREF
WREFLO
DD1
DD13
135
134 *RES ARRAY F247 * 2221 T015 UA(12) +3V3SD T016
3213 B10 F237 D7
1% 24K 24 133 3214 B21 F238 E7
TEST3 DD2 2 3252-B 7
I 25
VSSA2 DD12
132 3V DEB M2-57 T017 UA(13) UA(14) T018
I 3215 C7 F239 E6
AGNDS 3V3 26 131 100n
27
VDDA2 7207 DD3
130 3 6 MON_A 7208 3216 C10 F240 K15
M3-30 SINPHI 2V6
SIN_PHI DD11 3V M2-59 T019 UA(15) GNDZ T020 3217 C8 F241 E5

3251
M3-31 32 M29F002
28
SAA7812HL 129

10K
COSPHI 1V6
COS_PHI DD4 4 5 12
29 128 3V MON_D M2-58 3218 C10 F242 F20

VCC
TEST4 DD10 A0 T021 PSEN_P PSEN_U T022
30 127 UA(0) 3219 C22 F243 K15
31
XDET
ACT_EMFP IGUANA DD5
DD9
126 0V5
47R
MEAS1 M2-60
A1
11
T023 RD_P RD_U T024 3221 C7 F244 K15
150R

UA(1)
3255

32 125
J 33
ACT_EMFN DD6
124
3256
CFLAG 10 J 3222 C10 F245 K14
TEST5 DD8 0V5 M2-61 A2 T025 WR_P WR_U T026
34 123 13 UA(2) 3223 C8 F246 K14
M1-11 CALF AGNDS 0V
F226 1V
35
TEST6
TEST7
DD7
VSS5P3
122
100R
RES ARRAY
2222
* UDA(0)
14
DQ0
A3
9
UA(3)
T027 RES_P RES_U T028
3224 C10 F247 I18
36 121 3225 D20 F248 P18
UOPB VDD5P3 3257-D 47R 10p UDA(1) DQ1 8
M2-32 UOPT F215 2V7 37
UOPT HRESET
120 3V2 RSTN M6-54 T029 GNDZ ALE T030 3226 C22 F250 B19
5 4 15 A4 UA(4)
M2-33 ALPHA0 F227 0V 38 119 3V2 F225 F258 TXD_S2B M6-62
39
ALPHA0 P3_0_RXD1
118 6 3 F259 RXD_S2B UDA(2) DQ2 7 3227 D7 F252 D17
F270 VSSA3 P3_1_TXD1 3V2 F224 M6-63 A5
3V3 40 117 3V2 F240 LAS_SW M1-5 17 UA(5) 3228 D10 F253 E18
VDDA3 P3_2_INT0 DQ3
K M1-17 OA 0V8 41
D1 P3_3_INT1
116 0V8 SCRATCH M2-20 UDA(3)
A6
6
ICE Interface K 3229-A D6 F254 E19
M1-16 OB 0V8 42 115 18 UA(6) 3233 D17 F255 F16
D2_TLN VSS3P5 UDA(4) DQ4 5
M1-14 OD 0V8 43
D3_REN VDD3P5
114
3234 D20 F256 G16
7 2 F243 19 A7 UA(7)
M1-15 OC 0V8 44 113 0V F245 SUR_S2B M6-64
45
D4_FEN P3_4_RXD2
112 F246 8 1 F244 CPR_S2B UDA(5) DQ5 27 3235 D7 F258 K15
M1-12 S1 0V8 S1_MIRN P3_5_TXD2
0V M6-65 A8
M1-13 S2 46 111 # WR_P 20 UA(8) +5VSA 3236 D21 F259 K15
F214
0V8 S2 P3_6_WRN 3V3
DQ6 26
SCRATCH
0V8 47 110 3V3 # RD_P UDA(6) 3237 D23 F260 D21
VRIN P3_7_RDN A9
48
FTCH UDA7
109 UDA(7) 21 UA(9) DETECTOR 3238 E17 F261 D23
DQ7 3262 3261
L M2-36 DEFD 3V2 49
P5_7_DEFO_N UDA6
108 UDA(6) UDA(7)
A10
23
OPTION L 3239 E23 F263 D20
3V2 50 107 UDA(5) UA(10)
3287 0R 3V3 51
P5_6_DEFI_N UDA5
106 25 1K 2K7 3240 E19 F264 C20
M3-34
P4_7_PXT2EN

TRAY1
DSDEN_SRST

P5_5_TL UDA4 UDA(4)

A11 3241 E24 F265 D21
EAN_WAITN

UA(11)

2240

100n
M3-35 TRAY2 3V3 52 105
P4_6_PXT2
P4_5_PXT0

PSENN_CS

UDA(3)
ALE_ASTB
P5_2_CLO

P5_4_RP_FOK UDA3
P5_1_SDA

AGNDS
P5_3_CE1

P5_0_SCL

P4_4_PXT

UA7_P1_7
UA6_P1_6
UA5_P1_5
UA4_P1_4
UA3_P1_3
UA2_P1_2
UA1_P1_1
UA0_P1_0
REF_COS

P4_3_A19
P4_2_A18
P4_1_A17
P4_0_A16

1 4 3242 F4 F266 E24

RAC_SW
REF_SIN

F271
VDD3C1

VDD3C2
VDD3P2

VDD3P3

VDD3P4
VSS3C1

VSS3C2
VSS3P2

VSS3P3

VSS3P4

10K

10K

10K

10K
RP_NC A12
SCCLK

UA(12) 3243 F19 F267 C22

UDA0
UDA1
UDA2

100p

100p

100p

100p
UA15
UA14
UA13
UA12
UA11
UA10

28 +5VSA
UA9
UA8

3244 F20 F270 K4

RA

FO
SL

24 A13 UA(13)
M G_ 29 AGNDS M 3245 F15 F271 L22

2225

2226
53
3V3 54
3V3 55
1V5 56
1V5 57
1V5 58
59
1V6 60
1V6 61
62
63
3V3 64
3V3 65
0V 66
0V 67
68
69
0V 70
0V 71
3V3 72
73
74
75
76
77
78
79
80
81
82
83
0V3 84
85
1V6 86
1V6 87
1V 88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104

2223

2224
22 A14 UA(14) 3246 G15 F272 M21
M2-37 WEB 3V3 7101-B

3290

3289

3288

3291
E_ 3 5 3247 G4 F273 M24
3V3 F272 8
31 A15 UA(15) 7209 1V8 MC34072
M3-38 STDBY_MOTOR 0V 3V3
W_ 3293
F273 M2-20 3250 I4 F278 N6
2 7
47R

F278 +3V3SD BC847B SCRATCH 3251 I18 F279 N6

A16 UA(16) 4V4
F292 1K 3252-B I15 F280 D8
2232

220n

3272

VSS
30 6
100n

2227

2228

100n

100n

2229

100n

2230
100n

2231

3263
10K

10K

F279 A17 3255 J2 F281 D8

3283

UA(17)

2241

100n
1V8 4
N UDA(2) 16 N 3256 J14 F282 D8
AGNDS

560R
4200

3266

3265

2233

220n
* 3257-D K15 F283 D8

10K
UDA(1)
0R

UDA(0) 3261 L23 F284 D9

AGNDS AGNDS AGNDS AGNDS AGNDS AGNDS
M3-39 RA
F229 3267 F218
* 3262 L22 F285 D9
UA(17)
UA(16)
UA(15)
UA(14)
UA(13)
UA(12)
UA(11)
UA(10)

AGNDS AGNDS 3263 N5 F286 D9

UA(9)
UA(8)

UA(7)
UA(6)
UA(5)
UA(4)
UA(3)
UA(2)
UA(1)
UA(0)

F230 3K9 3268 F219

M3-40 SL 3265 N21 F287 D9
F231 3270 2K7 F220 3266 N20 F288 D9
O M3-41 FO O
STDBY_DALAS

F223 3274 AFTER PROTOTYPE CHECK S’WARE 3267 N5 F289 D9

3K9 3271 F221 +3V3SD 3268 O5 F290 D9
M3-42 REFSIN
TRAYSW

10K 3270 O5 F291 G15

DVD_R

3273 10K F222 3279

3277

3278

REFCOS 3271 O5 F292 N22

SIDA
COO

47R

M3-43
10K
SILD
SICL

F248
10K 4K7 10K
3272 N5 F293 D23
4201
3273 O5 F294 P10
2234

2235

2236

2237

100n
2238

100n
1n8

33n

1n8

3275 3294 3274 O11 F295 D14

PSEN_U
P P
#

PSEN_U #

4K7 F294 0R

DEFD
PSEN_P

3275 P7 T001 G22

WEB
+3V3SD
ALE #

47R
3277 P10 T002 G24
EANF

CL0

3280
* OPTION 4K7 3278 P10 T003 G22
3279 O11 T004 G24
# Connection to ICE Interface 3282 3280 P7 T005 H22
M1-19
M1-22

M3-44
M1-10

M6-45

M2-46

M2-49

M2-37
M2-49

M2-36
M1-8
M1-7
M1-6

V DC vtg measured in Stop-Mode 3282 Q7 T006 H24

Q Q 3283 N10 T007 H22
3284 H4 T008 H24
CL 36532056_002.eps 3287 L5 T009 H22
3139 243 3076.2 240703
3288 M15 T010 H24

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
 Electrical Diagrams and PWB’s SD-5.00SACH 7. 39

Front-End Loader Interface

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 1300 A2
1301 F2
1302 I1
+5VSD
* 2317 * 2318 * 2319 2300 A11

Front-end Loader Interface 100n 100n 100n 7300

25
2300
MGND
+9V +12V 2301 B14
2302 D14
2303 D13
BA6665FM 100n F325
11V5 2304 D5
A MGND MGND MGND * 3338 0R A
DISC MOTOR CONTROL
1300 28 2305 E9
F301 VCC RNF

6302
A3 2V4 3 A3 2306 F9

S1D
1206

3300

3301

3302

3346
DRIVER VM2 27 2307 K12

0805 1R

0805 1R

0805 1R

0805 1R
1 F302
A2 2V4 5 A2 2308 K3
TO / /FROM LOADER

2 F303
A1 2V4 7 A1 GAIN NC6 26 11V5
* 6300 6301
2309 K4
2310 K4
2311 K14
3 F304 CONTROL F335
H1- 1 NC1 S1D S1D 2312 F4
B + - B 2313 H2

2301

100n
4 F305 2314 I5
H2- 2 NC2 +
REV 24 2315 F14
-
5 F306 REV MGND 2316 F15
H1+ MGND 2317 A6
F307 2V4 9 H1+
F308
6 3304 PS 23 0V STDBY_MOTOR 2318 A7
+ M2-38
MGND 10 H1- PS 2319 A8
F309
- F350 2320 F13
7
H2+ 82R 2V4 EC 22 1V6 4301 MOTO1 M2-73
C 4 NC3 + C 2321 D5
8 F311
H3+
6 NC4
+
-
- ECR 21 1V6 F312
* 3305 VDRIVE M2-26
2322 G8
2323 H8
9 F313 CNF 20 0V F316 100K 1% 4K7 1% 3300 A13
H3- 3301 A13
2V4 11 H2+

2302

100n

3307

4K7
10 F344 3308 3306 3309 3302 A14
+5VSA 3310 F348 M2-43 + 100n +3V3SA 3304 C3
11 REFCOS 2V4 12 H2- - VH 19 3305 C15
82R H BIAS 4K7 1% 3306 D13
D 27K 2321 47u FG1 18 4V8 2303 MGND T1 M2-27 D 3307 D14
+5VSA 15 NC5 + 3308 D2
2304
- 3309 D15

3332

3333

3334
FG2 17 4V8 M2-28 3310 D4

6K8

6K8

6K8
T2
7301-B 2V4 13 H3+ 3312 F4
100n AGNDS
1V6 5 8 + FG3 16 4V8 T3 M2-29 3313 G4
LM833D 3315 G13
2V4 14 H3- -
7 COSPHI +9V +12V 3316 G13
E GND MT1 MT2 E
1V6 F346 M2-31 3317 H13
1V6 6 MGND MGND MGND 8 29 30 * 3339 0R 3319 I4
3321 K13
4 1206
2305 100n 3322 I15
AGNDS 7305 3323 I4
MGND
* 2312 L78M09 3324 I14
SLEDGE MOTOR CTRL

F329 3325 J15

2306 100n 9V
3312 22p 3326 J14
OUT GND IN
TO / /FROM LOADER

1301
F F 3327 J14

3342

0R
8 F327 100K 3328 K15
SL-

2320

2315

100n

2316

100n
47u
3332 D6
MGND
7 F326 3333 D7
SL+ 7303
3334 D7
BA5938FM 21 10 22 MGND
6 3313 F349 3336 J15
REFSIN M2-42 MGND MGND MGND

VCC3

VCC2

VCC1
3337 J15
VOL- 3315 4304
5 4V4 1 X2
VO4- 27 4V4 RAD- M1-2 3338 A15
F323 MGND 27K +5VSA X2
3339 E14
G
4 F322
* 2322 2R2
0805
G 3340 H13
3341 H8
7301-A 100n 3316 4303
3 4V4 2 VOL+
X2
VO4+ 26 4V4 RAD+ M1-3 3342 F11
F321 X2
1V6 3 8 LM833D 3343 H14
2 F320 1 F347
M2-30
MGND
* 2323 2R2
0805
3344 H15
3345 K5
SINPHI 3340 3343
100n VIN5 25 1V6 3346 A14
1 F319 2V6 3341 F300
1V6 2 M2-40 SL 1V6 3 VIN1 4301 C13
H +3V3SA 15K 1R H 4303 G15
4
AGNDS 2K7
- + + - VIN4 24 1V6 * 3317
RA M2-39 4304 G15
5300 J3
2313

100n

4 VIN2 BIAS 23
F352 27K
* 3344 VDRIVE M2-26 5301 J3
* 2314 F310 MUTE
+ 1V6
470R 1%
5302 J3
6300 B15
M2-51 DRIVERMUTE 0V 7 MUTE - 6301 B15
3319 22p
TO / /FROM LOADER

5 NC1 3322 6302 A16

I AGNDS 100K +3V3SA I 7300 A9
10K
6 NC2 VOLTAGE + - 470R 1% 7301-A G4
1302
+3V3SD 7301-B E4
TRAY MOTOR

(SINGLE_DISC) CONTROL 7303 F9

1 3323 9 NC3 VIN3 20 3324
1V6 FO M2-41 7305 F14
F337 MGND 1 5300 2 15K 3325 F300 H8
2 TRAYSW 11 NC5 VREF 19 F318
M2-44 5V +9V F301 A2
F338 5301 F302 A2
3 TRAY+ 1 2 VO2+ 3326 3336 12K
4V4 12 VO3+ 18 4V4 FOC+ M1-1 F303 B2
J X2 X2 J F304 B2
F340 5302 LOGIC 2R2 0R
4 TRAY- 1 2
0805 0805 F305 B2
TRAY F306 B2
VO2- 3327 3337
4V4 13 VO3- 17 4V4 FOC- M1-4 F307 C2
GND1

GND2
X2 X2
FWD
REV
3345

F308 C12
2308

220p

2309

220p

2310

220p

3K3

1%
MT GND3 2R2 0R F309 C2
0805 0805
*

3321

3328
F310 I8
* * *

2307

100n

100n

2311

15K
DISC TYPE 3345 3323 15 16 8 14 29 30 28
F311 C2

470R
TRAY2 3V3
F342
TRAY1 F343
3V3

K K
MT1

MT2
F312 C12
MGND MGND MGND MGND SINGLE DISC F313 C2
F316 C12
* OPTION 5-DISC CHANGER MGND MGND MGND CL 36532056_003.eps F318 J14
240703 F319 H2
3139 243 3076.2 V vtg measured in STOP MODE F320 H2

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
 Electrical Diagrams and PWB’s SD-5.00SACH 7. 40

Memory
1400 I13
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 2400 A11
2401 A13

MEMORY TO +5V +3V3D

2402 B9
2403 B11
2405 B4
2408 B16
2410 E17
A A 2411 G17
VCC_DRAM 2412 F15

4400

4401
0R 0R 2413 I16
2414 I17

+3V3M1
F400 2405 +3V3M1
2402

100n
100n

100n
2400

2403
100n 2401
* 2408
F410
2415 I11
2417 J14
2418 K16
100n 3401 H1
B 7402 7403 7400 100n
B 3402 H16
M24C64 8 3403 H6
Am29LV160B 37 Am29LV160B 37 3404 H15
1
A1 25
VCC
29 D0 A1 25
VCC
29 D0
7401 1M X 16 VCC E0
3405 H15
3406 J12
A0 DQ0 A0 DQ0 GM71V18163CJ 21 6 1 2 3407 I14
24 31 24 31 2 17 E1
A2 D1 A2 D1 D0 A1 3409 J2

VCC3

VCC2

VCC1
A1 DQ1 A1 DQ1 I|O0 A0 F411 5 3
M6-86 SDA SDA E2
3411 J14
23 33 23 33 D1 3 18 3412 J11
C A3 A2 DQ2 D2 A3 A2 DQ2 D2 I|O1 A1 A2 3V2
6
C
3413 I15
22 35 22 35 4 19 SCL 3414 K16
A4 D3 A4 D3 D2 A2 A3
A3 DQ3 A3 DQ3 I|O2 7 4400 A16
21 38 21 38 5 20 VSS WC_ 4401 A16
A5 D4 A5 D4 D3 A3 A4
A4 DQ4 A4 DQ4 I|O3 4405 K3
4 5401 E17
A6 20 40 D5 A6 20 40 D5 D4 7 23 A5
A5 DQ5 A5 DQ5 I|O4 A4 5402 F17
19 42 19 42 D5 8 24 M6-87 5403 E14
D A7 A6 DQ6
D6 A7 A6 DQ6
D6 A5 A6 SCL 3V2 D 6400 I13
I|O5
25 F412 7400 B15
A8 18 44 D7 A8 18 44 D7 D6 9 A7
A7 DQ7 A7 DQ7 I|O6 A6 7401 B11
26 7402 B3
A9 8 30 D8 A9 8 30 D8 D7 10 A8
A8 DQ8 A8 DQ8 I|O7 A7 7403 B7
+3V3 7404 I16
A10 7 32 D9 A10 7 32 D9 D8 33 27 A9
A9 DQ9 A9 DQ9 I|O8 A8 5401 F416 7405 I14
+3V3M1 7406-A J3
6 34 6 34 D9 34 28
E A11 A10 DQ10
D10 A11 A10 DQ10
D10 I|O9 A9 A10 100MHZ E 7406-B J8
BLM311 7406-C J5
5 36 5 36 D10 35 16

2410

100u
A12 A11 DQ11 D11 A12 A11 DQ11 D11 I|O10 A10 5403 F418 7406-D J6
+3V3 VCC_DRAM 7409 J12
A13 4 39 D12 A13 4 39 D12 D11 36 15 7412 K14
A12 DQ12 A12 DQ12 I|O11 A11 100MHZ
BLM311 7413 J16
3 41 3 41 D12 38

2412

100u
A14 D13 A14 D13 F400 B4
A13 DQ13 A13 DQ13 I|O12 F401 H3
2 43 2 43 D13 39 11 F402 H3
F A15 A14 DQ14 D14 A15 A14 DQ14 D14 I|O13 5402 F417 F
F410 B16
1 45 1 45 D14 40 12 3V2 VCC_LVC00 F411 C15
A16 A15 DQ15|A-1 D15 A16 A15 DQ15|A-1 D15 I|O14 100MHZ
BLM311 F412 D17
48 48 D15 41 32 F413 H11

2411

100u
A17 A16 F428 A17 A16 F429 I|O15 NC3
15 15 F414 K6
17 RY|BY_ 17 RY|BY_ 14 F415 H7
A18 A17 A18 A17 RAS0ND RAS_
+3V3ST F416 E17
16 16 31 F417 F17
G A19 A18 A19 A18 CAS0ND
LCAS_ G F418 E15
A20 9 9 30 F419 I11
A19
A20 A19
CAS1ND
UCAS_ F420 I13
+3V3ST
F422 H17

3405
10 F415 10 A21 13

2K2
NC2 A21 NC2 RWN F423 J16
F401 26 WE_
M4-146 CE_ROM1N 3V M4-147 CE_ROM2N 3V 26 F427 K2
CE_ 13 CE_ 13 29
NC3 NC3 OEND 3404 F428 G5
F402 28 OE_
M6-79 FLASH_OEN 0V M6-79 FLASH_OEN 0V 28 0V F429 G9
OE_ OE_

100K
3402
14 14
H 3401 10K NC4 NC4 RAS1ND
F413 22K H
3V2 11 M6 RWN 3V2 11 42 37 22
WE_ WE_
F422 M6-78,
12 12 3V2 RESETn M8-78
RESET_ 3403 10K RESET_
1400 7404
M6 RWN 47
BYTE_
47
BYTE_ SDM OPTION SIN-01T-1.2 BC847B

2413

100n

2414

100n
VSS1 VSS2 VSS1 VSS2 7405

1
+3V3ST 3413
I +3V3M1 27 46

+3V3M1
27 46
6400 3407 0V6
BC847B
0V
22K * I

VCC_LVC00
2415 F419 BAS316 F420 10K
VCC_LVC00 VCC_LVC00 +3V3ST 7413 2V5

3411
3406

22K

22K
VCC_LVC00 VCC_LVC00 1u BC857B
3409

3412
3V
10K

4K7
7406-A 7406-C 7406-D 7406-B 10u
J 14 74LVC00APW 74LVC00APW 3V 74LVC00APW 14 74LVC00APW 1V4 J
+3V3ST

A21
* 1

0V 2
3 3V 10
14

8 3V
3V 12
14

11 0V
4

5
6 3V CE_ROM2N M4-147
7409
BC847B
1
2417
3V2
F423
CLK_STBCTRL M9-148
9 13
F427 RESET_
7 0V 7 2 5
IN

2418

470n
3414
7 7

22K
+3V3ST GND NC
7412
3 4 NCP301LSN27T1
K K
* OPTION
M6-131 CE_ROMN
* 4405

F414
CE_ROM1N M4-146 CL 36532056_004.eps
240703
3139 243 3076.2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
 Electrical Diagrams and PWB’s SD-5.00SACH 7. 41

Memory and Service Interface

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 1500 G17 F526 O23
1501 P22 F527 N12
2500 C6 F528 N13
MEMORY & SERVICE INTERFACE TO Back-end Host Processor TO 2501 C4 F529 P23
2504 C6 F530 O23
2505 B12 F531 J23
A ST SDRAM Share Memory Interface (SMI) Bus Service Uart A
2506 C14 F532 M6
FURORE SDRAM TO +5VD
2507 D4 F533 C3
2510 D6 F534 P19
2511 C12
SACD DECODER
+3V3_ST_MEM 2512 C14

3501

1K
2513 D4
B FUR_3V3
F516 0V B 2516 D6
3502
2517 D6
3
10K F501 2518 C12

BLM31HB
5 3503
2505 2506
7508-B TXD_SER M6-89 2519 D14

0805
5502
BC847BS 0V7
4K7 +3V3D 2520 D12
100n 4
2500 100n 2521 E21
F533 F521 F503
3507 3504
2511 2512 2522 F18
C C

3505

10K
10K 47u 4K7 2523 I20
2501 2504 100n 100n F502 2524 L12
3V2 RXD_SER M6-90
2525 L13
2518 2519
100n 100n 6 2526 N6
2507 2510
0V 2 7508-A 2527 M9
100n 100n
100n 100n
BC847BS 2528 M2
2513 2516 2520 1 2529 O13
D D
3506 2530 P21
100n 100n 100n 2531 P23
2517 10K
2532 O25
100n
7500 F504 2533 O18
K4S641632F-TC60
SERVICE M6-88 3501 B20
1 14 27 3 9 43 49
7502 3502 B12
E MT48LC4M16A2TG 1 14 27 3 9 43 49 VDD VDDQ E 3503 B21
+5VD 3504 C21
VDD VDDQ 37 CKE BANK0 2521 3505 C22
CTRL ROW- DQML 15 DQML
37 CKE BANK0 38 CLK
7501-A 3506 D22
CLK LOGIC ADDR
CTRL DQML 15 DQMH 39 DQMU 100n 74HCT14PW 3507 C4
F518 ROW- FUR_DQML LATCH &
FUR_CLK 38 CLK LOGIC ADDR CSN1 19 CS_ 14 3508 K2
DQMH 39 DECODER F505 3509 F506 2 1
FUR_DQMH TXD_SER M6-89 3509 F19

COMMAND
F F519 19 CS_ LATCH &

DECODE
WEN 16 WE_ F 3510 G19
DECODER

REFRESH
100R

COUNTER
COMMAND

7 3511 G22
DECODE

16 WE_ CASN 17 CAS_ DQ0 2 DQ7

2522
FUR_WEn

1n5
BANK0
REFRESH

3512 G18
COUNTER

17 CAS_ DQ0 2 RASN 18 RAS_ MEMORY DQ1 4 DQ6 +5VD 3513 G23

DATA OUTPUT REGISTER

FUR_CASn BANK0 FUR_DQ0
ARRAY 3514 H20
MEMORY 7501-C
FUR_RASn 18 RAS_ DQ1 4 MODE REG (4,096x256x16) DQ2 5 DQ5
DATA OUTPUT REGISTER

FUR_DQ1 74HCT14PW 3515 I23

ARRAY 14
G (4,096x256x16) DQ2 5 20 BA0 SENSE AMPLIFIERS DQ3 7 DQ4 F507 3510 5 6 F508 3511 G 3516 J20
MODE REG FUR_DQ2 AD13 RXD_SER M6-90
ROW 3517 J23

To / From PC Interface
DQMLDQMH
20 BA0 SENSE AMPLIFIERS DQ3 7 AD12 21 BA1 ADDR DQ4 8 DQ3 SERVICE 10K F509 330R 3518 J20
FUR_AD12 FUR_DQ3 7
ROW 1500

680R
MUX 3519 J23

3512

3513
DQML DQMH

6K8
FUR_AD13 21 BA1 ADDR DQ4 8 FUR_DQ4 AD0 23 A0 I/O GATING DQ5 10 DQ2 1
3520 N2
MUX DQM DATA LOGIC +5VD
23 A0 DQ5 10 24 A1 DQ6 11 DQ1 2 3521 N3
FUR_AD0 I/O GATING FUR_DQ5 AD1 BANK
READ DATA LATCH
DQM DATA LOGIC WRITE DRIVERS 7501-B 3522 P4
H 24 A1 READ DATA LATCH DQ6 11 AD2 25 A2 CTRL DQ7 13 DQ0 3 74HCT14PW H 3523 P3
FUR_AD1 BANK FUR_DQ6
WRITE DRIVERS LOGIC 14 3524 N3

ADDRESS REGISTER
25 A2 CTRL DQ7 13 AD3 26 A3 DQ8 42 DQ15 4 F510 3514 F511 4 3 RTS_SER M6-98
FUR_AD2 FUR_DQ7 3526 N22
LOGIC
ADDRESS REGISTER

COLUMN DQ10 100R 3527 N24

FUR_AD3 26 A3 DQ8 42 FUR_DQ8 AD4 29 A4 DQ9 44 5
ADDR 7
3528 P23

2523

100K

3515
1n5
COLUMN

DATA INPUT REGISTER

29 A4 DQ9 44 AD5 30 A5 COUNTER/ DQ10 45 DQ11 6 3529 N14
FUR_AD4 ADDR FUR_DQ9
LATCH 3530 P19
DATA INPUT REGISTER

I 30 A5 COUNTER/ DQ10 45 AD6 31 A6 DQ11 47 DQ12 7 F512 I

FUR_AD5 FUR_DQ10 3531 P15
LATCH
31 A6 DQ11 47 32 A7 DQ12 48 DQ13 +5VD 4500 N17
FUR_AD6 FUR_DQ11 AD7 +3V3D

BLM11HB
5501 M5
COLUMN

100MHZ
7501-D
32 A7 DQ12 48 AD8 33 A8 DQ13 50 DQ14 5502 C5

5504
FUR_AD7 FUR_DQ12 DEDCODER 74HCT14PW
14 5504 J17
COLUMN F513 3516 F514 F515 3517 F531
FUR_AD8 33 A8 DQ13 50 FUR_DQ13 AD9 34 A9 DQ14 51 DQ9 9 8 CTS_SER M6-127 5505 K12
DEDCODER
J 34 A9 DQ14 51 22 A10 DQ15 53 DQ8 10K 330R J 7500 E12
FUR_AD9 FUR_DQ14 AD10 7
7501-A F22

680R
3518

3519
6K8
FUR_AD10 22 A10 DQ15 53 FUR_DQ15 AD11 35 A11 7501-B H22
VSSQ VSS 7501-C G20
35 A11 NC +5VD
FUR_AD11 7501-D I22
VSSQ VSS NC 6 12 46 52 28 41 54 36 40 +5VD +5VD 7501-E K21
7501-F K22
3508

1K

6 12 46 52 28 41 54 36 40
K 7501-E 7501-F K 7502 E3
14 74HCT14PW 14 74HCT14PW 7504 N4
11 10 13 12
5505 F517 7505 L7
+3V3 +3V3_ST_MEM 7506-A N11
0805 7 7
7506-B N12
BLM31HB
7506-C O11

2524

100n

2525

47u
L * OPTION L
7506-D O12
7507-A O22
I2C SLAVE OPTION +3V3D 7507-B O24
RWN 7505 7507-C M20
74LVC245APW 7507-D M21
A1 7507-C 7507-D 7507-E 7507-F 7507-E M22
2527 74HCU04PW 74HCU04PW 74HCU04PW
19 20 74HCU04PW 7507-F M24
G3 VCC 14 14 14 14
M +5VI2C +5VD 1 10 100n +3V3D 5 6 9 8 11 13 10
12 M 7508-A D22
3EN1 GND 7508-B B21
2528 5501 F532 +3V3D +3V3D
7 7 7 7
7509-1 P16
+5VI2C 3EN2 7509-4
100MHZ 2526 7509-3 7509-2 Q18
74LVC02APW

14

14
100n 7506-A 7506-B 74LVC02APW
BLM11 7509-3 M16
7504 74LVC00APW 14 74LVC00APW 14
3520

3521

3524
10K

10K

10K

8 11
PCF8584T 20 100n 2 18 1 4 7509-4 M18
10 13
1 3 F527 6 3529 F501 B23
F522 VDD D7 9 12
N M6-132 RESET_I2C 19 15 2 5 N F502 C23
RESET_|STROBE_ DB7 2 F528 10K 3527
F503 C21

7
F523 17 14 3 17 +3V3D
M4-130 CE1 7 7 F504 E21
CS_ DB6 3526 4R7
D6 4500
F505 F18
6 13 4 16
A0 DB5
D5 1M
2532 F506 F19
18 12 5 15 7507-A F530 F507 G18
WR_ DB4 +3V3D 74HCU04PW
F524
D4 100n F508 G21
O M5-168 DTACKn 16 11 6 14 +3V3D +3V3D
100n
14 14 O F509 G19
RD_ DB3 1 2 F526 3 4 F520
F525
D3 2529 F510 H20
M6-169 IRQ_I2C 5 9 7 13 7506-C 7506-D
INT_|SCL-OUT DB2 74LVC00APW 14 2533 F511 H21

14
D2 74LVC00APW 14 7 7

WAIT_I2C_FUR
14
100n F512 I18

560R
3528
4 8 8 12 9 12 2
IACK_|SDA-IN DB1 8 11
D1 1 5 F513 J20
WAIT_FUR

CLK_8MHZ
M5-170 CLK_8MHZ 1 7 9 11 10 13 3 4 7507-B
CLK DB0 CSL_FUR 6 F534 1501 F514 J21
D0 74HCU04PW
DTACKn

F515 J22
WAIT_SLAVE_I2C

P M7-141 SDA_EXE 3522 2 F529 P

3531

7
4K7

7 7
SDA|SDA-OUT F516 B11

3530
CE1

10K
3523 100R 3 F517 K14
M7-142 SCL_EXE

2530

2531
22p

22p
SCL|SCL-IN VSS 7509-1 8M F518 F3
100R 74LVC02APW CSTCC
10 7509-2 F519 F3
M5-168

M4-130

M8-164

M6-191

M6-171

M5-170
TO DIAGRAM 74LVC02APW
F520 O24

Q 3139 243 3076.2 Q

F521 C4
F522 N3
V vtg measured in STOP MODE *OPTION F523 N3
CL 36532056_005.eps F524 O3
240703 F525 O3

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
 I

L
F

P
E

N
K
H
D
C
B
A

Q
O
G

M
M4
M4
M4
M4
M4
M4

1
1

M2-55
M2-56
M2-76
M2-70
M2-69
M2-71
M5-192
M4-131
M4-130
M5-191

*OPTION
D0
D1
D2
D3
D4
D5
D6
D7

CE1
RWN

OEND

BE_V4
ST_CLK
CAS1ND
CAS0ND
RAS1ND

RAS0ND
CSL_FUR

BE_DATA
BE1n_FUR
BE0n_FUR

CE_ROMN

BE_FLAG
BE_BCLK

BE_SYNC
BE_WCLK
3V

2
2

0V
0V
0V
3V
To Diagram

3V2
3V2
3V2
3V2
3V2
3V2
3V2
3V2

1V6
0V8

22
21
19
18
17
20
16
1V8 118
3V 117
3V2 135
132
133
134
140
139
129
128
130
138
141
142
143
144
145
146
147
148
7601

3139 243 3076.2

CSn

OEn

B_V4
CE3n
CE2n
CE1n
WE1n
WE0n
DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7
STi5580

+3V3ST
B_DATA

V vtg measured in STOP MODE

B_FLAG
B_BCLK

B_SYNC
B_WCLK

3
3

NRSS_OUT
CPU_RAM_CLK
RAS0n_OR_CE4n
4 VDD3_3_1

CAS0n_OR_HOLDACK
CAS1n_OR_DMAREQn
RAS1n_OR_HOLDREQ

F616
Back-end

5 VSS_1
2619
100n 47 VDD3_3_2

4
4

READNOTWRITE_OR_DMAACK
DATA8 151 D8
50 VSS_4 DATA9 152 D9
2620 FRONT-END DATA10 153 D10
Host Processor

100n 81 VDD3_3_3 DATA11 154 D11

Interface DATA12 155 D12
83 VSS_6 DATA13 156 D13
Back-End Host Processor

2621 DATA14 157 D14

1n 107 VDD3_3_4 DATA15 158

5
5

D15

To
2
108 VSS_8

IS
2622 ADR1 161 A1
100n 136 VDD3_3_5 ADR2 162 A2
ADR3 163 A3
137 VSS_10 ADR4 164 A4
2623 ADR5 165 A5
100n 159 VDD3_3_6 ADR6 166

6
6

A6
ADR7 167 A7
160 VSS_12 ADR8 168 A8
2624 ADR9 169 A9
100n 184 VDD3_3_7 ADR10 170 A10

A/V/Sub
EMI Bus

185 VSS_14 ADR11 173 A11

demultiplexer
ADR12 174 A12

Back-end SDRAM
2625

MEMORY interface
ADR13 175

7
7

100n A13
ADR14 176 A14
ADR15

and Service Interface

177 A15
ADR16 178 A16
ADR17 179 A17

uP ST20cpu
ADR18 180 A18

Audio

Video
ADR19 181 A19
ADR20 182
* 4602

A20
ADR21 183

8
8

A21
AD0 69 AD0 OS_BOOT M6-77
68 AD1

Subpicture
AD1
AD2 67 AD2
0V
F913

66 AD3
Electrical Diagrams and PWB’s

AD3
AD4 PWM1_BOOTFROMROM 3627
AD4 58 115
AD5 59 AD5
3K3
+3V3ST

AD6 60 AD6 RSTn 124 3V2 RESETn M4-78

61 AD7

9
9

AD7
AD8 62 AD8
USE READY 131 0V WAIT_I2C_FUR M5-170

ADDRESS
SYSTEM
AD9 63 AD9 3628
AD10 70 AD10 F656
AD11 71 AD11
10K
AD12 72 AD12
AD13 73 AD13
PIO-0|0 186 0V FLASH_OEN M4-79
DQ0 84 DO0 PIO-0|1 187 0V RESET_I2C M5-132

10
10

DQ1 85 DO1 PIO-0|2 188 0V SEL_ACLK1 M9-80

DQ2 86 DO2 PIO-0|3 189 3V2 GPIO2 M10-81
DQ3 87 DO3 PIO-0|4 190 3V2 GPIO3 M10-82
DQ4 88 DO4 PIO-0|5 191 0V CLOCKWISE_CM M9-83
DQ5 89 DO5 PIO-0|6 192 0V COUNTERCLOCKWISE_CM M9-84
PORT 0 I/O

DQ6 90 DO6 PIO-0|7 193 0V TBL_POS-IRQ_5DTC M9-85

SD-5.00SACH

DQ7 91 DO7
DQ8 92 DO8

MPEG

11
11

3604

DATA
DQ9 93 DO9
97 DO10

DECODER
DQ10
3K3

SDRAM CONTROLLER
+3V3ST

DQ11 98 DO11 PIO-1|0 194 3V2 F602 3611 47R F608 SDA

SMI Bus
M4-86,M7-86,M10-86
DQ12 99 DO12 PIO-1|1 195 3V2 F603 F609 SCL M4-87,M7-87,M10-87
DQ13 100 DO13 PIO-1|2 196 3V2 3612 47R
DO14 PIO-1|3 3605
DQ14 101 197 3V2
DQ15 102 DO15 PIO-1|4 200 3V2
7.

PIO-1|5 3K3
+3V3ST

201 3V2

12
12

SDCS0n TRIG_IN 202 3648

M5 CSN1 2V4 74 0V 10K
TRIG_OUT 3613
75 SDCS1n 203
10K
PORT 1 I/O

SDCASn
+3V3ST
M5 CASN 2V8 77 SERVICE M5-88
M5 RASN 3V 76 SDRASn TXD_SER M5-98
M5 WEN 3V 78 SDWEn RXD_SER M5-90
1V8 82 MEMCLKIN TXD_S2B M2-62
3647 47R
M5 CLK 1V8 95 MEMCLKOUT PIO-2|0 204 0V CPR_S2B M2-65
M5 DQML 0V 79 DQML PIO-2|1 205 3V2 RXD_S2B M2-63

13
13
42

M5 DQMU 0V 80 DQMU PIO-2|2 206 0V SUR_S2B M2-64

PIO-2|3 207 0V SIOCLK M7-91
PIO-2|4 208 0V
PIO-2|5
*

1 0V 4600 SIODATA M7-92

1V8 14 VD_STI25_1 PIO-2|6 2 0V F909 0R
*

VDDSTC PIO-2|7 3 2601 22p

PORT 2 I/O

4V5
VSS_2 F617 3622 100R
15 PCMDATA3 M10-93
2626 4605 SEL_ACLK2 M9-94

14
14

100n 37 VD_STI25_2 4606 CTS_SER M5-127

3625 10K F637 3623 F908
RSTN M2-54
38 VSS_3 PIO-3|0 6 3V2
PIO-3|1 47R
2627 7 0V3 EANF M2-45
100n 64 VD_STI25_3 PIO-3|2 8 3V MUTE M7-95
PIO-3|3 9 3V GPIO1 M10-96
65 VSS_5 PIO-3|4 10 0V P50 M7-97, M10-97
2628 PIO-3|5 11 3V2 RTS_SER M5-98

15
15

100n 94 VD_STI25_4 PIO-3|6 12 3V2 SCART0 M7-99

PIO-3|7 13 SCART1
PORT 3 I/O

3V2 M7-100
decoder
Subpicture

96 VSS_7
2629
100n 119 VD_STI25_5 RES ARRAY
3616-D 47R OPTION
121 VSS_9 PIO-4|0 39 1V F647 YC0 M7-101
2630 PIO-4|1 40 1V F648 YC1 M7-102

16
16

100n 149 VD_STI25_6 PIO-4|2 41 1V F649 YC2 M7-103

PIO-4|3 42 1V F650 YC3 M7-104
150 VSS_11 PIO-4|4 43 2V F651 YC4 M7-105
2631 PIO-4|5 44 1V5 F652 YC5 M7-106
100n 171 VD_STI25_7 PIO-4|6 45 0V6 F653 YC6 M7-107
PIO-4|7 46 YC7
PORT 4 I/O

1V F654 M7-108
172 VSS_13
*
*

2603 F655 3614 3606 3600-D 47R

2632

17
17

198 VD_STI25_8 RES ARRAY

2634 100n
100p 68R 10K
2633 F900
OPTION
199 VSS_15 TCK 113 3V2 TCK
100n 3607 10K
TDI 112 3V2 ST_TDI F901
2635 100n
4u7 TDO 111 0V5 TDO F902
23 VDD_RGB 110 3608
+3V3ST

F615 3V3 TMS 3V2 ST_TMS F903

JTAG

TRSTn 109 0V ST_TRST F904

F614 10K
AGNDB

18 3V3 30 VDD_YCC OS_BOOT M6-77

18

3621 F905
RESETn M2-79
2636 F906
24 VSS_RGB
4u7 10K F907
2604
5603
5602

2637 100n 31 VSS_YCC

BLM11
BLM11
AGNDB

22n
VDDSTD
1V6 114 PWM2_VSYNC
M7-129 VSYNC
19
19

DCU TESTLANDS

3V 116 PWM0_HSYNCn 4607 TBL_POS-IRQ_5DTC

DTS

M9-85
AC3

M7-128 HSYNC
100R
LPCM
*

2V3 120 PIXCLK_27MHz IRQ0 127 3V2 4608 IRQ_I2C M5-169

M9-178 27M_CLK_ST IRQ1 126 3V2
3644
MPEG1/2

3624
IRQ2 125 KOKVOCDET M7-109
IRQ

F610 0V
3V2

3645 3642 35 V_REF_DAC_YCC 100R

F605
F601

F604

20
20

1% 3K9 1% 13K F611 0V

VIDEO

28 V_REF_DAC_RGB IRQ_FUR M8-165

1V3
ENCODER

F612
36 I_REF_DAC_YCC
AUDIO

3646 3643 F613 1V3

29 I_REF_DAC_RGB
KARAOKE
3K3
3K3
3K3

DECODER
3630
3629
3626

1% 3K9 1% 13K
21
21

+3V3ST

ADC_DATA

Y_OUT
CVBS_OUT
C_OUT
B_OUT
G_OUT
R_OUT
ADC_PCMCLK
ADC_LRCLK
ADC_SCLK
LRCLK
SCLK

PCM_CLK

SPDIF_OUT
PCM_OUT0

2605
VDDA_PCM

VSS_PLL
VDD_PLL
VSSA_PCM

DAC_PCMOUT1

DAC_PCMOUT2
STi5519
STi5588
STi5580

10u
32
34
33
25
26
27
57
56
55
52
51
49
48

106
123

22
22

2606
2V
0V
54 0V
53 0V

1V5
1V5
0V3

0V4
0V4
0V7
1V2
0V6
1V2
105 0V3
104 0V3
103 2V2
122 1V8
1V8

F606 100n 5601

1V6
F622
F621

F607 BLM11 5600

F627
F626
F625
F624
F623
+2V5
+1V8
+2V5

VDDSTA

F631
F630
F629
F628
VDDSTA

BLM11
OPTION

2607
1
2
3
4

23
23

3609 10u
2608
3632
3631

100R

100R
100R

* RES3638-D

560R
8
7
6
5
ARRAY

100n
+2V5
+1V8
+2V5

2615 2612 3634

33R
3633
VDDSTC

OPTION
F912

2617 22p 22p 33R

24
24

F911

2613 3635
100p
2638

22p 2616
22p 33R
22p
22p

2610
2609

0R1
3649

2618 22p 2614 3636

+2V5
+3V3
+2V5

22p 22p 33R

AGNDS
VDDSTD

F646
F645
F644
F643
F642
F641

25
25

PCM_CLK_ST

KOKDATA
KOKSCLK

Y_OUT
C_OUT
B_OUT
G_OUT
R_OUT
SPDIF
PCMOUT0
SCLK0
SCLK_FUR
PCM_LeRi_FUR
LRCLK_FUR
PCM_LsRs_FUR
PCM_CeLf_FUR

KOKPCMCLK
KOKLRCLK

CVBS_OUT

26
26

M8-111,
M8-110,

M7-126
M7-125
M7-124
M7-123
M7-122
M7-121
M7-120
M7-119
M7-118
M7-117
M7-116
M7-114
M7-113
M8-190
M8-189
M8-188
M9-112
M10-111
M10-110

M7-112,

240703
CL 36532056_006.eps
I

L
F

P
E

N
K
H
D
C
B
A

Q
O
G

M
3628 F9

F616 P4
4602 C8

7601 G2
3627 G9
2625 O7
2624 O6
2623 O6
2622 O5
2621 O5
2620 O4
2619 O4

3636 I24
3635 I24
3634 I24

F621 I22
2614 J24
2613 J24
2612 J24

F627 J22
F626 J22
F625 J22
F624 J22
F623 J22
F622 J22
4600 F14
3648 F12
3631 F23
3629 F21
3626 F21
3625 F14
3624 F20
3621 F18
3612 F12
2608 F23
2607 F23
2606 F22
2605 F22
2604 F18
2603 F17

F645 L25
F644 L25
F643 L25
F642 L25
F641 L25
F631 L23
F604 F20
F603 F12
F602 F11
F601 F20
5603 P18
5601 E22
5600 E23
3647 P13
3646 P21
3645 P20
3623 E14
3622 E14
3614 E17
3613 E12
3611 E11
2636 P18
2635 P18
2634 P17
2632 P17
2631 P17
2630 P16
2629 P16
2628 P15
2627 P15
2626 P14

F637 E14
F617 E14
F615 P18
F614 P18
4608 C19
4607 C19
4606 D14
4605 C14
3609 H23
3608 D18
3607 D17
3606 D17
3605 D12
3604 D11
2618 N24
2617 N24
2601 D14

F630 K23
F629 K23
F628 K23
F609 D12
F608 D11
5602 O18
3649 G24
3644 O20
3643 O21
3642 O20
3633 G24
3632 G23
3630 G21
2638 O24
2637 Q19
2633 O17
2610 G24
2609 G24

F613 O21
F612 O20
F611 O20
F610 O20
F607 G23
F606 G22
F605 G20
2616 M24
2615 M24

3616-D F16

3638-D K23
3600-D C17
 Electrical Diagrams and PWB’s SD-5.00SACH 7. 43

Power Supply & A/V Interface

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 1701 N1 3755 O16 F743 B14
1702 E23 3756 O16 F744 C16
1703 D1 3757 P16 F745 O16
1704 I23 3758 P18 F746 O17
1705 A1 3759 P12 F747 D22
POWER SUPPLY & +5V +3V3 +3V3 2700 B15 3760 P13 F748 O14
A A 2701 B3 3761 P15 F749 P16
A/V INTERFACE +5VAV
To Display Board
2702 B14 3762 P15 F750 G16
7700
BSN20
* 3701 SIOCLK M6-91 2703 C12 3763-D J4 F751 G17

SCL_INT
3703

3766
1705

3K3

3K3
1 F761 5700 100R +3V3 +5V 2704 C13 3764 B7 F753 H14
I2CSCL SCL_EXE M7-142
2705 D3 3765 C7 F754 H16
2
BLM11 * 3706

470R
M5-142 SCL_EXE 5V

3704

3705
2700

100n
3V2 SCL M6-87 2706 D6 3766 A8 F755 M16

68K
2701
M7-142

47p
2707 D7 3767 C8 F756 M17
B
3 I2CSDA *3764 47R F760 68R
4V2 F740 3707
4V2
F741
4
7701-B 7708 B 2708 D15 3768 C21 F758 M14
+5V 6 2709 E14 3769 D21 F759 N16
4 +3V3 +3V3

3724
2702 BC847BPN BSN20

3K3
5701 F700 F743 5
F707 2 7701-A 100R 2710 F7 3770 N3 F760 B8
M6-121 R_OUT 2V 3
5 P50 F722 2711 E12 3771 O3 F761 A4
* 3700 12u BC847BPN 3708 F768 3709 5709 F887

1%
1%
SIODATA M6-92 2u2
1 R_VID (V) M7-133 M6-87 SCL SCL2 M9-139 2712 E13 3772 I3 F762 C8

SDA_INT
3702

3767

3710

3711

3712
2703

2704
3K3

3K3

47K
1V2

47p

47p
2V2
* BLM11 2713 G7 3773 I3 F763 K21

620R
100R 220R 68R 3768

560R
2714 G8 3774 P3 F764 E17
* 7703

2717

47p
C F712 5702
SDA_EXE 5V BSN20 3713 220R 47R C 2715 E4 3775 H3 F765 L21

3725
SDA_EXE M7-141 M5-141 3V2 SDA M6-86

3K3
F744
BLM11 M7-141 2716 E4 5700 A4 F766 J17
2705 *3765 47R F762 68R
5703 F724
3714
2717 C23 5701 B13 F767 L21

47p
AGNDB
BLM11
+3V3D
+5VAV
* 3769 2718 G15
2719 D23
5702 C4
5703 C9
F768 C17
F769 M21
47R F747 5710 F888
SDA 2720 G14 5704 D9 F770 P17

100u

2707

100n
5704 F784 M6-86 SDA2 M9-140

2706
P50 M6-97 +3V3ST BLM11 2721 H12 5705 E8 F771 M21
D 7710 D
1703 100MHZ 2722 H13 5706 E13 F772 H17
SCART1

2719
M6-100 BSN20

47p
1 I2CSCL/I2CSCL2 BLM31 2723 I7 5707 F8 F773 N21

470R
3715

3716
2748

100u

2708

100n

68K
SCART0 M6-99 2724 J15 5708 G8 F774 M17
2
I2CSDA/I2CSDA2 4V2 4 2725 J14 5709 C23 F775 O21
4V2 F730 3717 F731 7705-B
OPTION
3 F706 6 2726 K12 5710 D23 F776 J21
SCART1 +5V BC847BPN
2715

2716

2709

I2S KARAOKE INPUT

5 2727 K13 5712 H13 F777 J21
1n

1n

5706 F701 F733 100R

ANALOG VIDEO & I2S AUDIO OUTPUT

M6-122 G_OUT 2V 2 7705-A 3

E 4
SCART0 F896 7704 E 2728 K7 5713 H8 F778 N21
12u BC847BPN F764
LF25ABDT 3718 3719 2729 L7 5714 H8 F779 E3

1%
1%
2u2
1 G_VID (Y) M7-134
5 F779 F726 5705 F725
2730 L7 5715 J13 F780 K21

3720

3721

3722
B_REF 1 3 3V3

2711

2712

47K
1V2 2V2

47p

47p
VDDSTD 220R 68R
*

620R
560R
IN GND OUT 1702 2731 L15 5716 J8 F781 H4
6 F799
BLM11 F714
B_VID(U) M7-135 220R M6-117 KOKSCLK 1
2732 M14 5717 K8 F782 I4
2
7 G_REF F794 2710 5707 F727 F734 2 2733 M12 5718 L8 F783 I4
1V8 DGND
VDDSTA 3723 +12V 2734 M13 5719 M8 F784 D9
F 8 G_VID(Y) F796 100n BLM11 F723 F
M7-134 AGNDB M6-118 KOKLRCLK 3 2735 N6 5720 M8 F785 N8
9
R_REF F797 7707
* 5725 +5VAV DGND 4
2736 N8 5721 M8 F786 H9
BLM11 2737 L4 5722 M13 F787 H9
LD1117 DT18
10
R_VID F795 F732 5 2738 M3 5723 L4 F788 H3
M7-133 5708 F729 M6-119 KOKDATA
3 2 F728 1V8 2739 O15 5724 O13 F789 H3
11 F790 IN OUT VDDSTC
Y_REF BLM31 DGND 6 2740 O6 5725 F8 F790 G3

470R
3726

3727
GND

2718

100n
2741 O7 5726 M21 F791 H3

68K
G 12
Y_VID F792 2713 F737 KOKPCMCLK 7 G

100u

2714

100n
M7-138 1 M6-120 2742 O14 7700 A7 F792 G3
4V2 4
13
C_REF F793 4V2 F750 3728 F751 7709-B F742 2743 P12 7701-A B16 F793 G3
6 M6-109 KOKVOCDET 8
2720 BC847BPN 2744 P13 7701-B B17 F794 F3
14 5712 F702 F753 100R 5
C_VID F791 B_OUT 2 7709-A 2745 K9 7703 C8 F795 G3
M7-137 M6-123 2V 3
15 12u BC847BPN 3729 F772 3730
2746 K9 7704 E7 F796 F3

1%
1%
CVBS_REF F789 2u2 B_VID (U)
F891 5713 F786 1 M7-135 2747 N8 7705-A E16 F797 F3
AGNDB

3731

3732

3733
2721

2722

47K
1V2

47p

47p
H 2V2 H

620R
16 F788 VDDA_FUR 220R 68R 2748 D9 7705-B E17 F798 J3

560R
CVBS M7-136 7713 BLM11 2749 I9 7707 F6 F799 F3
17 F895 3775 0R F781 F880 F881 LF18ABDT 3734 2750 I9 7708 B21 F880 H4
3V3 +3V3 5714 F787
1 3 F754
18 1206 FUR_1V8 220R
2751 I8 7709-A H16 F881 H5
3V3 IN GND OUT BLM11 3700 C9 7709-B G17 F882 I4
19 F708 3772 F782 F882 2 AGNDB 3701 A9 7710 D22 F883 J3
5V 0R
100n

2723
2751

100u

2749

100n

2750

100n
+5V
I 20 12V F703 1206 +3V3
+5VAV
*
1704 I
3702 C7
3703 A7
7713 H7
7714-A J16
F884 K3
F885 K3
DGND 1 3704 B15 7714-B J17 F886 K3
21
12V 3773 0R F783 F889 F890
+12V 3705 B16 7716 J6 F887 C23
M6-86 SDA 2
22 F798 1206 3706 B9 7717-A M16 F888 D23

470R
MUTE

3735

3736
2724

100n
M6-95

68K
M6-87 SCL 3 3707 B16 7717-B M17 F889 I4
23
GND RES ARRAY +5V 4V2 4 3708 C16 7719 M6 F890 I5
4V2 F735 3737 F736 7714-B F777

DIGITAL YUV VIDEO OUTPUT

M6129 YSYNC 4 3709 C18 7720 M5 F891 H7
J 24
SCLK0 F883 4 3763-D 5 7716 2725
6
BC847BPN J
M6-113 5715 F704 F738 100R 5 3710 C12 7721-A O16 F892 N3
LD1117 DT33 M6-124 CVBS_OUT 2V 2 7714-A 3 M6128 F776 HSYNC 5
25 PCMOUT0 3 6 3711 C13 7721-B O17 F893 O3
M6-114 5716 F710 12u BC847BPN F766
3738 3739 3712 C15 F700 B13 F894 P2

1%
1%
3 2 F709 2u2 CVBS_VID DGND 6
26 F884 IN OUT +3V3SA 1 M7-136
GND 3713 C9 F701 E13 F895 H3

3740

3741

3742
2726

2727

47K
1V2

47p

47p
100MHZ 270R 2V2 68R F780

560R

560R
GND
BLM31 M9-180 27M_CLK_PSCAN 7 3714 C15 F702 H13 F896 E3
27 F885
PCM_CLK_ST
K 28
M6-112 1
* 2728
5717 F711
+3V3SD
3743
F739
DGND 8
K
3715 D15
3716 D16
F703 I3
F704 J13
LRCLK_FUR M6-115 BLM11
10u 240R F763 9 3717 E16 F705 M13
F886 M6-101 YC0
29 F716 3718 E16 F706 E3
GND
2745

100n

2746

100n

AGNDB
F719
DGND 10 3719 E18 F707 B2
30 +5VAV
SPDIF 2737 F720 5723 3720 E12 F708 I3
F765 YC1 11
+5VD M6-102 3721 E13 F709 J7
100n BLM11 DGND 12 3722 E15 F710 J9
L +5V L 3723 F15 F711 K9
5718 F715 F767

470R
3744

3745
5 YC2 13

2731

100n
M6-103 3724 B22 F712 C4

68K
3753 4 2
+5VSD
SPDIF
100u

2730

100n

M6-116 BLM11 4V2 3725 C22 F713 O13

2729

4 DGND 14
22R 7720 5719 F717 4V2 F755 3746 F756 7717-B 3726 G15 F714 F21
3
74HCT1G125 +5VSA 6
F769 15 3727 G16 F715 L9
BC847BPN YC3
2738

2732 M6-104
22p

BLM11 5722 F705 F758 100R 5

1 M6-125 C_OUT 2V 2 7717-A 3 3728 G16 F716 K2
5720 F718 16
+5V
M * +5VD 12u BC847BPN F774 +5VD M 3729 H16 F717 M9

1%
3747 3748
1%

2u2 C_VID
BLM11 1 M7-137 3730 H18 F718 M9
F771
3749

3750

3751
YC4 17
2734

7719 M6-105

47K
1V2
47p

47p
5721 F721 240R 2V2 68R 3731 H12 F719 L2
LD1117DT33
560R

560R
2733

+5VAV 5726 +3V3PS 3732 H13 F720 L4

F785 BLM11 +3V3PS 18
3 2 3V3 3752 +3V3 3733 H15 F721 M9
IN OUT FUR_3V3 F759 100MHZ F773
M6-106 YC5 19 3734 H15 F722 B22
To 5 Disc Changer

GND 180R
3735 J15 F723 F21
+3V3PS20
2735

100n

2736

100n

2747

10u

N 1 AGNDB N 3736 J16 F724 C9

* 1701 1 +3V3
F892
* 3770 0R +5VAV M6-107 F778 YC6 21 3737 J16 F725 E9
+3V3 3738 J16 F726 E8
2 +3V3 1206 DGND 22 3739 J18 F727 F9
PSU

3740 K12 F728 G8

3 +5V
F893
* 3771 0R
+5V M6-108 F775 YC7 23
3741 K13 F729 G9

470R
3754

3755
2739

100n

68K
4 GND 1206 +12V +12V DGND 24 3742 K15 F730 E16
O 4V2 4 O 3743 K15 F731 E17
5 GND 4V2 F745 3756 F746 7721-B
2740

100u

2741

100n

6 3744 L15 F732 G21

2742 BC847BPN
5724 F713 F748 100R 5 3745 L16 F733 E14
6 MGND M6-126 Y_OUT 2V 2 7721-A 3
7704 7707 5707 5725 3746 M16 F734 F16
MGND BC847BPN
* 3774 0R 12u
1%

F770
1%

7 +12V 2u2
1
3757 3758 Y_VID M7-138
STI5580 LF25ABDT LF25ABDT 3747 M16 F735 J16
+12V 3748 M18 F736 J17
3759

3760

3761
2743

2744

47K

1V2
47p

47p

F894 2V2 STI5588 LF33ABDT LF18ABDT

1206 220R 68R
560R

560R

P P 3749 M12 F737 G21

STI5519 LF25ABDT LF25ABDT
220R 3750 M13 F738 J14
* OPTION 3751 M15 F739 K16
3762 F749 3752 N15 F740 B16
AGNDB AGNDS MGND CL 36532056_007.eps
V vtg measured in STOP MODE
3139 243 3076.2 AGNDB
240703
3753 L3
3754 O15
F741 B17
F742 G21
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
 Electrical Diagrams and PWB’s SD-5.00SACH 7. 44

SACD Decoder
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 2800 A18
2801 A19
2802 A20

SACD DECODER FUR_3V3 FUR_1V8 VDDA_FUR

2803 A21
2804 A22
2805 A22
2806 A23
2807 A24
A A

2800

100n

2801

100n

2802

100n

2803

100n

2804

100n

2805

100n

2806

100n

2807

100n

2808

100n

2809

100n
2808 A25
2809 A26
2810 L2
2811 L8
2812 L8
DGND_FUR DGND_FUR DGND_FUR DGND_FUR DGND_FUR DGND_FUR DGND_FUR DGND_FUR DGND_FUR AGND_FUR 2813 K6
B B 2814 L6
To 2815 O6
2816 M23
Back-end Host FUR_3V3 FUR_1V8 VDDA_FUR
2817 C26
3800 F11
2817
Processor 3801 K3
1n 3802 L3
C C

106
118
3803 L4

10
58
76

37

19
85

32
92
3804 L7

VCC_IO_1
VCC_IO_2
VCC_IO_3
VCC_IO_4
VCC_IO_5
VCC_IO_6
VCC_IO_7

VCC_CORE_1
VCC_CORE_2

VDDA
D0 25 1 A1 DGND_FUR 3805 L5
H_D_0 H_A_1
D1 23
H_D_1 H_A_2
128 A2 3806 L9
D2 22
H_D_2 H_A_3
127 A3 3807 L5
D3 16
H_D_3 H_A_4
126 A4 3808 M11
D4 15
H_D_4 H_A_5
125 A5
D5 A6 3809 M11
D 14
H_D_5 7800 H_A_6
124 D 3810 O7
D6 13
D7
D8
12
11
H_D_6
H_D_7 FURORE2 DGND_FUR AGND_FUR
3811 P7
H_D_8 FURORE2 3812 F5
D9 9
H_D_9 3813 G6
D10 8
H_D_10
D11 7
3814 K6
H_D_11
D12 6 3815 L6
H_D_12
E D13 5
H_D_13 E 3816 I12
D14 3
H_D_14 4002 O21
D15 2
H_D_15 4800 N9
HOST INTERFACE DGND_FUR 4803 K12
A7 123
H_A_SEL
M6-191 CSL_FUR 3V2 24 5800 N6
H_CSN
M6 RWN 3V2 26
H_RWN
5801 L21
M5-164 WAIT_FUR 0V 27
H_WAIT 5802 O6
FUR_3V3 M6-165 IRQ_FUR 28
F 3V2 H_IRQN F 7800 D14
ST_CLK 3800
3812 F814
M6-192
* 33R F817 2V4 18
62
H_PROCCLOCK
H_SEL_0
7801 K3
63 7802 O8
H_SEL_1
10K To FUR_DQ0 105
D_DQ_0 D_ADDR_0
71 FUR_AD0 To 7803-A N23
7803-B O23
3813

10K

FUR_DQ1 103 68 FUR_AD1

Memory and FUR_DQ2 101
D_DQ_1
D_DQ_2
D_ADDR_1
D_ADDR_2
66 FUR_AD2 Memory and Service Interface 7803-C M22
7803-D M25
G * FUR_DQ3 98 64 FUR_AD3 G
Service Interface FUR_DQ4
FUR_DQ5
96
D_DQ_3
D_DQ_4
D_ADDR_3
D_ADDR_4
65 FUR_AD4
FUR_AD5
(Furore SDRAM) F800 L6
F801 L3
DGND_FUR DGND_FUR
(Furore SDRAM) FUR_DQ6
87
93
D_DQ_5
D_DQ_6
D_ADDR_5
D_ADDR_6
67
70 FUR_AD6 F802 L8
FUR_DQ7 90
D_DQ_7 D_ADDR_7
72 FUR_AD7 F804 N24
FUR_DQ8 91 74 FUR_AD8
FUR_DQ9 94
D_DQ_8 D_ADDR_8
77 FUR_AD9 F806 P21
D_DQ_9 D_ADDR_9
FUR_DQ10 95 73 FUR_AD10 F809 L4
D_DQ_10 SDRAM INTERFACE D_ADDR_10
H FUR_DQ11 97
D_DQ_11 D_ADDR_11
79 FUR_AD11 H F810 L9
FUR_DQ12 100
D_DQ_12 D_ADDR_12
78 FUR_AD12 F811 L5
FUR_DQ13 102
D_DQ_13 D_ADDR_13
75 FUR_AD13 F812 L9
FUR_DQ14 104
FUR_DQ15 107
D_DQ_14 F813 L22
D_DQ_15
F814 F6
FUR_DQMH 0V D_UDQM
F815 M12
FUR_DQML 0V 89
D_LDQM F816 M12
I FUR_WEn 3V3 80
D_WEN I F817 F12
FUR_CASn 3V3 82
D_CASN
FUR_RASn 3V3 81 F818 L6
D_RASN
FUR_CLK 3816 33R 1V7 86
D_CLK
To M6-110 PCM_CeLf_FUR 0V 39
PCM_CELF_IN B_DATA__BE_DAT_0
45 0V8 BE_DATA M2-71 To
M6-189 PCM_LeRi_FUR 0V 40 49
DAC Interface M6-111
M6-190
PCM_LsRs_FUR
SCLK_FUR
0V 41
30
PCM_LERI_IN
PCM_LSRS_IN
BE_DAT_1
BE_DAT_2
50 Front-end Processor
J 0V4 51 J
and M6-188 LRCLK_FUR 1V5 31
PCM_DCLK_IN
PCM_WCLK_IN
BE_DAT_3
BE_DAT_4
52
53
IGUANA
BE_DAT_5
54
+5V BE_DAT_6
Back-end Host BE_DAT_7
55

VDDA_FUR Processor 4803 UDE_REQ

DAT_REQ
47
48
K 46 1V6 BE_BCLK M2-70 K
BFS20

B_BCLK__SDCLK
3801
3K9

44 3V BE_WCLK M2-69
7801

B_WCLK__SENB
B_SYNC__SYNC
43 0V BE_SYNC M2-56
180R

BE_FLAG M2-76
3814

42 0V
2813 B_FLAG__SERR
2810 F801 F811
M1-25 RFP 2V4

2n2 22R
56p * 2811 10n F810
FUR_3V3
1V6 F800 0V 35 AGCINP DSD_PCM_0
108 0V DSD_PCM0 M10-152
3802
3K9

L 0V 36 ADCREFL 109 3V3 DSD_PCM1 M10-153 5801 F813 L

F809 3803 F818 DSD_PCM_1
390R 1%

0V 34 BIASN DSD_PCM_2
110 0V DSD_PCM2 M10-154
DSD_PCM3 M10-155
* 3804 330R F802 * 2812380610n F812 DSD_PCM_3
111 3V3 100MHZ
3805

3807

2814

100n

14 14
120R
6K8

DSD_PCM4 M10-156
3815

113 0V BLM11
DSD_PCM_4
9 8 12 11

2816

100n
DSD_PCM_5
114 3V3 DSD_PCM5 M10-157
* 12K DSD_PCM_6
DSD_PCM_7
115
116
0V3
1V6
DSD_PCM6
DSD_PCM7
M10-158
M10-159 7 7803-C 7 7803-D
M8-166 117 1V6 DSD_PCM8 M10-160 74LVC125APW 74LVC125APW
AUDIO_CLK_FUR F816 1V6 DSD_PCM_8
DSD_PCM9 M10-161
M 3808 33R 29
AUDIO_CLK DSD_PCM_9
120 0V3 10 13 M
3809 33R 1V6 21
SYS_CLK DSD_PCM_10
119 0V DSD_PCM10 M10-162
M4-78 RESETn 3V2 122
RESETN DSD_PCM_11
121 0V DSD_PCM11 M10-163
F815
FUR_TDI 3V3 60
TDI TDO
59 0V2 FUR_TDO
FUR_TMS 3V3 57
TMS
FUR_TCK 3V3 61
TCK

GND_CORE_1
GND_CORE_2
FUR_TRST 0V3 56
TRST
GND_IO_1
GND_IO_2
GND_IO_3
GND_IO_4
GND_IO_5
GND_IO_6
GND_IO_7
N 4800 N
M9-179 27M_CLK_FUR 7803-A

VSSA
14 74LVC125APW
2 3 1V6 F804
5800 2V2 AUDIO_CLK_FUR M8-166
Option
4
17
69
83
99
112
38

20
84

33
+3V3
BLM11HB 7

CLK5V *5802
1
O 100MHZ
DGND_FUR DGND_FUR AGND_FUR
O
7803-B
680R

7802
3810
2815

100n

14 74LVC125APW
* OPTION DSO751SV 4 M9-177 AUDIO_CLK 4002 2V2 5 6 AUDIO_CLK M10-167
V vtg measured in STOP MODE 1
VDD
3 F806
TS OUT 7
OSC
4
3811

GND
1K5

P P
2
33.8688MHz
CL 36532056_008.eps
3139 243 3076.2 240703
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
 Electrical Diagrams and PWB’s SD-5.00SACH 7. 45

System Clocks
1900 H17
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 2900 C6
2901 C5
*
SYSTEM CLK5V
BLM11HB
5903
CLK5V
+3V3D *
BLM11HB
5900
2902 B13
2903 C15
2904 D15
A 2906
* A 2906 A8

CLOCKS

BLM11HB
CLK5V 5905 F927 2907 H5
100n +5V CLK5V 2908 B15

5902
BLM11HB
* FXO-31FL
7903 2910 J15

680R
3908
7902 4 2911 J15

2908

100n
ICS612G-01 F918 3900 F919 2902 2912 J15
SEL_ACLK2
* VDD M6-94

BLM11HB
16 1 2V2 1 3 2913 J16
C1 14 TS OUT 10K 10n 2914 G4

5901
OSC F929 2915 D15
B 15 M6-80 SEL_ACLK1 3901 B 2916 F15

3909
1 GND

1K5
C2 10K 2917 E15
2 2 2918 C4
F925
* 2919 D4
3900 B11
10 0V 3901 B11
2D 3903

2900

100u
7901 PCM_CLK_ST

100n

2901
M6-112 3902 F5
11 2V2 MK2703S 2 3903 C15
C 1D 56R 2903 C
VDD 3904 C15
12 2918 7 S0 3905 C10
1D PLL OUTPUT CLK 5 2V2 3904 F935 22p AUDIO_CLK M8-177 3906 D10

3905
33R
10n CLK SYNTHESIS

4902
13 4V5 6 S1 AND CTRL CIRC. BUFFER 3907 D15
F920 56R 2904
3908 A7
2V2 1 X1 3909 B7

3 2919 8 X2
CRYSTAL OUTPUT 27M 4 4901
2V7
* 3907 22p 27M_CLK_ST M6-178 3910 H3
3911 J3
OSC BUFFER 2915
D 47R D 3912 E15

3906
GND

3K3
4 10n 3913 E15
3 3914 H12
22p
5 3915 I12
3916 K12
9 6 4901 D14
2V2
1D 3913
27M_CLK_PSCAN
4902 C9
M7-180 5900 A15
E
7
* 7906 XC25BS3
47R 2917 E 5901 B5
5902 A12
8 2V2
3912 5903 A8
22p 27M_CLK_FUR M8-179 5904 G3
2 VSS Select 2916 5905 A15
47R
Fuse Q1 4 5906 F4
M4-148 CLK_STBCTRL 3V2 7901 C11
22p
1 CE 7902 B3
7903 A7
F 3902
2V2 Counter
7904-E 7904-D F 7904-A I5
6 CLKin 11 bit 1/M
1/2 1/2
74HCT04PW 74HCT04PW 7904-B I6
CLK5V 33R 14 14 7904-C I4
* 5906 F930
(xN)
11 bit PLL
2V2 11 10 9 8 7904-D F11
7904-E F10
BLM11HB 5 VDD Q0 3
F932 7904-F H7
7 7
7905-A H9
2914

100n

Over Sampling FS Frequency SEL_ACLK2 SEL_ACLK1 CLK FACTORY 3914 7901 3900 3901 5902 2902 7905 3903 3904
Audio_CLK FOR AUDIO_CLK 3915 7905-B H11
G 256FS 96KHZ 24.576MHZ 1 1 STi5580/STi5588
G 7905-C I9
CLK5V * 44.1KHZ

48KHZ
11.2896MHz

12.288MHZ
1

0
0

0
GENERATED
EXTERNAL
7905-D I11
7905-E K9
5904 F923 384FS 44.1KHZ 16.9344MHz 7905-F K10
7906 E5
BLM11HB 2907 1900 * F910 H16

FROM / TO MOTOR DRIVER BOARD

100n
7904-F
74HCT04PW *7905-A
74AHCT04PW *
7905-B
74AHCT04PW
M6-85
TBL_POS-IRQ_5DTC 1 F914 I16
F915 H12
H
13
14
12 1
14
2 3
14
4
F915
*
3914
M7-139
F910
SCL2 2 H F916 I12
F917 K12
27M_CLK_ST M6-178 F933 F918 B11
14 14 M7-140 SDA2 3
3910 47R F919 B12
384FS_in

5-DISC CHANGER
M10-184 1V6 1 2 1V8 3 4
2V2 7 7 7 F934 F920 D14
PLACE CLOSE TO 3907 4 F922 I3
33R F922
7 7 F926 F923 G6
M6-83 CLOCKWISE_CM 5 F925 B5
74AHCT04PW 74AHCT04PW F926 I16
I 7904-C
74HCT04PW
7904-A
74HCT04PW 7904-B *7905-C *
7905-D M6-84 COUNTERCLOCKWISE_CM 6 I F927 A16
F929 B11

14
74HCT04PW
5
14
6 9
14
8 F916
*
3915 +5V
F914 7 F930 F4
27M_CLK_FUR M8-179 F931 J3
F931
* 3911 6 5
47R
8 F932 G9
F933 H16

2910

2911

100n
47u
33R 2V2 7 7 +12V
PLACE CLOSE TO 3907 9 F934 I16
7
J * OPTION
* * 10 J
F935 C15

V vtg measured in STOP MODE 11

FEATURE 7903 7905 7904 7902 14 14 *

2912

2913

100n
47u
11 10 13 12 F917 3916
27M_CLK_PSCAN M7-180
OPERATION STANDBY NON-SACD MGND
and 47R * *
CLK_STBCTRL H L SACD 256FS * 7905-E
74AHCT04PW
7
*
7905-F 7
PLACE CLOSE TO 3907
K 74AHCT04PW K
SACD
CL 36532056_009.eps
3139 243 3076.2 240703

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
 Electrical Diagrams and PWB’s SD-5.00SACH 7. 46

DAC Interface
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 1012 E17 F035 J12
1013 K16 F036 J3
1014 B2 F037 D14

DAC INTERFACE 2000 E2

2004 G14
2005 G14
F038 D14
F039 D14
F040 E14
A A 2006 H14 F041 K3
2007 H8 F042 K12
3036 2008 H14 F043 K6
FUR_3V3 FUNCTION 3037 3038 4001 4014 2009 I14 F044 J13
10K FOR BScan or DCU 2010 I14 F050 C3
3010
FUR_3V3 2011 J14 F051 C4
B 1014 3037-A 10K DCU B 2012 J14 F052 D3
RF FUR_TMS
2013 K14 F053 B4
2 1 * 3038-D F053 ST_TMS BST 2014 E14 F054 E3
3037-B 2015 E14 F056 D3
4 3 FUR_TCK 3003 E4 F057 E3
6 5 * 3038-C F050 TCK 3008 C4
3010 B4
F060 D3

C 8 7 3008 C 3019 F12

FUR_3V3
3037-C 10K 3020 G12
10 9 F051 FUR_TDI 3021 G12
12 11 * 3038-B
ST_TDI 3022 H12
3023 H3
14 13 3037-D F052 F037
FUR_TDO M6-96 GPIO1 3024 H12
30 3025 H6
D 16 15 * 3038-A TDO M6-82 GPIO3
F038 D 3026 I12
F039 29 3027 I12
18 17 F056 RESETn M6-81 GPIO2
F060 3028 J12
20 19 * 4001 F054 FUR_TRST M8-161 DSD_PCM9 * 3034 F040 28
3029 J3
3030 J12
3003
M6-97 P50 33R * 2015 27
3031 J6
2000

220n

26
E 10K
M8-160 DSD_PCM8 * 3035 22p F030 E 3032 J7
* 4014 ST_TRST
M6-93 PCMDATA3
33R
* 2014 STANDBYn 25 * 1012 3033 I3
3034 E12
F057 24 24 3035 E12
3V2
22p SDA_DAC 3036 A4
23 23 3037-A B3
3V2 SCL_DAC
3037-B C3
F 22 22 F 3037-C C3
F015 3019 F016 256Fs 21 21 3037-D D3
M8-167 AUDIO_CLK 3038-A D3
20 20
33R * 2004 3038-B D3
3038-C C3
F017

F018 3020 F019 22p BIT_CLK/DSD_CLK 19 19

M8-158 DSD_PCM6 3038-D B3

TO/FROM DAC BOARD

18 18 4001 E3
G
CLK5V
33R * 2005 G 4005 H5
F020 3021 F021 22p 17 17 4006 K5
M8-159 DSD_PCM7 WORD_CLK/SEL_DSD
4007 I12
16 16
F022 4005
F023 33R * 2006 4008 J12
* 2007
M8-152 DSD_PCM0 F024 3022 F025 22p DATA_LR/DSD_LEFT 15 15 4014 E3
7000-A H4
14 14
H *
7000-A
74HCT4066PW 14
* 7000-C
74HCT4066PW 14
100n 33R * 2008 H 7000-B J4
7000-C H8
M6-87 SCL 3023
3V2 1 2 * 3025
1V8 8 9 M8-153 DSD_PCM1 F026 3024 F027 22p SEL_PCM/DSD_RIGHT 13 13
7000-D J8
CLK5V
12 12 F013 K2
33R 13 47K 6 PCM_LsRs_FUR * 4007 33R * 2009 F014 K2
F028 3026 F029 22p 11 11 F015 F12
7 7 M8-156 DSD_PCM4 DATA_LsRs/DSD_Ls
FUR_3V3 F016 F13
10 10
I
* 3033
33R * 2010 I F017 G5
CLK5V F031 3027 F032 9 9 F018 G12
M8-157 DSD_PCM5 22p SEL_PCM/DSD_Rs
10K F019 G13
8 8
M8-163 DSD_PCM11
F036
PCM_CeLf_FUR * 4008 33R * 2011 F020 G12
F021 G13
*
7000-B
74HCT4066PW 14
* 7000-D
74HCT4066PW 14
M8-154 DSD_PCM2 F033 3028 F034 22p DATA_CL/DSD_CENTRE 7 7
F022 H3
F023 H9
J M6-86 SDA 3029 3V2 4 3 * 3031 CLK5V 1V8 11 10 33R * 2012 6 6 J F024 H12
33R 47K F035 3030 F044 22p 5 5 F025 H13
5 12 M8-155 DSD_PCM3 SEL_PCM/DSD_LFE
3032

EMC Holes F026 H12

1K

4 4
7 7
33R * 2013
F027 H13
F013 F014 * 22p 384Fs
3 3 F028 I12
F029 I13
K 2 2 K F030 E14
4006
F043 CLK5V 384FS_in F042 F031 I12
F041 M9-184 1 1
* OPTION F032 I13
1013
V vtg measured in STOP MODE CL 36532056_010.eps F033 J12
3139 243 3076.2 240703 F034 J13
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
 Electrical Diagrams and PWB’s SD-5.00SACH 7. 47

Top Side

CL 36532056_011.eps
3139 243 3076.2 170703
 Electrical Diagrams and PWB’s SD-5.00SACH 7. 48

Mapping Top Side Mapping Bottom Side

1012 B4 2530 I2 3156 F9 3719 B9 7401 F4 1201 F5 2714 H6 3270 D5 3912 C12
1013 B4 2531 I2 3157 G8 3722 B9 7404 D6 1704 H13 2721 F7 3271 D5 3913 B12
1014 D1 2532 I3 3158 F8 3723 B9 7405 D6 2004 B10 2722 F6 3273 D5 3914 D12
1100 F7 2533 H6 3159 F9 3724 B10 7406 E5 2005 B10 2723 D7 3284 E5 3915 D11
1200 C13 2605 I4 3160 G8 3725 B11 7409 C6 2006 B10 2724 C6 3287 E5 3916 D12
1300 I12 2607 G4 3161 G8 3726 C9 7412 D6 2007 B11 2726 H6 3288 E1 4005 B11
1301 F12 2635 I4 3162 G8 3727 C9 7413 D6 2008 B10 2727 H6 3289 E2 4006 B11
1302 H13 2636 I4 3163 G8 3728 C9 7501 G2 2009 B10 2731 C5 3290 E2 4200 C3
1400 C5 2638 F5 3261 F8 3729 B9 7504 H4 2010 B10 2733 H6 3291 E1 4201 D3
1500 F2 2700 C8 3262 F8 3730 B9 7505 G3 2011 B10 2734 H6 3304 I2 4204 E2
1501 I2 2701 B10 3263 E10 3733 B9 7506 H3 2012 B9 2735 B7 3308 H2 4205 G3
1701 B12 2702 C8 3265 F9 3734 B9 7507 I3 2013 B9 2736 C7 3313 F2 4600 E7
1702 H1 2705 B10 3272 E10 3753 B7 7508 F2 2014 B10 2739 C5 3317 G2 4602 G10
1703 B8 2706 G1 3274 E11 3763 H8 7509 G5 2015 B11 2743 G6 3325 F2 4605 F7
1705 B11 2707 H1 3275 E10 3764 C10 7700 C10 2200 G3 2744 G6 3328 F2 4606 F7
1900 C1 2708 C9 3277 E10 3765 C10 7701 C8 2201 G4 2745 F1 3340 G2 4800 E8
2000 E2 2709 C9 3278 E10 3766 C10 7703 C10 2202 D3 2746 E1 3341 G1 4803 E8
2100 G9 2713 H13 3279 E11 3767 C9 7705 C9 2203 D4 2749 D7 3343 G2 5200 G2
2101 F8 2715 B9 3280 E10 3768 C10 7708 C10 2204 G4 2750 D7 3401 D11 5201 G3
2102 G8 2716 B9 3282 E10 3769 C11 7709 C9 2205 G3 2800 E9 3403 E12 5202 E6
2103 F8 2717 B10 3283 E10 3770 C12 7710 C11 2206 F3 2801 D9 3502 H12 5203 C2
2104 F8 2718 C9 3293 F9 3771 C12 7720 B7 2207 G3 2802 E8 3507 B8 5204 C2
2105 E9 2719 B11 3294 E10 3772 C8 7803 E6 2208 F5 2803 D7 3508 C8 5401 D11
2106 E8 2720 C9 3300 I11 3774 C11 7901 D2 2209 D3 2804 D7 3600 H7 5502 C7
2107 E8 2725 C8 3301 I11 3775 C8 7903 C3 2210 F3 2805 C8 3604 E9 5505 G12
2108 G8 2728 E13 3302 I11 3800 G5 7904 D3 2211 E2 2806 C8 3605 E9 5600 G10
2109 G8 2729 B7 3305 H10 3814 D5 7905 D3 2212 E2 2807 E8 3606 G10 5601 H7
2110 F8 2730 B7 3306 H10 3815 D4 7906 C3 2214 D3 2808 C8 3607 G10 5602 F7
2112 G8 2732 D8 3307 H10 3816 C6 2215 G4 2810 D9 3608 G10 5603 G7
2113 F8 2737 B7 3309 H10 3900 C2 2216 F2 2811 E9 3609 H8 5701 G6
2114 G7 2738 B7 3310 G12 3901 C3 2217 G5 2812 E9 3611 E8 5705 I6
2115 F8 2740 B6 3312 G12 3903 D2 2218 F2 2813 E9 3612 E8 5706 F6
2116 G7 2741 A6 3315 G11 3904 D3 2219 F5 2815 E7 3613 E8 5707 I6
2117 F7 2742 D9 3316 G11 3905 C2 2220 F5 2817 C9 3614 G10 5708 H6
2118 G7 2747 C5 3319 G12 3906 C2 2221 C3 2915 C12 3616 H7 5712 F6
2119 G7 2748 G4 3321 G12 3908 B3 2222 E2 2916 C12 3621 H10 5713 D7
2120 F7 2751 C7 3322 G12 3909 B3 2223 E2 2918 B12 3622 E7 5714 D7
2121 G6 2809 D6 3323 H12 3910 B5 2224 E2 2919 C11 3623 F7 5715 H6
2122 F7 2814 D5 3324 F12 3911 C4 2225 E2 3008 C12 3624 G10 5716 F1
2123 F7 2816 E6 3326 F12 4001 E1 2226 E2 3010 D12 3625 F7 5717 E1
2124 F6 2900 C2 3327 F12 4002 D4 2227 E5 3023 B11 3626 G10 5721 C7
2125 F8 2901 C3 3332 H11 4007 C4 2228 E5 3025 B11 3627 G10 5722 H6
2126 F7 2902 D2 3333 H11 4008 C5 2229 E5 3029 C11 3628 F10 5724 G6
2127 F7 2903 D2 3334 H11 4014 E1 2230 E5 3031 B11 3629 G10 5725 I6
2128 F7 2904 D3 3336 F12 4100 G5 2231 E5 3032 C11 3630 G10 5800 E7
2129 F6 2906 B3 3337 F12 4103 F6 2232 E5 3033 B11 3631 H7 5802 E7
2131 F8 2907 D4 3338 I11 4104 F6 2234 D6 3034 B11 3632 H8 6300 I3
2132 G7 2908 B3 3339 E13 4203 G10 2235 D5 3035 B10 3634 H8 6301 I3
2133 F9 2910 B2 3342 F12 4301 H10 2236 D5 3036 C12 3635 H7 6302 I4
2134 G8 2911 C1 3344 G12 4303 G11 2237 D5 3037 C12 3636 H7 7000 B11
2135 G8 2912 C2 3345 H12 4304 G11 2238 D5 3118 E5 3638 H10 7200 E2
2137 F6 2913 C1 3346 I10 4400 C10 2239 E5 3119 E6 3642 G7 7201 F2
2139 F6 2914 C3 3402 D6 4401 C10 2306 F1 3120 E5 3643 G6 7202 F2
2140 F8 2917 B2 3404 D6 4405 E5 2311 F2 3121 E5 3644 G11 7203 E1
2141 G8 3003 E1 3405 D6 4500 G5 2402 E12 3200 G3 3645 G7 7204 E2
2142 F9 3019 B4 3406 D6 4607 F4 2405 D11 3201 G3 3646 G6 7207 E4
2143 G8 3020 B4 3407 D6 4608 H4 2501 C9 3202 E2 3647 H9 7208 D2
2144 F9 3021 B4 3409 D5 4901 C2 2504 C7 3203 G3 3648 E8 7402 E11
2145 G8 3022 B4 3411 D6 4902 C2 2505 H11 3204 G3 3710 G7 7403 F12
2146 F6 3024 B4 3412 C6 5100 F8 2506 G12 3205 G3 3711 G6 7500 H11
2147 E9 3026 B4 3413 D6 5101 G7 2507 C8 3206 G3 3720 F7 7502 B8
2213 D10 3027 B4 3414 C6 5102 G7 2510 C8 3207 F2 3721 F6 7601 G9
2233 F9 3028 B4 3501 F2 5300 H12 2511 H12 3208 G3 3731 F7 7704 I6
2240 F8 3030 B5 3503 F2 5301 H13 2512 H11 3209 G3 3732 F6 7707 H6
2241 F9 3038 E1 3504 F2 5302 H13 2513 C8 3210 G3 3735 C6 7713 D7
2300 I10 3100 E8 3505 F2 5402 D5 2516 B8 3211 G3 3736 C6 7714 C6
2301 I10 3101 E8 3506 F2 5403 F2 2517 B8 3212 G4 3737 C6 7716 D1
2302 H10 3102 E9 3509 F2 5501 H3 2518 G11 3213 G4 3738 B6 7717 C5
2303 H10 3103 E9 3510 F2 5504 G2 2519 H11 3214 F1 3739 B6 7719 C7
2304 G12 3104 F8 3511 F2 5700 B10 2520 G11 3215 G4 3740 H6 7721 C5
2305 F12 3105 G8 3512 F2 5702 B10 2524 G12 3216 G4 3741 H6 7800 D8
2307 G12 3106 E9 3513 F2 5703 H2 2601 E7 3217 G4 3742 B6 7801 E9
2308 H13 3107 G8 3514 F2 5704 G4 2603 G10 3218 G4 3743 B6 7802 E8
2309 H13 3108 E8 3515 F2 5709 C10 2604 H10 3219 F2 3744 C5 7902 C11
2310 H12 3110 F8 3516 G2 5710 C11 2606 G7 3221 G4 3745 C5
2312 G12 3111 E8 3517 G3 5718 I10 2608 G10 3222 G4 3746 C6
2313 G12 3112 E9 3518 G2 5719 B7 2609 H7 3223 G4 3747 B5
2314 G11 3113 E9 3519 G3 5720 B7 2610 H8 3224 G4 3748 B5
2315 E13 3114 E9 3520 H4 5723 B7 2612 H8 3225 E2 3749 H6
2316 E13 3116 E8 3521 H4 5726 C7 2613 H7 3226 F2 3750 H6
2317 H11 3117 F8 3522 H4 5801 E6 2614 H7 3227 G4 3751 B5
2318 I11 3122 F6 3523 H4 5900 B3 2615 H10 3228 G4 3752 B6
2319 I11 3123 G8 3524 H3 5901 C2 2616 H10 3229 G4 3754 C5
2320 E13 3124 F7 3526 I3 5902 C2 2617 H10 3233 E1 3755 C5
2321 G13 3125 G7 3527 H3 5903 B3 2618 H10 3234 E1 3756 C5
2322 F12 3126 F7 3528 I3 5904 D4 2619 F7 3235 G4 3757 B5
2323 F12 3127 G7 3529 H3 5905 B3 2620 G7 3236 F2 3758 B5
2400 F3 3128 G7 3530 G5 5906 C3 2621 H9 3237 F2 3759 G6
2401 F3 3129 G7 3531 G5 6100 E8 2622 H10 3238 E1 3760 G6
2403 F5 3130 G6 3633 D2 6101 E8 2623 F10 3239 F2 3761 B5
2408 D10 3131 G6 3649 D2 6400 D6 2624 E9 3240 E1 3762 B5
2410 E3 3132 F8 3700 C10 7100 E8 2625 E9 3241 F2 3773 B6
2411 E4 3133 F6 3701 C10 7101 E9 2626 G7 3242 G5 3801 E10
2412 E2 3134 G6 3702 B10 7102 F6 2627 F7 3243 E1 3802 D10
2413 D6 3136 F6 3703 B10 7103 E9 2628 H8 3244 E1 3803 E9
2414 D6 3138 G6 3704 C8 7105 G7 2629 H9 3245 G2 3804 E9
2415 C6 3142 F7 3705 C8 7106 F6 2630 G10 3246 F2 3805 E9
2417 C5 3143 F7 3706 C10 7107 F5 2631 F10 3247 F5 3806 E9
2418 D6 3144 F7 3707 C8 7108 F6 2632 E9 3250 E5 3807 D9
2500 B6 3145 F7 3708 B8 7109 E9 2633 E8 3251 C3 3808 E8
2521 F3 3146 F7 3709 B8 7110 F8 2634 F7 3252 E2 3809 E8
2522 F2 3147 F7 3712 B8 7111 G8 2637 G7 3255 E5 3810 E7
2523 F2 3149 G9 3713 C10 7209 F9 2703 G7 3256 E2 3811 E7
2525 G2 3150 G9 3714 B8 7300 H11 2704 G6 3257 E2 3812 D9
2526 H3 3152 F8 3715 C9 7301 G12 2710 I6 3266 C3 3813 D9
2527 H2 3153 F8 3716 C9 7303 F13 2711 F7 3267 D6 3902 C11
2528 H3 3154 G9 3717 C9 7305 D13 2712 F6 3268 D5 3907 C12
2529 H2 3155 G9 3718 B9 7400 C11
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 Electrical Diagrams and PWB’s SD-5.00SACH 7. 50

PCBAS SD5.00SA_CH NEU FL

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PCBAS SD5.00SA_CH NEU FL

PCBAS SD5.00SA_CH NEU FL

PCBAS SD5.00SA_CH NEU FL

PCBAS SD5.00SA_CH NEU FL

PCBAS SD5.00SA_CH NEU FL

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PCBAS SD5.00SA_CH NEU FL

PCBAS SD5.00CH NEU FL

PCBAS SD5.00CH NEU FL

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PCBAS SD5.00CH NEU FL

OEM 313924882271

OEM 313924882271

OEM 313924882271

OEM 313924882271

OEM 313924882271
313924882281

313924882441

313924882281

313924882441

313924882281

313924882441

313924882281

313924882441

313924882281

313924882441
ITEM DESCRIPTION ITEM DESCRIPTION ITEM DESCRIPTION ITEM DESCRIPTION ITEM DESCRIPTION

1013 CON H 30P F 1.00 SM FFC 0.3 R X X X 2522 CER2 0603 X7R 50V 1N5 COL X X X 3026 RST SM 0603 33R PM5 COL X X 3322 RST SM 0603 RC22H 470R PM1 R X X X 5718 IND FXD 0603 EMI 100MHZ 60R R X X X
1100 CON BM H 24P F 0.50 FFC 0.3 R X X X 2524 CER2 0603 X7R 16V 100N COL X X X 3027 RST SM 0603 33R PM5 COL X X 3324 RST SM 0603 15K PM5 COL X X X 5719 IND FXD 0603 EMI 100MHZ 60R R X X X
1201 RES XTL SM 8M4672 30P AT-41C R X X X 2525 ELCAP SM 6V3 47U PM20 COL R X X X 3028 RST SM 0603 33R PM5 COL X X 3325 RST SM 0603 12K PM5 COL X X X 5720 IND FXD 0603 EMI 100MHZ 60R R X X X
1300 CON V 11P F 1.00 SM FFC 0.3 R X X X 2533 CER2 0603 X7R 16V 100N COL X X 3029 RST SM 0603 33R PM5 COL X X X 3326 RST SM 0805 2R2 PM5 COL R X X X 5721 IND FXD 0603 EMI 100MHZ 60R R X X X
1301 CON V 8P F 1.00 SM FFC 0.3 R X X X 2604 CER2 0603 X7R 25V 22N COL X X X 3030 RST SM 0603 33R PM5 COL X X 3327 RST SM 0805 2R2 PM5 COL R X X X 5722 FXDIND SM 1210 12U PM5 COL R X X X
1400 CON BM V 1P M RT-01T-1.0B B X 2605 ELCAP SM 16V 10U PM20 COL R X X X 3036 RST SM 0603 10K PM5 COL X X 3328 RST SM 0603 15K PM5 COL X X X 5723 IND FXD 0603 EMI 100MHZ 60R R X X X
1500 CON H 7P M 2.00 SM PH R X X X 2606 CER2 0603 X7R 16V 100N COL X X X 3037 RST NETW 1206 4X 47R PM5 COL R X X 3332 RST SM 0603 6K8 PM5 COL X X X 5724 FXDIND SM 1210 12U PM5 COL R X X X
1701 CON H 7P M 2.00 SM PH R X X X 2607 ELCAP SM 16V 10U PM20 COL R X X X 3038 RST NETW 1206 4X 47R PM5 COL R X 3333 RST SM 0603 6K8 PM5 COL X X X 5725 IND FXD 0603 EMI 100MHZ 60R R X X X
1702 CON H 8P F 1.00 SM FFC 0.3 R X 2608 CER2 0603 X7R 16V 100N COL X X X 3100 RST SM 0603 56K PM5 COL X X X 3334 RST SM 0603 6K8 PM5 COL X X X 5726 IND FXD 1206 EMI 100MHZ 50R R X X X
1703 CON H 30P F 1.00 SM FFC 0.3 R X X X 2609 CER1 0603 NP0 50V 22P COL X X X 3101 RST SM 0603 1K PM5 COL X X X 3336 RST SM 0805 JUMP. 0R05 COL R X X X 5801 IND FXD 0603 EMI 100MHZ 60R R X X
1704 CON H 24P F 1.00 SM FFC 0.3 R X X 2610 CER1 0603 NP0 50V 22P COL X X X 3102 RST SM 0603 22K PM5 COL X X X 3337 RST SM 0805 JUMP. 0R05 COL R X X X 5901 IND FXD 0603 EMI 100MHZ 600R R X X
1900 CON V 11P F 1.00 SM FFC 0.3 R X X X 2613 CER1 0603 NP0 50V 22P COL X X X 3103 RST SM 0603 1K PM5 COL X X X 3340 RST SM 0603 15K PM5 COL X X X 5902 IND FXD 0603 EMI 100MHZ 600R R X X
2000 CER2 0603 X7R 10V 220N COL X X X 2614 CER1 0603 NP0 50V 22P COL X X X 3104 RST SM 0603 RC22H 12K PM1 R X X X 3341 RST SM 0603 2K7 PM5 COL X X X 5903 IND FXD 0603 EMI 100MHZ 600R R X
2100 CER1 0603 NP0 50V 47P COL X X X 2619 CER2 0603 X7R 16V 100N COL X X X 3105 RST SM 0603 RC21 82R PM5 R X X X 3342 RST SM 0603 JUMP. 0R05 COL X X X 5904 IND FXD 0603 EMI 100MHZ 600R R X X
2101 CER2 0603 X7R 50V 4N7 COL X X X 2620 CER2 0603 X7R 16V 100N COL X X X 3106 RST SM 0603 220R PM5 COL X X X 3343 RST SM 0603 1R PM5 COL X X X 5905 IND FXD 0603 EMI 100MHZ 600R R X X X
2102 CER2 0603 X7R 16V 100N COL X X X 2621 CER2 0603 X7R 50V 1N COL X X X 3107 RST SM 0603 RC21 82R PM5 R X X X 3345 RST SM 0603 3K3 PM5 COL X X X 6100 DIO SIG SM BAS316 (COL) R X X X
2103 CER1 0603 NP0 25V 1N COL X X X 2622 CER2 0603 X7R 16V 100N COL X X X 3108 RST SM 0603 2K2 PM5 COL X X X 3401 RST SM 0603 10K PM5 COL X X X 6101 DIO SIG SM BAS316 (COL) R X X X
2104 CER2 0603 X7R 16V 100N COL X X X 2623 CER2 0603 X7R 16V 100N COL X X X 3110 RST SM 0603 68K PM5 COL X X X 3402 RST SM 0603 100K PM5 COL X X X 6300 DIO REC SM S1D (VISH) R X X X
2105 CER2 0603 Y5V 10V 1U COL X X X 2624 CER2 0603 X7R 16V 100N COL X X X 3111 RST SM 0603 220R PM5 COL X X X 3403 RST SM 0603 10K PM5 COL X X X 6301 DIO REC SM S1D (VISH) R X X X
2106 CER2 0603 X7R 16V 68N COL X X X 2625 CER2 0603 X7R 16V 100N COL X X X 3112 RST SM 0603 10K PM5 COL X X X 3404 RST SM 0603 22K PM5 COL X X X 6302 DIO REC SM S1D (VISH) R X X X
2107 CER2 0603 Y5V 10V 1U COL X X X 2626 CER2 0603 X7R 16V 100N COL X X X 3113 RST SM 0603 33K PM5 COL X X X 3405 RST SM 0603 2K2 PM5 COL X X X 6400 DIO SIG SM BAS316 (COL) R X X X
2108 CER2 0603 X7R 16V 100N COL X X X 2627 CER2 0603 X7R 16V 100N COL X X X 3114 RST SM 0603 1K8 PM5 COL X X X 3406 RST SM 0603 22K PM5 COL X X X 7100 TRA SIG SM BC847BPN (PHSE) R X X X
2109 CER2 0603 X7R 16V 100N COL X X X 2628 CER2 0603 X7R 16V 100N COL X X X 3116 RST SM 0603 1K PM5 COL X X X 3407 RST SM 0603 10K PM5 COL X X X 7101 IC SM MC34072D (MOTA) R X X X
2110 CER1 0603 NP0 25V 1N COL X X X 2629 CER2 0603 X7R 16V 100N COL X X X 3117 RST SM 0603 390R PM5 COL X X X 3409 RST SM 0603 10K PM5 COL X X X 7102 IC SM L78L05ACD (ST00) R X X X
2112 CER2 0603 X7R 16V 100N COL X X X 2630 CER2 0603 X7R 16V 100N COL X X X 3118 RST SM 0603 10K PM5 COL X X X 3411 RST SM 0603 22K PM5 COL X X X 7103 TRA SIG SM BC847B (COL) R X X X
2113 CER2 0603 X7R 16V 100N COL X X X 2631 CER2 0603 X7R 16V 100N COL X X X 3119 RST SM 0603 10K PM5 COL X X X 3412 RST SM 0603 4K7 PM5 COL X X X 7105 IC SM TZA1033HL/K2 (PHSE) R X X X
2115 CER2 0603 X7R 50V 4N7 COL X X X 2632 CER2 0603 X7R 16V 100N COL X X X 3120 RST SM 0603 10K PM5 COL X X X 3413 RST SM 0603 22K PM5 COL X X X 7106 IC SM MC34072D (MOTA) R X X X
2117 CER2 0603 X7R 25V 22N COL X X X 2633 CER2 0603 X7R 16V 100N COL X X X 3121 RST SM 0603 10K PM5 COL X X X 3414 RST SM 0603 22K PM5 COL X X X 7107 TRA SIG SM BC807-25 (COL) R X X X
2118 CER1 0603 NP0 50V 18P COL X X X 2634 CER2 0603 X7R 16V 100N COL X X X 3122 RST SM 0603 RC22H 91R PM1 R X X X 3501 RST SM 0603 1K PM5 COL X X X 7108 TRA SIG SM BC817-25 (COL) R X X X
2119 CER2 0603 X7R 16V 100N COL X X X 2635 ELCAP SM 35V 4U7 PM20 COL R X X X 3123 RST SM 0603 10K PM5 COL X X X 3502 RST SM 0603 10K PM5 COL X X X 7109 FET SIG SM BST82 (PHSE) R X X X
2120 CER2 0603 X7R 16V 100N COL X X X 2636 ELCAP SM 35V 4U7 PM20 COL R X X X 3124 RST SM 0805 2R2 PM5 COL R X X X 3503 RST SM 0603 4K7 PM5 COL X X X 7110 TRA SIG SM BFS20 (PHSE) R X X X
2121 CER2 0603 X7R 25V 22N COL X X X 2637 CER2 0603 X7R 16V 100N COL X X X 3125 RST SM 0603 10K PM5 COL X X X 3504 RST SM 0603 4K7 PM5 COL X X X 7111 TRA SIG SM BFS20 (PHSE) R X X X
2122 CER2 0603 X7R 16V 100N COL X X X 2638 CER1 0603 NP0 50V 100P COL X X X 3126 RST SM 0603 22R PM5 COL X X X 3505 RST SM 0603 10K PM5 COL X X X 7200 IC SM NCP301LSN45 (ONSE) R X X X
2123 CER2 0603 X7R 10V 220N COL X X X 2700 CER2 0603 X7R 16V 100N COL X X X 3127 RST SM 0603 10K PM5 COL X X X 3506 RST SM 0603 10K PM5 COL X X X 7201 TRA SIG SM BC857B (COL) R X X X
2124 CER2 0603 X7R 16V 100N COL X X X 2701 CER1 0603 NP0 50V 47P COL X X X 3128 RST SM 0603 470K PM5 COL X X X 3507 RST SM 0603 10K PM5 COL X X 7202 TRA SIG SM BC847BPN (PHSE) R X X X
2129 CER2 0603 X7R 16V 100N COL X X X 2702 ELCAP SM 50V 2U2 PM20 COL R X X X 3129 RST SM 0603 220R PM5 COL X X X 3508 RST SM 0603 1K PM5 COL X X 7207 IC SM SAA7812HL/M3B (PHSE) Y X X X
2131 CER2 0603 X7R 16V 100N COL X X X 2703 CER1 0603 NP0 50V 27P COL X X X 3130 RST SM 0603 2K2 PM5 COL X X X 3509 RST SM 0603 100R PM5 COL X X X 7208 IC SM M29F002BT-70K1 / V7.12.0 X X
2132 CER2 0603 X7R 16V 100N COL X X X 2704 CER1 0603 NP0 50V 47P COL X X X 3131 RST SM 0603 6K8 PM5 COL X X X 3510 RST SM 0603 10K PM5 COL X X X IC SM M29F002BT-70K1 / V7.13.0 X
2133 CER2 0603 X7R 16V 100N COL X X X 2705 CER1 0603 NP0 50V 47P COL X X X 3132 RST SM 0603 RC22H 91R PM1 R X X X 3512 RST SM 0603 6K8 PM5 COL X X X 7300 IC SM BA6665FM (RHM0) R X X X
2134 RST SM 0603 JUMP. 0R05 COL X X X 2706 ELCAP SM 16V 100U PM20 COL R X X X 3133 RST SM 0603 4K7 PM5 COL X X X 3531 RST SM 0603 4K7 PM5 COL X X X 7301 IC SM LM833D (MOTA) R X X X
2135 RST SM 0603 JUMP. 0R05 COL X X X 2707 CER2 0603 X7R 16V 100N COL X X X 3134 RST SM 0603 4K7 PM5 COL X X X 3600 RST NETW 1206 4X 47R PM5 COL R X X 7303 IC SM BA5938FM (RHM0) R X X X
2137 CER2 0603 X7R 16V 100N COL X X X 2708 CER2 0603 X7R 16V 100N COL X X X 3136 RST SM 0603 100K PM5 COL X X X 3761 RST SM 0603 47K PM5 COL X X X 7305 IC SM L78M09CDT (ST00) R X X X
2139 CER2 0603 X7R 10V 220N COL X X X 2709 ELCAP SM 50V 2U2 PM20 COL R X X X 3138 RST SM 0603 10K PM5 COL X X X 3762 RST SM 0603 220R PM5 COL X X X 7400 IC SM M24C64-WMN6 (ST00) R X X X
2140 CER1 0603 NP0 25V 680P COL X X X 2710 CER2 0603 X7R 16V 100N COL X X X 3142 RST SM 0603 JUMP. 0R05 COL X X X 3763 RST NETW 1206 4X100R PM5 COL R X 7402 IC SM M29W160ET-70N6/VER 5.6.14 X
2141 CER1 0603 NP0 25V 680P COL X X X 2711 CER1 0603 NP0 50V 27P COL X X X 3143 RST SM 0603 JUMP. 0R05 COL X X X 3766 RST SM 0603 3K3 PM5 COL X X X IC SM M29W160ET-70N6/VER 5.1.06 X
2142 CER2 0603 X7R 50V 6N8 COL X X X 2712 CER1 0603 NP0 50V 47P COL X X X 3144 RST SM 0603 JUMP. 0R05 COL X X X 3767 RST SM 0603 3K3 PM5 COL X X X IC SM M29W160ET-70N6/VER 5.6.20 X
2143 CER2 0603 X7R 50V 6N8 COL X X X 2713 ELCAP SM 16V 100U PM20 COL R X X X 3145 RST SM 0603 JUMP. 0R05 COL X X X 3770 RST SM 1206 JUMP. MAX 0R05 R X X X 7403 IC SM M29W160ET-70N6/VER 5.6.14 X
2144 CER1 0603 NP0 50V 8P2 COL X X X 2714 CER2 0603 X7R 16V 100N COL X X X 3146 RST SM 0603 JUMP. 0R05 COL X X X 3771 RST SM 1206 JUMP. MAX 0R05 R X IC SM M29W160ET-70N6/VER 5.1.06 X
2145 CER1 0603 NP0 50V 8P2 COL X X X 2715 CER1 0603 NP0 25V 1N COL X X X 3147 RST SM 0603 JUMP. 0R05 COL X X X 3772 RST SM 1206 JUMP. MAX 0R05 R X X X IC SM M29W160DT-70N1/VER 5.6.20 X
2146 CER1 0603 NP0 25V 1N COL X X X 2716 CER1 0603 NP0 25V 1N COL X X X 3152 RST SM 0603 22K PM5 COL X X X 3773 RST SM 1206 JUMP. MAX 0R05 R X 7404 TRA SIG SM BC847B (COL) R X X X
2147 CER2 0603 X7R 50V 10N COL X X X 2717 CER1 0603 NP0 50V 47P COL X X X 3153 RST SM 0603 22R PM5 COL X X X 3774 RST SM 1206 JUMP. MAX 0R05 R X X X 7405 TRA SIG SM BC847B (COL) R X X X
2200 CER2 0603 X7R 16V 100N COL X X X 2718 CER2 0603 X7R 16V 100N COL X X X 3154 RST SM 0603 22K PM5 COL X X X 3775 RST SM 1206 JUMP. MAX 0R05 R X 7406 IC SM 74LVC00APW (PHSE) R X X X
2201 CER2 0603 X7R 16V 100N COL X X X 2719 CER1 0603 NP0 50V 47P COL X X X 3155 RST SM 0603 22R PM5 COL X X X 3801 RST SM 0603 3K9 PM5 COL X X 7409 TRA SIG SM BC847B (COL) R X X X
2202 CER2 0603 X7R 16V 100N COL X X X 2720 ELCAP SM 50V 2U2 PM20 COL R X X X 3156 RST SM 0603 100R PM5 COL X X X 3802 RST SM 0603 3K9 PM5 COL X X 7412 IC SM NCP301LSN27 (ONSE) R X X X
2203 CER2 0603 X7R 16V 100N COL X X X 2721 CER1 0603 NP0 50V 27P COL X X X 3157 RST SM 0603 100R PM5 COL X X X 3803 RST SM 0603 22R PM5 COL X X 7413 TRA SIG SM BC857B (COL) R X X X
2204 CER2 0603 X7R 16V 100N COL X X X 2722 CER1 0603 NP0 50V 47P COL X X X 3158 RST SM 0603 39K PM5 COL X X X 3805 RST SM 0603 RC22H 390R PM1 R X X 7500 IC SM K4S641632F-TC70 (SMGK) R X X X
2205 CER2 0603 X7R 16V 100N COL X X X 2723 CER2 0603 X7R 16V 100N COL X X 3159 RST SM 0603 820R PM5 COL X X X 3806 RST SM 0603 12K PM5 COL X X 7502 IC SM K4S641632F-TC70 (SMGK) R X X
2206 CER2 0603 X7R 16V 100N COL X X X 2724 CER2 0603 X7R 16V 100N COL X X X 3160 RST SM 0603 39K PM5 COL X X X 3807 RST SM 0603 6K8 PM5 COL X X 7508 TRA SIG SM BC847BS (PHSE) R X X X
2207 CER2 0603 X7R 16V 100N COL X X X 2725 ELCAP SM 50V 2U2 PM20 COL R X X X 3161 RST SM 0603 820R PM5 COL X X X 3808 RST SM 0603 33R PM5 COL X X 7601 IC SM STI5588LVA (ST00) Y X X X
2208 CER2 0603 X7R 16V 100N COL X X X 2726 CER1 0603 NP0 50V 47P COL X X X 3162 RST SM 0603 100R PM5 COL X X X 3809 RST SM 0603 33R PM5 COL X X 7700 FET SIG SM BSN20 (PHSE) R X X X
2209 CER2 0603 X7R 16V 100N COL X X X 2727 CER1 0603 NP0 50V 47P COL X X X 3163 RST SM 0603 100R PM5 COL X X X 3812 RST SM 0603 10K PM5 COL X X 7701 TRA SIG SM BC847BPN (PHSE) R X X X
2210 CER2 0603 X7R 16V 100N COL X X X 2728 ELCAP SM 16V 10U PM20 COL R X X X 3200 RST SM 0603 22K PM5 COL X X X 3816 RST SM 0603 33R PM5 COL X X 7703 FET SIG SM BSN20 (PHSE) R X X X
2211 CER2 0603 X7R 16V 100N COL X X X 2729 ELCAP SM 16V 100U PM20 COL R X X X 3202 RST SM 0603 1K PM5 COL X X X 3900 RST SM 0603 10K PM5 COL X X 7704 IC SM LF33ABDT (ST00) R X X X
2212 CER2 0603 X7R 16V 100N COL X X X 2730 CER2 0603 X7R 16V 100N COL X X X 3204 RST SM 0603 22K PM5 COL X X X 3901 RST SM 0603 10K PM5 COL X X 7705 TRA SIG SM BC847BPN (PHSE) R X X X
2213 CER2 0603 X7R 16V 100N COL X X X 2731 CER2 0603 X7R 16V 100N COL X X X 3205 RST SM 0603 22K PM5 COL X X X 3902 RST SM 0603 33R PM5 COL X X 7707 IC SM LD1117ADT18 (ST00) R X X X
2214 CER2 0603 X7R 16V 100N COL X X X 2732 ELCAP SM 50V 2U2 PM20 COL R X X X 3207 RST SM 0603 1K PM5 COL X X X 3903 RST SM 0603 RC21 56R PM5 R X X 7708 FET SIG SM BSN20 (PHSE) R X X X
2215 CER2 0603 X7R 16V 100N COL X X X 2733 CER1 0603 NP0 50V 47P COL X X X 3209 RST SM 0603 22K PM5 COL X X X 3904 RST SM 0603 RC21 56R PM5 R X X 7709 TRA SIG SM BC847BPN (PHSE) R X X X
2216 CER2 0603 Y5V 10V 1U COL X X X 2734 CER1 0603 NP0 50V 47P COL X X X 3210 RST SM 0603 22K PM5 COL X X X 3905 RST SM 0603 33R PM5 COL X X 7710 FET SIG SM BSN20 (PHSE) R X X X
2217 CER2 0603 X7R 50V 10N COL X X X 2735 CER2 0603 X7R 16V 100N COL X X X 3212 RST SM 0603 22K PM5 COL X X X 3906 RST SM 0603 3K3 PM5 COL X X 7713 IC SM LF18ABDT (ST00) R X X
2218 CER2 0603 Y5V 10V 1U COL X X X 2736 CER2 0603 X7R 16V 100N COL X X X 3214 RST SM 0603 4K7 PM5 COL X X X 3907 RST SM 0603 47R PM5 COL X X X 7714 TRA SIG SM BC847BPN (PHSE) R X X X
2219 CER1 0603 NP0 50V 22P COL X X X 2737 CER2 0603 X7R 16V 100N COL X X X 3216 RST SM 0603 22K PM5 COL X X X 3908 RST SM 0603 680R PM5 COL X 7716 IC SM LD1117DT33 (ST00) R X X X
2220 CER1 0603 NP0 50V 22P COL X X X 2738 CER1 0603 NP0 50V 22P COL X X X 3218 RST SM 0603 22K PM5 COL X X X 3909 RST SM 0603 1K5 PM5 COL X 7717 TRA SIG SM BC847BPN (PHSE) R X X X
2221 CER2 0603 X7R 16V 100N COL X X X 2739 CER2 0603 X7R 16V 100N COL X X X 3219 RST SM 0603 4K7 PM5 COL X X X 3910 RST SM 0603 33R PM5 COL X X 7719 IC SM LD1117DT33 (ST00) R X X X
2223 CER1 0603 NP0 50V 100P COL X X X 2740 ELCAP SM 16V 100U PM20 COL R X X X 3222 RST SM 0603 22K PM5 COL X X X 3912 RST SM 0603 47R PM5 COL X X 7720 IC SM 74HCT1G125GW (PHSE) R X X X
2224 CER1 0603 NP0 50V 100P COL X X X 2741 CER2 0603 X7R 16V 100N COL X X X 3223 RST SM 0603 22K PM5 COL X X X 3913 RST SM 0603 47R PM5 COL X X X 7721 TRA SIG SM BC847BPN (PHSE) R X X X
2225 CER1 0603 NP0 50V 100P COL X X X 2742 ELCAP SM 50V 2U2 PM20 COL R X X X 3226 RST SM 0603 1K PM5 COL X X X 4001 RST SM 0603 JUMP. 0R05 COL X X 7800 IC SM SAA7329HL (PHSE) Y X X
2226 CER1 0603 NP0 50V 100P COL X X X 2743 CER1 0603 NP0 50V 47P COL X X X 3227 RST SM 0603 22K PM5 COL X X X 4002 RST SM 0603 JUMP. 0R05 COL X X 7801 TRA SIG SM BFS20 (PHSE) R X X
2227 CER2 0603 X7R 16V 100N COL X X X 2744 CER1 0603 NP0 50V 47P COL X X X 3229 RST NETW 1206 4X100R PM5 COL R X X X 4005 RST SM 0603 JUMP. 0R05 COL X X X 7803 IC SM 74LVC125APW (PHSE) R X X
2228 CER2 0603 X7R 16V 100N COL X X X 2745 CER2 0603 X7R 16V 100N COL X X X 3236 RST SM 0603 4K7 PM5 COL X X X 4006 RST SM 0603 JUMP. 0R05 COL X X X 7901 IC SM MK2703STR (ICST) R X X
2229 CER2 0603 X7R 16V 100N COL X X X 2746 CER2 0603 X7R 16V 100N COL X X X 3237 RST SM 0603 1K PM5 COL X X X 4014 RST SM 0603 JUMP. 0R05 COL X 7902 IC SM ICS612G-01 (ICST) R X X
2230 CER2 0603 X7R 16V 100N COL X X X 2747 ELCAP SM 16V 10U PM20 COL R X X X 3239 RST SM 0603 220K PM5 COL X X X 4104 RST SM 0603 JUMP. 0R05 COL X X X 7903 OSC XTL SM 27MHZ 20P FXO-31 R X
2231 CER2 0603 X7R 16V 100N COL X X X 2748 ELCAP SM 16V 100U PM20 COL R X X X 3241 RST SM 0603 1K PM5 COL X X X 4201 RST SM 0603 JUMP. 0R05 COL X X X 7904 IC SM 74HCT04PW (PHSE) R X X
2232 CER2 0603 X7R 10V 220N COL X X X 2749 CER2 0603 X7R 16V 100N COL X X 3242 RST SM 0603 22K PM5 COL X X X 4203 RST SM 0603 JUMP. 0R05 COL X X X
2234 CER2 0603 X7R 50V 1N8 PM10 R X X X 2750 CER2 0603 X7R 16V 100N COL X X 3245 RST SM 0603 100R PM5 COL X X X 4205 RST SM 0603 JUMP. 0R05 COL X X X
2235 CER2 0603 X7R 16V 33N COL X X X 2751 ELCAP SM 16V 100U PM20 COL R X X 3246 RST SM 0603 100R PM5 COL X X X 4301 RST SM 0603 JUMP. 0R05 COL X X X
2236 CER2 0603 X7R 50V 1N8 PM10 R X X X 2800 CER2 0603 X7R 16V 100N COL X X 3247 RST SM 0603 330R PM5 COL X X X 4303 RST SM 0805 JUMP. 0R05 COL R X X X
2237 CER2 0603 X7R 16V 100N COL X X X 2801 CER2 0603 X7R 16V 100N COL X X 3250 RST SM 0603 RC22H 24K PM1 R X X X 4304 RST SM 0805 JUMP. 0R05 COL R X X X
2238 CER2 0603 X7R 16V 100N COL X X X 2802 CER2 0603 X7R 16V 100N COL X X 3251 RST SM 0603 10K PM5 COL X X X 4401 RST SM 0603 JUMP. 0R05 COL X X X
2239 CER2 0603 X7R 16V 100N COL X X 2803 CER2 0603 X7R 16V 100N COL X X 3255 RST SM 0603 150R PM5 COL X X X 4500 RST SM 0603 JUMP. 0R05 COL X X X
2300 CER2 0603 X7R 16V 100N COL X X X 2804 CER2 0603 X7R 16V 100N COL X X 3256 RST SM 0603 100R PM5 COL X X X 4600 RST SM 0603 JUMP. 0R05 COL X
2301 CER2 0603 X7R 16V 100N COL X X X 2805 CER2 0603 X7R 16V 100N COL X X 3257 RST NETW 1206 4X 47R PM5 COL R X X X 4605 RST SM 0603 JUMP. 0R05 COL X X X
2302 CER2 0603 X7R 16V 100N COL X X X 2806 CER2 0603 X7R 16V 100N COL X X 3263 RST SM 0603 10K PM5 COL X X X 4607 RST SM 0603 JUMP. 0R05 COL X
2303 CER2 0603 X7R 16V 100N COL X X X 2807 CER2 0603 X7R 16V 100N COL X X 3266 RST SM 0603 10K PM5 COL X X X 4800 RST SM 0603 JUMP. 0R05 COL X X
2304 CER2 0603 X7R 16V 100N COL X X X 2808 CER2 0603 X7R 16V 100N COL X X 3267 RST SM 0603 3K9 PM5 COL X X X 4803 RST SM 0603 JUMP. 0R05 COL X X
2305 CER2 0603 X7R 16V 100N COL X X X 2809 CER2 0603 X7R 16V 100N COL X X 3268 RST SM 0603 2K7 PM5 COL X X X 4902 RST SM 0603 JUMP. 0R05 COL X X X
2306 CER2 0603 X7R 16V 100N COL X X X 2810 CER2 0603 X7R 50V 2N2 COL X X 3270 RST SM 0603 3K9 PM5 COL X X X 5100 IND FXD 0603 EMI 100MHZ 60R R X X X
2307 CER2 0603 X7R 16V 100N COL X X X 2811 CER2 0603 X7R 50V 10N COL X X 3271 RST SM 0603 10K PM5 COL X X X 5101 IND FXD 0603 EMI 100MHZ 60R R X X X
2311 CER2 0603 X7R 16V 100N COL X X X 2813 CER1 0603 NP0 50V 56P COL X X 3272 RST SM 0603 10K PM5 COL X X X 5102 IND FXD 0603 EMI 100MHZ 60R R X X X
2313 CER2 0603 X7R 16V 100N COL X X X 2814 CER2 0603 X7R 16V 100N COL X X 3273 RST SM 0603 10K PM5 COL X X X 5200 IND FXD 0603 EMI 100MHZ 60R R X X X
2315 CER2 0603 X7R 16V 100N COL X X X 2816 CER2 0603 X7R 16V 100N COL X X 3274 RST SM 0603 10K PM5 COL X X X 5201 IND FXD 0603 EMI 100MHZ 60R R X X X
2316 CER2 0603 X7R 16V 100N COL X X X 2817 CER2 0603 X7R 50V 1N COL X X X 3275 RST SM 0603 4K7 PM5 COL X X X 5202 IND FXD 0603 EMI 100MHZ 60R R X X X
2320 ELCAP SM 16V 47U PM20 COL R X X X 2900 ELCAP SM 16V 100U PM20 COL R X X 3277 RST SM 0603 47R PM5 COL X X X 5203 IND FXD 0603 EMI 100MHZ 60R R X X X
2321 ELCAP SM 16V 47U PM20 COL R X X X 2901 CER2 0603 X7R 16V 100N COL X X 3278 RST SM 0603 10K PM5 COL X X X 5401 IND FXD 0603 EMI 100MHZ 60R R X X X
2402 CER2 0603 X7R 16V 100N COL X X X 2902 CER2 0603 X7R 50V 10N COL X X 3279 RST SM 0603 10K PM5 COL X X X 5402 IND FXD 0603 EMI 100MHZ 60R R X X X
2405 CER2 0603 X7R 16V 100N COL X X X 2903 CER1 0603 NP0 50V 22P COL X X 3280 RST SM 0603 4K7 PM5 COL X X X 5502 FXDIND 0805 100MHZ 600R COL R X X
2408 CER2 0603 X7R 16V 100N COL X X X 2904 CER1 0603 NP0 50V 22P COL X X 3282 RST SM 0603 4K7 PM5 COL X X X 5504 IND FXD 0603 EMI 100MHZ 600R R X X X
2410 ELCAP SM 16V 100U PM20 COL R X X X 2906 CER2 0603 X7R 16V 100N COL X 3287 RST SM 0603 JUMP. 0R05 COL X X X 5505 FXDIND 0805 100MHZ 600R COL R X X X
2411 ELCAP SM 16V 100U PM20 COL R X X X 2907 CER2 0603 X7R 16V 100N COL X X 3288 RST SM 0603 10K PM5 COL X X X 5600 IND FXD 0603 EMI 100MHZ 60R R X X X
2414 CER2 0603 X7R 16V 100N COL X X X 2908 CER2 0603 X7R 16V 100N COL X X X 3289 RST SM 0603 10K PM5 COL X X X 5601 IND FXD 0603 EMI 100MHZ 60R R X X X
2415 CER2 0603 Y5V 10V 1U COL X X X 2910 ELCAP SM 16V 47U PM20 COL R X X X 3290 RST SM 0603 10K PM5 COL X X X 5602 IND FXD 0603 EMI 100MHZ 60R R X X X
2417 ELCAP SM 16V 10U PM20 COL R X X X 2911 CER2 0603 X7R 16V 100N COL X X X 3291 RST SM 0603 10K PM5 COL X X X 5603 IND FXD 0603 EMI 100MHZ 60R R X X X
2418 CER2 0603 Y5V 10V 470N COL X X X 2912 ELCAP SM 16V 47U PM20 COL R X X X 3294 RST SM 0603 47R PM5 COL X X X 5700 IND FXD 0603 EMI 100MHZ 60R R X X X
2500 ELCAP SM 6V3 47U PM20 COL R X X 2913 CER2 0603 X7R 16V 100N COL X X X 3300 RST SM 0805 1R PM5 COL R X X X 5701 FXDIND SM 1210 4U7 PM5 COL R X X X
2501 CER2 0603 X7R 16V 100N COL X X 2915 CER1 0603 NP0 50V 22P COL X X X 3301 RST SM 0805 1R PM5 COL R X X X 5702 IND FXD 0603 EMI 100MHZ 60R R X X X
2504 CER2 0603 X7R 16V 100N COL X X 2916 CER1 0603 NP0 50V 22P COL X X 3302 RST SM 0805 1R PM5 COL R X X X 5703 IND FXD 0603 EMI 100MHZ 60R R X X X
2505 CER2 0603 X7R 16V 100N COL X X X 2917 CER1 0603 NP0 50V 22P COL X X X 3304 RST SM 0603 RC21 82R PM5 R X X X 5704 IND FXD 1206 EMI 100MHZ 50R R X X X
2506 CER2 0603 X7R 16V 100N COL X X X 2918 CER2 0603 X7R 50V 10N COL X X 3306 RST SM 0603 100K PM5 COL X X X 5705 IND FXD 0603 EMI 100MHZ 60R R X X X
2507 CER2 0603 X7R 16V 100N COL X X 2919 CER2 0603 X7R 50V 10N COL X X 3307 RST SM 0603 RC22H 4K7 PM1 R X X X 5706 FXDIND SM 1210 4U7 PM5 COL R X X X
2510 CER2 0603 X7R 16V 100N COL X X 3003 RST SM 0603 10K PM5 COL X X 3308 RST SM 0603 RC21 82R PM5 R X X X 5708 IND FXD 1206 EMI 100MHZ 50R R X X X
2511 CER2 0603 X7R 16V 100N COL X X X 3008 RST SM 0603 10K PM5 COL X X 3309 RST SM 0603 RC22H 4K7 PM1 R X X X 5709 IND FXD 0603 EMI 100MHZ 60R R X X X
2512 CER2 0603 X7R 16V 100N COL X X X 3010 RST SM 0603 10K PM5 COL X X 3310 RST SM 0603 27K PM5 COL X X X 5710 IND FXD 0603 EMI 100MHZ 60R R X X X
2513 CER2 0603 X7R 16V 100N COL X X 3019 RST SM 0603 33R PM5 COL X X 3312 RST SM 0603 100K PM5 COL X X X 5712 FXDIND SM 1210 4U7 PM5 COL R X X X
2516 CER2 0603 X7R 16V 100N COL X X 3020 RST SM 0603 33R PM5 COL X X 3313 RST SM 0603 27K PM5 COL X X X 5713 IND FXD 0603 EMI 100MHZ 60R R X X
2517 CER2 0603 X7R 16V 100N COL X X 3021 RST SM 0603 33R PM5 COL X X 3315 RST SM 0805 2R2 PM5 COL R X X X 5714 IND FXD 0603 EMI 100MHZ 60R R X X
2518 CER2 0603 X7R 16V 100N COL X X X 3022 RST SM 0603 33R PM5 COL X X 3316 RST SM 0805 2R2 PM5 COL R X X X 5715 FXDIND SM 1210 12U PM5 COL R X X X
2519 CER2 0603 X7R 16V 100N COL X X X 3023 RST SM 0603 33R PM5 COL X X X 3319 RST SM 0603 100K PM5 COL X X X 5716 IND FXD 1206 EMI 100MHZ 50R R X X X CL 36532056_016.eps
2520 CER2 0603 X7R 16V 100N COL X X X 3024 RST SM 0603 33R PM5 COL X X 3321 RST SM 0603 RC22H 470R PM1 R X X X 5717 IND FXD 0603 EMI 100MHZ 60R R X X X 240703
 Alignments SD-5.00SA_CH 8. EN 51

8. Alignments
Not applicable.

9. Circuit Descriptions, List of Abbreviations and IC Data

Index of this chapter: 9.2 Loader/Mono Board
1. Introduction
2. Loader/Mono Board
3. Abbreviations Loader
4. IC Data

Notes: DVDalas2+ Loader-interface

• SD5.00SA_CH is derived from SD4.00SA_CH, the

FRONT-END
difference is only the back-end processor.
• Only the new circuit parts are described. For the other
descriptions, see the SD4.0 Service Manual (3122 785
HF Iguana Program
12240). Buffer Memory
• For a good understanding of the following circuit (front-end
processor)
descriptions, please also check the diagrams in chapter 6
and 7.
I2S S2B

9.1 Introduction
HF SMI
STi55XX
(SDRAM)
9.1.1 Features
BACK-END
(back-end
processor) EMI
(FLASH)
The SD4.0SA_CH modules consist of the Mercury 3 Loader PCM
VAL6013/01 (from Philips Optical Storage), and a Mono Board.
The module is capable of analogue video (with option for digital
FURORE 2
YUV video) and digital audio and SACD decoding. Video Others
Audio

9.1.2 Differences
Module
Interface
The DVD-module SD4.0SA_CH is based on its predecessor CL 26532053_022.eps
the SD4.0, with similar functional block partitioning. However, 260402

the implementation of most functional blocks has been

redesigned due to a new: Figure 9-1 Block Diagram Loader/Mono board
• Furore IC for SACD decoding.
• Module interface. The SD5.00_SA_CH is the 2nd generation Philips Architectural
• Mechanical construction. Standard Design of SACD mono board based on Furore 2, and
will be used in the new generation of SACD players. It is
9.1.3 Modules designed in a multi-task way so that it can support the following
optional main functions:
The main modules are: • SD4.00_SA_CH: Support SACD player with 5-disc
• Mercury 3 Loader - VAL6013/01. changer.
• Mono Board. • SD4.00_SA: Support SACD player with single-disc.
• SD4.00_CH: Support DVD player with 5-disc changer but
without SACD playback.
• SD4.00_SA_I2C: Support SACD player with single-disc
and I2C slave.

The SD4.00_SA_CH (SACHI_4) module consist of the

following key components:
1. OPU: Mercury 2 Loader VAL6011/14 (slim type) for a
single-disc SACD player, or DVD VAM6001/14 mechanism
for a 5-disc SACD changer.
2. Front-end: M2 Basic Engine.
3. Back-end: DVD Host Processor STi55xx and Furore 2
SACD DSD/DST decoder.
4. Power supply: To convert the PSU voltages to the correct
values.
5. Reset circuit: This circuit that the booting of the several
devices on the mono board takes place in the correct order.

9.2.1 The Optical Pick-up Unit (OPU)

The Mercury 2 Loader has an optical unit consisting of two

lasers:
 EN 52 9. SD-5.00SA_CH Circuit Descriptions, List of Abbreviations and IC Data

• One for CD with a wavelength of 780 nm.

• One for DVD with a wavelength of 650 nm. The spindle-motor interface provides both motor control signals
The TZA1033 (item 7105) controls the data from these lasers, from the demodulator and, in addition, contains a tachometer
and the supply to them. loop that accepts tachometer pulses from the motor unit. They
drive the motor IC (BA6665FM, item 7300).
9.2.2 Front-end: the Servo Part
The SAA7812 has two independent microcontroller interfaces.
The first is a serial I2C-bus and the second is a standard 8-bit
The front-end consists of:
• The Loader interface multiplexed parallel interface. Both of these interfaces provide
access to 32 8-bit registers for control and status.
• The Servo Processor/Decoder
• The Interface/Program Memory
The Interface/Program Memory
The Loader Interface The interface between front-end (SAA7812) and back-end
(Sti55xx) is via:
The TZA1033HL/K2 (or DVDALAS2plus, item 7105) is an
• I2S bus (BCLK, DATA, WCLK, FLAG, SYNC and V4).
analogue pre-processor and laser supply circuit. It contains
data amplifiers and several options for radial tracking and focus • S2B bus (RXD_S2B, TXD_S2B, CPR_S2B and
SUR_S2B).
control.
• Miscellaneous I/O ports (RSTNF= front-end reset, EANF=
It is possible to optimise the dynamic range of this pre-amp/
processor combination for the LF servo and RF data paths. The front-end processor boot select).
Service tip: These lines contain series resistors (47 or 100 Ω)
gain in both channels is separately programmable. This will
for easy hardware debugging, and for EMC/noise reduction of
guarantee an optimal playability for all kind of discs.
Also, a dual laser supply is implemented, with fully automatic the high-speed I2S lines.
laser control including stabilisation and an ON/OFF switch, plus
The front-end processor SAA7812 (Iguana) has two boot
a separate supply pin for power efficiency.
modes: normal boot from flash memory, or serial mode.
The boot selection is via the EANF pin. The Iguana samples the
The Servo Processor/Decoder
EANF signal level once during boot-up. Once boot-up is
In the SD3.0 module, the servo signals were fed to the MACE2
completed, this pin is no longer used for this purpose.
servo processor, while the HF output signal was fed to the However, in the SD4.0SA_CH circuit, the EANF is also
SAA7335 decoder. In the new SD4.0SA_CH module, these ICs
connected to the flash memory. Therefore, when this pin is
are combined into one chip: the SAA7812 Iguana.
LOW, the lower 1Mbits of the memory is accessible.
This chip contains the following blocks: channel decoder, block Conversely, when this pin is HIGH, the upper 1Mbits is
decoder, servo processor, and microcontroller.
accessible.
The servo circuit in the SAA7812 (item 7207) takes care of the
Under front-end normal operation, the program memory (less
servo controls. than 1Mbits in size) should reside in the lower bank. Therefore,
In a CD system, there are some twelve control loops active. the EANF pin should be LOW at all times. Since the actual flash
About six of them are needed to adjust the servo error signals
memory used is 2Mbits, the upper 1Mbits is unused. This area
that is once per disc rotation. It also adjusts offsets, signal
is reserved for possible use by the front-end self-diagnostic
amplitudes, and loop gains (AGCs), to enlarge system software, or flash download application.
robustness and to avoid expensive potentiometer adjustments
in production.
9.2.3 Back-end: the Digital Part
The other six loops determine the laser spot position on the
disc in the radial, axial (focus), and tangential directions.
It also has to take care that the spot accesses a required The back-end consists of:
position as fast as possible. This access system consists of two • DVD back-end processor
parts, namely the actuator and the sled, which are (within a • SACD DSD processor
certain range) mechanically and electrically independent. • Audio output
Therefore, during an access, the servo has to control as well • Video output
the actuator as the sled. • Clock factory
The analogue signals, from the diode pre-processor, are • Miscellaneous
converted into a digital representation using A/D converters.
For the communication between the host processor (STi55xx) DVD Back-end Processor
and the servo processor, the S2B bus is used. This bus The SD4.0SA_CH is designed for the Sti55xx family. Some of
supports full-duplex asynchronous communication. the DVD related features of these ICs are:

The SAA7812 is also a combined CD/DVD compatible Processor overview

decoding device. The device operates with built in hardware for Function STi5580 STi5588 STi5519
Basic CD/VCD/DVD decoding X X X
CD/DVD error correction and de-interleaving operations. It Extra 2-channel of I2S output (PCMDATA3) X X
decodes EFM or EFM+HF signals directly from the laser pre- Karaoke X X
DTS X X
amplifier, including analogue front-end, PLL data recovery, Audio post processing (equalizer, level meter, etc) X

demodulation, and error correction. DVD audio X

Progressive scan at analog video output X
CL 16532163_048.eps
240102

Its analogue front-end input (the channel decoder), converts

the HF input signal to the digital domain via an 8-bit ADC,
Figure 9-2 Processor overview
preceded by an AGC circuit to obtain the optimum performance
from the converter. An external resonator clocks this block.
This subsystem recovers the data from the channel stream. It
corrects asymmetry, performs noise filtering and equalisation, The STi5580 has the same architecture as the STi5508 (used
and finally recovers the bit clock and data from the channel in earlier DVD generations), and is pin-to-pin compatible.
using a digital PLL. It works on 3.3 V (VDD), and comprises the following functions:
The demodulator part detects the frame synchronisation • Video decoder, which supports MPEG1 and MPEG2.
signals and decodes the EFM (14 bit) and EFM+ (16 bit) data • Audio decoder that supports AC-3, MPEG1, MPEG2, DTS,
and sub-code words into 8-bit symbols. Via the serial output PCM, S/PDIF, and MP3.
interface, the I2S data (audio and video) go to the DVD decoder • PAL/NTSC video encoder with simultaneously Y/C, CVBS,
STi55xx. and RGB/YUV outputs.
 Circuit Descriptions, List of Abbreviations and IC Data SD-5.00SA_CH 9. EN 53

• The video encoder supports Closed Caption and allows Furore processing part is not used during all other play modes.
MacroVision 7.0/6.1. In these modes, the PCM audio signals are fed through the
• Full screen On Screen Display (OSD) generator. Furore to the appropriate DAC.
• Three on-chip PLLs to generate all necessary clocks (as
reference the 27 MHz video clock is used). Block diagram
From Host processor
Input To Host processor
(STi 55XX)
PCM IEC 958
(STi 55XX)
Input data comes from the I2S-bus. The front-end interface of
this device, accepts DVD, CD and CD-DA information. 3 1 4

Register
Host interface Host PCM_CLK
8 bits interface
HF AGC
AD
Signal Processing DSD_CLK

(BE Interface)
For video, the input data stream is decoded to the appropriate 2 IEC 958
IEC 958
MPEG, Sub Picture, and OSD data streams, after which they PSP-key
decoder
Memory
manager
gen.

are fed to the PAL/NTSC encoder. This cell will convert the Key Control
Decryption PI-bus DSD -->PCM I2S
digital MPEG/Sub Picture/OSD stream into a standard base I2S / (stereo)
PCM
Sector
band signal and into RGB components. It handles interlaced Processor
Demux
DSD
and non-interlaced data, can perform CC/TXT encoding, and PI-Bus
mix
Control
allows MacroVision copy protection. SACD 2 -5 -6 ch
Audio LossLess 6 channel
fade DSD/PCM
interface decoder

For audio, the processing cell is a fully compatible DTS, Dolby SDRAM
interface

Digital (AC-3), MPEG1, MPEG2, PCM decoder, capable of MUTE

decoding 5.1 and 2 channel streams. to 16 Mbit/64 Mbit AUD_CLK SYS_CLK

SDRAM 256/384/512/718*FS 27-35 MHz CL 26532053_021.eps
FS = 44.1 - 48 KHz 260402

Output
For video, six analogue output pins are available on which Figure 9-4 Block diagram Furore
CVBS, S-VHS (Y/C), and RGB signals are present. They go,
via a buffer, to connector 1703. As an option, a digital YUV We can divide the Furore-IC in four main parts (see block
output is available at connector 1704. diagram):
1. Host interface. This is the link between the host bus and
External Memory the internal registers and memory bus. It also supplies the
The STi55xx family is capable of accessing external memory general reset signal (HW and SW) and the interrupt
via three buses: signals.
• The enhanced memory interface (EMI). This interface is 2. Data processing. All modules and peripherals in this part
configurable and can be used to access Flash, ROM, and are connected to a so-called PI-bus. It is beyond the scope
various flavours of DRAM. of this manual to go more in detail on this subject.
• The shared memory interface (SMI). The SMI is only 3. Copy protection. On every SACD disc, a PSP-signal is
used to access SDRAM. The SMI is connected to a recorded. The player can only play a disc if a valid PSP-
64Mbits (4M x 16bit) 7.5ns SDRAM (item 7500). The signal is detected. This PSP-key is recorded, via a special
SDRAM has the following functions: mechanism, in the EFM-signal on the disc. To detect this
– It is used by the MPEG video decoder as a frame key, the analogue HF-signal from the optical pick-up unit is
buffer, fed directly to the Furore-IC. Via an AGC, the signal is fed
– It holds the software and the variables used by it. to an ADC. The digitised HF signal is then fed to a block
• The I2C bus. Via this bus, the NVRAM (or EEPROM) is where key is encrypted. Control of this process is done via
accessible. This memory is used to store user settings, the host interface (sector processor).
player settings, and region code. As the STi55xx I/O-lines 4. DSD decoding and post processing. In this part, all
are potentially unable handle 5V inputs, a voltage level processing is done to generate a DSD and/or an I2S stream
shifter is foreseen for all I2C-busses. This circuit will isolate (from the de-multiplexed stream coming from the data
the STi55xx I2C ports (3.3V) from the system I2C bus (5V). processing block), in such a way that it can directly be
See figure below. connected to a DA-converter. All processing is done on
384*FS.
5V 3V3
Interfaces
• Basic Engine Interface:
– Data input interface. The Basic Engine Interface (I2S)
is connected to the output of the SAA7335 (HD61) high
3k3 3k3
(optional) speed CD decoder.
– Analogue HF input. The analogue HF input, coming
5V I2C levels 3.3V I2C levels from the optical pickup unit (OPU), is also fed to the
Furore-IC, to extract the copy-protection information
PSP (Pit Signal Processing = invisible data is stored on
to disc, which is required to decrypt the encrypted
CL 16532163_050.eps
230102 content).
• SDRAM Interface: The SDRAM interface forms a glue
less interface to one 64 Mbit SDRAM device. The interface
Figure 9-3 I2C voltage level shifter
takes care for the power-up sequence, mode programming
and refreshing of the SDRAM devices. This is hard coded
The SACD DSD processor in the interface and does not have to be controlled by the
The Furore-IC is a one-chip design, containing all the hardware host.
that is required for SACD processing. It is intended to interface • Audio data input/output Interface:
with the STixx-family DVD video decoders. – DSD/PCM combined data output. DSD_PCM: Output
The Furore-IC contains a memory interface to support an intended for a combined 6-channel DSD (SACD) and
external 16 or 64 Mbit SDRAM. PCM (DVD-CDDA) DAC. Switching between the PCM
During SACD application, the STi55xx serves as a host, data coming from the STi55xx, and the internal
whereby the Furore is controlled via the EMI interface. The generated DSD signals, is done in the Furore IC.
EN 54 9. SD-5.00SA_CH Circuit Descriptions, List of Abbreviations and IC Data

– Stereo DSD only output. DSD_stereo: 2-channel DSD An external analogue-to-digital converter (ADC), acting as
output with stereo down mix in the case of 5- and 6- slave, is required to convert the microphone signals to I2S
channel, and normal stereo in case of 2-channel DSD signals.
mode.
– Stereo PCM data output. Two possible stereo sources CD-DA/DVD Data Path
can be selected as stereo PCM output: The data path for CD-DA and DVD is as follows:
1. Stereo PCM coming from the STi55xx via the PCM • I2S data from the M2 basic engine enters the STi55xx.
input on Furore. • The STi55xx processes the data, and sends the 6 PCM
2. Stereo or down-mix-PCM derived via a decimation output channels to Furore 2. The LeRi channels are directly
filter from the SACD-DSD signal. passed to the AV board also.
– Digital audio output interface (IEC958). The IEC958 • The switch matrix of the Furore 2 sends the two incoming
format is intended to connect the DVD736SA to a stereo PCM channels (LeRi) to the AV board.
digital receiver. No DSD signals are defined for • The switch matrix of the Furore 2 sends the six incoming
IEC958, therefore the "DSD-->PCM converted" signal PCM channels to the high end DAC board.
is transmitted. Following two types of signals are • The mute signal from the STti55xx is directly passed to the
possible on the digital interface: AV board. This requires a patch on the mono board.
1. IEC958 data coming from the STi55xx. • The IEC958 output of the STi55xx is fed directly to AV
2. IEC958 data (stereo or down-mix-PCM) derived board.
via a decimation filter from the SACD-DSD signal.
– Clock + reset input. Two different processing clocks The clock distribution is as follows:
and a reset pulse are needed: • The master clock 384FS is received from the high end DAC
1. Sys_clk: System clock for data processing part, board.
frequency can be 27 MHz or 768*FS. • From this clock the 27 MHz clock for STi5580 and the
2. 384*FS: Processing clock for LLD and post Furore 2 is derived (Video clock).
processing. • From the 27 MHz clock the audio clock (256FS) is derived.
3. RESETn is an asynchronous reset and should be The STi55xx and Furore 2 use this clock. For CD-DA FS
low for at least 1 period of DSD_CLK. amounts to 44.1 KHz, for DVD 48 or 96 KHz.
• In case of CD-DA, the high end DAC uses its internal clock
Memory (384FS). In case of DVD, the switch matrix of Furore 2
• SDRAM. sends the audio clock (256FS) to the high end DAC on AV
– The size of the SDRAM is 64 Mbit. board.
– The SDRAM (items 7500 and 7502) has the following • The AV board receives the 256FS clock.
functions: Selection of the audio clock is done in the clock factory. For a
– It is used by the MPEG video decoder as a frame description of the clock factory, see paragraph "Clock Factory".
buffer,
– It holds the software and the variables used by it. SACD Data Path
• Flash-ROM. Two 2MB Flash-ROMs (items 7402 and The data path for DSD/DST is as follows:
7403) hold the DVD firmware, and are controlled by pin 16 • I2S data from the basic engine enters the Furore 2.
(FLASH_OEN) of the STi55xx. It must be able to perform a • The Furore 2 processes the data. This results in 6 DSD/
download (by disk or OS-link) in a Flash-only system. DST channels.
• EEPROM. User settings, player settings, and region code • The switch matrix of the Furore 2 sends the 6 DSD/DST
are stored in a 32 Kb I2C EEPROM. channels to the high end DAC on AV board.
• The 6 DSD/DST channels are down mixed to a stereo PCM
Audio Output signal.
The audio interfaces available in SD4.0SA_CH are I2S and S/ • The switch matrix of the Furore 2 sends the stereo PCM
PDIF for digital audio output, and I2S karaoke microphone signal to the AV board.
input. • The mute signal from the STi55xx is directly passed to the
In SACD player, two types of DACs (that are PCM DAC and AV board. This requires a patch on the mono board.
high end DSD DAC), are used on AV board. The clock distribution is as follows:
The audio data path to both DACs is routed via the Furore 2. • The master clock 384FS is received from the high end DAC
on AV board.
I2S audio • From this clock the 27 MHz clock for Sti55xx and Furore 2
The STi55xx is capable of 6-channel I2S output. These is derived (video clock).
channels can be configured to output 5.1 Dolby Digital, DTS, • From the 27 MHz clock the audio clock (256FS) is derived.
etc. The STti5580 and Furore 2 use this clock.
• PCM_OUT0: Left and Right. • The high end DAC on AV board uses its own XTAL clock
• PCM_OUT1: Centre and LFE (subwoofer). (384FS). The 256FS clock to the DAC board is switched
• PCM_OUT2: Left and Right surround. off, to prevent for interference.
Two additional channels (available in STi5580 and STi5588) • The AV board receives the 256FS clock.
are capable of providing down-mixed stereo. Selection of the audio clock is done in the clock factory. For a
description of the clock factory, see paragraph "Clock Factory".
S/PDIF
The S/PDIF signal level (pin 57, SPDIF_OUT) is 5V TTL at Video Output
module interface. To meet the complete S/PDIF specifications,
an external de-coupling circuit (item 7720, diagram M7) is Digital video (optional)
implemented. Digital YUV output is routed directly from STi55xx ports to a 24-
pin connector (item 1704). From the same connector, the
I2S karaoke (optional) HSYNC, VSYNC and 27MHZ_CLK signals are available. The
The STi5580 and STi5588 have built-in karaoke processing. digital YUV connector is the interface to external video
The internal karaoke block accepts I2S signal, acting as the processing devices; such as high quality progressive scan
master by generating the required KOKPCMCLK frequency. codex and high quality video DAC.
This frequency is always 1/4 the music sampling frequency.
 Circuit Descriptions, List of Abbreviations and IC Data SD-5.00SA_CH 9. EN 55

Analogue video Service

The STi55xx is capable of 6-channel analogue video. Three
channels (pins 25, 26 and 27) are RGB or YUV format, while 5V
the other three channels (pins 32, 33 and 34) are Y, C, and
CVBS.
A video output buffer (see diagram M7, e.g. item 7701 for R) is 1k
implemented: an 8MHz/16MHz selectable filter stage and a 100R
75Ω drive stage. Out 4k TXD_SER

Clock Factory 1n5 4k

One clock factory is implemented to support all clocks required
by the Furore 2. The various master clock, which depends on 3V3
whether SACD is present, is used for SD4.00_SA_CH. The
clock factory of SD4.00_SA_CH is showed in Figure 8-2.
10k
S1
27MHz P-SCAN

FURORE 2
10k RXD_SER
16.9344 MHz
FURORE 2 (Optional)
4901
STi55XX In
IC S612G MK2703STR 256*FS
DAC Clock 16.9344 MHz Clock 16.9344 MHz 27MHz

10k
SACD Clock PLL Audio Clock DAC FURORE 2
16.9344 MHz Buffer Audio Clock
Source (PLL) Synthesizer

6k8
256*FS
PCM_CLK
27MHz STi55XX
Oscillator
SEL_ACLK1

SEL_ACLK2

(Option)
CL 16532163_049.eps
CL 26532053_023.eps
230102
160502

Figure 9-5 Block diagram clock factory Figure 9-6 Service Port Buffer

For the SACD player, the clock system is a DAC master clock The service port (see diagram M5) is simplified to reduce cost.
system. For non-SACD player, the clock system is a mono The unused RTS and CTS lines are no longer connected. A
board master clock system. transistor buffer (item 7508) is used instead of the Schmitt
The Furore 2 supports clock 256*FS/384*FS/512*FS. The Trigger buffer (item 7501).
most convenient value in the market is 16.9344 MHz (384*FS, The overall loading and driving capability of the RS-232
FS=44.1KHz). Therefore, the master clock on the emulator port is not greatly changed. However, as a
SD4.00_SA_CH mono board is the 384*FS coming from the A/ precaution, the Schmitt Trigger circuit remains in the layout as
V board. The 384*FS (16.9344 MHz) from the DAC clock, must an optional implementation.
always be present. It is buffered before it is sent to the Furore
2 and the rest of the clock factory. The IC S612G delivers a 27 This SD4.0SA_CH has the same ComPair connector as in
MHz system clock. previous DVD generations. Flashing of the application-SW is
The Furore 2 and Sti5580/Sti5588 (Video) use this clock. It is not possible with the ComPair cable, except with a CD-R disc.
used to derive the PCM audio clocks 256*FS by the For sets with Mask-ROM software, replace it with a
MK2703STR. This IC is also used to buffer the incoming 27 programmed Flash (available via your Philips Service
MHz clock. organisation).
The communication between the Sti55xx and the Furore 2 is
asynchronous. Power Supply (diagram M7)
To support non-SACD playback, an on-board 27MHz oscillator
delivers the master clock for SD4.00_SA_CH mono board. 12V Front-end
AV_4.0 Interface 1703 (Option 1701 for 5-Disc Changer only)

motor driver

Miscellaneous
Most general IO ports are connected directly to the module Front-end
5V
interface. Compared with the SD3.0 module, some on-board 5V
circuits are removed, as it made more sense (and more cost
effective) to implement these circuits externally.
(power supply)

3.3V Front-end
regulator 3.3V
SCART Status Signal
The SCART0 and SCART1 signals are directly available at the
module interface, where the 0_6_12V signal is generated. See 3.3V Furore 2
table below: regulator 3.3V

Table 9-1 0_6_12V SCART status truth table

3.3V Back-end
2.5V / 1.8V
0_6_12V (at
PIO3_6 PIO3_7 SCART
Function (SCART0) (SCART1) connector) 2.5V /1.8V Back-end
regulator 2.5V / 1.8V
TV display 1 1 0V
TV display 0 1 0V
16:9 aspect ratio 1 0 +6V 1.8V Furore 2
regulator 1.8V
4:3 aspect ratio 0 0 +12V
CL 26532053_020.eps
260402

Mute
The audio MUTE signal (active "high") is directly available at Figure 9-7 Mono Board Power Supply Block Diagram
the module interface.
The main power supplies to the module are 3.3V, 5V, and 12V
(input via connector 1703).
EN 56 9. SD-5.00SA_CH Circuit Descriptions, List of Abbreviations and IC Data

9.3 Abbreviation List

The SACD DSD/DST decoder Furore 2 uses 1.8V for its core
and analogue portion, and 3.3V for its interface. The on-board ADC Analogue to Digital Converter
1.8V linear regulator LF18ABDT and 3.3V linear LD1117DT33
AM Amplitude Modulation
are used to generate 1.8V and 3.3V power supply respectively.
BE Basic Engine
The back-end section mainly uses the 1.8V or 2.5V and 3.3V, ComPair Computer aided rePair
which depend on which back-end processor is used. The on-
CD-DA CD Digital Audio
board linear regulators LF25ABDT or LF18ABDT are used to
CS Chip Select
generate the 2.5V (or 1.8V) required by the STi55xx. DAC Digital to Analogue Converter
The front-end section mainly uses the 5V and 12V. An on-
DAIO Digital Audio Input Output
board linear regulator LD1117DT33 can be used to generate
DENC Digital Encoder
the 3.3V required by the front-end. The 12V is used by the DFU Direction For Use: description for the
motor and servo drivers.
end user
DNR Dynamic Noise Reduction
Reset Circuit DRAM Dynamic RAM
DSD Direct Stream Digital
STi55xx DSP Digital Signal Processing
Power On DTS Digital Theatre Sound
Low Voltage Reset
Detection
Circuit
RESETn DVD Digital Versatile Disc
4.5V
Delay 1 EEPROM Electrically Erasable and
Furore 2 Programmable Read Only Memory
EFM Eight to Fourteen bit Modulation
EMI External Memory Interface (STi55xx)
FFC Flat Foil Cable
RSTN CLK_STBCTRL
Clock Factory FLASH Flash memory
HPF High Pass Filter
Power On HW Hardware
Low Voltage Reset
Detection I2C Integrated IC bus (signals at 5V level)
4.5V
Circuit
Delay 2 I2S Integrated IC Sound bus (signals at
RES_P 3.3V level)
Basic Engine
IC Integrated Circuit
CL 26532053_018.eps IF Intermediate Frequency
260402
IRQ Interrupt Request
LLD Loss Less Decoder
Figure 9-8 Block diagram of reset circuit
LPCM Linear Pulse Code Modulation
LRCLK Left/Right clock
This reset circuit takes care that booting the different devices LVTTL Low Voltage Transistor Transistor
on the mono board takes place in the correct order. The correct Logic (3.3V logic)
reset order is: MACE Mini All Compact Disc Engine
1. The Power On Reset circuit (delay t1) creates a reset MPEG Motion Pictures Experts Group
signal "RESETn" to reset the STi55xx and Furore . NC Not Connected
2. In the meantime, the Power On Reset circuit (delay t1) NVM Non Volatile Memory: IC containing
creates a reset signal "CLK_STBCTRL", which is inverted TV related data e.g. alignments
to "RESETn", to enable the Clock Factory. OC Open Circuit
3. Then, the Power On Reset circuit (delay t2) generates a OPU Optical Pick-up Unit
reset signal "RES_P" to reset the Basic Engine. PCB Printed Circuit Board (see PWB)
4. The STI55xx can now reset the Basic Engine via "RSTN". PCM Pulse Code Modulation
PCM_CLK Audio system clock for DAC
PCM_OUTx Audio serial output data
PSU Power Supply Unit
PWB Printed Wiring Board (see PCB)
RAM Random Access Memory
RGB Red, Green and Blue colour space
ROM Read Only Memory
S2B Serial to Basic Engine, communication
bus between host- and servo
processor
SCL Serial Clock I2C
SCLK Audio serial bit clock
SDA Serial Data I2C
SDRAM Synchronous DRAM
S/PDIF Sony Philips Digital InterFace
SRAM Static RAM
STBY Standby
SVCD Super Video CD
SW Software
THD Total Harmonic Distortion
TTL Transistor Transistor Logic (5V logic)
uP Microprocessor
VCD Video CD
Y/C Luminance (Y) and Chrominance (C)
signal
YUV Component video
 Circuit Descriptions, List of Abbreviations and IC Data SD-5.00SA_CH 9. EN 57

9.4 IC Data

In this paragraph, the internal blockdiagrams and pinning are

given of ICs that are drawn as "black box" in the electrical
diagrams (with exception of "memory" and "logic" ICs).

9.4.1 Diagram M1

DVDALAS2plus Advanced Analogue DVD

TZA1033
Signal Processor and Laser Supply

DEVICE BLOCK DIAGRAM

Diode

Var Gain
Ampli?ers Balanced
MUX

HF
Processing
DVD Data & header

OPU
Interface Header

Land

DPD
Servo
Push Pull Signals
Land/Groove D1-D6
MUX

Offset Swap
CD
compensations Mute

3 Beam
Tracking

FTC

V & I references

Rext Dual Laser

Supply
FTC comp.

Laser#1
Serial

Laser#2 I/Face Control

Interface

Figure 9-9 TZA1033 Device Block Diagram (item 7105)

EN 58 9. SD-5.00SA_CH Circuit Descriptions, List of Abbreviations and IC Data

DVDALAS2plus Advanced Analogue DVD

TZA1033
Signal Processor and Laser Supply

PINNING
DVD-LO

RF-REF
VDDA2

VDDA3
VSSA2
VSSA3
CD-LO
R-EXT
CD-MI
VDDL

RFN
RFP

-
-
-
-
64

63

62

61

60

59

58

57

56

55

54

53

52

51

50

49
handbook, full pagewidth

CD-A 1 48 O-A
CD-B 2 47 O-B
CD-C 3 46 O-C
CD-D 4 45 O-D
CD-REF 5 44 VDDA4
CD-E 6 43 VSSA4
CD-F 7 42 S1
VDDA1 8 TZA 1033 41 S2
XXX
VSSA1 9 40 O-CENTRAL
DVD-MI 10 39 LPF-DPD2
- 11 38 LPF-DPD1
DVD-A 12 37 TD2
DVD-B 13 36 FTC-REF
DVD-C 14 35 TD1
DVD-D 15 34 TDO
DVD-REF 16 33 FTC
17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

NEW
MXXxxx
-
-
TM
LAND
HEADER
VDDD3
SIDA
SICL
SILD
VSSD
COP
COM
COO
VDDD5
STB
-

Figure 9-10 TZA1033 Pinning (item 7105)

 Circuit Descriptions, List of Abbreviations and IC Data SD-5.00SA_CH 9. EN 59

9.4.2 Diagram M2

Channel decoder CD/DVD Erco Block decoder/

encoder DRAM interface
Bit Detector drive Host

interface
A/D & Demodulator Memory Proc interface interface
Memory Proc
Erco
Motor/ multimedia
Tacho interface interface

DAC

subcode
CSS
interface
module

control
registers cpu interface

Servo µP
address cpu
decoder
A/D 1k5 ROM
PCS RAM 1k5 aux
accelerator RAM 736 RAM

A/D servo servo SFRs port regs

accelerator processor

Figure 1 Functional Block Diagram

Figure 9-11 SAA7812HL Block Diagram (item 7207)

EN 60 9. SD-5.00SA_CH Circuit Descriptions, List of Abbreviations and IC Data

IECO_CL1

XCAS_LO
POR_NEG

XCAS_HI
vampire5
vampire4
vampire3
vampire2

vampire1
VDD3C4

VDD3C3
MOTO1

VDD3P8

VDD3P6
TEST10

VSS3C4

VSS3C3
VSS3P8
XDD15
XDD14
XDD13
XDD12

XDD10

VSS3P7
XDA10

VSS3P6
XDD11
TEST9
TEST8

XDD9
XDD8
XDD7
XDD6
XDD5
XDD4
XDD3
XDD2
XDD1
XDD0

XRAS

XDA9
XDA8
XDA7
XDA6
XDA5
XDA4
XDA3
XDA2
XDA1
XDA0
XWR
BCA
208
207
206
205
204
203
202
201
200
199
198
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
159
158
157
VDD3P1 1 156 DASP
VSS3P1 2 155 CS1
T1 3 154 CS0
T2 4 153 VSS5P1
T3 5 152 VDD5P1
DAC_RP 6 151 DA2_GRD
DAC_RN 7 150 DA0
DAC_VPOS 8 149 PDIAG
DAC_VNEG 9 148 DA1_GWR
DAC_LP 10 147 IOCS16
DAC_LN 11 146 INTRQ
TEST1 12 145 DMACK_GRQ
TEST2 13 144 IORDY
CRIN 14 143 DIOR
CROUT 15 142 DIOW
VDDA1 16 141 DMARQ_GACK
VSSA1 17 140 VSS5P2
HFIN_DN 18 139 VDD5P2
HFIN_DP
HFIN_SE
19
20
SAA7812 M3x 138
137
DD15
DD0
VCOM
IREF
WREFLO
21
22
23
Iguana 136
135
134
DD14
DD1
DD13
TEST3 24 133 DD2
VSSA2 25 132 DD12
VDDA2 26 131 DD3
SIN_PHI 27 130 DD11
COS_PHI 28 129 DD4
TEST4 29 128 DD10
XDET(auxadc) 30 127 DD5
ACT_EMFP 31 126 DD9
ACT_EMFN 32 125 DD6
TEST5 33 124 DD8
TEST6 34 123 DD7
TEST7 35 122 VSS5P3
UOPB 36 121 VDD5P3
UOPT 37 120 HRESET
ALPHA0 38 119 P3_0_RXD1
VSSA3 39 118 P3_1_TXD1
VDDA3 40 117 P3_2_INT0
D1 41 116 P3_3_INT1
D2_TLN 42 115 VSS3P5
D3_REN 43 114 VDD3P5
D4_FEN 44 113 P3_4_RXD2
S1_MIRN 45 112 P3_5_TXD2
S2 46 111 P3_6_WRN
VRIN 47 110 P3_7_RDN
FTCH 48 109 UDA7
P5_7_DEFO_N 49 108 UDA6
P5_6_DEFI_N 50 107 UDA5
P5_5_TL 51 106 UDA4
P5_4_RP_FOK 52 105 UDA3
100
101
102
103
104
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
P5_2_CLO
P5_1_SDA

RA

FO

REF_SIN

P4_7_PXT2EN

SCCLK
EAN_WAITN
P5_3_CE1

VDD3P2
VSS3P2

P4_6_PXT2

VDD3C1
V SS3C1
P4_3_A19
P4_2_A18
P4_1_A17
P4_0_A16
P4_5_PXT0

UA15
UA14
UA13
UA12
UA11
UA10
UA9
UA8
VDD3P3
VSS3P3

VDD3C2
V SS3C2
UA7_P1_7
UA6_P1_6
UA5_P1_5
UA4_P1_4
UA3_P1_3
UA2_P1_2
UA1_P1_1
UA0_P1_0
VDD3P4
VSS3P4
UDA0
UDA1
UDA2
P5_0_SCL

REF_COS

PSENN_CS
SL

RAC_SW

P4_4_PXT

DSDEN_SRST

ALE_ASTB

Figure 2 Pinning Diagram

Figure 9-12 SAA7812HL Pinning (item 7207)

 Circuit Descriptions, List of Abbreviations and IC Data SD-5.00SA_CH 9. EN 61

9.4.3 Diagram M6

2 UART &
2 SmartCards Internal peripherals Central CPU CACHE SUBSYSTEM
I2C command port (C2+)
Front-end & RID TAP
link interface
DVD Clock
DMAs ICache
generator
SRAM
DMA

block move
Refill

MPEG
MPEG

Debug
control DCache

Diagnostic JTAG
controller
debugging
interface
Communications CPU arbiter
arbiter

Programmable
Ext peripherals: CPU interface
(EMI) ST20 arbiter & memory controller
Flash, additional
DRAM SDRAM

SDRAM
I/F CD FIFOs Command I/F
block move

16, 32 or Shared SDRAM

interface (SMI) SDRAM arbiter (LMC)
64 Mbit
SDRAM

Analog/digital OSD, SP Audio & Audio in/out

DENC decoder Video Video
video output and mixing filtering decoder Karaoke

Figure 9-13 STi5588 Block Diagram (item 7601)

 2.1
EN 62
9.

VSS_RGB
VDD_RGB

PIO4[7]
PIO4[6]
PIO4[5]
PIO4[4]
PIO4[3]
PIO4[2]
PIO4[1]
PIO4[0]
PIO3[7]
PIO3[6]
PIO3[5]
PIO3[4]
PIO3[3]
PIO3[2]
PIO3[1]
PIO3[0]
PIO2[7]
PIO2[6]
PIO2[5]

DAC_SCLK
B_WCLK
B_BCLK
B_FLAG

V_REF_RG

C_OUT
R_OUT

I_REF_YC
V_REF_YC
VSS_YCC
VDD_YCC
B_SYNC

DAC_PCMOUT0
VSS_PCM
VDD_PCM
VDD3_3
VDD2_5
B_V4
VDD2_5
VDD3_3

VSS
VSS
B_DATA
VSS
VSS

I_REF_RG

CV_OUT
Y_OUT
G_OUT
B_OUT
NRSS_OUT
9
8
7
6
5
4
3
2
1
Pin ou t

52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
DAC_PCMOUT1 53 208 PIO2[4]
DAC_PCMOUT2 54 207 PIO2[3]
DAC_PCMCLK 55 206 PIO2[2]
DAC_LRCLK 56 205 PIO2[1]
SPDIF_OUT 57 204 PIO2[0]
SMI_ADR[4] 58 203 TRIGGER_OUT
SMI_ADR[5] 59 202 TRIGGER_IN
SMI_ADR[6] 60 201 PIO1[5]
SMI_ADR[7] 61 200 PIO1[4]
SMI_ADR[8] 62 199 VSS
63
SD-5.00SA_CH

SMI_ADR[9] 198 VDD2_5

VDD2_5 64 197 PIO1[3]
VSS 65 196 PIO1[2]
SMI_ADR[3] 66 195 PIO1[1]
SMI_ADR[2] 67 194 PIO1[0]
SMI_ADR[1] 68 193 PIO0[7]
SMI_ADR[0] 69 192 PIO0[6]
SMI_ADR[10] 70 191 PIO0[5]
SMI_ADR[11] 71 190 PIO0[4]
SMI_ADR[12] 72 189 PIO0[3]
SMI_ADR[13] 73 188 PIO0[2]
SMI_CS[0] 74 187 PIO0[1]
SMI_CS[1] 75 186 PIO0[0]
SMI_RAS 76 185 VSS
SMI_CAS 77 184 VDD3_3
SMI_WE 78 183 CPU_ADR[21]
SMI_DQML 79 182 CPU_ADR[20]
SMI_DQMU 80 181 CPU_ADR[19]
VDD3_3 81 180 CPU_ADR[18]
SMI_CLKIN 82 179 CPU_ADR[17]

(rev F)
VSS 83 178 CPU_ADR[16]
SMI_DATA[0] 84 177 CPU_ADR[15]

PQFP 208
SMI_DATA[1] 85 176 CPU_ADR[14]
SMI_DATA[2]
SMI_DATA[3]
SMI_DATA[4]
86
87
88
STi5588 175
174
173
CPU_ADR[13]
CPU_ADR[12]
CPU_ADR[11]
SMI_DATA[5] 89 172 VSS

Figure 9-14 STi5588 Pinning (item 7601)

SMI_DATA[6] 90 171 VDD2_5
SMI_DATA[7] 91 170 CPU_ADR[10]
SMI_DATA[8] 92 169 CPU_ADR[9]
SMI_DATA[9] 93 168 CPU_ADR[8]
VDD2_5 94 167 CPU_ADR[7]
SMI_CLKOUT 95 166 CPU_ADR[6]
VSS 96 165 CPU_ADR[5]
SMI_DATA[10] 97 164 CPU_ADR[4]
SMI_DATA[11] 98 163 CPU_ADR[3]
SMI_DATA[12] 99 162 CPU_ADR[2]
SMI_DATA[13] 100 161 CPU_ADR[1]
SMI_DATA[14] 101 160 VSS
SMI_DATA[15] 102 159 VDD3_3
103
Circuit Descriptions, List of Abbreviations and IC Data

ADC_SCLK 158 CPU_DATA[15]

ADC_LRCLK 104 157 CPU_DATA[14]

105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156

TDI

VSS
TCK
VSS
VSS
VSS

TMS
TDO

TRST
IRQ[2]
IRQ[1]
IRQ[0]

PWM2
PWM1
PWM0
RESET

VDD3_3
VDD2_5
VDD3_3
VDD2_5

PIX_CLK

CPU_OE
CPU_RW

VSS_PLL
VDD_PLL

ADC_DATA
CPU_WAIT

CPU_BE[0]
CPU_BE[1]
CPU_CE[3]
CPU_CE[2]
CPU_CE[1]
CPU_CE[0]
CPU_RAS1
CPU_CAS0
CPU_CAS1
CPU_DATA[0]
CPU_DATA[1]
CPU_DATA[2]
CPU_DATA[3]
CPU_DATA[4]
CPU_DATA[5]
CPU_DATA[6]
CPU_DATA[7]
CPU_DATA[8]
CPU_DATA[9]
CPU_DATA[10]
CPU_DATA[11]
CPU_DATA[12]
CPU_DATA[13]

CPU_PROCLK

ADC_PCMCLK
 Spare Parts List SD-5.00SA_CH 10. EN 63

10. Spare Parts List

Monoboard 2223 2223 2020 552 94427 100pF 5% 50v 0603 2702 2702 3198 030 82280 2.2µF 20% 50V
2224 2224 2020 552 94427 100pF 5% 50v 0603 2703 2703 4822 126 11669 27pF 5% 50V 0603
2225 2225 2020 552 94427 100pF 5% 50v 0603 2704 2704 4822 126 11785 47pF 5% 50V 0603
Various 2226 2226 2020 552 94427 100pF 5% 50v 0603 2705 2705 4822 126 11785 47pF 5% 50V 0603
2227 2227 2238 586 59812 100nF 20-80% 50V 0603 2706 2706 4822 124 12095 100µF 20% 16V
1013 1013 2422 025 17451 Connector 30P F 2228 2228 2238 586 59812 100nF 20-80% 50V 0603 2707 2707 2238 586 59812 100nF 20-80% 50V 0603
1100 1100 2422 025 17529 CON BM H 24P F 0.50 2229 2229 2238 586 59812 100nF 20-80% 50V 0603 2708 2708 2238 586 59812 100nF 20-80% 50V 0603
FFC 0.3 R 2230 2230 2238 586 59812 100nF 20-80% 50V 0603 2709 2709 3198 030 82280 2.2µF 20% 50V
1201 1201 2422 543 01292 RES XTL SM 8M4672 2231 2231 2238 586 59812 100nF 20-80% 50V 0603 2710 2710 2238 586 59812 100nF 20-80% 50V 0603
30P AT-41 R 2232 2232 4822 126 13879 220nF 20% 16V 2711 2711 4822 126 11669 27pF 5% 50V 0603
1300 1300 2422 025 17746 CON BM V 11P F 1.00 2234 2234 4822 126 13617 1,8nF 10% 50V 2712 2712 4822 126 11785 47pF 5% 50V 0603
FFC 0.3 R 2235 2235 4822 126 14549 33nF 16V 0603 2713 2713 4822 124 12095 100µF 20% 16V
1301 1301 2422 025 17747 CON BM V 8P F 1.00 2236 2236 4822 126 13617 1,8nF 10% 50V 2714 2714 2238 586 59812 100nF 20-80% 50V 0603
FFC 0.3 R 2237 2237 2238 586 59812 100nF 20-80% 50V 0603 2715 2715 3198 016 31020 1nF 10% 25V 0603
1400 1400 4822 267 10676 Connector 1P 2238 2238 2238 586 59812 100nF 20-80% 50V 0603 2716 2716 3198 016 31020 1nF 10% 25V 0603
1500 1500 2422 025 16703 Connector 7P m 2239 2239 2238 586 59812 100nF 20-80% 50V 0603 2717 2717 4822 126 11785 47pF 5% 50V 0603
1701 1701 2422 025 16703 Connector 7P m 2300 2300 2238 586 59812 100nF 20-80% 50V 0603 2718 2718 2238 586 59812 100nF 20-80% 50V 0603
1702 1702 2422 025 14121 CON BM H 8P F 1.00 2301 2301 2238 586 59812 100nF 20-80% 50V 0603 2719 2719 4822 126 11785 47pF 5% 50V 0603
FFC 0.3 R 2302 2302 2238 586 59812 100nF 20-80% 50V 0603 2720 2720 3198 030 82280 2.2µF 20% 50V
1703 1703 2422 025 17451 Connector 30P F 2303 2303 2238 586 59812 100nF 20-80% 50V 0603 2721 2721 4822 126 11669 27pF 5% 50V 0603
1704 1704 2422 025 17599 Connector 24P f 2304 2304 2238 586 59812 100nF 20-80% 50V 0603 2722 2722 4822 126 11785 47pF 5% 50V 0603
1900 1900 2422 025 17746 CON BM V 11P F 1.00 2305 2305 2238 586 59812 100nF 20-80% 50V 0603 2723 2723 2238 586 59812 100nF 20-80% 50V 0603
FFC 0.3 R 2306 2306 2238 586 59812 100nF 20-80% 50V 0603 2724 2724 2238 586 59812 100nF 20-80% 50V 0603
2307 2307 2238 586 59812 100nF 20-80% 50V 0603 2725 2725 3198 030 82280 2.2µF 20% 50V
g 2311 2311 2238 586 59812 100nF 20-80% 50V 0603 2726 2726 4822 126 11785 47pF 5% 50V 0603
2313 2313 2238 586 59812 100nF 20-80% 50V 0603 2727 2727 4822 126 11785 47pF 5% 50V 0603
2000 2000 4822 126 13879 220nF 20% 16V 2315 2315 2238 586 59812 100nF 20-80% 50V 0603 2728 2728 4822 124 23002 10µF 20% 16V
2100 2100 4822 126 11785 47pF 5% 50V 0603 2316 2316 2238 586 59812 100nF 20-80% 50V 0603 2729 2729 4822 124 12095 100µF 20% 16V
2101 2101 4822 126 13193 4.7nF 10% 63V 2320 2320 4822 124 80151 47µF 20% 16V 2730 2730 2238 586 59812 100nF 20-80% 50V 0603
2102 2102 2238 586 59812 100nF 20-80% 50V 0603 2321 2321 4822 124 80151 47µF 20% 16V 2731 2731 2238 586 59812 100nF 20-80% 50V 0603
2103 2103 3198 016 31020 1nF 10% 25V 0603 2402 2402 2238 586 59812 100nF 20-80% 50V 0603 2732 2732 3198 030 82280 2.2µF 20% 50V
2104 2104 2238 586 59812 100nF 20-80% 50V 0603 2405 2405 2238 586 59812 100nF 20-80% 50V 0603 2733 2733 4822 126 11785 47pF 5% 50V 0603
2105 2105 3198 017 41050 1µF 10V 0603 2408 2408 2238 586 59812 100nF 20-80% 50V 0603 2734 2734 4822 126 11785 47pF 5% 50V 0603
2106 2106 3198 017 36830 68nF 10% 16V 0603 2410 2410 4822 124 12095 100µF 20% 16V 2735 2735 2238 586 59812 100nF 20-80% 50V 0603
2107 2107 3198 017 41050 1µF 10V 0603 2411 2411 4822 124 12095 100µF 20% 16V 2736 2736 2238 586 59812 100nF 20-80% 50V 0603
2108 2108 2238 586 59812 100nF 20-80% 50V 0603 2414 2414 2238 586 59812 100nF 20-80% 50V 0603 2737 2737 2238 586 59812 100nF 20-80% 50V 0603
2109 2109 2238 586 59812 100nF 20-80% 50V 0603 2415 2415 3198 017 41050 1µF 10V 0603 2738 2738 4822 122 33761 22pF 5% 50V
2110 2110 3198 016 31020 1nF 10% 25V 0603 2417 2417 4822 124 23002 10µF 20% 16V 2739 2739 2238 586 59812 100nF 20-80% 50V 0603
2112 2112 2238 586 59812 100nF 20-80% 50V 0603 2418 2418 3198 017 44740 470nF 10V 0603 2740 2740 4822 124 12095 100µF 20% 16V
2113 2113 2238 586 59812 100nF 20-80% 50V 0603 2500 2500 4822 124 80349 47UF20% 6.3V 2741 2741 2238 586 59812 100nF 20-80% 50V 0603
2115 2115 4822 126 13193 4.7nF 10% 63V 2501 2501 2238 586 59812 100nF 20-80% 50V 0603 2742 2742 3198 030 82280 2.2µF 20% 50V
2117 2117 4822 126 14494 22nF 10% 25V 0603 2504 2504 2238 586 59812 100nF 20-80% 50V 0603 2743 2743 4822 126 11785 47pF 5% 50V 0603
2118 2118 4822 126 14507 18pF 5% 50V 0603 2505 2505 2238 586 59812 100nF 20-80% 50V 0603 2744 2744 4822 126 11785 47pF 5% 50V 0603
2119 2119 2238 586 59812 100nF 20-80% 50V 0603 2506 2506 2238 586 59812 100nF 20-80% 50V 0603 2745 2745 2238 586 59812 100nF 20-80% 50V 0603
2120 2120 2238 586 59812 100nF 20-80% 50V 0603 2507 2507 2238 586 59812 100nF 20-80% 50V 0603 2746 2746 2238 586 59812 100nF 20-80% 50V 0603
2121 2121 4822 126 14494 22nF 10% 25V 0603 2510 2510 2238 586 59812 100nF 20-80% 50V 0603 2747 2747 4822 124 23002 10µF 20% 16V
2122 2122 2238 586 59812 100nF 20-80% 50V 0603 2511 2511 2238 586 59812 100nF 20-80% 50V 0603 2748 2748 4822 124 12095 100µF 20% 16V
2123 2123 4822 126 13879 220nF 20% 16V 2512 2512 2238 586 59812 100nF 20-80% 50V 0603 2749 2749 2238 586 59812 100nF 20-80% 50V 0603
2124 2124 2238 586 59812 100nF 20-80% 50V 0603 2513 2513 2238 586 59812 100nF 20-80% 50V 0603 2750 2750 2238 586 59812 100nF 20-80% 50V 0603
2129 2129 2238 586 59812 100nF 20-80% 50V 0603 2516 2516 2238 586 59812 100nF 20-80% 50V 0603 2751 2751 4822 124 12095 100µF 20% 16V
2131 2131 2238 586 59812 100nF 20-80% 50V 0603 2517 2517 2238 586 59812 100nF 20-80% 50V 0603 2800 2800 2238 586 59812 100nF 20-80% 50V 0603
2132 2132 2238 586 59812 100nF 20-80% 50V 0603 2518 2518 2238 586 59812 100nF 20-80% 50V 0603 2801 2801 2238 586 59812 100nF 20-80% 50V 0603
2133 2133 2238 586 59812 100nF 20-80% 50V 0603 2519 2519 2238 586 59812 100nF 20-80% 50V 0603 2802 2802 2238 586 59812 100nF 20-80% 50V 0603
2134 2134 4822 051 30008 Jumper 0603 2520 2520 2238 586 59812 100nF 20-80% 50V 0603 2803 2803 2238 586 59812 100nF 20-80% 50V 0603
2135 2135 4822 051 30008 Jumper 0603 2522 2522 4822 126 14247 1.5nF 50V 0603 2804 2804 2238 586 59812 100nF 20-80% 50V 0603
2137 2137 2238 586 59812 100nF 20-80% 50V 0603 2524 2524 2238 586 59812 100nF 20-80% 50V 0603 2805 2805 2238 586 59812 100nF 20-80% 50V 0603
2139 2139 4822 126 13879 220nF 20% 16V 2525 2525 4822 124 80349 47UF20% 6.3V 2806 2806 2238 586 59812 100nF 20-80% 50V 0603
2140 2140 3198 016 36810 CER1 0603 NP0 25V 2533 2533 2238 586 59812 100nF 20-80% 50V 0603 2807 2807 2238 586 59812 100nF 20-80% 50V 0603
680P COL R 2604 2604 4822 126 14494 22nF 10% 25V 0603 2808 2808 2238 586 59812 100nF 20-80% 50V 0603
2141 2141 3198 016 36810 CER1 0603 NP0 25V 2605 2605 4822 124 23002 10µF 20% 16V 2809 2809 2238 586 59812 100nF 20-80% 50V 0603
680P COL R 2606 2606 2238 586 59812 100nF 20-80% 50V 0603 2810 2810 4822 126 14238 2.2nF 50V 0603
2142 2142 5322 126 11582 6.8nF 10% 63V 2607 2607 4822 124 23002 10µF 20% 16V 2811 2811 5322 126 11583 10nF 10% 50V 0603
2143 2143 5322 126 11582 6.8nF 10% 63V 2608 2608 2238 586 59812 100nF 20-80% 50V 0603 2813 2813 4822 126 14225 56pF 5% 50V 0603
2144 2144 4822 126 14487 8.2pF 0.5% 50V 0603 2609 2609 4822 122 33761 22pF 5% 50V 2814 2814 2238 586 59812 100nF 20-80% 50V 0603
2145 2145 4822 126 14487 8.2pF 0.5% 50V 0603 2610 2610 4822 122 33761 22pF 5% 50V 2816 2816 2238 586 59812 100nF 20-80% 50V 0603
2146 2146 3198 016 31020 1nF 10% 25V 0603 2613 2613 4822 122 33761 22pF 5% 50V 2817 2817 5322 126 11578 1nF 10% 50V 0603
2147 2147 5322 126 11583 10nF 10% 50V 0603 2614 2614 4822 122 33761 22pF 5% 50V 2900 2900 4822 124 12095 100µF 20% 16V
2200 2200 2238 586 59812 100nF 20-80% 50V 0603 2619 2619 2238 586 59812 100nF 20-80% 50V 0603 2901 2901 2238 586 59812 100nF 20-80% 50V 0603
2201 2201 2238 586 59812 100nF 20-80% 50V 0603 2620 2620 2238 586 59812 100nF 20-80% 50V 0603 2902 2902 5322 126 11583 10nF 10% 50V 0603
2202 2202 2238 586 59812 100nF 20-80% 50V 0603 2621 2621 5322 126 11578 1nF 10% 50V 0603 2903 2903 4822 122 33761 22pF 5% 50V
2203 2203 2238 586 59812 100nF 20-80% 50V 0603 2622 2622 2238 586 59812 100nF 20-80% 50V 0603 2904 2904 4822 122 33761 22pF 5% 50V
2204 2204 2238 586 59812 100nF 20-80% 50V 0603 2623 2623 2238 586 59812 100nF 20-80% 50V 0603 2907 2907 2238 586 59812 100nF 20-80% 50V 0603
2205 2205 2238 586 59812 100nF 20-80% 50V 0603 2624 2624 2238 586 59812 100nF 20-80% 50V 0603 2908 2908 2238 586 59812 100nF 20-80% 50V 0603
2206 2206 2238 586 59812 100nF 20-80% 50V 0603 2625 2625 2238 586 59812 100nF 20-80% 50V 0603 2910 2910 4822 124 80151 47µF 20% 16V
2207 2207 2238 586 59812 100nF 20-80% 50V 0603 2626 2626 2238 586 59812 100nF 20-80% 50V 0603 2911 2911 2238 586 59812 100nF 20-80% 50V 0603
2208 2208 2238 586 59812 100nF 20-80% 50V 0603 2627 2627 2238 586 59812 100nF 20-80% 50V 0603 2912 2912 4822 124 80151 47µF 20% 16V
2209 2209 2238 586 59812 100nF 20-80% 50V 0603 2628 2628 2238 586 59812 100nF 20-80% 50V 0603 2913 2913 2238 586 59812 100nF 20-80% 50V 0603
2210 2210 2238 586 59812 100nF 20-80% 50V 0603 2629 2629 2238 586 59812 100nF 20-80% 50V 0603 2915 2915 4822 122 33761 22pF 5% 50V
2211 2211 2238 586 59812 100nF 20-80% 50V 0603 2630 2630 2238 586 59812 100nF 20-80% 50V 0603 2916 2916 4822 122 33761 22pF 5% 50V
2212 2212 2238 586 59812 100nF 20-80% 50V 0603 2631 2631 2238 586 59812 100nF 20-80% 50V 0603 2917 2917 4822 122 33761 22pF 5% 50V
2213 2213 2238 586 59812 100nF 20-80% 50V 0603 2632 2632 2238 586 59812 100nF 20-80% 50V 0603 2918 2918 5322 126 11583 10nF 10% 50V 0603
2214 2214 2238 586 59812 100nF 20-80% 50V 0603 2633 2633 2238 586 59812 100nF 20-80% 50V 0603 2919 2919 5322 126 11583 10nF 10% 50V 0603
2215 2215 2238 586 59812 100nF 20-80% 50V 0603 2634 2634 2238 586 59812 100nF 20-80% 50V 0603
2216 2216 3198 017 41050 1µF 10V 0603 2635 2635 3198 030 74780 4u7 20% 35V
2636 2636 3198 030 74780 4u7 20% 35V f
2217 2217 5322 126 11583 10nF 10% 50V 0603
2218 2218 3198 017 41050 1µF 10V 0603 2637 2637 2238 586 59812 100nF 20-80% 50V 0603
3003 3003 4822 051 30103 10kΩ 5% 0.062W
2219 2219 4822 122 33761 22pF 5% 50V 2638 2638 2020 552 94427 100pF 5% 50v 0603
3008 3008 4822 051 30103 10kΩ 5% 0.062W
2220 2220 4822 122 33761 22pF 5% 50V 2700 2700 2238 586 59812 100nF 20-80% 50V 0603
3010 3010 4822 051 30103 10kΩ 5% 0.062W
2221 2221 2238 586 59812 100nF 20-80% 50V 0603 2701 2701 4822 126 11785 47pF 5% 50V 0603
3019 3019 4822 051 30339 33Ω 5% 0.062W
 EN 64 10. SD-5.00SA_CH Spare Parts List

3020 3020 4822 051 30339 33Ω 5% 0.062W 3257 3257 4822 117 13573 4 x 47Ω 5% 3627 3627 4822 051 30332 3.3kΩ 5% 0.062W
3021 3021 4822 051 30339 33Ω 5% 0.062W 3263 3263 4822 051 30103 10kΩ 5% 0.062W 3628 3628 4822 051 30103 10kΩ 5% 0.062W
3022 3022 4822 051 30339 33Ω 5% 0.062W 3266 3266 4822 051 30103 10kΩ 5% 0.062W 3629 3629 4822 051 30332 3.3kΩ 5% 0.062W
3023 3023 4822 051 30339 33Ω 5% 0.062W 3267 3267 4822 051 30392 3.9kΩ 5% 0.063W 0603 3630 3630 4822 051 30332 3.3kΩ 5% 0.062W
3024 3024 4822 051 30339 33Ω 5% 0.062W 3268 3268 4822 051 30272 2.7kΩ 5% 0.062W 3631 3631 4822 051 30101 100Ω 5% 0.062W
3026 3026 4822 051 30339 33Ω 5% 0.062W 3270 3270 4822 051 30392 3.9kΩ 5% 0.063W 0603 3632 3632 4822 051 30101 100Ω 5% 0.062W
3027 3027 4822 051 30339 33Ω 5% 0.062W 3271 3271 4822 051 30103 10kΩ 5% 0.062W 3633 3633 4822 051 30339 33Ω 5% 0.062W
3028 3028 4822 051 30339 33Ω 5% 0.062W 3272 3272 4822 051 30103 10kΩ 5% 0.062W 3634 3634 4822 051 30339 33Ω 5% 0.062W
3029 3029 4822 051 30339 33Ω 5% 0.062W 3273 3273 4822 051 30103 10kΩ 5% 0.062W 3635 3635 4822 051 30339 33Ω 5% 0.062W
3030 3030 4822 051 30339 33Ω 5% 0.062W 3274 3274 4822 051 30103 10kΩ 5% 0.062W 3636 3636 4822 051 30339 33Ω 5% 0.062W
3036 3036 4822 051 30103 10kΩ 5% 0.062W 3275 3275 4822 051 30472 4.7kΩ 5% 0.062W 3638 3638 3198 031 11010 4 x 100Ω 5% 1206
3037 3037 4822 117 13573 4 x 47Ω 5% 3277 3277 4822 051 30479 47Ω 5% 0.062W 3642 3642 2322 704 61303 13kΩ 1% 0603
3100 3100 4822 051 30563 56kΩ 5% 0.062W 3278 3278 4822 051 30103 10kΩ 5% 0.062W 3643 3643 2322 704 61303 13kΩ 1% 0603
3101 3101 4822 051 30102 1kΩ 5% 0.062W 3279 3279 4822 051 30103 10kΩ 5% 0.062W 3644 3644 4822 051 30101 100Ω 5% 0.062W
3102 3102 4822 051 30223 22kΩ 5% 0.062W 3280 3280 4822 051 30472 4.7kΩ 5% 0.062W 3645 3645 5322 117 13042 3.9kΩ 1% 0.063W 0603
3103 3103 4822 051 30102 1kΩ 5% 0.062W 3282 3282 4822 051 30472 4.7kΩ 5% 0.062W 3646 3646 5322 117 13042 3.9kΩ 1% 0.063W 0603
3104 3104 5322 117 13028 12kΩ 1% 0.063W 0603 3287 3287 4822 051 30008 Jumper 0603 3647 3647 4822 051 30479 47Ω 5% 0.062W
3105 3105 4822 117 13501 82Ω 5% 0.62W 0603 3288 3288 4822 051 30103 10kΩ 5% 0.062W 3648 3648 4822 051 30103 10kΩ 5% 0.062W
3106 3106 4822 051 30221 220Ω 5% 0.062W 3289 3289 4822 051 30103 10kΩ 5% 0.062W 3649 3649 4822 051 20008 Jumper 0805
3107 3107 4822 117 13501 82Ω 5% 0.62W 0603 3290 3290 4822 051 30103 10kΩ 5% 0.062W 3700 3700 4822 051 30101 100Ω 5% 0.062W
3108 3108 4822 051 30222 2.2kΩ 5% 0.062W 3291 3291 4822 051 30103 10kΩ 5% 0.062W 3701 3701 4822 051 30101 100Ω 5% 0.062W
3110 3110 4822 051 30683 68kΩ 5% 0.062W 3294 3294 4822 051 30479 47Ω 5% 0.062W 3702 3702 4822 051 30332 3.3kΩ 5% 0.062W
3111 3111 4822 051 30221 220Ω 5% 0.062W 3300 3300 4822 051 20108 1Ω 5% 0.1W 3703 3703 4822 051 30332 3.3kΩ 5% 0.062W
3112 3112 4822 051 30103 10kΩ 5% 0.062W 3301 3301 4822 051 20108 1Ω 5% 0.1W 3704 3704 4822 051 30683 68kΩ 5% 0.062W
3113 3113 4822 051 30333 33kΩ 5% 0.062W 3302 3302 4822 051 20108 1Ω 5% 0.1W 3705 3705 4822 051 30471 470Ω 5% 0.062W
3114 3114 4822 117 12903 1.8kΩ 1% 0.063W 0603 3304 3304 4822 117 13501 82Ω 5% 0.62W 0603 3706 3706 4822 051 30689 68Ω 5% 0.063W 0603
3116 3116 4822 051 30102 1kΩ 5% 0.062W 3306 3306 4822 117 13632 100kΩ 1% 0603 0.62W 3707 3707 4822 051 30101 100Ω 5% 0.062W
3117 3117 4822 051 30391 390Ω 5% 0.062W 3307 3307 5322 117 13026 4.7kΩ 1% 0.063W 0603 3708 3708 4822 051 30221 220Ω 5% 0.062W
3118 3118 4822 051 30103 10kΩ 5% 0.062W 3308 3308 4822 117 13501 82Ω 5% 0.62W 0603 3709 3709 4822 051 30689 68Ω 5% 0.063W 0603
3119 3119 4822 051 30103 10kΩ 5% 0.062W 3309 3309 5322 117 13026 4.7kΩ 1% 0.063W 0603 3710 3710 5322 117 13059 560Ω 1% 0.063W 0603
3120 3120 4822 051 30103 10kΩ 5% 0.062W 3310 3310 4822 051 30273 27kΩ 5% 0.062W 3711 3711 2322 704 66201 620Ω 1% 0603
3121 3121 4822 051 30103 10kΩ 5% 0.062W 3312 3312 4822 117 13632 100kΩ 1% 0603 0.62W 3712 3712 4822 117 12925 47kΩ 1% 0.063W 0603
3122 3122 2322 704 69109 3313 3313 4822 051 30273 27kΩ 5% 0.062W 3713 3713 4822 051 30689 68Ω 5% 0.063W 0603
3123 3123 4822 051 30103 10kΩ 5% 0.062W 3315 3315 4822 051 20228 2.2Ω 5% 0.1W 3714 3714 4822 051 30221 220Ω 5% 0.062W
3124 3124 4822 051 20228 2.2Ω 5% 0.1W 3316 3316 4822 051 20228 2.2Ω 5% 0.1W 3715 3715 4822 051 30683 68kΩ 5% 0.062W
3125 3125 4822 051 30103 10kΩ 5% 0.062W 3319 3319 4822 117 13632 100kΩ 1% 0603 0.62W 3716 3716 4822 051 30471 470Ω 5% 0.062W
3126 3126 4822 117 12139 22Ω 5% 0.062W 3321 3321 5322 117 13049 470Ω 1% 0.063W 0603 3717 3717 4822 051 30101 100Ω 5% 0.062W
3127 3127 4822 051 30103 10kΩ 5% 0.062W 3322 3322 5322 117 13049 470Ω 1% 0.063W 0603 3718 3718 4822 051 30221 220Ω 5% 0.062W
3128 3128 4822 051 30474 470kΩ 5% 0.062W 3324 3324 4822 051 30153 15kΩ 5% 0.062W 3719 3719 4822 051 30689 68Ω 5% 0.063W 0603
3129 3129 4822 051 30221 220Ω 5% 0.062W 3325 3325 4822 051 30123 12kΩ 5% 0.062W 3720 3720 5322 117 13059 560Ω 1% 0.063W 0603
3130 3130 4822 051 30222 2.2kΩ 5% 0.062W 3326 3326 4822 051 20228 2.2Ω 5% 0.1W 3721 3721 2322 704 66201 620Ω 1% 0603
3131 3131 4822 051 30682 6.8kΩ 5% 0.062W 3327 3327 4822 051 20228 2.2Ω 5% 0.1W 3722 3722 4822 117 12925 47kΩ 1% 0.063W 0603
3132 3132 2322 704 69109 3328 3328 4822 051 30153 15kΩ 5% 0.062W 3723 3723 4822 051 30221 220Ω 5% 0.062W
3133 3133 4822 051 30472 4.7kΩ 5% 0.062W 3332 3332 4822 051 30682 6.8kΩ 5% 0.062W 3724 3724 4822 051 30332 3.3kΩ 5% 0.062W
3134 3134 4822 051 30472 4.7kΩ 5% 0.062W 3333 3333 4822 051 30682 6.8kΩ 5% 0.062W 3725 3725 4822 051 30332 3.3kΩ 5% 0.062W
3136 3136 4822 117 13632 100kΩ 1% 0603 0.62W 3334 3334 4822 051 30682 6.8kΩ 5% 0.062W 3726 3726 4822 051 30683 68kΩ 5% 0.062W
3138 3138 4822 051 30103 10kΩ 5% 0.062W 3336 3336 4822 051 20008 Jumper 0805 3727 3727 4822 051 30471 470Ω 5% 0.062W
3142 3142 4822 051 30008 Jumper 0603 3337 3337 4822 051 20008 Jumper 0805 3728 3728 4822 051 30101 100Ω 5% 0.062W
3143 3143 4822 051 30008 Jumper 0603 3340 3340 4822 051 30153 15kΩ 5% 0.062W 3729 3729 4822 051 30221 220Ω 5% 0.062W
3144 3144 4822 051 30008 Jumper 0603 3341 3341 4822 051 30272 2.7kΩ 5% 0.062W 3730 3730 4822 051 30689 68Ω 5% 0.063W 0603
3145 3145 4822 051 30008 Jumper 0603 3342 3342 4822 051 30008 Jumper 0603 3731 3731 5322 117 13059 560Ω 1% 0.063W 0603
3146 3146 4822 051 30008 Jumper 0603 3343 3343 4822 117 12917 1Ω 5% 0.062W 0603 3732 3732 2322 704 66201 620Ω 1% 0603
3147 3147 4822 051 30008 Jumper 0603 3345 3345 4822 051 30332 3.3kΩ 5% 0.062W 3733 3733 4822 117 12925 47kΩ 1% 0.063W 0603
3152 3152 4822 051 30223 22kΩ 5% 0.062W 3401 3401 4822 051 30103 10kΩ 5% 0.062W 3734 3734 4822 051 30221 220Ω 5% 0.062W
3153 3153 4822 117 12139 22Ω 5% 0.062W 3402 3402 4822 117 13632 100kΩ 1% 0603 0.62W 3735 3735 4822 051 30683 68kΩ 5% 0.062W
3154 3154 4822 051 30223 22kΩ 5% 0.062W 3403 3403 4822 051 30103 10kΩ 5% 0.062W 3736 3736 4822 051 30471 470Ω 5% 0.062W
3155 3155 4822 117 12139 22Ω 5% 0.062W 3404 3404 4822 051 30223 22kΩ 5% 0.062W 3737 3737 4822 051 30101 100Ω 5% 0.062W
3156 3156 4822 051 30101 100Ω 5% 0.062W 3405 3405 4822 051 30222 2.2kΩ 5% 0.062W 3738 3738 2322 704 62401 RST SM 0603 RC22H
3157 3157 4822 051 30101 100Ω 5% 0.062W 3406 3406 4822 051 30223 22kΩ 5% 0.062W 240R PM1 R
3158 3158 4822 051 30393 39kΩ 5% 0.062W 3407 3407 4822 051 30103 10kΩ 5% 0.062W 3739 3739 4822 051 30689 68Ω 5% 0.063W 0603
3159 3159 4822 117 12968 820Ω 5% 0.62W 3409 3409 4822 051 30103 10kΩ 5% 0.062W 3740 3740 5322 117 13059 560Ω 1% 0.063W 0603
3160 3160 4822 051 30393 39kΩ 5% 0.062W 3411 3411 4822 051 30223 22kΩ 5% 0.062W 3741 3741 5322 117 13059 560Ω 1% 0.063W 0603
3161 3161 4822 117 12968 820Ω 5% 0.62W 3412 3412 4822 051 30472 4.7kΩ 5% 0.062W 3742 3742 4822 117 12925 47kΩ 1% 0.063W 0603
3162 3162 4822 051 30101 100Ω 5% 0.062W 3413 3413 4822 051 30223 22kΩ 5% 0.062W 3743 3743 4822 051 30221 220Ω 5% 0.062W
3163 3163 4822 051 30101 100Ω 5% 0.062W 3414 3414 4822 051 30223 22kΩ 5% 0.062W 3744 3744 4822 051 30683 68kΩ 5% 0.062W
3200 3200 4822 051 30223 22kΩ 5% 0.062W 3501 3501 4822 051 30102 1kΩ 5% 0.062W 3745 3745 4822 051 30471 470Ω 5% 0.062W
3202 3202 4822 051 30102 1kΩ 5% 0.062W 3502 3502 4822 051 30103 10kΩ 5% 0.062W 3746 3746 4822 051 30101 100Ω 5% 0.062W
3204 3204 4822 051 30223 22kΩ 5% 0.062W 3503 3503 4822 051 30472 4.7kΩ 5% 0.062W 3747 3747 2322 704 62401 RST SM 0603 RC22H
3205 3205 4822 051 30223 22kΩ 5% 0.062W 3504 3504 4822 051 30472 4.7kΩ 5% 0.062W 240R PM1 R
3207 3207 4822 051 30102 1kΩ 5% 0.062W 3505 3505 4822 051 30103 10kΩ 5% 0.062W 3748 3748 4822 051 30689 68Ω 5% 0.063W 0603
3209 3209 4822 051 30223 22kΩ 5% 0.062W 3506 3506 4822 051 30103 10kΩ 5% 0.062W 3749 3749 5322 117 13059 560Ω 1% 0.063W 0603
3210 3210 4822 051 30223 22kΩ 5% 0.062W 3507 3507 4822 051 30103 10kΩ 5% 0.062W 3750 3750 5322 117 13059 560Ω 1% 0.063W 0603
3212 3212 4822 051 30223 22kΩ 5% 0.062W 3508 3508 4822 051 30102 1kΩ 5% 0.062W 3751 3751 4822 117 12925 47kΩ 1% 0.063W 0603
3214 3214 4822 051 30472 4.7kΩ 5% 0.062W 3509 3509 4822 051 30101 100Ω 5% 0.062W 3752 3752 4822 051 30181 180Ω 5% 0.062W
3216 3216 4822 051 30223 22kΩ 5% 0.062W 3510 3510 4822 051 30103 10kΩ 5% 0.062W 3753 3753 4822 117 12139 22Ω 5% 0.062W
3218 3218 4822 051 30223 22kΩ 5% 0.062W 3512 3512 4822 051 30682 6.8kΩ 5% 0.062W 3754 3754 4822 051 30683 68kΩ 5% 0.062W
3219 3219 4822 051 30472 4.7kΩ 5% 0.062W 3531 3531 4822 051 30472 4.7kΩ 5% 0.062W 3755 3755 4822 051 30471 470Ω 5% 0.062W
3222 3222 4822 051 30223 22kΩ 5% 0.062W 3600 3600 4822 117 13573 4 x 47Ω 5% 3756 3756 4822 051 30101 100Ω 5% 0.062W
3223 3223 4822 051 30223 22kΩ 5% 0.062W 3604 3604 4822 051 30332 3.3kΩ 5% 0.062W 3757 3757 4822 051 30221 220Ω 5% 0.062W
3226 3226 4822 051 30102 1kΩ 5% 0.062W 3605 3605 4822 051 30332 3.3kΩ 5% 0.062W 3758 3758 4822 051 30689 68Ω 5% 0.063W 0603
3227 3227 4822 051 30223 22kΩ 5% 0.062W 3606 3606 4822 051 30103 10kΩ 5% 0.062W 3759 3759 5322 117 13059 560Ω 1% 0.063W 0603
3229 3229 3198 031 11010 4 x 100Ω 5% 1206 3607 3607 4822 051 30103 10kΩ 5% 0.062W 3760 3760 5322 117 13059 560Ω 1% 0.063W 0603
3236 3236 4822 051 30472 4.7kΩ 5% 0.062W 3608 3608 4822 051 30103 10kΩ 5% 0.062W 3761 3761 4822 117 12925 47kΩ 1% 0.063W 0603
3237 3237 4822 051 30102 1kΩ 5% 0.062W 3609 3609 4822 051 30561 560Ω 5% 0.062W 3762 3762 4822 051 30221 220Ω 5% 0.062W
3239 3239 4822 117 12891 220kΩ 1% 0.063W 0603 3611 3611 4822 051 30479 47Ω 5% 0.062W 3766 3766 4822 051 30332 3.3kΩ 5% 0.062W
3241 3241 4822 051 30102 1kΩ 5% 0.062W 3612 3612 4822 051 30479 47Ω 5% 0.062W 3767 3767 4822 051 30332 3.3kΩ 5% 0.062W
3242 3242 4822 051 30223 22kΩ 5% 0.062W 3613 3613 4822 051 30103 10kΩ 5% 0.062W 3770 3770 4822 051 20008 Jumper 0805
3245 3245 4822 051 30101 100Ω 5% 0.062W 3616 3616 4822 117 13573 4 x 47Ω 5% 3771 3771 4822 051 20008 Jumper 0805
3246 3246 4822 051 30101 100Ω 5% 0.062W 3621 3621 4822 051 30103 10kΩ 5% 0.062W 3772 3772 4822 051 20008 Jumper 0805
3247 3247 4822 051 30331 330Ω 5% 0.062W 3622 3622 4822 051 30101 100Ω 5% 0.062W 3773 3773 4822 051 20008 Jumper 0805
3250 3250 4822 117 13525 24kΩ 1% 0.62W 0603 3623 3623 4822 051 30479 47Ω 5% 0.062W 3774 3774 4822 051 20008 Jumper 0805
3251 3251 4822 051 30103 10kΩ 5% 0.062W 3624 3624 4822 051 30101 100Ω 5% 0.062W 3775 3775 4822 051 20008 Jumper 0805
3255 3255 4822 051 30151 150Ω 5% 0.062W 3625 3625 4822 051 30103 10kΩ 5% 0.062W 3801 3801 4822 051 30392 3.9kΩ 5% 0.063W 0603
3256 3256 4822 051 30101 100Ω 5% 0.062W 3626 3626 4822 051 30332 3.3kΩ 5% 0.062W 3802 3802 4822 051 30392 3.9kΩ 5% 0.063W 0603
 Spare Parts List SD-5.00SA_CH 10. EN 65

3803 3803 4822 117 12139 22Ω 5% 0.062W 7902 7902 9322 184 32668 IC SM ICS612G-01
3805 3805 5322 117 13062 390Ω 1% 0.063W 0603 d (ICSI) R
3806 3806 4822 051 30123 12kΩ 5% 0.062W 7904 7904 9351 742 20118 IC SM 74HCT04PW
3807 3807 4822 051 30682 6.8kΩ 5% 0.062W 6100 6100 4822 130 11397 BAS316 (PHSE) R
3808 3808 4822 051 30339 33Ω 5% 0.062W 6101 6101 4822 130 11397 BAS316
3809 3809 4822 051 30339 33Ω 5% 0.062W 6300 6300 9322 128 69685 S1D
3812 3812 4822 051 30103 10kΩ 5% 0.062W 6301 6301 9322 128 69685 S1D
3816 3816 4822 051 30339 33Ω 5% 0.062W 6302 6302 9322 128 69685 S1D
3900 3900 4822 051 30103 10kΩ 5% 0.062W 6400 6400 4822 130 11397 BAS316
3901 3901 4822 051 30103 10kΩ 5% 0.062W
3902 3902 4822 051 30339 33Ω 5% 0.062W
3903 3903 4822 051 30569 56Ω 5% 0,062W ce
3904 3904 4822 051 30569 56Ω 5% 0,062W
3905 3905 4822 051 30339 33Ω 5% 0.062W 7100 7100 9340 425 30115 BC847BPN
3906 3906 4822 051 30332 3.3kΩ 5% 0.062W 7101 7101 4822 209 32073 MC34072D
3907 3907 4822 051 30479 47Ω 5% 0.062W 7102 7102 4822 209 90927 L78L05ACD
3910 3910 4822 051 30339 33Ω 5% 0.062W 7103 7103 5322 130 60159 BC846B
3912 3912 4822 051 30479 47Ω 5% 0.062W 7105 7105 9352 703 49118 IC SM TZA1033HL/K2
3913 3913 4822 051 30479 47Ω 5% 0.062W (PHSE) R
4001 4001 4822 051 30008 Jumper 0603 7106 7106 4822 209 32073 MC34072D
4002 4002 4822 051 30008 Jumper 0603 7107 7107 5322 130 60845 BC807-25
4005 4005 4822 051 30008 Jumper 0603 7108 7108 4822 130 42804 BC817-25
4006 4006 4822 051 30008 Jumper 0603 7109 7109 9337 331 10215 FET SIG SM BST82
4104 4104 4822 051 30008 Jumper 0603 (PHSE) R
4201 4201 4822 051 30008 Jumper 0603 7110 7110 5322 130 42718 BFS20
4203 4203 4822 051 30008 Jumper 0603 7111 7111 5322 130 42718 BFS20
4205 4205 4822 051 30008 Jumper 0603 7200 7200 9322 163 27685 IC SM NCP301LSN45
4301 4301 4822 051 30008 Jumper 0603 (ONSE) R
4303 4303 4822 051 20008 Jumper 0805 7201 7201 4822 130 60373 BC856B
4304 4304 4822 051 20008 Jumper 0805 7202 7202 9340 425 30115 BC847BPN
4401 4401 4822 051 30008 Jumper 0603 7207 7207 9352 681 05557 IC SM SAA7812HL/M3B
4500 4500 4822 051 30008 Jumper 0603 (PHSE) Y
4600 4600 4822 051 30008 Jumper 0603 7208 7208 9965 000 14089 M29F002BT-70K1/
4605 4605 4822 051 30008 Jumper 0603 V7.12.0
4607 4607 4822 051 30008 Jumper 0603 7208 7208 9965 000 20632 M29F002BT-70K1/SW
4800 4800 4822 051 30008 Jumper 0603 VER 7.13.0
4803 4803 4822 051 30008 Jumper 0603 7300 7300 9322 139 85668 BA6665FM
4902 4902 4822 051 30008 Jumper 0603 7301 7301 4822 209 30095 LM833D
7303 7303 4822 209 17229 BA5938FM
7305 7305 9322 136 29668 L78M09CDT
b 7400 7400 9322 130 41668 IC SM M24C64-WMN6
(ST00) R
5100 5100 4822 157 11499 BLM11P600SPT 7402 7402 9965 000 17097 M29W160DT-70N1/VER
5101 5101 4822 157 11499 BLM11P600SPT 5.6.14
5102 5102 4822 157 11499 BLM11P600SPT 7402 7402 9965 000 20633 M29W160ET70N6/SW
5200 5200 4822 157 11499 BLM11P600SPT VER 5.1.06
5201 5201 4822 157 11499 BLM11P600SPT 7403 7403 9965 000 17097 M29W160DT-70N1/VER
5202 5202 4822 157 11499 BLM11P600SPT 5.6.14
5203 5203 4822 157 11499 BLM11P600SPT 7403 7403 9965 000 20633 M29W160ET70N6/SW
5401 5401 4822 157 11499 BLM11P600SPT VER 5.1.06
5402 5402 4822 157 11499 BLM11P600SPT 7404 7404 5322 130 60159 BC846B
5502 5502 4822 157 71206 Bead 600Ω at 100MHz 7405 7405 5322 130 60159 BC846B
5504 5504 2422 549 43062 Bead 600Ω at 100MHz 7406 7406 9352 499 80118 IC SM 74LVC00APW
5505 5505 4822 157 71206 Bead 600Ω at 100MHz (PHSE) R
5600 5600 4822 157 11499 BLM11P600SPT 7409 7409 5322 130 60159 BC846B
5601 5601 4822 157 11499 BLM11P600SPT 7412 7412 9322 178 88685 IC SM NCP301LSN27
5602 5602 4822 157 11499 BLM11P600SPT (ONSE) R
5603 5603 4822 157 11499 BLM11P600SPT 7413 7413 4822 130 60373 BC856B
5700 5700 4822 157 11499 BLM11P600SPT 7500 7500 9322 166 67668 IC SM
5701 5701 4822 157 70649 4,7UH (NL322522T- MT48LC4M16A2TG-
4R7J) 7E(MRN0)R
5702 5702 4822 157 11499 BLM11P600SPT 7500 7500 9322 178 78668 K4S641632F-TC70
5703 5703 4822 157 11499 BLM11P600SPT 7502 7502 9322 166 67668 IC SM
5704 5704 4822 157 11717 BLM31P500SPT MT48LC4M16A2TG-
5705 5705 4822 157 11499 BLM11P600SPT 7E(MRN0)R
5706 5706 4822 157 70649 4,7UH (NL322522T- 7502 7502 9322 178 78668 K4S641632F-TC70
4R7J) 7508 7508 9340 425 20115 BC847BS
5708 5708 4822 157 11717 BLM31P500SPT 7601 7601 9322 188 97671 IC SM STI5588LVA
5709 5709 4822 157 11499 BLM11P600SPT (ST00) Y
5710 5710 4822 157 11499 BLM11P600SPT 7700 7700 9965 000 04199 BSN20
5712 5712 4822 157 70649 4,7UH (NL322522T- 7701 7701 9340 425 30115 BC847BPN
4R7J) 7703 7703 9965 000 04199 BSN20
5713 5713 4822 157 11499 BLM11P600SPT 7704 7704 9322 172 45668 LF33ABDT
5714 5714 4822 157 11499 BLM11P600SPT 7705 7705 9340 425 30115 BC847BPN
5715 5715 4822 157 70651 12UH (NL322522T-120J) 7707 7707 9322 167 69668 IC SM LD1117ADT18
5716 5716 4822 157 11717 BLM31P500SPT (ST00) R
5717 5717 4822 157 11499 BLM11P600SPT 7708 7708 9965 000 04199 BSN20
5718 5718 4822 157 11499 BLM11P600SPT 7709 7709 9340 425 30115 BC847BPN
5719 5719 4822 157 11499 BLM11P600SPT 7710 7710 9965 000 04199 BSN20
5720 5720 4822 157 11499 BLM11P600SPT 7713 7713 9322 179 78668 IC SM LF18ABDT
5721 5721 4822 157 11499 BLM11P600SPT (ST00) R
5722 5722 4822 157 70651 12UH (NL322522T-120J) 7714 7714 9340 425 30115 BC847BPN
5723 5723 4822 157 11499 BLM11P600SPT 7716 7716 4822 209 17398 LD1117DT33
5724 5724 4822 157 70651 12UH (NL322522T-120J) 7717 7717 9340 425 30115 BC847BPN
5725 5725 4822 157 11499 BLM11P600SPT 7719 7719 4822 209 17398 LD1117DT33
5726 5726 4822 157 11717 BLM31P500SPT 7720 7720 9352 456 80115 74HCT1G125GW
5801 5801 4822 157 11499 BLM11P600SPT 7721 7721 9340 425 30115 BC847BPN
5901 5901 2422 549 43062 Bead 600Ω at 100MHz 7800 7800 9352 715 73557 IC SM SAA7329HL
5902 5902 2422 549 43062 Bead 600Ω at 100MHz (PHSE) Y
5904 5904 2422 549 43062 Bead 600Ω at 100MHz 7801 7801 5322 130 42718 BFS20
5905 5905 2422 549 43062 Bead 600Ω at 100MHz 7803 7803 9352 317 20118 IC SM 74LVC125APW
(PHSE) R
7901 7901 9322 151 71668 IC SM MK2703STR
(MICL) R
EN 66 11. SD-5.00SA_CH Revision List

11. Revision List

First release