Evaluation Board User Guide

UG-146
One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com

Evaluating the ADE7878 Energy Metering IC

FEATURES This user guide describes the ADE7878 evaluation kit hardware,
Evaluation board designed to be used with accompanying firmware, and software functionality. The evaluation board
software to implement a fully functional 3-phase energy contains an ADE7878 and a LPC2368 microcontroller (from
meter NXP Semiconductors). The ADE7878 and its associated
Easy connection of external transducers via screw terminals metering components are optically isolated from the
Easy modification of signal conditioning components using microcontroller. The microcontroller communicates with the
PCB sockets PC using a USB interface. Firmware updates can be loaded
LED indicators on the CF1, CF2, CF3, IRQ0, and IRQ1 logic using one PC com port and a regular serial cable.
outputs The ADE7878 evaluation board and this user guide, together
Optically isolated metering components and USB-based with the ADE7878 data sheet, provide a complete evaluation
communication with a PC platform for the ADE7878.
External voltage reference option available for on-chip
The evaluation board has been designed so that the ADE7878
reference evaluation
can be evaluated in an energy meter. Using appropriate current
PC COM port-based firmware updates
transducers, the evaluation board can be connected to a test
GENERAL DESCRIPTION bench or high voltage (240 V rms) test circuit. On-board
The ADE7878 is a high accuracy, 3-phase electrical energy resistor divider networks provide the attenuation for the line
measurement IC with serial interfaces and three flexible pulse voltages. This user guide describes how the current transducers
outputs. The ADE7878 incorporates seven ADCs, reference should be connected for the best performance. The evaluation
circuitry, and all signal processing required to perform total board requires two external 3.3 V power supplies and the
(fundamental and harmonic) active, reactive, and apparent appropriate current transducers.
energy measurement, fundamental active and reactive energy
measurement, and rms calculations.
EVALUATION BOARD CONNECTION DIAGRAM
IBN IBP IAN IAP VDD2 GND2 MCU_VDD MCU_GND

P2 P1 P10 P12

P3
ICP
ICN
LPC2368 USB PORT
FILTER
NETWORK ADE78xx
INP DIGITAL
ISOLATORS
INN
P13
P4
P15
OPTIONAL EXTERNAL ADR280 OPTIONAL
1.2V REFERENCE EXTERNAL
CLOCK IN CONNECTOR TO
PC COM PORT

FILTER NETWORK JTAG

AND ATTENUATION INTERFACE

P5 P6 P7 P8 P9 J2 J3 J4
09078-001

VN GND VCP GND VBP GND VAP GND VDD GND CF3 CF2 CF1

Figure 1.

PLEASE SEE THE LAST PAGE FOR AN IMPORTANT

WARNING AND LEGAL TERMS AND CONDITIONS. Rev. 0 | Page 1 of 36
UG-146 Evaluation Board User Guide

TABLE OF CONTENTS
Features .............................................................................................. 1 PSM3 Mode ................................................................................. 18
General Description ......................................................................... 1 Managing the Communication Protocol Between the
Evaluation Board Connection Diagram ........................................ 1 Microcontroller and the ADE7878 .............................................. 19

Revision History ............................................................................... 2 Acquiring HSDC Data Continuously ...................................... 21

Evaluation Board Hardware ............................................................ 3 Starting the ADE7878 DSP ....................................................... 22

Power Supplies .............................................................................. 3 Stopping the ADE7878 DSP ..................................................... 22

Analog Inputs (P1 to P4 and P5 to P8)...................................... 3 Upgrading Microcontroller Firmware ......................................... 23

Setting Up the Evaluation Board as an Energy Meter ............. 6 Control Registers Data File ....................................................... 23

Evaluation Board Software .............................................................. 8 Evaluation Board Schematics and Layout ................................... 25

Installing and Uninstalling the ADE7878 Software ................. 8 Schematic..................................................................................... 25

Front Panel .................................................................................... 8 Layout .......................................................................................... 32

PSM0 Mode—Normal Power Mode .......................................... 9 Ordering Information .................................................................... 34

PSM1 Mode ................................................................................. 17 Bill of Materials ........................................................................... 34

PSM2 Mode ................................................................................. 17

REVISION HISTORY
8/10—Revision 0: Initial Version

Rev. 0 | Page 2 of 36
Evaluation Board User Guide UG-146

EVALUATION BOARD HARDWARE

POWER SUPPLIES JP3A JP5A
TP1
ADE78xx
The evaluation board has three power domains: one that R9 R17 IAP

supplies the microcontroller and one side of the isocouplers, 100Ω

C9
1kΩ
C17
JP1A
one that supplies the other side of the optocouplers, and one P1 R1 22,000pF 22,000pF

that supplies the ADE7878. The ground of the microcontroller’s IAP

IAN
power domain is connected to the ground of the PC through
C10 C18
the USB cable. The ground of the ADE7878 power domain is JP2A R2 22,000pF 22,000pF
determined by the ground of the phase voltages, VAP, VBP, VCP, R10 R18 IAN

and VN, and must be different from the ground of the micro- 100Ω 1kΩ

09078-002
TP2
controller’s power domain. JP4A JP6A

The microcontroller 3.3 V supply is provided at the P12 Figure 2. Phase A Current Input Structure on the Evaluation Board
connector. The ADE7878 3.3 V supply is provided at the P9 JP3A JP5A
TP1
connector. Close jumper JP2 to ensure that the same 3.3 V R9 R17
ADE78xx
IAP
supply from ADE7878 is also provided at the isocouplers. 100Ω 1kΩ
IMAX = 6A rms
ANALOG INPUTS (P1 TO P4 AND P5 TO P8) CT
P1
JP1A R1
50Ω
C9
22,000pF
C17
22,000pF
1:2000
Current and voltage signals are connected at the screw terminal,
P1 to P4 and P5 to P8, respectively. All analog input signals are
R2 C10 C18
filtered using the on-board antialiasing filters before the signals JP2A 50Ω 22,000pF 22,000pF

are connected to the ADE7878. The components used on the R10 R18 IAN

board are the recommended values to be used with the 100Ω 1kΩ

09078-003
TP2
ADE7878. JP4A JP6A

Current Sense Inputs (P1, P2, P3, and P4) Figure 3. Example of a Current Transformer Connection

The ADE7878 measures three phase currents and the neutral The R1 and R2 burden resistors must be defined as functions of
current. Current transformers or Rogowski coils can be used the current transformer ratio and maximum current of the
to sense the current but should not be mixed together. The system, using the following formula:
ADE7878 contains different internal PGA gains on phase R1 = R2 = 1/2 × 0.5/sqrt(2) × N/IFS
currents and on the neutral current; therefore, sensors with
different ratios can be used. The only requirement is to have the where:
same scale signals at the PGA outputs; otherwise, the mismatch 0.5/sqrt(2) is the rms value of the full-scale voltage accepted at
functionality of the ADE7878 is compromised (see the the ADC input.
ADE7878 data sheet for more details about neutral current N is the input-to-output ratio of the current transformer.
mismatch). Figure 2 shows the structure used for the Phase A IFS is the maximum rms current to be measured.
current; the sensor outputs are connected to the P1 connector. The JP1A and JP2A jumpers should be opened if R1 and R2 are
The R1 and R2 resistors are the burden resistors and, by default, used. The antialiasing filters should be enabled by opening the
they are not populated. They can also be disabled using the JP1A J5A and J6A jumpers (see Figure 3).
and JP2A jumpers. The R9/C9 and R10/C10 RC networks are The secondary current of the transformer is converted to a
used in conjunction with Rogowski coils. They can be disabled voltage by using a burden resistor across the secondary winding
using the JP3A and JP4A jumpers. The R17/C17 and R18/C18 outputs. Care should be taken when using a current transformer
RC networks are the antialiasing filters. The default corner as the current sensor. If the secondary is left open (that is, no
frequency of these low pass filters is 7.2 kHz (1 kΩ/22 nF). burden is connected), a large voltage may be present at the
These filters can easily be adjusted by replacing the components secondary outputs. This can cause an electric shock hazard and
on the evaluation board. potentially damage electronic components.
All the other current channels (that is, Phase B, Phase C, and Most current transformers introduce a phase shift that the
the neutral current) have a similar input structure. manufacturer indicates in the data sheet. This phase shift can
Using a Current Transformer as the Current Sensor lead to significant energy measurement errors, especially at low
power factors. The ADE7878 can correct the phase error using
Figure 3 shows how a current transformer can be used as a the APHCAL[9:0], BPHCAL[9:0], and CPHCAL[9:0] phase
current sensor in one phase of a 3-phase, 4-wire distribution calibration registers as long as the error stays between −6.732°
system (Phase A). The other two phases and the neutral current and +1.107° at 50 Hz (see the ADE7878 data sheet for more
require similar connections.

Rev. 0 | Page 3 of 36
UG-146 Evaluation Board User Guide
details). The software supplied with the ADE7878 evaluation Voltage Sense Inputs (P5, P6, P7, and P8 Connectors)
board allows user adjustment of phase calibration registers. The voltage input connections on the ADE7878 evaluation
For this particular example, burden resistors of 50 Ω signify an board can be directly connected to the line voltage sources.
input current of 7.05 A rms at the ADE7878 ADC full-scale The line voltages are attenuated using a simple resistor divider
input (0.5 V). In addition, the PGA gains for the current network before they are supplied to the ADE7878. The
channel must be set at 1. For more information about setting attenuation network on the voltage channels is designed so that
PGA gains, see the ADE7878 data sheet. The evaluation the corner frequency (3 dB frequency) of the network matches
software allows the user to configure the current channel gain. that of the antialiasing filters in the current channel inputs. This
prevents the occurrence of large energy errors at low power
Using a Rogowski Coil as the Current Sensor
factors.
Figure 4 shows how a Rogowski coil can be used as a current
sensor in one phase of a 3-phase, 4-wire distribution system Figure 5 shows a typical connection of the Phase A voltage
(Phase A). The other two phases and the neutral current require inputs; the resistor divider is enabled by opening the JP7A
similar connections. The Rogowski coil does not require any jumper. The antialiasing filter on the VN data path is enabled
burden resistors; therefore, R1 and R2 should not be populated. by opening the JP7N jumper. JP8A and JP8N are also opened.
The antialiasing filters should be enabled by opening the J5A The VN analog input is connected to AGND via the R25/C25
and J6A jumpers. To account for the high frequency noise antialiasing filter using the JP8N connector.
introduced by the coil, an additional antialiasing filter must be The attenuation networks can be easily modified by the user to
introduced by opening the JP3A and JP4A jumpers. Then, to accommodate any input level. However, the value of R32 (1 kΩ),
compensate for the 20 dB/dec gain introduced by the di/dt should be modified only together with the corresponding
sensor, the integrator of the ADE7878 must be enabled by resistors in the current channel (R17 and R18 on the Phase A
setting Bit 0 (INTEN) of the CONFIG register. The integrator current data path).
has a −20 dB/dec attenuation and an approximately −90° phase JP7A
TP12 ADE78xx
shift and, when combined with the di/dt sensor, results in a VAP
P8
R26 R29 VAP
magnitude and phase response with a flat gain over the 1MΩ 100kΩ
frequency band of interest. JP8A R32
1kΩ
C32
22,000pF
JP3A JP5A
TP1 VN

1
2
3
NEUTRAL

ADE78xx
PHASE A

R9 R17

COM
IAP JP9A

B
100Ω 1kΩ
C9 C17
ROGOWSKI P1 JP1A R1 22,000pF 22,000pF JP7N
COIL TP9
P5
R25 VN
VN 1kΩ C25
JP8N 22,000pF
C10 C18

09078-005
JP2A R2 22,000pF 22,000pF
R10 R18 IAN
100Ω 1kΩ Figure 5. Phase A Voltage Input Structure on the Evaluation Board
09078-004

TP2
JP4A JP6A The maximum signal level permissible at the VAP, VBP, and
Figure 4. Example of a Rogowski Coil Connection VCP pins of the ADE7878 is 0.5 V peak. Although the
ADE7878 analog inputs can withstand ±2 V without risk of
permanent damage, the signal range should not exceed ±0.5 V
with respect to AGND for a specified operation.

Rev. 0 | Page 4 of 36
Evaluation Board User Guide UG-146
Table 1. Recommended Settings for Evaluation Board Connectors
Jumper Option Description
JP1 Soldered Connects AGND to ground. By default, it is soldered.
JP1A, JP1B, Open Connect IAP, IBP, IC, and INP to AGND. By default, they are open.
JP1C, JP1N,
JP2 Closed Connects the ADE7878 VDD power supply (VDD_F at the P9 connector) to the power supply of the
isocouplers (VDD2 at the P10 connector). By default, it is closed.
JP2A, JP2B, Open Connect IAN, IBN, ICN, and INN to AGND. By default, they are open.
JP2C, JP2N
JP3 Unsoldered Connects the pad metal below the ADE7878 to AGND. By default, it is unsoldered.
JP3A, JP3B, Closed Disable the phase compensation network in the IAP, IBP, ICP, and INP data path. By default, they are
JP3C, JP3N closed.
JP4 Soldered Connects C3 to DVDD. By default, it is soldered.
JP4A, JP4B, Closed Disable the phase compensation network in the IAN, IBN, ICN, and INN data path. By default, they are
JP4C, JP4N closed.
JP5 Soldered Connects C5 to AVDD. By default, it is soldered.
JP5A, JP5B, Open Disable the phase antialiasing filter in the IAP, IBP, ICP, and INP data path. By default, they are open.
JP5C, JP5N
JP6 Soldered Connects C41 to the REF pin of the ADE7878. By default, it is soldered.
JP6A, JP6B, Open Disable the phase antialiasing filter in the IAN, IBN, ICN, and INN data path. By default, they are open.
JP6C, JP6N
JP7 Closed Enables the supply to the microcontroller. When open, takes out the supply to the microcontroller. By
default, it is closed.
JP7A, JP7B, Open Disable the resistor divider in the VAP, VBP, and VCP data path. By default, they are open.
JP7C
JP7N Open Disables the antialiasing filter in the VN data path. By default, it is open.
JP8 Open Sets the microcontroller in flash memory programming mode. By default, it is open.
JP8A, JP8B, Open Connect VAP, VBP, and VCP to AGND. By default, they are open.
JP8C
JP8N Closed Connects VN to AGND. By default, it is closed.
JP9 Open When closed, signals the microcontroller to declare all I/O pins as outputs. It is used when another
microcontroller is used to manage the ADE7878 through the P38 socket. By default, it is open.
JP9A, JP9B, Soldered to Pin Connect the ground of antialiasing filters in the VAP, VB, and VCP data path to AGND or VN. By default,
JP9C 1 (AGND) they are soldered to AGND.
JP10 Open Connects the external voltage reference to ADE7878. By default, it is open.
JP11 Soldered to Pin Connects the CLKIN pin of the ADE7878 to a 16,384 MHz crystal (Pin 1 of JP11) or to an external clock
1 input provided at J1. By default, it is soldered to Pin 1.
JP12 Soldered to Pin Connects DGND (Pin 2 of JP12) of the ADE7878 to ground (Pin 1 of JP12) or to AGND (Pin 3 of JP12).
3 (AGND)
JP35, JP33 Open If I2C communication between the NXP LPC2368 and the ADE7878 is used, these connectors should be
closed with 0 Ω resistors, and the JP36 and JP34 connectors should be opened. By default, the SPI is the
communication used between the NXP LPC2368 and the ADE7878; therefore, these connectors are open.
JP31, JP37 Open If HSDC communication is used, these connectors should be closed with 0 Ω resistors, and the JP35 and
JP33 connectors should also be closed. By default, the SPI is the communication used between the NXP
LPC2368 and the ADE7878; therefore, these connectors are open.
JP36, JP34, Closed with If SPI communication is used between the NXP LPC2368 and the ADE7878, these connectors should be
JP32, JP38 0 Ω resistors closed and JP35, JP33, JP31, and JP37 should be opened. By default, the SPI is the communication used
between the NXP LPC2368 and the ADE7878; therefore, these connectors are closed.

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UG-146 Evaluation Board User Guide
SETTING UP THE EVALUATION BOARD AS AN JP33, JP35, and JP37 jumpers should be closed using 0 Ω
ENERGY METER resistors, and the JP32, JP34, JP36, and JP38 jumpers should be
open. In this case, the I2C port should be chosen as the active
Figure 6 shows a typical setup for the ADE7878 evaluation port in the ADE7878 control panel (see Table 2).
board. In this example, an energy meter for a 4-wire, 3-phase
distribution system is shown. Current transformers are used to Table 2. Jumper State to Activate SPI or I2C Communication
sense the phase and neutral currents and are connected as Active Jumpers Closed
shown in Figure 6. The line voltages are connected directly to Communication with 0 Ω Resistors Jumpers Open
the evaluation board as shown. Note that the state of all jumpers SPI (Default) JP32, JP34, JP36, JP31, JP33, JP35,
must match the states shown in Figure 6, keeping in mind that JP38 JP37
the board is supplied from two different 3.3 V power supplies, I2C JP31, JP33, JP35, JP32, JP34, JP36,
one for the ADE7878 domain, VDD, and one for the NXP JP37 JP38
LPC2368 domain, MCU_VDD. Because the two domains are Using the Evaluation Board with Another Microcontroller
isolated to ensure that there is no electrical connection between
It is possible to manage the ADE7878 mounted on the evalua-
the high voltage test circuit and the control circuit, the power
tion board with a different microcontroller mounted on another
supplies should have floating voltage outputs.
board. The ADE7878 can be connected to this second board
The evaluation board is connected to the PC using a regular through one of two connectors: P11 or P38. P11 is placed on the
USB cable supplied with the board. When the evaluation board same power domain as the ADE7878. P38 is placed on the
is powered up and connected to the PC, the enumeration process power domain of the NXP LPC2368 and communicates with
begins and the PC recognizes new hardware and asks to install the ADE7878 through the isocouplers. If P11 is used, the power
the appropriate driver. The drive can be found in the VirCOM_ domain of the NXP LPC2368 should not be supplied at P12. If
Driver_XP folder of the CD. After the driver is installed, the P38 is used, a conflict may arise with the NXP LPC2368 I/O
supplied evaluation software can be launched. The next section ports. The following two options are provided to deal with this
describes the ADE7878 evaluation software in detail and how it situation:
can be installed and uninstalled.
• One option is to keep the NXP LPC2368 running and close
Activating Serial Communication Between the ADE7878 JP9. This tells the NXP LPC2368 to set all of its I/Os high
and the NXP LPC2368 to allow the other microcontroller to communicate with
The ADE7878 evaluation board is supplied with communica- the ADE7878. After JP9 is closed, the S2 reset button
tion between the ADE7878 and the NXP LPC2368 that is set should be pressed low to force the NXP LPC2368 to reset.
through the SPI ports. The JP32, JP34, JP36, and JP38 jumpers This is necessary because the state of JP9 is checked inside
are closed using 0 Ω resistors, and the JP31, JP33, JP35, and the NXP LPC2368 program only once after reset.
JP37 jumpers are open. The SPI port should be chosen as the • The other option is to cut the power supply of the NXP
active port in the ADE7878 control panel. LPC2368 by disconnecting JP7.
Communication between the ADE7878 and the NXP LPC2368
is also possible using the I2C ports. To accomplish this, the JP31,

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Evaluation Board User Guide UG-146

VOLTAGE SOURCE VOLTAGE SOURCE

GND VDD MCU_GND MCU_VDD

P9 P12
PHASE C

JP1, JP2 = CLOSED

PHASE B
NEUTRAL

P1 IAP JP1A, JP2A = OPEN

IAP
R1
IAN JP3A, JP4A = CLOSED
R2
IAN JP5A, JP6A = OPEN

P2 IBP JP1B, JP2B = OPEN

IBP
R3
IBN JP3B, JP4B = CLOSED
R4
IBN JP5B, JP6B = OPEN

P3 ICP JP1C, JP2C = OPEN

ICP
R5
ICN JP3C, JP4C = CLOSED
R6
ICN JP5C, JP6C = OPEN

P4 INP JP1N, JP2N = OPEN

INP
R7
INN JP3N, JP4N = CLOSED
R8
INN JP5N, JP6N = OPEN
P8
VAP R26 R29
VAP
R32 C32 JP7A, JP8A = OPEN

P7
VBP R27 R30
VBP
R33 C33 JP7B, JP8B = OPEN

P6
VCP R28 R31
VCP
R34 C34 JP7C, JP8C = OPEN

LOAD
P5
VN R25
VN JP7N = OPEN
JP8N = CLOSED
09078-006

NEUTRAL C34

Figure 6. Typical Setup for the ADE7878 Evaluation Board

Rev. 0 | Page 7 of 36
UG-146 Evaluation Board User Guide

EVALUATION BOARD SOFTWARE

The ADE7878 evaluation board is supported by Windows® Serial communication between the microcontroller and the
based software that allows the user to access all the functionality ADE7878 is introduced using a switch. By default, the SPI port
of the ADE7878. The software communicates with the NXP is used. Note that the active serial port must first be set in the
LPC2368 microcontroller using the USB as a virtual COM port. hardware. See the Activating Serial Communication Between
The NXP LPC2368 communicates with the ADE7878 to the ADE7878 and the NXP LPC2368 section for details on how
process the requests that are sent from the PC. to set it up.
INSTALLING AND UNINSTALLING THE ADE7878 The main menu has only one choice, other than Exit, enabled,
SOFTWARE Find COM Port. Clicking it starts a process in which the PC
tries to connect to the evaluation board using the port indicated
The ADE7878 software is supplied on one CD-ROM. It
in the Start menu. It uses the echo function of the communica-
contains two projects: one that represents the NXP LPC2368
tion protocol (see the Managing the Communication Protocol
project and one LabVIEW™ based program that runs on the PC.
Between the Microcontroller and the ADE7878 section). It
The NXP LPC2368 project is already loaded into the processor,
displays the port that matches the protocol and then sets it to
but the LabVIEW based program must be installed.
115,200 baud, eight data bits, no parity, no flow control, one
1. To install the ADE7878 software, place the stop bit.
CD-ROM in the CD-ROM reader and double-click
LabView_project\installation_files\setup.exe. This
launches the setup program that automatically installs
all the software components, including the uninstall
program, and creates the required directories.
2. To launch the software, go to the Start/Programs/
ADE7878 Eval Software menu and click ADE7878
Eval Software.
Both the ADE7878 evaluation software program and the NI
run-time engine are easily uninstalled by using the Add/
Remove Programs option in the control panel.

09078-007
1. Before installing a new version of the ADE7878 evaluation
software, first uninstall the previous version.
Figure 7. Front Panel of ADE7878 Software
2. Select the Add/Remove Programs option in the Windows
control panel. If the evaluation board is not connected, the port is displayed as
3. Select the program to uninstall and click the Add/Remove XXXXX. In this case, the evaluation software is still accessible,
button. but no communication can be executed. In both cases, whether
the search for the COM port is successful or not, the cursor is
FRONT PANEL
positioned back at Please select from the following options in
When the software is launched, the Front Panel is opened. This the main menu, Find COM Port is grayed out, and the next main
panel contains three areas: the main menu at the left, the sub- menu options are enabled (see Figure 8). These options allow
menu at the right, and a box that displays the name of the you to command the ADE7878 in either the PSM0 or PSM3
communication port used by the PC to connect to the power mode. The other power modes, PSM1 and PSM2, are not
evaluation port, also at the right (see Figure 7). available because initializations have to be made in PSM0 before
The COM port used to connect the PC with the evaluation the ADE7878 can be used in one of these other modes.
board must be selected first. The program displays a list of the
active COM ports, allowing you to select the right one. To learn
what COM port is used by the evaluation board, launch the
Windows Device Manager (the devmgmt.msc file) in the Run
window on the Windows Start menu. By default, the program
offers the option of searching for the COM port.

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Evaluation Board User Guide UG-146

09078-008

09078-009
Figure 8. Front Panel After the COM Port Is Identified Figure 9. Front Panel After the ADE7878 Enters PSM0 Mode
PSM0 MODE—NORMAL POWER MODE Reset ADE7878
Enter PSM0 Mode When Reset ADE78xx is selected on the Front Panel, the
When the evaluation board is powered up, the ADE7878 is in RESET pin of the ADE7878 is kept low for 20 ms and then is
PSM3 sleep mode. When Enter PSM0 mode is selected, the set high. If the operation is correctly executed, the message
microcontroller manipulates the PM0 and PM1 pins of the ADE7878 was reset successfully is displayed, and you must
ADE7878 to switch it into PSM0 mode. It waits 50 ms for the click OK to continue. The only error that may occur during this
circuit to power up and, if SPI communication is activated on operation is communication related; if this happens, the
the board, it executes three SPI write operations to Address following message is displayed: The communication between
0xEBFF of the ADE7878 to activate the SPI port. PC and ADE7878 evaluation board or between LPC2368 and
If the operation has been correctly executed or I2C communi- ADE78xx did not function correctly. There is no guarantee
cation is used, the message Configuring LPC2368 – ADE7878 the reset of ADE7878 has been performed.
communication was successful is displayed, and you must click Configure Communication
OK to continue. The only error that may occur during this
When Configure Communication is selected on the Front
operation is communication related; if this happens, the
Panel, the panel shown in Figure 10 is opened. This panel is
following message is displayed: Configuring LPC2368 –
useful if an ADE7878 reset has been performed and the SPI is
ADE7878 communication was not successful. Please check
no longer the active serial port. Select the SPI port by clicking
the communication between the PC and ADE7878 evaluation
the I2C/SPI Selector button and then click OK to update the
board and between LPC2368 and ADE78xx.
selection and lock the port. If the port selection is successful,
Bit 1 (I2C_LOCK) of the CONFIG2[7:0] register is now set to 1 the message, Configuring LPC2368 – ADE7878 communica-
to lock in the serial port choice. Then the DICOEFF register is tion was successful, is displayed, and you must click OK to
initialized with 0xFF8000, and the DSP of the ADE7878 is continue. If a communication error occurs, the message,
started when the software program writes RUN = 0x1. At the Configuring LPC2368 – ADE7878 communication was not
end of this process, the entire main menu is grayed out, and the successful. Please check the communication between the PC
submenu is enabled. You can now manage all functionality of and ADE7878 evaluation board, is displayed.
the ADE7878 in PSM0 mode. To switch the ADE7878 to another
power mode, click the Exit button on the submenu. The state of
the Front Panel is shown in Figure 9.

Rev. 0 | Page 9 of 36
UG-146 Evaluation Board User Guide
current data path is written into the ADE7878. All the other
instances take this value directly.
1. Click the Read Configuration button to cause all registers
that manage the total active power to be read and
displayed. Registers from the inactive data paths are also
read and updated.
2. Click the Write Configuration button to cause all registers
that manage the total active power to be written into the
ADE7878. Registers from the inactive data paths are also
written. The ADE78xx status box shows the power mode
that the ADE7878 is in (it should always be PSM0 in this
window), the active serial port (it should always be SPI),
and the CHECKSUM[31:0] register. After every read and
write operation, the CHECKSUM[31:0] register is read and
09078-010
its contents displayed.
3. Click the CFx Configuration button to open a new panel
Figure 10. Configure Communication Panel
(see Figure 12). This panel gives access to all bits and
The CONFIG2[7:0] register is written with Bit 1 (I2C_LOCK) set registers that configure the CF1, CF2, and CF3 outputs of
to 1 so that you do not need to remember to set it once the the ADE7878. The Read Setup and Write Setup buttons
communication is set. The contents of CONFIG2[7:0] are then update and display the CF1, CF2, and CF3 output values.
read back and displayed with Bit 1 (I2C_LOCK).
To close the panel, click the Exit button; the cursor is positioned
at Please select from the following options in the submenu of
the Front Panel.
Total Active Power
When Total Active Power is selected on the Front Panel, the
panel shown in Figure 11 is opened. The screen has an upper
half and a lower half: the lower half shows the total active power
data path of one phase, and the upper half shows bits, registers,
and commands necessary to power management.

09078-012
Figure 12. CFx Configuration Panel

Like the Total Active Power panel, the CHECKSUM[31:0]

register is read back whenever a read or write operation is
executed in the CFx Configuration panel. To select more
than one option for a TERMSELx bit in the COMPMODE
[15:0] register, press the CTRL key while clicking the options
you want.
09078-011

Clicking the Exit button closes the panel and redisplays the
Figure 11. Total Active Power Panel Total Active Power panel. When the Read Energy Registers
button in the Total Active Power panel is clicked, a new panel is
The Active Data Path button manages which data path is
opened (see Figure 13). This panel gives access to bits and
shown in the bottom half. Some registers or bits, like the
registers that configure the energy accumulation. The Read
WTHR0[23:0] register or Bit 0 (INTEN) of the CONFIG[15:0]
Setup and Write Setup buttons update and display the bit and
register, are common to all data paths, independent of the phase
register values.
shown. When these registers are updated, all the values in all
data paths are updated. The HPFDIS[23:0] register is included
twice in the data path, but only the register value from the

Rev. 0 | Page 10 of 36
Evaluation Board User Guide UG-146
The CHECKSUM[31:0] register is read back whenever a read or When clicked on the Front Panel, the Total Reactive Power,
write operation is executed in the Read Energy Registers panel. Fundamental Active Power, and Fundamental Reactive
Clicking the Read all energy registers button causes all energy Power buttons open panels that are very similar to the Total
registers to be read immediately, without regard to the modes in Active Power panel. These panels are shown in Figure 14,
which they function. Figure 15, and Figure 16.

09078-014
09078-013

Figure 13. Read Energy Registers Panel Figure 14. Total Reactive Power Panel

The panel also gives the choice of reading the energy registers
synchronous to CFx interrupts (pulses) or using line cycle
accumulation mode. When the Read energy registers
synchronous with CF1 pulses button is clicked, the following
happens:
1. The STATUS0[31:0] register is read and then written back
to so that all nonzero interrupt flag bits are cancelled.
2. Bit 14 (CF1) in the MASK0[31:0] register is set to 1, and
the interrupt protocol is started (see the Managing the
Communication Protocol Between the Microcontroller
and the ADE7878 section for protocol details).
3. The microcontroller then waits until the IRQ0 pin goes

09078-015
low. If the wait is longer than the timeout you indicate in
3 sec increments, the following error message is displayed: Figure 15. Fundamental Active Power Panel
No CF1 pulse was generated. Verify all the settings
before attempting to read energy registers in this mode!
4. When the IRQ0 pin goes low, the STATUS0[31:0] register
is read and written back to cancel Bit 14 (CF1); then the
energy registers involved in the CF1 signal are read and
their contents are displayed. A timer in 10 ms increments
can be used to measure the reaction time after the IRQ0
pin goes low.
5. The operation is repeated until the button is clicked again.
The process is similar when the other CF2, CF3, and line accum-
ulation (Read Energy Registers panel) buttons are clicked.
It is recommended to always use a timeout when dealing with
09078-016

interrupts. By default, the timeout is set to 10 (indicating a

30 sec timeout), and the timer is set to 0 (indicating that the Figure 16. Fundamental Reactive Power Panel
STATUSx[31:0] and energy registers are read immediately after
the IRQ0 pin goes low).

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UG-146 Evaluation Board User Guide
Apparent Power indicated by the timeout (in 3 sec increments), the following
When Apparent Power is selected on the Front Panel, a new message is displayed: No ZXIA, ZXIB or ZXIC interrupt was
panel is opened (see Figure 17). Similar to the other panels that generated. Verify at least one sinusoidal signal is provided
deal with power measurement, this panel is divided into two between IAP-IAN, IBP-IBN or ICP-ICN pins. A delay can be
parts: the lower half shows the apparent power data path of one introduced (in 10 ms increments) between the time the IRQ1 pin
phase and the ADE7878 status; the upper half shows the bits, goes low and the moment the xIRMS registers are read. The
registers, and commands necessary to power management. operation is repeated until the button is clicked again.
Mean Absolute Value Current
When Mean Absolute Value Current is selected on the Front
Panel, a new panel is opened (see Figure 19). When the Read
xIMAV registers button is clicked, the xIMAV[19:0] registers
are read 10 consecutive times, and their average is computed
and displayed. After this operation, the button is returned to
high automatically. The ADE7878 status is also displayed.

09078-017

Figure 17. Apparent Power Panel

Current RMS
When RMS Current is selected on the Front Panel, a new
panel is opened (see Figure 18). All data paths of all phases
are available.

09078-019
Figure 19. Mean Absolute Value Current Panel

Voltage RMS
When RMS Voltage is selected on the Front Panel, the Voltage
RMS panel is opened (see Figure 20). This panel is very similar
to the Current RMS panel. Clicking the Read Setup button
executes a read of the xVRMSOS[23:0] and xVRMS[23:0]
registers.
09078-018

Clicking Write Setup writes the xVRMSOS[23:0] registers into

Figure 18. Current RMS panel the ADE7878. The Start Digital Signal Processor and Stop
Digital Signal Processor buttons manage the Run[15:0]
Clicking the Read Setup button causes a read of all registers register.
shown in the panel. Clicking the Write Setup button causes
writes to the xIRMSOS[23:0] registers. When the Read xVRMS registers button is clicked, the
xVRMS[23:0] registers are read 500 consecutive times and the
You can use the Start Digital Signal Processor and Stop average is displayed. The operation is repeated until the button
Digital Signal Processor buttons to manage the Run[15:0] is clicked again. Note that the ZXVA, ZXVB, and ZXVC zero-
register and the Read xIRMS registers button, which uses the crossing interrupts are not used in this case because they are
ZXIA, ZXIB, and ZXIC interrupts at the IRQ1 pin, to read the disabled when the voltages go below 10% of full scale. This
xIRMS[23:0]registers 500 consecutive times and then compute allows rms voltage registers to be read even when the phase
and display their average. If no interrupt occurs for the time voltages are very low.
Rev. 0 | Page 12 of 36
Evaluation Board User Guide UG-146

09078-020

09078-021
Figure 20. Voltage RMS Panel
Figure 21. Power Quality Zero-Crossing Measurements Panel
Power Quality
When the WAIT FOR INTERRUPTS button is clicked, the
The Power Quality panel is accessible from the Front Panel interrupts that you have enabled in the MASK1[31:0] register
and is divided into two parts (see Figure 21). The lower part are monitored. When the IRQ1 pin goes low, the STATUS1[31:0]
displays registers that manage the power quality measurement
register is read and its bits are displayed. The ISUM[27:0],
functions for the Active Measurement button in the upper part
PHSTATUS[15:0], IPEAK[31:0], VPEAK[31:0], ANGLE0[15:0],
of the panel. The upper part also displays the ADE7878 status
ANGLE1[15:0], and ANGLE2[15:0] registers are also read and
and the buttons that manage the measurements.
displayed. A timeout should be introduced in 3 sec increments
When the READ CONFIGURATION button is clicked, all to ensure that the program does not wait indefinitely for
power quality registers (MASK1[31:0], STATUS1[31:0], interrupts. A timer (in 10 ms increments) is provided to allow
PERIOD[15:0], MMODE[7:0], ISUM[27:0], OVLVL[23:0], reading of the registers with a delay from the moment the
OILVL[23:0], PHSTATUS[15:0], IPEAK[31:0], VPEAK[31:0], interrupt is triggered.
SAGLVL[23:0], SAGCYC[7:0], ANGLE0[15:0], ANGLE1[15:0],
The Active Measurement Zero Crossing button gives access to
ANGLE2[15:0], COMPMODE[15:0], CHECKSUM[31:0], and
the Zero Crossing, Neutral Current Mismatch, Overvoltage
PEAKCYC[7:0]) are read, and the ones belonging to the active
and Overcurrent Measurement, Peak Detection, and Time
panel are displayed. Based on the PERIOD[15:0] register, the
Intervals Between Phases panels (see Figure 21 through
line frequency is computed and displayed in the lower part of
Figure 25).
the panel, in Zero Crossing Measurements. Based on the
ANGLEx[15:0] registers, cos(ANGLEx) is computed and The line frequency is computed using the PERIOD[15:0] register,
displayed in the Time Intervals Between Phases panel that is based on the following formula:
accessible from the Active Measurement Zero Crossing 256,000
dropdown box (see Figure 21). f = [ Hz ]
Period
When the WRITE CONFIGURATION button is clicked, The cosine of the ANGLE0[15:0], ANGLE1[15:0], and
MMODE[7:0], OVLVL[23:0], OILVL[23:0], SAGLVL[23:0], ANGLE2[15:0] measurements is computed using the following
SAGCYC[7:0], COMPMODE[15:0], and PEAKCYC[7:0] are formula:
written into the ADE7878, and CHECKSUM[31:0] is read back
 ANGLEx × 360 × f 
and displayed in the CHECKSUM[31:0] box at the top of the cos( ANGLEx) = cos 
upper part of the panel.  256,000 

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UG-146 Evaluation Board User Guide

09078-025
09078-022
Figure 22. Neutral Current Mismatch Panel Figure 25. Time Intervals Between Phases Panel

Waveform Sampling
The Waveform Sampling panel (see Figure 26) is accessible
from the Front Panel and uses the HSDC port to acquire data
from the ADE7878 and display it. It can be accessed only if the
communication between the ADE7878 and the NXP LPC2368
is through the I2C. See the Activating Serial Communication
Between the ADE7878 and the NXP LPC2368 section for
details on how to set I2C communication on the ADE7878
evaluation board.
09078-023

Figure 23. Overvoltage and Overcurrent Measurements Panel

09078-026
09078-024

Figure 26. Waveform Sampling Panel

Figure 24. Peak Detection Panel

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Evaluation Board User Guide UG-146
The HSDC transmits data to the NXP LPC2368 at 4 MHz
because this is the maximum speed at which the slave SPI of the
NXP LPC2368 can receive data. The panel contains some
switches that must be set before acquiring data.
• One switch chooses the quantities that are displayed: phase
currents and voltages or phase powers. For every set of
quantities, only one can be acquired at a time. This choice
is made using the Select Waveform button.
• A second switch allows acquired data to be stored in files
for further use. This switch is set with the ACQUIRE
DATA button.
• The acquisition time should also be set before an acquis-
ition is ordered. By default, this time is 150 ms. It is
unlimited for phase currents and voltages and for phase
powers. The NXP LPC2368 executes in real time three
tasks using the ping pong buffer method: continuously

09078-027
receiving data from HSDC, storing the data into its USB
memory, and sending the data to the PC. Transmitting Figure 27. Checksum Register Panel
seven phase currents and voltages at 4 MHz takes 103.25 µs All Registers Access
(which is less than 125 µs); therefore, the HSDC update
The All Registers Access panel is accessible from the Front
rate is 8 kHz (HSDC_CFG = 0x0F). Transmitting nine phase
Panel and gives read/write access to all ADE7878 registers.
powers takes 72 µs (again, less than 125 µs); therefore, the
Because there are many, the panel can scroll up and down and
HSDC update rate is also 8 kHz (HSDC_CGF = 0x11).
has multiple read, write, and exit buttons (see Figure 28 and
To start the acquisition, click the ACQUIRE DATA button. The Figure 29). The registers are listed in columns in alphabetical
data is displayed on one plot. If you click the Write waveforms order, starting at the upper left. The panel also allows you to
to file?/No writing to files switch to enable the writing of save all control registers into a data file by clicking the Save All
waveforms to a file, the program asks for the name and location Regs into a file button. By clicking the Load All Regs from a
of the files before storing the waveform. file button, you can load all control registers from a data file.
Then, by clicking the Write All Regs button, you can load these
Checksum Register
values into the ADE7878. The order in which the registers are
The Checksum Register panel is accessible from the Front stored into a file is shown in the Control Registers Data File
Panel and gives access to all ADE7878 registers that are used to section.
compute the CHECKSUM[31:0] register (see Figure 27). You
can read/write the values of these registers by clicking the Read
and Write buttons. The LabView program estimates the value of
the CHECKSUM[31:0] register and displays it whenever one of
the registers is changed. When the Read button is pressed, the
registers are read and the CHECKSUM[31:0] register is read
and its values displayed. This allows you to compare the value of
the CHECKSUM[31:0] register estimated by LabView with the
value read from the ADE7878. The values should always be
identical.
09078-028

Figure 28. Panel Giving Access to All ADE7878 Registers (1)

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UG-146 Evaluation Board User Guide
Clicking the Begin Computations button starts the program
that reads rms voltages and currents and calculates the full-scale
voltage and currents used to further initialize the meter. This
process takes 7 sec as the program reads the rms voltages 100
times and the rms currents 100 times and then averages them
(this is because the PC reads the rms values directly and cannot
synchronize the readings with the zero crossings).
The program then computes the full-scale voltages and currents
and the constants that are important for setting up the
ADE7878: nominal values (n), CFDEN, WTHR1, VARTHR1,
VATHR1 and WTHR0, VARTHR0, and VATHR0.
At this point, you can overwrite these values. You can also click
the Update Registers button to cause the program to do the
following:

09078-029
• Initialize the CFxDEN and xTHR registers
Figure 29. Panel Giving Access to All ADE7878 Registers (2) • Enable the CF1 pin to provide a signal proportional to the
total active power, the CF2 pin to provide a signal
Quick Startup proportional to the total reactive power, and the CF3 pin to
The Quick Startup panel is accessible from the Front Panel provide a signal proportional to the apparent power.
and can be used to rapidly initialize a 3-phase meter (see
Throughout the program, it is assumed that PGA gains are 1
Figure 30).
(for simplicity) and that the Rogowski coil integrators are
disabled. You can enter and modify the PGAs and enable the
integrators before executing this quick startup if necessary.
At this point, the evaluation board is set up as a 3-phase meter,
and calibration can be executed. To store the register initializa-
tions, click the Save All Regs into a file button in the All
Registers Access panel. After the board is powered down and
then powered up again, the registers can be loaded into the
ADE7878 by simply loading back the content of the data file. To
do this, click the Load All Regs from a file button in the All
Registers Access panel.
PSM2 Settings
The PSM2 Settings panel, which is accessible from the Front
Panel, gives access to the LPOILVL[7:0] register that is used to
access PSM2 low power mode (see Figure 31). You can
manipulate its LPOIL[2:0] and LPLINE[4:0] bits. The value
shown in the LPOILVL[7:0] register is composed from these
bits and then displayed. Note that you cannot write a value into
the register by writing a value in the LPOILVL[7:0] register box.
09078-030

Figure 30. Panel Used to Quickly Set Up the 3-Phase Meter

The meter constant (MC, in impulses/kWh), the nominal

voltage (Un, in V rms units), the nominal current (In, in A rms
units), and the nominal line frequency (fn, in either 50 Hz or
60 Hz) must be introduced in the panel controls. Then phase
voltages and phase currents must be provided through the
relative sensors.

Rev. 0 | Page 16 of 36
Evaluation Board User Guide UG-146

09078-031

09078-033
Figure 31. PSM2 Settings Panel
Figure 33. Mean Absolute Value Currents Panel in PSM1 Mode
PSM1 MODE
Enter PSM1 Mode PSM2 MODE
When Enter PSM1 mode is selected on the Front Panel, the Enter PSM2 Mode
microcontroller manipulates the PM0 and PM1 pins of the When Enter PSM2 mode is selected on the Front Panel, the
ADE7878 to switch the ADE7878 into PSM1 reduced power microcontroller manipulates the PM0 and PM1 pins of the
mode. Then, the submenu allows access only to the Mean ADE7878 to switch the ADE7878 into PSM2 low power mode.
Absolute Value Current function because this is the only Then the submenu allows access only to the Phase Current
ADE7878 functionality available in this reduced power mode Monitoring function because this is the only ADE7878
(see Figure 32). functionality available in this low power mode.
09078-032

09078-034

Figure 32. Front Panel After the ADE7878 Enters PSM1 Mode Figure 34. Front Panel After the ADE7878 Enters PSM2 Mode
Mean Absolute Value Current in PSM1 Mode
The Mean Absolute Value Current panel, which is accessible
from the Front Panel when Enter PSM1 mode is selected, is
very similar to the panel accessible in PSM0 mode (see the
Mean Absolute Value Current section for details). The only
difference is that ADE7878 status does not show the
CHECKSUM[31:0] register because it is not available in
PSM1 mode (see Figure 33)

Rev. 0 | Page 17 of 36
UG-146 Evaluation Board User Guide
Phase Current Monitoring
The Phase Current Monitoring panel is accessible from the
Front Panel when Enter PSM2 mode is selected; it allows you
to display the state of the IRQ0and IRQ1 pins because, in PSM2
low power mode, the ADE7878 compares the phase currents
against a threshold determined by the LPOILVL[7:0] register
(see Figure 35). Clicking the READ STATUS OF IRQ0 AND
IRQ1 PINS button reads the status of these pins and displays
and interprets the status.
This operation is managed by the LPOILVL[7:0] register and
can be modified only in PSM0 mode. The panel offers this
option by switching the ADE7878 into PSM0 mode and then
back to PSM2 mode when one of the READ LPOILVL/WRITE
LPOILVL buttons is clicked. To avoid toggling both the PM0
and PM1 pins at the same time during this switch, the
ADE7878 is set to PSM3 when changing modes.

09078-035
Figure 35. Panel Managing Current Monitoring in PSM2 Mode

PSM3 MODE
Enter PSM3 Mode
In PSM3 sleep mode, most of the internal circuits of the
ADE7878 are turned off. Therefore, no submenu is activated
while in this mode. You can click the Enter PSM0 mode, Enter
PSM1 mode, or Enter PSM2 mode button to set the ADE7878
to one of these power modes.

Rev. 0 | Page 18 of 36
Evaluation Board User Guide UG-146

MANAGING THE COMMUNICATION PROTOCOL BETWEEN THE MICROCONTROLLER AND

THE ADE7878
In this section, the protocol commands are listed that have been Table 7. Reset—Message from the PC to the Microcontroller
implemented to manage the ADE7878 from the PC using the Byte Description
microcontroller. 0 C = 0x43, toggle the RESET pin and keep it low for at
The microcontroller is a pure slave during the communication least 10 ms
process. It receives a command from the PC, executes the 1 N=1
command, and sends an answer to the PC. The PC should wait 2 Data Byte 0: this byte can have any value
for the answer before sending a new command to the micro-
controller. Table 8. Reset—Answer from the Microcontroller to the PC
Byte Description
Table 3. Echo Command—Message from the PC to the Micro- 0 R = 0x52
controller 1 ~ = 0x7E, to acknowledge that the operation was
Byte Description successful
0 A = 0x41
Table 9. I2C/SPI Select (Configure Communication)—
1 N = number of bytes transmitted after this byte
Message from the PC to the Microcontroller
2 Data Byte N − 1 (MSB)
Byte Description
3 Data Byte N − 2
0 D = 0x44, select I2C and SPI and initialize them; then set
4 Data Byte N − 3
CONFIG2[7:0] = 0x2 to lock in the port choice. When I2C
… … is selected, also enable SSP0 of the LPC2368 (used for
N Data Byte 1 HSDC).
N+1 Data Byte 0 (LSB) 1 N = 1.
2 Data Byte 0: 0x00 = I2C, 0x01 = SPI.
Table 4. Echo Command—Answer from the Microcontroller to
the PC Table 10. I2C/SPI Select (Configure Communication)—
Byte Description Answer from the Microcontroller to the PC
0 R = 0x52 Byte Description
1 A = 0x41 0 R = 0x52
2 N = number of bytes transmitted after this byte 1 ~ = 0x7E, to acknowledge that the operation was
3 Data byte N − 1 (MSB) successful
4 Data byte N − 2
… … Table 11. Data Write—Message from the PC to the Micro-
N+1 Data Byte 1 controller
N+2 Data Byte 0 (LB) Byte Description
0 E = 0x45.
Table 5. Power Mode Select—Message from the PC to the 1 N = number of bytes transmitted after this byte. N can
Microcontroller be 1 + 2, 2 + 2, 4 + 2, or 6 + 2.
Byte Description 2 MSB of the address.
0 B = 0x42, change PSM mode 3 LSB of the address.
1 N=1 4 Data Byte N − 3 (MSN).
2 Data Byte 0: 5 Data Byte N − 4.
0x00 = PSM0 6 Data Byte N − 5.
0x01 = PSM1 … …
0x02 = PSM2 N+2 Data Byte 1.
0x03 = PSM3 N+3 Data Byte 0 (LSB).

Table 6. Power Mode Select—Answer from the Microcon- Table 12. Data Write—Answer from the Microcontroller to
troller to the PC the PC
Byte Description Byte Description
0 R = 0x52 0 R = 0x52
1 ~ = 0x7E, to acknowledge that the operation was 1 ~ = 0x7E, to acknowledge that the operation was
successful successful

Rev. 0 | Page 19 of 36
UG-146 Evaluation Board User Guide
Table 13. Data Read—Message from the PC to the Micro- Table 16. Interrupt Setup—Message from the Microcon-
controller troller to the PC
Byte Description Byte Description
0 F = 0x46. 0 R = 0x52.
1 N = number of bytes transmitted after this byte; N = 3. 1 Byte 3 of the STATUS0[31:0] or STATUS1[31:0] register.
2 MSB of the address. If the program waited for TOB × 3 sec and the interrupt
3 LSB of the address. was not triggered, then Byte 3 = Byte 2 = Byte 1 = Byte 0
4 M = number of bytes to be read from the address above. = 0xFF.
M can be 1, 2, 4, or 6. 2 Byte 2 of the STATUS0[31:0] or STATUS1[31:0] register.
3 Byte 1 of the STATUS0[31:0] or STATUS1[31:0] register.
Table 14. Data Read—Answer from the Microcontroller to
4 Byte 0 of the STATUS0[31:0] or STATUS1[31:0] register.
the PC
Byte Description The microcontroller executes the following operations once the
0 R = 0x52. interrupt setup command is received:
1 MSB of the address. 1. Reads the STATUS0[31:0] or STATUS1[31:0] register
2 LSB of the address. (depending on the address received from the PC) and, if it
3 Byte 5, Byte 3, Byte 1, or Byte 0 (MSB) read at the location shows an interrupt already triggered (one of its bits is equal
indicated by the address. The location may contain 6, 4, to 1), it erases the interrupt by writing it back.
2, or 1 byte. The content is transmitted MSB first. 2. Writes to the MASK0[31:0] or MASK1[31:0] register with
4 Byte 4, Byte 2, or Byte 0. the value received from the PC.
5 Byte 3, Byte 1. 3. Waits for the interrupt to be triggered. If the wait is more
6 Byte 2, Byte 0. than the timeout specified in the command, 0xFFFFFFFF
7 Byte 1. is sent back.
8 Byte 0. 4. If the interrupt is triggered, the STATUS0[31:0] or
STATUS1[31:0] register is read and then written back to
Table 15. Interrupt Setup—Message from the PC to the
clear it. The value read at this point is the value sent back
Microcontroller
to the PC so that you can see the source of the interrupts.
Byte Description
5. Sends back the answer.
0 J = 0x4A.
1 N = 8, number of bytes transmitted after this byte. Table 17. Interrupt Pins Status—Message from the PC to the
2 MSB of the MASK1[31:0] or MASK0[31:0] register. Microcontroller
3 LSB of the MASK1[31:0] or MASK0[31:0] register. Byte Description
4 Byte 3 of the desired value of the MASK0[31:0] or 0 H = 0x48.
MASK1[31:0] register.
1 N = 1, number of bytes transmitted after this byte.
5 Byte 2.
2 Any byte. This value is not used by the program but it is
6 Byte 1. used in the communication because N must not be equal
7 Byte 0. to 0.
8 Time out byte: time the MCU must wait for the interrupt
to be triggered. It is measured in 3 sec increments. Table 18. Interrupt Pins Status—Answer from the Micro-
Time out byte (TOB) = 0 means that timeout is disabled. controller to the PC
9 IRQ timer: time the MCU leaves the IRQx pin low before Byte Description
writing back to clear the interrupt flag. It is measured in 0 R = 0x52.
10 ms increments. 1 A number representing the status of the IRQ0 and IRQ1
Timer = 0 means that timeout is disabled. pins.
0: IRQ0 = low, IRQ1 = low
1: IRQ0 = low, IRQ1 = high.
2: IRQ0 = high, IRQ1 = low.
3: IRQ0 = high, IRQ1 = high.
The reason for the IRQ0 and IRQ1 order is that on the
microcontroller IO port, IRQ0= P0.1 and IRQ1 = P0.0.

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Evaluation Board User Guide UG-146
ACQUIRING HSDC DATA CONTINUOUSLY If two of the phase powers are to be acquired, the protocol
changes (see Table 20).
This function acquires data from the HSDC continuously for a
defined time period and for up to two variables. The microcon- Table 20. Acquire HSDC Data Continuously—Message from
troller sends data in packages of 4 kB. the PC to the Microcontroller If Phase Powers Are Acquired
Table 19 describes the protocol when two instantaneous phase Byte Description
currents or voltages are acquired. 0 G = 0x47
1 N = number of bytes transmitted after this byte. N = 38.
Table 19. Acquire HSDC Data Continuously—Message from 2 0: corresponds to Byte 3 of AVA. Because this byte is only
the PC to the Microcontroller If Phase Currents and Voltages a sign extension of Byte 2, it is not sent back by the
Are Acquired microcontroller.
Byte Description 3 Increment_AVA_Byte2. If AVA is to be acquired, Byte 3,
Byte 4, and Byte 5 are 1. Otherwise, they are 0.
0 G = 0x47.
4 Increment_AVA_Byte1.
1 N = number of bytes transmitted after this byte. N = 32.
5 Increment_AVA_Byte2.
2 0: corresponds to Byte 3 of IA. Because this byte is only a
sign extension of Byte 2, it is not sent back by the 6 0.
microcontroller. 7 Increment_BVA_Byte2. If BVA is to be acquired, Byte 7,
3 Increment_IA_Byte2. If IA is to be acquired, Byte 3, Byte 4, Byte 8, and Byte 9 are 1. Otherwise, they are 0.
and Byte 5 are 1. Otherwise, they are 0. 8 Increment_BVA_Byte1.
4 Increment_IA_Byte1. 9 Increment_BVA_Byte0.
5 Increment_IA_Byte2. 10 0.
6 0. 11 Increment_CVA_Byte2. If CVA is to be acquired, Byte 11,
7 Increment_VA_Byte2. If VA is to be acquired, Byte 7, Byte 12, and Byte 13 are 1. Otherwise, they are 0.
Byte 8, and Byte 9 are 1. Otherwise, they are 0. 12 Increment_CVA_Byte1.
8 Increment_VA_Byte1. 13 Increment_CVA_Byte0.
9 Increment_VA_Byte0. 14 0.
10 0. 15 Increment_AWATT_Byte2. If AWATT is to be acquired,
11 Increment_IB_Byte2. If IB is to be acquired, Byte 11, Byte 15, Byte 16, and Byte 17 are 1. Otherwise, they are 0.
Byte 12, and Byte 13 are 1. Otherwise, they are 0. 16 Increment_AWATT_Byte1.
12 Increment_IB_Byte1. 17 Increment_AWATT_Byte0.
13 Increment_IB_Byte0. 18 0.
14 0. 19 Increment_BWATT_Byte2. If BWATT is to be acquired,
15 Increment_VB_Byte2. If VB is to be acquired, Byte 15, then Byte 19, Byte 20, and Byte 21 are 1. Otherwise, they
Byte 16, and Byte 17 are 1. Otherwise, they are 0. are 0.
16 Increment_VB_Byte1. 20 Increment_BWATT_Byte1.
17 Increment_VB_Byte0. 21 Increment_BWATT_Byte0.
18 0. 22 0.
19 Increment_IC_Byte2. If IC is to be acquired, Byte 19, 23 Increment_CWATT_Byte2. If CWATT is to be acquired,
Byte 20, and Byte 21 are 1. Otherwise, they are 0. Byte 23, Byte 24, and Byte 25 are 1. Otherwise, they are 0.
20 Increment_IC_Byte1. 24 Increment_CWATT_Byte1.
21 Increment_IC_Byte0. 25 Increment_CWATT_Byte0.
22 0. 26 0.
23 Increment_VC_Byte2. If VC is to be acquired, Byte 23, 27 Increment_AVAR_Byte2. If AVAR is to be acquired,
Byte 24, and Byte 25 are 1. Otherwise, they are 0. Byte 27, Byte 28, and Byte 29 are 1. Otherwise, they are 0.
24 Increment_VC_Byte1. 28 Increment_AVAR_Byte1.
25 Increment_VC_Byte0. 29 Increment_AVAR_Byte0.
26 0. 30 0.
27 Increment_IN_Byte2. If IN is to be acquired, Byte 27, 31 Increment_BVAR_Byte2. If BVAR is to be acquired, then
Byte 28, and Byte 29 are 1. Otherwise, they are 0. Byte 31, Byte 32, and Byte 33 are 1. Otherwise, they are 0.
28 Increment_IN_Byte1. 32 Increment_BVAR_Byte1.
29 Increment_IN_Byte0. 33 Increment_BVAR_Byte0.
30 Byte 1 of M. M is a 16-bit number. The number of 32-bit 34 0.
samples acquired by the microcontroller is (2 × M + 1) × 35 Increment_CVAR_Byte2. If CVAR is to be acquired,
67 per channel. Byte 35, Byte 36, and Byte 37 are 1. Otherwise, they are 0.
31 Byte 0 of M.

Rev. 0 | Page 21 of 36
UG-146 Evaluation Board User Guide
Byte Description STARTING THE ADE7878 DSP
36 Increment_CVAR_Byte1. This function orders the microcontroller to start the DSP. The
37 Increment_CVAR_Byte0. microcontroller writes to the run register with 0x1.
38 Byte 1 of M. M is a 16-bit number. The number of 32-bit
samples acquired by the microcontroller is (2 × M + 1) × Table 22. Start ADE7878 DSP—Message from the PC to the
67 per channel. Microcontroller
39 Byte 0 of M. Byte Description
After receiving the command, the microcontroller enables the 0 N = 0x4E
HSDC port and acquires 67 × 7 × 4 = 1876 bytes into 1 N = number of bytes transmitted after this byte; N = 1
BUFFER0. As soon as BUFFER0 is filled, data is acquired in 2 Any byte
BUFFER1 (equal in size to BUFFER0), while 2 × 3 × 67 = 402
Table 23. Start ADE7878 DSP—Answer from the Micro-
bytes (134 24-bit words) from BUFFER0 are transmitted to the
controller to the PC
PC. As soon as BUFFER1 is filled, data is acquired into
Byte Description
BUFFER0 while 402 bytes from BUFFER1 are transmitted to
0 R = 0x52
the PC. Only the less significant 24 bits of every 32-bit
1 ~ = 0x7E, to acknowledge that the operation was
instantaneous value are sent to the PC to decrease the size of the
successful
buffer sent to the PC. The most significant eight bits are only an
extension of a 24-bit signed word; therefore, no information is STOPPING THE ADE7878 DSP
lost. The protocol used by the microcontroller to send data to This function orders the microcontroller to stop the DSP. The
the PC is shown in Table 21. microcontroller writes to the run register with 0x0.
Table 21. Acquire HSDC Data Continuously—Answer from Table 24. Stop ADE7878 DSP—Message from the PC to the
the Microcontroller to the PC Microcontroller
Byte Description Byte Description
0 R = 0x52 0 O = 0x4F
1 Byte 2 (MSB) of Word 1 1 N = number of bytes transmitted after this byte; N = 1
2 Byte 1 of Word 1 2 Any byte
3 Byte 0 (LSB) of Word 1
4 Byte 2 (MSB) of Word 2 Table 25. Stop ADE7878 DSP—Answer from the Micro-
5 Byte 1 (MSB) of Word 2 controller to the PC
… … Byte Description
402 Byte 0 (LSB) of Word 134 0 R = 0x52
1 ~ = 0x7E to acknowledge that the operation was
successful

Rev. 0 | Page 22 of 36
Evaluation Board User Guide UG-146

UPGRADING MICROCONTROLLER FIRMWARE

Although the evaluation board is supplied with the
microcontroller firmware already installed, the ADE7878
evaluation software CD provides the NXP LPC2368
microcontroller project developed under the IAR embedded
workbench environment for ARM. Users in possession of this
tool can modify the project at will and can download it using an
IAR J-link debugger. As an alternative, the executable can be
downloaded using a program called Flash Magic, available on
the evaluation software CD or at the following website:
http://www.flashmagictool.com/.
Flash Magic uses the PC COM port to download the micro-
controller firmware. The procedure for using Flash Magic is as
follows:
1. Plug a serial cable into connector P15 of the ADE7878
evaluation board and into a PC COM port. As an
alternative, use the ADE8052Z-DWDL1 ADE downloader
from Analog Devices, Inc., together with a USB cable.
2. Launch the Device Manager under Windows XP by

09078-036
writing devmgmt.msc into the Start/Run box. This helps
to identify which COM port is used by the serial cable. Figure 36. Flash Magic Settings
3. Plug the USB2UART board into the P15 connector of the 8. Click Start to begin the download process.
ADE7878 evaluation board with the VDD pin of the 9. After the process finishes, extract the JP8 jumper.
USB2UART aligned at Pin 1 of P15. 10. Reset the ADE7878 evaluation board by pressing and
4. Connect Jumper JP8. The P2.10/EINT0 pin of the releasing the S2 reset button.
microcontroller is now connected to ground.
At this point, the program should be functional, and a USB
5. Supply the board with two 3.3 V supplies at the P10 and
cable can be connected to the board. When the PC recognizes
P12 connectors.
the evaluation board and asks for a driver, point it to the project
6. Press and release the reset button, S2, on the ADE7878
\VirCOM_Driver_XP folder. The ADE7878_eval_board_
evaluation board.
vircomport.inf file is the driver.
7. Launch Flash Magic and do the following:
a. Select a COM port (COMx as seen in the Device CONTROL REGISTERS DATA FILE
Manager). Table 26 shows the order in which the control registers of the
b. Set the baud rate to 115,200. ADE7878 are stored into a data file when you click the Save All
c. Select the NXP LPC2368 device. Regs into a file button in the All Registers Access panel.
d. Set the interface to none (ISP).
e. Set the DOscillator frequency (MHz) to 12.0.
f. Select Erase all Flash + Code Rd Block.
g. Choose ADE7878_Eval_Board.hex from the
\Debug\Exe project folder.
h. Select Verify after programming.
The Flash Magic settings are shown in Figure 36.

Rev. 0 | Page 23 of 36
UG-146 Evaluation Board User Guide
Table 26. Control Register Data File Content Line Number Register
Line Number Register 42 VATHR1
1 AIGAIN 43 VATHR0
2 AVGAIN 44 WTHR1
3 BIGAIN 45 WTHR0
4 BVGAIN 46 VARTHR1
5 CIGAIN 47 VARTHR0
6 CVGAIN 48 VANOLOAD
7 NIGAIN 49 APNOLOAD
8 AIRMSOS 50 VARNOLOAD
9 AVRMSOS 51 VLEVEL
10 BIRMSOS 52 DICOEFF
11 BVRMSOS 53 HPFDIS
12 CIRMSOS 54 ISUMLVL
13 CVRMSOS 55 RUN
14 NIRMSOS 56 OILVL
15 AVAGAIN 57 OVLVL
16 BVAGAIN 58 SAGLVL
17 CVAGAIN 59 MASK0
18 AWGAIN 60 MASK1
19 AWATTOS 61 VNOM
20 BWGAIN 62 LINECYC
21 BWATTOS 63 ZXTOUT
22 CWGAIN 64 COMPMODE
23 CWATTOS 65 Gain
24 AVARGAIN 66 CFMODE
25 AVAROS 67 CF1DEN
26 BVARGAIN 68 CF2DEN
27 BVAROS 69 CF3DEN
28 CVARGAIN 70 APHCAL
29 CVAROS 71 BPHCAL
30 AFWGAIN 72 CPHCAL
31 AFWATTOS 73 CONFIG
32 BFWGAIN 74 MMODE
33 BFWATTOS 75 ACCMODE
34 CFWGAIN 76 LCYCMODE
35 CFWATTOS 77 PEAKCYC
36 AFVARGAIN 78 SAGCYC
37 AFVAROS 79 CFCYC
38 BFVARGAIN 80 HSDC_CFG
39 BFVAROS 81 LPOILVL
40 CFVARGAIN 82 CONFIG2
41 CFVAROS

Rev. 0 | Page 24 of 36
 VDD_F
P11
TP51 P10 EXT_CLKIN 1

2
TP50

1
2
R37
1 BLK 2

P9
JP2 1 BLK VDD2
CLKOUT

1
2
RSB 1 2 3
VDD_F VDD2 JP4 JP5
VDD 1 2 1 2 4
0 BERG69157-102 DVDD AVDD

P
WEILAND25.161.0253
5

WEILAND25.161.0253
JPR0402 JPR0402
VDD2 6

P
P
P
JP1

C7
SCHEMATIC

C8
1 2 CF2 7

0.1UF
DGND

10UF

VDD_F
N

C2
C4
C6
8

C1
C3
C5
JPR0402

0.1UF
RESETB

10UF
0.22UF
0.22UF

4.7UF
4.7UF
9

N
N
N
DGND
DGND 10
AGND DGND_D PM1 11
AGND AGND
12
PM0 13
14
15
TP23 16
BLK 1 SSB/HSA 17
18
MOSI/SDA 19
VDD_F TP13 TP22 TP30
20

AVDD
DVDD
VDD
BLK 1 1 BLK BLK 1 MISO/HSD 21
U1 22

5
26
VDD TP31 SCLK/SCL 23
PM0 2 1 BLK
PM0

R38
10K
TP32 TP33 24

C38
VDD
S1

1 2
3
DEVICE INTERFACE HEADER

1.0UF
PM1 CF3/HSCLK

AVDD 24
DVDD
1 3 PM1 1 BLK 1 BLK 25
RESETB 4 R35 R36
2 4 RESET_N 17 REF 26
IAP 7 REFIN_OUT 10K 10K IRQ0B
B3S1000
IAP 28 CLKOUT TP28 27
AGND IAN 8 CLKOUT
IAN 29 IRQ0B 1 BLK 28
IBP 9 IRQ0_N_SBSCL IRQ1B
Evaluation Board User Guide

IBP 32 IRQ1B 29
IBN 12 IRQ1_N_SBSDA TP27
IBN 33 CF1 30
ICP 13 CF1 1 BLK CF1
ICP 34 CF2 31
ICN 14 CF2
ICN 35 CF3/HSCLK TP24 32
INP 15 CF3_HSCLK SAMTSW-1-30-08-GD
INP 37 MISO/HSD 1 BLK
INN 16 MISO_HSD
INN 39 SSB/HSA DGND
TP26 VN 18 SS_N_HSA
VN
1 BLK VCP 19
VCP
VBP 22
TP25 VBP
VAP 23
1 BLK VAP
CLKIN 27
CLKIN
SCLK/SCL 36
SCLK_SCL
MOSI/SDA 38
MOSI_SDA
VDD2

PAD
AGND
DGND
6
ADE7858CPZ

25
PAD
PAD_CN
R68 R70 R85
JP12 10K 10K 10K
1 2 2 2
A
EVALUATION BOARD SCHEMATICS AND LAYOUT

S Q1 S S

Figure 37.
DGND_D 2 CF1 CF2 CF3/HSCLK
COM JP3
3 G G G
B PAD_CN 1 2 1 1 1
FDV302P
FDV302P
FDV302P

3PIN_SOLDER_JUMPER JPR0402

DGND AGND D D D

Rev. 0 | Page 25 of 36
AGND 3 3 Q2 3 Q3
NOTE:
MOUNT JP? DIRECTLY BELOW
PAD METAL. CONNECT TO PAD
R39
499
R40
499
R41
499

WITH MULTIPLE VIAS.

REFERENCE DECOUPLING AND EXTERNAL REF REPEAT VIA GRID TO AGND PLANE CF1 CF2 CF3
A
A
A

A1
ADR280ARTZ TP49 XREF REF TP29
CR1
CR2
CR3

JP10 JP6
C
C
C

VDD_F 1 BLK 1 BLK JPR0402

1 2 1 2 1 2
V+ VO
CMD28-21VGCTR8T1
CMD28-21VGCTR8T1
CMD28-21VGCTR8T1

P
P
V- BERG69157-102
3 DGND DGND DGND

C43
C42
C40

C44
C41

0.1UF
0.1UF
0.1UF

10UF
4.7UF
XTAL CKT

N
N
VDD2
AGND
TP15
BLK C26 R69 R84
AGND

1
CLKOUT 10K 10K
2 2
20PF S S
2

IRQ0B IRQ1B
G G
Y1

1 1
1

C27
AGND
FDV302P
FDV302P

EXTRA GROUND TP FOR PROBING

16.384MHZ

D D
3 Q4 3 Q5
JP7N TP35 TP37 TP39 20PF
2 1 1 BLK 1 BLK 1 BLK TP14 1
A
BERG69157-102 TP9 CLKIN 1 2 JP11
COM
BLK
R42
499
R43
499

1 BLK AGND 3
E8N B
P5 3PIN_SOLDER_JUMPER
VN_IN 1 2 R25 IRQ1B
VN CLKIN IRQ0B
A
A

1
1K 1
2 TP34 TP36 TP38
CR4
CR5

WEILAND25.161.0253 1500 OHMS EXT_CLKIN AMP227699-2

C
C

1 BLK 1 BLK 1 BLK

AGND
CMD28-21VGCTR8T1
CMD28-21VGCTR8T1

5 4 3 2

1
DGND DGND
DGND
AGND
BY DEFAULT SELECT OPTION A TO COMPLETE PARALLEL
RESONANT CIRCUIT. THIS OPTION SHOULD BE PLACED AS
CLOSE TO DEVICE AS POSSIBLE.

JP8N
C25
22NF
OUTPUT LED CIRCUIT

2
BERG69157-102
AGND
09078-037
UG-146
 UG-146

INPUT ANTI-ALIAS AND DEVICE CONNECTION

JP3C JP5C
JP3A JP5A 1 2 1 2
1 2 1 2 TP5
TP1 E1C BERG69157-102 BERG69157-102
E1A BERG69157-102 BERG69157-102
1 BLK
1 BLK ICP_IN R13 R21
IAP_IN R9 R17 1 2
1 2 IAP ICP
100 1K
100 1K

2
1500 OHMS

R5
1500 OHMS
C13
C21

R1
TBD1206
P3

C9
22NF
22NF

C17
BERG69157-102
P1

22NF
22NF
JP1C

BERG69157-102
TBD1206
1
1
2 AGND AGND AGND

21
2 AGND AGND AGND WEILAND25.161.0253
WEILAND25.161.0253

R6

BERG69157-102

R2
E2C

JP2C
C14
C22

BERG69157-102
TBD1206

E2A
22NF
22NF

C10
C18

TBD1206
R14 R22

22NF
22NF
1
R10 R18 1 2

1 JP2A 2 1 JP1A 2
1 2 IAN ICN
100 1K 1 BLK
100 1K 1 BLK ICN_IN
IAN_IN 1500 OHMS JP4C JP6C TP6
1500 OHMS JP4A JP6A TP2
1 2 1 2
1 2 1 2
BERG69157-102 BERG69157-102
BERG69157-102 BERG69157-102

Figure 38.
JP3N JP5N

Rev. 0 | Page 26 of 36
JP3B JP5B 1 2 1 2
1 2 1 2 TP7
TP3 E1N BERG69157-102 BERG69157-102
E1B BERG69157-102 BERG69157-102
1 BLK
IBP_IN 1 BLK INP_IN R15 R23
R11 R19 1 2 INP
1 2 IBP
100 1K

2
100 1K
2

1500 OHMS
R7

1500 OHMS

R3
C11
C19
C15
C23

BERG69157-102
TBD1206

P2 P4

22NF
22NF
22NF
22NF

TBD1206

JP1B
BERG69157-102

JP1N

1
1
2
AGND AGND AGND 2 AGND AGND AGND

2 1
21

WEILAND25.161.0253
WEILAND25.161.0253

R4
R8

BERG69157-102
BERG69157-102

E2B E2N

TBD1206

JP2B
JP2N

C12
C20
C16
C24

TBD1206

22NF
22NF
22NF
22NF

R12 R20 R16 R24

1
1

1 2 IBN 1 2 INN
100 1K 1 BLK 100 1K 1 BLK
TP4 INN_IN TP8
IBN_IN 1500 OHMS JP4B JP6B 1500 OHMS JP4N JP6N
1 2 1 2 1 2 1 2
BERG69157-102 BERG69157-102 BERG69157-102 BERG69157-102
09078-043
Evaluation Board User Guide
Evaluation Board User Guide UG-146
BERG69157-102
JP7A
2 1
E8A TP12
P8 1 BLK
VAP_IN R26 R29
1 2 VAP
PHASE A VOLTAGE 1
2 1M 100K
AGND

22NF
R32
1500 OHMS

C32
1K
1
BERG69157-102
WEILAND25.161.0253

JP8A
VN

2
AGND

1
2
3
AGND

B
COM
JP9A
3PIN_SOLDER_JUMPER

BERG69157-102
JP7B
2 1
E8B TP11
P7 1 BLK
VBP_IN R27 R30
1 2 VBP
1
PHASE B VOLTAGE 2 1M 100K
AGND

22NF
R33
1500 OHMS

C33
1K
1
BERG69157-102
WEILAND25.161.0253

JP8B
VN
2
AGND

1
2
3
AGND

B
COM
JP9B
3PIN_SOLDER_JUMPER

BERG69157-102
JP7C
2 1 TP10
E8C 1 BLK
P6
VCP_IN R28 R31
1 2 VCP
PHASE C VOLTAGE 1
2 1M 100K
AGND

22NF
R34
1500 OHMS

C34
1K
1
BERG69157-102

WEILAND25.161.0253
JP8C

VN
2

AGND
1
2
3
AGND
A

B
COM

09078-044
JP9C
3PIN_SOLDER_JUMPER

Figure 39.

Rev. 0 | Page 27 of 36
 MCU CIRCUIT CF1 CF2 CF3
P12 1 CF1_ISO 1 CF2_ISO 1 CF3_HSCLK_ISO
MCU_VDD 1
2 2 3 4 5 P13 2 3 4 5 2 3 4 5 MCU_VDD
1
UG-146

AMP227699-2
AMP227699-2
AMP227699-2
WEILAND25.161.0253
2
3 TRST_N
GND GND GND
MCU_VDD 4
5 TDI

P
6
7 TMS

C79

C78
8

0.1UF

10UF
N
9 TCLK

0.1UF

0.1UF
0.1UF
10
11 RTCK

ISOLATED PSU CONNECTIONS 12

C73
C76
C83
13 TDO
14
MCU_RST

0.1UF
0.1UF
0.1UF
0.1UF
0.1UF

0.1UF
15

0.1UF
JP7 16
1 2 R44
MCU_VDD MCU_VDD_ISO 17 10K

C75
BERG69157-102

C72
C77
C84
C80
C81
C82
18 R45

10K
10K
10K
19 10K

R72
R73
R75
20
U8 SAMTECTSW11008GD
28 54 71 96 13 42 84 10 12 19
VDDA VREF VBAT
1 R76
TDI 2 TDI TDO TDO
14 10K
TMS 3 TMS RSTOUT_N RSTOUT_N
TRST_N 4 TRST_N XTAL2
23 MCU_XT2 VBUS(5V)

VDD_3V3_1
VDD_3V3_2
VDD_3V3_3
VDD_3V3_4
TCLK 5 TCK RTCX2
18 RTCX2 D-
MCU_XT1 22 XTAL1 P1_0_ENET_TXD0 95 P1_0
USB IF D+

10K
P1_1

VDD_DCDC_3V3_1
VDD_DCDC_3V3_2
VDD_DCDC_3V3_3
16 RTCX1 P1_1_ENET_TXD1 94 NC

R71
MCU_RST 17 RESET_N P1_4_ENET_TX_EN 93 P1_4 R79 P14 GND
D-_MCU D-
D-_MCU 30 P0_30_USB_DN P1_8_ENET_CRS 92 P1_8
27 2 1 VBUS
SCL_ISO 24 P0_28_SCL0 P1_9_ENET_RXD0 91 P1_9
3 4
P0_26 6 P0_26_AD0_3_AOUT_RXD3 P1_10_ENET_RXD1 90 P1_10 R80
D+_MCU D+ 6 5
P0_24 8 P0_24_AD0_1_I2SRX_WS_CAP3_1 P1_14_ENET_RX_ER 89 P1_14
P0_22 P1_15
27
56 P0_22_RTS1_MCIDAT0_TD1 P1_15_ENET_REF_CLK 88 4-1734376-8
TP46 CR6 MCU_VDD
P0_20 58 P0_20_DTR1_MCICMD_SCL1 P1_16_ENET_MDC 87 P1_16 R77 R81
BLK 1 MOSI_ISO 60 P0_18_DCD1_MOSI0_MOSI P1_17_ENET_MDIO 86 P1_17 C A 680 1.5K
SSB_ISO 63 P0_16_RXD1_SSEL0_SSEL P1_18_USB_UP_LED_PWM1_1 32 USB_UP SML-LXT0805GW-TR
TP52

1
BLK SBENB_ISO 49 P0_11_RXD2_SCL2_MAT3_1 P1_19_CAP1_1 33 P1_19 BLK
TP41
1
P0_9 76 P0_9_I2STX_SDA_MOSI1_MAT2_3 P1_20_PWM1_2_SCK0 34 CF3_HSCLK_ISO
SHIELD D+, D-, VREF_MCU WITH GND
PM1_CTRL 78 P0_7_I2STX_CLK_SCK1_MAT2_1 P1_21_PWM1_3_SSEL0 35 HSA_ISO
TP54 TP42 FROM CONN TO MCU

1
1

BLK IRQ1B_ISO 46 P0_0_RD1_TXD3_SDA1 P1_22_MAT1_0 36 P1_22

TP44 BLK

1
BLK IRQ0B_ISO 47 P0_1_TD1_RXD3_SCL1 P1_23
R78
P1_23_PWM1_4_MISO0 37 P15

Figure 40.
TP45

1
BLK TXD HSDATA_ISO
R82 MCU_VDD
98 P0_2_TXD0 P1_24_PWM1_5_MOSI0 38 TP43 10K 1
RXD 99 P0_3_RXD0 P1_25_MAT1_1 39 P1_25 10K RXD 2
P0_4 81 P0_4_I2SRX_CLK_RD2_CAP2_0 P1_26_PWM1_6_CAP0_0 40 P1_26 TXD

Rev. 0 | Page 28 of 36
1 BLK

3
P0_5 80 P0_5_I2SRX_WS_TD2_CAP2_1 P1_27_CAP0_1 43 P1_27 P38 4
TP55 PM0_CTRL 79 P0_6_I2SRX_SDA_SSEL1_MAT2_0 P1_28_PCAP1_0_MAT0_0 44 P1_28 1

1
BLK SAMTECTSW10608GS4PIN
TP53 RESB_CTRL 77 P0_8_I2STX_WS_MISO1_MAT2_2 P1_29_PCAP1_1_MAT0_1 45 P1_29 2

1
BLK WP 48 P0_10_TXD2_SDA2_MAT3_0 P1_30_VBUS_AD0_4 21 VBUS
UART
3
TP48 SCLK_ISO 62 P0_15_TXD1_SCK0_SCK P1_31_SCK1_AD0_5 20 P1_31 4

1
BLK MISO_ISO 61 P0_17_CTS1_MISO0_MISO P2_0_PWM1_1_TXD1_TRACECLK 75 P2_0 MCU_RST
TP47 5

1
BLK P0_19 59 P0_19_DSR1_MCICLK_SDA1 P2_1_PWM1_2_RXD1_PIPESTAT0 74 P2_1 6
P0_21 57 P0_21_RI1_MCIPWR_RD1 P2_2_PWM1_3_CTS1_PIPESTAT1 73 P2_2 CF2_ISO 7
IRQ_IN_EN 9 P0_23_AD0_0_I2SRX_CLK_CAP3_0 P2_3_PWM1_4_DCD1_PIPESTAT2 70 P2_3 8
IRQ_OUT_EN_ISO 7 P0_25_AD0_2_I2SRX_SDA_TXD3 P2_4_PWM1_5_DSR1_TRACESYNC 69 P2_4 RESB_CTRL 9
TP40 SDA_ISO 25 P0_27_SDA0 P2_5_PWM1_6_DTR1_TRACEPKT0 68 P2_5 10

1
BLK D+_MCU 29 P0_29_USB_DP P2_6_PCAP1_0_RI1_TRACEPKT1 67 P2_6 PM1_CTRL 11 BYPASSING CONTROLLER
P3_25 27 P3_25_MAT0_0_PWM1_2 P2_7_RD2_RTS1_TRACEPKT2 66 P2_7 12
P3_26 26 P3_26_MAT0_1_PWM1_3 P2_8_TD2_TXD2_TRACEPKT3 65 P2_8 PM0_CTRL 13 (OPTIONAL; CUSTOMER SUPPLIED)
P4_28 82 P4_28_MAT2_0_TXD3 P2_9_USB_CONNECT_RXD2_EXTIN0 64 P2_9 14
P4_29 85 P4_29_MAT2_1_RXD3 P2_10_EINT0 53 P2_10 15
P2_13 50 P2_13_EINT3_MCIDAT3_I2STX_SDA P2_11_EINT1_MCIDAT1_I2STX_CLK52 P2_11 16
RTCK 100 RTCK P2_12_EINT2_MCIDAT2_I2STX_WS 51 P2_12 SSB_ISO 17
VSS VSSA HSA_ISO 18
15 31 41 55 72 83 97 11 MOSI_ISO 19
LPC2368FBD100 SDA_ISO

10K
20
MISO_HSD_ISO

R83
21
22
SCLK_ISO 23
SCL_ISO 24
MCU_VDD CF3_HSCLK_ISO 25
MCU_RST 26
IRQ0B_ISO 27
MCU_XT1
Y2 MCU_XT2
R74 1 2 28
S2 IRQ1B_ISO
1 3 10K TP16 TP17 TP18 29
2 4 12.000MHZ 1 BLK 1 BLK 1 BLK 30
C70 C71 CF1_ISO
C74 31
B3S1000 20PF 20PF
32
MRESET
1UF SAMTSW-1-30-08-GD

TP FOR EVAL PROBE - DISTRIBUTE AROUND ISOLATED CIRCUITS

09078-038
Evaluation Board User Guide
Evaluation Board User Guide UG-146
MCU_VDD
VDD2
ISOLATION CIRCUIT
R48
VE2_U3 R49
10K
10K

16

1
U3
VDD2 VDD1
VE1
7
VE2
10 VE2_U3

0.1UF

0.1UF
14 3

C48

C49
RESETB VOA VIA RESB_CTRL
PM0 13 VOB VIB
4 PM0_CTRL
PM1 12 VOC VIC
5 PM1_CTRL
CF1_ISO 6 VOD VID
11 CF1

<- DUT GND2 GND1

ADUM1401BRWZ
MCU ->

9
8
2
15
R50
10K

16
U4

R51
10K
1

R46
10K
R47
10K
VDD1 VDD2
7 VE1
IRQ_IN_EN 10 VE2 IRQ_IN_EN

0.1UF
3 VIA 14

C50
IRQ0B VOA IRQ0B_ISO
IRQ1B 4 VIB VOB
13 IRQ1B_ISO
CF2 5 VIC VOC
12 CF2_ISO
11 VID 6

0.1UF
SBENB_ISO VOD SB_ENB

C51
GND1 GND2

8
9
2

15
ADUM1401BRWZ

16

1
U5

R53
10K
VDD2 VDD1
VE1
7
VE2
10 IRQ_OUT_EN
0.1UF

14 3 IRQ0B_ISO
C52

0.1UF
IRQ0B VOA VIA

C53
IRQ1B 13 VOB VIB
4 IRQ1B_ISO
WP_UX 12 VOC VIC
5 WP
6 VOD VID
11
GND2 GND1
ADUM1401BRWZ
9
8
2
15
R54
10K

R55
10K
16

U6
1

VDD1 VDD2
7 VE1
VE2_U6
VE2_U6 10 VE2
0.1UF

0.1UF

3 VIA 14
C54

C55

MISO/HSD VOA MISO_HSD_ISO

CF3/HSCLK 4 VIB VOB
13 CF3_HSCLK_ISO
HSACTIVE 5 VIC VOC
12 HSA_ISO
IRQ_OUT_EN_ISO 11 VID VOD
6 IRQ_OUT_EN
GND1 GND2
8
9
2

15

ADUM1401BRWZ
16

U7
R57
10K
1

VDD2 VDD1
VE1
7
VE2
10
0.1UF

14 3
C56

SSB VOA VIA SSB_ISO

MOSI 13 VOB VIB
4 MOSI_ISO
0.1UF

12 5
C57

SCLK VOC VIC SCLK_ISO

6 VOD VID
11
ADUM1401BRWZ GND2 GND1
9
8
2
15

SCL
R58A R59A SCL_ISO
10K 10K
SDA
R58B R59B SDA_ISO
10K 1 8 A2 10K
0.1UF

0.1UF

VDD1 VDD2 7
2 SDA1
C58

C59

SDA SDA2 SDA_ISO

SCL 3 SCL1 SCL2 6 SCL_ISO
GND1 GND2
4 5 ADUM1250ARZ

DGND
GND
JP35 JP36
SDA MOSI/SDA 1 2 MOSI
0 DNI 0
JP34
SCL
JP33 SCLK/SCL 1 2 SCLK
0 DNI 0
JP37 JP38
JP31 JP32 HSDATA_ISO MISO_HSD_ISO 1 2 MISO_ISO
09078-045

HSACTIVE SSB/HSA 1 2 SSB DNI 0 0

0 DNI 0 I2C/HSDC CONFIG SPI CONFIG
I2C/HSDC CONFIG SPI CONFIG

Figure 41.

Rev. 0 | Page 29 of 36
 UG-146

1 DNI DNI DNI DNI DNI

P18 P22 P26 P30 P34
1 TDO 1 P0_26 1 1 1 VBUS
2 TDI 2 2 2 MCU_RST 2 MCU_XT1 DO NOT INSTALL
3 TMS 3 IRQ_OUT_EN_ISO 3 3 RTCX2 3 MCU_XT2 ALIGN PORTS AS DRAWN NEXT TO MCU
4 TRST_N 4 P0_24 4 RSTOUT_N 4 4 SCL_ISO SIDE WITH PINS1 - 25
5 TCLK 5 5 IRQ_IN_EN 5 P1_31 5 SDA_ISO

SAMTECTSW10608GS5PIN SAMTECTSW10608GS5PIN SAMTECTSW10608GS5PIN SAMTECTSW10608GS5PIN SAMTECTSW10608GS5PIN

25
26
DNI DNI DNI DNI DNI
P19 P23 P27 P31 P35
MCU_VDD
1 P3_26 1 1 P1_22 1 1 IRQ1B_ISO
2 P3_25 2 USB_UP 2 P1_23 2 2 IRQ0B_ISO
P1_19 HSDATA_ISO P1_27 WP
DO NOT INSTALL
R52 3 3 3 3 3 ALIGN PORTS AS DRAWN NEXT TO MCU
4 D+_MCU 4 CF3_HSCLK_ISO 4 P1_25 4 P1_28 4 SBENB_ISO
10K D-_MCU HSA_ISO P1_26 P1_29 P2_13
SIDE WITH PINS26 - 50
5 5 5 5 5
SAMTECTSW10608GS5PIN SAMTECTSW10608GS5PIN SAMTECTSW10608GS5PIN SAMTECTSW10608GS5PIN SAMTECTSW10608GS5PIN 50

2
BERG69157-102

JP9
51 DNI DNI DNI DNI DNI
P20 P24 P28 P32 P36

1
1 P2_12 1 P0_22 1 MISO_ISO 1 P2_7 1
2 P2_11 2 P0_21 2 SCLK_ISO 2 P2_6 2 DO NOT INSTALL
P0_24 3 P2_10 3 P0_20 3 SSB_ISO 3 P2_5 3 P2_2 ALIGN PORTS AS DRAWN NEXT TO MCU
4 4 P0_19 4 P2_9 4 P2_4 4 P2_1 SIDE WITH PINS51 - 75
5 5 MOSI_ISO 5 P2_8 5 P2_3 5 P2_0
R56
10K SAMTECTSW10608GS5PIN SAMTECTSW10608GS5PIN SAMTECTSW10608GS5PIN SAMTECTSW10608GS5PIN SAMTECTSW10608GS5PIN
75

Figure 42.
76 DNI DNI DNI DNI DNI
GND P21 P25 P29 P33 P37

Rev. 0 | Page 30 of 36
1 P0_9 1 P0_4 1 P1_17 1 P1_9 1
RESB_CTRL P4_28 P1_16 P1_8
DO NOT INSTALL
2 2 2 2 2 ALIGN PORTS AS DRAWN NEXT TO MCU
3 PM1_CTRL 3 3 P1_15 3 P1_4 3 TXD
PM0_CTRL P1_14 P1_1 RXD
SIDE WITH PINS76 - 100
4 4 4 4 4
5 P0_5 5 P4_29 5 P1_10 5 P1_0 5 RTCK

SAMTECTSW10608GS5PIN SAMTECTSW10608GS5PIN SAMTECTSW10608GS5PIN SAMTECTSW10608GS5PIN SAMTECTSW10608GS5PIN

100

2
JP8

LEFT MOST PINS SHOULD BE FURTHEST FROM DUT

BERG69157-102

1
R86
10K

GND
09078-039
Evaluation Board User Guide
Evaluation Board User Guide UG-146

TP62
CURRENT MEASUREMENT - DO NOT INSTALL

1 BLK 1 BLK
DNI
VDD2
R61 VREF_ISNS

100K

100K
DO NOT INSTALL DNI

TP61
DNI
R62
A4 DNI
3
VDD_F 2 VCC 6
1 EN 7
RGA P17
VREF 4 ISNS_OUT
R60 VO 1
10
RGB VFB AD8553ARMZ 2
4.02K 9 DNI WEILAND25.161.0253
GND 5
DNI DNI
8
VDD R63
DGND
200K DGND
DNI
C63

560PF
DNI

SELF BOOT EEPROM JP60

FACTORY USE ONLY VDD2
SBCON 2 1 IRQ0B
0
A3 4 JP61
VDD 2 1
SBSDA IRQ1B
S2 8 0
0.1UF

SBSCL 1 D
C61

S1 2 SBCON
IN
6 SB_ENB
VDD2
GND
VDD2

3 ADG820BRMZ
R64 DNI
R65
10K

R66
10K
DGND
U2 8 10K
P16
1 VCC 7 WP_UX
A0 WP 1
0.1UF

2 6 SBSCL
C62

A1 SCL 2
3 5 SBSDA
A2 SDA 3
VSS
MOLEX22-03-2031
4 MICRO24LC128-I-SN
DNI
DGND

09078-046
DO NOT POPULATE U2
Figure 43.

Rev. 0 | Page 31 of 36
UG-146 Evaluation Board User Guide
LAYOUT

09078-040
Figure 44.

09078-041

Figure 45.
Rev. 0 | Page 32 of 36
Evaluation Board User Guide UG-146

09078-042
Figure 46.

09078-043

Figure 47.

Rev. 0 | Page 33 of 36
UG-146 Evaluation Board User Guide

ORDERING INFORMATION
BILL OF MATERIALS
Table 27.
Qty Designator Description Manufacturer/Part Number
1 A1 IC-ADI, 1.2 V, ultralow power, high PSRR voltage Analog Devices, Inc./ADR280ARTZ
reference
1 A2 IC swappable dual isolator Analog Devices, Inc./ADUM1250ARZ
4 C1, C8, C44, C78 Capacitor, tantalum, 10 μF AVX
20 C9 to C25, C32 to C34 Capacitor, ceramic, 22 nF AVX
30 C2, C7, C40, C42, C43, C48 to C59, Capacitor, chip, X7R 0805, 0.1 μF Murata
C61, C62, C72, C73, C75 to C77, C79
to C84
4 C26, C27, C70, C71 Capacitor, mono, ceramic, C0G, 0402, 20 pF Murata
3 C3, C5, C41 Capacitor, tantalum, 4.7 μF AVX
2 C38, C74 Capacitor, ceramic chip, 1206, X7R, 1.0 μF Taiyo Yuden
2 C4, C6 Capacitor, ceramic, X7R, 0.22 μF Phycomp (Yageo)
4 CF1 to CF3, CLKIN Connector, PCB coax, BNC, ST AMP (Tyco)/227699-2
5 CR1 to CR5 Diode, LED, green, SMD Chicago Mini Lamp (CML Innovative
Technologies)/CMD28-21VGCTR8T1
1 CR6 LED, green, surface mount LUMEX/SML-LXT0805GW-TR
12 E1A, E1B, E1C, E1N, E2A, E2B, E2C, Inductor, chip, ferrite bead, 0805, 1500 Ω Murata
E2N, E8A, E8B, E8C, E8N
37 JP2, JP7 to JP10, JP1A to JP8A, JP1B Connector, PCB Berg jumper, ST, male 2-pin Berg/69157-102
to JP8B, JP1C to JP8C, JP1N to JP8N
5 JP11, JP12, JP9A, JP9B, JP9C 3-pin solder jumper N/A
6 JP32, JP34, JP36, JP38, JP60, JP61 Resistor jumper, SMD 0805 (open), 0 Ω Panasonic
11 P1 to P10, P12 Connector, PCB TERM, black, 2-pin, ST WeilandD/25.161.0253
2 P11, P38 Connector, PCB, header, SHRD, ST, male 32-pin Samtec/TSW-1-30-08-G-D
1 P13 Connector, PCB, Berg, header, ST, male 20-pin Samtec/TSW-110-08-G-D
1 P14 Connector, PCB, USB, Type B, R/A, through hole AMP (Tyco)/4-1734376-8
1 P15 Connector, PCB, Berg, header, ST, male 4-pin Samtec/TSW106-08-G-S
1 P16 Connector, PCB straight header 3-pin Molex/22-03-2031
5 Q1 to Q5 Trans digital FET P channel Fairchild/FDV302P
8 R1 to R8 Do not install (TBD_R1206) N/A
8 R9 to R16 Resistor, PREC, thick film chip, R1206, 100 Ω Panasonic
12 R17 to R25, R32 to R34 Resistor, PREC, thick film chip, R0805, 1 kΩ Panasonic
3 R26 to R28 Resistor, MF, RN55, 1 M Vishay-Dale
3 R29 to R31 Resistor, MF, RN5, 100 kΩ Vishay-Dale
39 R35, R36, R38, R44 to R57, R64 to Resistor PREC thick film chip, R0805, 10 kΩ Panasonic
R66, R68 to R76, R78, R82 to R86,
R58A, R58B, R59A, R59B
1 R37 Resistor, film, SMD 0805, 2 Ω Panasonic
5 R39 to R43 Resistor, PREC, thick film chip, R1206, 499 Panasonic
1 R77 Resistor, film, SMD, 0805, 680 Ω Multicomp
2 R79, R80 Resistor, film, SMD, 1206, 27 Ω Yageo-Phycomp
1 R81 Resistor, PREC, thick film chip, R1206, 1.5 kΩ Panasonic
1 RSB Resistor, jumper, SMD, 1206 (open), 0 Panasonic
2 S1, S2 SW SM mechanical key switch Omron/B3S1000
52 TP1 to TP18, TP22 to TP55 Connector, PCB, test point, black Components Corporation
1 U1 IC-ADI, polyphase, multifunction, energy metering IC Analog Devices, Inc./ADE7878CPZ
5 U3 to U7 IC-ADI quad channel digital isolator Analog Devices, Inc./ADum1401BRWZ
1 U8 IC ARM7, MCU, flash, 512 kΩ, 100 LQFP NXP/LPC2368FBD100

Rev. 0 | Page 34 of 36
Evaluation Board User Guide UG-146
Qty Designator Description Manufacturer/Part Number
1 Y1 IC crystal, 16.384 MHz Valpey Fisher Corporation
1 Y2 IC crystal quartz, 12.000 MHz ECS
1 A3 IC-ADI 1.8 V to 5.5 V 2:1 MUX/SPDT switches Analog Devices, Inc./ADG820BRMZ
1 A4 IC-ADI 1.8 V to 5 V auto-zero in amp with shutdown Analog Devices, Inc./AD8553ARMZ
1 C63 Capacitor, ceramic, NP0, 560 pF Phycomp (Yageo)
4 JP31, JP33, JP35, JP37 Resistor, jumper, SMD, 0805 (SHRT), 0 Panasonic
1 P17 Connector, PCB, TERM, black, 2-pin, ST Weiland/25.161.0253
20 P18 to P37 Connector, PCB, Berg, header, ST, male 5-pin Samtec/TSW106-08-G-S
1 R60 Resistor, PREC, thick film chip, R0805, 4.02 kΩ Panasonic
2 R61, R62 Resistor, PREC, thick film chip, R0805, 100 kΩ Panasonic
1 R63 Resistor, PREC, thick film chip, R1206, 200 kΩ Panasonic
2 TP61, TP62 Connector, PCB test point, black Components Corporation
1 U2 IC, serial EEPROM, 128 kΩ, 2.5 V Microchip/24LC128-I-SN

Rev. 0 | Page 35 of 36
UG-146 Evaluation Board User Guide

NOTES

I2C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors).

ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection
circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.

Legal Terms and Conditions

By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions
set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you
have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc.
(“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal,
temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided
for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional
limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term
“Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including
ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may
not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to
promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any
occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board.
Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice
to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO
WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED
TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL
PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF
THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE
AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable
United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of
Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby
submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed.

©2010 Analog Devices, Inc. All rights reserved. Trademarks and

registered trademarks are the property of their respective owners.
UG09078-0-8/10(0)

Rev. 0 | Page 36 of 36