DC Power Line Communication Based on

Power/Signal Dual Modulation in Phase Shift

Full Bridge Converters
Jin Du, Student Member, IEEE, Jiande Wu, Member, IEEE, Ruichi Wang, Zhengyu Lin, Senior Member,
IEEE, Xiangning He, Fellow, IEEE

Abstract – For intelligent DC distributed power systems, data In a DC-DPS, a number of different generation, storage and
communication plays a vital role in system control and device consumption devices are connected to a common DC bus [5].
monitoring. To achieve communication in a cost effective way, Related topics including distributed generation (DG) [6-9],
power/signal dual modulation (PSDM), a method that integrates high voltage DC systems (HVDC) [10-12] and micro grids
data transmission with power conversion, can be utilized. In this
paper, an improved PSDM method using phase shift full bridge
(MG) [13-15] are the combination of some or all of the
(PSFB) converter is proposed. This method introduces a phase components mentioned above, and have been widely
control based freedom in the conventional PSFB control loop to discussed. Possible DC-DPS are shown in Fig.1. In these
realize communication using the same power conversion circuit. systems, two schemes are commonly used for DC bus voltage
In this way, decoupled data modulation and power conversion are regulation: master-slave control and droop control [16-19]. In
realized without extra wiring and coupling units, and thus the master-slave control, the master converter regulates the DC
system structure is simplified. More importantly, the signal bus voltage via a communication link, and dependent upon the
intensity can be regulated by the proposed perturbation depth, speed and reliability of the communication link. In
and so this method can adapt to different operating conditions. conventional droop control, the relationship between voltage
Application of the proposed method to a DC distributed power
system composed of several PSFB converters is discussed. A 2kW
and current is determined by fixed droop characteristic, such
prototype system with an embedded 5kbps communication link that the total power is balanced without communication.
has been implemented, and the effectiveness of the method is However, the DC bus voltage shifts in different conditions,
verified by experimental results. depending on the location of the converters and the length of
the wire. To increase the accuracy of the DC bus voltage
Index Terms – DC distributed power system, power line control, low speed communication is incorporated into the
communication, power/signal dual modulation, phase shift full improved droop control. Consequently, data communication is
bridge essential to build a high performance DC-DPS.
(a)
PV PV PV
I. INTRODUCTION Storage

During the past decades, distributed power systems (DPS) Step-Up Step-Up Step-Up Bidirectional
have experienced substantial development. The driving force Converter Converter Converter Converter

of this comes from emerging power electronic applications

Communication Wire
including LED lightening, electric vehicle, and photovoltaic
(PV) system [1-2]. Compared with AC counterparts, DC High DC Bus Voltage
Generation
distributed power systems (DC-DPS) have advantages of AC/DC DC/DC DC
simple structure with fewer conversion stages, and no need for Rectifier Converter Load

phase or reactive power control [3-4]. These merits make DC

distributed power system suitable for applications such as data
centre power supply systems and renewable generation AC/DC DC/DC DC
Rectifier Converter Load
systems.

Manuscript received September 10, 2015; revised December 13, 2015; DC/DC DC
Central
accepted Feb 3, 2016. This work is supported by the National Nature Science Controller
Converter Load
Foundation of China under Grants 61174157, 51577170 and Lite-On Power Consumption
Electronics Technology Research Fund. (b)
(c)
Copyright (c) 2016 IEEE. Personal use of this material is permitted.
However, permission to use this material for any other purposes must be Fig.1 Structures of different DC power system: (a) DG, (b) HVDC and
obtained from the IEEE by sending a request to pubs-permissions@ieee.org. (c)Micro Grid.
J. Du, J. Wu, R. Wang, and X. He are with the College of Electrical Conventionally, wired communication technologies such as
Engineering, Zhejiang University, Hangzhou 310027, China (e-mail: CAN and RS-485, have been widely used and proved to be
eedujin@zju.edu.cn; eewjd@zju.edu.cn; rui_chi@163.com; hxn@zju.edu.cn ).
Z. Lin is with the Electrical, Electronic and Power Engineering of the
reliable solutions. However, additional communication cable
Aston University, Birmingham, U.K. (e-mail: z.lin@ieee.org ). increases installation cost and system complexity. In recent
years, wireless communication methods, such as Wi-Fi and systems, signal coupling circuits, which increases the system
Zigbee, have been applied in control systems. It is attractive to complexity and cost, are employed to inject high frequency
eliminate additional communication cable. However, the carrier into the power line. The principle of the PSDM method
reliability of wireless communication is often doubted, is to utilize the intrinsic harmonic produced by power
because it is susceptible to environment and vulnerable to electronic converter as data carrier. Thus, data modulation can
attack. be achieved without the coupling units in conventional PLC.
Power line communication (PLC), which does not require Phase shift full bridge (PSFB) is a popular topology which
additional communication cables, is a popular approach in AC has been widely applied in DC-DPS. By taking the advantage
system. In [20], a PLC-based communication architecture for of intrinsic capacitor and leakage inductance, zero voltage
an LVDC system is presented, which employs high frequency switch (ZVS) can be realized to improve the efficiency. The
(HF) PLC for monitoring, control and protection. It circuit model and control strategy have been analysed
demonstrates that PLC is applicable to DC-DPS. However, comprehensively [23-26].
according to European CENELEC standard EN 50065, narrow A typical circuit structure and digital control scheme of a
band PLC (NB-PLC) is used for remote control and the carrier PSFB converter are shown in Fig.2, and the key waveforms
frequency of HF PLC is beyond the limitation of the standard. are shown in Fig.3. This circuit is controlled by a digital signal
For NB-PLC applied in a DC system, there are two processor (DSP), in which two PWM generator modules are
constrains. First, the spectrum overlaps with the harmonics assigned to the leading leg and lagging leg respectively,
produced by power electronic converters, and consequently producing four gate drive signals. In this section, the methods
communication is vulnerable to the switching frequency noise. of inserting information into PWM signal but without
Second, the capacitance of the DC bus is large, varying from influencing the power output are discussed in detail.
10 µF to several mF, and so relatively high power coupling iL iout

circuits are required. Overall, the application of NB-PLC in S1 Cp1 S3 Cp3 Ds1 Ds3 Lo
Llk T
DC-DPS is a challenge [21]. uin ip r
uout
The power/signal dual modulation (PSDM) concept up us
Co Ro
proposed in [22] provides possible method of achieving NB- Cp2
n1:n2
PLC in DC-DPS. It embeds signals into power conversion by S2 S4
Cp4 Ds2 Ds4
shifting the frequency of the switching power supply intrinsic Power Circuit
harmonic. However, this method is based on basic PWM
ug1 ug2 ug3 ug4
converters, and the signal intensity cannot be regulated. Ki Kv

To realize data communication in a DC-DPS consisting of PWM_A

ISOLATED ADC ADC
several phase shift full bridge (PSFB) converters while DRIVER PWM_B
IL Vout
overcoming the aforementioned constrains, an improved NB- φA - φB H(s) Gc(s)

PLC approach based on PSDM is proposed in this paper. This Driving Generation Power Regulation Vref
method utilizes another freedom in conventional power Fig.2 Topology of PSFB converter.
control loop of the PSDM converter, to embed data φA
Carrier
modulation into power conversion. Two theoretically distinct A
modulation strategies, which are frequency-based and phase- de
based respectively, are studied and compared. Then the Carrier
B
proposed phase modulation is analysed in details. In addition, φB ug1 ug2
the concept of perturbation depth is proposed to describe the PWM_A
signal intensity regulation. The proposed method has the
ug3 ug4
merits of decoupled control, adjustable signal intensity and PWM_B
simplified hardware, and it has been verified by simulation
and prototype experiment. up
Primary
This paper is arranged as follow. The classification and side
evaluation of the modulation methods are presented in Section
II. The principle of the phase modulation is analysed in detail us iL
in Section III. Simulation verification and prototype Secondary
side
experiment are shown in Section IV. Finally, conclusions are
given in Section V. Fig.3 Key waveforms of PSFB converter.
In general, a triangular carrier is employed in PSFB circuit.
II. CLASSIFICAITON AND EVALUATION OF MODULATION The normalized triangular waveform is defined as
METHODS (𝑡𝑡 𝑀𝑀𝑀𝑀𝑀𝑀 2𝜋𝜋)
(0 ≤ (𝑡𝑡 𝑀𝑀𝑀𝑀𝑀𝑀 2𝜋𝜋) < 𝜋𝜋)
𝜋𝜋
𝑢𝑢𝑡𝑡𝑡𝑡𝑡𝑡 (𝑡𝑡) = � (𝑡𝑡 𝑀𝑀𝑀𝑀𝑀𝑀 2𝜋𝜋)
. (1)
In conventional power electronics converters, high 2− (𝜋𝜋 ≤ (𝑡𝑡 𝑀𝑀𝑀𝑀𝑀𝑀 2𝜋𝜋) < 2𝜋𝜋)
𝜋𝜋
frequency harmonics at frequency up to several hundreds of
kilohertz, are considered useless, and introduce negative In a digital PWM module, the virtual waveform of a typical
effects including decreased the power quality, degraded EMC triangular carrier uc can be expressed as
and so on. However, high frequency signal can be utilized as
𝑢𝑢𝑐𝑐 (𝑡𝑡) = 𝑢𝑢𝑡𝑡𝑡𝑡𝑡𝑡 (2𝜋𝜋𝜋𝜋𝜋𝜋 + 𝑝𝑝) (2)
data carrier. In conventional power line communication
where f and p are frequency and phase angular of the carrier In a binary FSK strategy for example, the circuit operates at
respectively. These two parameters can be controlled. The frequency f1 or f2 decided by the data to be sent. The
other essential parameter is duty cycle d, which is set modulated carrier can be expressed as
constantly to 1/2 by comparing the carrier wave with a DC 𝑢𝑢 (2𝜋𝜋𝑓𝑓1 𝑡𝑡), when sending data ′𝟎𝟎′
reference set at 1/2. 𝑢𝑢𝑐𝑐 (𝑡𝑡) = � 𝑡𝑡𝑡𝑡𝑡𝑡 (9)
𝑢𝑢𝑡𝑡𝑡𝑡𝑡𝑡 (2𝜋𝜋𝑓𝑓2 𝑡𝑡), when sending data ′𝟏𝟏′
Suppose the parameters in the two PWM modules
corresponding to the leading leg and lagging leg are fA, dA, φA In this way, data is injected into the converter. Rectified by
and fB, dB, φB respectively. It is required a bridge in the secondary side, the circuit outputs a DC voltage
with FSK modulated ripple, whose fundamental harmonic is
𝑓𝑓𝐴𝐴 = 𝑓𝑓𝐵𝐵 = 𝑓𝑓 (3)
twice the carrier frequency. The fundamental harmonic of this
𝑑𝑑𝐴𝐴 = 𝑑𝑑𝐵𝐵 = 0.5 (4) DC voltage ripple is
𝜑𝜑𝐵𝐵 − 𝜑𝜑𝐴𝐴 = 𝑑𝑑𝑒𝑒 𝜋𝜋 ( 0 < 𝑑𝑑𝑒𝑒 < 1) 𝐴𝐴 sin 2𝜋𝜋 ∗ 2𝑓𝑓1 𝑡𝑡, when sending data ′𝟎𝟎′
(5) 𝑓𝑓𝑠𝑠 (𝑡𝑡) = � 1 (10)
𝐴𝐴2 sin 2𝜋𝜋 ∗ 2𝑓𝑓2 𝑡𝑡, when sending data ′𝟏𝟏′
where de𝝅𝝅 is the phase shift between the leading leg and
lagging leg, and which regulates the output ratio of voltage By adopting appropriate communication protocol, data can
pulse. The output voltage of the PSFB circuit is be modulated and transmitted.
𝑈𝑈𝑜𝑜𝑜𝑜𝑜𝑜 = 𝑛𝑛𝒅𝒅𝒆𝒆 𝑼𝑼𝒅𝒅𝒅𝒅 (6)
B. Phase shift modulation
where n is turns ratio of transformer Tr , and Udc is the input
voltage. Phase shift keying (PSK) is a common method for data
Eqn. (3)-(5) are basic equations for the control of power modulation. In a PSFB converter, the differential phase is
conversion in a conventional PSFB circuit. However, in these relevant to power regulation, but the common phase can be
equations, two freedoms can be exploited to transmit modulated independently to implement data communication.
information, which will not affect power conversion. It is clear In such a scheme, the PWM carrier is no longer a pure
that the carrier frequency f can be a variable in order to embed triangular wave. To ensure the independence of power
signal. Eqn. (5) indicates that the relative phase between the regulation and data communication, it is required that
leading leg and lagging leg φB - φA is determined by power 𝑢𝑢𝐴𝐴 (𝑡𝑡 − 𝑇𝑇𝑑𝑑 ) = 𝑢𝑢𝐵𝐵 (𝑡𝑡) (11)
control. However, by defining the differential phase and the
common phase as where 𝑢𝑢𝐴𝐴 , 𝑢𝑢𝐵𝐵 are the carrier wave of the leading leg and
𝜑𝜑𝐵𝐵 − 𝜑𝜑𝐴𝐴 lagging leg respectively, and Td is the delay time
𝜑𝜑𝑑𝑑 =
2 corresponding to the duty cycle of the power output.
(7)
𝜑𝜑𝐵𝐵 + 𝜑𝜑𝐴𝐴 Assume that in every period, carrier wave is a triangular
𝜑𝜑𝑐𝑐 =
2 wave with a data modulated phase angular 𝜑𝜑(𝑡𝑡) . The
then φA and φB can be expressed as modulated carriers of the leading leg and the lagging leg can
𝜑𝜑𝐴𝐴 = 𝜑𝜑𝑐𝑐 − 𝜑𝜑𝑑𝑑 be expressed as
(8) 𝑢𝑢𝑐𝑐𝑐𝑐 (𝑡𝑡) = 𝑢𝑢𝑡𝑡𝑡𝑡𝑡𝑡 (2𝜋𝜋𝜋𝜋𝜋𝜋 + 𝜑𝜑(𝑡𝑡))
𝜑𝜑𝐵𝐵 = 𝜑𝜑𝑐𝑐 + 𝜑𝜑𝑑𝑑 . (12)
𝑢𝑢𝑐𝑐𝑐𝑐 (𝑡𝑡) = 𝑢𝑢𝑡𝑡𝑡𝑡𝑡𝑡 (2𝜋𝜋𝜋𝜋𝜋𝜋 + 𝑑𝑑𝑒𝑒 𝜋𝜋 + 𝜑𝜑(𝑡𝑡 + 𝑑𝑑𝑒𝑒 /2𝑓𝑓))
It can be seen that the common phase φc is a decoupled
control freedom, which can be modulated to embed data. Fig.4 In the digital control system, carrier phase is changed every
presents the aforementioned two methods by modulating f and period, so that 𝜑𝜑(𝑡𝑡) can be expressed as a discrete series 𝜑𝜑[𝑛𝑛],
the relationship between 𝜑𝜑(𝑡𝑡) and 𝜑𝜑[𝑛𝑛] is
φ.
ug1
ug2
ug3
ug4
Phase Reference Data Modulation 𝜑𝜑(𝑡𝑡) = 𝜑𝜑(𝑛𝑛/𝑓𝑓) = 𝜑𝜑[𝑛𝑛]. (13)
Initial Phase Method 1

where 𝑛𝑛 = 𝐼𝐼𝐼𝐼𝐼𝐼(𝑡𝑡 ∙ 𝑓𝑓).

Carrier Frequency “ f ”
PWM _A f Modulation

If 𝜑𝜑[𝑛𝑛] = 0 , the circuit operated in conventional mode;

Frequency = f1
Method 2
Duty cycle = 0.5 Common Phase “ φc ”
φA φ Modulation
ISOLATED otherwise, the data carrier can be introduced by selecting a
DRIVER PWM _B
Frequency = f1 proper digit sequence. The principle shown in Fig.5 employs
IL Vout
an on-off keying modulation with sequence + φ,-φ. In this way,
Duty cycle = 0.5
φB H(s) Gc(s)
Driving Generation Power Regulation Vref designed frequency component can be injected into the
Fig.4 Control scheme of phase shift full bridge converter. converter. In receiver, the frequency component can be
detected and demodulated as data ‘1’.
A. Switching frequency shift modulation ug1 +
0.5
ug2 Data modulation
-
According to the analysis above, the switching frequency f φA 0
1
is irrelevant to the power control algorithm, which means the PWM_A φ (t)
frequency is a control freedom to carry information. To Data

modulate information into the switching ripple, a common ug3 +

0.5
approach is frequency shift keying (FSK), as depicted as ug4 -
+ π de From
Method 1 in Fig.4. φB power regulator
+
PWM_B

Fig.5 Principle of the phase modulation.

 Frequency modulation and phase modulation are essential 0 1 0
d(t)
modulation strategies, and both can be employed in PSDM
systems. However, frequency modulation method has the t
usqu(t)
drawback that the amplitude of the carrier is determined by the
power regulator, and the signal intensity cannot be controlled t
φ(t)
independently, so it is unsuitable for long range Δφ
communication. On the contrary, phase modulation strategy t
ucA
applied in PSFB converter is flexible. It not only provides an 1 +Δφ -Δφ
intensity-controllable approach to adapt to complex operation
0.5
environment, but also avoids the signal intensity attenuation
caused by power regulation. By selecting different digit ucB TS t/Ts
1
sequence, different frequency carrier with variable amplitude
can be produced. 0.5

t/Ts
III. PRINCIPLE OF THE PHASE MODULATION
ug1

According to the analysis in Section II, phase modulation -Δt

t
+Δt
on PWM carrier is suitable for data communication applied in ug3
PSFB converters due to its merits.
t
us
A. Perturbation process
TR TD t
In this section, the process of the data modulation is IDC IR
iL
discussed.
The principle of the proposed method is to modulate the t
data signal into the carrier phase of legs. This paper employs a Fig.6 key waveform of the modulation process.
bipolar modulation method, which guarantees the average A normalized pulse waveform uR0 is defined as
current unchanged with modulation. In this method, bit ‘1’ is
represented by alternative + ∆𝜑𝜑 and - ∆𝜑𝜑 , while bit ‘0’ is 1 (0 ≤ 𝑥𝑥 < 𝑑𝑑𝑇𝑇𝑅𝑅 )
𝑢𝑢𝑅𝑅0 (𝑡𝑡) = � (17)
represented by no perturbation. A normalized bipolar square 0 (𝑥𝑥 ≥ 𝑑𝑑𝑇𝑇𝑅𝑅 ).
waveform is defined as For conventional PWM control, uR0 is extended in every TR
1 (0 ≤ (𝑡𝑡 𝑀𝑀𝑀𝑀𝑀𝑀 2𝜋𝜋) < 𝜋𝜋) periods as uR and it can be expressed as Fourier series
𝑢𝑢𝑠𝑠𝑠𝑠𝑠𝑠 (𝑡𝑡) = � . (14) ∞
−1 (𝜋𝜋 ≤ (𝑡𝑡 𝑀𝑀𝑀𝑀𝑀𝑀 2𝜋𝜋) < 2𝜋𝜋)
𝑢𝑢𝑅𝑅 (𝑡𝑡) = � 𝐶𝐶𝑛𝑛 ∙ 𝑒𝑒 𝑗𝑗𝑛𝑛𝑛𝑛0 𝑡𝑡 (18)
Letting the data sequence is d(t), then the modulated phase 𝑛𝑛=−∞
shift can be expressed as where,
1 𝑇𝑇𝑅𝑅
𝜑𝜑(𝑡𝑡) = 𝑑𝑑(𝑡𝑡) ∙ ∆𝜑𝜑 ∙ 𝑢𝑢𝑠𝑠𝑠𝑠𝑠𝑠 (2𝜋𝜋𝑓𝑓2 𝑡𝑡 + 𝜑𝜑𝑠𝑠 ) (15) 𝐶𝐶𝑛𝑛 = � 𝑢𝑢 (𝑡𝑡)𝑒𝑒 −𝑗𝑗𝑛𝑛𝑛𝑛0 𝑡𝑡 𝑑𝑑𝑑𝑑
𝑇𝑇𝑅𝑅 0 𝑅𝑅 (19)
where ∆𝜑𝜑 is the amplitude of the phase perturbation, f2 is 1 1
= sin 2𝜋𝜋𝜋𝜋 ∙ 𝑑𝑑 − 𝑗𝑗 ∙ (1 − cos 2𝜋𝜋𝜋𝜋 ∙ 𝑑𝑑).
the perturbation frequency, and φs is the constant phase of the 2𝜋𝜋𝜋𝜋 2𝜋𝜋𝜋𝜋
perturbation wave. The waveforms with the perturbation Then the fundamental component uR1 is
strategy are shown in Fig.6. 2
𝑢𝑢𝑅𝑅1 (𝑡𝑡) = ∙ sin 𝜋𝜋𝜋𝜋 ∙ cos(𝜔𝜔0 𝑡𝑡 − 𝜋𝜋𝜋𝜋). (20)
Due to the phase perturbation, the waveforms of the carriers 𝜋𝜋
are altered. Graphically, that means the positive part of ug1 is
For conventional PSFB converters, the output fundamental
delayed for +∆t or −∆t according to 𝜑𝜑(𝑡𝑡), while ug3 remains a harmonic frequency fR=1/TR is twice the switching frequency
constant phase shift angle relevant to ug1, where fs , and the spectrum is shown in Fig.7 (a).
∆𝜑𝜑 𝑇𝑇𝑠𝑠 ∆𝜑𝜑 According the analysis in last section, the data is modulated
∆𝑡𝑡 = ∗ = (16)
𝜋𝜋 2 2𝜋𝜋𝑓𝑓𝑠𝑠 in every 4TR period, so the data-modulated pulse waveform
uD0 can be expressed as
In this way, a data carrier, whose period is an integer
multiple of the switching period, is injected, and it can be 𝑢𝑢𝐷𝐷0 (𝑡𝑡) = (𝑢𝑢𝑅𝑅0 (𝑡𝑡 + ∆𝑡𝑡) + 𝑢𝑢𝑅𝑅0 (𝑡𝑡 − 𝑇𝑇𝑅𝑅 + ∆𝑡𝑡) +
(21)
decomposed in the output voltage. 𝑢𝑢𝑅𝑅0 (𝑡𝑡 − 2𝑇𝑇𝑅𝑅 − ∆𝑡𝑡) + 𝑢𝑢𝑅𝑅0 (𝑡𝑡 − 3𝑇𝑇𝑅𝑅 − ∆𝑡𝑡)).
B. Analysis of the spectrum with perturbation Extending uD0 in every 4TR periods, it can be expressed in
Fourier series,
As shown in Fig.6, small phase perturbation +∆𝜑𝜑 and -∆𝜑𝜑, ∞
which cause the time displacement in the secondary voltage us 𝑢𝑢𝐷𝐷 (𝑡𝑡) = � 𝐶𝐶𝑚𝑚 ∙ 𝑒𝑒 𝑗𝑗𝑚𝑚𝑚𝑚𝐷𝐷 𝑡𝑡 (22)
and the inductor current iL, are introduced to the carrier 𝑛𝑛=−∞
𝜋𝜋
waveform, thus the output spectrums are changed. To analysis Where 𝜔𝜔𝐷𝐷 = , and
2𝑇𝑇𝑅𝑅
the spectrum of us with proposed modulation strategy, detailed
analysis is given in this part.
 1 4𝑇𝑇𝑅𝑅 data-carrier current source. The attenuation rate of the signal
𝐶𝐶𝑚𝑚 = � 𝑢𝑢𝐷𝐷0 (𝑡𝑡)𝑒𝑒 −𝑗𝑗𝑚𝑚𝑚𝑚𝐷𝐷 𝑡𝑡 𝑑𝑑𝑑𝑑
4𝑇𝑇𝑅𝑅 0 ra is defined as
(𝑢𝑢𝑅𝑅0 (𝑡𝑡 + ∆𝑡𝑡) + 𝑉𝑉𝑅𝑅 1
1 4𝑇𝑇𝑅𝑅 ⎡ 𝑢𝑢𝑅𝑅0 (𝑡𝑡 − 𝑇𝑇𝑅𝑅 + ∆𝑡𝑡) + ⎤ −𝑗𝑗𝑚𝑚𝑚𝑚 𝑡𝑡 𝑟𝑟𝑎𝑎 = � �=� �. (25)
𝑉𝑉𝑇𝑇 1
= � ⎢ ⎥ 𝑒𝑒 𝐷𝐷 𝑑𝑑𝑑𝑑 1 + 𝑍𝑍𝐿𝐿 × ∑𝑁𝑁
𝑛𝑛=1(𝑍𝑍 )
4𝑇𝑇𝑅𝑅 0 ⎢𝑢𝑢𝑅𝑅0 (𝑥𝑥 − 2𝑇𝑇𝑅𝑅 − ∆𝑡𝑡) +⎥ 𝑅𝑅𝑅𝑅

⎣ 𝑢𝑢𝑅𝑅0 (𝑥𝑥 − 3𝑇𝑇𝑅𝑅 − ∆𝑡𝑡) ⎦ It can be see that the data signals transmitted to the
𝑒𝑒 𝑗𝑗𝜔𝜔𝐷𝐷 ∆𝑡𝑡
+ receivers are degraded with the increasing of the bus length
⎡ 𝜋𝜋 ⎤ (23) and the converter number. To decode the data signal correctly,
1 ⎢𝑒𝑒 𝑗𝑗�− 2 �+𝑗𝑗𝑗𝑗𝐷𝐷 ∆𝑡𝑡 +⎥ 4𝑇𝑇𝑅𝑅
= � 𝑢𝑢𝑅𝑅0 (𝑡𝑡)𝑒𝑒 −𝑗𝑗𝑚𝑚𝑚𝑚𝐷𝐷 𝑡𝑡 𝑑𝑑𝑑𝑑 it is necessary to adjust the signal intensity according to the
4𝑇𝑇𝑅𝑅 ⎢ 𝑒𝑒 𝑗𝑗(−𝜋𝜋)−𝑗𝑗𝜔𝜔𝐷𝐷 ∆𝑡𝑡 + ⎥ 0
⎢ 3𝜋𝜋 ⎥ communication circumstance. Thus, perturbation depth δ is
⎣ 𝑒𝑒 𝑗𝑗�− 2 �−𝑗𝑗𝜔𝜔𝐷𝐷 ∆𝑡𝑡 ⎦ proposed to control the communication power.
1 4𝑇𝑇𝑅𝑅 According to (24), the normalized voltage amplitude of the
= (1 + 𝑗𝑗) ∙ sin 𝜔𝜔𝐷𝐷 ∆𝑡𝑡 ∙ � 𝑢𝑢𝑅𝑅0 (𝑡𝑡)𝑒𝑒 −𝑗𝑗𝑚𝑚𝑚𝑚𝐷𝐷 𝑡𝑡 𝑑𝑑𝑑𝑑 2𝜋𝜋
2𝑇𝑇𝑅𝑅 0
data carrier is derived as 𝑘𝑘 ∙ sin 𝜔𝜔𝐷𝐷 ∆𝑡𝑡 . Note that 𝜔𝜔𝐷𝐷 =
𝑇𝑇𝐷𝐷
∆𝜑𝜑 ∆𝜑𝜑
The fundamental frequency in (22) is utilized as data carrier and ∆𝑡𝑡 = , so it can be written as 𝑘𝑘 ∙ sin .
2𝜋𝜋𝑓𝑓𝑠𝑠 2
and defined as fD, where fD=fs/2=fR/4. By simplifying (23), the When the power regulator operating in steady state, the
normalized voltage amplitude of the data carrier is equivalent duty cycle de of the converter is constant, then the
4√2 𝜋𝜋𝜋𝜋 data signal intensity is controlled by the phase perturbation
𝐴𝐴𝐷𝐷1 = sin ∙ sin 𝜔𝜔𝐷𝐷 ∆𝑡𝑡 = 𝑘𝑘 ∙ sin 𝜔𝜔𝐷𝐷 ∆𝑡𝑡 (24) ∆𝜑𝜑 ∆𝜑𝜑
𝜋𝜋 4 ∆𝜑𝜑. When ∆𝜑𝜑 is small, sin ≈ , thus the amplitude of the
2 2
𝑘𝑘
It can be seen that due to the phase shift control strategy, a voltage fundamental component can be written as ∙ ∆𝜑𝜑, and
2
data carrier with frequency fD has been introduced. The the amplitude of the data carrier of inductor current can be
normalized amplitude of the frequency component at fD is derived as,
related to time displacement ∆t. The spectrum is shown in
Fig.7 (b). √2sin 𝜋𝜋𝜋𝜋 𝑈𝑈𝑖𝑖 ∆𝜑𝜑
𝐴𝐴′𝐷𝐷 ≈ (26)
Amplitude Amplitude 𝜋𝜋 2 𝐾𝐾T fs 𝐿𝐿

1 1 where Ui is the input voltage and KT is the transformer ratio

of the transformer.
The perturbation angular in a cycle is defined as
0.5 0.5
perturbation depth 𝛿𝛿
∆𝜑𝜑
𝛿𝛿 = (27)
0 0 𝜋𝜋
0 2fs 2*2fs 0 1*fD 3*fD 2fs 5*fD 7*fD 2*2fs
Frequency (KHz) Frequency (KHz) Eqn. (26) demonstrates that the amplitude of the signal
(a) (b) carrier is about proportional to perturbation depth 𝛿𝛿, so the
Fig.7 Spectrum of transformer secondary voltage
intensity of the data signal can be regulated by 𝛿𝛿. However,
(a) without data modulation (b)with data modulation. for the inductor current iL shown in Fig.6, it is necessary to
ensure the perturbed current in continuous mode, it should
C. Data signal intensity control
follow
Transmission Line
𝐼𝐼
ZL ∆𝑖𝑖 < 𝐼𝐼𝐷𝐷𝐷𝐷 − 2𝑅𝑅 . (28)

If the above equation is not satisfied, the inductor current is

forced into discontinuous mode by the phase modulation. In
VT VR this case, the data carrier cannot be superimposed linearly to
iC ZT ZR1 ZR2 ZRN the bus, and it will affect the power regulation.
In continuous mode, the current difference is
Transmitter Receiver1 Receiver2 ReceiverN 𝑈𝑈𝐿𝐿 −U𝑂𝑂 ∆𝜑𝜑
∆𝑖𝑖 = ∗ ∆𝑡𝑡 = ∗ (29)
𝐿𝐿 𝐿𝐿 𝜋𝜋𝑓𝑓𝑠𝑠
Fig.8 Equivalent circuit of signal transmission.
where the output voltage is,
For a DC distributed power system combined with power
line communication, different operation circumstances should D𝑈𝑈𝑖𝑖 (30)
𝑈𝑈𝑂𝑂 = .
K𝑇𝑇
be considered. Considering a system that a transmitter
So
converter is located in one end of the bus and the other D𝑈𝑈𝑖𝑖 ∆𝜑𝜑
receiver converters are located in the other end, the equivalent ∆𝑖𝑖 = ∗ (31)
K 𝑇𝑇 𝐿𝐿 𝜋𝜋𝑓𝑓𝑠𝑠
circuit of the signal transmission is shown in Fig.8, where ZT,
ZL and ZRn are the impedances of the transmitter converter, the According to Eqn. (28)-(31), the limitation of the
transmission line and the receivers respectively, and ic is the perturbation depth is derived,
 𝐼𝐼𝑅𝑅 𝐾𝐾𝑇𝑇 𝐿𝐿𝑓𝑓𝑠𝑠 When δ = 0.15, as the analysis in part III, the amplitude of the
𝛿𝛿 < �𝐼𝐼𝐷𝐷𝐷𝐷 − �∗ (32) perturbation frequency component keeps increasing and
2 𝐷𝐷𝑈𝑈𝑖𝑖
exceeds the amplitude of the switching frequency component.
It can be seen from (31-32) that, the maximum potential The simulation demonstrated is well consistent with the
perturbation depth is limited by the DC current component. It theoretical analysis.
means that, the maximum amplitude of the output data carrier
that the converter can send out has positive linear relationship B. Prototype experiment
with the output power. To verify the proposed method experimentally, a prototype
IV. SIMULATION AND EXPERIMENTAL VERIFICATION system composed of two PSFB converters is setup. The
specification of the converter is listed in TABLE I, and the
In this section, the phase modulation method is simulated photo of a prototype converter is shown in Fig.10.
by PSIM and implemented in a prototype system. Furthermore, TABLE I. Specifications of the prototype converter
data communication is realized between two 1kW converters. Parameter Variable Value/model
Rated Power P 1kW
A. Simulation Input Voltage Vin 100V
Output Voltage Vout 100V
A typical PSFB converter is established in PSIM, which Transformer ratio KT 6:9
complies with the specification listed in TABLE.I. The carrier Inductance L 60uH
frequency is set 100 kHz. The output inductor current with C 470uF
Capacitor
different perturbation depth δ is sampled and the spectrums is ESR 50mΩ
Power MOS S IPW65R037C6
analysed, which are shown in Fig.9. Power Diode D C4D20120D
2
iL(A) Amplitue(A)
20 Power Circuit
1.5
15
1
10

0.5
5

0
Time (us) 200 Frequency (KHz) 400
(a) 0 100

20 i (A) 2
L Amplitue(A)

1.5
15
Output
1
Input
10
0.5

5 0
Time (u s)
(b) 0 50 200 Frequency ( KHz ) 400 Aux Power Control Board
iL(A) 2
Amplitue(A) Fig.10 Photo of the prototype.
20
Two experiments are carried out. The validity of the
1.5
15
perturbation method is verified at first, and then the data
1 decoding algorithm is tested. The verification system structure
10 is shown in Fig.11 (a), and the equivalent circuit of the
5
0.5
communication system is depicted in Fig.11 (b). In this system,
0
one converter operates as a transmitter and the other operates
Time(us)
(c) 0 50 200 Frequency( KHz ) 400
as a receiver, and the output capacitor and its equivalent series
20
iL(A) 2
Amplitue(A) resistor of these converters are CT, CR and Res1,Res2
1.5
respectively. To increase the input impedance of the
15 converters, a small inductor Lc1 and Lc2 with 5µH inductance
1 are added to the output line.
10
Transmitter Transmitter DC Bus
DC Bus
0.5 Lc1
5
PSFB DC
DC Res1 VT
0 Converter A Load
Time(us) 0 50 200 Frequency( KHz ) 400
(d) iC CT Rload
ZL
Fig.9 Simulation result: current waveform and its spectrum
(a) with δ=0, (b) with δ=0.05, (c) with δ=0.1, and (d) with δ=0.15.
Lc2
PSFB Amp
DC
In Fig.9 (a), it is clear that the data carrier frequency 50 kHz Converter B Res2 VR

component does not exist when δ = 0. The current is a triangle CR

Receiver Data transfer Receiver
wave and the dominating harmonic is the 200 kHz
(a) (b)
fundamental component. With the increasing of δ, the Fig.11 Expriment system: (a) structure and (b) communication equivalent
intensity of the data carrier frequency 50 kHz is promoted. circuit.
 1) Perturbation Depth Verification perturbation depth and the amplitude of the data carrier is
In this experiment, converter A sends out 50 kHz harmonics proved.
representing signal ‘1’ continuously, and the inductor current
2) Communication Validity
of the converter is measured by a current probe. On the DC
bus, a voltage ripple amplifier circuit, whose gain is set The communication function is realized and tested based on
35.6dB, is employed to receive the modulated signal. Similar the verification system shown in Fig.11. In the communication
to the simulation process, the waveforms and voltage spectrum system, converter A operates as a transmitter while converter
of the converter with different perturbation depth are recorded B acting as a receiver. The transmitter sends out bit ‘1’ and ‘0’
and analysed in Fig.12, where iL is the inductor current, VSample alternatively, which are represented by the existing and absent
is the output voltage ripple which has been filtered and of the 50 kHz carrier, respectively. In the receiver, the carrier
amplified. is sampled and a sliding discrete Fourier transformation (DFT)
iL
1.0 Amplitude(V) algorithm is employed [22], which is expressed by
(2.5A/div)
N −1 2π
−j
∑ x ( n )e
0.8 nk
=
X (k ) N = (k 0,1,..., N − 1) (33)
0.6 n=0

0.4
where X(k) is the DFT result with kth harmonic, x(n) is a
discrete sequence in a period of DFT sliding window, N is the
VSAMPLE
0.2
sample number in a sliding window. To demodulate the signal,
10μs/div
(2V/div)
only carrier component should be calculated, so k equals to the
Current & Voltage (a) Frequency(10KHZ) carrier period number in a period of sample window Tsp. In
iL
1.0 Amplitude(V) this experiment, Tsp=100us, so k=5.
(2.5A/div)
The waveforms and the bit stream are shown in Fig.14. The
0.8
wire length in the experiment is about 10 meters long. The
0.6 upper figures are the waveform of transmission current and
0.4
0.28V ripple voltage sampled by converter B, and the lower figures
are the sliding window DFT calculation results. The amplitude
VSAMPLE
0.2
of the DFT result represents the received signal voltage, or the
(2V/div)
10μs/div intensity of the data carrier.
Current & Voltage (b) Frequency(10KHZ) Based on the DFT algorithm illustrated above, the existence
iL 1.0 Amplitude(V) or absence of the carrier is determined by comparing with a
(2.5A/div)

0.8
0.77V threshold, thus data can be decoded. A 5kbps communication
is realized with the proposed method. In addition, it can be
0.6
seen that, by modulating the perturbation depth, the signal
0.4 intensity is regulated.
Waveform(δ = 0.04) Waveform(δ = 0.16)
0.2
VSAMPLE VSAMPLE VSAMPLE
(2V/div) (2V/div) (2V/div)
10μs/div

Current & Voltage (c) Frequency(10KHZ)

Fig.12 Experiment result: waveform and spectrum, (a) with δ=0, (b) with δ=0.04, and
“1” “0” “1” “0” “0” “1” “0” “1”
(c) with δ=0.11.
iL iL
TABLE II. Comparison of simulation result and experiment result (2.5A/div) (2.5A/div)
Simulation Experiment 100μs/div 100μs/div
0.8V
δ Amplitude P.U. δ Amplitude P.U. Data decoding (δ = 0.04) 0.8V Data decoding (δ = 0.16)

0 0 0 0 0 0 0.6V
0.6V
0.05 0.6 0.25 0.04 0.27 0.2 “0” “1” “0” “1”
0.10 1.16 0.48 0.11 0.77 0.57 0.4V
0.4V
0.15 1.71 0.71 0.16 1.05 0.78
“1” “0” “1” “0”
0.9 0.2V
0.2V
0.8 Amplitude
P.U. value
0.7 0
0 0.2 0.4 0.6 0.8 t/ms 0 t/ms
0.6 0 0.2 0.4 0.6 0.8

0.5 (a) (b)

0.4 Fig.14 Data decoding result: (a) with δ=0.04, and (b) with δ=0.16.
0.3
0.2
Simultaion 3) Impact on conversion efficiency
Experiment
0.1 As shown in Fig.12 and Fig.14, the harmonics of the output
0
0 0.05 0.1 0.15 δ
current is enhanced with the increase of perturbation depth.
This phenomenon raises the concern about the conversion
Fig.13 Comparison of simulation result and experiment result. efficiency of the circuit.
The results of simulation and prototype experiments are In the experiment, data is transmitted under different
summarized in TABLE II and depicted in Fig.13. From the perturbation depth, the efficiency of the converter is measured
comparison, the approximately linear relationship between the by an accurate power analyser (YOKOGAWA WT3000) and
the result is shown in Fig.15. It shows that, by the nature of B. In the experiment, set δ = 0.16, then the maximum value of
introducing a new harmonics, the efficiency of the converters the DFT result at site B increases to 0.072V, by which the data
decreases slightly. It should be noted that, even though the can be recognized.
efficiency loss caused by data modulation is less than 0.3%, it These results show that the proposed method can regulate
may not be acceptable for some applications. the data carrier amplitude, which is a favourable feature in
96.50%
Efficiency applications.
From the view of open system interconnection (OSI) model,
96.00% the proposed method realizes bit-level communication in
physical layer. To implement the communication system
95.50% practically, media access control (MAC) layer should be
employed. In this layer, many strategies such as master/slave
95.00% δ = 0.11 mode and token ring protocol are the candidates. The
δ = 0.04 master/slave mode is a simple method, but it has the drawback
94.50% δ=0
that if the master converter fails, the whole system will break
down. To solve this problem, an improved master/slave mode
94.00%
0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 strategy can be employed. In this method, a master converter
Power(kW) dominates the communication channel and communicates with
Fig.15 Efficiency comparison with different perturbation depth. the slaves in turn. However, the master converter is not
4) Influence of the transmission line predetermined by address, but dynamically determined by
With the transmission length extended longer, the amplitude competition according to the output current, that means the
of the data signal is attenuated. In this experiment, the distance master is always the converter which sends out maximum
between the two PSFB converters is extended to 100 meters. current. According to this strategy, if the master converter fails,
The cable is a stranded copper wire with 4mm2 cross-sectional the converter with second-maximum output current will
area. The loop resistor of the cable is 1.8Ω and the inductance become a new master automatically. In this way, the failure of
is about 57µH, so the impedance at 50kHz is about 18Ω. As the master converter won’t influence the validity of the
shown in Fig.11(b), with a 5µH inductor connected in series, communication system. More details about communication
the input impedance of the converter at 50kHz is about 1.6Ω. protocols are beyond the scope of this paper and are not be
According to Eqn. (25), the attenuation rate from the discuss here.
transmitter to the receiver is about 0.08. V. CONCLUSIONS
The waveforms sampled and decoded in converter A (the
transmitter) and converter B (the receiver) are shown in Fig.16. This paper presents an improved DC power line
When δ = 0.04, maximum value of the DFT result at converter communication approach implemented using the power/signal
A is about 0.24V, which is consistent with the result dual modulation in PSFB converters. Comparing with the
previously. Meanwhile, the maximum value of the DFT result conventional PLC solutions, this method has the advantages of
calculated in converter B is about 0.02V due to signal embedding the communication in the power conversion circuit
attenuation, as shown in Fig.16 (a). In this case, signal is so without using extra wiring and coupling units, and a simplified
small that it is hard to be recognized. system structure. These advantages are attained by introducing
0.8V 0.20V
DFT result at A (δ = 0.04) DFT result at B (δ = 0.04)
a phase-based freedom in conventional power control loop of
0.6V 0.15V a PSFB converter. In addition, with the proposed perturbation
depth, the signal intensity in this method can be regulated to
0.4V 0.10V adapt to different operating conditions. The testing of the
proposed method has been performed in a 2kW prototype
0.2V 0.05V 0.02V system, where a 5kbps communication link is implemented
and the method is verified.
0 0
(a)
Although the proposed method provides a low-cost
DFT result at A (δ = 0.16) DFT result at B (δ = 0.16) approach to meet the communication need in a DC-DPS, it has
0.8V 0.20V
constraints in the following aspects. First, the data carrier
0.6V 0.15V signal can only be injected upon the output line of a converter
with this method. For a DC-DPS consisting of both generation
0.4V 0.10V
0.07V converters and load converters, only the generation converters
can send out information. Second, the communication may be
0.2V 0.05V influenced by current harmonics happen to have the same
frequency with the data carrier, produced by any converter
0 0 connected to the bus. So this method is more suitable for the
(b) DC-DPS applications that all the converters are
Fig. 16 Signal attenuation on 100m transmission line: (a) with δ=0.04, and (b)
with δ=0.16. preconditioned.
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communication with dc bus voltage restoration and enhanced current
sharing accuracy,” IEEE Trans. Power Electron., vol. 29, no. 4, pp. Zhengyu Lin (S’03–M’05–SM’10) received the
1800–1812,Apr. 2014. B.Sc.and M.Sc. degrees from the College of
[18] V. Kounev, D. Tipper, B. M. Grainger and G. Reed. “Analysis of an Electrical Engineering, Zhejiang University,
offshore medium voltage DC microgrid environment part II: Hangzhou, China, in 1998 and 2001, respectively,
Communication network architecture,” In Proc IEEE/PES Trans. Distrib. and the Ph.D. degree from Heriot-Watt University,
Conf. Expo. (T&D). Apr. 2014. Edinburgh, U.K.,in 2005. He is currently a Lecturer
[19] Y. Li, F. Liu, L. Lyo, C. Rehtanz, and Y. Cao, “Enhancement of in Electrical, Electronic and Power Engineering with
commutation reliability of an HVDC inverter by means of an inductive Aston University, Birmingham, U.K. He was a
filtering method,” IEEE Trans. Power Electron., vol. 28, no. 11, pp. Research Associate with the University of Sheffield
4917–4929, Nov. 2013. from 2004 to 2006, an R&D Engineer with Emerson Industrial Automation,
[20] A. Pinomaa, J. Ahola, and A. Kosonen, “Power-line communication Control Techniques PLC from 2006 to 2011, a Senior Research Scientist with
based network architecture for LVDC distribution system,” in Proc. 2011 Sharp Laboratories of Europe Ltd. from 2011 to 2012, and a Lecturer with
IEEE Int. Symp. Power Line Commun. Appl. (ISPLC), Udine, Italy, pp. Coventry University from 2013 to 2014. His research interests include power
358–363. electronics and its applications in renewable energy, energy storage, motor
[21] A. Pinomaa, J. Ahola, and A. Kosonen, “PLC concept for LVDC drives and power systems.
distribution systems,” IEEE Commun. Mag., vol. 49, no. 12, pp. 55-63,
Dec. 2011.
 Xiangning He (M’95--SM’96--F’10) received the
B.Sc. and M.Sc. degrees from Nanjing University of
Aeronautical and Astronautical, Nanjing, China, in
1982 and 1985, respectively, and the Ph.D. degree
from Zhejiang University, Hangzhou, China, in
1989.
From 1985 to 1986, he was an Assistant
Engineer at the 608 Institute of Aeronautical
Industrial General Company, Zhuzhou, China. From
1989 to 1991, he was a Lecturer at Zhejiang
University. In 1991, he obtained a Fellowship from the Royal Society of U.K.,
and conducted research in the Department of Computing and Electrical
Engineering, Heriot-Watt University, Edinburgh, U.K., as a Post-Doctoral
Research Fellow for two years. In 1994, he joined Zhejiang University as an
Associate Professor. Since 1996, he has been a Full Professor in the College
of Electrical Engineering, Zhejiang University. He was the Director of the
Power Electronics Research Institute and the Head of the Department of
Applied Electronics, and he is currently the Vice Dean of the College of
Electrical Engineering, Zhejiang University. His research interests are power
electronics and their industrial applications. He is the author or co-author of
more than 280 papers and one book “Theory and Applications of Multi-level
Converters”. He holds 22 patents.
Dr. He received the 1989 Excellent Ph.D. Graduate Award, the 1995 Elite
Prize Excellence Award, the 1996 Outstanding Young Staff Member Award
and 2006 Excellent Staff Award from Zhejiang University for his teaching
and research contributions. He received seven Scientific and Technological
Achievements Awards from Zhejiang Provincial Government and the State
Educational Ministry of China in 1998, 2002, 2009 and 2011 respectively, and
six Excellent Paper Awards.
Dr. He is a Fellow of The Institute of Electrical and Electronics Engineers
(IEEE) and has been appointed as IEEE Distinguished Lecturer by the IEEE
Power Electronics Society in 2011. He is also a Fellow of the Institution of
Engineering and Technology (formerly IEE), U.K.