This article has been accepted for publication in a future issue of this journal, but has not been

fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2018.2846618, IEEE
Transactions on Power Electronics

A Sinusoidal Pulse Width Modulation (SPWM) Technique

for Capacitor Voltage Balancing of Nested T-Type
Four-Level Inverter
Ahoora Bahrami, Student Member, IEEE, Mehdi Narimani, Senior Member, IEEE

Abstract— In this letter, a new control method based on of the new topologies are combinations of the main
sinusoidal pulse width modulation(SPWM) scheme is classic topologies which tries to eliminate or mitigate the
proposed to control capacitor voltages of a four-level T- disadvantages of the classic topologies. A various number
type NNPC inverter. Four-level T-type NNPC inverter of these new multilevel topologies are being used in
has a lower number of switches and components compare industry; five-level H-bridge NPC (5L-HNPC), the three-
with other four-level classic and advanced inverters level active NPC (3L-ANPC), and the five-level active
which make this topology attractive for high-power NPC (5L-ANPC).
medium-voltage applications. This topology has been The H-bridge connection of two classic 3-level NPC
proposed and studied with the assumption of constant dc presents a 5-Level HNPC converter that can operate at
sources instead of flying capacitors. In this letter, a higher voltage levels than a conventional NPC converter.
simple single-phase modulator is developed to balance However, this topology needs a number of isolated dc
flying capacitor voltages. Performance and the feasibility sources provided by a bulky and expensive phase-shifting
of the proposed control technique are evaluated transformer [5]-[7]. One of the disadvantages of NPC
experimentally at steady-state and transient conditions converter is the unequal losses between the inner and
and for different modulation indices and loads. The outer switching devices.
experimental results demonstrate the effectiveness of the A 3-level active NPC (ANPC) is a topology that
developed control method to control the capacitors’ clamping switches are replaced with clamping diodes and
voltages. provide a controllable path for neutral current and thus
loss distribution between switches is balanced [8]-[11].
Keywords— Multilevel Converters, capacitor voltage However, the number of active switches is increased
balancing, T-type structure, sinusoidal pulse width compared to a conventional NPC converter which
modulation (SPWM) increases the cost of producing the converter and
decreases the reliability of the converter.
I. INTRODUCTION 5- level active NPC, which can generate a higher
Multilevel inverters are very attractive and commonly number of levels and improve the output voltage quality,
used for high-power medium-voltage applications [1]-[2]. is a combination of 3-level ANPC and 3-level FC.
Neutral-point clamped (NPC) converter, flying capacitors However, in a 5-level ANPC voltage rating of the
(FC) converter and the cascaded H-bridge (CHB) switches are different [12]-[14]. A four-level nested
converter are classical multilevel converters [3]. However, neutral point clamped (4L-NNPC) converter is presented
these classic topologies have some disadvantages which in [15]-[16]. This topology has a fewer number of
limit their applications. For NPC topologies, voltage components compared to the existing topologies.
balancing of the dc-link capacitors is a challenge Recently, a new four-level T-type NNPC has been
especially for a higher number of levels. The number of proposed in [17], shown in Fig,1. The Nested T-Type
clamping diodes also increases significantly with the four-level NNPC is very attractive for high-power and
higher number of levels. For FC topology, the higher medium-voltage applications due to the lower number of
switching frequency is needed in order to keep the devices as compared with other 4-level topologies in
capacitor voltages balanced. Also, FC topology in a Table I.
higher number of levels has a higher number of
capacitors which reduces the reliability and lifetime of the TABLE I: COMPARISON NUMBER OF DEVICES AMONG DIFFERENT
converter. Cascaded H-bridge has a modular structure TOPOLOGIES
which can get higher voltages and number of levels with Number Number of Number of
increasing the number of cells. However, CHB topology Topology of clamping flying
needs several isolated dc sources provided by a bulky, switches diodes capacitors
expensive phase-shifting transformer. The number of
NPC 18 18 -
switches in CHB topology increases significantly in a
FC 18 - 9
higher number of output levels [1]–[3].
NNPC 18 6 6
Advanced multilevel topologies have been presented
T-Type NNPC 18 - 6
and some of them have been manufactured [4]-[15]. Most

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Transactions on Power Electronics

Sa1 Sb1 Sc1

Vdc
2
Ca1 Sa2 Cb1 Sb2 Cc1 Sc2
Sa6 Sb6 Sc6
iA VA iB VB iC VC

Sa5 Sb5 Sc5

Ca2 Sa3 Cb2 Sb3 Cc2 Sc3
Vdc
2

Sa4 Sb4 Sc4

Fig. 1. Nested T-type four-level nested neutral point clamped (T-NNPC) Inverter [17]

As can be seen from the Table I, T-type NNPC has direction of the output current. As shown in Table II,
lower number of components and thus the size, weight, level 2 and level 3 have two redundant switching state
cost, and reliability of the converter has been improved which generates medium voltage level 1/6Vdc and -1/6Vdc
compared to the existing four-level topologies The respect to the mid-point of the dc source.
operation of the inverter is studied in [17], with Each of these redundant switching states has a specific
assumption of constant dc sources instead of flying charging and discharging effect for each flying capacitor.
capacitors, which is not practical. In practice, the flying The method for controlling the capacitors’ voltages is
capacitors are employed instead of dc sources, so a more based on choosing the best redundant switching state
sophisticated control method is required to regulate the which makes the capacitor charge or discharge to the
flying capacitor voltages. In this letter, a new control desired voltage which is one-third of total DC-link
method based on sinusoidal pulse width Modulation voltage.
(SPWM) is developed to control and balance the voltages
III. SINUSOIDAL PULSE WIDTH MODULATION FOR A
of flying capacitors at the desired voltage level and thus
T-TYPE NNPC CONVERTER
the T-type NNPC can operate properly at different
operation conditions. Capacitor voltage balancing of a T-Type NNPC
The performance of the developed control strategy converter is a technical challenge to make sure that the
is studied in the MATLAB/Simulink environment and converter can operate properly under different operating
verified experimentally at steady-state and transient conditions. If there is no control, the flying capacitors
conditions and for different modulation indices. will be charged or discharged during the converter
In Section II, the T-type NNPC operation is operation and the capacitors’ voltages will deviate from
explained briefly and then sinusoidal pulse width the desired values and thus the converter cannot generate
modulation will be used to control flying capacitor a four-level output voltage. In this Section, a new control
voltages. In Section III, the proposed control technique is technique based on SPWM scheme is explained.
developed. In Section IV, the feasibility and performance The deviation of the capacitor voltages from the desired
of the proposed controller are verified experimentally. value (Vdc / 3) can be written as:
Vdc
II. OPERATION OF THE NESTED T-TYPE NEUTRAL VC xi  VC xi 
3
POINT CLAMPED INVERTER
A four-level T-type NNPC topology is a x  a, b, c i  1, 2
combination of a flying capacitor topology and a T-type
In order to balance the capacitor voltages, ΔVCXi (x=a,b,c,
inverter [17]. The capacitor Cx1 and Cx2, x = a,b,c are
i=1,2) should be zero or close to zero at all operating
charged to one-third of the total DC-link voltage. Six
conditions. If the voltage deviation is positive, a
switching states can generate four output voltage levels as
switching state should be selected to discharge the
can be seen in Table II. A controllable current path is
capacitor and if the deviation is negative, the switching
provided by the bidirectional switches to control the
state should be selected to charge the capacitor.

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2018.2846618, IEEE
Transactions on Power Electronics

TABLE II: SWITCHING STATES OF THE T-TYPE FOUR-LEVEL INVERTER AND CONTRIBUTION OF THE AC-SIDE CURRENTS TO THE FLYING CAPACITOR
VOLTAGES
Output
Sx1 Sx2 Sx3 Sx4 Sx5 Sx6 VCx1 VCx2 Vxn State
Level
𝑉𝑑𝑐
1 1 0 0 1 0 No Impact No Impact 3 3
2
Charging (ix>0)
1 0 0 0 1 1 No Impact 2B
Discharging (ix < 0) 𝑉𝑑𝑐
2
Discharging (ix > 0) Discharging (ix > 0) 6
0 1 0 1 1 0 2A
Charging (ix < 0) Charging (ix< 0)
Charging (ix >0) Charging (ix > 0)
1 0 1 0 0 1 1B
Discharging (ix < 0) Discharging (ix < 0) 𝑉𝑑𝑐
− 1
Discharging (ix > 0) 6
0 0 0 1 1 1 No Impact 1A
Charging (ix< 0)
𝑉𝑑𝑐
0 0 1 1 0 1 No Impact No Impact − 0 0
2

TABLE III: THE PROPOSED VOLTAGE CONTROL METHOD

Output
ix ΔVCX1 ΔVCX2 Condition State
Level
≥0 - 1A
≥0
<0 - 1B
≥0 |ΔVCX1|< |ΔVCX2| 1A
≥0
<0 |ΔVCX1|> |ΔVCX2| 1B
<0 - 1B
1
≥0 - 1B
≥0 |ΔVCX1|< |ΔVCX2| 1A
<0
<0 |ΔVCX1|> |ΔVCX2| 1B
≥0 - 1B
<0
<0 - 1A
≥0 - 2A
≥0
<0 - 2A
≥0 |ΔVCX1|< |ΔVCX2| 2A
≥0
<0 |ΔVCX1 |> |ΔVCX2| 2B
<0 - 2B
2
≥0 - 2B
≥0 |ΔVCX1|< |ΔVCX2| 2A
<0
<0 |ΔVCX1 |> |ΔVCX2| 2B
≥0 - 2A
<0
<0 - 2A

However, as it can be seen from Table II, for some

switching states, capacitors of a phase are jointly charged For instance, when the output voltage level is 1, and
and discharged which is a challenge for controlling the
ix  0 , VC x1  0 , VC x 2  0 , both capacitors needs to
capacitor voltages. For example, assuming the voltage
level is 1, if the deviation for C1 is positive and the be charged and thus switching state 1B should be
deviation of C2 is negative, and the output current is selected.
larger than zero, choosing 1A will charge C2 toward the The flowchart shown in Fig. 2 shows the procedure to
the desired value but also it charges C1 more, and control voltage of flying capacitors in each phase:
deviation for C1 will increase, which is not desirable.  First, by comparing carriers (three carriers for a
To solve this problem, Table III is developed that four-level converter) and the modulation signal,
shows the procedure of selecting the best switching state desired output voltage level is determined.
to balance the capacitors voltages at desired values. For  The direction of the phase currents and capacitor
level 0 and 3, there is no redundant switching state and voltages should be measured.
these two levels do not affect the capacitor voltages.  Based on the output voltage level, the current
However, for level 1 and 2, there are redundant switching direction and capacitor voltage deviations, proper
states and based on the current direction and voltage switching state will be selected from Table III.
deviation of the capacitors, the best switching states will  And finally, the gate signals are generated and
be selected from Table III. applied to the switching devices.

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2018.2846618, IEEE
Transactions on Power Electronics

Modulating Signals
vm Vab

PWM
Modulator

3
Reference 2
PWM 1
0

ia, ib, ic
vCa1, vCa2 ... Flying Capacitor (measured)
(measured) Voltage Balancing Control (a) inverter output line voltage and output currents
(Table II) (200V/div, 10A/div, 10ms/div)

Gate Signal Generation

•••• ••••
To switching devices
Fig. 2. Block diagram of capacitor voltage balancing control Vca1 Vca2 Vcb1 Vcc1

IV. EXPERIMENTAL RESULTS

The feasibility of the proposed control technique
based on SPWM scheme is evaluated experimentally.
The parameters shown in Table IV are used to obtain the
experimental results from a scaled-down prototype. (b) voltages of flying capacitors (50V/div, 10ms/div)
Fig. 3 to 6 show the performance of the proposed Fig. 3. Experimental results, m = 0.9 and PF=0.9.
control technique under steady-state and transient
conditions. Fig. 3 shows the inverter output voltage,
output currents and flying capacitor voltages where Vab
modulation index m = 0.9 and load PF=0.9. The inverter
output voltage THD is 24.7%. Fig. 4 also shows the
inverter output voltage, output currents and flying
capacitor voltages where modulation index m = 0.55 and
load PF=0.9. The inverter output voltage THD is 40.7%.
Fig. 5 shows the performance of the converter when
modulation index changes from m=0.55 to m=0.9.
Fig. 6 shows the performance of the controller when
the controller is deactivated and activated. Without the
controller, capacitors start to diverge and when the
controller activated, the capacitor will be converged. As (a) inverter output line voltage and output currents
can be seen from Figs. 3 to 6 show the effectiveness of (200V/div, 10A/div, 10ms/div)
the proposed controller and demonstrate that all capacitor
voltages are well balanced at different operating
conditions.

TABLE IV: PARAMETERS OF THE STUDY SYSTEM Vca1 Vca2 Vcb1 Vcc1
Converter parameters Values
Converter rating (kVA) 5
Capacitor Value (µF) 2200
Input dc voltage (V) 320
Output frequency (Hz) 60
Output inductance (mH) 5 (b) voltages of flying capacitors (50V/div, 10ms/div)
Output load (Ω) 12 Fig. 4. Experimental results, m = 0.55 and PF=0.9.

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2018.2846618, IEEE
Transactions on Power Electronics

controller is based on SPWM technique, is very simple to

Vab implement. The feasibility of the proposed control
technique is evaluated by simulation studies and
experimentally. The results demonstrate the effectiveness
of the proposed technique.
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