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8-To-1 MUX

The document describes an 8-to-1 multiplexer circuit. It has 8 input lines (D0-D7), 3 select lines (S2, S1, S0), and 1 output line (Y). The value on the output line depends on the values of the select lines, which determine which input line is passed to the output. A truth table is written with the 8 possible combinations of select line values and their corresponding output values. The output equations are then determined using K-maps and indicate that the output is the logical OR of the input lines and their complemented select line values.

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100% found this document useful (2 votes)
4K views3 pages

8-To-1 MUX

The document describes an 8-to-1 multiplexer circuit. It has 8 input lines (D0-D7), 3 select lines (S2, S1, S0), and 1 output line (Y). The value on the output line depends on the values of the select lines, which determine which input line is passed to the output. A truth table is written with the 8 possible combinations of select line values and their corresponding output values. The output equations are then determined using K-maps and indicate that the output is the logical OR of the input lines and their complemented select line values.

Uploaded by

Mahija
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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8-to-1 MULTIPLEXER

We know that a 2n X 1 mux has 2n inputs and n select lines.

Here 2n = 8

2n = 23, therefore n=3

So in 8-to-1 mux we have 23 i.e. 8 input lines and 3 select lines and of course one output line.

D0

D1

D2

D3
8 to 1 Y

D4

D5
MUX
D6

D7

S2 S1 S0

While designing any combinational circuit, we will follow certain steps and the steps are:
1) Define the functionality and design the truth table
2) With the help of K-maps, get the equations for the outputs
3) Once we write the equations, we can design the circuit accordingly

We know that output of multiplexer depends on select lines but not on input lines. If
selection line value is 0, i.e. 000, the value at zero th port i.e. the value on D0 will appear at the
output. If selection line value is 7, i.e. 111, the value on D7 will appear at the output and so
on….. This way, the output here depends on select lines, so on the input side we take select lines
rather than input lines while writing truth table.

Mahija Dandanayakula
As we have three select lines, we have eight possible combinations

S0 S1 S2 Y
0 0 0 D0

0 0 1 D1

0 1 0 D2

0 1 1 D3

1 0 0 D4

1 0 1 D5

1 1 0 D6

1 1 1 D7

The next step in designing the combination circuit is to write the equations for outputs in
truth table using k-maps.

Y = D0 S0| S1| S2 | + D1 S0| S1 | S2 + D2 S0| S1 S2| + D3 S0| S1 S2 + D4 S0 S1| S2|


+D5 S0 S1| S2 + D6 S0 S1 S2| + D7 S0 S1 S2

Mahija Dandanayakula
Y = D0 S0| S1| S2 | + D1 S0| S1 | S2 + D2 S0| S1 S2| + D3 S0| S1 S2 + D4 S0 S1| S2|
+D5 S0 S1| S2 + D6 S0 S1 S2| + D7 S0 S1 S2

S2 S1 S0

2
D0 3
1
4
5

2
D1 3
1
4
5

2
D2 3
1
4
5

2
D3 3
1
4
5
Y

2
D4 3
1
4
5

2
D5 3
1
4
5

2
D6 3
1
4
5

2
D7 3
1
4
5

Mahija Dandanayakula

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