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28 C 64

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0% found this document useful (0 votes)
163 views8 pages

28 C 64

Uploaded by

Chipyto
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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www.DataSheet. in cea Te any aed PRELIMINARY INFORMATION 64K (8K x 8) CMOS Electrically Erasable PROM FEATURES Fast Read Access Timo — 150 ns High Performance CMOS Technology for Low Power Dissipation — 100 4A Standby = 90:mA Active = Fast Byte Write Time — 200 ys or 1 ms = High Endurance 105 Erase/Write Cycles = Automatic Write Operation = Internal Control Timer — Auto-Clear Bofore Write Operation = On-Chip Address and Data Latches DATA Polling Ready/BUSY (Open Drain) Chip Clear Function Enhanced Data Protection = Veo Detector — Power-Up Timer — Tracking Data Retention > 10 years 5-Volt Only Operation JEDEC-Approved Byte-Wide Pinout = 28-Pin OP. = 32-Fin LOC/PLOC. ‘= Full Commercial and Industrial Temperature Ranges ° to +70°C Commercial (28064) to +85°C Industral (280841) © Also available in military temperature range = -55° to +125°C Military (28C64MR) PIN NAMES ‘Ag=Ay | ADDRESSES CE | CHIPENABLE GE __| OUTPUTENABLE WE | WAITE ENABLE, VOy-VO, | DATAINPUTS/OUTPUTS RDY/BUSY | READY/BUSY NG___| NO CONNECT PIN CONFIGURATION Top View rovagy clei 281 Yoo er a7 DWE ada 2sbnc as 25bhe ass 24bay as 23Bay AsQ7 26c6q §=225E Agta CEM a1 aig Ao 20 CE roq10 wf, Wp 11 18 Flv, wo; 12 17 Bos Wo, C13 16 voy Ves C14 15 Avo. "©1986 General Instrument Corporation DSTTTOSAA cesar Secs — www. DataSheet. in DESCRIPTION ‘The General Instrument 28664 Is a low-power, high= performance 8,192 x 8 bit non-volatile Electrically Erasable and Programmable Read Only Memory with Popular, easy to use features. The device Is manufac- tured with General instrument's advanced and relia- ble non-volatile GMOS technology. ‘The 28C64s accessed like a static RAM for the read or write cycles without the need of external compo- nents. During a “byte write”, the addross and data are latched internally, freeing tne microprocessor address and data bus for other operations. Following the inti- of write cycle, the device will go to a busy state and automatically clear and write the latched data Using an internal control timer, ‘To determine when the write cycle is complete, the user has a choice of monitoring the Ready/Busy out- ut or using DATA polling, The Ready/BURY pin is an ‘open drain output, which allows easy configuration in, wired-or systems. Alternatively, DATA polling allows the user to read the location last written to when the write operation is complete, ‘The 28C64 operates from a single SV supply and is packaged In standard JEDEC-approved packages. All necessary programming voltages are internally ‘generated and timed, ‘The CMOS technology offers fast access times of 150 ns (28C64-15) at low power dissipation of 30 mA. When the chip is desolected, the standby current is. less than 100 A, The 28C64's fast memory access time allows for direct polling with microprocessors, without walting DATAINPUTOUTPUT a ‘ k $ é sot ‘ eos 8 teen] | ltt FUNCTIONAL BLOCK DIAGRAM 28C64 ee www.DataSheet. in bears Ouest oe DEVICE OPERATION The General Instrument 28664 has four basic modes, of operation — read, standby, write inhibit, and byte write — as outlined in the following table. moor —— ce OE we vo Ray/Baay READ L L H Dour H STANDBY H x x High Z H WRITE INHIBIT H x x High H WRITE INHIBIT x L x = 4 WRITE INHIBIT x x H = H BYTE WRITE L H L Dw L BYTE CLEAR ‘Aulomalie Before Each "Wit Note 1: Open Drain Output READ MODE ‘The 28C84 has two control functions, both of which, must be logically satisfied in order to obtaln data at the outputs, Chip Enable (CE) Is the power control and should be used for device selection. Output Enable (OF) is the output control and Is used to gate data to the output pins independent of device selec- tion. Assuming that addresses are stable, address 40085 time (tac) fs equal to the delay from CE to ‘output (tcc). Data is avallable at the outputs toe after the falling edge of OE, assuming that CE has been low and addresses have been stable for at least trcertos. STANDBY MODE “The 28064 is placed in the standby mode by applying ‘ahigh signal tothe CE input. When inthe standby mode, the outputs are ina high impedance stato, independent ofthe OE input DATA PROTECTION In order to ensure data integrity, especially during critical power-up and power-down transitions, the following enhanced data protection clrcults are Incorporate Firat, an internal Vgg detect (8.8 volt typical) will Inhibit the inilation of a non-volatile programming ‘operation when Voc sess than the Veo dtectcirult trip. In addition, on power-up an intr iar (5 ms typical) wil innibit the recognition of any program ‘operation. During tis period, all normal read func- {Tone wil be operational After both tho Ve detoction ‘andthe internal timer have elapsed, normal pro= ‘gramming operation can be performed. ‘Second, there is a WE fitering circult that provents ‘WE pulses of les than 20 ne duration from iliating awit cycle. Third, holding WE or GE high, or GE low, Inhibits @ wnt oye during power-on and power-ot (Vee) WRITE MODE “The 28064 has a write cycle similar to that of a Static RAM. The write cycle is completly sell-timed and initiated by a low going puise on tho WE pin. On the falling edge of WE, the address information Is latched. On the rising edge, the data and the control pins (CE and OE) are latched, The Ready/Busy pin goes to a logic low evel indioating that the 28C54 is In a write eyole which signals the microprocessor host thatthe system bus i free for other activity. When Ready/ Busy goes back to a high, the 28C64 has completed writing'and Is ready to accept another cycle, ‘DSIT108A-S www.DataSheet. in GENERAL INSTRUMENT G ao DATA POLLING ‘The 28064 features DATA Polting to signal tho com- __toor read fromin the same manner asthe regular pletion of a byte write cycle, During a write oycle, an memory array, attompted read of the last byte writtn results in the data complement of /O, (V/Op 0 1/0¢ ae Indeter- ‘minable). After completion of the write cycle, true OPTIONAL CHIP CLEAR es ‘compare operation to determine the status of the chip raising OE to 12 volts and bringing the WE and CE. inating the need for external hardware. low. This procedure clears all data. DEVICE IDENTIFICATION RETENTION ENDURANCE {An extra row of $2 bytes of EEPROM memory Is Read retention for data writin into the 28C64 is avalable tothe user for device Identification. By greater than 10 years, with up to 108 write cyctes. ralsing A8 to 12V 0.5V and using address locations ‘There Is no limi to the rumbor of times date may ‘FEO to 1FFF, tho additional bytes can be written be read, ELECTRICAL CHARACTERISTICS ‘Absolute Maximum Ratings ‘Temperature under Blas .... Storage Temperature. -50°C to +95°O) ~65°C to H125°C. +111 “f0°C to 485°C (Industria Mee ase weisdiv@nad ccc eee g All Output Voltages with Respect to Ground...........csscssesenee Voc +0.6V to -0.6V Gast an SE it Rea SSS Sar Note: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the . tress rating only and functional operation of the device at these or any other conaitions ‘above those indicated in the operational sections of this specification is not implied. Exposure to absolute ‘maximum rating conditions for extended periods may affect device reliability DC CHARACTERISTICS 28084 T,=0°C to +70°C, Veo = SV #10% unless otherwise specified. 280641 T= ~40°C 10 +85°C, Voc = SV £10% unless otherwise specitled, SYMBOL PARAMETER | MIN | MAX| UNITS | CONDITIONS i Input Leskage Curent 10 | 4A _|-04 10 Vesit iho Output Leakage Current 10 | wa [0s to Vesta is Vee Current Standby 100 | uA | CE = Voc-08 toVogtt 2 | ma |CE=Ve(ct Horo) 3 mA_| TE = Vix (-40°C to +85°O) ies Veg Curent Aclve 30_| _ma_[f=1 Me Ve Input Low Voltage or 408 [— v Vor Input High Votage 20 | Veo! |v Vou Output Low Votiage 45_| Vv Von ‘Output High Vortage 2a v Ostt08A-4 www.DataSheet. in ces NS 28064 B SUG as AC CHARACTERISTICS — READ CYCLE acess [2ncsa-20 | 2ace428 Test symeo. | paRaMeTeR _[ MINTMAX]MIN|MAX|MIN|MAX | UNITS | CONDITIONS taoot")__| Address to Output Delay 180 200 250 ns_ | OE=CE=vy, toe GE to Output Delay 180 200 250 ns | OE=vy toe GE to Output Delay 70 80 120 | ns | CE=V ‘tort@) | OE High to. o | 60/0/85 | 0 | 70 ns | CE=Vy, Output Foat ton ‘Output Hold from_ 0 70 70 | ns [CE Adaress, CE or OF, whichever occurred it gg ADDRESS ADDRESS VALID CE oe DATA Notes: 1. OE may be delayed up to tacc ~ toe after the falling edge of CE without impact on taco, de 2, This parameter is only sampled and is not 100% tested. SB 23. tors opoctiod from OE to GE, whlonover ocours frst DSTTT08A-S T/L www.DataSheet. in bei 7 28C64 ss Ste) sae ———— AC CHARACTERISTICS — BYTE WRITE. ‘SYMBOL | PARAMETER win [_wax_ [owt [comments tis | Adress, Setup Time 10 nm tu | Adress, Hold Tine = m7 two | Waite Pulse Wath 100_| 1000 [ ne | “> ‘on | Data Setup Timo » 1 tox | Data Hold Time 10 a8 tos | “Time to Devo Busy | ns torn OE Hold Time 10. ns toes OE Setup Time 10 ns. Swe | Wait Gye Time paced + | me | ryptcaty 05 me 20054F #00_[ 18 | Typlealy 1000 Note 1 ys extended more than the maximum limit ata must be held valé throughout he write oye, ‘ADDRESS 4 — We ae tan 7 ‘we ———» ton tos —>} DATAIN 1 toes. OE toe novieusy —___| ‘oe ‘+ Wwe. AC TESTING, INPUT AND OUTPUT WAVEFORMS ev : 20 ACMEASURENENTS, AC OFWING eves eves oa oasy ‘RF <20n8 AC testing inputs are driven at 2.4V AC for a Logic 1 and 0.45V for a Logie 0, Timing measurements are made at 20V for a Logic 1 and 0.8V for a Logic 0. Dsi11088-6 GENERAL VO Sess 28064 CHIP CLEAR ‘SUPPLEMENTARY CONTROL MODE, ca OE WE A Veo VO, Chip Clear Vie Vu x Noo re) Extra Row Read Vi Vu Vin | A®=Va | Voc Data Out Extra Row Write Vow A9=Vu | Veo Data in Vu= 12.0 + 08 volts, Coin) [ttt www.DataSheet. in ces oats Paces ORDERING INFORMATION PART TYPE SUFFIX 20ce4 we. s air 9 2M D L K w 8 LL package BLANK = PLASTIC J =CERDIP D= CERAMIC PLCC. kK = CERAMIC LCC. W= DIE IN WAFER FORM (CONSULT FACTORY) S = DIE IN WAFFLE PACK (CONSULT FACTORY) SCREENING BLANK = STD, COMMERCIAL/INDUSTRIAL R= MIL-STD-833, METHOD 5004 ‘TEMP RANGE € BLANK = 0°C TO 470° 10 +85°C 85° TO +125°C (CONSULT FACTORY) OPTION BLANK = tyc = 1 ms, 105 CYCLES X-= tye = 1 ms, NO CONNECT PIN 1 DIP, PIN 2 LCC/PLCC Microelectronics Division/Worldwide Sales Offices Printed in U.S.A, ©2884-8611, Sales Offices USA: CA, 818-789-0952 or 408-496-0844; FL, 819-894-3273; IL, 312-981-0040; IN, 317-841-9628; MA, 617-098-5890/91; NC, 919-828-0317; NJ, 201-254-6024, TX, 214-034-1654; EUROPE: London, Ruislip (08956), 36141; Milano, (2) 498 73 62: Muenchen, (089) 85997-95; Paris, (1) 43-74-9134; ASIA: Hong Kong, (3) 722-6577; Osaka, (08) 375-0606; Seoul, (2) 739-8543; Singapore, (65) 344-4711; Talpel, (2) 914-6234; Tokyo, (03) 437-0261 “Tho information In this publication, including schematics, is suggestive only. GENERAL, General instrument Corporation doos not warrant nr wl be responetblo ot INSTRUMENT liable for, (a) the accuracy of such information, (bj its use or (c) any Infringement of patents or other rights of third parti MICROELECTRONICS, ———— ee DSit108A8

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