COMPUTER

ARCHITECTURE AND
ORGANIZATION
 Chapter 2

Instructions:
Language of the
computers
 Introduction

• Instructions – the words in the

computer language
• Instruction set – the computer
vocabulary
(all valid words)
• We will take a look at the instruction
set of MIPS Technologies

3
The MIPS Market

4
 Basic Operations
• Every computer has to be able to
execute arithmetic operations
• Each MIPS arithmetic instruction
performs one operation on exactly two
variables
• Example (in MIPS assembly language)
add a, b, c
#add b & c and put the sum in a

5
 Design Principle 1
• Simplicity favours regularity
– Regularity makes implementation
simpler
– Simplicity enables higher performance
at lower cost

6
 Arithmetic Example
• C code:
f = (g + h) - (i + j);
• Compiled MIPS code:
add t0, g, h # temp t0 = g + h
add t1, i, j # temp t1 = i + j
sub f, t0, t1 # f = t0 - t1

7
 Operands
• The operands in the arithmetic
instructions are read from special
hardware locations, also called
registers
• The size of a register in MIPS
architecture is 32 bits
• A group of 32 bits is called word
• The number of registers is limited to
32
8
 Register Operands
• MIPS has a 32 × 32-bit register file
– Use for frequently accessed data
– Numbered 0 to 31
– 32-bit data called a “word”

• Assembler names
– $t0, $t1, …, $t9 for temporary values
– $s0, $s1, …, $s7 for saved variables

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 Design Principle 2
• Smaller is faster
– Keep small number of registers

10
 Register Operand
Example
• C code:
f = (g + h) - (i + j);
– f, …, j in $s0, …, $s4
• Compiled MIPS code:
add $t0, $s1, $s2
add $t1, $s3, $s4
sub $s0, $t0, $t1

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 Memory Operands
• Main memory used for composite
data
– Arrays, structures, dynamic data
• To apply arithmetic operations
– Load values from memory into registers
– Store result from register to memory
• Memory is byte addressed
– Each address identifies an 8-bit byte

12
 Memory alignment
• Words are aligned in memory
– Address must be a multiple of 4
• Memory alignment
– Most-significant byte at least address of
a word – Big Endian
– Little Endian: least-significant byte at
least address

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Little and Big Endian

MIPS is big-endian
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 Memory Operations
• The processor can only keep a small
size of data in the registers
• Thus, there are instructions for data
transfer to and from memory – lw
and sw
• The instruction uses memory address
to access a certain word

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 Memory Operations
• Registers are faster and with higher
throughput than memory
– That’s why the compiler stores the most
used variables in the registers. The
others are stored in memory.

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Memory Operand Example 1
• C code:
g = h + A[8];
– g in $s1, h in $s2, base address of A in
$s3
• Compiled MIPS code:
– Index 8 requires offset of 32
• 4 bytes per word
lw $t0, 32($s3) # load word
add $s1, $s2, $t0
offset base register
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Memory Operand Example 2
• C code:
A[12] = h + A[8];
– h in $s2, base address of A in $s3
• Compiled MIPS code:
– Index 8 requires offset of 32
lw $t0, 32($s3) # load word
add $t0, $s2, $t0
sw $t0, 48($s3) # store word

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 Registers vs. Memory
• Registers are faster to access than
memory
• Operating on memory data requires
loads and stores
– More instructions to be executed
• Compiler must use registers for
variables as much as possible
– Only spill to memory for less frequently
used variables
– Register optimization is important!
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 Immediate Operands
• Constant data specified in an
instruction
addi $s3, $s3, 4
• No subtract immediate instruction
– Just use a negative constant
addi $s2, $s1, -1

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 Design Principle 3
• Make the common case fast
– Small constants are common
– Immediate operand avoids a load
instruction

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 The Constant Zero
• MIPS register 0 ($zero) is the
constant 0
– Cannot be overwritten
• Useful for common operations
– E.g., move between registers
add $t2, $s1, $zero

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 Signed and Unsigned
Numbers
• Numbers are kept in computer
hardware as a series of high (1) and
low (0) electronic signals
• binary (base 2) numbers
• MIPS words are of size 32 bits
– With 32 bits, all numbers from 0 to 232-
1 can be represented
• It may happen that the result of an
operation can not be stored in 32
bits – initiates overflow
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Unsigned Binary Integers
• Given an n-bit number
n1 n 2
x  xn12  x n 2 2    x12  x0 2
1 0

 Range: 0 to +2n – 1
 Example
 0000 0000 0000 0000 0000 0000 0000 10112
= 0 + … + 1×23 + 0×22 +1×21 +1×20
= 0 + … + 8 + 0 + 2 + 1 = 1110
 Using 32 bits
 0 to +4,294,967,295

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 2s-Complement Signed
Integers
• Given an n-bit number
n1 n2
x  xn12  x n 2 2    x12  x0 2
1 0

 Range: –2n – 1 to +2n – 1 – 1

 Example
 1111 1111 1111 1111 1111 1111 1111 11002
= –1×231 + 1×230 + … + 1×22 +0×21 +0×20
= –2,147,483,648 + 2,147,483,644 = –410
 Using 32 bits
 –2,147,483,648 to +2,147,483,647

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 2s-Complement Signed
Integers
• Bit 31 is sign bit
– 1 for negative numbers
– 0 for non-negative numbers
• –(–2n – 1) can’t be represented
• Non-negative numbers have the
same unsigned and 2s-complement
representation

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 2s-Complement Signed
Integers
• Some specific numbers
– 0: 0000 0000 … 0000
– –1: 1111 1111 … 1111
– Most-negative: 1000 0000 … 0000
– Most-positive: 0111 1111 … 1111

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 Signed Negation
• Complement and add 1
– Complement means 1 → 0, 0 → 1

x  x  1111...1112  1

x  1  x

 Example: negate +2
 +2 = 0000 0000 … 00102
 –2 = 1111 1111 … 11012 + 1
= 1111 1111 … 11102

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 Signed Extension
• Representing a number using more bits
– Preserve the numeric value
• In MIPS instruction set
– addi: extend immediate value
– lb, lh: extend loaded byte/halfword
– beq, bne: extend the displacement
• Replicate the sign bit to the left
– c.f. unsigned values: extend with 0s
• Examples: 8-bit to 16-bit
– +2: 0000 0010 => 0000 0000 0000 0010
– –2: 1111 1110 => 1111 1111 1111 1110
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 Signed Numbers
• Negative numbers are represented by the so
called double complement convention
0000 0000 0000 0000 0000 0000 0000 1010 two = 10 ten

1111 1111 1111 1111 1111 1111 1111 0101 two = -11
ten

1000 0000 0000 0000 0000 0000 0000 0010 two =

-2 147 483 646 ten

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 Advantages from double
complement
1. Quick way to find the negative number
(invert and add 1)
2. Simple conversion from 16-bit to 32-bit
number (fill the empty bit locations with the
value of the most significant bit)

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 Representing Instructions
• Instructions are encoded in binary
– Called machine code
• MIPS instructions
– Encoded as 32-bit instruction words
– Small number of formats encoding operation
code (opcode), register numbers, …
– Regularity!
• Register numbers
– $t0 – $t7 are reg’s 8 – 15
– $t8 – $t9 are reg’s 24 – 25
– $s0 – $s7 are reg’s 16 – 23
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 Representing
Instructions
add $t0, $s1, $s2

0 17 18 8 0 32
$s1 $s2 $t0 machine
code
000000 10001 10010 01000 00000 100000

$s0 is mapped to 16th register $t0 is mapped to 8th register

$s1 is mapped to 17th register $t1 is mapped to 9th register
......................................................... ............................................................
$s7 is mapped to 23rd register $t7 is mapped to 15th register

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 MIPS R-format of
Instructions
op rs rt rd shamt funct
6 bits 5 bits 5 bits 5 bits 5 bits 6 bits

• op – denotes the operation and format of

an instruction
• rs – the first register source operand
• rt – the second register source operand
• rd – the register destination operand. It
gets the result of the operation
• shamt – shift amount
• funct – function, selects the specific
variant of the operation in the op field 34
 R-format Example
op rs rt rd shamt funct
6 bits 5 bits 5 bits 5 bits 5 bits 6 bits

add $t0, $s1, $s2

special $s1 $s2 $t0 0 add

0 17 18 8 0 32

000000 10001 10010 01000 00000 100000

000000100011001001000000001000002 = 0232402016

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 Hexadecimal
• Base 16
– Compact representation of bit strings
– 4 bits per hex digit

0 0000 4 0100 8 1000 c 1100

1 0001 5 0101 9 1001 d 1101
2 0010 6 0110 a 1010 e 1110
3 0011 7 0111 b 1011 f 1111

 Example: eca8 6420

 1110 1100 1010 1000 0110 0100 0010 0000

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MIPS I-format Instructions
op rs rt constant or address
6 bits 5 bits 5 bits 16 bits

• Immediate arithmetic and load/store

instructions
– rt: destination or source register
number
– Constant: –215 to +215 – 1
– Address: offset added to base address in
rs

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 Design Principle 4
• Good design demands good
compromises
– Different formats complicate decoding,
but allow 32-bit instructions uniformly
– Keep formats as similar as possible

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 Instruction Types
• Ideally we’d like:
– all instruction to be of same length
– to exist only a single instruction format
• Problem: the use of R-format instructions
to transfer words would limit arrays (int
A[];) to at most 32 words
• Compromise: all instruction are of same
length, but there are different instruction
formats (I-format for word transfer).

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 Big Picture
• Today’s computers are built on two key
principles:
1. Instructions are represented as numbers
2. Programs are stored in memory to be
read or written, just like numbers
• These principles lead to the stored-
program concept

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 Big Picture
• Moreover, programs are delivered as
ready files of binary numbers
• Computers may use the ready-made
software only if it’s compatible to the
instruction set
• This is why there are only a few
architectures in industry

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 Stored Program Computers
The BIG Picture • Instructions represented
in binary, just like data
• Instructions and data
stored in memory
• Programs can operate on
programs
– e.g., compilers, linkers, …
• Binary compatibility
allows compiled programs
to work on different
computers
– Standardized ISAs
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 Logical Operations
• Instructions for bitwise manipulation
Operation C Java MIPS
Shift left << << sll
Shift right >> >>> srl
Bitwise AND & & and, andi
Bitwise OR | | or, ori
Bitwise NOT ~ ~ nor

 Useful for extracting and inserting

groups of bits in a word
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 Shift Operations
op rs rt rd shamt funct
6 bits 5 bits 5 bits 5 bits 5 bits 6 bits

• shamt: how many positions to shift

• Shift left logical
– Shift left and fill with 0 bits
– sll by i bits multiplies by 2i
• Shift right logical
– Shift right and fill with 0 bits
– srl by i bits divides by 2i (unsigned
only)
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 SHIFT

• The value in register $s0

0000 0000 0000 0000 0000 0000 0000 1001
• shift left by 4 and put in $t2
0000 0000 0000 0000 0000 0000 1001 0000
• The MIPS instruction is
sll $t2,$s0,4
• or, in machine code

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 SHIFT

• Shifting a number left for i places is

the same as multiplication of that
number with 2i

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 AND Operations
• Useful to mask bits in a word
– Select some bits, clear others to 0
and $t0, $t1, $t2

$t2 0000 0000 0000 0000 0000 1101 1100 0000

$t1 0000 0000 0000 0000 0011 1100 0000 0000

$t0 0000 0000 0000 0000 0000 1100 0000 0000

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 OR Operations
• Useful to include bits in a word
– Set some bits to 1, leave others
unchanged
or $t0, $t1, $t2
$t2 0000 0000 0000 0000 0000 1101 1100 0000

$t1 0000 0000 0000 0000 0011 1100 0000 0000

$t0 0000 0000 0000 0000 0011 1101 1100 0000

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 OR
• OR is used to insert 1 in the 7-th bit from
right in register $t2
0000 0000 0000 0000 1101 1100 0000 0000
• For this purpose we use an auxiliary number
stored in $t2
0000 0000 0000 0000 0000 0000 0100 0000
• MIPS instruction for this operation is
or $t0,$t1,$t2

• The result in $t0 is

0000 0000 0000 0000 1101 1100 0100 0000 49

 NOT Operations
• Useful to invert bits in a word
– Change 0 to 1, and 1 to 0
• MIPS has NOR 3-operand instruction
– a NOR b == NOT ( a OR b )
nor $t0, $t1, $zero Register 0: always
read as zero

$t1 0000 0000 0000 0000 0011 1100 0000 0000

$t0 1111 1111 1111 1111 1100 0011 1111 1111

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 NOT

• NOT performs a bit-by-bit inversion

• MIPS implements NOR (NOT OR)

• We get NOT when one of the

operands in NOR is zero
nor $t0,$t1,$zero

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 Instructions for
Decision Making (IF)
• There are two instructions,
traditionally called conditional
branches
beq reg1, reg2, L1
bne reg1, reg2, L1

beq - branch if equal

bne - branch if not equal

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 Compiling If Statements
• C code:
if (i==j) f = g+h;
else f = g-h;
– f, g, … in $s0, $s1, …
• Compiled MIPS code:
bne $s3, $s4, Else
add $s0, $s1, $s2
j Exit
Else: sub $s0, $s1, $s2
Exit: … Assembler calculates addresses

53
 Instructions for
Decision Making (IF)
C code MIPS code
if (i == j) bne $s3,$s4,Else
f = g + h; add $s0,$s1,$s2
j Exit

else Else:
f = g – h; sub $s0,$s1,$s2
Exit:

54
 Compiling Loop Statements
• C code:
while (save[i] == k) i += 1;
– i in $s3, k in $s5, address of save in $s6
• Compiled MIPS code:
Loop: sll $t1, $s3, 2
add $t1, $t1, $s6
lw $t0, 0($t1)
bne $t0, $s5, Exit
addi $s3, $s3, 1
j Loop
Exit: …
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 Loops (while, for, repeat,…)

C code MIPS code

Loop:
sll $t1,$s3,2 # $t1= i*4

while (save[i]==k) add $t1,$t1,$s6 # $t1=

&save[i]
i+=1;
lw $t0,0($t1) # $t0 = save[i]
bne $t0,$s5, Exit
addi $s3,$s3,1
j Loop
Exit: 56
 Basic Blocks
• A basic block is a sequence of
instructions with
– No embedded branches (except at end)
– No branch targets (except at beginning)

 A compiler identifies basic

blocks for optimization
 An advanced processor
can accelerate execution
of basic blocks
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 More Conditional Operations
• Set result to 1 if a condition is true
– Otherwise, set to 0
• slt rd, rs, rt
– if (rs < rt) rd = 1; else rd = 0;
• slti rt, rs, constant
– if (rs < constant) rt = 1; else rt = 0;
• Use in combination with beq, bne
slt $t0, $s1, $s2 # if ($s1 < $s2)
bne $t0, $zero, L # branch to L

58
 Branch Instruction Design
• Why not blt, bge, etc?
• Hardware for <, ≥, … slower than =,
≠
– Combining with branch involves more
work per instruction, requiring a slower
clock
– All instructions penalized!
• beq and bne are the common case
• This is a good design compromise
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 Instructions for Comparison

• It is useful to have instructions for

comparison of two numbers > <
• MIPS assembly language offers
slt $t0, $s3, $s4 # $t0=1 if $s3<$s4

slti $t0,$s2,10 # $t0=1, if $s2<10

sltu $t0, $s3, $s4 #unsigned comparison

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 Instructions for Comparison

• $s0 ← 1111 1111 1111 1111 1111 1111 1111 1111two

• $s1 ← 0000 0000 0000 0000 0000 0000 0000 0001two

• What are the values of registers $t0 и $t1

slt $t0, $s0, $s1 # signed comparison

sltu $t1, $s0, $s1 # unsigned comparison

61
 Signed vs. Unsigned
• Signed comparison: slt, slti
• Unsigned comparison: sltu, sltui
• Example
– $s0 = 1111 1111 1111 1111 1111 1111 1111
1111
– $s1 = 0000 0000 0000 0000 0000 0000 0000
0001
– slt $t0, $s0, $s1 # signed
• –1 < +1  $t0 = 1
– sltu $t0, $s0, $s1 # unsigned
• +4,294,967,295 > +1  $t0 = 0 62
 Case/switch

• Programming languages have

commands such as switch in C
• This command may be implemented as
a series of if-then-else commands
• It is simpler to use jump table – an
array with addresses of code labels
• From the table, the address is read in a
register
• Then with jr (jump register) an
unconditional jump to the appropriate
location
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 Procedure Call
jal ProcedureAddress
• Jump-and-link jumps to an address and
simultaneously saves the address of the
following instruction in register $ra , i.e:
1. Stores the return address or “link” (that
points to the calling site) in register $ra
2. Jumps to the address where the procedure
starts
• After the procedure is executed, we return
to the calling site with jump register
jr $ra
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 Supporting Procedures
in Computer Hardware
• Procedure is a stored subroutine that
executes a specific task with the
input parameters

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 Procedure Calling
• Steps required
1. Place parameters in registers
2. Transfer control to procedure
3. Acquire storage for procedure
4. Perform procedure’s operations
5. Place result in register for caller
6. Return to place of call

66
 Register Usage
• $a0 – $a3: arguments (reg’s 4 – 7)
• $v0, $v1: result values (reg’s 2 and 3)
• $t0 – $t9: temporaries
– Can be overwritten by callee
• $s0 – $s7: saved
– Must be saved/restored by callee
• $gp: global pointer for static data (reg 28)
• $sp: stack pointer (reg 29)
• $fp: frame pointer (reg 30)
• $ra: return address (reg 31)

67
 Procedure Call Instructions
• Procedure call: jump and link
jal ProcedureLabel
– Address of following instruction put in
$ra
– Jumps to target address
• Procedure return: jump register
jr $ra
– Copies $ra to program counter
– Can also be used for computed jumps
• e.g., for case/switch statements
68
 Procedure Call
• Program Counter (PC) is the register
containing the address of the
instruction in the program being
executed.
• The jal instruction actually saves PC
+ 4 in register $ra to link to the
following instruction to set up the
procedure return

69
 Procedure Call
• The caller saves argument values in
registers $a0-$a3 and uses jal X to
jump to X
• The callee (the procedure X), after
having executed a series of
instructions, puts the results in
registers $v0 and $v1 and returns
control to the caller by jr $ra

70
 Using More Registers

• Suppose the compiler needs more registers

for a procedure than the 4 argument ($a0-
$a3) and 2 return value ($v0-$v1) registers
• Any registers needed by the caller must be
restored to the values that they contained
before the procedure was invoked
• This situation is an example in which we
need to spill registers to memory
• The ideal data structure for spilling registers
is a stack—a last-in-first-out queue
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 Using More Registers

• Stack is a queue of words that works

according to the Last-In-First-Out
(LIFO) rule
• A stack needs a stack pointer to the
last address (the most recently
allocated address)
• In MIPS, the 29-th register $sp is
reserved for the stack pointer
• Adding data in stack is called PUSH
• Removing data from stack is called POP
72
 Using More Registers
• In the MIPS world, by historical precedent,
stacks “grow” from higher addresses to lower
addresses
• Example:
addi $sp, $sp, –12 # make room for 3 items
sw $t1, 8($sp)
sw $t0, 4($sp)
sw $s0, 0($sp)

# code ...

lw $s0, 0($sp) # restore register $s0 for caller

lw $t0, 4($sp) # restore register $t0 for caller
lw $t1, 8($sp) # restore register $t1 for caller
addi $sp,$sp,12
jr $ra # jump back to calling site (routine)
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Using Stack

74
 Nested Procedures
• Procedures may invoke other procedures,
even their own clone procedures
(recursion)
• A conflict arises over register use

75
 Possible solution
• The caller pushes any argument
registers $a0−$a3 or temporary
registers $t0−$t9
• The callee pushes the return address
register $ra and any saved registers
$s0−$s7 used by the callee
• The stack pointer $sp is adjusted to
account for the number of registers
placed on the stack
• Upon return, the registers are restored
from memory and the stack pointer is
readjusted 76
 Nested Procedures
fact:
addi $sp, $sp, –8
sw $ra, 4($sp)
sw $a0, 0($sp)
int fact(int n) slti $t0,$a0,1
{ beq $t0,$zero,L1
if (n<1) addi $v0,$zero,1
return (1); addi $sp,$sp,8
else jr $ra
L1: addi $a0,$a0,–1
return (n*fact(n–1));
jal fact
}
lw $a0, 0($sp)
lw $ra, 4($sp)
addi $sp, $sp, 8
mul $v0,$a0,$v0
jr $ra
77
 Variables

• Variables in the C programming language

have
– type (int, double,…) , and
– storage class (automatic and static)
• Automatic variables are local to a
procedure and are destroyed after the
procedure exits
• Static variables exist invariably of a
procedure
– Static variables are declared outside all
procedures
78
 Global Pointer

• To simplify access to static data, MIPS

software reserves another register, called
the global pointer, or $gp

79
 Allocating Big Data

• Stack is also used to store variables that

are local to the procedure but do not fit in
registers (arrays or structures)
• The segment of the stack containing a
procedure’s saved registers and local
variables is called a procedure frame or
activation record
• frame pointer $fp to point to the first
word of the frame of a procedure
• Simplified frame access
80
 Local Data on the Stack

• Local data allocated by callee

– e.g., C automatic variables
• Procedure frame (activation record)
– Used by some compilers to manage stack
storage
81
 Memory Layout
• Text: program code
• Static data: global
variables
– e.g., static variables in C,
constant arrays and
strings
– $gp initialized to address
allowing ±offsets into this
segment
• Dynamic data: heap
– E.g., malloc in C, new in
Java
• Stack: automatic storage
82
 Allocating more than 4 input
variables
• If the procedure expects more than 4
arguments, the MIPS convention is
to place the extra parameters on the
stack just above the frame pointer
$fp

83
 Learning Material

• This lecture covers chapters 2.1-2.8

from Patterson-Hennessey

• Next lecture: 2.9 - ...

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