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Design Rules: Digital Integrated Circuits © Prentice Hall 1995

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0% found this document useful (0 votes)
64 views

Design Rules: Digital Integrated Circuits © Prentice Hall 1995

Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Design Rules

Digital Integrated Circuits Design Rules © Prentice Hall 1995


Cross-Section of CMOS Technology

Digital Integrated Circuits Design Rules © Prentice Hall 1995


Design Rules

 Interface between designer and process


engineer
 Guidelines for constructing process masks
 Unit dimension: Minimum line width
» scalable design rules: lambda parameter
» absolute dimensions (micron rules)

Digital Integrated Circuits Design Rules © Prentice Hall 1995


CMOS Process Layers
Layer Color Representation

Well (p,n) Yellow


Active Area (n+,p+) Green
Select (p+,n+) Green
Polysilicon Red
Metal1 Blue
Metal2 Magenta
Contact To Poly Black
Contact To Diffusion Black
Via Black

Digital Integrated Circuits Design Rules © Prentice Hall 1995


Intra-Layer Design Rules
Same Potential Different Potential
9 2
0 Polysilicon
Well or
6
10 2
3 3
Active Metal1
Contact
or Via 2
3 Hole 3
2 2 4
Select Metal2

Digital Integrated Circuits Design Rules © Prentice Hall 1995


Transistor Layout
Transistor

3 2

Digital Integrated Circuits Design Rules © Prentice Hall 1995


Via’s and Contacts
2
Via 4
1 1
5
Metal to
Metal to 1 Poly Contact
Active Contact 3 2

2
2

Digital Integrated Circuits Design Rules © Prentice Hall 1995


Select Layer
2
Select
3
2
1
3 3

2 5

Well
Substrate
Digital Integrated Circuits Design Rules © Prentice Hall 1995
CMOS Inverter Layout
GND In VDD

A A’

Out

(a) Layout

A A’
n
p-substrate Field
n+ p+ Oxide
(b) Cross-Section along A-A’
Digital Integrated Circuits Design Rules © Prentice Hall 1995

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