A B C D E

MODEL NAME : QBR10

PCB NO : LA-8321P
BOM P/N : 4619H531L01
1 1

2
Compal Confidential 2

Avenger MLK
rPGA Ivy Bridge + FCBGA PCH Panther Point‐M + MXM Ⅲ x2
3 3

Rev: 1.0 (A00)

2012.02.16
@ : Nopop component
CONN@ : ME connector
4 4

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC M/B LA-8321
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
4019H5 B
Date: Wednesday, August 01, 2012 Sheet 1 of 66
A B C D E
 A B C D E

Compal Confidential Thermal sensor PCH XDP CPU XDP

Project Code : QBR10 / Fan Control Conn. P.16 Conn.
HDMI to LVDS SW HDMI 1.3 EMC1412 P.5
File Name : LA-8321P STDP6038 P.30 input Conn
P.41

LVDS (DIS)
LVDS LVDS MUX LVDS MUX (DDRIII)
1

Conn P.25 P.25 P.24 Master GPU Intel Memory Bus

1

Ivy Bridge 204pin DDRIII SO-DIMM x4

MXM III Dual Channel
CRT (DIS) Conn. Processor BANK 0, 1, 2, 3 P.10,11,12,13

CRT CRT MUX PEG x8 (DIS) 1.5V DDRIII

P.14
Conn P.26 P.26 1600/1333 MHz
Slave GPU 4C 45W, 55W SATA Port 0
SATA HDD-1 Conn.
HDMI 1.4 HDMI MUX
DP Port C (DIS)
MXM III
PEG x8 (DIS) rPGA 989 Socket P.34
DP Port B (UMA) P.4~9
SATA Port 1
Conn P.27 P.27 Conn. SATA HDD-2 Conn.
P.15 FDI x8 DMI x4 gen 2 P.34 SATA Port 5
(UMA) mSATA Conn.
mini DP DP MUX
DP Port B (DIS) 100MHz SATA Port 3
SATA HDD-3 Conn.
P.34
DP Port C (UMA) 100MHz 5GB/s
Conn P.28 P.34
P.28 2.7GT/s
LVDS SATA Port 2
2
(DIS) SATA SATA ODD Conn. 2
Mini Card -2 DP Port A CRT P.34
Wireless Display DP MUX DP Port D SATA Port 4
DMC (Full) P.35 P.29 (UMA) HDMI USB Port 9 USB / eSATA Conn.
USB Charger
DisplayPort USB Port 0,1
USB Port 5
DMC USB 2.0 /3.0 Conn x 2 IO Board
USB Port 1,2
dual-stack
Intel
Panther Point USB3.0 USB Port 12 Digital Camera thourgh LVDS cable
PCIE BUS PCH P.24

USB Port 3,4 USB 2.0/3.0 Conn x 2

PCIE Port 2 PCIE Port 1 PCIE Port 3 PCIE Port 4 PCIE Port 5 USB2.0 USB Port 2
dual-stack
Mini Card-2 LAN(GbE) Mini Card-1 Card Reader Express Card BGA 989 Balls
USB Port 6 AlienFX/ELC MAX7313D x3
DMC (Full) AR8151 WLAN (Half) RTS5209 ( 54mm ) HM77 C8051F347 P.37
P.37~39
P.36 P.31 P.35 USB Port 8
3 BT 2.1 /BT 3.0 P.35 3

USB Port 4
USB Port 11 HD Audio USB Port 13
RJ45 9 in 1 VPK
Socket P16~23
P.35

Conn Int. Speaker

P.31 IO Board
Audio Codec Amplifier x2 4Ω 2.5Wx 2 P.33
DC/DC Interface Sub-board
SPI
LPC Bus Malcolm MAX9736 P.33
P.42
SPI ROM HDA015-B P.32 Subwoofer
IO Board NUM/CAP LED Board P.16 4Ω 5W P.33
Power On/Off +VCCP
P.43 P.48 LS-6571P LS-6573P Head phone Jack x1
ENE 3810 ENE KB930 Mic phone Jack x1P.32
BATTERY / OTP +1.8V Media Board Alienware Logo Board P.40 P.40
P.44 P.49 LS-6572P LS-6577P
PS2 SPI Media Board MIC + Rear LF P.25

DCIN / DECTOR +1.5V/+0.75V L-Speaker LED Board Touch pad Board Media / Mode
P.45 P.50 LS-6575P LS-6608P Touch Pad Int.KBD BIOS ROM S/PDIF Out P.33
4 P.38 P.43 P.40 Buttons P.38 4

CHARGER VCCSA R-Speaker LED Board Power Button Board

P.46 P.51 LS-6574P LS-6578P DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
3V/5V ALW CPU_CORE Power LED Board PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
Title

P.47 P.52 LS-6579P BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC M/B LA-8321
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
4019H5
Date: Wednesday, August 01, 2012 Sheet 2 of 66

A B C D E
 A

Board ID Table for AD channel USB PORT# DESTINATION USB PORT# DESTINATION
Vcc 3.3V +/- 5% BOARD ID Table
Ra 100K +/- 5% 0 JUSB1 0 JUSB1
Board ID Rb V AD_BID min V AD_BID typ V AD_BID max Board ID PCB Revision
0 0 0 V 0 V 0 V 0 0.1 1 JUSB2 1 JUSB2
1 8.2K +/- 5% 0.168 V 0.250 V 0.362 V 1
USB3.0
0.2
2 18K +/- 5% 0.436 V 0.503 V 0.538 V 2 0.3 2 JUSB3 2 JUSB3
3 33K +/- 5% 0.712 V 0.819 V 0.875 V 3 0.4
4 56K +/- 5% 1.036 V 1.185 V 1.264 V 4 1.0 3 JUSB4 3 JUSB4
5 100K +/- 5% 1.453 V 1.650 V 1.759 V 5
6 200K +/- 5% 1.935 V 2.200 V 2.341 V 6 4 Mini Card (WLAN)
7 NC 2.500 V 3.300 V 3.300 V 7
USB 5 Mini Card (DMC)
POWER STATES PM TABLE 6 AlienFX/ELC
Signal SLP SLP SLP S4 SLP ALWAYS SUS RUN CLOCKS +5VS
State S3# S4# S5# STATE# M# PLANE PLANE PLANE +5VALW +1.5V +3VS 7 None
+3VALW +1.8VS
power
S0 (Full ON) / M0 HIGH HIGH HIGH HIGH HIGH ON ON ON ON plane +3VLP +1.5VS 8 Bluetooth
+3V_PCH +0.75VS
S3 (Suspend to RAM) / M-OFF LOW HIGH HIGH LOW ON ON OFF OFF +3VMXM 9 USB / eSATA combo
+5VMXM
S4 (Suspend to DISK) / M-OFF LOW LOW HIGH LOW LOW ON OFF OFF OFF +VCCP 10 None
State
+VCCSA
S5 (SOFT OFF) / M-OFF LOW LOW LOW LOW LOW ON OFF OFF OFF +VCC_CORE 11 EXPRESS CARD
+1.5V_CPU_VDDQ
12 CAMERA
S0 ON ON ON

13 VPK
S3 ON ON OFF

1 1

S5 S4/AC ON OFF OFF

S5 S4/AC don't exist OFF OFF OFF

DIFFERENTIAL DESTINATION FLEX CLOCKS DESTINATION SATA DESTINATION PCI EXPRESS DESTINATION CLKOUT DESTINATION

CLKOUT_PCIE0 None CLKOUTFLEX0 None SATA0 HDD1 Lane 1 10/100/1G LAN PCI0 PCH_LOOPBACK

CLKOUT_PCIE1 10/100/1G LAN CLKOUTFLEX1 None SATA1 HDD2 Lane 2 MINI CARD-2 DMC PCI1 EC

CLKOUT_PCIE2 MINI CARD-2 DMC CLKOUTFLEX2 None SATA2 ODD Lane 3 MINI CARD-1 WLAN PCI2 DEBUG

CLK CLKOUT_PCIE3 MINI CARD-1 WLAN CLKOUTFLEX3 None SATA3 HDD3 Lane 4 CARD READER PCI3 None

CLKOUT_PCIE4 CARD READER SATA4 E-SATA Lane 5 EXPRESS CARD PCI4 None

CLKOUT_PCIE5 EXPRESS CARD Symbol Note : SATA5 mSATA Lane 6 None

CLKOUT_PCIE6 None Digital Ground Lane 7 None

CLKOUT_PCIE7 None Power plane Voltage Lane 8 None

Analog Ground +3VALW
CLKOUT_PEG_A MXM I
+3VLP

CLKOUT_PEG_B MXM II +3V_PCH 3.3V

+3VS DELL CONFIDENTIAL/PROPRIETARY
+3VMXM
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC M/B LA-8321
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
4019H5
Date: Wednesday, August 01, 2012 Sheet 3 of 66
A
 5 4 3 2 1

PEG_ICOMPI and RCOMPO signals should be shorted and routed

with - max length = 500 mils - typical impedance = 43 mohms
+VCCP PEG_ICOMPO signals should be routed with - max length = 500 mils
- typical impedance = 14.5 mohms

1
RC2
24.9_0402_1% JCPUI CONN@

2
JCPUA CONN@
D PEG_COMP D
PEG_ICOMPI J22 T35 VSS161 VSS234 F22
PEG_ICOMPO J21 T34 VSS162 VSS235 F19
18 DMI_CRX_PTX_N0 B27 DMI_RX#[0] PEG_RCOMPO H22 T33 VSS163 VSS236 E30
18 DMI_CRX_PTX_N1 B25 DMI_RX#[1] PEG_GTX_HRX_N[0..15] 14,15 T32 VSS164 VSS237 E27
18 DMI_CRX_PTX_N2 A25 DMI_RX#[2] T31 VSS165 VSS238 E24
18 DMI_CRX_PTX_N3 B24 K33 PEG_GTX_C_HRX_N0 CC1 1 2 0.22U_0402_16V7K~D PEG_GTX_HRX_N0 T30 E21
DMI_RX#[3] PEG_RX#[0] PEG_GTX_C_HRX_N1 CC2 0.22U_0402_16V7K~D PEG_GTX_HRX_N1 VSS166 VSS239
PEG_RX#[1] M35 1 2 T29 VSS167 VSS240 E18
18 DMI_CRX_PTX_P0 B28 L34 PEG_GTX_C_HRX_N2 CC3 1 2 0.22U_0402_16V7K~D PEG_GTX_HRX_N2 T28 E15
DMI_RX[0] PEG_RX#[2] PEG_GTX_C_HRX_N3 CC4 0.22U_0402_16V7K~D PEG_GTX_HRX_N3 VSS168 VSS241
18 DMI_CRX_PTX_P1 B26 DMI_RX[1] PEG_RX#[3] J35 1 2 T27 VSS169 VSS242 E13
18 DMI_CRX_PTX_P2 A24 J32 PEG_GTX_C_HRX_N4 CC5 1 2 0.22U_0402_16V7K~D PEG_GTX_HRX_N4 T26 E10
DMI_RX[2] PEG_RX#[4] PEG_GTX_C_HRX_N5 CC6 0.22U_0402_16V7K~D PEG_GTX_HRX_N5 VSS170 VSS243

DMI
18 DMI_CRX_PTX_P3 B23 DMI_RX[3] PEG_RX#[5] H34 1 2 P9 VSS171 VSS244 E9
H31 PEG_GTX_C_HRX_N6 CC7 1 2 0.22U_0402_16V7K~D PEG_GTX_HRX_N6 P8 E8
PEG_RX#[6] PEG_GTX_C_HRX_N7 CC8 0.22U_0402_16V7K~D PEG_GTX_HRX_N7 VSS172 VSS245
18 DMI_CTX_PRX_N0 G21 DMI_TX#[0] PEG_RX#[7] G33 1 2 P6 VSS173 VSS246 E7
E22 G30 PEG_GTX_C_HRX_N8 CC9 1 2 0.22U_0402_16V7K~D PEG_GTX_HRX_N8 P5 E6
18 DMI_CTX_PRX_N1 DMI_TX#[1] PEG_RX#[8] PEG_GTX_C_HRX_N9 CC10 0.22U_0402_16V7K~D PEG_GTX_HRX_N9 VSS174 VSS247
18 DMI_CTX_PRX_N2 F21 DMI_TX#[2] PEG_RX#[9] F35 1 2 P3 VSS175 VSS248 E5
D21 E34 PEG_GTX_C_HRX_N10 CC11 1 2 0.22U_0402_16V7K~D PEG_GTX_HRX_N10 P2 E4
18 DMI_CTX_PRX_N3 DMI_TX#[3] PEG_RX#[10] PEG_GTX_C_HRX_N11 CC12 0.22U_0402_16V7K~D PEG_GTX_HRX_N11 VSS176 VSS249
PEG_RX#[11] E32 1 2 N35 VSS177 VSS250 E3
G22 D33 PEG_GTX_C_HRX_N12 CC13 1 2 0.22U_0402_16V7K~D PEG_GTX_HRX_N12 N34 E2
18 DMI_CTX_PRX_P0 DMI_TX[0] PEG_RX#[12] PEG_GTX_C_HRX_N13 CC14 0.22U_0402_16V7K~D PEG_GTX_HRX_N13 VSS178 VSS251
18 DMI_CTX_PRX_P1 D22 DMI_TX[1] PEG_RX#[13] D31 1 2 N33 VSS179 VSS252 E1
F20 B33 PEG_GTX_C_HRX_N14 CC15 1 2 0.22U_0402_16V7K~D PEG_GTX_HRX_N14 N32 D35
18 DMI_CTX_PRX_P2 DMI_TX[2] PEG_RX#[14] PEG_GTX_C_HRX_N15 CC16 0.22U_0402_16V7K~D PEG_GTX_HRX_N15 VSS180 VSS253

PCI EXPRESS* - GRAPHICS

18 DMI_CTX_PRX_P3 C21 DMI_TX[3] PEG_RX#[15] C32 1 2 PEG_GTX_HRX_P[0..15] 14,15 N31 VSS181 VSS254 D32
N30 VSS182 VSS255 D29
J33 PEG_GTX_C_HRX_P0 CC17 1 2 0.22U_0402_16V7K~D PEG_GTX_HRX_P0 N29 D26
PEG_RX[0] PEG_GTX_C_HRX_P1 CC18 0.22U_0402_16V7K~D PEG_GTX_HRX_P1 VSS183 VSS256
PEG_RX[1] L35 1 2 N28 VSS184 VSS257 D20
K34 PEG_GTX_C_HRX_P2 CC19 1 2 0.22U_0402_16V7K~D PEG_GTX_HRX_P2 N27 D17
FDI_CTX_PRX_N0 PEG_RX[2] PEG_GTX_C_HRX_P3 CC20 0.22U_0402_16V7K~D PEG_GTX_HRX_P3 VSS185 VSS258
18 FDI_CTX_PRX_N0 A21 FDI0_TX#[0] PEG_RX[3] H35 1 2 N26 VSS186 VSS259 C34
FDI_CTX_PRX_N1 H19 H32 PEG_GTX_C_HRX_P4 CC21 1 2 0.22U_0402_16V7K~D PEG_GTX_HRX_P4 M34 C31
18 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI0_TX#[1] PEG_RX[4] PEG_GTX_C_HRX_P5 CC22 0.22U_0402_16V7K~D PEG_GTX_HRX_P5 VSS187 VSS260
18 FDI_CTX_PRX_N2 E19 FDI0_TX#[2] PEG_RX[5] G34 1 2 L33 VSS188 VSS261 C28
FDI_CTX_PRX_N3 F18 G31 PEG_GTX_C_HRX_P6 CC23 1 2 0.22U_0402_16V7K~D PEG_GTX_HRX_P6 L30 C27
18 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI0_TX#[3] PEG_RX[6] PEG_GTX_C_HRX_P7 CC24 0.22U_0402_16V7K~D PEG_GTX_HRX_P7 VSS189 VSS262
18 FDI_CTX_PRX_N4 B21 FDI1_TX#[0] Intel(R) FDI PEG_RX[7] F33 1 2 L27 VSS190 VSS263 C25
FDI_CTX_PRX_N5 C20 F30 PEG_GTX_C_HRX_P8 CC25 1 2 0.22U_0402_16V7K~D PEG_GTX_HRX_P8 L9 C23
18 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI1_TX#[1] PEG_RX[8] PEG_GTX_C_HRX_P9 CC26 0.22U_0402_16V7K~D PEG_GTX_HRX_P9 VSS191 VSS264
18 FDI_CTX_PRX_N6 D18 FDI1_TX#[2] PEG_RX[9] E35 1 2 L8 VSS192 VSS265 C10
C FDI_CTX_PRX_N7 PEG_GTX_C_HRX_P10 CC27 0.22U_0402_16V7K~D PEG_GTX_HRX_P10 C
18 FDI_CTX_PRX_N7 E17 FDI1_TX#[3] PEG_RX[10] E33 1 2 L6 VSS193 VSS266 C1
F32 PEG_GTX_C_HRX_P11 CC28 1 2 0.22U_0402_16V7K~D PEG_GTX_HRX_P11 L5 B22
PEG_RX[11] VSS194 VSS267

VSS
D34 PEG_GTX_C_HRX_P12 CC29 1 2 0.22U_0402_16V7K~D PEG_GTX_HRX_P12 L4 B19
FDI_CTX_PRX_P0 PEG_RX[12] PEG_GTX_C_HRX_P13 CC30 0.22U_0402_16V7K~D PEG_GTX_HRX_P13 VSS195 VSS268
18 FDI_CTX_PRX_P0 A22 FDI0_TX[0] PEG_RX[13] E31 1 2 L3 VSS196 VSS269 B17
FDI_CTX_PRX_P1 G19 C33 PEG_GTX_C_HRX_P14 CC31 1 2 0.22U_0402_16V7K~D PEG_GTX_HRX_P14 L2 B15
18 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI0_TX[1] PEG_RX[14] PEG_GTX_C_HRX_P15 CC32 0.22U_0402_16V7K~D PEG_GTX_HRX_P15 VSS197 VSS270
18 FDI_CTX_PRX_P2 E20 FDI0_TX[2] PEG_RX[15] B32 1 2 L1 VSS198 VSS271 B13
FDI_CTX_PRX_P3 G18 PEG_HTX_C_GRX_N[0..15] 14,15 K35 B11
18 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI0_TX[3] PEG_HTX_GRX_N0 CC33 0.22U_0402_16V7K~D PEG_HTX_C_GRX_N0 VSS199 VSS272
18 FDI_CTX_PRX_P4 B20 FDI1_TX[0] PEG_TX#[0] M29 1 2 K32 VSS200 VSS273 B9
FDI_CTX_PRX_P5 C19 M32 PEG_HTX_GRX_N1 CC34 1 2 0.22U_0402_16V7K~D PEG_HTX_C_GRX_N1 K29 B8
18 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI1_TX[1] PEG_TX#[1] PEG_HTX_GRX_N2 CC35 0.22U_0402_16V7K~D PEG_HTX_C_GRX_N2 VSS201 VSS274
18 FDI_CTX_PRX_P6 D19 FDI1_TX[2] PEG_TX#[2] M31 1 2 K26 VSS202 VSS275 B7
FDI_CTX_PRX_P7 F17 L32 PEG_HTX_GRX_N3 CC36 1 2 0.22U_0402_16V7K~D PEG_HTX_C_GRX_N3 J34 B5
18 FDI_CTX_PRX_P7 FDI1_TX[3] PEG_TX#[3] PEG_HTX_GRX_N4 CC37 0.22U_0402_16V7K~D PEG_HTX_C_GRX_N4 VSS203 VSS276
PEG_TX#[4] L29 1 2 J31 VSS204 VSS277 B3
18 FDI_FSYNC0 FDI_FSYNC0 J18 K31 PEG_HTX_GRX_N5 CC38 1 2 0.22U_0402_16V7K~D PEG_HTX_C_GRX_N5 H33 B2
FDI_FSYNC1 FDI0_FSYNC PEG_TX#[5] PEG_HTX_GRX_N6 CC39 0.22U_0402_16V7K~D PEG_HTX_C_GRX_N6 VSS205 VSS278
18 FDI_FSYNC1 J17 FDI1_FSYNC PEG_TX#[6] K28 1 2 H30 VSS206 VSS279 A35
J30 PEG_HTX_GRX_N7 CC40 1 2 0.22U_0402_16V7K~D PEG_HTX_C_GRX_N7 H27 A32
FDI_INT PEG_TX#[7] PEG_HTX_GRX_N8 CC41 0.22U_0402_16V7K~D PEG_HTX_C_GRX_N8 VSS207 VSS280
18 FDI_INT H20 FDI_INT PEG_TX#[8] J28 1 2 H24 VSS208 VSS281 A29
H29 PEG_HTX_GRX_N9 CC42 1 2 0.22U_0402_16V7K~D PEG_HTX_C_GRX_N9 H21 A26
FDI_LSYNC0 PEG_TX#[9] PEG_HTX_GRX_N10 CC43 0.22U_0402_16V7K~D PEG_HTX_C_GRX_N10 VSS209 VSS282
18 FDI_LSYNC0 J19 FDI0_LSYNC PEG_TX#[10] G27 1 2 H18 VSS210 VSS283 A23
18 FDI_LSYNC1 FDI_LSYNC1 H17 E29 PEG_HTX_GRX_N11 CC44 1 2 0.22U_0402_16V7K~D PEG_HTX_C_GRX_N11 H15 A20
FDI1_LSYNC PEG_TX#[11] PEG_HTX_GRX_N12 CC45 0.22U_0402_16V7K~D PEG_HTX_C_GRX_N12 VSS211 VSS284
PEG_TX#[12] F27 1 2 H13 VSS212 VSS285 A3
D28 PEG_HTX_GRX_N13 CC46 1 2 0.22U_0402_16V7K~D PEG_HTX_C_GRX_N13 H10
PEG_TX#[13] PEG_HTX_GRX_N14 CC47 0.22U_0402_16V7K~D PEG_HTX_C_GRX_N14 VSS213
PEG_TX#[14] F26 1 2 H9 VSS214
+VCCP PEG_HTX_GRX_N15 CC48 0.22U_0402_16V7K~D PEG_HTX_C_GRX_N15
PEG_TX#[15] E25 1 2 H8 VSS215
RC14 A18 PEG_HTX_C_GRX_P[0..15] 14,15 H7
+EDP_COM eDP_COMPIO PEG_HTX_GRX_P0 CC49 0.22U_0402_16V7K~D PEG_HTX_C_GRX_P0 VSS216
1 2 A17 eDP_ICOMPO PEG_TX[0] M28 1 2 H6 VSS217
B16 M33 PEG_HTX_GRX_P1 CC50 1 2 0.22U_0402_16V7K~D PEG_HTX_C_GRX_P1 H5
24.9_0402_1% eDP_HPD# PEG_TX[1] PEG_HTX_GRX_P2 CC51 0.22U_0402_16V7K~D PEG_HTX_C_GRX_P2 VSS218
PEG_TX[2] M30 1 2 H4 VSS219
L31 PEG_HTX_GRX_P3 CC52 1 2 0.22U_0402_16V7K~D PEG_HTX_C_GRX_P3 H3
PEG_TX[3] PEG_HTX_GRX_P4 CC53 0.22U_0402_16V7K~D PEG_HTX_C_GRX_P4 VSS220
C15 eDP_AUX PEG_TX[4] L28 1 2 H2 VSS221
D15 K30 PEG_HTX_GRX_P5 CC54 1 2 0.22U_0402_16V7K~D PEG_HTX_C_GRX_P5 H1
eDP_AUX# PEG_TX[5] PEG_HTX_GRX_P6 CC55 0.22U_0402_16V7K~D PEG_HTX_C_GRX_P6 VSS222
PEG_TX[6] K27 1 2 G35 VSS223
PEG_HTX_GRX_P7 CC56 0.22U_0402_16V7K~D PEG_HTX_C_GRX_P7
eDP

PEG_TX[7] J29 1 2 G32 VSS224

B PEG_HTX_GRX_P8 CC57 0.22U_0402_16V7K~D PEG_HTX_C_GRX_P8 B
C17 eDP_TX[0] PEG_TX[8] J27 1 2 G29 VSS225
F16 H28 PEG_HTX_GRX_P9 CC58 1 2 0.22U_0402_16V7K~D PEG_HTX_C_GRX_P9 G26
eDP_TX[1] PEG_TX[9] PEG_HTX_GRX_P10 CC59 0.22U_0402_16V7K~D PEG_HTX_C_GRX_P10 VSS226
C16 eDP_TX[2] PEG_TX[10] G28 1 2 G23 VSS227
G15 E28 PEG_HTX_GRX_P11 CC60 1 2 0.22U_0402_16V7K~D PEG_HTX_C_GRX_P11 G20
eDP_TX[3] PEG_TX[11] PEG_HTX_GRX_P12 CC61 0.22U_0402_16V7K~D PEG_HTX_C_GRX_P12 VSS228
PEG_TX[12] F28 1 2 G17 VSS229
C18 D27 PEG_HTX_GRX_P13 CC62 1 2 0.22U_0402_16V7K~D PEG_HTX_C_GRX_P13 G11
eDP_TX#[0] PEG_TX[13] PEG_HTX_GRX_P14 CC63 0.22U_0402_16V7K~D PEG_HTX_C_GRX_P14 VSS230
E16 eDP_TX#[1] PEG_TX[14] E26 1 2 F34 VSS231
D16 D25 PEG_HTX_GRX_P15 CC64 1 2 0.22U_0402_16V7K~D PEG_HTX_C_GRX_P15 F31
eDP_TX#[2] PEG_TX[15] VSS232
F15 eDP_TX#[3] F29 VSS233
Near MXM Connector
TYCO_2134146-3_IVYBRIDGE~D

TYCO_2134146-3_IVYBRIDGE~D

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC M/B LA-8321
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
4019H5
Date: Wednesday, August 01, 2012 Sheet 4 of 66
5 4 3 2 1
 5 4 3 2 1

+VCCP +VCCP
+3VALW
+3VS +3V_PCH
+1.5V_CPU_VDDQ

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D
JCPUXDP 1
1 1 1 GND0 GND1 2

1
@ @ XDP_PREQ# 3 4 CFG16_R @ RC84 1 2 0_0402_5% CFG16 7 CC156
OBSFN_A0 OBSFN_C0

1
CC65

CC66
XDP_PRDY# 5 6 CFG17_R @ RC85 1 2 0_0402_5% CFG17 7 RC58 RC18 0.1U_0402_25V6K~D
OBSFN_A1 OBSFN_C1 10K_0402_5%~D 10K_0402_5%~D 2 RC12
7 GND2 GND3 8
2 2 XDP_BPM#0 CFG0_R @ RC86 1 0_0402_5%
9 OBSDATA_A0 OBSDATA_C0 10 2 CFG0 7 200_0402_1%
XDP_BPM#1 11 12 CFG1_R @ RC87 1 2 0_0402_5% CFG1 7

2
OBSDATA_A1 OBSDATA_C1
13 14

2
GND4 GND5

5
XDP_BPM#2 15 16 CFG2_R @ RC88 1 2 0_0402_5% CFG2 7 UC2
XDP_BPM#3 OBSDATA_A2 OBSDATA_C2 CFG3_R @ RC89 1 0_0402_5% @ R1905 1
17 18 2 2 0_0402_5% 1

G VCC
OBSDATA_A3 OBSDATA_C3 CFG3 7 16,18,53 VGATE B
19 20 4 VDDPWRGOOD
0_0402_5% @2 GND6 GND7 Y
7 CFG10 1 RC112 CFG10_R 21 OBSFN_B0 OBSFN_D0 22 CFG8_R @ RC90 1 2 0_0402_5% CFG8 7 18 PM_DRAM_PWRGD 2 A
D D
7 CFG11
0_0402_5% @2 1 RC113 CFG11_R 23 OBSFN_B1 OBSFN_D1 24 CFG9_R @ RC91 1 2 0_0402_5% CFG9 7

1
25 26 MC74VHC1G09DFT2G_SC70-5

3
XDP_BPM#4 GND8 GND9 CFG4_R @ RC92 1 0_0402_5%
27 OBSDATA_B0 OBSDATA_D0 28 2 CFG4 7

2
XDP_BPM#5 29 30 CFG5_R @ RC93 1 2 0_0402_5% CFG5 7 R1910
OBSDATA_B1 OBSDATA_D1 100K_0402_5% @ RC64
31 GND10 GND11 32
XDP_BPM#6 33 34 CFG6_R @ RC94 1 2 0_0402_5% CFG6 7 39_0402_1%

2
XDP_BPM#7 OBSDATA_B2 OBSDATA_D2 CFG7_R @ RC95 1 0_0402_5%
35 OBSDATA_B3 OBSDATA_D3 36 2 CFG7 7
37 38

1
H_CPUPWRGD 1K_0402_5% @1 GND12 GND13
2 RC5 H_CPUPWRGD_XDP 39 PWRGOOD/HOOK0 ITPCLK/HOOK4 40 CLK_CPU_ITP CLK_CPU_ITP 17
16,18,40 PBTN_OUT# 0_0402_5% @1 2 RC6 CFD_PWRBTN#_XDP 41 42 CLK_CPU_ITP# CLK_CPU_ITP# 17
HOOK1 ITPCLK#/HOOK5 D

1
43 VCC_OBS_AB VCC_OBS_CD 44
1K_0402_5% @1 2 RC7 XDP_HOOK2 45 46 XDP_RST#_RRC8 2 @ 1 1K_0402_5% PLT_RST# 9,42 RUN_ON_CPU1.5VS3# RUN_ON_CPU1.5VS3# 2 @ QC1
7 CFG0 HOOK2 RESET#/HOOK6 G
16,18,53 VGATE 0_0402_5% @1 2 RC9 SYS_PWROK_XDP 47 HOOK3 DBR#/HOOK7 48 XDP_DBRESET# 2N7002E-T1-E3_SOT23-3
+3VALW 1K_0402_5% @1 2 RC3 49 50 S

3
GND14 GND15 XDP_TDO @ RC99 1
4,35,43 PCH_SMBDATA 51 SDA TD0 52 2 0_0402_5% PCH_JTAG_TDO 16
4,35,43 PCH_SMBCLK 53 54 XDP_TRST#
0_0402_5% @1 SCL TRST#
16 PCH_JTAG_TCK 2 RC98XDP_TCK1 55 TCK1 TDI 56 XDP_TDI @ RC1001 2 0_0402_5% PCH_JTAG_TDI 16
XDP_TCK 57 58 XDP_TMS @ RC1011 2 0_0402_5% PCH_JTAG_TMS 16
TCK0 TMS
59 GND16 GND17 60
+3VALW
The resistor SAMTE_BSH-030-01-L-D-A
for HOOK2 should be CONN@ +VCCP
placed such that the 1
stub is very small

1
CC140
on CFG0 net 0.1U_0402_25V6K~D RC4
2
75_0402_1%

2
5
UC1
1 RC10

P
C NC BUFO_CPU_RST# BUF_CPU_RST# C
Y 4 1 2
16,19,31,35,40,43 PLT_RST# 2 43_0402_1%
A

G
3
SN74LVC1G07DCKR_SC70-5

JCPUB CONN@

A28 CLK_CPU_DMI_R @ RC13 1 2 0_0402_5%~D

BCLK CLK_CPU_DMI 17
C26 A27 CLK_CPU_DMI#_R @ RC15 1 2 0_0402_5%~D
20 H_SNB_IVB# PROC_SELECT# BCLK# CLK_CPU_DMI# 17
MISC

CLOCKS

+VCCP
AN34 SKTOCC#
A16 CLK_CPU_DPLL CLK_CPU_DPLL# RU25 1 2 1K_0402_5%
DPLL_REF_CLK CLK_CPU_DPLL#
DPLL_REF_CLK# A15
CLK_CPU_DPLL RU24 1 2 1K_0402_5%

PAD~D T137 @ H_CATERR# AL33 CATERR#

H_DRAMRST#
THERMAL

20,40 H_PECI AN33 PECI SM_DRAMRST# R8 H_DRAMRST# 6

DDR3
MISC

RC57
40,45 H_PROCHOT# 1 2 H_PROCHOT#_R AL32 AK1 SM_RCOMP0
PROCHOT# SM_RCOMP[0] +3VS
B 56_0402_5%
SM_RCOMP[1] A5 SM_RCOMP1 Processor Pullups PU/PD for JTAG signals B
A4 SM_RCOMP2
SM_RCOMP[2] +VCCP XDP_DBRESET# 1K_0402_5% 1 +VCCP
2 RC19
H_THRMTRIP# AN32
20 H_THRMTRIP# THERMTRIP#
H_PROCHOT# 62_0402_5%
1 2 RC44
H_CPUPWRGD_R 10K_0402_5%~D
1 2 RC21 XDP_TMS 51_0402_5% 1 2 RC27

AP29 XDP_PRDY# XDP_TDI_R 51_0402_5% 1 2 RC29

PRDY# XDP_PREQ#
PREQ# AP27
XDP_PREQ# 51_0402_5% 1 @ 2 RC32
AR26 XDP_TCK
TCK XDP_TMS XDP_TDO_R 51_0402_5% 1
TMS AR27 2 RC35
H_PM_SYNC_R XDP_TRST#
PWR MANAGEMENT

18 H_PM_SYNC 1 2 AM34 AP30

JTAG & BPM

@ RC22 0_0402_5%~D PM_SYNC TRST#

TDI AR28 XDP_TDI_R @ RC23 1

@RC23 2 0_0402_5% XDP_TDI DDR3 Compensation Signals
AP26 XDP_TDO_R @RC24
@ RC24 1 2 0_0402_5% XDP_TDO XDP_TCK 51_0402_5% 1 2 RC40
H_CPUPWRGD_R TDO
20 H_CPUPWRGD 1 2 AP33 UNCOREPWRGOOD
@ RC25 0_0402_5%~D XDP_TRST# 51_0402_5% 1 2 RC41
SM_RCOMP0 140_0402_1% 1 2 RC42
DBR# AL35 XDP_DBRESET#_R @
@RC26
RC26 1 2 0_0402_5%~D XDP_DBRESET# XDP_DBRESET# 16,18
VDDPWRGOOD 1 2 VDDPWRGOOD_R V8 SM_RCOMP1 25.5_0402_1%~D 1 2 RC43
RC28 130_0402_1% SM_DRAMPWROK
AT28 XDP_BPM#0_R @ RC30
@RC30 1 2 0_0402_5% XDP_BPM#0 SM_RCOMP2 200_0402_1% 1 2 RC45
BPM#[0] XDP_BPM#1_R @RC31
@ RC31 0_0402_5% XDP_BPM#1
BPM#[1] AR29 1 2
AR30 XDP_BPM#2_R @RC33
@ RC33 1 2 0_0402_5% XDP_BPM#2
BUF_CPU_RST# BPM#[2] XDP_BPM#3_R @RC34
@ RC34 0_0402_5% XDP_BPM#3
AR33 RESET# BPM#[3] AT30 1 2
AP32 XDP_BPM#4_R @RC36
@ RC36 1 2 0_0402_5% XDP_BPM#4
BPM#[4] XDP_BPM#5_R @RC37
@ RC37 0_0402_5% XDP_BPM#5
BPM#[5] AR31 1 2
AT31 XDP_BPM#6_R @RC38
@ RC38 1 2 0_0402_5% XDP_BPM#6
BPM#[6] XDP_BPM#7_R @RC39
@ RC39 0_0402_5% XDP_BPM#7
BPM#[7] AR32 1 2
A A

TYCO_2134146-3_IVYBRIDGE~D

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC M/B LA-8321
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
4019H5
Date: Wednesday, August 01, 2012 Sheet 5 of 66
5 4 3 2 1
 5 4 3 2 1

JCPUC CONN@

JCPUD CONN@

10,12 DDR_A_D[0..63] AB6 M_CLK_DDR0 M_CLK_DDR0 12

SA_CK[0] M_CLK_DDR#0
SA_CLK#[0] AA6 M_CLK_DDR#0 12
D DDR_A_D0 C5 V9 DDR_CKE0_DIMMA0 DDR_CKE0_DIMMA0 12 11,13 DDR_B_D[0..63] AE2 M_CLK_DDR2 D
DDR_A_D1 SA_DQ[0] SA_CKE[0] SB_CK[0] M_CLK_DDR#2 M_CLK_DDR2 13
D5 SA_DQ[1] SB_CLK#[0] AD2 M_CLK_DDR#2 13
DDR_A_D2 D3 DDR_B_D0 C9 R9 DDR_CKE2_DIMMB0
DDR_A_D3 SA_DQ[2] DDR_B_D1 SB_DQ[0] SB_CKE[0] DDR_CKE2_DIMMB0 13
D2 SA_DQ[3] A7 SB_DQ[1]
DDR_A_D4 D6 AA5 M_CLK_DDR1 M_CLK_DDR1 12 DDR_B_D2 D10
DDR_A_D5 SA_DQ[4] SA_CK[1] M_CLK_DDR#1 DDR_B_D3 SB_DQ[2]
C6 SA_DQ[5] SA_CLK#[1] AB5 M_CLK_DDR#1 12 C8 SB_DQ[3]
DDR_A_D6 C2 V10 DDR_CKE1_DIMMA0 DDR_CKE1_DIMMA0 12 DDR_B_D4 A9 AE1 M_CLK_DDR3
DDR_A_D7 SA_DQ[6] SA_CKE[1] DDR_B_D5 SB_DQ[4] SB_CK[1] M_CLK_DDR#3 M_CLK_DDR3 13
C3 SA_DQ[7] A8 SB_DQ[5] SB_CLK#[1] AD1 M_CLK_DDR#3 13
DDR_A_D8 F10 DDR_B_D6 D9 R10 DDR_CKE3_DIMMB0
DDR_A_D9 SA_DQ[8] DDR_B_D7 SB_DQ[6] SB_CKE[1] DDR_CKE3_DIMMB0 13
F8 SA_DQ[9] D8 SB_DQ[7]
DDR_A_D10 G10 AB4 M_CLK_DDR4 M_CLK_DDR4 10 DDR_B_D8 G4
DDR_A_D11 SA_DQ[10] SA_CK[2] M_CLK_DDR#4 DDR_B_D9 SB_DQ[8]
G9 SA_DQ[11] SA_CLK#[2] AA4 M_CLK_DDR#4 10 F4 SB_DQ[9]
DDR_A_D12 F9 W9 DDR_CKE4_DIMMA1 DDR_CKE4_DIMMA1 10 DDR_B_D10 F1 AB2 M_CLK_DDR6
DDR_A_D13 SA_DQ[12] SA_CKE[2] DDR_B_D11 SB_DQ[10] SB_CK[2] M_CLK_DDR#6 M_CLK_DDR6 11
F7 SA_DQ[13] G1 SB_DQ[11] SB_CLK#[2] AA2 M_CLK_DDR#6 11
DDR_A_D14 G8 DDR_B_D12 G5 T9 DDR_CKE6_DIMMB1
DDR_A_D15 SA_DQ[14] DDR_B_D13 SB_DQ[12] SB_CKE[2] DDR_CKE6_DIMMB1 11
G7 SA_DQ[15] F5 SB_DQ[13]
DDR_A_D16 K4 AB3 M_CLK_DDR5 M_CLK_DDR5 10 DDR_B_D14 F2
DDR_A_D17 SA_DQ[16] SA_CK[3] M_CLK_DDR#5 DDR_B_D15 SB_DQ[14]
K5 SA_DQ[17] SA_CLK#[3] AA3 M_CLK_DDR#5 10 G2 SB_DQ[15]
DDR_A_D18 K1 W10 DDR_CKE5_DIMMA1 DDR_CKE5_DIMMA1 10 DDR_B_D16 J7 AA1 M_CLK_DDR7
DDR_A_D19 SA_DQ[18] SA_CKE[3] DDR_B_D17 SB_DQ[16] SB_CK[3] M_CLK_DDR#7 M_CLK_DDR7 11
J1 SA_DQ[19] J8 SB_DQ[17] SB_CLK#[3] AB1 M_CLK_DDR#7 11
DDR_A_D20 J5 DDR_B_D18 K10 T10 DDR_CKE7_DIMMB1
DDR_A_D21 SA_DQ[20] DDR_B_D19 SB_DQ[18] SB_CKE[3] DDR_CKE7_DIMMB1 11
J4 SA_DQ[21] K9 SB_DQ[19]
DDR_A_D22 J2 AK3 DDR_CS0_DIMMA0# DDR_CS0_DIMMA0# 12 DDR_B_D20 J9
DDR_A_D23 SA_DQ[22] SA_CS#[0] DDR_CS1_DIMMA0# DDR_B_D21 SB_DQ[20]
K2 SA_DQ[23] SA_CS#[1] AL3 DDR_CS1_DIMMA0# 12 J10 SB_DQ[21]
DDR_A_D24 M8 AG1 DDR_CS4_DIMMA1# DDR_CS4_DIMMA1# 10 DDR_B_D22 K8 AD3 DDR_CS2_DIMMB0#
DDR_A_D25 SA_DQ[24] SA_CS#[2] DDR_CS5_DIMMA1# DDR_B_D23 SB_DQ[22] SB_CS#[0] DDR_CS3_DIMMB0# DDR_CS2_DIMMB0# 13
N10 SA_DQ[25] SA_CS#[3] AH1 DDR_CS5_DIMMA1# 10 K7 SB_DQ[23] SB_CS#[1] AE3 DDR_CS3_DIMMB0# 13
DDR_A_D26 N8 DDR_B_D24 M5 AD6 DDR_CS6_DIMMB1#
DDR_A_D27 SA_DQ[26] DDR_B_D25 SB_DQ[24] SB_CS#[2] DDR_CS7_DIMMB1# DDR_CS6_DIMMB1# 11
N7 SA_DQ[27] N4 SB_DQ[25] SB_CS#[3] AE6 DDR_CS7_DIMMB1# 11
DDR_A_D28 M10 DDR_B_D26 N2
DDR_A_D29 SA_DQ[28] M_ODT0 DDR_B_D27 SB_DQ[26]
M9 SA_DQ[29] SA_ODT[0] AH3 M_ODT0 12 N1 SB_DQ[27]
DDR_A_D30 N9 AG3 M_ODT1 M_ODT1 12 DDR_B_D28 M4
DDR_A_D31 SA_DQ[30] SA_ODT[1] M_ODT4 DDR_B_D29 SB_DQ[28] M_ODT2
M7 SA_DQ[31] SA_ODT[2] AG2 M_ODT4 10 N5 SB_DQ[29] SB_ODT[0] AE4 M_ODT2 13
DDR SYSTEM MEMORY A

DDR_A_D32 AG6 AH2 M_ODT5 M_ODT5 10 DDR_B_D30 M2 AD4 M_ODT3

DDR_A_D33 SA_DQ[32] SA_ODT[3] DDR_B_D31 SB_DQ[30] SB_ODT[1] M_ODT6 M_ODT3 13
AG5 M1 AD5

DDR SYSTEM MEMORY B

DDR_A_D34 SA_DQ[33] DDR_B_D32 SB_DQ[31] SB_ODT[2] M_ODT7 M_ODT6 11
C
AK6 SA_DQ[34] AM5 SB_DQ[32] SB_ODT[3] AE5 M_ODT7 11 C
DDR_A_D35 AK5 DDR_B_D33 AM6
DDR_A_D36 SA_DQ[35] DDR_B_D34 SB_DQ[33]
AH5 SA_DQ[36] DDR_A_DQS#[0..7] 10,12 AR3 SB_DQ[34]
DDR_A_D37 AH6 C4 DDR_A_DQS#0 DDR_B_D35 AP3
DDR_A_D38 SA_DQ[37] SA_DQS#[0] DDR_A_DQS#1 DDR_B_D36 SB_DQ[35]
AJ5 SA_DQ[38] SA_DQS#[1] G6 AN3 SB_DQ[36] DDR_B_DQS#[0..7] 11,13
DDR_A_D39 AJ6 J3 DDR_A_DQS#2 DDR_B_D37 AN2 D7 DDR_B_DQS#0
DDR_A_D40 SA_DQ[39] SA_DQS#[2] DDR_A_DQS#3 DDR_B_D38 SB_DQ[37] SB_DQS#[0] DDR_B_DQS#1
AJ8 SA_DQ[40] SA_DQS#[3] M6 AN1 SB_DQ[38] SB_DQS#[1] F3
DDR_A_D41 AK8 AL6 DDR_A_DQS#4 DDR_B_D39 AP2 K6 DDR_B_DQS#2
DDR_A_D42 SA_DQ[41] SA_DQS#[4] DDR_A_DQS#5 DDR_B_D40 SB_DQ[39] SB_DQS#[2] DDR_B_DQS#3
AJ9 SA_DQ[42] SA_DQS#[5] AM8 AP5 SB_DQ[40] SB_DQS#[3] N3
DDR_A_D43 AK9 AR12 DDR_A_DQS#6 DDR_B_D41 AN9 AN5 DDR_B_DQS#4
DDR_A_D44 SA_DQ[43] SA_DQS#[6] DDR_A_DQS#7 DDR_B_D42 SB_DQ[41] SB_DQS#[4] DDR_B_DQS#5
AH8 SA_DQ[44] SA_DQS#[7] AM15 AT5 SB_DQ[42] SB_DQS#[5] AP9
DDR_A_D45 AH9 DDR_B_D43 AT6 AK12 DDR_B_DQS#6
DDR_A_D46 SA_DQ[45] DDR_B_D44 SB_DQ[43] SB_DQS#[6] DDR_B_DQS#7
AL9 SA_DQ[46] AP6 SB_DQ[44] SB_DQS#[7] AP15
DDR_A_D47 AL8 DDR_B_D45 AN8
DDR_A_D48 SA_DQ[47] DDR_B_D46 SB_DQ[45]
AP11 SA_DQ[48] DDR_A_DQS[0..7] 10,12 AR6 SB_DQ[46]
DDR_A_D49 AN11 D4 DDR_A_DQS0 DDR_B_D47 AR5
DDR_A_D50 SA_DQ[49] SA_DQS[0] DDR_A_DQS1 DDR_B_D48 SB_DQ[47]
AL12 SA_DQ[50] SA_DQS[1] F6 AR9 SB_DQ[48] DDR_B_DQS[0..7] 11,13
DDR_A_D51 AM12 K3 DDR_A_DQS2 DDR_B_D49 AJ11 C7 DDR_B_DQS0
DDR_A_D52 SA_DQ[51] SA_DQS[2] DDR_A_DQS3 DDR_B_D50 SB_DQ[49] SB_DQS[0] DDR_B_DQS1
AM11 SA_DQ[52] SA_DQS[3] N6 AT8 SB_DQ[50] SB_DQS[1] G3
DDR_A_D53 AL11 AL5 DDR_A_DQS4 DDR_B_D51 AT9 J6 DDR_B_DQS2
DDR_A_D54 SA_DQ[53] SA_DQS[4] DDR_A_DQS5 DDR_B_D52 SB_DQ[51] SB_DQS[2] DDR_B_DQS3
AP12 SA_DQ[54] SA_DQS[5] AM9 AH11 SB_DQ[52] SB_DQS[3] M3
DDR_A_D55 AN12 AR11 DDR_A_DQS6 DDR_B_D53 AR8 AN6 DDR_B_DQS4
DDR_A_D56 SA_DQ[55] SA_DQS[6] DDR_A_DQS7 DDR_B_D54 SB_DQ[53] SB_DQS[4] DDR_B_DQS5
AJ14 SA_DQ[56] SA_DQS[7] AM14 AJ12 SB_DQ[54] SB_DQS[5] AP8
DDR_A_D57 AH14 DDR_B_D55 AH12 AK11 DDR_B_DQS6
DDR_A_D58 SA_DQ[57] DDR_B_D56 SB_DQ[55] SB_DQS[6] DDR_B_DQS7
AL15 SA_DQ[58] AT11 SB_DQ[56] SB_DQS[7] AP14
DDR_A_D59 AK15 DDR_B_D57 AN14
DDR_A_D60 SA_DQ[59] DDR_B_D58 SB_DQ[57]
AL14 SA_DQ[60] DDR_A_MA[0..15] 10,12 AR14 SB_DQ[58]
DDR_A_D61 AK14 AD10 DDR_A_MA0 DDR_B_D59 AT14
DDR_A_D62 SA_DQ[61] SA_MA[0] DDR_A_MA1 DDR_B_D60 SB_DQ[59]
AJ15 SA_DQ[62] SA_MA[1] W1 AT12 SB_DQ[60] DDR_B_MA[0..15] 11,13
DDR_A_D63 AH15 W2 DDR_A_MA2 DDR_B_D61 AN15 AA8 DDR_B_MA0
SA_DQ[63] SA_MA[2] DDR_A_MA3 DDR_B_D62 SB_DQ[61] SB_MA[0] DDR_B_MA1
SA_MA[3] W7 AR15 SB_DQ[62] SB_MA[1] T7
V3 DDR_A_MA4 DDR_B_D63 AT15 R7 DDR_B_MA2
SA_MA[4] DDR_A_MA5 SB_DQ[63] SB_MA[2] DDR_B_MA3
SA_MA[5] V2 SB_MA[3] T6
W3 DDR_A_MA6 T2 DDR_B_MA4
SA_MA[6] DDR_A_MA7 SB_MA[4] DDR_B_MA5
10,12 DDR_A_BS0 AE10 SA_BS[0] SA_MA[7] W6 SB_MA[5] T4
B AF10 V1 DDR_A_MA8 T3 DDR_B_MA6 B
10,12 DDR_A_BS1 SA_BS[1] SA_MA[8] DDR_A_MA9 SB_MA[6] DDR_B_MA7
10,12 DDR_A_BS2 V6 SA_BS[2] SA_MA[9] W5 11,13 DDR_B_BS0 AA9 SB_BS[0] SB_MA[7] R2
AD8 DDR_A_MA10 AA7 T5 DDR_B_MA8
SA_MA[10] DDR_A_MA11 11,13 DDR_B_BS1 SB_BS[1] SB_MA[8] DDR_B_MA9
SA_MA[11] V4 11,13 DDR_B_BS2 R6 SB_BS[2] SB_MA[9] R3
W4 DDR_A_MA12 AB7 DDR_B_MA10
SA_MA[12] DDR_A_MA13 SB_MA[10] DDR_B_MA11
10,12 DDR_A_CAS# AE8 SA_CAS# SA_MA[13] AF8 SB_MA[11] R1
AD9 V5 DDR_A_MA14 T1 DDR_B_MA12
10,12 DDR_A_RAS# SA_RAS# SA_MA[14] DDR_A_MA15 SB_MA[12] DDR_B_MA13
10,12 DDR_A_WE# AF9 SA_WE# SA_MA[15] V7 11,13 DDR_B_CAS# AA10 SB_CAS# SB_MA[13] AB10
AB8 R5 DDR_B_MA14
11,13 DDR_B_RAS# SB_RAS# SB_MA[14] DDR_B_MA15
11,13 DDR_B_WE# AB9 SB_WE# SB_MA[15] R4

TYCO_2134146-3_IVYBRIDGE~D

TYCO_2134146-3_IVYBRIDGE~D

+1.5V
1

RC49
1K_0402_5%
2
S

5 H_DRAMRST# H_DRAMRST# 3 1 DDR3_DRAMRST#_R 1 2 DDR3_DRAMRST# 10,11,12,13

RC124 1K_0402_5%
1

RC50 QC2 BSS138_SOT23~D

G
2

4.99K_0402_1%
2

A A

10,11,17 DRAMRST_CNTRL_PCH 1 2 DRAMRST_CNTRL

@ RC46 0_0402_5%~D

1 2
40 DRAMRST_CNTRL_EC
@ RC47 0_0402_5% 1 DELL CONFIDENTIAL/PROPRIETARY
CC177
0.047U_0402_16V7K~D
Compal Electronics, Inc.
2 PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC M/B LA-8321
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
4019H5
Date: Wednesday, August 01, 2012 Sheet 6 of 66
5 4 3 2 1
 5 4 3 2 1

CFG Straps for Processor

D D
CFG2

1
JCPUE CONN@ @ RC51
1K_0402_1%

2
AH27 @ T7 PAD~D
CFG0 VCC_DIE_SENSE @ T8 PAD~D
5 CFG0 AK28 CFG[0] VSS_DIE_SENSE AH26
5 CFG1 CFG1 AK29
CFG2 CFG[1]
5 CFG2 AL26 CFG[2]
5 CFG3 CFG3 AL27
CFG4 CFG[3] @ T1 PAD~D
5 CFG4 AK26 CFG[4] RSVD28 L7
5 CFG5 CFG5 AL29 CFG[5] RSVD29 AG7 @ T2 PAD~D PEG Static Lane Reversal - CFG2 is for the 16x
5 CFG6 CFG6 AL30 AE7 @ T9 PAD~D
CFG7 CFG[6] RSVD30 @ T10 PAD~D
5 CFG7 AM31 CFG[7] RSVD31 AK2
5 CFG8 CFG8 AM32 CFG[8] 1:(Default) Normal Operation; Lane #
5 CFG9 CFG9 AM30 CFG[9] RSVD32 W8 @ T11 PAD~D CFG2 definition matches socket pin map definition

CFG
5 CFG10 CFG10 AM28
+VCC_GFXCORE_AXG CFG[10]
5 CFG11 CFG11 AM26 CFG[11] 0:Lane Reversed
PAD~D T5 @ AN28 AT26 @ T12 PAD~D
+VCC_CORE PAD~D T20 @ CFG[12] RSVD33 @ T14 PAD~D
AN31 CFG[13] RSVD34 AM33
PAD~D T24 @ AN26 AJ27 @ T16 PAD~D
CFG[14] RSVD35
2

@ PAD~D T22 @ AM27 CFG4

RC122 CFG16 CFG[15]
5 CFG16 AK31 CFG[16]

1
50_0402_1% 5 CFG17 CFG17 AN29 CFG[17]
2

@ @ RC52
RC120 1K_0402_1%
1

50_0402_1% T8 @ T4 PAD~D
RSVD37 @ T18 PAD~D
J16

2
VCC_AXG_VAL_SENSE AJ31 RSVD38 @ T19 PAD~D
H16
1

VSS_AXG_VAL_SENSE AH31 VAXG_VAL_SENSE RSVD39 @ T21 PAD~D

VSSAXG_VAL_SENSE RSVD40 G16
VCC_VAL_SENSE AJ33
VSS_VAL_SENSE VCC_VAL_SENSE
C
AH33 VSS_VAL_SENSE C

VSS_AXG_VAL_SENSE PAD~D T28 @ AJ26 RSVD5 RSVD_NCTF1 AR35 @ T23 PAD~D Display Port Presence Strap
AT34 @ T25 PAD~D
RSVD_NCTF2 @ T27 PAD~D
AT33

RESERVED
RSVD_NCTF3
VSS_VAL_SENSE
RSVD_NCTF4 AP35 @ T29 PAD~D 1 : Disabled; No Physical Display Port
RSVD_NCTF5 AR34 @ T31 PAD~D CFG4 attached to Embedded Display Port
2

@ @
RC123 RC121 PAD~D T36 @ F25 RSVD8 0 : Enabled; An external Display Port device is
50_0402_1% PAD~D T37 @ F24
50_0402_1%
PAD~D T38 @ F23
RSVD9 connected to the Embedded Display Port
PAD~D T39 @ RSVD10 @ T33 PAD~D
D24 B34
1

PAD~D T41 @ RSVD11 RSVD_NCTF6 @ T34 PAD~D

G25 RSVD12 RSVD_NCTF7 A33
PAD~D T43 @ G24 A34 @ T35 PAD~D
PAD~D T44 @ RSVD13 RSVD_NCTF8 @ T40 PAD~D CFG6
E23 RSVD14 RSVD_NCTF9 B35
PAD~D T45 @ D23 C35 @ T42 PAD~D
PAD~D T46 @ RSVD15 RSVD_NCTF10 CFG5
C30 RSVD16
PAD~D T48 @ A31 RSVD17

1
INTEL 12/28 recommand PAD~D T49 @ B30 RSVD18
PAD~D T50 @ B29 RC54 @ RC53
to add RC120, RC121, RC122, RC123 PAD~D T51 @ D30
RSVD19
AJ32 @ T47 PAD~D 1K_0402_1% 1K_0402_1%
RSVD20 RSVD51
Please place as close as JCPU1 PAD~D T53 @ B31 RSVD21 RSVD52 AK32 @ T59 PAD~D
PAD~D T55 @ A30

2
PAD~D T56 @ RSVD22
C29 RSVD23

BCLK_ITP AN35 CLK_RES_ITP 17

PAD~D T57 @ J20 AM35
RSVD24 BCLK_ITP# CLK_RES_ITP# 17
PAD~D T58 @ B18 RSVD25

PAD~D T62 @ J15 RSVD27 RSVD_NCTF11 AT2 @ T60 PAD~D PCIE Port Bifurcation Straps
AT1 @ T61 PAD~D
RSVD_NCTF12 @ T63 PAD~D
B
RSVD_NCTF13 AR1 B
11: (Default) x16 - Device 1 functions 1 and 2 disabled
Need PWR add new circuit on 1.05V(refer CRB) CFG[6:5] 10: x8, x8 - Device 1 function 1 enabled ; function 2
B1 @ T64 PAD~D
KEY disabled
01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
TYCO_2134146-3_IVYBRIDGE~D

CFG7

1
@ RC56
1K_0402_1%

2
PEG DEFER TRAINING

1: (Default) PEG Train immediately

CFG7 following xxRESETB de assertion
0: PEG Wait for BIOS for training
A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC M/B LA-8321
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
4019H5
Date: Wednesday, August 01, 2012 Sheet 7 of 66
5 4 3 2 1
 5 4 3 2 1

JCPUF CONN@ POWER

+VCC_CORE
+VCCP
94AAG35 8.5A PDDG 0.7@P12
VCC1
D AG34 VCC2 VCCIO1 AH13 D
AG33 VCC3 VCCIO2 AH10
AG32 VCC4 VCCIO3 AG10
AG31 VCC5 VCCIO4 AC10
AG30 VCC6 VCCIO5 Y10
AG29 VCC7 VCCIO6 U10
AG28 VCC8 VCCIO7 P10
AG27 VCC9 VCCIO8 L10
AG26 VCC10 VCCIO9 J14
AF35 VCC11 VCCIO10 J13
AF34 VCC12 VCCIO11 J12
AF33 VCC13 VCCIO12 J11
AF32 VCC14 VCCIO13 H14
AF31 VCC15 VCCIO14 H12
AF30 VCC16 VCCIO15 H11
AF29 VCC17 VCCIO16 G14
AF28 VCC18 VCCIO17 G13
AF27 VCC19 VCCIO18 G12

PEG AND DDR

AF26 VCC20 VCCIO19 F14
AD35 VCC21 VCCIO20 F13
AD34 VCC22 VCCIO21 F12
AD33 VCC23 VCCIO22 F11
AD32 VCC24 VCCIO23 E14
AD31 VCC25 VCCIO24 E12
AD30 VCC26
AD29 VCC27 VCCIO25 E11
AD28 VCC28 VCCIO26 D14
AD27 VCC29 VCCIO27 D13
AD26 VCC30 VCCIO28 D12
AC35 VCC31 VCCIO29 D11
AC34 VCC32 VCCIO30 C14
AC33 VCC33 VCCIO31 C13
AC32 VCC34 VCCIO32 C12
AC31 VCC35 VCCIO33 C11
C
AC30 VCC36 VCCIO34 B14 C
AC29 VCC37 VCCIO35 B12
AC28 VCC38 VCCIO36 A14
AC27 VCC39 VCCIO37 A13
AC26 VCC40 VCCIO38 A12
AA35 VCC41 VCCIO39 A11
AA34 VCC42
AA33 VCC43 VCCIO40 J23
AA32 VCC44
AA31 VCC45
AA30 VCC46
AA29 VCC47
AA28 VCC48
AA27 VCC49
AA26 VCC50 +VCCP
Y35 VCC51
Place the PU

CORE SUPPLY
Y34 VCC52
Y33
Y32
VCC53 resistors close to CPU
VCC54
Y31 VCC55

1
Y30 VCC56
Y29 RC63 RC60
VCC57 130_0402_1%
Y28 VCC58 75_0402_1%
Y27 VCC59
Y26

2
VCC60
V35 VCC61
V34 AJ29 H_CPU_SVIDALRT# RC61 1 2 43_0402_1% VR_SVID_ALRT# 53,55
VCC62 VIDALERT#

SVID
V33 AJ30 H_CPU_SVIDCLK @ RC59 1 2 0_0402_5%~D VR_SVID_CLK 53,55
VCC63 VIDSCLK H_CPU_SVIDDAT @ RC65 1
V32 VCC64 VIDSOUT AJ28 2 0_0402_5%~D VR_SVID_DAT 53,55
V31 VCC65
V30 VCC66
V29 VCC67
V28 VCC68
V27 VCC69
V26 VCC70
B U35 VCC71
B
U34 VCC72
U33 VCC73
U32 VCC74
U31 VCC75
U30 VCC76
U29 VCC77
U28 VCC78
U27 VCC79
U26 VCC80
R35 +VCC_CORE
VCC81
R34 VCC82
R33 VCC83

1
R32 VCC84
R31 RC66
VCC85
R30 VCC86 100_0402_1%
R29 VCC87
R28

2
VCC88
SENSE LINES

R27 VCC89 VCC_SENSE AJ35 VCCSENSE_R @ RC67 1 2 0_0402_5%~D VCCSENSE 53

R26 VCC90 VSS_SENSE AJ34 VSSSENSE_R @ RC68 1 2 0_0402_5%~D VSSSENSE 53
P35 VCC91
P34 VCC92

1
P33 VCC93
P32 VCC94 VCCIO_SENSE B10 VCCIO_SENSE VCCIO_SENSE 49 RC70
P31 VCC95 VSS_SENSE_VCCIO A10 VSSIO_SENSE 100_0402_1%
P30 VCC96
P29

2
VCC97 +VCCP
P28 VCC98
P27 VCC99
P26 VCC100
VCCIO_SENSE RC1701 1 2 10_0402_5%~D
VSSIO_SENSE RC1702 1 2 10_0402_5%~D

A A

TYCO_2134146-3_IVYBRIDGE~D 0902 RC1701 and RC1702 near close to CPU,

ask power to remove PR111 and PR104
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC M/B LA-8321
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
4019H5
Date: Wednesday, August 01, 2012 Sheet 8 of 66
5 4 3 2 1
 5 4 3 2 1

+1.5V_CPU_VDDQ Source
+1.5V QC3 +1.5V_CPU_VDDQ
+3VALW B+_BIAS AO4728L_SO8~D
8 1 JCPUH CONN@
7 2

20K_0402_5%
6 3 1 AT35 VSS1 VSS81 AJ22

10U_0805_25V6K~D
5 AT32 VSS2 VSS82 AJ19

CC135

RC73
RC72 AT29 AJ16
RC74 100K_0402_5% VSS3 VSS83
AT27 AJ13

4
100K_0402_5% 2 VSS4 VSS84
AT25 AJ10

2
VSS5 VSS85
AT22 VSS6 VSS86 AJ7
RUN_ON_CPU1.5VS3 AT19 AJ4

2
VSS7 VSS87
AT16 VSS8 VSS88 AJ3
+1.5V_CPU_VDDQ

0.1U_0603_50V7K~D
330K_0402_5%~D
D
D AT13 VSS9 VSS89 AJ2 D

1
1 AT10 VSS10 VSS90 AJ1

RC75
RUN_ON_CPU1.5VS3# 5 AT7 AH35
G VSS11 VSS91

CC136
AT4 VSS12 VSS92 AH34

1
AT3 VSS13 VSS93 AH32
S 2 RC118 AR25 AH30

2
QC4B 1K_0402_1%~D VSS14 VSS94
D AR22 VSS15 VSS95 AH29

6
DMN66D0LDW-7 +V_SM_VREF_CNT AR19 AH28
@RC77
@ RC77 1 VSS16 VSS96
21,40,42,43,49,50,51 SUSP# 2 0_0402_5% 2 AR16 AH25

2
G VSS17 VSS98
AR13 VSS18 VSS99 AH22
AR10 VSS19 VSS100 AH19
40 CPU1.5V_S3_GATE @RC79
@ RC79 1 2 0_0402_5%~D S AR7 AH16

1
QC4A VSS20 VSS101
RUN_ON_CPU1.5VS3# 5,42 AR4 VSS21 VSS102 AH7

1
DMN66D0LDW-7 AR2 VSS22 VSS103 AH4
RC119 AP34 AG9
1K_0402_1%~D VSS23 VSS104
AP31 VSS24 VSS105 AG8
AP28 VSS25 VSS106 AG4
+VCC_GFXCORE_AXG +VCC_GFXCORE_AXG +VCC_GFXCORE_AXG
AP25 AF6

2
VSS26 VSS107
AP22 VSS27 VSS108 AF5
+VCC_GFXCORE_AXG_P AP19 AF3
VSS28 VSS109
2

POWER
AP16 VSS29 VSS110 AF2
PJP31 PJP33 PJP34 AP13 AE35
VSS30 VSS111
PAD-OPEN 4x4m PAD-OPEN 4x4m PAD-OPEN 4x4m AP10 VSS31 VSS112 AE34
JCPUG CONN@
QC5 AP7
AP4
VSS32 VSS113 AE33
AE32
33A Follow E3 AP1
VSS33 VSS114
AE31
1

VSS34 VSS115
AT24 AK35 AN30 AE30
VAXG1 VAXG_SENSE VCC_AXG_SENSE 55
Macallan 13" VSS35 VSS116

SENSE
LINES
AT23 VAXG2 VSSAXG_SENSE AK34 VSS_AXG_SENSE 55 AN27 VSS36 VSS117 AE29
AT21
AT20
AT18
VAXG3
VAXG4
VAXG5
+V_SM_VREF should
AN25
AN22
AN19
VSS37
VSS38
VSS39
VSS VSS118
VSS119
VSS120
AE28
AE27
AE26
AT17 VAXG6 have 10 mil trace width AN16 VSS40 VSS121 AE9
AR24 VAXG7 AN13 VSS41 VSS122 AD7
AR23 VAXG8 AN10 VSS42 VSS123 AC9
AR21 +V_SM_VREF_CNT CC149 2 1 0.1U_0402_25V6K~D AN7 AC8
C VAXG9 VSS43 VSS124 C
AR20 VAXG10 AN4 VSS44 VSS125 AC6
AR18 VAXG11 SM_VREF AL1 AM29 VSS45 VSS126 AC5
AR17 CC150 2 1 0.1U_0402_25V6K~D AM25 AC3
VAXG12 VSS46 VSS127
AP24 VAXG13 AM22 VSS47 VSS128 AC2

VREF
AP23 VAXG14 AM19 VSS48 VSS129 AB35
AP21 CC178 2 1 0.1U_0402_25V6K~D AM16 AB34
VAXG15 VSS49 VSS130
AP20 VAXG16 SA_DIMM_VREFDQ B4 +V_DDR_REFA_R 10 AM13 VSS50 VSS131 AB33
AP18 VAXG17 SB_DIMM_VREFDQ D1 +V_DDR_REFB_R 11 AM10 VSS51 VSS132 AB32
AP17 CC182 2 1 0.1U_0402_25V6K~D AM7 AB31
VAXG18 VSS52 VSS133
AN24 VAXG19 AM4 VSS53 VSS134 AB30
AN23 VAXG20 AM3 VSS54 VSS135 AB29
AN21 AM2 AB28
AN20
VAXG21 5A +1.5V_CPU_VDDQ AM1
VSS55 VSS136
AB27
VAXG22 VSS56 VSS137
AN18 VAXG23 AL34 VSS57 VSS138 AB26
DDR3 -1.5V RAILS
AN17 @PJP30
@ PJP30 AL31 Y9
VAXG24 VSS58 VSS139
AM24 VAXG25 VDDQ1 AF7 1 2 +1.5V AL28 VSS59 VSS140 Y8
GRAPHICS

AM23 VAXG26 VDDQ2 AF4 AL25 VSS60 VSS141 Y6

AM21 AF1 PAD-OPEN 4x4m AL22 Y5
VAXG27 VDDQ3 VSS61 VSS142

10U_0805_25V6K~D

10U_0805_25V6K~D

10U_0805_25V6K~D

10U_0805_25V6K~D

10U_0805_25V6K~D

10U_0805_25V6K~D
AM20 VAXG28 VDDQ4 AC7 1 1 1 1 1 1 1 AL19 VSS62 VSS143 Y3
AM18 VAXG29 VDDQ5 AC4 PJP30 OPEN AL16 VSS63 VSS144 Y2
+ CC167

CC161

CC162

CC163

CC164

CC165

CC166
AM17 VAXG30 VDDQ6 AC1 AL13 VSS64 VSS145 W35
AL24 VAXG31 VDDQ7 Y7 330U_D2_2.5VM_R6M~D AL10 VSS65 VSS146 W34
2 2 2 2 2 2
AL23 Y4 AL7 W33

<BOM Structure>
VAXG32 VDDQ8 2 VSS66 VSS147
AL21 VAXG33 VDDQ9 Y1 AL4 VSS67 VSS148 W32
AL20 VAXG34 VDDQ10 U7 AL2 VSS68 VSS149 W31
AL18 VAXG35 VDDQ11 U4 AK33 VSS69 VSS150 W30
AL17 VAXG36 VDDQ12 U1 AK30 VSS70 VSS151 W29
AK24 VAXG37 VDDQ13 P7 AK27 VSS71 VSS152 W28
AK23 VAXG38 VDDQ14 P4 AK25 VSS72 VSS153 W27
AK21 VAXG39 VDDQ15 P1 AK22 VSS73 VSS154 W26
AK20 VAXG40 AK19 VSS74 VSS155 U9
AK18 VAXG41 AK16 VSS75 VSS156 U8
AK17 VAXG42 AK13 VSS76 VSS157 U6
AJ24 VAXG43 AK10 VSS77 VSS158 U5
B AJ23 VAXG44 AK7 VSS78 VSS159 U3 B
AJ21 VAXG45 +VCCSA AK4 VSS79 VSS160 U2
AJ20 VAXG46 AJ25 VSS80
AJ18 VAXG47 6A 1
10U_0805_25V6K~D

10U_0805_25V6K~D

10U_0805_25V6K~D

10U_0603_6.3V6M~D
AJ17 M27 1 1 1 1 @
VAXG48 VCCSA1 + CC172
AH24 VAXG49 VCCSA2 M26
SA RAIL

CC168

CC169

CC170

CC171
AH23 VAXG50 VCCSA3 L26 330U_D2_2.5VM_R6M~D
AH21 J26 TYCO_2134146-3_IVYBRIDGE~D

<BOM Structure>
VAXG51 VCCSA4 2 2 2 2 2
AH20 VAXG52 VCCSA5 J25
AH18 VAXG53 VCCSA6 J24
AH17 VAXG54 VCCSA7 H26
VCCSA8 H25

+1.8VS
1.8V RAIL

VCCSA_SENSE H23 VCCSA_SENSE 52

TBD
@ RC80 1 2 0_0805_5%~D +1.8VS_VCCPLL B6 VCCPLL1 H_FC_C22
A6 VCCPLL2 VCCSA_VID[0] C22 H_FC_C22 52
330U_D2_2.5VM_R6M~D

10U_0805_25V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

MISC

1 1 1 1 A2 VCCPLL3 VCCSA_VID[1] C24 1 VCCSA_SEL 52

+
CC176

CC173

CC174

CC175

@ RC55 @ RC81
2 2 2 A19 H_VCCP_SEL
VCCIO_SEL 1 2 VCCP_PWRCTRL 49 0_0402_5%
2
0_0402_5%~D
2

TYCO_2134146-3_IVYBRIDGE~D

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC M/B LA-8321
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
4019H5
Date: Wednesday, August 01, 2012 Sheet 9 of 66
5 4 3 2 1
 5 4 3 2 1

+1.5V +V_DDR_REFA
6,12 DDR_A_DQS#[0..7]

6,12 DDR_A_DQS[0..7]

1
6,12 DDR_A_D[0..63] RD7 RD1
1K_0402_1%~D 0_0402_5%~D
+1.5V +1.5V
6,12 DDR_A_MA[0..15] @
JDIMMA0

2
DIMM A0
+DIMM0_VREF 1 2
VREF_DQ VSS1 DDR_A_D1
3 VSS2 DQ4 4

2.2U_0603_10V7K~D

0.1U_0402_25V6K~D
M3 Circuit (Processor Generated SO-DIMM VREF_DQ) DDR_A_D4 5 6 DDR_A_D0
RD8 DDR_A_D5 DQ0 DQ5
7 DQ1 VSS3 8

REV TYPE (H9.2)

1K_0402_1%~D 1 1 9 10 DDR_A_DQS#0
@ RD15 1 VSS4 DQS#0 DDR_A_DQS0
D 2 0_0402_5%~D 11 DM0 DQS0 12 D

CD1

CD2
13 14

2
DDR_A_D2 VSS5 VSS6 DDR_A_D3
15 DQ2 DQ6 16
QD1 2 2 DDR_A_D7 DDR_A_D6
17 DQ3 DQ7 18
3 BSS138_NL_SOT23-3
D

S
+V_DDR_REFA 1 +V_DDR_REFA_R 9 19 VSS7 VSS8 20
DDR_A_D8 21 22 DDR_A_D12
DQ8 DQ12

1
DDR_A_D9 23 24 DDR_A_D13
RD16 DQ9 DQ13
25 26
G
2

1K_0402_5%~D DDR_A_DQS#1 VSS9 VSS10

27 DQS#1 DM1 28
6,11,17 DRAMRST_CNTRL_PCH @ DDR_A_DQS1 29 30 DDR3_DRAMRST#
DQS1 RESET# DDR3_DRAMRST# 6,11,12,13
31 32

2
DDR_A_D10 VSS11 VSS12 DDR_A_D14
33 DQ10 DQ14 34
DDR_A_D15 35 36 DDR_A_D11
DQ11 DQ15
37 38
(H9.2)(Rev)
VSS13 VSS14
DDR_A_D21 39 DQ16 DQ20 40 DDR_A_D17
CH A1
DDR_A_D20 41
43
DQ17
VSS15
DQ21
VSS16
42
44
DDR_A_D16
DIMM A0
Layout Note: DDR_A_DQS#2 45 DQS#2 DM2 46
DDR_A_DQS2
(H5.2)(Rev)
47 48
Place near JDIMMA 49
DQS2
VSS18
VSS17
DQ22 50 DDR_A_D22 CH B1
DDR_A_D19
DDR_A_D18
51
53
DQ18
DQ19
DQ23
VSS19
52
54
DDR_A_D23

DDR_A_D24 CPU TOP DIMM B0

55 VSS20 DQ28 56
DDR_A_D28 57 58 DDR_A_D31
DDR_A_D29 DQ24 DQ29
59 DQ25 VSS21 60
+1.5V
(H5.2)(Std)
DDR_A_DQS#3
61
63
65
VSS22
DM3
DQS#3
DQS3
62
64
66
DDR_A_DQS3
BOT CH B0 DIMM B1
DDR_A_D26 VSS23 VSS24 DDR_A_D30
67 DQ26 DQ30 68
1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

DDR_A_D27 69 70 DDR_A_D25
1 1 1 1 71
DQ27
VSS25
DQ31
VSS26 72 CH A0 (H9.2) (Std)
CD3

CD4

CD5

CD6

DIMM A1
2 2 2 2 DDR_CKE4_DIMMA1 DDR_CKE5_DIMMA1
C 6 DDR_CKE4_DIMMA1 73 CKE0 CKE1 74 DDR_CKE5_DIMMA1 6 C
75 VDD1 VDD2 76
77 78 DDR_A_MA15
DDR_A_BS2 NC1 A15 DDR_A_MA14
6,12 DDR_A_BS2 79 BA2 A14 80
81 VDD3 VDD4 82
DDR_A_MA12 83 84 DDR_A_MA11
DDR_A_MA9 A12/BC# A11 DDR_A_MA7
85 A9 A7 86
87 VDD5 VDD6 88
DDR_A_MA8 89 90 DDR_A_MA6
+1.5V DDR_A_MA5 A8 A6 DDR_A_MA4
91 A5 A4 92
93 VDD7 VDD8 94
DDR_A_MA3 95 96 DDR_A_MA2
DDR_A_MA1 A3 A2 DDR_A_MA0
97 A1 A0 98
10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

99 VDD9 VDD10 100

6 M_CLK_DDR4 M_CLK_DDR4 101 102 M_CLK_DDR5
CK0 CK1 M_CLK_DDR5 6
330U_SX_2VY~D

@ 1 6 M_CLK_DDR#4 M_CLK_DDR#4 103 104 M_CLK_DDR#5

CK0# CK1# M_CLK_DDR#5 6 +1.5V
1 1 1 1 1 1 1 105 VDD11 VDD12 106
+
CD7

CD8

CD9

CD10

CD11

CD12

CD13

CD14

DDR_A_MA10 107 108 DDR_A_BS1

A10/AP BA1 DDR_A_BS1 6,12
6,12 DDR_A_BS0 DDR_A_BS0 109 110 DDR_A_RAS#
BA0 RAS# DDR_A_RAS# 6,12
111 VDD13 VDD14 112

1
2 2 2 2 2 2 2 2 DDR_A_WE# DDR_CS4_DIMMA1#
6,12 DDR_A_WE# 113 WE# S0# 114 DDR_CS4_DIMMA1# 6
6,12 DDR_A_CAS# DDR_A_CAS# 115 116 M_ODT4 RD9
CAS# ODT0 M_ODT4 6
117 118 1K_0402_1%
DDR_A_MA13 VDD15 VDD16 M_ODT5
119 A13 ODT1 120 M_ODT5 6
6 DDR_CS5_DIMMA1# DDR_CS5_DIMMA1# 121 122

2
S1# NC2
123 VDD17 VDD18 124
125 126 +VREF_CA
NCTEST VREF_CA
127 VSS27 VSS28 128

2.2U_0603_10V7K~D

0.1U_0402_25V6K~D
DDR_A_D37 129 130 DDR_A_D32
DQ32 DQ36

1
DDR_A_D36 131 132 DDR_A_D33
DQ33 DQ37
Layout Note: 133 VSS29 VSS30 134 1 1 RD10
DDR_A_DQS#4 135 136 1K_0402_1%
Place near JDIMMA.203,204 DQS#4 DM4

CD15

CD16
DDR_A_DQS4 137 138
DQS4 VSS31 DDR_A_D35
139 140

2
DDR_A_D34 VSS32 DQ38 DDR_A_D38 2 2
141 DQ34 DQ39 142
B DDR_A_D39 143 144 B
DQ35 VSS33 DDR_A_D44
145 VSS34 DQ44 146
DDR_A_D41 147 148 DDR_A_D45
DDR_A_D40 DQ40 DQ45
149 DQ41 VSS35 150
151 152 DDR_A_DQS#5
VSS36 DQS#5 DDR_A_DQS5
153 DM5 DQS5 154
+0.75VS 155 156
DDR_A_D42 VSS37 VSS38 DDR_A_D46
157 DQ42 DQ46 158
DDR_A_D43 159 160 DDR_A_D47
DQ43 DQ47
161 VSS39 VSS40 162
DDR_A_D48 163 164 DDR_A_D53
DQ48 DQ52
1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

DDR_A_D49 165 166 DDR_A_D52

DQ49 DQ53
1 1 1 1 167 VSS41 VSS42 168
DDR_A_DQS#6 169 170
DQS#6 DM6
CD17

CD18

CD19

CD20

DDR_A_DQS6 171 172

DQS6 VSS43 DDR_A_D51
173 VSS44 DQ54 174
2 2 2 2 DDR_A_D55 175 176 DDR_A_D50
+3VS DDR_A_D54 DQ50 DQ55
177 DQ51 VSS45 178
179 180 DDR_A_D56
DDR_A_D60 VSS46 DQ60 DDR_A_D57
181 DQ56 DQ61 182
DDR_A_D61 183 184
DQ57 VSS47
2

185 186 DDR_A_DQS#7

R1831 @ R1832 VSS48 DQS#7 DDR_A_DQS7
187 DM7 DQS7 188
10K_0402_5%~D 10K_0402_5%~D 189 190
DDR_A_D63 VSS49 VSS50 DDR_A_D59
191 DQ58 DQ62 192
DDR_A_D62 193 194 DDR_A_D58
1

DQ59 DQ63
195 VSS51 VSS52 196
197 198 M_THERMAL# M_THERMAL# 11,12,13,40
SA0 EVENT# PCH_SMBDATA
+3VS 199 VDDSPD SDA 200 PCH_SMBDATA 5,11,12,13,16,17,34,35,43
201 202 PCH_SMBCLK
SA1 SCL PCH_SMBCLK 5,11,12,13,16,17,34,35,43
203 VTT1 VTT2 204 +0.75VS
2

+0.75VS
0.1U_0402_25V6K~D

2.2U_0603_10V7K~D

@ RD2 RD3 205 206

G1 G2
10K_0402_5%~D 10K_0402_5%~D 1 1
CD21

CD22

TYCO_2-2013311-1
A A
CONN@
1

2 2
CIS link OK
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC M/B LA-8321
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
4019H5
Date: Wednesday, August 01, 2012 Sheet 10 of 66
5 4 3 2 1
 5 4 3 2 1

6,13 DDR_B_DQS#[0..7]

6,13 DDR_B_DQS[0..7] +1.5V +V_DDR_REFB

6,13 DDR_B_D[0..63]

1
6,13 DDR_B_MA[0..15]
RD11 RD4
1K_0402_1%~D 0_0402_5%~D
@ +1.5V +1.5V
DIMM B0

2
JDIMMB0
+DIMM1_VREF 1 2
VREF_DQ VSS1

REV TYPE (H5.2)

3 4 DDR_B_D1
VSS2 DQ4

2.2U_0603_10V7K~D

0.1U_0402_25V6K~D
DDR_B_D5 5 6 DDR_B_D0
DQ0 DQ5

1
D DDR_B_D4 7 8 D
RD12 DQ1 VSS3 DDR_B_DQS#0
M3 Circuit (Processor Generated SO-DIMM VREF_DQ) 1K_0402_1%~D
1 1 9 VSS4 DQS#0 10
DDR_B_DQS0
11 DM0 DQS0 12

CD23

CD24
13 VSS5 VSS6 14
@ RD17 1 2 0_0402_5%~D DDR_B_D7 15 16 DDR_B_D2

2
2 2 DDR_B_D3 DQ2 DQ6 DDR_B_D6
17 DQ3 DQ7 18
19 VSS7 VSS8 20
QD2 DDR_B_D13 21 22 DDR_B_D8
DQ8 DQ12
3 BSS138_NL_SOT23-3 DDR_B_D9 DDR_B_D12
D

+V_DDR_REFB 1 S +V_DDR_REFB_R 9 23 DQ9 DQ13 24

25 VSS9 VSS10 26

1
DDR_B_DQS#1 27 28
RD18 DDR_B_DQS1 DQS#1 DM1 DDR3_DRAMRST#
29 30
G

DDR3_DRAMRST# 6,10,12,13
2

1K_0402_5%~D DQS1 RESET#

31 32
(H9.2)(Rev)
VSS11 VSS12
6,10,17 DRAMRST_CNTRL_PCH @ DDR_B_D14 33 DQ10 DQ14 34 DDR_B_D10
CH A1
DDR_B_D15 35 36 DDR_B_D11
DIMM A0

2
DQ11 DQ15
37 VSS13 VSS14 38
DDR_B_D21 39 40 DDR_B_D17
DDR_B_D20 DQ16 DQ20 DDR_B_D16
(H5.2)(Rev)
41 42
43
DQ17
VSS15
DQ21
VSS16 44 CH B1
DDR_B_DQS#2
DDR_B_DQS2
45
47
DQS#2
DQS2
DM2
VSS17
46
48
CPU TOP DIMM B0
49 50 DDR_B_D19
DDR_B_D23 VSS18 DQ22 DDR_B_D18
51 DQ18 DQ23 52
DDR_B_D22 53 54
DQ19 VSS19
(H5.2)(Std)
DDR_B_D29
Layout Note: DDR_B_D28
DDR_B_D24
55
57
59
VSS20
DQ24
DQ28
DQ29
56
58
60
DDR_B_D25
BOT CH B0 DIMM B1
Place near JDIMMB 61
DQ25 VSS21
62 DDR_B_DQS#3
VSS22 DQS#3 DDR_B_DQS3
63 64
65
DM3
VSS23
DQS3
VSS24 66 CH A0 (H9.2) (Std)
DDR_B_D30
DDR_B_D31
67
69
DQ26
DQ27
DQ30
DQ31
68
70
DDR_B_D26
DDR_B_D27 DIMM A1
71 VSS25 VSS26 72

C +1.5V C

6 DDR_CKE6_DIMMB1 DDR_CKE6_DIMMB1 73 74 DDR_CKE7_DIMMB1 DDR_CKE7_DIMMB1 6

CKE0 CKE1
75 VDD1 VDD2 76
77 78 DDR_B_MA15
NC1 A15
1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

6,13 DDR_B_BS2 DDR_B_BS2 79 80 DDR_B_MA14

BA2 A14
1 1 1 1 81 VDD3 VDD4 82
CD25

CD26

CD27

CD28

DDR_B_MA12 83 84 DDR_B_MA11
DDR_B_MA9 A12/BC# A11 DDR_B_MA7
85 A9 A7 86
87 VDD5 VDD6 88
2 2 2 2 DDR_B_MA8 DDR_B_MA6
89 A8 A6 90
DDR_B_MA5 91 92 DDR_B_MA4
A5 A4
93 VDD7 VDD8 94
DDR_B_MA3 95 96 DDR_B_MA2
DDR_B_MA1 A3 A2 DDR_B_MA0
97 A1 A0 98
99 VDD9 VDD10 100
6 M_CLK_DDR6 M_CLK_DDR6 101 102 M_CLK_DDR7 M_CLK_DDR7 6
M_CLK_DDR#6 CK0 CK1 M_CLK_DDR#7
6 M_CLK_DDR#6 103 CK0# CK1# 104 M_CLK_DDR#7 6
+1.5V +1.5V
105 VDD11 VDD12 106
DDR_B_MA10 107 108 DDR_B_BS1 DDR_B_BS1 6,13
DDR_B_BS0 A10/AP BA1 DDR_B_RAS#
6,13 DDR_B_BS0 109 BA0 RAS# 110 DDR_B_RAS# 6,13
111 VDD13 VDD14 112

1
10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

6,13 DDR_B_WE# DDR_B_WE# 113 114 DDR_CS6_DIMMB1# DDR_CS6_DIMMB1# 6

DDR_B_CAS# WE# S0# M_ODT6 RD13
6,13 DDR_B_CAS# 115 CAS# ODT0 116 M_ODT6 6
330U_SX_2VY~D

@ 1 117 118 1K_0402_1%

DDR_B_MA13 VDD15 VDD16 M_ODT7
1 1 1 1 1 1 1 119 A13 ODT1 120 M_ODT7 6
+
CD29

CD30

CD31

CD32

CD33

CD34

CD35

CD36

6 DDR_CS7_DIMMB1# DDR_CS7_DIMMB1# 121 122

2
S1# NC2
123 VDD17 VDD18 124
125 126 +VREF_CB
2 2 2 2 2 2 2 2 NCTEST VREF_CA
127 VSS27 VSS28 128

2.2U_0603_10V7K~D

0.1U_0402_25V6K~D
DDR_B_D37 129 130 DDR_B_D32
DQ32 DQ36

1
DDR_B_D36 131 132 DDR_B_D33
DQ33 DQ37 RD14
133 VSS29 VSS30 134 1 1
DDR_B_DQS#4 135 136 1K_0402_1%
DQS#4 DM4

CD37

CD38
DDR_B_DQS4 137 138
DQS4 VSS31 DDR_B_D38
B 139 140 B

2
DDR_B_D34 VSS32 DQ38 DDR_B_D39 2 2
141 DQ34 DQ39 142
DDR_B_D35 143 144
DQ35 VSS33 DDR_B_D41
145 VSS34 DQ44 146
DDR_B_D40 147 148 DDR_B_D45
DQ40 DQ45
Layout Note: DDR_B_D47 149 DQ41 VSS35 150
151 152 DDR_B_DQS#5
Place near JDIMMB.203,204 153
VSS36 DQS#5
154 DDR_B_DQS5
DM5 DQS5
155 VSS37 VSS38 156
DDR_B_D43 157 158 DDR_B_D46
DDR_B_D44 DQ42 DQ46 DDR_B_D42
159 DQ43 DQ47 160
161 VSS39 VSS40 162
DDR_B_D48 163 164 DDR_B_D52
DDR_B_D49 DQ48 DQ52 DDR_B_D53
165 DQ49 DQ53 166
167 VSS41 VSS42 168
+0.75VS DDR_B_DQS#6 169 170
DDR_B_DQS6 DQS#6 DM6
171 DQS6 VSS43 172
173 174 DDR_B_D54
DDR_B_D55 VSS44 DQ54 DDR_B_D50
175 DQ50 DQ55 176
+3VS DDR_B_D51 177 178
DQ51 VSS45
1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

179 180 DDR_B_D60

DDR_B_D61 VSS46 DQ60 DDR_B_D56
1 1 1 1 181 DQ56 DQ61 182
DDR_B_D57 183 184
DQ57 VSS47
2

2
CD39

CD40

CD41

CD42

185 186 DDR_B_DQS#7

R1833 RD5 VSS48 DQS#7 DDR_B_DQS7
187 DM7 DQS7 188
2 2 2 2
10K_0402_5%~D 10K_0402_5%~D 189 VSS49 VSS50 190
DDR_B_D63 191 192 DDR_B_D62
DDR_B_D59 DQ58 DQ62 DDR_B_D58
193 194
1

DQ59 DQ63
195 VSS51 VSS52 196
197 198 M_THERMAL# M_THERMAL# 10,12,13,40
SA0 EVENT# PCH_SMBDATA
+3VS 199 VDDSPD SDA 200 PCH_SMBDATA 5,10,12,13,16,17,34,35,43
201 202 PCH_SMBCLK
SA1 SCL PCH_SMBCLK 5,10,12,13,16,17,34,35,43
+0.75VS 203 VTT1 VTT2 204 +0.75VS
1

0.1U_0402_25V6K~D

2.2U_0603_10V7K~D

@ RD6 @ R1834 205 206

A G1 G2 A
10K_0402_5%~D 10K_0402_5%~D 1 1
CD43

CD44

TYCO_2-2013290-1
CONN@
2

2 2
CIS link OK
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC M/B LA-8321
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
4019H5
Date: Wednesday, August 01, 2012 Sheet 11 of 66
5 4 3 2 1
 5 4 3 2 1

+1.5V +V_DDR_REFA

1
RD28 RD27
1K_0402_1%~D 0_0402_5%~D
@ +1.5V +1.5V
6,10 DDR_A_DQS#[0..7]

2
JDIMMA1
6,10 DDR_A_DQS[0..7] +DIMM3_VREF 1 2
VREF_DQ VSS1 DDR_A_D1
3 VSS2 DQ4 4

2.2U_0603_10V7K~D

0.1U_0402_25V6K~D
DIMM A1
6,10 DDR_A_D[0..63] DDR_A_D4 5 6 DDR_A_D0
DQ0 DQ5

1
DDR_A_D5 7 8
RD29 DQ1 VSS3 DDR_A_DQS#0
6,10 DDR_A_MA[0..15] 1 1 9 VSS4 DQS#0 10
D 1K_0402_1%~D 11 12 DDR_A_DQS0 D
DM0 DQS0

CD51

CD52
STD TYPE (H9.2)
13 VSS5 VSS6 14
DDR_A_D2 15 16 DDR_A_D3

2
2 2 DDR_A_D7 DQ2 DQ6 DDR_A_D6
17 DQ3 DQ7 18
19 VSS7 VSS8 20
DDR_A_D8 21 22 DDR_A_D12
DDR_A_D9 DQ8 DQ12 DDR_A_D13
23 DQ9 DQ13 24
25 VSS9 VSS10 26
DDR_A_DQS#1 27 28
DDR_A_DQS1 DQS#1 DM1 DDR3_DRAMRST#
29 DQS1 RESET# 30 DDR3_DRAMRST# 6,10,11,13
31 VSS11 VSS12 32
DDR_A_D10 33 34 DDR_A_D14
(H9.2)(Rev)
DQ10 DQ14
Layout Note: DDR_A_D15 35 DQ11 DQ15 36 DDR_A_D11
CH A1
Place near JDIMMC DDR_A_D21
DDR_A_D20
37
39
VSS13
DQ16
VSS14
DQ20
38
40 DDR_A_D17
DDR_A_D16
DIMM A0
41 DQ17 DQ21 42

(H5.2)(Rev)
43 44
DDR_A_DQS#2 45
VSS15
DQS#2
VSS16
DM2 46 CH B1
+1.5V
DDR_A_DQS2 47
49
DQS2
VSS18
VSS17
DQ22
48
50 DDR_A_D22
CPU TOP DIMM B0
DDR_A_D19 51 52 DDR_A_D23
DDR_A_D18 DQ18 DQ23
53 DQ19 VSS19 54
55 56 DDR_A_D24
VSS20 DQ28
(H5.2)(Std)
DDR_A_D28 DDR_A_D31
57 DQ24 DQ29 58
CH B0
1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1 1 1 1
DDR_A_D29 59
61
DQ25
VSS22
VSS21
DQS#3
60
62 DDR_A_DQS#3 BOT DIMM B1
CD53

CD54

CD55

CD56

63 64 DDR_A_DQS3
DM3 DQS3
65 66
2 2 2 2
DDR_A_D26 67
VSS23
DQ26
VSS24
DQ30 68 DDR_A_D30
CH A0 (H9.2) (Std)
DDR_A_D27 69
71
DQ27
VSS25
DQ31
VSS26
70
72
DDR_A_D25
DIMM A1

6 DDR_CKE0_DIMMA0 DDR_CKE0_DIMMA0 73 74 DDR_CKE1_DIMMA0 DDR_CKE1_DIMMA0 6

C CKE0 CKE1 C
75 VDD1 VDD2 76
77 78 DDR_A_MA15
DDR_A_BS2 NC1 A15 DDR_A_MA14
6,10 DDR_A_BS2 79 BA2 A14 80
+1.5V 81 82
DDR_A_MA12 VDD3 VDD4 DDR_A_MA11
83 A12/BC# A11 84
DDR_A_MA9 85 86 DDR_A_MA7
A9 A7
87 VDD5 VDD6 88
10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

DDR_A_MA8 89 90 DDR_A_MA6
DDR_A_MA5 A8 A6 DDR_A_MA4
91 A5 A4 92
330U_SX_2VY~D
@

1 93 VDD7 VDD8 94
1 1 1 1 1 1 1 DDR_A_MA3 95 96 DDR_A_MA2
+ A3 A2
CD57

CD58

CD59

CD60

CD61

CD62

CD63

CD64

DDR_A_MA1 97 98 DDR_A_MA0
A1 A0
99 VDD9 VDD10 100
6 M_CLK_DDR0 M_CLK_DDR0 101 102 M_CLK_DDR1 M_CLK_DDR1 6
2 2 2 2 2 2 2 2 M_CLK_DDR#0 CK0 CK1 M_CLK_DDR#1
6 M_CLK_DDR#0 103 CK0# CK1# 104 M_CLK_DDR#1 6 +1.5V
105 VDD11 VDD12 106
DDR_A_MA10 107 108 DDR_A_BS1 DDR_A_BS1 6,10
DDR_A_BS0 A10/AP BA1 DDR_A_RAS#
6,10 DDR_A_BS0 109 BA0 RAS# 110 DDR_A_RAS# 6,10
111 VDD13 VDD14 112

1
6,10 DDR_A_WE# DDR_A_WE# 113 114 DDR_CS0_DIMMA0# DDR_CS0_DIMMA0# 6
DDR_A_CAS# WE# S0# M_ODT0 RD30
6,10 DDR_A_CAS# 115 CAS# ODT0 116 M_ODT0 6
117 118 1K_0402_1%
DDR_A_MA13 VDD15 VDD16 M_ODT1
119 A13 ODT1 120 M_ODT1 6
6 DDR_CS1_DIMMA0# DDR_CS1_DIMMA0# 121 122

2
S1# NC2
Layout Note: 123 VDD17 VDD18 124
125 126 +VREF_CC
Place near JDIMMC.203,204 127
NCTEST VREF_CA
128
VSS27 VSS28

2.2U_0603_10V7K~D

0.1U_0402_25V6K~D
DDR_A_D37 129 130 DDR_A_D32
DQ32 DQ36

1
DDR_A_D36 131 132 DDR_A_D33
DQ33 DQ37 RD31
133 VSS29 VSS30 134 1 1
DDR_A_DQS#4 135 136 1K_0402_1%
DQS#4 DM4

CD65

CD66
DDR_A_DQS4 137 138
DQS4 VSS31 DDR_A_D35
139 140

2
DDR_A_D34 VSS32 DQ38 DDR_A_D38 2 2
141 DQ34 DQ39 142
B +0.75VS DDR_A_D39 143 144 B
DQ35 VSS33 DDR_A_D44
145 VSS34 DQ44 146
DDR_A_D41 147 148 DDR_A_D45
DDR_A_D40 DQ40 DQ45
149 DQ41 VSS35 150
151 152 DDR_A_DQS#5
VSS36 DQS#5
1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

153 154 DDR_A_DQS5

DM5 DQS5
1 1 1 1 155 VSS37 VSS38 156
DDR_A_D42 157 158 DDR_A_D46
DQ42 DQ46
CD67

CD68

CD69

CD70

DDR_A_D43 159 160 DDR_A_D47

DQ43 DQ47
161 VSS39 VSS40 162
2 2 2 2 DDR_A_D48 DDR_A_D53
163 DQ48 DQ52 164
DDR_A_D49 165 166 DDR_A_D52
DQ49 DQ53
167 VSS41 VSS42 168
DDR_A_DQS#6 169 170
DDR_A_DQS6 DQS#6 DM6
171 DQS6 VSS43 172
173 174 DDR_A_D51
DDR_A_D55 VSS44 DQ54 DDR_A_D50
175 DQ50 DQ55 176
+3VS DDR_A_D54 177 178
DQ51 VSS45 DDR_A_D56
179 VSS46 DQ60 180
DDR_A_D60 181 182 DDR_A_D57
DDR_A_D61 DQ56 DQ61
183 DQ57 VSS47 184
1

185 186 DDR_A_DQS#7

@ RD32 @ R1835 VSS48 DQS#7 DDR_A_DQS7
187 DM7 DQS7 188
10K_0402_5%~D 10K_0402_5%~D 189 VSS49 VSS50 190
DDR_A_D63 191 192 DDR_A_D59
DDR_A_D62 DQ58 DQ62 DDR_A_D58
193 194
2

DQ59 DQ63
195 VSS51 VSS52 196
197 198 M_THERMAL# M_THERMAL# 10,11,13,40
SA0 EVENT# PCH_SMBDATA
+3VS 199 VDDSPD SDA 200 PCH_SMBDATA 5,10,11,13,16,17,34,35,43
201 202 PCH_SMBCLK
SA1 SCL PCH_SMBCLK 5,10,11,13,16,17,34,35,43
203 VTT1 VTT2 204 +0.75VS
1

+0.75VS
RD53 RD33 205 206
G1 G2
10K_0402_5%~D 10K_0402_5%~D
0.1U_0402_25V6K~D

2.2U_0603_10V7K~D

TYCO_2-2013310-1
A A
1 1 CONN@
2

CD71

CD72

2 2 CIS link OK
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC M/B LA-8321
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
4019H5
Date: Wednesday, August 01, 2012 Sheet 12 of 66
5 4 3 2 1
 5 4 3 2 1

+1.5V +V_DDR_REFB

1
RD41 RD40
1K_0402_1%~D 0_0402_5%~D
@ +1.5V +1.5V

2
JDIMMB1

DIMM B1
+DIMM4_VREF 1 2
VREF_DQ VSS1 DDR_B_D1
3 VSS2 DQ4 4

2.2U_0603_10V7K~D

0.1U_0402_25V6K~D
DDR_B_D5 5 6 DDR_B_D0
DQ0 DQ5

1
DDR_B_D4 7 8
DQ1 VSS3

STD TYPE (H5.2)

6,11 DDR_B_DQS#[0..7] RD42 1 1 9 10 DDR_B_DQS#0
VSS4 DQS#0 DDR_B_DQS0
D 1K_0402_1%~D 11 DM0 DQS0 12 D

CD76

CD77
6,11 DDR_B_DQS[0..7] 13 VSS5 VSS6 14
DDR_B_D7 15 16 DDR_B_D2

2
2 2 DDR_B_D3 DQ2 DQ6 DDR_B_D6
6,11 DDR_B_D[0..63] 17 DQ3 DQ7 18
19 VSS7 VSS8 20
6,11 DDR_B_MA[0..15] DDR_B_D13 21 22 DDR_B_D8
DDR_B_D9 DQ8 DQ12 DDR_B_D12
23 DQ9 DQ13 24
25 VSS9 VSS10 26
DDR_B_DQS#1 27 28
DDR_B_DQS1 DQS#1 DM1 DDR3_DRAMRST#
29 DQS1 RESET# 30 DDR3_DRAMRST# 6,10,11,12
31 VSS11 VSS12 32
DDR_B_D14 33 34 DDR_B_D10
(H9.2)(Rev)
DQ10 DQ14
DDR_B_D15 35 DQ11 DQ15 36 DDR_B_D11
CH A1
DDR_B_D21
DDR_B_D20
37
39
VSS13
DQ16
VSS14
DQ20
38
40 DDR_B_D17
DDR_B_D16
DIMM A0
41 DQ17 DQ21 42

(H5.2)(Rev)
43 44
DDR_B_DQS#2 45
VSS15
DQS#2
VSS16
DM2 46 CH B1
DDR_B_DQS2 47
49
DQS2
VSS18
VSS17
DQ22
48
50 DDR_B_D19
CPU TOP DIMM B0
DDR_B_D23 51 52 DDR_B_D18
DDR_B_D22 DQ18 DQ23
53 DQ19 VSS19 54
Layout Note: 55 VSS20 DQ28 56 DDR_B_D29

(H5.2)(Std)
DDR_B_D28 DDR_B_D25
Place near JDIMMD DDR_B_D24
57
59
61
DQ24
DQ25
DQ29
VSS21
58
60
62 DDR_B_DQS#3 BOT CH B0 DIMM B1
VSS22 DQS#3 DDR_B_DQS3
63 DM3 DQS3 64
65 66
DDR_B_D30 67
VSS23
DQ26
VSS24
DQ30 68 DDR_B_D26
CH A0 (H9.2) (Std)
DDR_B_D31 69
71
DQ27
VSS25
DQ31
VSS26
70
72
DDR_B_D27
DIMM A1
+1.5V

6 DDR_CKE2_DIMMB0 DDR_CKE2_DIMMB0 73 74 DDR_CKE3_DIMMB0

C CKE0 CKE1 DDR_CKE3_DIMMB0 6 C
75 VDD1 VDD2 76
1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

77 78 DDR_B_MA15
DDR_B_BS2 NC1 A15 DDR_B_MA14
1 1 1 1 6,11 DDR_B_BS2 79 BA2 A14 80
CD78

CD79

CD80

CD81

81 VDD3 VDD4 82
DDR_B_MA12 83 84 DDR_B_MA11
DDR_B_MA9 A12/BC# A11 DDR_B_MA7
85 A9 A7 86
2 2 2 2 87 88
DDR_B_MA8 VDD5 VDD6 DDR_B_MA6
89 A8 A6 90
DDR_B_MA5 91 92 DDR_B_MA4
A5 A4
93 VDD7 VDD8 94
DDR_B_MA3 95 96 DDR_B_MA2
DDR_B_MA1 A3 A2 DDR_B_MA0
97 A1 A0 98
99 VDD9 VDD10 100
6 M_CLK_DDR2 M_CLK_DDR2 101 102 M_CLK_DDR3
+1.5V CK0 CK1 M_CLK_DDR3 6
6 M_CLK_DDR#2 M_CLK_DDR#2 103 104 M_CLK_DDR#3
CK0# CK1# M_CLK_DDR#3 6 +1.5V
105 VDD11 VDD12 106
DDR_B_MA10 107 108 DDR_B_BS1
A10/AP BA1 DDR_B_BS1 6,11
6,11 DDR_B_BS0 DDR_B_BS0 109 110 DDR_B_RAS#
BA0 RAS# DDR_B_RAS# 6,11
10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

111 VDD13 VDD14 112

1
6,11 DDR_B_WE# DDR_B_WE# 113 114 DDR_CS2_DIMMB0#
WE# S0# DDR_CS2_DIMMB0# 6
330U_SX_2VY~D
@

1 6,11 DDR_B_CAS# DDR_B_CAS# 115 116 M_ODT2 RD43

CAS# ODT0 M_ODT2 6
1 1 1 1 1 1 1 117 118 1K_0402_1%
+ VDD15 VDD16
CD82

CD83

CD84

CD85

CD86

CD87

CD88

CD89

DDR_B_MA13 119 120 M_ODT3

A13 ODT1 M_ODT3 6
6 DDR_CS3_DIMMB0# DDR_CS3_DIMMB0# 121 122

2
S1# NC2
123 VDD17 VDD18 124
2 2 2 2 2 2 2 2 125 126 +VREF_CD
NCTEST VREF_CA
127 VSS27 VSS28 128

2.2U_0603_10V7K~D

0.1U_0402_25V6K~D
DDR_B_D37 129 130 DDR_B_D32
DQ32 DQ36

1
DDR_B_D36 131 132 DDR_B_D33
DQ33 DQ37 RD44
133 VSS29 VSS30 134 1 1
DDR_B_DQS#4 135 136 1K_0402_1%
DQS#4 DM4

CD90

CD91
DDR_B_DQS4 137 138
DQS4 VSS31 DDR_B_D38
139 140

2
DDR_B_D34 VSS32 DQ38 DDR_B_D39 2 2
141 DQ34 DQ39 142
B DDR_B_D35 143 144 B
DQ35 VSS33 DDR_B_D41
145 VSS34 DQ44 146
Layout Note: DDR_B_D40 147 DQ40 DQ45 148 DDR_B_D45
DDR_B_D47 149 150
Place near JDIMMD.203,204 151
DQ41 VSS35
152 DDR_B_DQS#5
VSS36 DQS#5 DDR_B_DQS5
153 DM5 DQS5 154
155 VSS37 VSS38 156
DDR_B_D43 157 158 DDR_B_D46
DDR_B_D44 DQ42 DQ46 DDR_B_D42
159 DQ43 DQ47 160
161 VSS39 VSS40 162
DDR_B_D48 163 164 DDR_B_D52
DDR_B_D49 DQ48 DQ52 DDR_B_D53
165 DQ49 DQ53 166
+0.75VS 167 168
DDR_B_DQS#6 VSS41 VSS42
169 DQS#6 DM6 170
DDR_B_DQS6 171 172
DQS6 VSS43 DDR_B_D54
173 VSS44 DQ54 174
DDR_B_D55 175 176 DDR_B_D50
+3VS DQ50 DQ55
1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

DDR_B_D51 177 178

DQ51 VSS45 DDR_B_D60
1 1 1 1 179 VSS46 DQ60 180
DDR_B_D61 181 182 DDR_B_D56
DQ56 DQ61
CD92

CD93

CD94

CD95

DDR_B_D57 183 184

DQ57 VSS47
1

185 186 DDR_B_DQS#7

2 2 2 2 @ RD54 R1836 VSS48 DQS#7 DDR_B_DQS7
187 DM7 DQS7 188
10K_0402_5%~D 10K_0402_5%~D 189 VSS49 VSS50 190
DDR_B_D63 191 192 DDR_B_D62
DDR_B_D59 DQ58 DQ62 DDR_B_D58
193 194
2

DQ59 DQ63
195 VSS51 VSS52 196
197 198 M_THERMAL# M_THERMAL# 10,11,12,40
SA0 EVENT# PCH_SMBDATA
+3VS 199 VDDSPD SDA 200 PCH_SMBDATA 5,10,11,12,16,17,34,35,43
201 202 PCH_SMBCLK
SA1 SCL PCH_SMBCLK 5,10,11,12,16,17,34,35,43
+0.75VS 203 VTT1 VTT2 204 +0.75VS
1

0.1U_0402_25V6K~D

2.2U_0603_10V7K~D

RD46 @ RD45 205 206

G1 G2
10K_0402_5%~D 10K_0402_5%~D 1 1
CD96

CD97

TYCO_2-2013289-1
A A
CONN@
2

2 2

CIS link OK
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC M/B LA-8321
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
4019H5
Date: Wednesday, August 01, 2012 Sheet 13 of 66
5 4 3 2 1
 5 4 3 2 1

+3VALW

1
+3V_MXM
+3V_MXM +3VMXM C1823

2
0.1U_0402_25V6K~D +3V_MXM +3V_MXM
+5V_MXM +5VMXM 2 R88
@ R98
@R98 PJP9 10K_0402_5%~D +3V_MXM

1
1 2 2 2 1 1

5
10U_0603_6.3V6M~D
U618 R86 R87

1
0.1U_0402_25V6K~D
1 0_0805_5%~D 1 1 JUMP_43X118 1 Q5

G VCC
18,37,40,43,47 ACIN B

2
C227

C228
AC_BATT# 2N7002E-T1-E3_SOT23-3 4.7K_0402_5%~D 4.7K_0402_5%~D

G
Y 4 AC_BATT# 15
C226 40 EC_AC_BAT# 2

2
4.7U_0603_10V6K~D B+_MXM A VGA_SMB_DA1
JMXM1A 40,44,45 EC_SMB_DA1 1 3 VGA_SMB_DA1 15
2 2 2 MC74VHC1G09DFT2G_SC70-5

S
3

2
D D

G
1 PWR_SRC PWR_SRC 2
3 PWR_SRC PWR_SRC 4
5 6 40,44,45 EC_SMB_CK1 1 3 VGA_SMB_CK1
PWR_SRC PWR_SRC VGA_SMB_CK1 15
7 8 Q6

S
PWR_SRC PWR_SRC
PWR_SRCE1 E2
9 10 2N7002E-T1-E3_SOT23-3
PWR_SRC
11 PWR_SRC PWR_SRC 12
B+_MXM 13 14
PWR_SRC PWR_SRC JMXM1B
160mil(4A) 15 PWR_SRC PWR_SRC 16
17 PWR_SRC PWR_SRC 18 163 GND GND 162
MXM_PS_0@ C2029 1 2 0.01U_0402_16V7K~D 4 PEG_GTX_HRX_N2 165 164 PEG_HTX_C_GRX_N2 4
PEX_RX2# PEX_TX2#
10U_0805_25V6K~D

680P_0402_50V7K~D

68P_0402_50V8J~D

0.1U_0603_50V7K~D
MXM_PS_1@ C2031 1 2 0.01U_0402_16V7K~D 4 PEG_GTX_HRX_P2 167 166 PEG_HTX_C_GRX_P2 4
MXM_PS_2@ C2030 PEX_RX2 PEX_TX2
1 1 1 2 19 GND GND 20 1 2 0.01U_0402_16V7K~D 169 GND GND 168
C223

C224

C225

C222
21 GND GND 22 4 PEG_GTX_HRX_N1 171 PEX_RX1# PEX_TX1# 170 PEG_HTX_C_GRX_N1 4
23 GND GND 24 4 PEG_GTX_HRX_P1 173 PEX_RX1 PEX_TX1 172 PEG_HTX_C_GRX_P1 4
25 GND GND 26 175 GND GND 174
2 2 2 1
27 GND GND 28 4 PEG_GTX_HRX_N0 177 PEX_RX0# PEX_TX0# 176 PEG_HTX_C_GRX_N0 4
29 GND E3 E4 GND 30 4 PEG_GTX_HRX_P0 179 PEX_RX0 PEX_TX0 178 PEG_HTX_C_GRX_P0 4
31 GND GND 32 181 GND GND 180
33 34 (Pull-UP 10K at PCH) 17 CLK_PEG_PCH# @ R103 1
@R103 2 0_0402_5%~D CLK_PEG_PCH#_R 183 182 PEG_CLKREQ# 17
GND GND @R104
@ R104 1 PEX_REFCLK# PEX_CLK_REQ#
35 GND GND 36 17 CLK_PEG_PCH 2 0_0402_5%~D CLK_PEG_PCH_R 185 PEX_REFCLK PEX_RST# 184 PLTRST_VGA# 15,19
+5V_MXM 37 38 VGA_PRSNT_R# VGA_PRSNT_R# 20 187 186 VGA_DDC_DATA
5V PRSNT_R# GND VGA_DDC_DAT VGA_DDC_DATA 26
39 40 VGA_WAKE# 189 188 VGA_DDC_CLK
5V WAKE# RSVD VGA_DDC_CLK VGA_DDC_CLK 26
100mil(2.5A, 5VIA) 41 42 DGPU_PWROK DGPU_PWROK 20 191 190 VGA_CRT_VSYNC 26
5V PWR_GOOD VGA_ON RSVD VGA_VSYNC
43 5V PWR_EN 44 VGA_ON 15,17 193 RSVD VGA_HSYNC 192 VGA_CRT_HSYNC 26
45 5V RSVD 46 195 RSVD GND 194
47 GND RSVD 48 197 RSVD VGA_RED 196 VGA_CRT_R 26
49 GND RSVD 50 24 VGA_TZCLK- 199 LVDS_UCLK# VGA_GREEN 198 VGA_CRT_G 26
Add R90 increase NV MXM PEG Swing 51 GND RSVD 52 24 VGA_TZCLK+ 201 LVDS_UCLK VGA_BLUE 200 VGA_CRT_B 26
53 54 AC_BATT# 203 202
@ R90 GND PWR_LEVEL GND GND
1 2 0_0402_5%~D 55 PEX_STD_SW# TH_OVERT# 56 VGA_TH_OVERT# VGA_TH_OVERT# 15 205 LVDS_UTX3# LVDS_LCLK# 204 VGA_TXCLK- 24
VGA_DISABLE# 57 58 1 2 +3V_MXM 207 206 VGA_TXCLK+ 24
VGA_DISABLE# TH_ALERT# R91 10K_0402_5%~D LVDS_UTX3 LVDS_LCLK
24 DGPU_ENVDD 59 PNL_PWR_EN TH_PWM 60 209 GND GND 208
C C
61 62 211 210
24 DGPU_BKL_EN
24 VGA_PNL_PWM 63
PNL_BL_EN
PNL_BL_PWM
GPIO0
GPIO1 64 LVDS 24 VGA_TZOUT2-
24 VGA_TZOUT2+ 213
LVDS_UTX2#
LVDS_UTX2
LVDS_LTX3#
LVDS_LTX3 212
VGA_HDMI_CEC 65 66 215 214
67
HDMI_CEC
DVI_HPD
GPIO2
SMB_DAT 68 VGA_SMB_DA1 24 VGA_TZOUT1- 217
GND
LVDS_UTX1#
GND
LVDS_LTX2# 216 VGA_TXOUT2- 24
LVDS
24 VGA_LCD_DAT VGA_LCD_DAT 69 LVDS_DDC_DAT SMB_CLK 70 VGA_SMB_CK1 TO EC 24 VGA_TZOUT1+ 219 LVDS_UTX1 LVDS_LTX2 218 VGA_TXOUT2+ 24
24 VGA_LCD_CLK VGA_LCD_CLK 71 72 221 220
LVDS_DDC_CLK GND GND GND
LVDS DDC Module have 4.7K Pull-UP 73 GND OEM 74 24 VGA_TZOUT0- 223 LVDS_UTX0# LVDS_LTX1# 222 VGA_TXOUT1- 24
75 76 MXM_PS_0 24 VGA_TZOUT0+ 225 224 VGA_TXOUT1+ 24
OEM OEM MXM_PS_1 +3VMXM LVDS_UTX0 LVDS_LTX1
77 OEM OEM 78 227 GND GND 226
+3V_MXM R92 1 @ 2 10K_0402_5%~D 79 80 MXM_PS_2 27 GPU_HDMI_TXD2- 229 228 VGA_TXOUT0- 24
OEM OEM DP_C_L0# LVDS_LTX0#
81 OEM GND 82 27 GPU_HDMI_TXD2+ 231 DP_C_L0 LVDS_LTX0 230 VGA_TXOUT0+ 24
R93 1 @ 2 36K_0402_1% 83 84 233 232
GND PEX_TX15# GND GND

1
0_0402_5%~D

0_0402_5%~D

0_0402_5%~D
85 PEX_RX15# PEX_TX15 86 27 GPU_HDMI_TXD1- 235 DP_C_L1# DP_D_L0# 234
87 PEX_RX15 GND 88 27 GPU_HDMI_TXD1+ 237 DP_C_L1 DP_D_L0 236
89 90 239 238
GND PEX_TX14# HDMI GND GND

R2587

R2588

R2589
91 PEX_RX14# PEX_TX14 92 27 GPU_HDMI_TXD0- 241 DP_C_L2# DP_D_L1# 240
93 94 243 242
27 GPU_HDMI_TXD0+
Reserve for eDP

2
PEX_RX14 GND DP_C_L2 DP_D_L1
95 GND PEX_TX13# 96 245 GND GND 244
97 98 @ @ @ MXM_PS_0 27 GPU_HDMI_TXC- 247 246
+3V_MXM1 +3VALW PEX_RX13# PEX_TX13 MXM_PS_1 DP_C_L3# DP_D_L2#
99 PEX_RX13 GND 100 27 GPU_HDMI_TXC+ 249 DP_C_L3 DP_D_L2 248
101 102 MXM_PS_2 251 250
GND PEX_TX12# GND GND
103 PEX_RX12# PEX_TX12 104 27 GPU_HDMI_SDATA 253 DP_C_AUX# DP_D_L3# 252
105 PEX_RX12 GND 106 27 GPU_HDMI_SCLK 255 DP_C_AUX DP_D_L3 254
1

1
0_0402_5%~D

0_0402_5%~D

0_0402_5%~D
107 GND PEX_TX11# 108 257 RSVD GND 256
R94 R105 109 110 259 258
10K_0402_5%~D 10K_0402_5%~D PEX_RX11# PEX_TX11 RSVD DP_D_AUX#
111 PEX_RX11 GND 112 261 RSVD DP_D_AUX 260
R2590

R2591

R2592
113 GND PEX_TX10# 114 263 RSVD DP_C_HPD 262 VGA_HDMI_DET 27
2
G

115 116 265 264

2

2
PEX_RX10# PEX_TX10 RSVD DP_D_HPD
117 PEX_RX10 GND 118 267 RSVD RSVD 266
15 VGA_TH_OVERT# 3 1 TH_OVERT# 40 119 120 @ @ @ 269 268
GND PEX_TX9# RSVD RSVD
S

121 PEX_RX9# PEX_TX9 122 271 RSVD RSVD 270

Q7 123 124 273 272
B 2N7002E-T1-E3_SOT23-3 PEX_RX9 GND RSVD GND B
125 GND PEX_TX8# 126 275 RSVD DP_B_L0# 274 VGA_DPD_N0 28
127 PEX_RX8# PEX_TX8 128 277 RSVD DP_B_L0 276 VGA_DPD_P0 28
129 PEX_RX8 GND 130 279 RSVD GND 278
131 GND PEX_TX7# 132 PEG_HTX_C_GRX_N7 4 281 GND DP_B_L1# 280 VGA_DPD_N1 28
4 PEG_GTX_HRX_N7 133 PEX_RX7# PEX_TX7 134 PEG_HTX_C_GRX_P7 4 29 VGA_DPC_N0 283 DP_A_L0# DP_B_L1 282 VGA_DPD_P1 28
135 136 285 284
4 PEG_GTX_HRX_P7
137
PEX_RX7
GND
GND
PEX_TX6# 138 PEG_HTX_C_GRX_N6 4
29 VGA_DPC_P0
287
DP_A_L0
GND
GND
DP_B_L2# 286 VGA_DPD_N2 28 mini DP
4 PEG_GTX_HRX_N6 139 PEX_RX6# PEX_TX6 140 PEG_HTX_C_GRX_P6 4 29 VGA_DPC_N1 289 DP_A_L1# DP_B_L2 288 VGA_DPD_P2 28
4 PEG_GTX_HRX_P6 141 PEX_RX6 GND 142 29 VGA_DPC_P1 291 DP_A_L1 GND 290
143 144 293 292
4 PEG_GTX_HRX_N5 145
GND
PEX_RX5#
PEX_TX5#
PEX_TX5 146
PEG_HTX_C_GRX_N5 4
PEG_HTX_C_GRX_P5 4
DMC 29 VGA_DPC_N2 295
GND
DP_A_L2#
DP_B_L3#
DP_B_L3 294
VGA_DPD_N3 28
VGA_DPD_P3 28
4 PEG_GTX_HRX_P5 147 PEX_RX5 GND 148 29 VGA_DPC_P2 297 DP_A_L2 GND 296
149 GND PEX_TX4# 150 PEG_HTX_C_GRX_N4 4 299 GND DP_B_AUX# 298 VGA_DPD_AUXN/DDC 28
4 PEG_GTX_HRX_N4 151 PEX_RX4# PEX_TX4 152 PEG_HTX_C_GRX_P4 4 29 VGA_DPC_N3 301 DP_A_L3# DP_B_AUX 300 VGA_DPD_AUXP/DDC 28
4 PEG_GTX_HRX_P4 153 PEX_RX4 GND 154 29 VGA_DPC_P3 303 DP_A_L3 DP_B_HPD 302 VGA_DPD_HPD 28
155 GND PEX_TX3# 156 PEG_HTX_C_GRX_N3 4 305 GND DP_A_HPD 304 VGA_DMC_HPD 29
4 PEG_GTX_HRX_N3 157 PEX_RX3# PEX_TX3 158 PEG_HTX_C_GRX_P3 4 29 VGA_DPC_AUXN/DDC 307 DP_A_AUX# 3V3 306 +3V_MXM
4 PEG_GTX_HRX_P3 159 PEX_RX3 GND 160 29 VGA_DPC_AUXP/DDC 309 DP_A_AUX 3V3 308
161 20 VGA_PRSNT_L# VGA_PRSNT_L# 310 40mil(1A)
GND PRSNT_L#
(Pull-UP 10K at PCH) 311 312
JAE_MM70-314-310B1-1-R300 GND GND

02/21-109 JAE_MM70-314-310B1-1-R300

D76 +3V_MXM
2 1 VGA_PRSNT_R# MXM PCH
VGA_DDC_CLK R1826 1 2 2.2K_0402_5%~D Port A DMC(HDMI)
UCLAMP0511P.TCT_SLP1006P2-2~D VGA_DDC_DATA R1827 1 2 2.2K_0402_5%~D
Port B DP HDMI
VGA_HDMI_CEC R100 1 2 10K_0402_5%~D
D77
A VGA_DISABLE# R101 1 @ 2 10K_0402_5%~D Port C HDMI DP A
2 1 VGA_PRSNT_L# VGA_WAKE# R102 1 @ 2 10K_0402_5%~D
Port D eDP DMC(HDMI)
UCLAMP0511P.TCT_SLP1006P2-2~D VGA_LCD_CLK R95 1 2 4.3K_0402_5%
VGA_LCD_DAT
DGPU_PWROK
R96
R97
1 2 4.3K_0402_5% DELL CONFIDENTIAL/PROPRIETARY
2 1 10K_0402_5%~D
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC M/B LA-8321
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
4019H5
Date: Wednesday, August 01, 2012 Sheet 14 of 66
5 4 3 2 1
 5 4 3 2 1

+3V_MXM1 +3V_MXM1 +3V_MXM1

1
02/21-109 R1886 R1887

2
+3V_MXM1 +3VMXM +5V_MXM1 +5VMXM 4.7K_0402_5%~D 4.7K_0402_5%~D

G
@ R1633 PJP10 Q277
D78

2
1 2 2 1 17,30,40,41,44 EC_SMB_DA2 1 3 2N7002E-T1-E3_SOT23-3 VGA_SMB_DA2
2 1

10U_0603_6.3V6M~D
2 1 MXM2_PRSNT_R#

2
0.1U_0402_25V6K~D
0_0805_5%~D JUMP_43X118

G
1 1 1

C1741

C1743
D Q278 D
C1742 UCLAMP0511P.TCT_SLP1006P2-2~D 17,30,40,41,44 EC_SMB_CK2 1 3 2N7002E-T1-E3_SOT23-3VGA_SMB_CK2
4.7U_0603_10V6K~D

S
2 2 2

JMXM2B
B+_MXM1 B+_MXM1 163 162
JMXM2A PEG_GTX_HRX_N10 GND GND PEG_HTX_C_GRX_N10
160mil(4A) 4 PEG_GTX_HRX_N10
PEG_GTX_HRX_P10
165 PEX_RX2# PEX_TX2# 164
PEG_HTX_C_GRX_P10
PEG_HTX_C_GRX_N10 4
1 PWR_SRC PWR_SRC 2 4 PEG_GTX_HRX_P10 167 PEX_RX2 PEX_TX2 166 PEG_HTX_C_GRX_P10 4
3 PWR_SRC PWR_SRC 4 169 GND GND 168

10U_0805_25V6K~D

680P_0402_50V7K~D

68P_0402_50V8J~D

0.1U_0603_50V7K~D
5 6 4 PEG_GTX_HRX_N9 PEG_GTX_HRX_N9 171 170 PEG_HTX_C_GRX_N9 PEG_HTX_C_GRX_N9 4
PWR_SRC PWR_SRC PEG_GTX_HRX_P9 PEX_RX1# PEX_TX1# PEG_HTX_C_GRX_P9
1 1 1 2 7 PWR_SRC PWR_SRC 8 4 PEG_GTX_HRX_P9 173 PEX_RX1 PEX_TX1 172 PEG_HTX_C_GRX_P9 4
+3V_MXM

C1738

C1739

C1740

C1737
9 PWR_SRCE1 E2 PWR_SRC 10
PEG_GTX_HRX_N8
175 GND GND 174
PEG_HTX_C_GRX_N8
11 PWR_SRC PWR_SRC 12 4 PEG_GTX_HRX_N8 177 PEX_RX0# PEX_TX0# 176 PEG_HTX_C_GRX_N8 4
13 14 4 PEG_GTX_HRX_P8 PEG_GTX_HRX_P8 179 178 PEG_HTX_C_GRX_P8 PEG_HTX_C_GRX_P8 4
B+_MXM_A1 2 2 2 1 PWR_SRC PWR_SRC PEX_RX0 PEX_TX0
2 1 2 1 15 PWR_SRC PWR_SRC 16 181 GND GND 180
@R1718
@ R1718 10K_0402_5%~D R1719 10K_0402_5%~D 17 18 17 MXM2_PEG_PCH# 1 2 MXM2_PEG_PCH#_R 183 182 MXM2_CLKREQ# MXM2_CLKREQ# 17
B+_MXM_A0 PWR_SRC PWR_SRC MXM2_PEG_PCH_R PEX_REFCLK# PEX_CLK_REQ# MXM2_RST#
2 1 2 1 17 MXM2_PEG_PCH @R107
@ R1071 20_0402_5%~D 185 PEX_REFCLK PEX_RST# 184
@R1722
@ R1722 10K_0402_5%~D R1723 10K_0402_5%~D @R106
@ R106 0_0402_5%~D 187 186
GND VGA_DDC_DAT
19 GND GND 20 189 RSVD VGA_DDC_CLK 188
21 GND GND 22 191 RSVD VGA_VSYNC 190
23 GND GND 24 193 RSVD VGA_HSYNC 192
+3V_MXM1 25 26 MXM_PS_3@
@C2032
C2032 1 2 0.01U_0402_16V7K~D 195 194
GND GND MXM_PS_4@
@C2034
C2034 RSVD GND
27 GND GND 28 1 2 0.01U_0402_16V7K~D 197 RSVD VGA_RED 196
2 1 B+_MXM1_A1 2 1 29 GND E3 E4 GND 30 MXM_PS_5@
@C2033
C2033 1 2 0.01U_0402_16V7K~D 199 LVDS_UCLK# VGA_GREEN 198
R1716 3.3K_0402_5%~D @R1717
@ R1717 0_0402_5% 31 32 201 200
B+_MXM1_A0 GND GND LVDS_UCLK VGA_BLUE
2 1 2 1 33 GND GND 34 203 GND GND 202
C R1720 3.3K_0402_5%~D @R1721
@ R1721 0_0402_5% 35 36 205 204 C
GND GND MXM2_PRSNT_R# LVDS_UTX3# LVDS_LCLK#
+5V_MXM1 37 5V PRSNT_R# 38 MXM2_PRSNT_R# 16,20 207 LVDS_UTX3 LVDS_LCLK 206
39 40 VGA2_WAKE# 209 208
5V WAKE# MXM2_PCH_PWROK GND GND
100mil(2.5A, 5VIA) 41 5V PWR_GOOD 42
MXM2_PWR_ON
MXM2_PCH_PWROK 20 211 LVDS_UTX2# LVDS_LTX3# 210
43 5V PWR_EN 44 213 LVDS_UTX2 LVDS_LTX3 212
45 5V RSVD 46 215 GND GND 214
MXM_CUR_DAT@
@R1714
R1714 1 2 0_0402_5%~D VGA_SMB_DA1 14 47 48 217 216
MXM_CUR_CLK@
@R1715
R1715 GND RSVD LVDS_UTX1# LVDS_LTX2#
1 2 0_0402_5%~D VGA_SMB_CK1 14 49 GND RSVD 50 219 LVDS_UTX1 LVDS_LTX2 218
51 GND RSVD 52 221 GND GND 220
53 54 AC_BATT# 223 222
GND PWR_LEVEL AC_BATT# 14 LVDS_UTX0# LVDS_LTX1#
@R110
@ R110 1 2 0_0402_5%~D 55 56 VGA_TH_OVERT# VGA_TH_OVERT# 14 225 224
VGA2_DISABLE# PEX_STD_SW# TH_OVERT# LVDS_UTX0 LVDS_LTX1
57 VGA_DISABLE# TH_ALERT# 58 1 2 +3V_MXM1 227 GND GND 226
59 60 R109 10K_0402_5%~D 229 228
PNL_PWR_EN TH_PWM DP_C_L0# LVDS_LTX0#
61 PNL_BL_EN GPIO0 62 231 DP_C_L0 LVDS_LTX0 230
@R1725
@ R1725 63 64 233 232
PNL_BL_PWM GPIO1 GND GND
46 MXM_CUR_VIN+ 1 2 65 HDMI_CEC GPIO2 66 235 DP_C_L1# DP_D_L0# 234
MXM1 Current Monitor
0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

67 68 VGA_SMB_DA2 237 236

0_0402_5%~D 1 DVI_HPD SMB_DAT VGA_SMB_CK2 DP_C_L1 DP_D_L0
1 69 LVDS_DDC_DAT SMB_CLK 70 239 GND GND 238
@C1802
@

@C1803
@

71 LVDS_DDC_CLK GND 72 241 DP_C_L2# DP_D_L1# 240

C1802

C1803

73 GND OEM 74 243 DP_C_L2 DP_D_L1 242

@R1726
@ R1726 U612 75 76 MXM_PS_3 245 244 +3VALW
2 0_0402_5%~D 2 B+_MXM_A1 OEM OEM MXM_PS_4 +3VMXM GND GND C1849
1 VIN+ A1 8 77 OEM OEM 78 247 DP_C_L3# DP_D_L2# 246
46 MXM_CUR_VIN- 1 2 2 7 B+_MXM_A0 79 80 MXM_PS_5 249 248 1 2
VIN- A0 MXM_CUR_DAT OEM OEM DP_C_L3 DP_D_L2
3 GND SDA 6 81 OEM GND 82 251 GND GND 250

5
+3V_MXM 4 5 MXM_CUR_CLK 83 84 253 252 0.1U_0402_25V6K~D
VS SCL GND PEX_TX15# DP_C_AUX# DP_D_L3#

1
0_0402_5%~D

0_0402_5%~D

0_0402_5%~D
85 86 255 254 IN1 1

P
PEX_RX15# PEX_TX15 DP_C_AUX DP_D_L3 MXM2_EC_RST# 20
INA219AIDCNRG4_SOT23-8 87 88 257 256 MXM2_RST# 4
PEX_RX15 GND RSVD GND O
89 GND PEX_TX14# 90 259 RSVD DP_D_AUX# 258 IN2 2 PLTRST_VGA# 14,19

G
R2593

R2594

R2595
91 PEX_RX14# PEX_TX14 92 261 RSVD DP_D_AUX 260

1
B B
93 94 263 262

3
PEX_RX14 GND RSVD DP_C_HPD RH264 UH7
95 GND PEX_TX13# 96 265 RSVD DP_D_HPD 264
97 98 @ @ @ MXM_PS_3 267 266 100K_0402_5% SN74AHC1G08DCKR_SC70-5
@R1728
@ R1728 PEX_RX13# PEX_TX13 MXM_PS_4 RSVD RSVD
99 PEX_RX13 GND 100 269 RSVD RSVD 268
46 MXM1_CUR_VIN+ 1 2 101 102 MXM_PS_5 271 270

2
GND PEX_TX12# RSVD RSVD
MXM2 Current Monitor
0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

103 PEX_RX12# PEX_TX12 104 273 RSVD GND 272

1 0_0402_5%~D 1 105 106 275 274
PEX_RX12 GND RSVD DP_B_L0#

1
0_0402_5%~D

0_0402_5%~D

0_0402_5%~D
@C1804
@

@C1805
@

107 GND PEX_TX11# 108 277 RSVD DP_B_L0 276

C1804

C1805

109 PEX_RX11# PEX_TX11 110 279 RSVD GND 278

@ R1729
@R1729 U613 111 112 281 280
2 0_0402_5%~D 2 PEX_RX11 GND GND DP_B_L1#

R2596

R2597

R2598
1 8 B+_MXM1_A1 113 114 283 282
VIN+ A1 B+_MXM1_A0 GND PEX_TX10# DP_A_L0# DP_B_L1
46 MXM1_CUR_VIN- 1 2 2 7 115 116 285 284

2
VIN- A0 MXM_CUR_DAT PEX_RX10# PEX_TX10 DP_A_L0 GND +3VALW
3 GND SDA 6 117 PEX_RX10 GND 118 287 GND DP_B_L2# 286
+3V_MXM1 4 5 MXM_CUR_CLK 119 120 @ @ @ 289 288 C1850
VS SCL GND PEX_TX9# DP_A_L1# DP_B_L2
121 PEX_RX9# PEX_TX9 122 291 DP_A_L1 GND 290 1 2
INA219AIDCNRG4_SOT23-8 123 124 293 292
PEX_RX9 GND GND DP_B_L3#

5
125 126 295 294 0.1U_0402_25V6K~D
GND PEX_TX8# DP_A_L2# DP_B_L3
127 128 297 296 IN1 1

P
PEX_RX8# PEX_TX8 DP_A_L2 GND MXM2_PCH_PWR_ON 16,20
129 130 299 298 MXM2_PWR_ON 4
PEX_RX8 GND PEG_HTX_C_GRX_N15 GND DP_B_AUX# O
131 GND PEX_TX7# 132 PEG_HTX_C_GRX_N15 4 301 DP_A_L3# DP_B_AUX 300 IN2 2 VGA_ON 14,17

G
4 PEG_GTX_HRX_N15 PEG_GTX_HRX_N15 133 134 PEG_HTX_C_GRX_P15 303 302
PEX_RX7# PEX_TX7 PEG_HTX_C_GRX_P15 4 DP_A_L3 DP_B_HPD
4 PEG_GTX_HRX_P15 PEG_GTX_HRX_P15 135 136 305 304

3
PEX_RX7 GND PEG_HTX_C_GRX_N14 GND DP_A_HPD UH8
137 GND PEX_TX6# 138 PEG_HTX_C_GRX_N14 4 307 DP_A_AUX# 3V3 306 +3V_MXM1
4 PEG_GTX_HRX_N14 PEG_GTX_HRX_N14 139 140 PEG_HTX_C_GRX_P14 309 308 SN74AHC1G08DCKR_SC70-5
PEX_RX6# PEX_TX6 PEG_HTX_C_GRX_P14 4 DP_A_AUX 3V3
4 PEG_GTX_HRX_P14 PEG_GTX_HRX_P14 141 142 310 40mil(1A)
PEX_RX6 GND PEG_HTX_C_GRX_N13 PRSNT_L#
143 GND PEX_TX5# 144 PEG_HTX_C_GRX_N13 4
4 PEG_GTX_HRX_N13 PEG_GTX_HRX_N13 145 146 PEG_HTX_C_GRX_P13 311 312
PEX_RX5# PEX_TX5 PEG_HTX_C_GRX_P13 4 GND GND
4 PEG_GTX_HRX_P13 PEG_GTX_HRX_P13 147 148
PEX_RX5 GND PEG_HTX_C_GRX_N12 JAE_MM70-314-310B1-1-R300
A 149 GND PEX_TX4# 150 PEG_HTX_C_GRX_N12 4 A
+3V_MXM1 PEG_GTX_HRX_N12 151 152 PEG_HTX_C_GRX_P12
4 PEG_GTX_HRX_N12 PEX_RX4# PEX_TX4 PEG_HTX_C_GRX_P12 4
4 PEG_GTX_HRX_P12 PEG_GTX_HRX_P12 153 154
PEX_RX4 GND PEG_HTX_C_GRX_N11
155 156

R1830 10K_0402_5%~D MXM2_PCH_PWROK

4 PEG_GTX_HRX_N11 PEG_GTX_HRX_N11
PEG_GTX_HRX_P11
157
GND
PEX_RX3#
PEX_TX3#
PEX_TX3 158 PEG_HTX_C_GRX_P11
PEG_HTX_C_GRX_N11 4
PEG_HTX_C_GRX_P11 4
DELL CONFIDENTIAL/PROPRIETARY
2 1 4 PEG_GTX_HRX_P11 159 PEX_RX3 GND 160
161 GND Compal Electronics, Inc.
@ R112 1 2 10K_0402_5%~D VGA2_WAKE# PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
JAE_MM70-314-310B1-1-R300 TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC M/B LA-8321
@ R111 1 2 10K_0402_5%~D VGA2_DISABLE# NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
4019H5
Date: Wednesday, August 01, 2012 Sheet 15 of 66
5 4 3 2 1
 5 4 3 2 1

+3V_PCH
@ RH51 JPCHXDP
1 2 +3V_PCH_XDP 1 2
USB_OC0# @ RH1 33_0402_5%~D XDP_FN0 0_0402_5% GND0 GND1 XDP_FN16
19,43 USB_OC0# 1 2 1 3 OBSFN_A0 OBSFN_C0 4
19,43 USB_OC1# USB_OC1# @ RH3 1 2 33_0402_5%~D XDP_FN1 5 6 XDP_FN17
1.5VDDR_VID0 @ RH4 33_0402_5%~D XDP_FN2 @ CH1
@CH1 OBSFN_A1 OBSFN_C1
19,51 1.5VDDR_VID0 1 2 7 GND2 GND3 8
1.5VDDR_VID1 @ RH5 1 2 33_0402_5%~D XDP_FN3 0.1U_0402_25V6K~D XDP_FN0 9 10 XDP_FN8
19,51 1.5VDDR_VID1 USB_OC4# @ RH6 33_0402_5%~D XDP_FN4 2 XDP_FN1 OBSDATA_A0 OBSDATA_C0 XDP_FN9
19,43 USB_OC4# 1 2 11 OBSDATA_A1 OBSDATA_C1 12
19,36 USB_OC2# USB_OC2# @ RH7 1 2 33_0402_5%~D XDP_FN5 13 14
USB3_SMI# @ RH8 33_0402_5%~D XDP_FN6 XDP_FN2 GND4 GND5 XDP_FN10
19,36 USB_OC3# 1 2 15 OBSDATA_A2 OBSDATA_C2 16
ESATA_DETECT# @ RH9 1 2 33_0402_5%~D XDP_FN7 XDP_FN3 17 18 XDP_FN11
19,43 ESATA_DETECT# PCH_GPIO16 @ RH10 33_0402_5%~D XDP_FN8 OBSDATA_A3 OBSDATA_C3
20 PCH_GPIO16 1 2 19 GND6 GND7 20
D MXM2_PCH_PWR_ON @ RH12 1 2 33_0402_5%~D XDP_FN9 21 22 D
15,20 MXM2_PCH_PWR_ON PCH_GPIO21 @ RH13 33_0402_5%~D XDP_FN10 OBSFN_B0 OBSFN_D0
1 2 23 OBSFN_B1 OBSFN_D1 24
BBS_BIT0_R @ RH14 1 2 33_0402_5%~D XDP_FN11 25 26
ODD_DETECT# @ RH15 33_0402_5%~D XDP_FN12 XDP_FN4 GND8 GND9 XDP_FN12
20,34 ODD_DETECT# 1 2 27 OBSDATA_B0 OBSDATA_D0 28
20 PCH_GPIO37 PCH_GPIO37 @ RH16 1 2 33_0402_5%~D XDP_FN13 XDP_FN5 29 30 XDP_FN13
PCH_GPIO16 @ RH17 33_0402_5%~D XDP_FN14 OBSDATA_B1 OBSDATA_D1
20 PCH_GPIO16 1 2 31 GND10 GND11 32
MXM2_PRSNT_R# @ RH18 1 2 33_0402_5%~D XDP_FN15 XDP_FN6 33 34 XDP_FN14
15,20 MXM2_PRSNT_R# PCH_GPIO15 @ RH19 33_0402_5%~D XDP_FN16 XDP_FN7 OBSDATA_B2 OBSDATA_D2 XDP_FN15
20 PCH_GPIO15 1 2 35 OBSDATA_B3 OBSDATA_D3 36
20 CRT_DET CRT_DET @ RH20 1 2 33_0402_5%~D XDP_FN17 37 38
VGATE GND12 GND13
5,18,53 VGATE 39 PWRGOOD/HOOK0 ITPCLK/HOOK4 40
Please close to JXDP2 5,18,40 PBTN_OUT# 1 2 PCH_PWRBTN#_XDP 41 HOOK1 ITPCLK#/HOOK5 42 @ RH24
@ RH21 0_0402_5% 43 44 +3V_PCH_XDP 1K_0402_5%
UH4A VCC_OBS_AB VCC_OBS_CD PLTRST1#_XDP 1
45 HOOK2 RESET#/HOOK6 46 2 PLT_RST# 5,19,31,35,40,43
47 48 XDP_DBRESET# XDP_DBRESET# 5,18
PCH_RTCX1 LPC_AD0 HOOK3 DBR#/HOOK7
A20 RTCX1 FWH0 / LAD0 C38 LPC_AD0 35,40 49 GND14 GND15 50
A38 LPC_AD1 LPC_AD1 35,40 5,10,11,12,13,17,34,35,43 PCH_SMBDATA 51 52 PCH_JTAG_TDO PCH_JTAG_TDO 5
+RTCVCC PCH_RTCX2 FWH1 / LAD1 LPC_AD2 SDA TD0
C20 B37 53 54

LPC
RTCX2 FWH2 / LAD2 LPC_AD2 35,40 5,10,11,12,13,17,34,35,43 PCH_SMBCLK SCL TRST#
C37 LPC_AD3 LPC_AD3 35,40 55 56 PCH_JTAG_TDI PCH_JTAG_TDI 5
PCH_RTCRST# FWH3 / LAD3 PCH_JTAG_TCK TCK1 TDI PCH_JTAG_TMS
1 2 D20 RTCRST# 5 PCH_JTAG_TCK 57 TCK0 TMS 58 PCH_JTAG_TMS 5
RH22 20K_0402_5% D36 LPC_FRAME# LPC_FRAME# 35,40 59 60
PCH_SRTCRST# FWH4 / LFRAME# GND16 GND17
1 2 G22 SRTCRST#
RH23 20K_0402_5% E36 LPC_LDRQ0# SAMTE_BSH-030-01-L-D-A
SM_INTRUDER# LDRQ0# LPC_LDRQ1# @ T79 PAD~D CONN@
1 2 K22 K36

RTC
INTRUDER# LDRQ1# / GPIO23

@CLRCMOS
@

@CLRME
@
RH11 1M_0402_5%~D 1 1 @ T77 PAD~D
1

1
1U_0603_25V6-K~D

SHORT PADS
CLRCMOS

1U_0603_25V6-K~D

SHORT PADS
CLRME
PCH_INTVRMEN C17 V5 SERIRQ
INTVRMEN SERIRQ SERIRQ 40
CH4

CH5
2

2
2 2
SATA0RXN AM3 SATA_PRX_DTX_N0 34
HDA_BIT_CLK N34 AM1
HDA_BCLK SATA0RXP
AP7
SATA_PRX_DTX_P0 34
SATA_PTX_DRX_N0 34
HDD1

SATA 6G
+5VS HDA_SYNC SATA0TXN
L34 HDA_SYNC SATA0TXP AP5 SATA_PTX_DRX_P0 34
1 2 HDA_BIT_CLK
C 32 HDA_BITCLK_AUDIO RH25 33_0402_5%~D HDA_SPKR C
32 HDA_SPKR T10 SPKR SATA1RXN AM10 SATA_PRX_DTX_N1 34
2

+3VS
G

1 2 HDA_RST# AM8
32 HDA_RST_AUDIO#
RH27 33_0402_5%~D HDA_RST# K34
SATA1RXP
AP11
SATA_PRX_DTX_P1 34
SATA_PTX_DRX_N1 34
HDD2 +RTCVCC
HDA_SYNC_R HDA_RST# SATA1TXN
32 HDA_SYNC_AUDIO 1 2 3 1 SATA1TXP AP10 SATA_PTX_DRX_P1 34
RH26 33_0402_5%~D SERIRQ RH28 1 10K_0402_5%~D
S

2
32 HDA_SDIN0 HDA_SDIN0 E34 AD7 PCH_INTVRMEN RH38 2 1 330K_0402_5%~D
HDA_SDIN0 SATA2RXN SATA_PRX_DTX_N2 34
1

QH7
SATA2RXP AD5 SATA_PRX_DTX_P2 34 ODD PCH_GPIO21 RH30 2 1 10K_0402_5%~D
R1906 BSS138_SOT23~D G34 AH5 SATA_PTX_DRX_N2 34 PCH_INTVRMEN RH39 2 @ 1 330K_0402_5%~D
HDA_SDIN1 SATA2TXN PCH_SATALED#RH31
1M_0402_5%~D SATA2TXP AH4 SATA_PTX_DRX_P2 34 2 1 10K_0402_5%~D
1 2 C34 HDA_SDIN2
@RH263
@ RH263 0_0402_5% AB8 INTVRMEN
SATA_PRX_DTX_N3 34
* H：Integrated

IHDA
2

SATA3RXN
@ RH52
@RH52 A34 HDA_SDIN3 SATA3RXP AB10 SATA_PRX_DTX_P3 34 VRM enable
40 HDA_SDO 1 2 0_0402_5%~D SATA3TXN AF3 SATA_PTX_DRX_N3 34 HDD3 L：Integrated VRM disable +3VS

SATA3TXP AF1 SATA_PTX_DRX_P3 34

1 2 HDA_SDOUT A36
+3V_PCH +3V_PCH +3V_PCH 32 HDA_SDOUT_AUDIO RH29 33_0402_5%~D HDA_SDO HDA_SPKR RH35 @
Y7 SATA_PRX_DTX_N4 43 2 1 1K_0402_5%

SATA
SATA4RXN
SATA4RXP Y5 SATA_PRX_DTX_P4 43
C36 HDA_DOCK_EN# / GPIO33 SATA4TXN AD3 SATA_PTX_DRX_N4 43 E-SATA LOW=Default
1

@ RH43
@RH43 @ RH44
@RH44 @ RH45 N32 HDA_DOCK_RST# / GPIO13
SATA4TXP AD1 SATA_PTX_DRX_P4 43 *HIGH=No Reboot
200_0402_5% 200_0402_5% 200_0402_5% Y3 SATA_PRX_DTX_N5 34
SATA5RXN
Y1
SATA5RXP
AB3
SATA_PRX_DTX_P5 34
SATA_PTX_DRX_N5 34
mSATA
2

SATA5TXN
PCH_JTAG_TDO PCH_JTAG_TMS PCH_JTAG_TDI PCH_JTAG_TCK PCH_JTAG_TCK J3 JTAG_TCK SATA5TXP AB1 SATA_PTX_DRX_P5 34 HDA_SDO +3V_PCH
1

PCH_JTAG_TMS H7 JTAG_TMS SATAICOMPO Y11 +1.05VS_VCC_SATA ME debug mode , this signal has a weak internal PD
RH47 RH48 RH49 RH59
100_0402_1% 100_0402_1% 100_0402_1% 51_0402_5% PCH_JTAG_TDI K5 JTAG_TDI JTAG SATAICOMPI Y10 SATA_COMP 1
RH40
2
37.4_0402_1%
L=>security measures defined in the Flash HDA_SDOUT RH41 2 @ 1 1K_0402_5%
Descriptor will be in effect (default)
PCH_JTAG_TDO H1
*Low = Disabled
2

JTAG_TDO +1.05VS_SATA3
SATA3RCOMPO AB12 High = Enabled
B
H=>Flash Descriptor Security will be overridden B
AB13 SATA3_COMP 1 2
SATA3COMPI RH42 49.9_0402_1%
@ CH97
@CH97 RH240
2 1 PCH_SPI_CLK_R 1 2 PCH_SPI_CLK T3 AH1 RBIAS_SATA3 1 2
SPI_CLK SATA3RBIAS RH46 750_0402_1% HDA_SYNC
22P_0402_50V8J~D 33_0402_5%~D PCH_SPI_CS# Y14 SPI_CS0# This signal has a weak internal pull-down
T1 SPI_CS1# On Die PLL VR is supplied by
P3 PCH_SATALED# 1.5V when smapled high
SPI

SATALED# PCH_SATALED# 38
RH240 & CH97 as close as PCH_SPI_SI V4 V14 PCH_GPIO21 +3VS 1.8V when sampled low
SPI_MOSI SATA0GP / GPIO21 Needs to be pulled High for Huron River platfrom
UH4 PCH_SPI_SO U3 P1 BBS_BIT0_R 1 2
SPI_MISO SATA1GP / GPIO19 RH266 10K_0402_5%~D +3V_PCH

BD82HM77 SLJ8C BGA989~D

BBS_BIT0 - BIOS BOOT STRAP BIT 0 HDA_SYNC RH66 2 1 1K_0402_5%
PCH_RTCX1

1 2 PCH_RTCX2 GPIO19:
RH2 10M_0402_5%
If not used, requires 8.2-kΩ to 10-kΩ
YH1 +3V_PCH pull-up to +Vcc_3.3 (+3.3VS)
+3V_PCH
1 2 check list Rev 1.0
32.768KHZ_12.5PF_9H03200019
2

SPI ROM FOR ME

15P_0402_50V8J~D

@RH57
@ RH57 RH53 RH55
3.3K_0402_5%~D 3.3K_0402_5%~D 3.3K_0402_5%~D
( 8MByte )
1 1
CH2

CH3
1

18P_0402_50V8J~D
A 2 2 U1 A
PCH_SPI_CS# 1 2 PCH_SPI_CS#_R 1 8 +3V_PCH
PCH_SPI_SO @RH60
@ RH60 PCH_SPI_SO_R CS# VCC PCH_SPI_HOLD#
1 20_0402_5%~D 2 DO(IO1) HOLD#(IO3) 7
@RH58
@ RH58 0_0402_5%~D PCH_SPI_WP# 3 6 PCH_SPI_CLK_R 1
WP#(IO2) CLK PCH_SPI_SI_R 1
4 5 2 PCH_SPI_SI
GND DI(IO0)
W25Q64FVSSIG_SO8
@RH168
@ RH168 0_0402_5%~D CH6 DELL CONFIDENTIAL/PROPRIETARY
0.1U_0402_25V6K~D
2
Compal Electronics, Inc.
02/21-111 PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
Main:SA000039A2L Winbomd W25Q64FVSSIG BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC M/B LA-8321
2ed :SA00004G60L MXIC MX25L6406EM2I-12G NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Size Document Number Rev
B
4019H5
Date: Wednesday, August 01, 2012 Sheet 16 of 66
5 4 3 2 1

Compal Electronics, Inc.

 5 4 3 2 1

+3V_PCH
1 2 EC_LID_OUT# EC_LID_OUT# 40
@ RH162 0_0402_5%~D SMBCLK 1 2
UH4B RH61 2.2K_0402_5%~D
SMBDATA 1 2
31 PCIE_PRX_DTX_N1 PCIE_PRX_DTX_N1 BG34 RH62 2.2K_0402_5%~D
PCIE_PRX_DTX_P1 PERN1 PCH_LID_SW_IN# SML0CLK
31 PCIE_PRX_DTX_P1 BJ34 PERP1 SMBALERT# / GPIO11 E12 1 2 LID_SW_IN# 37,38,40 1 2
10/100/1G LAN ---> 31 PCIE_PTX_DRX_N1
CH12 1 2 0.1U_0402_25V6K~D PCIE_PTX_DRX_N1_C AV32 PETN1
@ RH172 0_0402_5% RH63 2.2K_0402_5%~D
CH13 1 2 0.1U_0402_25V6K~D PCIE_PTX_DRX_P1_C AU32 H14 SMBCLK SML0DATA 1 2
31 PCIE_PTX_DRX_P1 PETP1 SMBCLK RH64 2.2K_0402_5%~D
PCIE_PRX_DTX_N2 SMBDATA
MEMORY SML1CLK
35 PCIE_PRX_DTX_N2 BE34 PERN2 SMBDATA C9 1 2
PCIE_PRX_DTX_P2 BF34 RH65 2.2K_0402_5%~D
35 PCIE_PRX_DTX_P2 PERP2
DMC ---> 35 PCIE_PTX_DRX_N2 CH10 1 2 0.1U_0402_25V6K~D PCIE_PTX_DRX_N2_C BB32 PETN2
SML1DATA 1 2
35 PCIE_PTX_DRX_P2 CH20 1 2 0.1U_0402_25V6K~D PCIE_PTX_DRX_P2_C AY32 RH70 2.2K_0402_5%~D
PETP2 DRAMRST_CNTRL_PCH DRAMRST_CNTRL_PCH
A12 1 2

SMBUS
D SML0ALERT# / GPIO60 DRAMRST_CNTRL_PCH 6,10,11 D
35 PCIE_PRX_DTX_N3 PCIE_PRX_DTX_N3 BG36 RH67 1K_0402_5%
PCIE_PRX_DTX_P3 PERN3 SML0CLK PCH_GPIO74
35 PCIE_PRX_DTX_P3 BJ36 PERP3 SML0CLK C8 1 2
MiniWLAN (Mini Card 1)---> 35 PCIE_PTX_DRX_N3
CH8 1 2 0.1U_0402_25V6K~D PCIE_PTX_DRX_N3_C AV34 PETN3
R1907 10K_0402_5%~D
CH9 1 2 0.1U_0402_25V6K~D PCIE_PTX_DRX_P3_C AU34 G12 SML0DATA
35 PCIE_PTX_DRX_P3 PETP3 SML0DATA
43 PCIE_PRX_DTX_N4 PCIE_PRX_DTX_N4 BF36
PCIE_PRX_DTX_P4 PERN4 +3VALW
43 PCIE_PRX_DTX_P4 BE36 PERP4
CARD_READER ---> 43 PCIE_PTX_DRX_N4
CH14 1 2 0.1U_0402_25V6K~D PCIE_PTX_DRX_N4_C AY34 PETN4 SML1ALERT# / PCHHOT# / GPIO74 C13 PCH_GPIO74
CH15 1 2 0.1U_0402_25V6K~D PCIE_PTX_DRX_P4_C BB34
43 PCIE_PTX_DRX_P4 PETP4 SML1CLK LID_SW_IN#
SML1CLK / GPIO58 E14 2 1
PCIE_PRX_DTX_N5 BG37 EC R1730 10K_0402_5%~D

PCI-E*
43 PCIE_PRX_DTX_N5 PERN5
43 PCIE_PRX_DTX_P5 PCIE_PRX_DTX_P5 BH37 PERP5 SML1DATA / GPIO75 M16 SML1DATA 20090512 +3V_MXM
EXPRESS_CARD ---> 43 PCIE_PTX_DRX_N5
CH16 1 2 0.1U_0402_25V6K~D PCIE_PTX_DRX_N5_C AY36 PETN5 add dual mosfet prevent
CH17 1 2 0.1U_0402_25V6K~D PCIE_PTX_DRX_P5_C BB36
43 PCIE_PTX_DRX_P5 PETP5
ATI M92 electric leakage

1
BJ38 PERN6
BG38 RH235
PERP6 +3V_MXM 1K_0402_5%
AU36 M7

Controller
PETN6 CL_CLK1
AV36 PETP6 +3V_PCH

2
1
BG40 T11 No support iAMT

Link
PERN7 CL_DATA1 PEG_CLKREQ# 14
BJ40 R1528
PERP7

1
@ AY40 10K_0402_5%~D

G
@ CH98 RH250 PETN7 RH80 RH236
BB40 PETP7 CL_RST1# P10
CLK_PCH_14M 2 1 1 2 10K_0402_5%~D @

2
33_0402_5%~D BE38 3 4 10K_0402_5%~D
22P_0402_50V8J~D PERN8
BC38

2
D
PERP8

S
Reserve for EMI please close to UH4 AW38

G
PETN8 QH3B
AY38 PETP8 DMN66D0LDW-7
M10 PEG_CLKREQ#_R 6 1
@ PAD~D T95 @ PEG_A_CLKRQ# / GPIO47
Y40

D
CLKOUT_PCIE0N

S
@ CH99 RH251 PAD~D T96 @ Y39 QH3A
C CLK_PCI_LPBACK2 CLKOUT_PCIE0P CLK_PEG_PCH# DMN66D0LDW-7 C
1 1 2 CLKOUT_PEG_A_N AB37 CLK_PEG_PCH# 14
33_0402_5%~D +3V_PCH RH81 1 2 10K_0402_5%~D PCIECLKREQ0# J2 AB38 CLK_PEG_PCH CLK_PEG_PCH 14

CLOCKS
22P_0402_50V8J~D PCIECLKRQ0# / GPIO73 CLKOUT_PEG_A_P
1 2
Reserve for EMI please close to UH4 @ RH237 0_0402_5%
@ RH88 1 2 0_0402_5%~D PCIE_LAN# AB49 AV22 CLK_CPU_DMI# +3VS +3VS
31 CLK_PCIE_LAN# CLKOUT_PCIE1N CLKOUT_DMI_N CLK_CPU_DMI# 5
10/100/1G LAN ---> 31 CLK_PCIE_LAN
@ RH90 1 2 0_0402_5%~D PCIE_LAN AB47 CLKOUT_PCIE1P CLKOUT_DMI_P AU22 CLK_CPU_DMI CLK_CPU_DMI 5
+3VS RH152 2 1 10K_0402_5%~D
31 LANCLK_REQ# LANCLK_REQ# M1 PCIECLKRQ1# / GPIO18
CLKOUT_DP_N AM12

2
CLKOUT_DP_P AM13
35 CLK_PCIE_MINI2# @ RH98 1 2 0_0402_5%~D PCIE_MINI2# AA48 RH146 RH147
@ RH191 PCIE_MINI2 CLKOUT_PCIE2N
35 CLK_PCIE_MINI2 1 2 0_0402_5%~D AA47 CLKOUT_PCIE2P 2.2K_0402_5%~D 2.2K_0402_5%~D
MiniDMC (Mini Card 2)---> +3VS RH103 2 1 10K_0402_5%~D CLKIN_DMI_N BF18 CLKIN_DMI#

2
MINI2CLK_REQ# V10 BE18 CLKIN_DMI

G
35 MINI2CLK_REQ#

1
PCIECLKRQ2# / GPIO20 CLKIN_DMI_P

@ RH82 1 2 0_0402_5%~D PCIE_MINI3# Y37 BJ30 CLKIN_DMI2# SMBCLK 6 1

35 CLK_PCIE_MINI3# CLKOUT_PCIE3N CLKIN_GND1_N PCH_SMBCLK 5,10,11,12,13,16,34,35,43
@ RH83 1 2 0_0402_5%~D PCIE_MINI3 Y36 BG30 CLKIN_DMI2

D
35 CLK_PCIE_MINI3 CLKOUT_PCIE3P CLKIN_GND1_P

S
MiniWLAN (Mini Card 1)---> +3V_PCH RH84 2 1 10K_0402_5%~D QH1A
35 MINI1CLK_REQ# MINI1CLK_REQ# A8 DMN66D0LDW-7
PCIECLKRQ3# / GPIO25 CLKIN_DOT96#
CLKIN_DOT_96N G24

5
E24 CLKIN_DOT96 1 2

G
@ RH92 CLKIN_DOT_96P
43 CLK_PCIE_CD# 1 2 0_0402_5%~D PCIE_CD# Y43 CLKOUT_PCIE4N
@ RH239 0_0402_5%
@ RH93 1 2 0_0402_5%~D PCIE_CD Y45
43 CLK_PCIE_CD CLKOUT_PCIE4P
Card Reader ---> +3V_PCH RH94 2 1 10K_0402_5%~D CLKIN_SATA_N AK7 CLKIN_SATA# SMBDATA 3 4 PCH_SMBDATA 5,10,11,12,13,16,34,35,43
43 CDCLK_REQ# CDCLK_REQ# L12 AK5 CLKIN_SATA

D
PCIECLKRQ4# / GPIO26 CLKIN_SATA_P

S
QH1B
DMN66D0LDW-7
@ RH105 1 2 0_0402_5%~D PCIE_EXP# V45 K45 CLK_PCH_14M
43 CLK_PCIE_EXP# @ RH125 CLKOUT_PCIE5N REFCLK14IN
43 CLK_PCIE_EXP 1 2 0_0402_5%~D PCIE_EXP V46 CLKOUT_PCIE5P 1 2
EXPRESS_CARD ---> +3V_PCH RH97 1 2 10K_0402_5%~D @ RH252 0_0402_5%
43 EXPCLK_REQ# EXPCLK_REQ# L14 H45 CLK_PCI_LPBACK
PCIECLKRQ5# / GPIO44 CLKIN_PCILOOPBACK CLK_PCI_LPBACK 19
B +3VS B
MXM2_PEG_PCH# AB42 V47 XTAL25_IN
15 MXM2_PEG_PCH# CLKOUT_PEG_B_N XTAL25_IN
MXM2 ---> 15 MXM2_PEG_PCH
MXM2_PEG_PCH AB40 CLKOUT_PEG_B_P XTAL25_OUT V49 XTAL25_OUT

2
MXM2_CLKREQ#_R E6

G
PEG_B_CLKRQ# / GPIO56
Y47 XCLK_RCOMP 1 2 +1.05VS_VCCDIFFCLKN
XCLK_RCOMP RH100 90.9_0402_1% SML1CLK 6
V40 CLKOUT_PCIE6N 1 EC_SMB_CK2 15,30,40,41,44
V42

D
CLKOUT_PCIE6P

S
+3V_PCH RH101 1 2 10K_0402_5%~D QH6A
XTAL25_IN T13 DMN66D0LDW-7
34 mSATA_DET# PCIECLKRQ6# / GPIO45

5
G
2 1 XTAL25_OUT PAD~D T107 @ V38 K43 IO_DET#
CLKOUT_PCIE7N CLKOUTFLEX0 / GPIO64 IO_DET# 43
1M_0402_5%~D RH99 PAD~D T108 @ V37
FLEX CLOCKS
@ RH104 CLKOUT_PCIE7P
+3V_PCH 1 2 10K_0402_5%~D CLKOUTFLEX1 / GPIO65 F47 DMC_PCH_DET#
DMC_PCH_DET# 35
SML1DATA QH6B 3 4 EC_SMB_DA2 15,30,40,41,44
VGA_ON K12 DMN66D0LDW-7

D
YH2 14,15 VGA_ON PCIECLKRQ7# / GPIO46

S
25MHZ_12PF_7V25000012 H47 BT_DET#
CLKOUTFLEX2 / GPIO66 BT_DET# 35
@ RH106 1 2 0_0402_5%~D CLK_BCLK_ITP# AK14
5 CLK_CPU_ITP# CLKOUT_ITPXDP_N
1 1 3 3 5 CLK_CPU_ITP
@ RH107 1 2 0_0402_5%~D CLK_BCLK_ITP AK13 CLKOUT_ITPXDP_P CLKOUTFLEX3 / GPIO67 K49 CAM_DET#
CAM_DET# 25
GND GND
15P_0402_50V8J~D

15P_0402_50V8J~D

CLKIN_DMI2# RH91 1 2 10K_0402_5%~D

@ RH108 2 1 0_0402_5% +3V_MXM BD82HM77 SLJ8C BGA989~D CLKIN_DMI2 RH89 1 2 10K_0402_5%~D
1 2 4 1 7 CLK_RES_ITP#
CH19

CH18

@ RH109 2 1 0_0402_5% CLKIN_DMI# RH74 1 2 10K_0402_5%~D

7 CLK_RES_ITP
1

+3VS CLKIN_DMI RH75 1 2 10K_0402_5%~D

RH256 CLKIN_DOT96# RH76 1 2 10K_0402_5%~D
2 2 1K_0402_5% +3V_MXM IO_DET# CLKIN_DOT96 RH77 10K_0402_5%~D
1 2 1 2
R1737 10K_0402_5%~D CLKIN_SATA# RH78 1 2 10K_0402_5%~D
CAM_DET# 1 2 CLKIN_SATA RH79 1 2 10K_0402_5%~D
2

R1732 10K_0402_5%~D CLK_PCH_14M RH183 1 2 10K_0402_5%~D

15 MXM2_CLKREQ# +3V_PCH
R1565 BT_DET# 1 2
5

10K_0402_5%~D R1734 10K_0402_5%~D

G

DMC_PCH_DET# 1 2
1

R1735 10K_0402_5%~D If use extenal CLK gen, please place close to

2

A 4 3 RH154 CLK gen . else, please place close to PCH A

10K_0402_5%~D
D
S
1

QH9B
2

RH257 DMN66D0LDW-7
G

@
10K_0402_5%~D
1 6 MXM2_CLKREQ#_R DELL CONFIDENTIAL/PROPRIETARY
2

D
S

QH9A
2 1 DMN66D0LDW-7 Compal Electronics, Inc.
@ RH258 0_0402_5% PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC M/B LA-8321
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
4019H5
Date: Wednesday, August 01, 2012 Sheet 17 of 66
5 4 3 2 1
 5 4 3 2 1

UH4C

4 DMI_CTX_PRX_N0 DMI_CTX_PRX_N0 BC24 BJ14 FDI_CTX_PRX_N0

DMI0RXN FDI_RXN0 FDI_CTX_PRX_N0 4
4 DMI_CTX_PRX_N1 DMI_CTX_PRX_N1 BE20 AY14 FDI_CTX_PRX_N1
DMI1RXN FDI_RXN1 FDI_CTX_PRX_N1 4
4 DMI_CTX_PRX_N2 DMI_CTX_PRX_N2 BG18 BE14 FDI_CTX_PRX_N2
DMI2RXN FDI_RXN2 FDI_CTX_PRX_N2 4
4 DMI_CTX_PRX_N3 DMI_CTX_PRX_N3 BG20 BH13 FDI_CTX_PRX_N3 UH4D
DMI3RXN FDI_RXN3 FDI_CTX_PRX_N3 4
BC12 FDI_CTX_PRX_N4 IGPU_BKLT_EN J47 AP43
FDI_RXN4 FDI_CTX_PRX_N4 4 24 IGPU_BKLT_EN L_BKLTEN SDVO_TVCLKINN
4 DMI_CTX_PRX_P0 DMI_CTX_PRX_P0 BE24 BJ12 FDI_CTX_PRX_N5 PCH_ENVDD M45 AP45
DMI0RXP FDI_RXN5 FDI_CTX_PRX_N5 4 24,40 PCH_ENVDD L_VDD_EN SDVO_TVCLKINP
4 DMI_CTX_PRX_P1 DMI_CTX_PRX_P1 BC20 BG10 FDI_CTX_PRX_N6
DMI1RXP FDI_RXN6 FDI_CTX_PRX_N6 4
4 DMI_CTX_PRX_P2 DMI_CTX_PRX_P2 BJ18 BG9 FDI_CTX_PRX_N7 P45 AM42
DMI2RXP FDI_RXN7 FDI_CTX_PRX_N7 4 24 PCH_INV_PWM L_BKLTCTL SDVO_STALLN
4 DMI_CTX_PRX_P3 DMI_CTX_PRX_P3 BJ20 AM40
DMI3RXP FDI_CTX_PRX_P0 PCH_LCD_CLK SDVO_STALLP
FDI_RXP0 BG14 FDI_CTX_PRX_P0 4 24 PCH_LCD_CLK T40 L_DDC_CLK
D DMI_CRX_PTX_N0 AW24 BB14 FDI_CTX_PRX_P1 PCH_LCD_DATA K47 AP39 D
4 DMI_CRX_PTX_N0 DMI0TXN FDI_RXP1 FDI_CTX_PRX_P1 4 24 PCH_LCD_DATA L_DDC_DATA SDVO_INTN
DMI_CRX_PTX_N1 AW20 BF14 FDI_CTX_PRX_P2 AP40
4 DMI_CRX_PTX_N1 DMI1TXN FDI_RXP2 FDI_CTX_PRX_P2 4 SDVO_INTP
DMI_CRX_PTX_N2 BB18 BG13 FDI_CTX_PRX_P3 CTRL_CLK T45
4 DMI_CRX_PTX_N2 DMI2TXN FDI_RXP3 FDI_CTX_PRX_P3 4 L_CTRL_CLK
DMI_CRX_PTX_N3 AV18 BE12 FDI_CTX_PRX_P4 CTRL_DATA P39
4 DMI_CRX_PTX_N3 DMI3TXN FDI_RXP4 FDI_CTX_PRX_P4 4 L_CTRL_DATA
BG12 FDI_CTX_PRX_P5

DMI
FDI
FDI_RXP5 FDI_CTX_PRX_P5 4
DMI_CRX_PTX_P0 AY24 BJ10 FDI_CTX_PRX_P6 LVDS_IBG AF37 P38 HDMICLK_NB 27
4 DMI_CRX_PTX_P0 DMI0TXP FDI_RXP6 FDI_CTX_PRX_P6 4 LVD_IBG SDVO_CTRLCLK
DMI_CRX_PTX_P1 AY20 BH9 FDI_CTX_PRX_P7 PAD~D T203 AF36 M39 HDMIDAT_NB 27
4 DMI_CRX_PTX_P1 DMI1TXP FDI_RXP7 FDI_CTX_PRX_P7 4 LVD_VBG SDVO_CTRLDATA
DMI_CRX_PTX_P2 AY18 @
4 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3 DMI2TXP
4 DMI_CRX_PTX_P3 AU18 DMI3TXP AE48 LVD_VREFH
AW16 FDI_INT FDI_INT 4 AE47 AT49
FDI_INT LVD_VREFL DDPB_AUXN
DDPB_AUXP AT47
+VCCP BJ24 AV12 FDI_FSYNC0 AT40
DMI_ZCOMP FDI_FSYNC0 FDI_FSYNC0 4 DDPB_HPD TMDS_B_HPD 27
24 PCH_TXCLK- AK39 LVDSA_CLK#
1 2 DMI_IRCOMP BG25 BC10 FDI_FSYNC1 AK40 AV42

LVDS
DMI_IRCOMP FDI_FSYNC1 FDI_FSYNC1 4 24 PCH_TXCLK+ LVDSA_CLK DDPB_0N TMDS_B_DATA2# 27
RH111 49.9_0402_1% AV40 TMDS_B_DATA2 27
RBIAS_CPY FDI_LSYNC0 DDPB_0P
1 2 BH21 DMI2RBIAS FDI_LSYNC0 AV14 FDI_LSYNC0 4 24 PCH_TXOUT0- AN48 LVDSA_DATA#0 DDPB_1N AV45 TMDS_B_DATA1# 27
RH112 750_0402_1% AM47 AV46 TMDS_B_DATA1 27
24 PCH_TXOUT1- LVDSA_DATA#1 DDPB_1P
4mil width and place

Digital Display Interface

BB10 FDI_LSYNC1 AK47 AU48
within 500mil of the PCH
FDI_LSYNC1 FDI_LSYNC1 4 24 PCH_TXOUT2-
AJ48
LVDSA_DATA#2
LVDSA_DATA#3
DDPB_2N
DDPB_2P AU47
TMDS_B_DATA0# 27
TMDS_B_DATA0 27 HDMI
DDPB_3N AV47 TMDS_B_CLK# 27
24 PCH_TXOUT0+ AN47 LVDSA_DATA0 DDPB_3P AV49 TMDS_B_CLK 27
A18 DSWODVREN AM49
DSWVRMEN 24 PCH_TXOUT1+ LVDSA_DATA1
24 PCH_TXOUT2+ AK49 LVDSA_DATA2
AJ47 P46

System Power Management

LVDSA_DATA3 DDPC_CTRLCLK PCH_DPC_CLK 28
SUSACK#_R C12 E22 PCH_DPWROK_R 1 2 0_0402_5%~D PCH_RSMRST#_R P42 PCH_DPC_DAT 28
SUSACK# DPWROK @RH113
@ RH113 DDPC_CTRLDATA

24 PCH_TZCLK- AF40 LVDSB_CLK#

5,16 XDP_DBRESET# XDP_DBRESET# K3 B9 WAKE# @RH115
@ RH115 1 2 0_0402_5%~D AF39 AP47 PCH_DPC_AUXN 28
SYS_RESET# WAKE# PCIE_WAKE# 31,35,40,43 24 PCH_TZCLK+ LVDSB_CLK DDPC_AUXN
DDPC_AUXP AP49 PCH_DPC_AUXP 28
24 PCH_TZOUT0- AH45 LVDSB_DATA#0 DDPC_HPD AT38 PCH_DPC_HPD 28
5,16,53 VGATE 1 2 PCH_SYS_PWROK P12 N3 PM_CLKRUN# AH47
@R1911
@ R1911 0_0402_5%~D SYS_PWROK CLKRUN# / GPIO32 24 PCH_TZOUT1- LVDSB_DATA#1
24 PCH_TZOUT2- AF49 LVDSB_DATA#2 DDPC_0N AY47 PCH_DPC_N0 28
C AF45 AY49 C
LVDSB_DATA#3 DDPC_0P PCH_DPC_P0 28
40 PCH_PWROK 1 2 PM_PWROK_R L22 G8 SUS_STAT# T110 PAD~D AY43 PCH_DPC_N1 28
@RH117
@ RH117 0_0402_5%~D PWROK SUS_STAT# / GPIO61 @ DDPC_1N
AH43 AY45
24 PCH_TZOUT0+
24 PCH_TZOUT1+ AH49
LVDSB_DATA0
LVDSB_DATA1
DDPC_1P
DDPC_2N BA47
PCH_DPC_P1
PCH_DPC_N2
28
28 mini DP
40 PCH_APWROK 1 2 L10 APWROK SUSCLK / GPIO62 N14 SUSCLK @
@RH119
RH119 1 2 0_0402_5%~D SUSCLK_R 40 24 PCH_TZOUT2+ AF47 LVDSB_DATA2 DDPC_2P BA48 PCH_DPC_P2 28
@RH118
@ RH118 0_0402_5%~D AF43 BB47 PCH_DPC_N3 28
T112 PAD~D LVDSB_DATA3 DDPC_3N
DDPC_3P BB49 PCH_DPC_P3 28
PM_DRAM_PWRGD B13 D10 PM_SLP_S5# PM_SLP_S5# 37,40
5 PM_DRAM_PWRGD DRAMPWROK SLP_S5# / GPIO63
@
T113 PAD~D PCH_CRT_BLU N48 M43 PCH_DPD_CLK 29
PCH_RSMRST#_R C21 PM_SLP_S4# 26 PCH_CRT_BLU PCH_CRT_GRN CRT_BLUE DDPD_CTRLCLK
40 PCH_RSMRST# 1 2 RSMRST# SLP_S4# H4 PM_SLP_S4# 40 26 PCH_CRT_GRN P49 CRT_GREEN DDPD_CTRLDATA M36 PCH_DPD_DAT 29
@RH120
@ RH120 0_0402_5%~D @ PCH_CRT_RED T49
T114 PAD~D 26 PCH_CRT_RED CRT_RED
1 2 SUSPWRDNACK_R K16 F4 PM_SLP_S3# PM_SLP_S3# 37,40 AT45
40 SUSPWRDNACK SUSWARN#/SUSPWRDNACK/GPIO30 SLP_S3# DDPD_AUXN PCH_DPD_AUXP 29
@RH121
@ RH121 0_0402_5%~D @ PCH_CRT_DDC_CLK T39 AT43

CRT
26 PCH_CRT_DDC_CLK CRT_DDC_CLK DDPD_AUXP PCH_DPD_AUXN 29
Can be left NC when IAMT is 26 PCH_CRT_DDC_DAT PCH_CRT_DDC_DAT M40 BH41 PCH_DMC_HPD 29
CRT_DDC_DATA DDPD_HPD
5,16,40 PBTN_OUT# 1 2 PBTN_OUT#_R E20 PWRBTN# SLP_A# G10 not support on the platfrom
@RH122
@ RH122 0_0402_5%~D RH123 33_0402_5%~D BB43 PCH_DPD_N0 29
DDPD_0N
1 2 HSYNC M47 BB45
ACIN_PCH H20 ACPRESENT / GPIO31 SLP_SUS# G16 PM_SLP_SUS# T115 PAD~D
26 PCH_CRT_HSYNC
26 PCH_CRT_VSYNC 1 2 VSYNC M49
CRT_HSYNC
CRT_VSYNC
DDPD_0P
DDPD_1N BF44
PCH_DPD_P0
PCH_DPD_N1
29
29
DMC
RH124 33_0402_5%~D BE44 PCH_DPD_P1 29
BATLOW#
@ T116 PAD~D DDPD_1P
DDPD_2N BF42 PCH_DPD_N2 29 ( HDMI )
E10 BATLOW# / GPIO72 PMSYNCH AP14 H_PM_SYNC H_PM_SYNC 5 CRT_IREF T43 DAC_IREF DDPD_2P BE42 PCH_DPD_P2 29
@ T42 CRT_IRTN DDPD_3N BJ42 PCH_DPD_N3 29
DDPD_3P BG42 PCH_DPD_P3 29

1
+3V_PCH RI# A10 K14 T165 PAD~D
RI# SLP_LAN# / GPIO29 RH126 BD82HM77 SLJ8C BGA989~D
+3V_PCH If not using
@ integrated 1K_0402_0.5%
BD82HM77 SLJ8C BGA989~D LAN,signal may be left as NC.
1

2
R1900
1

10K_0402_5%~D +3VS
B R1899 B
10K_0402_5%~D
2

ACIN_PCH 1 2 PCH_CRT_DDC_CLK
RH128 2.2K_0402_5%~D
D
2

1 2 PCH_CRT_DDC_DAT
5 RH130 2.2K_0402_5%~D
G 1 2 CTRL_CLK
D
6

RH153 2.2K_0402_5%~D
14,37,40,43,47 ACIN 2 S 1 2 CTRL_DATA
4

G QH11B RH166 2.2K_0402_5%~D

DMN66D0LDW-7 +RTCVCC 1 2 PCH_LCD_CLK
S RV59 2.2K_0402_5%~D
1

QH11A 1 2 PCH_LCD_DATA
DMN66D0LDW-7 RH127 2 1 330K_0402_5%~D RV61 2.2K_0402_5%~D

DSWODVREN RH129 2 @ 1 330K_0402_5%~D

1 2
@R1901
@ R1901 10K_0402_5%~D
follow CRB Rev 0.7 DSWODVREN - On Die DSW VR Enable 1 2 PM_CLKRUN#
* H：Enable
L：Disable
R1736 10K_0402_5%~D

1 2 IGPU_BKLT_EN
SUSPWRDNACK 1 2 SUSACK#_R RH110 100K_0402_5%
@RH135
@ RH135 0_0402_5% 1 2 TMDS_B_HPD
RH243 100K_0402_5%~D
2 1 LVDS_IBG
RH244 2.37K_0402_1%
1 2 PCH_CRT_BLU
RH131 150_0402_1%
+3V_PCH 1 2 PCH_CRT_GRN
RH132 150_0402_1%
BATLOW# RH139 1 2 10K_0402_5%~D 1 2 PCH_CRT_RED
A RH133 150_0402_1% A
RI# RH140 1 2 10K_0402_5%~D 1 2 PCH_ENVDD
RH134 100K_0402_5%
WAKE# RH142 1 2 1K_0402_5%

DELL CONFIDENTIAL/PROPRIETARY
SUSPWRDNACK @RH144
@ RH144 1 2 10K_0402_5%~D Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
PCH_RSMRST# RH145 2 10K_0402_5%~D TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
1
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC M/B LA-8321
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
4019H5
Date: Wednesday, August 01, 2012 Sheet 18 of 66
5 4 3 2 1
 5 4 3 2 1

UH4E
RSVD1 AY7
RSVD2 AV7
PAD~D T118 @ BG26 AU3
PAD~D T119 @ TP1 RSVD3
BJ26 TP2 RSVD4 BG4
PAD~D T130 @ BH25
PAD~D T120 @ TP3
BJ16 TP4 RSVD5 AT10
PAD~D T131 @ BG16 BC8
PAD~D T132 @ TP5 RSVD6
AH38 TP6
PAD~D T121 @ AH37 AU2
PAD~D T122 @ TP7 RSVD7
AK43 TP8 RSVD8 AT4
PAD~D T139 @ AK45 AT3
PAD~D T123 @ TP9 RSVD9
C18 TP10 RSVD10 AT1
PAD~D T124 @ N30 AY3
PAD~D T134 @ TP11 RSVD11
H3 TP12 RSVD12 AT5
D PAD~D T140 @ AH12 AV3 D
PAD~D T125 @ TP13 RSVD13
AM4 TP14 RSVD14 AV1
PAD~D T126 @ AM5 BB1
PAD~D T135 @ TP15 RSVD15
Y13 TP16 RSVD16 BA3
PAD~D T136 @ K24 BB5
PAD~D T127 @ TP17 RSVD17
L24 TP18 RSVD18 BB3
PAD~D T128 @ AB46 BB7
PAD~D T129 @ TP19 RSVD19
AB45 TP20 RSVD20 BE8
BD4

RSVD
RSVD21
RSVD22 BF6
PAD~D T142 @ B21 AV5
PAD~D T143 @ TP21 RSVD23
M20 TP22 RSVD24 AV10
PAD~D T144 @ AY16
PAD~D T145 @ TP23
BG46 TP24 RSVD25 AT8

RSVD26 AY5
RSVD27 BA2
USB3RN1 BE28
43 USB3RN1 USB3Rn1
USB3RN2 BC30 AT12
43 USB3RN2 USB3Rn2 RSVD28
USB3RN3 BE32 BF3
36 USB3RN3 USB3Rn3 RSVD29
USB3RN4 BJ32
36 USB3RN4 USB3Rn4
USB3RP1 BC28
43 USB3RP1 USB3Rp1
USB3RP2 BE30
43 USB3RP2 USB3Rp2
USB3RP3 BF32

USB30
36 USB3RP3 USB3Rp3
USB3RP4 BG32 C24 USB20_N0
36 USB3RP4 USB3Rp4 USBP0N USB20_N0 43
43 USB3TN1 USB3TN1 AV26 A24 USB20_P0 USB/B
USB3Tn1 USBP0P USB20_P0 43
43 USB3TN2 USB3TN2 BB26 C25 USB20_N1
USB3Tn2 USBP1N USB20_N1 43
36 USB3TN3 USB3TN3 AU28 B25 USB20_P1 USB/B
USB3Tn3 USBP1P USB20_P1 43
36 USB3TN4 USB3TN4 AY30 C26 USB20_N2
USB3Tn4 USBP2N USB20_N2 36
43 USB3TP1 USB3TP1 AU26 A26 USB20_P2 USB/B
USB3TP1 USBP2P USB20_P2 36
43 USB3TP2 USB3TP2 AY26 K28 USB20_N3
C USB3Tp2 USBP3N USB20_N3 36 C
36 USB3TP3 USB3TP3 AV28 EHCIⅠ H28 USB20_P3 USB/B
USB3Tp3 USBP3P USB20_P3 36
36 USB3TP4 USB3TP4 AW30 E28 USB20_N4
USB3Tp4 USBP4N USB20_N4 35
D28 USB20_P4 Mini Card(WLAN)
USBP4P USB20_P4 35
C28 USB20_N5
USBP5N USB20_N5 35
A28 USB20_P5 DMC
USBP5P USB20_P5 35
C29 USB20_N6
USBP6N USB20_N6 37
B29 USB20_P6 ELC
USBP6P USB20_P6 37
PCI_PIRQA# K40 N28
PCI_PIRQB# PIRQA# USBP7N
K38 PIRQB# USBP7P M28
PCI_PIRQC# H38 L30 USB20_N8

PCI
PIRQC# USBP8N USB20_N8 35
PCI_PIRQD# G38 K30 USB20_P8 Bluetooth
PIRQD# USBP8P USB20_P8 35
G30 USB20_N9
USBP9N USB20_N9 43
DGPU_HOLD_RST# C46 E30 USB20_P9 USB / eSATA combo Conn.
REQ1# / GPIO50 USBP9P USB20_P9 43
DGPU_SELECT# C44 C30

USB
24,26,27,28,29 DGPU_SELECT# REQ2# / GPIO52 USBP10N
42 DGPU_PWR_EN E40 REQ3# / GPIO54 USBP10P A30
L32 USB20_N11
USBP11N USB20_N11 43
DMC_RADIO_OFF# D47 EHCIⅡ K32 USB20_P11 EXPRESS CARD
35 DMC_RADIO_OFF# GNT1# / GPIO51 USBP11P USB20_P11 43 +3V_PCH
HDMI_IN_PWMSEL# E42 G32 USB20_N12
24 HDMI_IN_PWMSEL# GNT2# / GPIO53 USBP12N USB20_N12 25
35 WL_OFF# WL_OFF# F46 E32 USB20_P12 Camera
GNT3# / GPIO55 USBP12P USB20_P12 25
C32 USB20_N13
USBP13N USB20_N13 44
A32 USB20_P13 VPK USB_OC0# RH267 1 2 10K_0402_5%~D
USBP13P USB20_P13 44
34 FFS_INT1 FFS_INT1 G42 1.5VDDR_VID1 RH268 1 2 10K_0402_5%~D
ODD_DA# PIRQE# / GPIO2 USB_OC3# RH269 10K_0402_5%~D
34 ODD_DA# G40 PIRQF# / GPIO3 USBRBIAS
Within 500 mils USB_OC2# RH270
1 2
10K_0402_5%~D
28 DP_CBL_DET C42 PIRQG# / GPIO4 USBRBIAS# C33 1 2 1 2
BT_ON# D44 RH151 22.6_0402_1% USB_OC1# RH271 1 2 10K_0402_5%~D
35 BT_ON# PIRQH# / GPIO5 USB_OC4# RH272 10K_0402_5%~D
1 2
B33 ESATA_DETECT# RH273 1 2 10K_0402_5%~D
PAD~D T206 @ USBRBIAS 1.5VDDR_VID0 RH274 10K_0402_5%~D
K10 PME# 1 2

PCH_PLTRST# C6 A14 USB_OC0#

USB_OC0# 16,43
(For USB Port 0)
PLTRST# OC0# / GPIO59 USB_OC1# (For USB Port 1)
OC1# / GPIO40 K20 USB_OC1# 16,43
B17 USB_OC2#
USB_OC2# 16,36
(For USB Port 2)
B CLK_PCI_LPBACK RH160 OC2# / GPIO41 (For USB Port 3) B
17 CLK_PCI_LPBACK 2 1 22_0402_5% CLK_PCI0 H49 CLKOUT_PCI0 OC3# / GPIO42 C16 USB_OC3#
USB_OC3# 16,36
40 CLK_PCI_LPC
CLK_PCI_LPC RH102 1 2 22_0402_5% CLK_PCI1 H43 L16 USB_OC4#
USB_OC4# 16,43 (For USB Port 9)
CLK_DEBUG RH169 CLKOUT_PCI1 OC4# / GPIO43
35 CLK_DEBUG 2 1 22_0402_5% CLK_PCI2 J48 CLKOUT_PCI2 OC5# / GPIO9 A16 1.5VDDR_VID0 1.5VDDR_VID0 16,51
PAD~D T200 @ CLK_PCI3 K42 D14 1.5VDDR_VID1 1.5VDDR_VID1 16,51
PAD~D T199 @ CLK_PCI4 CLKOUT_PCI3 OC6# / GPIO10 ESATA_DETECT#
H40 CLKOUT_PCI4 OC7# / GPIO14 C14 ESATA_DETECT# 16,43

BD82HM77 SLJ8C BGA989~D

1 2
+3VS +3V_MXM @ RH254 0_0402_5%
+3VS
+3VS

1
WL_OFF# RH275 1 2 8.2K_0402_5%~D +3VS C1848
2

PCI_PIRQB# RH276 1 2 8.2K_0402_5%~D C1847 @ R1908 1 2

PCI_PIRQD# RH277 1 2 8.2K_0402_5%~D @ RH262 1 2 10K_0402_5%~D
PCI_PIRQC# RH278 1 2 8.2K_0402_5%~D 10K_0402_5%~D 0.1U_0402_25V6K~D

5
DMC_RADIO_OFF# RH279 1 2 8.2K_0402_5%~D 0.1U_0402_25V6K~D UH5

2
5

BT_ON# RH280 1 2 8.2K_0402_5%~D UH3 1 PCH_PLTRST#

P
1

DGPU_SELECT# RH281 8.2K_0402_5%~D PCH_PLTRST# IN1

1 2 1 2 1 4
P

FFS_INT1 RH282 8.2K_0402_5%~D IN1 14,15 PLTRST_VGA# O DGPU_HOLD_RST#

1 2 5,16,31,35,40,43 PLT_RST# 4 O IN2 2

G
HDMI_IN_PWMSEL# RH283 1 2 8.2K_0402_5%~D 2 RH230
IN2
G

1
PCI_PIRQA# RH284 1 2 8.2K_0402_5%~D 0_0402_5%~D SN74AHC1G08DCKR_SC70-5

3
1

ODD_DA# RH285 1 2 8.2K_0402_5%~D SN74AHC1G08DCKR_SC70-5 RH231

3

DGPU_HOLD_RST# @ RH165 1 2 10K_0402_5%~D 100K_0402_5%

RH157
100K_0402_5%

2
2

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC M/B LA-8321
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
4019H5
Date: Wednesday, August 01, 2012 Sheet 19 of 66
5 4 3 2 1
 5 4 3 2 1

+3VS

2
High: CRT Plugged RH232 UH4F
10K_0402_5%~D
16 CRT_DET CRT_DET T7 C40 DGPU_BKL_PWM_SEL# 24
BMBUSY# / GPIO0 TACH4 / GPIO68

1
CRT_DET
24,27,28,29 DGPU_EDIDSEL#
DGPU_EDIDSEL# A42 TACH1 / GPIO1 TACH5 / GPIO69 B41 MXM2_PCH_PWROK 15 DMI Termination Voltage
D

1
27 DGPU_HPD_INT# DGPU_HPD_INT# H36 TACH2 / GPIO6 TACH6 / GPIO70 C41 LVDS_CAB_DET#
LVDS_CAB_DET# 25
+3VS Set to Vcc when HIGH
26 CRT_DET# 2 QH2 NV_CLE
G 2N7002E-T1-E3_SOT23-3 40 EC_SCI# E38 TACH3 / GPIO7 TACH7 / GPIO71 A40 MXM2_EC_RST# 15 Set to Vss when LOW

2
D S D

3
40 EC_SMI# EC_SMI# C10 RH158 Weak internal
GPIO8
10K_0402_5%~D PU,Do not pull low+1.8VS
35 BT_RADIO_DIS# C4 LAN_PHY_PWR_CTRL / GPIO12

1
PCH_GPIO15 G2 P4 GATEA20 40
16 PCH_GPIO15 GPIO15 A20GATE RH149
GPIO28 AU16 PCH_PECI_R 1 @ 2 H_PECI 5,40
2.2K_0402_5%~D
PECI
On-Die PLL Voltage Regulator 16 PCH_GPIO16
PCH_GPIO16 U2 SATA4GP / GPIO16
0_0402_5% RH159
This signal has a weak internal pull up P5 KB_RST#
KB_RST# 40

2
RCIN# NV_CLE 1 2 H_SNB_IVB# 5
H：On-Die voltage regulator enable
* D40 AY11 RH150 1K_0402_5%

GPIO
14 DGPU_PWROK TACH0 / GPIO17 PROCPWRGD H_CPUPWRGD 5
L：On-Die PLL Voltage Regulator disable

CPU/MISC
PCH_GPIO22 T5 SCLOCK / GPIO22 THRMTRIP# AY10 H_THERMTRIP#_C 1 2 H_THRMTRIP#
H_THRMTRIP# 5 CLOSE TO THE BRANCHING POINT
+3V_PCH 390_0402_5% RH161
ODD_EN# E8 T14 INIT3_3V#
RH286 34 ODD_EN# GPIO24 INIT3_3V#
1 2 10K_0402_5%~D
PCH_GPIO27 E16 AY1 NV_CLE INIT3_3V
PCH_GPIO28 GPIO27 DF_TVS
1 2

1
PCH_GPIO28 P8 GPIO28
@ This signal has weak internal
@ RH238 1K_0402_5% AH8 RH261 PU, can't pull low
STP_PCI# TS_VSS1
K1 STP_PCI# / GPIO34 10K_0402_5%~D
TS_VSS2 AK11
MXM2_PCH_PWR_ON K4

2
15,16 MXM2_PCH_PWR_ON GPIO35
TS_VSS3 AH10
16,34 ODD_DETECT# ODD_DETECT# V8 SATA2GP / GPIO36
TS_VSS4 AK10
16 PCH_GPIO37 PCH_GPIO37 M5 SATA3GP / GPIO37
PCH_GPIO37 14 VGA_PRSNT_R# VGA_PRSNT_R# N2 P37 @ T141 PAD~D
SLOAD / GPIO38 NC_1
FDI TERMINATION VOLTAGE OVERRIDE +3VS
14 VGA_PRSNT_L# VGA_PRSNT_L# M3
LOW - Tx, Rx terminated SDATAOUT0 / GPIO39
*
C C
to same voltage 34 FFS_INT2 V13 SDATAOUT1 / GPIO48 VSS_NCTF_15 BG2 VSS_NCTF_15
(DC Coupling Mode)
15,16 MXM2_PRSNT_R# MXM2_PRSNT_R# V3 BG48 VSS_NCTF_16 MXM2_PRSNT_R# 1 RH265 2 10K_0402_5%~D
SATA5GP / GPIO49 / TEMP_ALERT# VSS_NCTF_16
+3VS HDD2_DETECT# D6 BH3 VSS_NCTF_17 DGPU_HPD_INT# 1 RH163 2 10K_0402_5%~D
34 HDD2_DETECT# GPIO57 VSS_NCTF_17
BH47 VSS_NCTF_18 DGPU_EDIDSEL# 1 RH164 2 10K_0402_5%~D
RH173 @ PCH_GPIO37 VSS_NCTF_18
2 1 1K_0402_5%
VSS_NCTF_1 A4 BJ4 VSS_NCTF_19
VSS_NCTF_1 VSS_NCTF_19
RH174 1 2 10K_0402_5%~D VSS_NCTF_2 A44 BJ44 VSS_NCTF_20
VSS_NCTF_2 VSS_NCTF_20 VGA_PRSNT_L# 1 RH182 2 10K_0402_5%~D
VSS_NCTF_3 A45 BJ45 VSS_NCTF_21
VSS_NCTF_3 VSS_NCTF_21 VGA_PRSNT_R# 1 RH167 2 10K_0402_5%~D
VSS_NCTF_4 A46 BJ46 VSS_NCTF_22

NCTF
VSS_NCTF_4 VSS_NCTF_22
VSS_NCTF_5 A5 BJ5 VSS_NCTF_23 PCH_GPIO16 1 2 10K_0402_5%~D
GPIO27 VSS_NCTF_5 VSS_NCTF_23 RH181
VSS_NCTF_6 A6 BJ6 VSS_NCTF_24
VSS_NCTF_6 VSS_NCTF_24
PCH_GPIO27 (Have internal Pull-High)
VSS_NCTF_7 VSS_NCTF_25
*High: VCCVRM VR Enable
Low: VCCVRM VR Disable VSS_NCTF_8
B3 VSS_NCTF_7 VSS_NCTF_25 C2
VSS_NCTF_26
+3V_PCH
B47 VSS_NCTF_8 VSS_NCTF_26 C48
ODD_EN# 1 2 10K_0402_5%~D
1 2 PCH_GPIO27 VSS_NCTF_9 BD1 D1 VSS_NCTF_27 RH176
@ RH241 10K_0402_5%~D VSS_NCTF_9 VSS_NCTF_27
VSS_NCTF_10 BD49 D49 VSS_NCTF_28 HDD2_DETECT# 1 2 10K_0402_5%~D
VSS_NCTF_10 VSS_NCTF_28 RH170
VSS_NCTF_11 BE1 E1 VSS_NCTF_29
VSS_NCTF_11 VSS_NCTF_29
Layout note: VSS_NCTF_12 VSS_NCTF_30
Layout note: PCH_GPIO15
BE49 VSS_NCTF_12 VSS_NCTF_30 E49 1 2 1K_0402_5%
B Trace wide 10mil & length 30mil Trace wide 10mil & length 30mil RH177 B
VSS_NCTF_13 VSS_NCTF_31 EC_SMI# 2 10K_0402_5%~D
All NCTF pins should have thick BF1 VSS_NCTF_13 VSS_NCTF_31 F1 All NCTF pins should have thick 1
RH71
traces at 45°from the pad. VSS_NCTF_14 BF49 VSS_NCTF_14 VSS_NCTF_32 F49 VSS_NCTF_32 traces at 45°from the pad. +3VS

BD82HM77 SLJ8C BGA989~D CRT_DET# @ 1 2 10K_0402_5%~D

RH178

PCH_GPIO28 needs to be connected to XDP_FN8

STP_PCI# 1 2 10K_0402_5%~D
PCH_GPIO35 needs to be connected to XDP_FN9 RH180
PCH_GPIO15 needs to be connected to XDP_FN16 SATA2GP/GPIO36 KB_RST# 1 2 10K_0402_5%~D
RH203

Please refer to Huron River Debug Board DG 0.5 When Used as SATA2GP/SATA3GP for Mechanical Presence detect
PCH_GPIO22 1 2 10K_0402_5%~D
- Use a weak external pull-up (150K-200K ohms) to Vcc3_3 RH179

* check list Rev 1.0

+3VS
LVDS_CAB_DET# 1
R1740
2 10K_0402_5%~D

RH171
200K_0402_5%
ODD_DETECT# 1 2

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC M/B LA-8321
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
4019H5
Date: Wednesday, August 01, 2012 Sheet 20 of 66
5 4 3 2 1
 5 4 3 2 1

+VCCP
PCH Power Rail Table
UH4G POWER +3VS S0 Iccmax
PJP25
LH1 Voltage Rail Voltage Current (A)
1300mA BLM18PG181SN1_0603~D

0.01U_0402_16V7K~D

0.1U_0402_25V6K~D
2 1 +1.05VS_VCCCORE AA23 U48 +VCCADAC 1 2
VCCCORE[1] 1mA VCCADAC
AC23 VCCCORE[2] 1 1 1 V_PROC_IO 1.05 0.001

10U_0805_25V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D
PAD-OPEN 4x4m1 1 1 1 AD21 VCCCORE[3]

CRT

CH34

CH35
AD23 U47 CH36
VCCCORE[4] VSSADAC 47U_0805_4V6M~D V5REF 5 0.001

CH30

CH32

CH33

CH31
AF21 VCCCORE[5] 2 2 2

VCC CORE
AF23 VCCCORE[6]
D 2 2 2 2 +3VS D
AG21 VCCCORE[7]
AG23 VCCCORE[8]
@ RH184
@RH184 V5REF_Sus 5 0.001
AG24 AK36 +VCCA_LVDS 1 2
VCCCORE[9] 1mA VCCALVDS
AG26 VCCCORE[10]
AG27 AK37 0_0805_5%~D +1.8VS Vcc3_3 3.3 0.266
VCCCORE[11] VSSALVDS
AG29 VCCCORE[12]
AJ23 VCCCORE[13] Near AP43 LH2
AJ26 AM37 +VCCTX_LVDS 2 1 VccADAC 3.3 0.001

LVDS
VCCCORE[14] VCCTX_LVDS[1] CH37 1 0.1UH_MLF1608DR10KT_10%_1608
AJ27 VCCCORE[15] 1 1
AJ29 AM38 0.01U_0402_16V7K~D 0.1uH inductor, 200mA
VCCCORE[16] VCCTX_LVDS[2]
AJ31 VCCCORE[17]
CH38 CH39 VccADPLLA 1.05 0.08
AP36 0.01U_0402_16V7K~D 22U_0805_6.3V6M~D
+VCCP
60mA VCCTX_LVDS[3] 2 2 2

VCCTX_LVDS[4] AP37 VccADPLLB 1.05 0.08

@ RH185 1 2 0_0603_5%~D +1.05VS_VCCDPLLEXP AN19
+VCCP VCCIO[28]
@ LH8 VccCore 1.05 1.3
2 @ 1+VCCAPLLEXP_R1 2 +VCCAPLLEXP BJ22 VCCAPLLEXP
RH247 0_0603_5% 1UH_LB2012T1R0M_20%~D @RH186
@ RH186
VccDMI 1.05 0.042

10U_0805_25V6K~D
1 V33 +3VS_VCC3_3_6 1 2 +3VS
VCC3_3[6]
AN16

HVCMOS
VCCIO[15]
Place CH40 Near BJ22 pin

@ CH40
1 0_0805_5%~D
AN17 VCCIO[16]
VccIO 1.05 2.925
2 CH43
VCC3_3[7] V34
+VCCP 0.1U_0402_25V6K~D
2 VccASW 1.05 1.01
AN21 VCCIO[17]
AN26 VCCIO[18]
1

VccSPI 3.3 0.02

RH187 AN27 VCCIO[19]
2925mA VCCVRM[3] AT16 +VCCAFDI_VRM
0_0805_5%~D
+1.05VS_VCC_EXP AP21 +VCCP_VCCDMI +VCCP VccDSW 3.3 0.003
C
@ VCCIO[20] C
@RH188
@ RH188
2

AP23 AT20 +VCCP_VCCDMI 1 2

VCCIO[21] VCCDMI[1]
1 VccpNAND 1.8 0.19
+VCCP
10U_0805_25V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1 1 1 1 1 AP24 0_0805_5%~D

DMI
+3VS VCCIO[22] CH49

VCCIO
VccRTC 3.3 6 uA
CH44

CH45

CH46

CH47

CH48

AP26 20mA VCCCLKDMI AB36 +1.05VS_VCC_DMI_CCI 1 2

VCCIO[23] @RH287
@ RH287 0_0603_5%~D 2 1U_0402_6.3V6K~D
2 2 2 2 2 1
AT24 VCCIO[24] CH50 VccSus3_3 3.3 0.119
1

1U_0402_6.3V6K~D
RH190 2
AN33 VCCIO[25]
0_0805_5%~D VccSusHDA 3.3 / 1.5 0.01
@ AN34 VCCIO[26] VCCDFTERM[1] AG16
+VCCPNAND
RH192
2

VccVRM 1.8 / 1.5 0.16

+3VS_VCCA3GBG BH29 AG17 1 2
VCC3_3[3] 190mA VCCDFTERM[2] +1.8VS
1

DFT / SPI
VccCLKDMI 1.05 0.02

0.1U_0402_25V6K~D
CH51 0_0805_5%~D
+VCCP AJ16 1
0.1U_0402_25V6K~D VCCDFTERM[3]
2 VccSSC 1.05 0.095

CH52
+VCCAFDI_VRM AP16 VCCVRM[2]
VCCDFTERM[4] AJ17
2
Place CH53 Near BG6 pin
2 @ 1 +1.05VS_VCCAPLL_FDI BG6 VccAFDIPLL
VccDIFFCLKN 1.05 0.055
RH195 0_0603_5%
1U_0402_6.3V6K~D

1 @ RH193
RH194
+VCCP 1 2+1.05VS_VCCDPLL_FDI AP17 VCCIO[27]
VccALVDS 3.3 0.001
CH53

V1 +3V_VCCPSPI 1 2
20mA VCCSPI +3V_PCH
FDI

0_0805_5%~D
2 @ 0_0805_5%~D VccTX_LVDS 1.8 0.06
+VCCP_VCCDMI AU20 VCCDMI[2] 1
CH54
B BD82HM77 SLJ8C BGA989~D 1U_0402_6.3V6K~D B
2

VCCVRM = 160mA detal waiting for newest spec

+3VALW
+1.5VS +VCCAFDI_VRM

1 @RH197
@ RH197 2 1 0_0603_5% +VCCAFDI_VRM

C2
1U_0402_6.3V6K~D
2 U8
1 5 @RH198
@ RH198 1 2 0_0603_5%~D
VIN VOUT
NC 4
9,40,42,43,49,50,51 SUSP# SUSP# 3 2
EN GND
1
RT9013-15GB_SOT23-5
C1867
1U_0402_6.3V6K~D
2

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC M/B LA-8321
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
4019H5
Date: Wednesday, August 01, 2012 Sheet 21 of 66
5 4 3 2 1
 5 4 3 2 1

+VCCP
VCC3_3 = 266mA detal waiting for newest spec
VCCDMI = 42mA detal waiting for newest spec
2 @ 1 +VCCACLK
+3V_PCH RH200 0_0603_5%
UH4J POWER QH4
1 2
+3V_DSW @RH201
@ RH201 0_0603_5%~D +1.05VS_VCCUSBCORE 2 +5VALW AO3413_SOT23-3 +5V_PCH
1 AD49 VCCACLK VCCIO[29] N26 1 +VCCP
@ RH202 0_0603_5%~D

D
CH55 P26 1 2 1 +5VALW_PCH 3 1
0.1U_0402_25V6K~D VCCIO[30]

0.1U_0402_25V6K~D
1 2 +VCCPDSW T16 @ RH245 0_0603_5%~D
2 VCCDSW3_3 3mA

20K_0402_5%
RH253 @ 0_0603_5% P28 CH56
VCCIO[31]

1
1U_0402_6.3V6K~D

G
1

2
2

R57
+PCH_VCCDSW V12 T27
+VCCP DCPSUSBYP VCCIO[32]

C18
@ LH3 1
D @ RH204 10UH_LBR2012T100M_20%~D D
VCCIO[33] T29 42 PCH_PWR_EN#
+VCCAPLL_CPY 1 @ CH57 +3VS_VCC_CLKF33 2
1 2 2 T38

2
0.1U_0402_25V6K~D VCC3_3[5]
2

10U_0805_25V6K~D
0_0805_5% @ 1 T23 +3V_VCCPUSB 2 1 +3V_PCH
+VCCP 119mA VCCSUS3_3[7]

0.1U_0402_25V6K~D
+VCCAPLL_CPY_PCH BH23 @ RH205 0_0603_5%~D
VCCAPLLDMI2

CH58
T24 1 +3V_VCCAUBG 2 1 +3V_PCH
+VCCDPLL_CPY VCCSUS3_3[8] @ RH207 0_0603_5%~D +5V_PCH +3V_PCH
1 2 AL29 VCCIO[14]
2

CH59
@ RH206 0_0603_5%~D V23 1
VCCSUS3_3[9]

USB

2
+VCCSUS1 2 CH60
AL24 DCPSUS[3] VCCSUS3_3[10] V24
1 0.1U_0402_25V6K~D RH208 DH2
@ 2 10_0402_1%
VCCSUS3_3[6] P24 RB751S40T1_SOD523-2~D
+3VALW @ QH5 +3V_DSW CH61
AO3413_SOT23-3 1U_0402_6.3V6K~D AA19

1
2 VCCASW[1] +1.05VS_VCCAUPLL +PCH_V5REF_SUS
VCCIO[34] T26 2 1 +VCCP
1010mA
S

3 1 AA21 @ RH209 0_0603_5%~D 1

VCCASW[2]
+1.05VM_VCCASW AA24 M26 +PCH_V5REF_SUS CH63
VCCASW[3] 1mA V5REF_SUS

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D
@ CH62 0.1U_0603_50V7K~D
G

1 1
2

CH64

CH65
AA26 1U_0402_6.3V6K~D
VCCASW[4]

Clock and Miscellaneous

AN23 +VCCA_USBSUS 1 2
DCPSUS[4]
AA27 VCCASW[5]
2 2 +3V_VCCPSUS_1
VCCSUS3_3[1] AN24 2 1 +3V_PCH
AA29 @ RH210 0_0603_5%~D
VCCASW[6]
40 PCH_VREG_EN# 1 +5VS +3VS
+VCCP AA31 VCCASW[7] CH66
1 2 AC26 P34 +PCH_V5REF_RUN 0.1U_0402_25V6K~D
VCCASW[8] 1mA V5REF

2
2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D
@ RH211 0_0805_5%~D 1 1 1
AC27 RH213 DH3
VCCASW[9] 10_0402_1%

CH67

CH68

CH69
N20 +3V_VCCPSUS 2 1 +3V_PCH RB751S40T1_SOD523-2~D
VCCSUS3_3[2] RH212 0_0603_5%~D
AC29 1

PCI/GPIO/LPC
C 2 2 2 VCCASW[10] C
N22

1
VCCSUS3_3[3] CH70 +PCH_V5REF_RUN
AC31 VCCASW[11]
P20 1U_0402_6.3V6K~D 1
VCCSUS3_3[4] 2
AD29 VCCASW[12]
P22 +3VS_VCCPCORE 2 1 +3VS CH71
VCCSUS3_3[5] @ RH214 0_0805_5%~D 1U_0603_25V6-K~D
AD31 VCCASW[13] 1 2
+3VS W21 AA16
VCCASW[14] VCC3_3[1] CH72
2 0.1U_0402_25V6K~D
W23 VCCASW[15] VCC3_3[8] W16
@ RH216 1 2 0_0805_5%~D +3VS_VCC_CLKF33
10U_0805_25V6K~D

1U_0402_6.3V6K~D

1 1 W24 T34 +3VS_VCCPPCI 2 1 +3VS

VCCASW[16] VCC3_3[4] RH217 0_0603_5%~D
1
CH73

CH74

W26 VCCASW[17] CH75

2 2 0.1U_0402_25V6K~D
W29 VCCASW[18]
@ 2
W31 AJ2 +VCC3_3_2 2 1 +3VS
VCCASW[19] VCC3_3[2] @ RH218 0_0603_5%~D
1
W33 VCCASW[20]
AF13 CH76
VCCIO[5] +1.05VS_SATA3 0.1U_0402_25V6K~D
+VCCRTCEXT 2
N16 DCPRTC
1 VCCIO[12] AH13 1 2 +VCCP
1 RH219 0_0805_5%~D
CH78 +VCCAFDI_VRM Y49 AH14
0.1U_0402_25V6K~D VCCVRM[4] VCCIO[13] CH77
2 1U_0402_6.3V6K~D
+VCCP 2 @ LH5 @
VCCIO[6] AF14
+1.05VS_VCCA_A_DPL BD47 10UH_LBR2012T100M_20%~D RH221
@ RH220 1 2 0_0603_5%~D +VCCDIFFCLK VCCADPLLA 80mA AK1 +VCCSATAPLL 1 2 +VCCSATAPLL_R 2 1

SATA
VCCAPLLSATA +VCCP
1 +1.05VS_VCCA_B_DPL BF47
B CH79 VCCADPLLB 80mA +VCCAFDI_VRM 0_0805_5% B
1
AF11 +VCCAFDI_VRM @ CH80
1U_0402_6.3V6K~D VCCVRM[1] +1.05VS_VCC_SATA 10U_0805_25V6K~D
AF17 VCCIO[7]
2 +1.05VS_VCCDIFFCLKN +VCCP
AF33 VCCDIFFCLKN[1] 2
Place CH80 Near AK1 pin
AF34 VCCDIFFCLKN[2]
55mA VCCIO[2] AC16 +1.05VS_VCC_SATA RH223 1 2
@ RH222 1 2 0_0603_5%~D +1.05VS_VCCDIFFCLKN AG34 VCCDIFFCLKN[3]

1U_0402_6.3V6K~D
1 AC17 1 0_0805_5%~D
CH81 VCCIO[3]

CH82
+1.05VS_SSCVCC AG33 AD17
1U_0402_6.3V6K~D VCCSSC 95mA VCCIO[4]
2 2
+VCCSST V16 +VCCP
@ RH246 DCPSST
1 2 0_0603_5%~D
1 1 +VCCP 2 @ 1 +1.05VM_VCCSUS
CH96 CH84 RH248 0_0603_5% 1 T17 T21
0.1U_0402_25V6K~D @ DCPSUS[1] VCCASW[22]
V19 DCPSUS[2]
1U_0402_6.3V6K~D CH83
MISC

2 2 1U_0402_6.3V6K~D
VCCASW[23] V21
2
0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

@ RH226 1 2 0_0603_5%~D +V_CPU_IO BJ8 V_PROC_IO 1mA

CPU

1 1 1 VCCASW[21] T19
CH85
+RTCVCC
CH86

CH87

4.7U_0603_10V6K~D
2 2 2 +VCCSUSHDA @ RH233
A22 VCCRTC 10mA VCCSUSHDA P32 2 1 0_0603_5%~D +3V_PCH
RTC
0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

1U_0402_6.3V6K~D

HDA

1 1 1 1

150_0402_1%
1
CH88

CH89

CH90

LH6 BD82HM77 SLJ8C BGA989~D CH91

10UH_LBR2012T100M_20%~D 0.1U_0402_25V6K~D
2 2 2 2

RH234
1 2 +1.05VS_VCCA_A_DPL @
+VCCP
A @ R229 A

2
1 2 +VCCA_DPLL_L 1 2 +1.05VS_VCCA_B_DPL
220U_B2_2.5VM_R35M~D

1U_0402_6.3V6K~D

220U_B2_2.5VM_R35M~D

1U_0402_6.3V6K~D

0_0805_5%~D LH7 1 1
10UH_LBR2012T100M_20%~D
+
1
+
1
DELL CONFIDENTIAL/PROPRIETARY
CH94

CH92

CH95

CH93

2 2 2 2 Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC M/B LA-8321
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
4019H5
Date: Wednesday, August 01, 2012 Sheet 22 of 66
5 4 3 2 1
 5 4 3 2 1

UH4I

AY4 VSS[159] VSS[259] H46

AY42 VSS[160] VSS[260] K18
AY46 VSS[161] VSS[261] K26
AY8 VSS[162] VSS[262] K39
D UH4H D
B11 VSS[163] VSS[263] K46
H5 VSS[0] B15 VSS[164] VSS[264] K7
B19 VSS[165] VSS[265] L18
AA17 VSS[1] VSS[80] AK38 B23 VSS[166] VSS[266] L2
AA2 VSS[2] VSS[81] AK4 B27 VSS[167] VSS[267] L20
AA3 VSS[3] VSS[82] AK42 B31 VSS[168] VSS[268] L26
AA33 VSS[4] VSS[83] AK46 B35 VSS[169] VSS[269] L28
AA34 VSS[5] VSS[84] AK8 B39 VSS[170] VSS[270] L36
AB11 VSS[6] VSS[85] AL16 B7 VSS[171] VSS[271] L48
AB14 VSS[7] VSS[86] AL17 F45 VSS[172] VSS[272] M12
AB39 VSS[8] VSS[87] AL19 BB12 VSS[173] VSS[273] P16
AB4 VSS[9] VSS[88] AL2 BB16 VSS[174] VSS[274] M18
AB43 VSS[10] VSS[89] AL21 BB20 VSS[175] VSS[275] M22
AB5 VSS[11] VSS[90] AL23 BB22 VSS[176] VSS[276] M24
AB7 VSS[12] VSS[91] AL26 BB24 VSS[177] VSS[277] M30
AC19 VSS[13] VSS[92] AL27 BB28 VSS[178] VSS[278] M32
AC2 VSS[14] VSS[93] AL31 BB30 VSS[179] VSS[279] M34
AC21 VSS[15] VSS[94] AL33 BB38 VSS[180] VSS[280] M38
AC24 VSS[16] VSS[95] AL34 BB4 VSS[181] VSS[281] M4
AC33 VSS[17] VSS[96] AL48 BB46 VSS[182] VSS[282] M42
AC34 VSS[18] VSS[97] AM11 BC14 VSS[183] VSS[283] M46
AC48 VSS[19] VSS[98] AM14 BC18 VSS[184] VSS[284] M8
AD10 VSS[20] VSS[99] AM36 BC2 VSS[185] VSS[285] N18
AD11 VSS[21] VSS[100] AM39 BC22 VSS[186] VSS[286] P30
AD12 VSS[22] VSS[101] AM43 BC26 VSS[187] VSS[287] N47
AD13 VSS[23] VSS[102] AM45 BC32 VSS[188] VSS[288] P11
AD19 VSS[24] VSS[103] AM46 BC34 VSS[189] VSS[289] P18
AD24 VSS[25] VSS[104] AM7 BC36 VSS[190] VSS[290] T33
AD26 VSS[26] VSS[105] AN2 BC40 VSS[191] VSS[291] P40
AD27 VSS[27] VSS[106] AN29 BC42 VSS[192] VSS[292] P43
AD33 VSS[28] VSS[107] AN3 BC48 VSS[193] VSS[293] P47
AD34 VSS[29] VSS[108] AN31 BD46 VSS[194] VSS[294] P7
C C
AD36 VSS[30] VSS[109] AP12 BD5 VSS[195] VSS[295] R2
AD37 VSS[31] VSS[110] AP19 BE22 VSS[196] VSS[296] R48
AD38 VSS[32] VSS[111] AP28 BE26 VSS[197] VSS[297] T12
AD39 VSS[33] VSS[112] AP30 BE40 VSS[198] VSS[298] T31
AD4 VSS[34] VSS[113] AP32 BF10 VSS[199] VSS[299] T37
AD40 VSS[35] VSS[114] AP38 BF12 VSS[200] VSS[300] T4
AD42 VSS[36] VSS[115] AP4 BF16 VSS[201] VSS[301] W34
AD43 VSS[37] VSS[116] AP42 BF20 VSS[202] VSS[302] T46
AD45 VSS[38] VSS[117] AP46 BF22 VSS[203] VSS[303] T47
AD46 VSS[39] VSS[118] AP8 BF24 VSS[204] VSS[304] T8
AD8 VSS[40] VSS[119] AR2 BF26 VSS[205] VSS[305] V11
AE2 VSS[41] VSS[120] AR48 BF28 VSS[206] VSS[306] V17
AE3 VSS[42] VSS[121] AT11 BD3 VSS[207] VSS[307] V26
AF10 VSS[43] VSS[122] AT13 BF30 VSS[208] VSS[308] V27
AF12 VSS[44] VSS[123] AT18 BF38 VSS[209] VSS[309] V29
AD14 VSS[45] VSS[124] AT22 BF40 VSS[210] VSS[310] V31
AD16 VSS[46] VSS[125] AT26 BF8 VSS[211] VSS[311] V36
AF16 VSS[47] VSS[126] AT28 BG17 VSS[212] VSS[312] V39
AF19 VSS[48] VSS[127] AT30 BG21 VSS[213] VSS[313] V43
AF24 VSS[49] VSS[128] AT32 BG33 VSS[214] VSS[314] V7
AF26 VSS[50] VSS[129] AT34 BG44 VSS[215] VSS[315] W17
AF27 VSS[51] VSS[130] AT39 BG8 VSS[216] VSS[316] W19
AF29 VSS[52] VSS[131] AT42 BH11 VSS[217] VSS[317] W2
AF31 VSS[53] VSS[132] AT46 BH15 VSS[218] VSS[318] W27
AF38 VSS[54] VSS[133] AT7 BH17 VSS[219] VSS[319] W48
AF4 VSS[55] VSS[134] AU24 BH19 VSS[220] VSS[320] Y12
AF42 VSS[56] VSS[135] AU30 H10 VSS[221] VSS[321] Y38
AF46 VSS[57] VSS[136] AV16 BH27 VSS[222] VSS[322] Y4
AF5 VSS[58] VSS[137] AV20 BH31 VSS[223] VSS[323] Y42
AF7 VSS[59] VSS[138] AV24 BH33 VSS[224] VSS[324] Y46
AF8 VSS[60] VSS[139] AV30 BH35 VSS[225] VSS[325] Y8
AG19 VSS[61] VSS[140] AV38 BH39 VSS[226] VSS[328] BG29
B B
AG2 VSS[62] VSS[141] AV4 BH43 VSS[227] VSS[329] N24
AG31 VSS[63] VSS[142] AV43 BH7 VSS[228] VSS[330] AJ3
AG48 VSS[64] VSS[143] AV8 D3 VSS[229] VSS[331] AD47
AH11 VSS[65] VSS[144] AW14 D12 VSS[230] VSS[333] B43
AH3 VSS[66] VSS[145] AW18 D16 VSS[231] VSS[334] BE10
AH36 VSS[67] VSS[146] AW2 D18 VSS[232] VSS[335] BG41
AH39 VSS[68] VSS[147] AW22 D22 VSS[233] VSS[337] G14
AH40 VSS[69] VSS[148] AW26 D24 VSS[234] VSS[338] H16
AH42 VSS[70] VSS[149] AW28 D26 VSS[235] VSS[340] T36
AH46 VSS[71] VSS[150] AW32 D30 VSS[236] VSS[342] BG22
AH7 VSS[72] VSS[151] AW34 D32 VSS[237] VSS[343] BG24
AJ19 VSS[73] VSS[152] AW36 D34 VSS[238] VSS[344] C22
AJ21 VSS[74] VSS[153] AW40 D38 VSS[239] VSS[345] AP13
AJ24 VSS[75] VSS[154] AW48 D42 VSS[240] VSS[346] M14
AJ33 VSS[76] VSS[155] AV11 D8 VSS[241] VSS[347] AP3
AJ34 VSS[77] VSS[156] AY12 E18 VSS[242] VSS[348] AP1
AK12 VSS[78] VSS[157] AY22 E26 VSS[243] VSS[349] BE16
AK3 VSS[79] VSS[158] AY28 G18 VSS[244] VSS[350] BC16
G20 VSS[245] VSS[351] BG28
BD82HM77 SLJ8C BGA989~D G26 BJ28
VSS[246] VSS[352]
G28 VSS[247]
G36 VSS[248]
G48 VSS[249]
H12 VSS[250]
H18 VSS[251]
H22 VSS[252]
H24 VSS[253]
H26 VSS[254]
H30 VSS[255]
H32 VSS[256]
H34 VSS[257]
F3 VSS[258]
A A

BD82HM77 SLJ8C BGA989~D

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC M/B LA-8321
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
4019H5
Date: Wednesday, August 01, 2012 Sheet 23 of 66
5 4 3 2 1
 5 4 3 2 1

U43

LCD Backlight / PWM Selector SLE1 16 DGPU_SELECT#

DGPU_SELECT# 19,26,27,28,29

DGPU_SELECT# @ RV33 1 2 0_0402_5% VGA_TXOUT0- 2 5 SYS_TXOUT0-

SEL=LOW, B1, GPU
14 VGA_TXOUT0- 0B1 A0 SYS_TXOUT0- 25
@ RV35 1
14 VGA_TXOUT0+ VGA_TXOUT0+ 1 1B1 A1 6 SYS_TXOUT0+ SYS_TXOUT0+ 25 SEL=High, B2, PCH
19 HDMI_IN_PWMSEL# 2 0_0402_5%~D HDMI_IN_PWM_SELECT#
18 PCH_TXOUT0- PCH_TXOUT0- 80
HDMI_IN_SELECT# @ R1917 2 PCH_TXOUT0+ 79 0B2
1 0_0402_5% 18 PCH_TXOUT0+ 1B2
+3VS +3VS
14 VGA_TXOUT1- VGA_TXOUT1- 78 8 SYS_TXOUT1- SYS_TXOUT1- 25
2B1 A2

@
14 VGA_TXOUT1+ VGA_TXOUT1+ 77 9 SYS_TXOUT1+ SYS_TXOUT1+ 25
3B1 A3

1
1

10K_0402_5%~D

RV110
D PCH_TXOUT1- 76 D
18 PCH_TXOUT1- 2B2
@ RV39 0_0402_5% CV43 18 PCH_TXOUT1+ PCH_TXOUT1+ 75
3B2
40 EC_INV_PWM 1 2 0.1U_0402_25V6K~D
2 VGA_TXOUT2- 73 SYS_TXOUT2-
14 VGA_TXOUT2- 11 SYS_TXOUT2- 25

2
U7 VGA_TXOUT2+ 72 4B1 A4 SYS_TXOUT2+
14 VGA_TXOUT2+ 5B1 A5 12 SYS_TXOUT2+ 25
6 1B1 VCC 16
14 VGA_PNL_PWM @ RV38 1 2 0_0402_5%~D VGA_EC_PWM 5 18 PCH_TXOUT2- PCH_TXOUT2- 71
HDMI_IN_PWM 1B2 HDMI_IN_PWM_SELECT# 0_0402_5%~D PCH_TXOUT2+ 70 4B2
30 HDMI_IN_PWM 4 1B3 S0 14 18 PCH_TXOUT2+ 5B2
18 PCH_INV_PWM @ R2560 1 2 0_0402_5%~D PCH_INV_PWM_R 3 2 DGPU_BKL_PWM_SEL#_R 1 2
1B4 S1 DGPU_BKL_PWM_SEL# 20
@RV111
@ RV111 14 VGA_TXCLK- VGA_TXCLK- 68 14 SYS_TXCLK- SYS_TXCLK- 25
INV_PWM_R VGA_TXCLK+ 6B1 A6 SYS_TXCLK+
10 2B1 1A 7 1 2 INV_PWM 25 14 VGA_TXCLK+ 67 7B1 A7 15 SYS_TXCLK+ 25
14 DGPU_BKL_EN @ R2570 1 2 0_0402_5%~D DGPU_BKL_EN_R 11 9 ENBKL L100 BLM15BB221SN1D_2P~D ENBKL 40
2B2 2A
30 HDMI_IN_BKL_EN @ R2580 1 2 0_0402_5%~D HDMI_IN_BKL_EN_R 12 2B3 18 PCH_TXCLK- PCH_TXCLK- 66 6B2
18 IGPU_BKLT_EN IGPU_BKLT_EN 13 15 18 PCH_TXCLK+ PCH_TXCLK+ 65
2B4 2OE 7B2

680P_0402_50V7K~D
1 1OE GND 8 1 64 8B1 A8 17
63 9B1 A9 18

1
C1840
SN74CB3Q3253PWR_TSSOP16

10K_0402_5%~D

RV48

100K_0402_5%

RH138
S1 S0 1A 2A Y 2
62 8B2
61 9B2
0 0 1B1 2B1 HDMI IN 34

2
SEL2
0 1 1B2 2B2 DSC
14 VGA_TZOUT0- VGA_TZOUT0- 60 23 SYS_TZOUT0- SYS_TZOUT0- 25
10B1 A10
1 0 1B3 2B3 HDMI IN 14 VGA_TZOUT0+ VGA_TZOUT0+ 59
11B1 A11 24 SYS_TZOUT0+ SYS_TZOUT0+ 25

1 1 1B4 2B4 UMA 18 PCH_TZOUT0- PCH_TZOUT0- 58

10B2
18 PCH_TZOUT0+ PCH_TZOUT0+ 57
11B2
14 VGA_TZOUT1- VGA_TZOUT1- 56 26 SYS_TZOUT1- SYS_TZOUT1- 25
VGA_TZOUT1+ 55 12B1 A12 SYS_TZOUT1+
14 VGA_TZOUT1+ 13B1 A13 27 SYS_TZOUT1+ 25
C
S1 S0 1A 2A Y C

LCD DDC Selector +3VS

18 PCH_TZOUT1-
18 PCH_TZOUT1+
PCH_TZOUT1- 54
PCH_TZOUT1+ 53 12B2
13B2
0 0 1B1 2B1 HDMI IN
1 14 VGA_TZOUT2- VGA_TZOUT2- 51 29 SYS_TZOUT2- SYS_TZOUT2- 25
14B1 A14
0 1 1B2 2B2 DSC 14 VGA_TZOUT2+ VGA_TZOUT2+ 50
15B1 A15 30 SYS_TZOUT2+ SYS_TZOUT2+ 25
CV48
2
0.1U_0402_25V6K~D 1 0 1B3 2B3 HDMI IN 18 PCH_TZOUT2- PCH_TZOUT2- 49
14B2
U3 18 PCH_TZOUT2+ PCH_TZOUT2+ 48
15B2
6 1B1 VCC 16 1 1 1B4 2B4 UMA
14 VGA_LCD_CLK 5 14 VGA_TZCLK- VGA_TZCLK- 46 32 SYS_TZCLK- SYS_TZCLK- 25
1B2 HDMI_IN_SELECT# VGA_TZCLK+ 16B1 A16 SYS_TZCLK+
30 HDMI_IN_EDID_CLK 4 1B3 S0 14 HDMI_IN_SELECT# 25,40 14 VGA_TZCLK+ 45 17B1 A17 33 SYS_TZCLK+ 25
18 PCH_LCD_CLK 3 2 DGPU_EDIDSEL_R# DGPU_EDIDSEL_R# 26
1B4 S1 PCH_TZCLK-
18 PCH_TZCLK- 44 16B2
10 7 I2CC_SCL I2CC_SCL 25 18 PCH_TZCLK+ PCH_TZCLK+ 43
2B1 1A I2CC_SDA 17B2
14 VGA_LCD_DAT 11 2B2 2A 9 I2CC_SDA 25
30 HDMI_IN_EDID_DAT 12 2B3 42 18B1 A18 35
18 PCH_LCD_DATA 13 2B4 2OE 15 41 19B1 A19 36

1 1OE GND 8 40 18B2

39 +3VS
SN74CB3Q3253PWR_TSSOP16 19B2
+3VS
3 GND1 VDD1 4
13 GND2 VDD2 10

1
+3VS CV50

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D
@RV54
@ RV54 <BOM Structure> 20 19 1 1 1
0_0402_5% 0.1U_0402_25V6K~D LCDVDD_ON RV57 GND3 VDD3 CV53 CV54
21 GND4 VDD4 22
DGPU_SELECT# 1 2 1 2 10K_0402_5%~D 31 28 CV55
GND5 VDD5 4.7U_0603_10V6K~D
38 GND6 VDD6 37

2
2 2 2

G
52 47

2
GND7 VDD7
5

UV10 74 69
GND8 VDD8
3 1 25
P

NC

B DGPU_EDIDSEL_R# IGPU_EDIDSEL# OE2# B

D
20,27,28,29 DGPU_EDIDSEL# 1 2 2 A Y 4 IGPU_EDIDSEL# 26 7 OE1#
@ RV55 0_0402_5%~D QV13
G

2N7002E-T1-E3_SOT23-3
NC7SZ14P5X_NL_SC70-5~D
3

PI3LVD1012BE_BQSOP80

LCD POWER LCD VDD Selector +3VS

+LCDVDD +3VS
+LCDVDD QV12
1
+5VALW SI2301CDS-T1-GE3_SOT23-3~D
W=60mils CV67
U610
S

1 3 0.1U_0402_25V6K~D
D
1

2
1 1 6 1B1 VCC 16
1

RV34 5
CV37 CV38 1B2 HDMI_IN_SELECT#_P @ RV113 1
1 1 47K_0402_5% 4 14 2 0_0402_5%~D
G

HDMI_IN_SELECT# 25,40
2

1B3 S0
0.1U_0402_25V6K~D
CV39

0.1U_0402_25V6K~D
CV40

RV32 4.7U_0603_10V6K~D 4.7U_0603_10V6K~D 3 2 DGPU_SELECT#

2 2 1B4 S1 DGPU_SELECT# 19,26,27,28,29
47_0805_5%~D
2

10 7
2

2 2 2B1 1A
14 DGPU_ENVDD DGPU_ENVDD 11 2B2 2A 9 LCDVDD_ON LCDVDD_ON 25 S1 S0 1A 2A Y
30 HDMI_IN_ENVDD HDMI_IN_ENVDD 12
D RV36 2B3
6

18,40 PCH_ENVDD PCH_ENVDD 13 15

2B4 2OE
G
2 1 2 0 0 1B1 2B1 HDMI IN
1 1OE GND 8
QV5A
220K_0402_5%~D 1 0 1 1B2 2B2 DSC
S SN74CB3Q3253PWR_TSSOP16
1

DMN66D0LDW-7
D
CV42 1 0 1B3 2B3 HDMI IN
3

A 0.047U_0402_16V7K~D A
2
LCDVDD_ON @ RV40 1 2 0_0402_5%~D 5
G
QV5B 1 1 1B4 2B4 UMA
DMN66D0LDW-7

@ RV42 1 2 0_0402_5%~D S
40 EC_ENVDD
DELL CONFIDENTIAL/PROPRIETARY
4
1

RV45
100K_0402_5% Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
SCHEMATIC M/B LA-8321
2

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
4019H5
Date: Wednesday, August 01, 2012 Sheet 24 of 66
5 4 3 2 1
 5 4 3 2 1

+3VS

SEL=LOW : B1, HDMI IN

1
SEL=High: B2, SYSTEM @RV62
@ RV62
10K_0402_5%~D

U46

2
D HDMI_IN_SELECT# D
SLE1 16 HDMI_IN_SELECT# 24,40

30 LVDS_SW_TXOUT0- LVDS_SW_TXOUT0- 2 5 TXOUT0-

LVDS_SW_TXOUT0+ 0B1 A0 TXOUT0+
30 LVDS_SW_TXOUT0+ 1 1B1 A1 6

24 SYS_TXOUT0-
24 SYS_TXOUT0+
SYS_TXOUT0-
SYS_TXOUT0+
80
79
0B2 Camera Power Control LCD Backlight Control
1B2 +3VS +3VS_CAM
LVDS_SW_TXOUT1- TXOUT1- Q1 Q45
30 LVDS_SW_TXOUT1- 78 2B1 A2 8
30 LVDS_SW_TXOUT1+ LVDS_SW_TXOUT1+ 77 9 TXOUT1+ AO3413_SOT23-3 B+ FDC654P-G_SSOT-6~D
3B1 A3
80 mil
80 mil

D
SYS_TXOUT1-

D
24 SYS_TXOUT1- 76 2B2 3 1 6 +INVPWR_B+
SYS_TXOUT1+

S
24 SYS_TXOUT1+ 75 3B2 4 5
2

1000P_0402_50V7K~D
LVDS_SW_TXOUT2- TXOUT2-

G
30 LVDS_SW_TXOUT2- 73 11 2 1 1

2
4B1 A4

G
30 LVDS_SW_TXOUT2+ LVDS_SW_TXOUT2+ 72 12 TXOUT2+ R1644 1
5B1 A5

1
C1747 100K_0402_5% C1851 1

3
C346
24 SYS_TXOUT2- SYS_TXOUT2- 71 0.1U_0402_25V6K~D 0.1U_0402_25V6K~D R422 C340
SYS_TXOUT2+ 4B2 1 2
24 SYS_TXOUT2+ 70 100K_0402_5% 0.1U_0603_50V7K~D

2
5B2 2
LVDS_SW_TXCLK- TXCLK- 2
30 LVDS_SW_TXCLK- 68 14

2
LVDS_SW_TXCLK+ 6B1 A6 TXCLK+
30 LVDS_SW_TXCLK+ 67 7B1 A7 15 Q44
PWR_SRC_ON
D

1
SYS_TXCLK- 66 SSM3K7002FU_SC70-3~D
24 SYS_TXCLK- 6B2
24 SYS_TXCLK+ SYS_TXCLK+ 65 40 EN_CAM 2 Q11
7B2 G 2N7002E-T1-E3_SOT23-3

S
1 2 1 3
64 17 S R423 47K_0402_5%

3
8B1 A8
63 9B1 A9 18

G
2
62 8B2
61 9B2
C LCD_BKL_EN C
40 LCD_BKL_EN
SEL2 34

30 LVDS_SW_TZOUT0- LVDS_SW_TZOUT0- 60 23 TZOUT0-

LVDS_SW_TZOUT0+ 10B1 A10 TZOUT0+
59 24
30 LVDS_SW_TZOUT0+

24 SYS_TZOUT0- SYS_TZOUT0- 58
11B1 A11
LVDS Connector +INVPWR_B+
SYS_TZOUT0+ 10B2 B+
24 SYS_TZOUT0+ 57 11B2
LVDS_SW_TZOUT1- TZOUT1- @ LV9 1
W=60mils
30 LVDS_SW_TZOUT1- 56 12B1 A12 26 2
30 LVDS_SW_TZOUT1+ LVDS_SW_TZOUT1+ 55 27 TZOUT1+ FBMA-L11-201209-221LMA30T_0805 1
13B1 A13
24 SYS_TZOUT1- SYS_TZOUT1- 54 C1852 JLVDS
SYS_TZOUT1+ 12B2 0.1U_0402_25V6K~D
24 SYS_TZOUT1+ 53 13B2 1 1
2
2 2
30 LVDS_SW_TZOUT2- LVDS_SW_TZOUT2- 51 29 TZOUT2- 3
LVDS_SW_TZOUT2+ 14B1 A14 TZOUT2+ 3
30 LVDS_SW_TZOUT2+ 50 15B1 A15 30 +3VS 4 4
+LCDVDD 5 5
24 SYS_TZOUT2- SYS_TZOUT2- 49 1 W=60mils 6
14B2 6

0.1U_0402_25V6K~D

10U_0805_25V6K~D
24 SYS_TZOUT2+ SYS_TZOUT2+ 48 CV45 24 INV_PWM D73 INV_PWM 7
15B2 DISPOFF# 7
1 1 40 BKOFF# 2 1 8 8

CV47

CV46
30 LVDS_SW_TZCLK- LVDS_SW_TZCLK- 46 32 TZCLK- 0.1U_0402_25V6K~D 24 I2CC_SCL I2CC_SCL 9
LVDS_SW_TZCLK+ 16B1 A16 TZCLK+ 2 SDMK0340L-7-F_SOD323-2~D I2CC_SDA 9
30 LVDS_SW_TZCLK+ 45 17B1 A17 33 24 I2CC_SDA 10 10

1
11 11
SYS_TZCLK- 2 2 TXOUT0-
24 SYS_TZCLK- 44 16B2 12 12
24 SYS_TZCLK+ SYS_TZCLK+ 43 R1918 TXOUT0+ 13
17B2 +3VS 13
10K_0402_5%~D 14 14
42 35 TXOUT1- 15

2
18B1 A18 TXOUT1+ 15
41 19B1 A19 36 16 16
1

17 17
40 RV60 D61 TXOUT2- 18
B 18B2 DMIC_CLK USB20_CMOS_N12 TXOUT2+ 18 B
39 19B2 0_0603_5%~D 6 V I/O V I/O 1 19 19
@ 20 20
+3VS 5 2 TXCLK- 21
+5VS
Carmer
2

+3VS_SWITCH V BUS Ground TXCLK+ 21

3 GND1 VDD1 4 22 22
13 10 DMIC0 4 3 USB20_CMOS_P12 23
GND2 VDD2 V I/O V I/O 23
1

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

20 19 1 1 1 TZOUT0- 24
RV58 GND3 VDD3 CV59 CV60 IP4223CZ6_SO6-6 TZOUT0+ 24
24 LCDVDD_ON 21 GND4 VDD4 22 25 25
10K_0402_5%~D 31 28 CV58 26
GND5 VDD5 4.7U_0603_10V6K~D TZOUT1- 26
38 GND6 VDD6 37 27 27
2

2 2 2
G

52 47 TZOUT1+ 28
2

GND7 VDD7 28
74 GND8 VDD8 69 29 29
3 1 25 TZOUT2- 30
OE2# TZOUT2+ 30
S

7 OE1# 31 31
QV14 32
2N7002E-T1-E3_SOT23-3 TZCLK- 32
33 33
TZCLK+ 34 45
PI3LVD1012BE_BQSOP80 34 GND1
35 35 GND2 46
19 USB20_N12 USB20_N12 @ RV10 1
@RV10 2 0_0402_5% USB20_CMOS_N12 36 47
USB20_P12 @RV51
@ RV51 1 USB20_CMOS_P12 36 GND3
19 USB20_P12 2 0_0402_5% 37 37 GND4 48
+3VS_CAM 38 38 GND5 49
DMIC_CLK 39 50
32 DMIC_CLK 39 GND6
DMIC0 40 51
32 DMIC0 40 GND7
CAM_DET# 41 52
17 CAM_DET# LVDS_CAB_DET# 41 GND8
20 LVDS_CAB_DET# 42 42 GND9 53
LCD_TEST 43 54
40 LCD_TEST 43 GND10
44 44 GND11 55
L101
USB20_N12 1 2 USB20_CMOS_N12 JAE_FI-TD44SB-VF93-R750~D
1 2 CONN@

USB20_P12 4 3 USB20_CMOS_P12
4 3
A WCM2012F2S-900T04_0805 A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC M/B LA-8321
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
4019H5
Date: Wednesday, August 01, 2012 Sheet 25 of 66
5 4 3 2 1
 A B C D E

+3VS

0.1U_0402_25V6K~D
VGA SW for PCH / GPU
0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D
1 1 1 1
CV68

CV69

CV70

CV71
SEL=Low, N0
SEL=High, N1
2 2 2 2 UV11
1 VDD
4 12 DGPU_SELECT#_CRT @RV114
@ RV114 1 2 0_0402_5%~D
1 VDD SEL DGPU_SELECT# 19,24,27,28,29 1
9 VDD
19 2 CRT_R
VDD YA CRT_G +3VS
YB 5
14 VGA_CRT_R 24 6 CRT_B
A0 YC
14 VGA_CRT_G 22 B0
14 VGA_CRT_B 18 8 CRT_HSYNC
C0 YD CRT_VSYNC
14 VGA_CRT_HSYNC 17 D0 YE 11
14 VGA_CRT_VSYNC 14 E0

2
G
18 PCH_CRT_RED 23 A1 GND 3
18 PCH_CRT_GRN 21 B1 GND 7
18 PCH_CRT_BLU 16 10 CRT_DDC_DATA 1 6 D_DDCDATA
C1 GND
15 20

D
18 PCH_CRT_HSYNC

S
D1 GND Q260A
18 PCH_CRT_VSYNC 13 E1

5
DMN66D0LDW-7

G
PI3V512QE_QSOP24

CRT_DDC_CLK 4 3 D_DDCCLK

D
S
Q260B
DMN66D0LDW-7

LCD DDC Selector

+3VS

1 +5VS +R_CRT_VCC +CRT_VCC

+3VS
2 CV72 2
DV5
0.1U_0402_25V6K~D 3 NC FV1
U611 2
2 1 1 2
14 VGA_DDC_CLK 1 1S1 VCC 11 0822 1

0.1U_0402_25V6K~D
C1853
1.1A_6V_SMD1812P110TF

3
18 PCH_CRT_DDC_CLK 2 12 DGPU_EDIDSEL_R# BAT1000-7-F_SOT23-3~D
1S2 IN1 DGPU_EDIDSEL_R# 24

DAN217T146_SC59-3

DAN217T146_SC59-3

DAN217T146_SC59-3
IGPU_EDIDSEL# 2
3 1S3 IN2 10 IGPU_EDIDSEL# 24 2 1

14 VGA_DDC_DATA 9 4 CRT_DDC_CLK @R1897

@ R1897 0_1206_5%
2S1 D1

1
8 6 CRT_DDC_DATA
18 PCH_CRT_DDC_DAT
7
2S2 D2
5
@ DV2 @ DV3 @ DV4
@DV4 CRT Connector
2S3 GND JCRT
STG3856QTR_QFN1 6
@ PAD~D T80 11
CRT_R LV1 1 2 BLM18BB600SN1D_0603~D CRT_R_2 1
7
12
IN1 IN2 D1 D2 Y CRT_G LV2 1 2 BLM18BB600SN1D_0603~D CRT_G_2 2
8
13
0 0 CRT_B LV3 1 2 BLM18BB600SN1D_0603~D CRT_B_2 3
9
0 1 1S1 2S1 DSC 14 G 16
1

1
1 1 1 1 1 1 4 G 17
150_0402_1%
RV12

150_0402_1%
RV13

150_0402_1%
RV14

6.8P_0402_50V8D~D
CV16

6.8P_0402_50V8D~D
CV17

6.8P_0402_50V8D~D
CV18

6.8P_0402_50V8D~D
CV20

6.8P_0402_50V8D~D
CV21

6.8P_0402_50V8D~D
CV49
1 0 1S2 2S2 UMA 10
15
1 1 2 2 2 2 2 2 20 CRT_DET#
CRT_DET# 5
2

TYCO_2041186-2~D
3 CONN@ 3

CIS Link OK
+CRT_VCC
+CRT_VCC

CV23 1 2 0.1U_0402_25V6K~D RV15 2 1 10K_0402_5%~D CRT_DET# @RV115

@ RV115 1 2 10K_0402_5%~D
5

UV1 +CRT_VCC
P

OE#

CRT_HSYNC 2 4 CRT_HSYNC_1 @ LV4 1 2 0_0603_5%~D CRT_HSYNC_2 D_DDCDATA 1 2

A Y RV24 2.2K_0402_5%~D
G

D_DDCCLK 1 2
74AHCT1G125GW_SOT353-5 RV25 2.2K_0402_5%~D
3

+CRT_VCC

CV22 100P_0402_50V8J~D

CV26 68P_0402_50V8J~D

CV27 68P_0402_50V8J~D
02/20-108
CV28 1 2 0.1U_0402_25V6K~D 1 1 1
5

UV2
P

OE#

CRT_VSYNC CRT_VSYNC_1 @ LV5 CRT_VSYNC_2 2 2 2

2 A Y 4 1 2 0_0603_5%~D
1 1
G

74AHCT1G125GW_SOT353-5 CV24 CV25

3

4.7P_0402_50V8C~D 4.7P_0402_50V8C~D
2 2

4 4

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC M/B LA-8321
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
4019H5
Date: Wednesday, August 01, 2012 Sheet 26 of 66
A B C D E
 5 4 3 2 1

+3VS +3VS
+3VS
HDMIDAT_NB 2.2K_0402_5%~D 2 1 R437
@ R1847 1 2 4.7K_0402_5%~D HDMI_CFG_HPD R1741 @ L56

1
C 200K_0402_5% MBK1608221YZF_2P HDMICLK_NB 2.2K_0402_5%~D 2 1 R438
R1855 1 2 4.7K_0402_5%~D HDMI_IN1_PEQ 2 1 2 1 2 HDMI_SINK_HPD
B
R1857 1 2 4.7K_0402_5%~D HDMI_IN2_PEQ E Q264 @

3
20 DGPU_HPD_INT#

1
+3V_MXM

220P_0402_50V7K~D
MMST3904-7-F_SOT323~D @
R2600 1 2 4.7K_0402_5%~D HDMI_PRE_EMI HDMI_SW_DETECT D9 1

C1058
@R2652
@ R2652 0_0402_5%~D BAV99_SOT23-3 GPU_HDMI_SDATA 2.2K_0402_5%~D 2 1 R461
D

1
1 2
D GPU_HDMI_SCLK 2.2K_0402_5%~D 2 D
2 1 R462
G 2

3
2

2
@ R1848 1 2 4.7K_0402_5%~D HDMI_CFG_HPD S

3
R1742 @ R1743 @ Q77
@ R1856 1 2 4.7K_0402_5%~D HDMI_IN1_PEQ 10K_0402_5%~D 200K_0402_5% 2N7002E-T1-E3_SOT23-3

@ R1858 1 2 4.7K_0402_5%~D HDMI_IN2_PEQ +5VS

1
+3VS
as close as connector
1 1 1

C1185

0.1U_0402_25V6K~D

C1184

0.1U_0402_25V6K~D

C1077

10U_0603_6.3V6M~D
@ R905 0_0402_5%
1 2

U57 2 2 2 L59 DLW21SN900HQ2L_0805_4P~D

DVI_TXD2+_R 3 C_DVI_R_TXD2+
3 4 4

VDD 6
31 DVI_TXD2-_R 2 1 C_DVI_R_TXD2-
VDD 2 1
1 2
25 @ R907 0_0402_5%
C1059 0.1U_0402_25V6K~D GPU_HDMI_C_TX2- PWDN_ASQ
14 GPU_HDMI_TXD2- 2 1 44 IN1_D1n
14 GPU_HDMI_TXD2+ C1060 2 1 0.1U_0402_25V6K~D GPU_HDMI_C_TX2+ 45 28 HDMI_CFG_HPD @ R917 0_0402_5%
C1061 0.1U_0402_25V6K~D GPU_HDMI_C_TX1- IN1_D1p CFG_HPD
14 GPU_HDMI_TXD1- 2 1 47 IN1_D2n 1 2
14 GPU_HDMI_TXD1+ C1062 2 1 0.1U_0402_25V6K~D GPU_HDMI_C_TX1+ 48 40
C1063 0.1U_0402_25V6K~D GPU_HDMI_C_TX0- IN1_D2p DDCBUF HDMI_PRE_EMI L57 DLW21SN900HQ2L_0805_4P~D
14 GPU_HDMI_TXD0- 2 1 1 IN1_D3n PRE_EMI 34
C1064 2 1 0.1U_0402_25V6K~D GPU_HDMI_C_TX0+ 2 7 DVI_TXD1+_R 3 C_DVI_R_TXD1+
14 GPU_HDMI_TXD0+
C1065 0.1U_0402_25V6K~D GPU_HDMI_C_CLK- IN1_D3p RTERM 3 4 4
14 GPU_HDMI_TXC- 2 1 4 IN1_D4n
14 GPU_HDMI_TXC+ C1066 2 1 0.1U_0402_25V6K~D GPU_HDMI_C_CLK+ 5
C IN1_D4p DVI_TXD1-_R 2 C_DVI_R_TXD1- C
2 1 1

1 2
@ R921 0_0402_5%

18 TMDS_B_DATA2# TMDS_B_DATA2# C1126 2 1 0.1U_0402_25V6K~D PCH_HDMI_C_TXD2- 8 @ R906 0_0402_5%

TMDS_B_DATA2 C1114 0.1U_0402_25V6K~D PCH_HDMI_C_TXD2+ IN2_D1n
18 TMDS_B_DATA2 2 1 9 IN2_D1p 1 2
18 TMDS_B_DATA1# TMDS_B_DATA1# C1123 2 1 0.1U_0402_25V6K~D PCH_HDMI_C_TXD1- 11
TMDS_B_DATA1 C1116 0.1U_0402_25V6K~D PCH_HDMI_C_TXD1+ IN2_D2n DVI_TXD2-_R L55 DLW21SN900HQ2L_0805_4P~D
18 TMDS_B_DATA1 2 1 12 IN2_D2p OUT_D1n 36
TMDS_B_DATA0# C1122 2 1 0.1U_0402_25V6K~D PCH_HDMI_C_TXD0- 13 35 DVI_TXD2+_R DVI_TXD0-_R 3 C_DVI_R_TXD0-
18 TMDS_B_DATA0#
TMDS_B_DATA0 C1115 0.1U_0402_25V6K~D PCH_HDMI_C_TXD0+ IN2_D3n OUT_D1p DVI_TXD1-_R 3 4 4
18 TMDS_B_DATA0 2 1 14 IN2_D3p OUT_D2n 33
18 TMDS_B_CLK# TMDS_B_CLK# C1124 2 1 0.1U_0402_25V6K~D PCH_HDMI_C_TXC- 16 32 DVI_TXD1+_R
TMDS_B_CLK C1125 0.1U_0402_25V6K~D PCH_HDMI_C_TXC+ IN2_D4n OUT_D2p DVI_TXD0-_R DVI_TXD0+_R 2 C_DVI_R_TXD0+
18 TMDS_B_CLK 2 1 17 IN2_D4p OUT_D3n 30 2 1 1
29 DVI_TXD0+_R
OUT_D3p DVI_TXC-_R
OUT_D4n 27 1 2
26 DVI_TXC+_R @ R915 0_0402_5%
OUT_D4p
@ R918 0_0402_5%
14 VGA_HDMI_DET 46 IN1_HPD 1 2
18 TMDS_B_HPD 10 IN2_HPD
41 L58 DLW21SN900HQ2L_0805_4P~D
14 GPU_HDMI_SCLK IN1_SCL
42 DVI_TXC+_R 3 C_DVI_R_TXC+
14 GPU_HDMI_SDATA
HDMICLK_NB IN1_SDA 3 4 4
18 HDMICLK_NB 19 IN2_SCL
18 HDMIDAT_NB HDMIDAT_NB 20 IN2_SDA DVI_TXC-_R C_DVI_R_TXC-
2 2 1 1
20,24,28,29 DGPU_EDIDSEL# 22 39 HDMI_SW_DETECT
SW_DDC OUT_HPD DVI_SCLK_L
19,24,26,28,29 DGPU_SELECT# 21 SW_MAIN OUT_SCL 38 1 2
37 DVI_SDATA_L @ R922 0_0402_5%
OUT_SDA
HDMI_IN1_PEQ 3
HDMI_IN2_PEQ 15 IN1_PEQ
IN2_PEQ
B B
23 CEXT
24 REXT
SEL Y HDMI Connector
2.2U_0603_10V7K~D

1
C1824

1
+HDMI_5V_OUT
499_0402_1%~D

R1859

18 GND 0 IN1
43 GND
2
49 PAD 1 IN2
JHDMI
2

PS8271QFN48GTR-A1_QFN48_7X7 HDMI_SINK_HPD 19
+HDMI_5V_OUT HP_DET
18 +5V
17 DDC/CEC_GND
02/16-103 DVI_SDATA
DVI_SCLK
16
15
SDA
SCL
+HDMI_5V_OUT @ R1919 1 2 0_0402_5%~D HDMI_IN_TX_CONN 14
30 HDMI_IN_TX Reserved
30 HDMI_IN_RX @ R1920 1 2 0_0402_5%~D HDMI_IN_RX_CONN 13 CEC

3
+5VS C_DVI_R_TXC- 12 20
CK- GND
11 CK_shield GND 21
D4 +HDMI_5V_OUT @D68
@ D68 @ D69 C_DVI_R_TXC+ 10 22
CK+ GND
1

1
2.2K_0402_5%~D

R900

2.2K_0402_5%~D

R901

3 NC FV2 W=40mils DAN217T146_SC59-3 DAN217T146_SC59-3 C_DVI_R_TXD0- 9 23

+HDMI_5V D0- GND
2 1 1 2 Place LC Filter 8 D0_shield
C_DVI_R_TXD0+ 7
closed to JHDMI 1

1
1.1A_6V_SMD1812P110TF C_DVI_R_TXD1- D0+
1 1 6 D1-
BAT1000-7-F_SOT23-3~D 5
2

D1_shield
1U_0603_25V6-K~D

CV57

@ CV56 C_DVI_R_TXD1+ 4
1U_0603_25V6-K~D DVI_SDATA_L @ R2559 DVI_SDATA C_DVI_R_TXD2- D1+
1 2 0_0805_5%~D 3 D2-
2 @ R1896 2 DVI_SCLK_L @ R2561 1 2 0_0805_5%~D DVI_SCLK 2 D2_shield
2 1 C_DVI_R_TXD2+ 1 D2+
10P_0402_50V8J~D

10P_0402_50V8J~D

0_1206_5% 1 1 SUYIN_100042GR019M23UZL
@ C1056 @ C1057
@C1057 CONN@
A A

2 2

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC M/B LA-8321
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
4019H5
Date: Wednesday, August 01, 2012 Sheet 27 of 66
5 4 3 2 1
 A B C D E

+3VS

0.1U_0402_16V4Z~D
+3VS

0.1U_0402_16V4Z~D
1

C2038
+3VS_DP
1

C2037
2
DISP_DAT_AUXN_CONN R442 2 1 100K_0402_5%~D U633
2 0.1U_0402_25V6K~D
14 VGA_DPD_AUXP/DDC 2 1 C1205 VGA_DPD_SW_AUXP 6 1B1 VCC 16
DISP_CLK_AUXP_CONN R59 1 2 100K_0402_5%~D 5
0.1U_0402_25V6K~D 1B2
U634 18 PCH_DPC_AUXP 2 1 C1204 PCH_DPC_AUXP_SW 4 1B3 S0 14 DP_CBL_DET
PCH_DPC_CLK 3 2 DGPU_SELECT#
1 18 PCH_DPC_CLK 1B4 S1 1
18 PCH_DPC_HPD PCH_DPC_HPD 1 6 DGPU_SELECT#
B2 S 0.1U_0402_25V6K~D
2 GND VCC 5 14 VGA_DPD_AUXN/DDC 2 1 C1206 VGA_DPD_SW_AUXN 10 2B1 1A 7 DISP_CLK_AUXP_CONN
VGA_DPD_HPD 3 4 DISP_HPD_SINK +3VS 11 9 DISP_DAT_AUXN_CONN
14 VGA_DPD_HPD B1 A 2B2 2A
0.1U_0402_25V6K~D 2 1 C1203 PCH_DPC_AUXN_SW 12
18 PCH_DPC_AUXN 2B3
SN74LVC1G3157DCKR_SC70-6 2.2K_0402_5%~D 2 1 R2264 PCH_DPC_DAT PCH_DPC_DAT 13 15
18 PCH_DPC_DAT 2B4 2OE
2.2K_0402_5%~D 2 1 R2263 PCH_DPC_CLK 1 8
1OE GND
PCH_DPC_HPD +3V_MXM SN74CB3Q3253PWR_TSSOP16
2
R509
1
100K_0402_5%~D
DGPU_SEL# Chanel Source
0 B1 GPU 4.7K_0402_5%~D 2 1 R2262 @ VGA_DPD_AUXN/DDC

1 B2 PCH 4.7K_0402_5%~D 2 1 R2261 @ VGA_DPD_AUXP/DDC

S1 S0 1A 2A Y

0 0 1B1 2B1 MXM_AUX

0 1 1B2 2B2 MXM_DDC
+3VS 1 0 1B3 2B3 PCH_AUX
1 1 1B4 2B4 PCH_DDC
PCH/GPU AUX&LANE SW

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D
1 1 1 1

C57

C61

C56
+3VS

C60
2 2 2 2

2 2

13
26
1
6
U129

VDD_1
VDD_2
VDD_3
VDD_4
14 VGA_DPD_P0 0.22U_0402_16V7K~D 2 1 C1070 DISP_C_A0P 42 2 DISP_A0P_L C1192 2 1 0.22U_0402_16V7K~D DISP_A0P
0.22U_0402_16V7K~D 2 DISP_C_A0N NC0+ COM0+ DISP_A0N_L 0.22U_0402_16V7K~D DISP_A0N
14 VGA_DPD_N0 1 C1069 41 NC0- COM0- 3 C1164 2 1

14 VGA_DPD_P1 0.22U_0402_16V7K~D 2 1 C1073 DISP_C_A1P 40 4 DISP_A1P_L C1191 2 1 0.22U_0402_16V7K~D DISP_A1P

0.22U_0402_16V7K~D 2 DISP_C_A1N NC1+ COM1+ DISP_A1N_L 0.22U_0402_16V7K~D DISP_A1N
14 VGA_DPD_N1 1 C1071 39 NC1- COM1- 5 C1194 2 1

14 VGA_DPD_P2 0.22U_0402_16V7K~D 2 1 C1074 DISP_C_A2P 38 7 DISP_A2P_L C1178 2 1 0.22U_0402_16V7K~D DISP_A2P

0.22U_0402_16V7K~D 2 NC2+ COM2+ +3VS_DP
14 VGA_DPD_N2 1 C1072 DISP_C_A2N 37 NC2- COM2- 8 DISP_A2N_L C1177 2 1 0.22U_0402_16V7K~D DISP_A2N
D71
3 NC F2 W=40mils
For ATI/Nvidia GPU 14 VGA_DPD_P3 0.22U_0402_16V7K~D 2 1 C1076 DISP_C_A3P 36 9 DISP_A3P_L C1193 2 1 0.22U_0402_16V7K~D DISP_A3P +3VS 2 1 1 2
0.22U_0402_16V7K~D 2 NC3+ COM3+
14 VGA_DPD_N3 1 C1075 DISP_C_A3N 35 NC3- COM3- 10 DISP_A3N_L C1190 2 1 0.22U_0402_16V7K~D DISP_A3N

10U_0603_6.3V6M~D
C1067

0.1U_0402_25V6K~D
C1068
1.1A_6V_SMD1812P110TF
25 11 BAT1000-7-F_SOT23-3~D 1 1
NC4+ COM4+
24 NC4- COM4- 12 2 1
@ R923 0_1206_5%
23 NC5+ 2 2
22 NC5-

18 PCH_DPC_P0 0.22U_0402_16V7K~D 2 1 C1079 PCH_DPC_C_P0 34

0.22U_0402_16V7K~D 2 NO0+
18 PCH_DPC_N0 1 C1109 PCH_DPC_C_N0 33 NO0- COM5+ 14
COM5- 15
18 PCH_DPC_P1 0.22U_0402_16V7K~D 2 1 C1127 PCH_DPC_C_P1 32
0.22U_0402_16V7K~D 2 NO1+
18 PCH_DPC_N1 1 C1128 PCH_DPC_C_N1 31 NO1-
18 PCH_DPC_P2 0.22U_0402_16V7K~D 2 1 C1138 PCH_DPC_C_P2 30
0.22U_0402_16V7K~D 2 PCH_DPC_C_N2 NO2+
For Intel PCH 18 PCH_DPC_N2 1 C1139 29 NO2- JDP
3 0.22U_0402_16V7K~D 2 1 C1140 PCH_DPC_C_P3 28 16 DGPU_SELECT# 1 3
18 PCH_DPC_P3 NO3+ SEL1 DGPU_SELECT# 19,24,26,27,29 GND
18 PCH_DPC_N3 0.22U_0402_16V7K~D 2 1 C1141 PCH_DPC_C_N3 27 17 DGPU_EDIDSEL# R2562 @ 1 2 0_0402_5%~D DGPU_SELECT# DISP_HPD_SINK 2
NO3- SEL2 DISP_A0P HOT PLUG
3 LANE0_P
21 DP_CBL_DET 4
NO4+ DGPU_EDIDSEL# 20,24,27,29 19 DP_CBL_DET CONFIG1
20 DISP_A0N 5
NO4- DISP_CEC LANE0_N
6 CONFIG2
19 NO5+ EP 43 DGPU_SEL# Chanel Source 7 GND
18 NO5- 8 GND
0 NC GPU DISP_A1P 9
DISP_A3P LANE1_P
10 LANE3_P
MAX14998ETOLFT 1 NO PCH DISP_A1N 11
DISP_A3N LANE1_N
12 LANE3_N
13 GND
14 GND
DISP_A2P
Place close JDP DISP_CLK_AUXP_CONN
15
16
LANE2_P
DISP_A2N AUX_CH_P
17 LANE2_N GND1 21
@ D10 DISP_DAT_AUXN_CONN 18 22
DISP_A0N AUX_CH_N GND2
1 10 DISP_A0N 19 GND GND3 23
VGA_DPD_AUXP/DDC +3VS_DP 20 24
14 VGA_DPD_AUXP/DDC DP_PWR GND4
VGA_DPD_AUXN/DDC DISP_A0P 2 9 DISP_A0P
14 VGA_DPD_AUXN/DDC
FOX_3V112M3-NH0RD7-7H~D
DISP_A3P 4 7 DISP_A3P
1

R936

R932

R933
1

22U_0805_6.3V6M~D

0.1U_0402_25V6K~D
R507 R529 DISP_A3N 5 6 DISP_A3N

1
100K_0402_5% 100K_0402_5% 1 1

C1081

C1080
1M_0402_5%~D

5.1M_0402_5%

1M_0402_5%~D
3
2

2
2 2
D

2
6

RCLAMP0524P.TCT~D
2 DP_MXM_CARD_SEL
4 G DP_MXM_CARD_SEL 29,40 4
@ D11
S DISP_A1P 1 10 DISP_A1P
1

Q263A
DMN66D0LDW-7 DISP_A1N 2 9 DISP_A1N
D
DELL CONFIDENTIAL/PROPRIETARY
3

DISP_A2P 4 7 DISP_A2P

G
5
DISP_A2N 5 6 DISP_A2N
Compal Electronics, Inc.
Q263B PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
S DMN66D0LDW-7 TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
3
SCHEMATIC M/B LA-8321
4

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

8 NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
RCLAMP0524P.TCT~D 4019H5
Date: Wednesday, August 01, 2012 Sheet 28 of 66
A B C D E
 5 4 3 2 1

+3VS

+5VS

4.7K_0402_5%~D

0.1U_0402_16V4Z~D
2

2 4.7K_0402_5%~D
R7

R11
1

C2024
1

1
2
D D
+3VS U4

100K_0402_5%~D
2 1A VCC 8
5 3 VGA_DPC_AUXP/DDC
2A 1B

1
1 6 VGA_DPC_AUXN/DDC
1OE# 2B

R6
7 2OE# GND 4

SN74CBTD3306CPWR_TSSOP8~D

2
DMC_DISP_CAB_DET#
+3VS

1
D Q302 +3VS

0.1U_0402_16V4Z~D
DMC_DISP_CAB_DET 2
PCH/GPU AUX&LANE SW for DMC

0.1U_0402_16V4Z~D
G
1 1 S 2N7002K_SOT23-3 DP_DMC_AUXN R2650 1 2 100K_0402_5%~D
+3V_MXM

C188

3
C197
DP_DMC_AUXP R2651 1 2 100K_0402_5%~D

VGA_DPC_AUXP/DDC @ R169 1 2 2
2 2.2K_0402_5%~D
U132
VGA_DPC_AUXN/DDC @ R170 1 2 2.2K_0402_5%~D
54 VDD
31 47 DGPU_EDIDSEL#
VDD SW_AUX DGPU_EDIDSEL# 20,24,27,28
28 DP_DMC_AUXP +3VS
OUT_AUXp_SCL DP_DMC_AUXP 35
C 27 DP_DMC_AUXN C
OUT_AUXn_SDA DP_DMC_AUXN 35
DMC_IN2_PEQ 49 @ R1924 1 2 4.7K_0402_5%~D
DMC_IN1_PEQ IN2_PEQ/SDA_CTL DP_DMC_AUXP_R C2000 1
50 IN1_PEQ/SCL_CTL AC_AUXp 30 2 0.1U_0402_25V6K~D
DMC_IN1_AEQ# 3 29 DP_DMC_AUXN_R C2001 1 2 0.1U_0402_25V6K~D DMC_CFG_OUTPUT @ R1929 1 2 4.7K_0402_5%~D
DMC_IN2_AEQ# IN1_AEQ# AC_AUXn
51 IN2_AEQ# @ R1916 1 2 4.7K_0402_5%~D
I2C_CTL_EN 37
14 VGA_DPC_P3 C1110 1 2 0.1U_0402_25V6K~D VGA_DPC_SW_P3 52 DMC_CFG_HPD @ R1915 1 2 4.7K_0402_5%~D
C1113 0.1U_0402_25V6K~D VGA_DPC_SW_N3 IN1_D0p
14 VGA_DPC_N3 1 2 53 IN1_D0n
14 VGA_DPC_P2 C1111 1 2 0.1U_0402_25V6K~D VGA_DPC_SW_P2 55 34 DMC_CFG_OUTPUT @ R1926 1 2 4.7K_0402_5%~D
C1083 0.1U_0402_25V6K~D VGA_DPC_SW_N2 IN1_D1p CFG_OUTPUT
From ATI/Nvidia GPU 14 VGA_DPC_N2
C1112
1 2
0.1U_0402_25V6K~D VGA_DPC_SW_P1
56 IN1_D1n DMC_DISP_CAB_DET DMC_IN1_AEQ# @ R1913 1
14 VGA_DPC_P1 1 2 1 IN1_D2p CA_DET 44 DMC_DISP_CAB_DET 35 2 4.7K_0402_5%~D
14 VGA_DPC_N1 C1085 1 2 0.1U_0402_25V6K~D VGA_DPC_SW_N1 2
C1084 0.1U_0402_25V6K~D VGA_DPC_SW_P0 IN1_D2n @ R1925 1
14 VGA_DPC_P0 1 2 4 IN1_D3p 2 4.7K_0402_5%~D
14 VGA_DPC_N0 C1082 1 2 0.1U_0402_25V6K~D VGA_DPC_SW_N0 5 42 DMC_SW_P3 C2016 1 2 0.1U_0402_25V6K~D DP_DMC_ML3P DP_DMC_ML3P 35
IN1_D3n OUT_D0p DMC_SW_N3 C2017 0.1U_0402_25V6K~D DP_DMC_ML3N DMC_IN2_AEQ# @ R1921 1
OUT_D0n 41 1 2 DP_DMC_ML3N 35 2 4.7K_0402_5%~D
0.1U_0402_25V6K~D 1 2 C1208 VGA_DPC_AUXP/DDC_P 24 39 DMC_SW_P2 C2018 1 2 0.1U_0402_25V6K~D DP_DMC_ML2P DP_DMC_ML2P 35
14 VGA_DPC_AUXP/DDC IN1_AUXp OUT_D1p
0.1U_0402_25V6K~D 1 2 C1207 VGA_DPC_AUXN/DDC_N 23 38 DMC_SW_N2 C2019 1 2 0.1U_0402_25V6K~D DP_DMC_ML2N DP_DMC_ML2N 35 @ R1922 1 2 4.7K_0402_5%~D
14 VGA_DPC_AUXN/DDC IN1_AUXn OUT_D1n
20 36 DMC_SW_P1 C2020 1 2 0.1U_0402_25V6K~D DP_DMC_ML1P DP_DMC_ML1P 35
IN1_SCL OUT2_D2p DMC_SW_N1 C2021 0.1U_0402_25V6K~D DP_DMC_ML1N DMC_IN1_PEQ @ R1909 1
19 IN1_SDA OUT2_D2n 35 1 2 DP_DMC_ML1N 35 2 4.7K_0402_5%~D
33 DMC_SW_P0 C2022 1 2 0.1U_0402_25V6K~D DP_DMC_ML0P DP_DMC_ML0P 35
OUT_D3p DMC_SW_N0 C2023 0.1U_0402_25V6K~D DP_DMC_ML0N @ R1923 1
OUT_D3n 32 1 2 DP_DMC_ML0N 35 2 4.7K_0402_5%~D
18 PCH_DPD_P3 C1149 1 2 0.1U_0402_25V6K~D PCH_DPD_SW_P3 7
C1148 0.1U_0402_25V6K~D PCH_DPD_SW_N3 IN2_D0p DMC_IN2_PEQ @ R1914 1
18 PCH_DPD_N3 1 2 8 IN2_D0n 2 4.7K_0402_5%~D
18 PCH_DPD_P2 C1147 1 2 0.1U_0402_25V6K~D PCH_DPD_SW_P2 10
C1146 0.1U_0402_25V6K~D PCH_DPD_SW_N2 IN2_D1p DGPU_SELECT#
From Intel PCH 18 PCH_DPD_N2
C1145
1 2
0.1U_0402_25V6K~D PCH_DPD_SW_P1
11 IN2_D1n SW_ML/I2C_ADDR 48 DGPU_SELECT# 19,24,26,27,28
18 PCH_DPD_P1 1 2 13 IN2_D2p
B 18 PCH_DPD_N1 C1144 1 2 0.1U_0402_25V6K~D PCH_DPD_SW_N1 14 B
C1143 0.1U_0402_25V6K~D PCH_DPD_SW_P0 IN2_D2n DMC_CFG_HPD
18 PCH_DPD_P0
C1142
1 2
0.1U_0402_25V6K~D PCH_DPD_SW_N0
15 IN2_D3p CFG_HPD 46
DP_DMC_HPD
SW_ML/I2C_ADDR Chanel Source
18 PCH_DPD_N0 1 2 16 IN2_D3n OUT_HPD 43 DP_DMC_HPD 35
+3VS
C1210
0 IN1 GPU
18 PCH_DPD_AUXP 1 2 0.1U_0402_25V6K~D PCH_DPD_AUXP_P 26 IN2_AUXp
C1209 1 2 0.1U_0402_25V6K~D PCH_DPD_AUXN_N 25 18 1 IN2 PCH PCH_DPD_CLK R448 2 1 2.2K_0402_5%~D
18 PCH_DPD_AUXN IN2_AUXn REXT
18 PCH_DPD_CLK PCH_DPD_CLK 22 17
PCH_DPD_DAT IN2_SCL CEXT PCH_DPD_DAT R449 2
18 PCH_DPD_DAT 21 IN2_SDA 1 2.2K_0402_5%~D

GND 45
6 12 +3VS
14 VGA_DMC_HPD IN1_HPD GND

2.2U_0603_10V7K~D

C1825
18 PCH_DMC_HPD 9 IN2_HPD Epad 57

1
PD 40 1

4.99K_0402_1%

R1874
VGA_DPC_AUXP/DDC DMC_DISP_CAB_DET @ R2659 1 2 10K_0402_5%~D
1

VGA_DPC_AUXN/DDC R2649 PS8321QFN56GTR-A0_QFN56_7X7

1

100K_0402_5%~D 2

2
R2512
100K_0402_5%~D
2
1

6 2

R2513
100K_0402_5%~D D
2 DP_MXM_CARD_SEL 28,40
G
2

S
1

Q301A
A A
DMN66D0LDW-7
D DELL CONFIDENTIAL/PROPRIETARY
3

G
5 MXM_MFG_SEL GPU Source
0 NVDIA
Compal Electronics, Inc.
Q301B S PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
4

DMN66D0LDW-7 TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
1 AMD BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC M/B LA-8321
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
4019H5
Date: Wednesday, August 01, 2012 Sheet 29 of 66
5 4 3 2 1
 5 4 3 2 1

+1.2VS_HDMI +1.2VS_HDMI +3VS_AVDD +3.3V_AVDD_RPLL +3VS L20 +3VS_AVDD +3VS L23 +3VS_DVDD +1.2VS_AVDD L21 +1.2VS_HDMI +1.2VS_DVDD L22 +1.2VS_HDMI
BLM18BD601SN1D_0603~D BLM18BD601SN1D_0603~D BLM18BD601SN1D_0603~D BLM18BD601SN1D_0603~D
+5VS 1 2 1 2 1 2 2 1 2 1

22U_0805_6.3V6M~D

0.1U_0402_25V6K~D

22U_0805_6.3V6M~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

22U_0805_6.3V6M~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

22U_0805_6.3V6M~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

22U_0805_6.3V6M~D
R564 L24
10K_0402_5%~D R563 BLM18BD601SN1D_0603~D
1 1U_0402_6.3V6K~D 100K_0402_5% 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
C287 pin 2

2
C362

C285

C287

C269

C265

C266

C267

C268

C286

C282

C283

C284

C270

C271

C272

C273

C274

C275

C276

C277

C278

C280

C281

C279
U608
as close as

2
1 +1.2VS_HDMI
+3VS 2 PGOOD 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
4 VDD
U2 pin7 GND
VOUT 6
3 VIN
NC 5 1
1 2 EN
8 C1752
D GND D
C1749 7 10U_0805_25V6K~D U2
10U_0805_25V6K~D ADJ 2
GND 9 10 VDDA_3V3 CVDD_12 116 +1.2VS_DVDD
1

2
CVDD_12 108
R565 RT9025-25PSP_SO8~D +3VS_AVDD +3.3V_AVDD_LVTX 46
20K_0402_5% CVDD_12 +3VS_DVDD
CVDD_12 35
1 2 11 AVDD_OUT_33
Vout = 0.8 *(R564+R565) / R565 23 88
2

AVDD_OUT_33 ADC_DVDD_1V2

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D
L25 R283 2 1 10K_0402_5%~D BS_UART_FUNCTION_SEL
BLM18BD601SN1D_0603~D 50
DPRX_VDDD_1V2 R284 2 BS_RESERVED
1 1 1 1 10K_0402_5%~D
+3VS_AVDD 80 HDMI_VDDA_3V3 DPRX_VDDA_1V2 64 +1.2VS_AVDD

C293

C288

C289
86 58 R285 2 1 10K_0402_5%~D BS_SPI_FUN_SEL
HDMI_VDDA_3V3 DPRX_VDDA_1V2
+HDMI_IN_5VS 2 2 2
90 ADC_AVDD_3V3 DPRX_VDDA_1V2 52
100 R286 2 1 10K_0402_5%~D BS_I2C_SRC_SEL
is from plug-in device ADC_AVDD_3V3
6
VDDA_1V2 R289 2
+3VS_DVDD 38 RVDD_33 1 10K_0402_5%~D BS_EXTKEY_EN
+HDMI_IN_5VS 1
1 D33 2 2 1 2 +5VS 109
D24 1 2 128
RVDD_33 R295 2 1 10K_0402_5%~D BS_I2C_DEV_ID0
1SS355TE-17_SOD323-2 1SS355TE-17_SOD323-2 +3VS_DVDD RVDD_33
33 LVDS_SW_TXOUT0- LVDS_SW_TXOUT0- 25 R296 2 1 10K_0402_5%~D BS_I2C_DEV_ID1
O_CH0N_LV / TTL_D29 / GPIO_67 LVDS_SW_TXOUT0+
O_CH0P_LV / TTL_D28 / GPIO_66 32 LVDS_SW_TXOUT0+ 25

1
+5VS_HDMI_IN_EDID XTALOUT 8 31 LVDS_SW_TXOUT1- LVDS_SW_TXOUT1- 25 R297 2 1 10K_0402_5%~D BS_I2C_DEV_ID2
R272 XTALIN XTAL O_CH1N_LV / TTL_D27 / GPIO_65 LVDS_SW_TXOUT1+
9 TCLK O_CH1P_LV / TTL_D26 / GPIO_64 30 LVDS_SW_TXOUT1+ 25
R1683

R1684

R1685

1 2.2K_0402_5%~D 29 LVDS_SW_TXOUT2- LVDS_SW_TXOUT2- 25 R288 2 1 10K_0402_5%~D BS_I2C_ON_SPI_EN

O_CH2N_LV / TTL_D25 / GPIO_63 LVDS_SW_TXOUT2+
36 NC O_CH2P_LV / TTL_D24 / GPIO_62 28 LVDS_SW_TXOUT2+ 25
1

C1792 27 LVDS_SW_TXCLK- LVDS_SW_TXCLK- 25

2
0.1U_0402_25V6K~D HDMI _RST# O_CLKN_LV / TTL_D23 / GPIO_61 LVDS_SW_TXCLK+
4 RESETn O_CLKP_LV / TTL_D22 / GPIO_60 26 LVDS_SW_TXCLK+ 25
2
4.7K_0402_5%~D

4.7K_0402_5%~D

4.7K_0402_5%~D

1 R271 2 1 10K_0402_5%~D 125 25

STI_TM2 O_CH3N_LV / TTL_D21 / GPIO_59
O_CH3P_LV / TTL_D20 / GPIO_58 24

2Kbit
C290 C1793 1 2 0.1U_0402_25V6K~D 92
2

4700P_0402_25V7K~D C1794 0.1U_0402_25V6K~D 93 ADC_A_N LVDS_SW_TZOUT0- R276 2

1 2 ADC_A_P E_CH0N_LV / TTL_D19 / GPIO_57 21 LVDS_SW_TZOUT0- 25 1 10K_0402_5%~D BS_OSC_SEL
2 C1795 0.1U_0402_25V6K~D 95 LVDS_SW_TZOUT0+
1 2 20
EDID ROM
ADC_B_N E_CH0P_LV / TTL_D18 / GPIO_56 LVDS_SW_TZOUT0+ 25
C1796 1 2 0.1U_0402_25V6K~D 96 19 LVDS_SW_TZOUT1- LVDS_SW_TZOUT1- 25 R277 2 1 10K_0402_5%~D BS_XTAL_TCLK_SEL
C C1797 0.1U_0402_25V6K~D 98 ADC_B_P E_CH1N_LV / TTL_D17 / GPIO_55 LVDS_SW_TZOUT1+ C
1 2 ADC_C_N E_CH1P_LV / TTL_D16 / GPIO_54 18 LVDS_SW_TZOUT1+ 25
U9 C1798 1 2 0.1U_0402_25V6K~D 99 17 LVDS_SW_TZOUT2- LVDS_SW_TZOUT2- 25 R278 2 1 10K_0402_5%~D BS_INTERFACE_SEL0
R1686 22_0402_5% C1799 0.1U_0402_25V6K~D 105 ADC_C_P E_CH2N_LV / TTL_D15 / GPIO_53 LVDS_SW_TZOUT2+
1 E0 VCC 8 1 2 HSYNC_IN E_CH2P_LV / TTL_D14 / GPIO_52 16 LVDS_SW_TZOUT2+ 25
2 7 EDID_WP_R 1 2 EDID_WP C1800 1 2 0.1U_0402_25V6K~D 106 15 LVDS_SW_TZCLK- LVDS_SW_TZCLK- 25 R280 2 1 10K_0402_5%~D BS_INTERFACE_SEL1
E1 WC HDMI_SW_CLK VSYNC_IN E_CLKN_LV / TTL_D13 / GPIO_51 LVDS_SW_TZCLK+
3 E2 SCL 6 E_CLKP_LV / TTL_D12 / GPIO_50 14 LVDS_SW_TZCLK+ 25
4 5 HDMI_SW_DAT 1 2 +3VS_DVDD 70 13 R282 2 1 10K_0402_5%~D BS_OCM_BOOT_SEL
VSS SDA C291 0.1U_0402_25V6K~D VEDID_VDD_3V3 E_CH3N_LV / TTL_D11 / GPIO_49
E_CH3P_LV / TTL_D10 / GPIO_48 12
M24C02-WMN6TP_SO8 15,17,40,41,44 EC_SMB_DA2 EC_SMB_DA2 71 A_I2C_SDA
(EEPROM) 15,17,40,41,44 EC_SMB_CK2 EC_SMB_CK2
HDMI_SW_DAT R1698 1
72 A_I2C_SCL
43 HDMI_SW_DAT 2 22_0402_5% HDMI_DAT 73 D1_I2C_SDA / GPIO_28
43 HDMI_SW_CLK HDMI_SW_CLK R1699 1 2 22_0402_5% HDMI_CLK 74 3 HDMI_IN_BKL_EN HDMI_IN_BKL_EN 24
D1_I2C_SCL / GPIO_29 PBIAS / TTL_D9 / GPO_4 HDMI_IN_ENVDD EDID_WP
44 D2_I2C_SDA / GPIO_24 PPOWER / TTL_D8 / GPO_3 2 HDMI_IN_ENVDD 24
45 D2_I2C_SCL / GPIO_25

1
R1687 C
111 1 BS_OCM_BOOT_SEL 1 2 2 Q261
+3VS GPIO_44 / S_I2C_SCL GPO_2 / TTL_D7 / PWM2(BS_OCM_BOOT_SEL) B MMST3904-7-F_SOT323~D
112 GPIO_43 / S_I2C_SDA STI_TM1 / PWM1 / TTL_D6 / GPO_1 127
@ C2040 0.1U_0402_25V6K~D 126 HDMI_IN_PWM 22_0402_5% E
HDMI_IN_PWM 24

3
GPO_0 / PWM0 / TTL_D5(BS_OSC_SEL) BS_I2C_DEV_ID2
1 2 TTL_D4 / GPIO_21(BS_I2C_DEV_ID2) 124
48 123 BS_I2C_DEV_ID1 @ R1641 1 2 0_0402_5%~D BS_OSC_SEL
XTALIN +1.2VS_AVDD DPRX_AUXN TTL_D3 / GPIO_20(BS_I2C_DEV_ID1) BS_I2C_DEV_ID0
49 122
XTALOUT @ U635 53
DPRX_AUXP TTL_D2 / GPIO_19(BS_I2C_DEV_ID0)
121 HDMI_IN_NV_CLK @ R1880 2 1 0_0402_5%
DPRX_ML_L0P TTL_D1 / GPIO18 / M_I2C_SCL HDMI_IN_EDID_CLK 24
3

NL17SZ17DFT2G_SOT353-5~D 54 120 HDMI_IN_NV_DAT @ R1881 2 1 0_0402_5%

DPRX_ML_L0N TTL_D0 / GPIO17 / M_I2C_SDA HDMI_IN_EDID_DAT 24
1

1 56
G

NC DPRX_ML_L1P
2

I2S_DAT/SPDIF_IN 4 2 BS_RESERVED R1636 57 @ R1645 1 2 0_0402_5%~D BS_XTAL_TCLK_SEL

R1638 O A DPRX_ML_L1N
300_0402_1% 59 DPRX_ML_L2P
P

Y5 0_0402_5%~D 60 DPRX_ML_L2N BS_EXTKEY_EN

@ 62 119
5

27MHZ_10PF_7V27000050~D DPRX_ML_L3P TTL_CKOUT / GPIO16(BS_EXTKEY_EN)

63 118 HDMI_IN_TX 27
1

DPRX_ML_L3N UART_TX / TTL_SYNC1 / GPO_7(BS_XTAL_TCLK_SEL) +3VS_DVDD

1 3 51 DPRX_REXT UART_RX / TTL_SYNC2 / GPO_6 117 HDMI_IN_RX 27
2 G1 G2 4 43 DPRX_HPD_OUT / GPO_5

1
12P_0402_50V8J~D

12P_0402_50V8J~D

HDMI_IN_RX 2 1 +5VS
1 1 5 R1784 4.7K_0402_5%~D R1674
VBUFC_RPLL
C1750

C1751

B
43 HDMI_IN_CK- HDMI_IN_CK- R1688 1 10_0402_5% HDMI_IN_SW_CK-
2 75 10K_0402_5%~D B
HDMI_IN_CK+ R1689 1 10_0402_5% HDMI_IN_SW_CK+ HDMI_RXCN
43 HDMI_IN_CK+ 2 76 HDMI_RXCP
43 HDMI_IN_D0- HDMI_IN_D0- R1690 1 10_0402_5% HDMI_IN_SW_D0-
2 78

2
2 2 HDMI_IN_D0+ R1691 1 10_0402_5% HDMI_IN_SW_D0+ HDMI_RX0N
43 HDMI_IN_D0+ 2 79 HDMI_RX0P
43 HDMI_IN_D1- HDMI_IN_D1- R1692 1 10_0402_5% HDMI_IN_SW_D1-
2 81 R1673
HDMI_IN_D1+ R1693 1 10_0402_5% HDMI_IN_SW_D1+ HDMI_RX1N R291 2 10K_0402_5%~D 33K_0402_5%
43 HDMI_IN_D1+ 2 82 HDMI_RX1P LBADC_IN4 / GPIO_35 103 1
43 HDMI_IN_D2- HDMI_IN_D2- R1694 1 10_0402_5% HDMI_IN_SW_D2-
2 84 104 HDMI_IN_CABDET 1 2
HDMI_RX2N LBADC_IN3 / GPIO_34 HDMI_IN_CAB_DET# 40,43
43 HDMI_IN_D2+ HDMI_IN_D2+ R1695 1 10_0402_5% HDMI_IN_SW_D2+
2 85 101 R293 2 1 10K_0402_5%~D
R1637 1 249_0402_1%~D HDMI_RX2P LBADC_IN2 / GPIO_33 / TTL_SYNC4 R294 2 10K_0402_5%~D
+3VS_AVDD 2 87 HDMI_REXT LBADC_IN1 / GPIO_32 / TTL_SYNC3 102 1
HDMI_IN_SW_HPD 113 1 C292
43 HDMI_IN_SW_HPD HDMI_HPD / GPIO_22 0.1U_0402_25V6K~D
114 HDMI_CEC / GPIO_23
GPIO_45 110 HDMI_TOGGLE# 40
C2039 0.1U_0402_25V6K~D 2
I2S_DAT/SPDIF_IN 1 2 BS_RESERVED 39 +3VS_DVDD +3VS_DVDD
32 I2S_DAT/SPDIF_IN BS_SPI_FUN_SEL I2S_0 (S/PDIF) / GPO_12(BS_RESERVED)
40 I2S_AUMCLK / GPO_13(BS_SPI_FUN_SEL)
BS_I2C_SRC_SEL 41 7
I2S_WS / GPO_14(BS_I2C_SRC_SEL) VSSA_33

0.1U_0402_25V6K~D
BS_I2C_ON_SPI_EN 42 I2S_SCLK / GPO_15(BS_I2C_ON_SPI_EN)

1
02/20-108

2
C1811
34 @ R1786 1
LVVSS
16Kbit
HDMI_SPI_CS# 65 22 4.7K_0402_5%~D
SPI_CSn / IRQ_IN / GPO_8 LVVSS

4.7K_0402_5%~D
R1785

4.7K_0402_5%~D
R1787
BS_INTERFACE_SEL1 @ R1650 1 2 0_0402_5%~D HDMI_SPI_CLK 66
BS_INTERFACE_SEL0 @ R1651 SPI_CLK / GPO_9(BS_INTERFACE_SEL1)
1 2 0_0402_5%~D HDMI_SPI_SO 67 115
NVRAM

2
BS_UART_FUNCTION_SEL @ R1652 HDMI_SPI_SI SPI_DI / GPO_10(BS_INTERFACE_SEL0) CRVSS 2
1 2 0_0402_5%~D 68 107

1
SPI_DO / GPO_11(BS_UART_FUNCTION_SEL) CRVSS
CRVSS 69
47 37 U614
DPRX_VSSD CRVSS
55 DPRX_VSSA 1 E0 VCC 8
61 DPRX_VSSA 2 E1 WC 7
+3VS_DVDD +3VS_DVDD 97 3 6 R1788 1 2 22_0402_5% HDMI_IN_NV_CLK
ADC_VSSA E2 SCL R1789 1
77 HDMI_VSSA ADC_VSSA 94 4 VSS SDA 5 2 22_0402_5% HDMI_IN_NV_DAT
1

C314 83 91
HDMI_VSSA ADC_VSSA
2Mbit
2 1 89 M24C16-WMN6TP_SO8
ADC_VSSD
R444
(EEPROM)
1

10K_0402_5%~D 0.1U_0402_25V6K~D STDP6038-AC_PQFP128_20X14~D

SPI ROM
A A
R85
2

R439 10K_0402_5%~D
15_0402_5% U609
HDMI_SPI_CS# 2 1 HDMI_SPI_CS#_R 1 8
2

HDMI_SPI_SO 1 S# VCC
2 HDMI_SPI_SO_R 2 7 R420 15_0402_5%

R275
HDMI_SPI_W# 3
Q
W#
RESET#
C 6 HDMI_SPI_CLK_R
HDMI_SPI_SI_R
1 2 HDMI_SPI_CLK
HDMI_SPI_SI
DELL CONFIDENTIAL/PROPRIETARY
4 VSS D 5 1 2
15_0402_5%
M25PE20-VMN6TP_SO8N8
R445 15_0402_5%
Compal Electronics, Inc.
(Flash ROM) @ R419 @ C507 PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
Title
1 2 1 2
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC M/B LA-8321
15_0402_5% 15P_0402_50V8J~D NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
4019H5
Date: Wednesday, August 01, 2012 Sheet 30 of 66
5 4 3 2 1
 5 4 3 2 1

UL1
Atheros
CL5 1 0.1U_0402_25V6K~D PCIE_PRX_DTX_P1_C LAN_MDIP0 RL4 49.9_0402_1% +LAN0 CL6 1000P_0402_50V7K~D
17 PCIE_PRX_DTX_P1 2 30 TX_P AR8151-BL1A TRXP0 11
LAN_MDIN0 RL1
2 1
49.9_0402_1% CL1
1 2
0.1U_0402_25V6K~D
TRXN0 12 2 1 1 2
CL7 2 1 0.1U_0402_25V6K~D PCIE_PRX_DTX_N1_C 29 14 LAN_MDIP1 RL5 2 1 49.9_0402_1% +LAN1 CL8 1 2 1000P_0402_50V7K~D
17 PCIE_PRX_DTX_N1 TX_N TRXP1 LAN_MDIN1 RL2 49.9_0402_1% CL2 0.1U_0402_25V6K~D
TRXN1 15 2 1 1 2
17 PCIE_PTX_DRX_P1 PCIE_PTX_DRX_P1 35 17 LAN_MDIP2 RL6 2 1 49.9_0402_1% +LAN2 CL9 1 2 1000P_0402_50V7K~D
RX_P TRXP2 LAN_MDIN2 RL8 49.9_0402_1% CL3 0.1U_0402_25V6K~D
TRXN2 18 2 1 1 2
17 PCIE_PTX_DRX_N1 PCIE_PTX_DRX_N1 36 20 LAN_MDIP3 RL9 2 1 49.9_0402_1% +LAN3 CL10 1 2 1000P_0402_50V7K~D
RX_N TRXP3 LAN_MDIN3 RL10 49.9_0402_1% CL4 0.1U_0402_25V6K~D +LAN_IO
TRXN3 21 2 1 1 2
17 CLK_PCIE_LAN CLK_PCIE_LAN 33 REFCLK_P PLT_RST# @RL11
@ RL11 1
close to Lan chip 1000p reserved for EMI 2 4.7K_0402_5%~D
17 CLK_PCIE_LAN# CLK_PCIE_LAN# 32
D REFCLK_N +AVDDL PCIE_WAKE# @RL13
@ RL13 1 D
AVDDL 13 2 4.7K_0402_5%~D
@ RL15 1 2 0_0402_5%~D CLKREQ_LAN#_R 4 19
17 LANCLK_REQ# CLKREQ# AVDDL CLKREQ_LAN#_R @RL14
@ RL14 1
AVDDL 31 2 4.7K_0402_5%~D
5,16,19,35,40,43 PLT_RST# PLT_RST# 2 34
PERST# AVDDL
AVDDL_REG 6
PCIE_WAKE# 3
18,35,40,43 PCIE_WAKE# WAKE#
16 +AVDDH W=40mils
AVDDH
25 SMCLK AVDDH 22 W=20mils
26 SMDATA AVDDH_REG 9
LL1
28 +LX 1 2 +VDDCT +DVDDL
NC

1000P_0402_50V7K~D

10U_0603_6.3V6M~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D
27 24 +DVDDL 2.2UH_1225AS-H-2R2M-P2_1.3A_20%
TESTMODE DVDDL

1U_0603_25V6-K~D
41 GND DVDDL_REG 37

LAN_X1
W=40mils 1 1 1 1 1 1 1
LAN_X2_R
7 XTLO W=40mils CL11 CL12 CL13 CL14 CL15 CL16 CL17
8 XTLI VDD33 1 +LAN_IO
2 2 2 2 2 2 2
40 +LX
LX
2

RL17 LAN_ACTIVITY# VDDCT 5 +VDDCT close to Lan pin40

38 LED_0
0_0402_5%~D LAN_LINK10# 39 10 +RBIAS 1 RL16 2
LAN_LINK100# LED_1 RBIAS 2.37K_0402_1%
YL1 25MHZ_12PF_7V25000012 @ 23 LED_2 close to Lan pin5
2

close to Lan pin37 close to Lan pin24

1

5.1K_0402_1%~D
RL26

1 3 LAN_X2 AR8151-BL1A-R_QFN40_5X5
1 3
GND GND
1

2 4
1 1
C CL18 CL19 C
18P_0402_50V8J~D
2 18P_0402_50V8J~D 2 W=20mils W=20mils
close to Lan pin19
W=40mils W=40mils close to Lan pin9 close to Lan pin16 close to Lan pin6 close to Lan pin31
+3VALW +AVDDH +AVDDL

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D
1U_0603_25V6-K~D

1U_0603_25V6-K~D
+LAN_IO
D

6 1A 1 1 1 1 1 1 1 1 1 1
S

1 5 4

1000P_0402_50V7K~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D
0.1U_0402_25V6K~D
CL20 2 CL21 CL22 CL23 CL24 CL25 CL26 CL27 CL28 CL29 CL30

1U_0603_25V6-K~D
1U_0402_6.3V6K~D 1 QL1
SI3456DDV-T1-GE3_TSOP6~D 2 2 2 2 2 2 2 2 2 2
G

+3VALW B+_BIAS 2
1 1 1 1 1
3

CL31 CL32 CL33 CL34 CL35

1

2 2 2 2 2
R1904 RL19 close to Lan pin22
10K_0402_5%~D 300K_0402_5%~D close to Lan pin34 close to Lan pin13
0.1U_0402_25V6K~D
2

EN_WOL close to Pin 1

D
1

1.5M_0402_5%~D

1
40 EN_WOL# 2 QL2 CL36
G SSM3K7002FU_SC70-3~D RL20
S
3

2 JLAN
1

13 Yellow LED-
B LAN_ACTIVITY# LAN_ACTIVITY#_R B
1 2 12 Yellow LED+
R1790 510_0402_5%
RJ45_MDI3- 8 PR4-
1
RJ45_MDI3+ 7
C1812 PR4+
470P_0402_50V7K~D RJ45_MDI1- 6
2 PR2-
TS1 RL22 RJ45_MDI2- 5
+VDDCT +VDDCT_L RJ45_CT3 PR3-
2 1 1 TCT1 MCT1 24 1 2
LAN_MDIP3 2 23 RJ45_MDI3+ 75_0402_1% RJ45_MDI2+ 4
LL2 LAN_MDIN3 TD1+ MX1+ RJ45_MDI3- RL23 PR3+
3 TD1- MX1- 22
BLM18AG601SN1D_2P 4 21 RJ45_CT2 1 2 RJ45_MDI1+ 3
LAN_MDIP2 TCT2 MCT2 RJ45_MDI2+ 75_0402_1% PR2+
5 TD2+ MX2+ 20
LAN_MDIN2 6 19 RJ45_MDI2- RL24 RJ45_MDI0- 2 15
TD2- MX2- RJ45_CT1 PR1- SHLD2
7 TCT3 MCT3 18 1 2
LAN_MDIP1 8 17 RJ45_MDI1+ 75_0402_1% RJ45_MDI0+ 1 14
LAN_MDIN1 TD3+ MX3+ RJ45_MDI1- RL25 PR1+ SHLD1
9 TD3- MX3- 16
10 15 RJ45_CT0 1 2 LAN_LINK10# RL27 1 2 120_0402_5%~D LAN_LINK10#_R 10
LAN_MDIP0 TCT4 MCT4 RJ45_MDI0+ 75_0402_1% Green LED-
11 TD4+ MX4+ 14
LAN_MDIN0 12 13 RJ45_MDI0- +LAN_IO @RL21
@ RL21 1 2 0_0402_5%~D +LAN_LED_VCC1 9
TD4- MX4- LED+
350uH_GSL5009-1 LF 02/24-113 LAN_LINK100# RL28 1 2 300_0402_5%~D LAN_LINK100#_R 11 ORANGE_LED-
TAIMAG: SP050004Q10 TYCO_2041333-1~D
1

BOTHHAND: SP050003T10 CONN@

CL39
150P_1808_3KV8J Dell LED spec: CIS link OK
2

10 Mbps: Green
100 Mbps: Orange
1000P_0402_50V7K~D

1000P_0402_50V7K~D

1000P_0402_50V7K~D

1000P_0402_50V7K~D
1U_0603_25V6-K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

A A
1000 Mbps: Yellow
CL40

CL41

CL42

CL43

CL44

CL45

CL46

CL47

CL48

1 2 1 2 1 2 1 2 1

close to LL2
2
@
1 2
@
1 2
@
1 2
@
1 2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
close to TS1 BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC M/B LA-8321
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
4019H5
Date: Wednesday, August 01, 2012 Sheet 31 of 66
5 4 3 2 1
 5 4 3 2 1

Reserve for pop noise

+3.3V_MUTE
02/16-104 +3VS 02/21-110 +3.3V_AVDD
+3VS @ RA26 1 2 0_0402_5%~D @ RA25 1 2 0_0402_5%~D
+1.2VS +3.3V_AVDD +3.3V_AVDD
R1217 1 2 10K_0402_5%~D EAPD# U11 02/21-110 R1750 1 2 0_0805_5%~D @ C2041 2 1 0.1U_0402_25V6K~D @ RA27 1 2 0_0402_5%~D +3VALW
9 DVDD_1 AVDD 38
@ R1218 1 2 10K_0402_5%~D 20 DVDD_2 PORTA_VDD 29
02/21-112
48 DVDD_3 PORTD_VDD 34
1 2 2 1
SLEEVE
02/24-115

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D
15 10 +VDD_SW C334
FBDC VDD_SW_1 C150 C151 C154 @ R1879 +RTCVCC
VDD_SW_2 11 1 2 0_0402_5%~D
+DVDD_IO 54 16 +VDDQ_SW 10U_0603_6.3V6M~D
DVDD_IO VDDQ_SW 2 1 1 2
02/21-110 +DVDD_HDAIO 6 DVDD_HDAIO
L3 @ R1883 1 2 0_0402_5%~D

1
12 1 2

2N7002DW-7-F_SOT363-6
SWOUT +1.2VS +3.3V_AVDD
D +VDDQ_PLL 19 4.7UH_LQM2MPN4R7MG0 _20% @ R2599 1 2 0_0402_5%~D D
VDDQ_PLL RA28
2

3
28 HP1_A_L 100K_0402_5%~D
PORTA_L HP1_A_R C12 QA1B
16 HDA_BITCLK_AUDIO 5 26

2
HDA_BCLK PORTA_R

1
16
16
HDA_SDIN0
HDA_SDOUT_AUDIO
1
R251
2 HDA_SDIN0_AUDIO
33_0402_5%~D
7
4
HDA_SDI
HDA_SDO
PORTA_S
PORTA_VCOM
24
27 02/24-114 1
47U_0805_6.3V6M~D C1845 1 2 0.1U_0603_50V7K~D
5
3 C1846 1 2 0.1U_0603_50V7K~D RA29

2N7002DW-7-F_SOT363-6
16 HDA_SYNC_AUDIO HDA_SYNC
16 HDA_RST_AUDIO# 2 44 LINEIN_L 10K_0402_5%~D

4
HDA_RSTN PORTB_L
43 LINEIN_R
02/29-116 C1873 1 2 0.1U_0603_50V7K~D

2
PORTB_R

6
SENSE_A 47 45 C_MIC1_L MIC1_R 1 2 MIC1 C1870 1 2 0.1U_0603_50V7K~D QA1A
R268 1 SENSE_A PORTC_L C_MIC1_R
2 10K_0402_5%~D 37 SENSE_B PORTC_R 46 C2042 1U_0603_16V6K~D
R10 2 1 20K_0402_5%~D 36 C1844 1 2 0.1U_0603_50V7K~D 2
SENSE_I HP2_D_L
PORTD_L 33
31 HP2_D_R

1
MICBIAS_B PORTD_R +3.3V_AVDD
42 MIC_BIASB PORTD_S 35
02/20-108 MICBIAS_C 41 MIC_BIASC PORTD_VCOM 32

1
23 SPK_CD_L SPK_CD_L 33
@ RA13 1 PORTG_L SPK_CD_R
25 DMIC_CLK 2 0_0402_5%~D 55 DMIC_MCLK / MPIO1 PORTG_R 22 SPK_CD_R 33 R9 @
25 DMIC0 @ R1243 1 2 0_0402_5%~D 51 DMIC_DATA0 / MPIO3
56 SPDIF_OUT
5.11K_0402_1%
02/24-114
30 I2S_DAT/SPDIF_IN 50
SPDIF OUT0 / MPIO2
inveter schematics

2
SPDIF IN / MPIO4 +3VS +VDDQ_SW
@ C345 15P_0402_50V8J~D

@ C347 15P_0402_50V8J~D

VREF_FILT 40 L103
DET_TRI 1 2 53 2 2
@ R2585 0_0402_5%~D PCBEEP / MPIO5 R152 2
1 1 VSS_SW_1 13 1 2 1 10K_0402_5%~D MIC_PRESENT#

0.1U_0402_25V6K~D
EAPD# 52 14 C122 C152 BLM15AG121SN1D_2P~D
40 EAPD# EAPD / MPIO0 VSS_SW_2 SENSE_A
VSSQ_SW 17 100U_1206_6.3V6M 0.1U_0402_25V6K~D
1 1
1 DVSS_1 1
2 2 C147
8 DVSS_2 AVSS 39

1
39.2K_0402_1%

20K_0402_1%~D
21 25 +3.3V_AVDD +3.3V_AVDD
DVSS_3 PORTA_VSS
closed to Pin 16

R147
R150

R1748
49 DVSS_4 PORTD_VSS 30
2

100K_0402_5%~D

100K_0402_5%~D
18 VSSQ_PLL 02/21-110 5.1K_0402_5% +3.3V_AVDD

1
Thermal PAD 57

R146

100K_0402_5%~D
02/21-112

1
C C

R149
MALCOLM-EX_QFN56_7X7~D

R1696
2

2
@ RA24
+3VS +DVDD_IO +3VS +DVDD_HDAIO +3VS +VDDQ_PLL +3VS +VDD_SW

2N7002E-T1-E3_SOT23-3
L102 1 2 D D

2
6

3
+1.2VS R1745 R1751 R1752
1 2 1 2 1 2 1 2 0_0402_5%~D QU4 HP1_JD 2 5 LINEIN_JD
D

1
G G

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D
BLM15AG121SN1D_2P~D
PORRT:A PORRT:B

10U_0603_6.3V6M~D
2 2 2 0_0402_5%~D 0_0402_5%~D 0_0402_5%~D JACK_PLUG 2
G S S
1 1 1 1 1 PORRT:D

4
C139 C141 C142 C145 C153 C146 C336 C143 S Q288A Q288B

3
0.1U_0402_25V6K~D 0.1U_0402_25V6K~D 0.1U_0402_25V6K~D DMN66D0LDW-7 DMN66D0LDW-7
1 1 1
closed to Pin 54 2
closed to Pin 6 2
closed to Pin 19 2
closed to Pin 10,11 2 2

S1: PORTA    Front L/R + HP1 S3: PORTB    Rear L/R + Line In + Mic PCBEEP

D
JHP1 CONN@ MICBIAS_B 3 1

R1727
02/29-116

2.2K_0402_5%~D
Front 6 1

1
1 QU7 C1601 1 2 BEEP_C# 1 R145 2 PC_BEEP PC_BEEP 33
40 BEEP#
HP1_A_L 1 2 C123 HP1_A_L_R @ RA14 1 2 0_0402_5%~D HP1_A_L1_JK 0.1U_0402_10V6K~D C148 0.1U_0402_16V4Z~D 100K_0402_5%~D
+

G
2 AO3413_SOT23-3

2
220U_B_4VM_R35M

2
2
HP1_A_R 1 2 C129 HP1_A_R_R @ RA15 1 2 0_0402_5%~D HP1_A_R1_JK
02/24-115 JMIC CONN@ PCH_SPKR_C R144 2
+

3 16 HDA_SPKR 1 2 1
220U_B_4VM_R35M HP1_JD C149 0.1U_0402_16V4Z~D 100K_0402_5%~D
4
Front 6

2
RC107

RC114

G 7 1 R143 @
5 G 8 LINEIN_L 1 2 C11 LINEIN_L_R @ RA16 1 2 0_0402_5%~D LINEIN_L_L1 2 10K_0402_5%~D
2.2U_0805_25V6K~D

1
02/24-115 TYCO_2041187-1~D LINEIN_R 1 2 C14 LINEIN_R_R @ RA17 1 2 0_0402_5%~D LINEIN_R_L1 3
1

2.2U_0805_25V6K~D LINEIN_JD
normal close type 4
G 7
B U631 U632 5 G 8 B
1K_0402_5%~D

1K_0402_5%~D

HP1_A_L_R @ RA20 1 2 0_0402_5%~D A1 LINEIN_L_R @ RA31 1 2 0_0402_5%~D A1 TYCO_2041187-1~D

2

INL INL
normal close type

1
24.9K_0402_1%
R2540

24.9K_0402_1%
R2550
HP1_A_R_R @ RA21 1 2 0_0402_5%~D A3 LINEIN_R_R @ RA30 1 2 0_0402_5%~D A3
40 DEPOP#
DEPOP# B1
INR
/MUTE +3.3V_MUTE
DEPOP# B1
INR
/MUTE +3.3V_MUTE SPDIF SPDIF OUT JACK
JSPDIF CONN@
Place close to Jack B2 B2 9 G

2
VDD VDD
3 HP1_A_L1_JK
2 1 B3 SET 2 1 B3 SET Place close to Jack 6
1
GND

GND
1 C1872 C1874 3 LINEIN_R_L1 4
2 HP1_A_R1_JK 0.1U_0402_16V4Z~D 0.1U_0402_16V4Z~D 1
Setting the Turn-Off Time: MAX9892ERT+T_UCSP6~D 2 LINEIN_L_L1 40 SPDIF_DET# 5
A2

A2
@ D18 MAX9892ERT+T_UCSP6~D
PJDLC05C_SOT23-3 Ton (ms) = 0.02 x Cset (pF)
Setting the Turn-Off Time: @ D16 7
PJDLC05C_SOT23-3 SPDIF_OUT
Ton (ms) = 0.02 x Cset (pF) 8
+5VS 3
10 G

100P_0402_50V8J~D
S2: PORTD+C    Ctr/LFE + HP2 + Mic* 2

0.1U_0402_16V4Z~D
1 2
JACK_PLUG JHP2 @ TYCO_1775792-1
QU6

C744

C738
SLEEVE
D R2653 Front 4
1

AO3413_SOT23-3 C132 220U_B_4VM_R35M L_MIC1

QU8 JACK_PLUG# HP2_D_R 1 HP2_D_R1_R @ RA19 1 2 0_0402_5%~D HP2_D_R1_JK
3
2 1 normal open type
+ +

2 2 1 +3.3V_AVDD 2 2
MICBIAS_C 2N7002E-T1-E3_SOT23-3 G HP2_D_L 1 HP2_D_L1_R @ RA18 1 0_0402_5%~D HP2_D_L1_JK
D

1 3 2 2 1
S 100K_0402_5%~D
3
2.2K_0402_5%~D
R3

C133 220U_B_4VM_R35M JACK_PLUG# 5

1

02/24-115 02/24-115 G 7
G
2

+3.3V_AVDD RC109

RC115
6 G 8

C745

C746
02/24-115
1

1
UA3 U629 MAX9892ERT+T_UCSP6~D 1 1 SINGA_2SJ3062-000111F
02/29-116 13 9 @ RA12 1 2 0_0402_5%~D HP2_D_L1_JK CONN@
2

VDD TIP_SENSE DET_TRI 2 JACK_PLUG HP2_D_L1_R @ RA22 1 2 0_0402_5%~D

A
16 VDD DET_TRIGGER 5
@ R1244
1
0_0402_5%~D
A1 INL normal open type 1
3 A
2 2
1K_0402_5%~D

1K_0402_5%~D

100P_0402_50V8J~D

100P_0402_50V8J~D
44 VPK_SMB_CK1 1 14 L_MIC1 HP2_D_R1_R @ RA23 1 2 0_0402_5%~D A3 2 SPDIF_OUT
2

SCL RING2_SENSE DEPOP# @ R1245 1 INR

44 VPK_SMB_DA1 2 SDA RING2 7 2 0_0402_5%~D B1 /MUTE
D29
4 +3.3V_MUTE PJDLC05C_SOT23-3
ADDR_SEL SLEEVE @
SLEEVE_SENSE 15
MIC_PRESENT# 8 6 1 B2
MIC1 MIC_PRESENT SLEEVE VDD
11 MIC_P GND 17 2 1 B3 SET
12 3 C335
GND

MIC_N GND
24.9K_0402_1%
R8

GND 10 10U_0603_6.3V6M~D C1871

Compal Electronics, Inc.
1

2 0.1U_0402_16V4Z~D
@ TS3A225ERTER_PWQFN16_3X3 Setting the Turn-Off Place close to Jack Title
A2

HP2_D_L1_JK
Time:
1
3
SCHEMATIC M/B LA-8321
Ton (ms) = 0.02 x Cset
Combo JACK Mic. switch 2 HP2_D_R1_JK Size Document Number Rev
2

(pF) 4019H5 B
@ D17 PJDLC05C_SOT23-3
Date: Wednesday, August 01, 2012 Sheet 32 of 66
5 4 3 2 1
 5 4 3 2 1

U21 L67
+AMP_VDD BLM18PG181SN1_0603~D
27 1 AMP_SPKL- 1 2 AMP_SPK_JK_L-
B+ +AMP_VDD PVDD1 OUTL-1

D74 D75 C2036

2 2 2 1 1
30 PVDD2 OUTL-2 2 1
C931
SPK Board CONN
2 1 2 1 1 C901 C902 C903 C904 C905 330P_0402_50V7K~D
2
22U_1210_25V6K~D 22U_1210_25V6K~D 22U_1210_25V6K~D 0.1U_0603_50V7K~D 0.1U_0603_50V7K~D
each one is 4 ohm/2.5W

CAP 220U 25V

SS1040_SOD123-2 SS1040_SOD123-2 + 1 1 1 2 2
28 PGND2
29 PGND1
C2035 1 2 10U_0805_25V6K~D
2 L68 JSPK
L85
BLM18PG181SN1_0603~D AMP_SPK_JK_L- 1
R928 AMP_SPKL+ 1 AMP_SPKL+_L AMP_SPK_JK_L+ AMP_SPK_JK_L+ 1
OUTL+1 31 2 1 2 2 2
@ SPK_CD_L2 1 2 SPKER_CD_L2_FBL 32 1 22UH_LQH55PN220MR0L_0.85A_20%~D AMP_SPK_JK_R- 3 5
OUTL+2 AMP_SPK_JK_R+ 3 G5
D 4 4 G6 6 D
16.2K_0402_1%~D R926 C918
1 2 5 330P_0402_50V7K~D MOLEX_53398-0471~D
FB_L 2 CONN@
C919 182K_0402_1%~D
R939 2200P_0402_50V7K~D C917

2
32 SPK_CD_L SPK_CD_L 1 2 SPK_CD_L1 1 2 1 2 SPK_CD_L3 1 2 SPK_CD_L4 6 IN_L

PJSOT24CH_SOT23-3
@ D21

PJSOT24CH_SOT23-3
@ D22
C921 1U_0603_25V6-K~D 20.5K_0402_1%~D 7
0.022U_0402_25V7K~D NC1
1 2 NC2 8
R930 R935 17.8K_0402_1%~D 17
PC_BEEP PC_BEEP_1 NC3
32 PC_BEEP 1 2 1 2
C920 0.1U_0402_25V6K~D 182K_0402_1%~D R924

1
SPK_CD_R2 1 2SPK_CD_R2_FBL
R938
16.2K_0402_1%~D 1 2 19 FB_R L69
C916 182K_0402_1%~D L86
R929 2200P_0402_50V7K~D C930 BLM18PG181SN1_0603~D
32 SPK_CD_R SPK_CD_R 1 2 SPK_CD_R1 1 2 1 2 SPK_CD_R3 1 2 SPK_CD_R4 18 25 AMP_SPKR+ 1 2 AMP_SPKR+_R 1 2 AMP_SPK_JK_R+
C929 IN_R OUTR+1 22UH_LQH55PN220MR0L_0.85A_20%~D
1U_0603_25V6-K~D 20.5K_0402_1%~D 26 1
0.022U_0402_25V7K~D OUTR+2
1 2
R927 R934 17.8K_0402_1%~D C925
PC_BEEP 1 2 PC_BEEP_2 1 2 10 330P_0402_50V7K~D
C922 0.1U_0402_25V6K~D EC_MUTE# SHDN# 2
182K_0402_1%~D 11 REGEN
SPK_AMP_MUTE_R# 9 MUTE#
+3VS
For filterless modualation/spread-spectrum mode L70
High Pass Filter with -3dB = 500Hz @ R940 1 2 0_0402_5%~D 20 MODE
23 AMP_SPKR- 1
BLM18PG181SN1_0603~D
2 AMP_SPK_JK_R-
OUTR-1
pass band gain = 16dB Mono Select. Set MONO high for mono mode. 4 MONO OUTR-2 24
+AMP_VDD
1

16 C928
VS C932 330P_0402_50V7K~D
D59 Internal Regulator Output. 2
15 REG BOOT 3 2 1
1 2 Internal 2V Bias. 12
C COM 1U_0603_25V6-K~D C

40 EC_MUTE# EC_MUTE# SDMK0340L-7-F_SOD323-2~D SPK_AMP_MUTE_R# 21 33

C1N EP
1

1U_0603_25V6-K~D

1U_0603_25V6-K~D

1U_0603_25V6-K~D
1 2 1 1 1 C924
2 0.1U_0603_50V7K~D

C923

C927

C926
R1567
200_0402_1% C1553 2
22 C1P
2 2 2
2.2U_0603_10V7K~D
1
13 AGND
14 AGND
MAX9736AETJ+T_TQFN32_7X7

U16
+AMP_VDD L95
27 PVDD1 OUTL-1 1 AMP_SW- 1
L87
2 AMP_SW_JK- 1 2 SUB WOOFER amp
22UH_LQH55PN220MR0L_0.85A_20%~D
2 2 2 1 1
30 PVDD2 OUTL-2 2 BLM18PG181SN1_0603~D 1
4 ohm/5W
C1088
C1089 C1090 C1091 C1092 C1093 330P_0402_50V7K~D JWFER
22U_1210_25V6K~D 22U_1210_25V6K~D 22U_1210_25V6K~D 0.1U_0603_50V7K~D 0.1U_0603_50V7K~D 2
1 1
1 1 1 2 2
28 PGND2 2 2
29 PGND1
3 G
L96 4 G
R1194 L88
SUB_FB_L2 1 2 SUB_FB_L4 31 AMP_SW+ 1 2 AMP_SW_JK+ 1 2 MOLEX_53398-0271~D
OUTL+1 22UH_LQH55PN220MR0L_0.85A_20%~D CONN@
OUTL+2 32 BLM18PG181SN1_0603~D 1
11.5K_0402_1%

B SUB_FB_L
C1095
1 2 SUB_FB_L1 1
R1195
2
C1096
2 1 SUB_FB_L3
C1097
2 1 1
R1196
2
100K_0402_1%~D
5 FB_L 2
C1094
330P_0402_50V7K~D CIS link OK B

14K_0402_1%~D
2

1U_0603_25V6-K~D 0.1U_0402_25V6K~D 0.047U_0402_16V7K~D

SUB_IN_L 6
R1197 IN_L
NC1 7
20K_0402_1%~D 8
NC2
17
1

NC3
R1198
1 2 SUB_FB_L
R1199 6.49K_0402_1%~D
9.09K_0402_1%~D R1200
32 SPK_CD_R SPK_CD_R 1 2 SUB_CD_R 1 2 SUB_CD_R1 1 2 SUB_CD_R2 1 2 19
C1098 0.47U_0603_10V7K~D C1099 0.01U_0402_16V7K~D FB_R
2 15.8K_0402_1%~D

32 SPK_CD_L SPK_CD_L 1 2 SUB_CD_L 1 2 C1101 SUB_IN_R 18 25 AMP_SW+

C1100 0.47U_0603_10V7K~D IN_R OUTR+1
0.1U_0402_25V6K~D OUTR+2 26
R1201 1
9.09K_0402_1%~D
10 SHDN#
EC_MUTE# 11
SUB_AMP_MUTE_R# REGEN
9 MUTE#
For filterless modualation/spread-spectrum mode
+3VS

@ R2520 1 2 0_0402_5%~D 20 MODE AMP_SW-

OUTR-1 23
Band Pass Filter at 80Hz to 500Hz 4 MONO OUTR-2 24
+AMP_VDD
pass band gain = 16dB 16 VS C1102
Internal Regulator Output. 15 3 2 1
Internal 2V Bias. REG BOOT
12 COM 1U_0603_25V6-K~D
A @ D60 21 33 A
C1N EP
1 2 1
1U_0603_25V6-K~D

1U_0603_25V6-K~D
1U_0603_25V6-K~D

1 1 1 C1103
EC_MUTE# SDMK0340L-7-F_SOD323-2~D SUB_AMP_MUTE_R# 0.1U_0603_50V7K~D
C1105
C1104

C1106

@ R1568 2
1 2 0_0402_5%~D 22 C1P
2 2 2
2
@ C1558 13 AGND
02/20-108 1
2.2U_0603_10V7K~D 14 AGND Compal Electronics, Inc.
MAX9736AETJ+T_TQFN32_7X7 Title
SCHEMATIC M/B LA-8321
Size Document Number Rev
B
4019H5
Date: Wednesday, August 01, 2012 Sheet 33 of 66
5 4 3 2 1
 A B C D E

+3VS Free Fall Sensor SATA ODD Conn. +5VS_ODD

mSATA CONN +1.5VS 1 1
JP2

0.1U_0402_25V6K~D

10U_0805_25V6K~D
2 2

1000P_0402_50V7K~D
CS10

0.1U_0402_25V6K~D
CS11

1U_0402_6.3V6K~D
CS12

10U_0805_25V6K~D
CS13
3 3 1 1 1 1
17 mSATA_DET# 4 4 1 1

C820

C821
+3VS 5 5
6 6 2 2 2 2
7 7
PCH_SMBCLK 2 2
5,10,11,12,13,16,17,35,43 PCH_SMBCLK 8 8
PCH_SMBDATA 9 U41 JODD
5,10,11,12,13,16,17,35,43 PCH_SMBDATA 9
1
10
11
10 LNG3DM 10 ODD_DETECT# : High Active 1
2
1 1
CS50 11 RES 2
16 SATA_PRX_DTX_P5 1 2 0.01U_0402_16V7K~D SATA_PRX_DTX_P5_C 12 12 1 VDD_IO RES 13 3 3
16 SATA_PRX_DTX_N5 CS47 1 2 0.01U_0402_16V7K~D SATA_PRX_DTX_N5_C 13 14 15 PAD~D T212@ T212NET 4
13 VDD RES @ RS10 1 4
14 14 RES 16 19 ODD_DA# 2 0_0402_5%~D ODD_DA#_R 5 5
CS49 1 2 0.01U_0402_16V7K~D SATA_PTX_DRX_N5_C 15 FFS_INT1 11 @ RS9 1 2 0_0402_5%~D ODD_DETECT#_R 6
16 SATA_PTX_DRX_N5 15 19 FFS_INT1 INT 1 16,20 ODD_DETECT# 6
CS48 1 2 0.01U_0402_16V7K~D SATA_PTX_DRX_P5_C 16 FFS_INT2 9 5 7
16 SATA_PTX_DRX_P5 16 20 FFS_INT2 INT 2 GND 7
17 17 GND 12 8 8
18 7 CS17 1 2 0.01U_0402_16V7K~DSATA_PRX_DTX_P2_C 9
+1.5VS +3VS 18 PCH_SMBDATA SDO/SA0 16 SATA_PRX_DTX_P2 CS16 1 9
+3VS 19 19 6 SDA / SDI / SDO 16 SATA_PRX_DTX_N2 2 0.01U_0402_16V7K~DSATA_PRX_DTX_N2_C 10 10
20 PCH_SMBCLK 4 11
20 SCL/SPC CS15 1 11
21 G1 NC 2 16 SATA_PTX_DRX_N2 2 0.01U_0402_16V7K~DSATA_PTX_DRX_N2_C 12 12
1U_0402_6.3V6K~D

0.1U_0402_25V6K~D

1U_0402_6.3V6K~D

0.1U_0402_25V6K~D 22 8 3 16 SATA_PTX_DRX_P2 CS14 1 2 0.01U_0402_16V7K~DSATA_PTX_DRX_P2_C 13

G2 CS NC 13
1 1 1 1
02/16-106 23
24
G3
G4
LNG3DMTR_LGA16_3X3~D
14
15
14
15
CS32

CS33

CS34

CS35
16 16
ACES_50406-02071-001
2 2 2 2 CONN@ +3VS +5VS +5VS +5VS_ODD 17 GND
18 GND

D
6

S
1 5 4 TYCO_1-2041070-6~D

1
CS27 2 CONN@
1U_0402_6.3V6K~D 1 QS1
SATA_PTX_DRX_P0 @ RS38 1 2 0_0402_5%~D SATA_PTX_DRX_P0_CO @ CS69 1 2 0.01U_0402_16V7K~D SATA_PTX_DRX_P0_C @ R343 SI3456DDV-T1-GE3_TSOP6~D

G
SATA_PTX_DRX_N0 @ RS39 0_0402_5%~D SATA_PTX_DRX_N0_CO @ CS70 0.01U_0402_16V7K~D SATA_PTX_DRX_N0_C 100K_0402_5% 2
1 2 1 2

3
2
B+_BIAS

G
SATA_PRX_DTX_N0 @ RS40 1 2 0_0402_5%~D SATA_PRX_DTX_N0_CO @ CS71 1 2 0.01U_0402_16V7K~D SATA_PRX_DTX_N0_C

2
SATA_PRX_DTX_P0 @ RS41 1 2 0_0402_5%~D SATA_PRX_DTX_P0_CO @ CS72 1 2 0.01U_0402_16V7K~D SATA_PRX_DTX_P0_C
FFS_INT2 3 1 1 2 FFS_INT2_CONN

1
ODD_DA#_R

D
Q118 D12 RS7
SSM3K7002FU_SC70-3~D SDMK0340L-7-F_SOD323-2~D 300K_0402_5%~D
D

1
2
2 2

0.1U_0402_25V6K~D
40 ODD_EJEECT 2
ODD_EN G

1
SATA_PTX_DRX_P1 @ RS46 1 2 0_0402_5%~D SATA_PTX_DRX_P1_CO @ CS77 1 2 0.01U_0402_16V7K~D SATA_PTX_DRX_P1_C S
D

3
1

1.5M_0402_5%~D
SATA_PTX_DRX_N1 @ RS47 1 2 0_0402_5%~D SATA_PTX_DRX_N1_CO @ CS78 1 2 0.01U_0402_16V7K~D SATA_PTX_DRX_N1_C 1 QU3
SATA_PRX_DTX_N1 @ RS48 1 2 0_0402_5%~D SATA_PRX_DTX_N1_CO @ CS79 1 2 0.01U_0402_16V7K~D SATA_PRX_DTX_N1_C 20 ODD_EN# 2 CS28 RS50 2N7002E-T1-E3_SOT23-3
SATA_PRX_DTX_P1 @ RS49 1 2 0_0402_5%~D SATA_PRX_DTX_P1_CO @ CS80 1 2 0.01U_0402_16V7K~D SATA_PRX_DTX_P1_C G RS8 10K_0402_5%~D
+3VS +3VS S

2
QS2 2

1
US1 SSM3K7002FU_SC70-3~D

0.01U_0402_16V7K~D

0.1U_0402_16V4Z~D
+3VS 02/20-108 SATA_HDD0_ENABLE
SATA_HDD0_CAB_DET 18
7 EN
DD
VCC
VCC
6
10 1 1

CS53

CS52
SATA_HDD0_OOB_TEST 19 16
@ RS11 0_0402_5%~D COLAY_HDD0_REXT OL VCC COLAY_HDD0_REXT
1 2 VCC 20
@ RS12 1 2 0_0402_5%~D SATA_HDD0_ENABLE 16 SATA_PTX_DRX_P0 CS54 1 2 0.01U_0402_16V7K~D SATA_PTX_DRX_P0_R 1
@ RS13 0_0402_5%~D SATA_HDD0_PA CS51 1 HAP 2 2
1 2 16 SATA_PTX_DRX_N0 2 0.01U_0402_16V7K~D SATA_PTX_DRX_N0_R 2 HAM PA 9 SATA_HDD0_PA
@ RS14 1 2 0_0402_5%~D SATA_HDD0_PB 8 SATA_HDD0_PB
@ RS15 0_0402_5%~D SATA_HDD0_OOB_TEST CS55 1 PB
1 2 16 SATA_PRX_DTX_N0 2 0.01U_0402_16V7K~D SATA_PRX_DTX_N0_RC 4 HBM
@ RS16 1 2 0_0402_5%~D SATA_HDD0_PIN17 CS56 1 2 0.01U_0402_16V7K~D SATA_PRX_DTX_P0_RC 5 15 SATA_PTX_DRX_P0_RC
16 SATA_PRX_DTX_P0 HBP DAP
DAM 14 SATA_PTX_DRX_N0_RC Close to pin 6, 10 +5VS

@ RS17 1 2 0_0402_5%~D COLAY_HDD0_REXT

3
13
GND
11 SATA_PRX_DTX_P0_R
or pin 16, 20
HDD Redriver GND DBP

10U_0805_25V6K~D

10U_0805_25V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

1000P_0402_50V7K~D

1000P_0402_50V7K~D
@ RS18 1 2 0_0402_5%~D SATA_HDD0_CAB_DET SATA_HDD0_PIN17 17 12 SATA_PRX_DTX_N0_R
@ RS19 1 GND DBM
2 0_0402_5%~D SATA_HDD0_PIN17 21 EP 1 1 1 1 1 1 1 1
SATA HDD Conn.

CS5

CS21

CS4

CS22

CS3

CS20

CS2

CS19
MAX4951CCTPLFT_TQFN20_4X4~D
EN CAD STATUS 2 2 2 2 2 2 2 2
0 0 LowPower JHDD
1 1
1 1 LowPower 2 2
3 3
3
1 0 Active 4 4 3
5 5
1 1 LowPower 6 6
7 7
SATA_PTX_DRX_P0_RC CS6 1 2 0.01U_0402_16V7K~DSATA_PTX_DRX_P0_C 8
SATA_PTX_DRX_N0_RC CS7 8
1 2 0.01U_0402_16V7K~DSATA_PTX_DRX_N0_C 9 9
10 10
SATA_PRX_DTX_N0_R CS8 1 2 0.01U_0402_16V7K~DSATA_PRX_DTX_N0_C 11
SATA_PRX_DTX_P0_R CS9 11
1 2 0.01U_0402_16V7K~DSATA_PRX_DTX_P0_C 12 12
13 13
CS18 1 2 0.01U_0402_16V7K~DSATA_PRX_DTX_P3_C 14
16 SATA_PRX_DTX_P3 CS29 1 14
16 SATA_PRX_DTX_N3 2 0.01U_0402_16V7K~DSATA_PRX_DTX_N3_C 15 15
16 16
16 SATA_PTX_DRX_N3 CS31 1 2 0.01U_0402_16V7K~DSATA_PTX_DRX_N3_C 17
CS30 1 17
16 SATA_PTX_DRX_P3 2 0.01U_0402_16V7K~DSATA_PTX_DRX_P3_C 18 18
19 19
+3VS 20 20
21 21
FFS_INT2_CONN @ R1653 1 2 0_0402_5%~D FFS_INT2_CONN_R 22
HDD2_DETECT# 22
20 HDD2_DETECT# 23 23
24 24
+3VS +3VS SATA_PTX_DRX_P1_RC CS23 1 2 0.01U_0402_16V7K~DSATA_PTX_DRX_P1_C 25
SATA_PTX_DRX_N1_RC CS24 1 25
2 0.01U_0402_16V7K~DSATA_PTX_DRX_N1_C 26 26 G1 31
US3 27 32
27 G2

0.01U_0402_16V7K~D

0.1U_0402_16V4Z~D
+3VS 02/20-108 SATA_HDD1_ENABLE
SATA_HDD1_CAB_DET 18
7 EN
DD
VCC
VCC
6
10 1 1
SATA_PRX_DTX_N1_R
SATA_PRX_DTX_P1_R
CS25 1
CS26 1
2 0.01U_0402_16V7K~DSATA_PRX_DTX_N1_C
2 0.01U_0402_16V7K~DSATA_PRX_DTX_P1_C
28
29
28
29
G3
G4
33
34

CS64

CS66
SATA_HDD1_OOB_TEST 19 16 30
@ RS29 0_0402_5%~D COLAY_HDD1_REXT OL VCC COLAY_HDD1_REXT 30
1 2 VCC 20
@ RS30 1 2 0_0402_5%~D SATA_HDD1_ENABLE 16 SATA_PTX_DRX_P1 CS63 1 2 0.01U_0402_16V7K~D SATA_PTX_DRX_P1_R 1 ACES_50554-03001-001
@ RS31 0_0402_5%~D SATA_HDD1_PA CS65 1 HAP 2 2
1 2 16 SATA_PTX_DRX_N1 2 0.01U_0402_16V7K~D SATA_PTX_DRX_N1_R 2 HAM PA 9 SATA_HDD1_PA CONN@
@ RS32 1 2 0_0402_5%~D SATA_HDD1_PB 8 SATA_HDD1_PB
@ RS33 0_0402_5%~D SATA_HDD1_OOB_TEST CS67 1 PB
1 2 16 SATA_PRX_DTX_N1 2 0.01U_0402_16V7K~D SATA_PRX_DTX_N1_RC 4 HBM
@ RS34 1 2 0_0402_5%~D SATA_HDD1_PIN17 CS68 1 2 0.01U_0402_16V7K~D SATA_PRX_DTX_P1_RC 5 15 SATA_PTX_DRX_P1_RC
16 SATA_PRX_DTX_P1 HBP DAP
4
DAM 14 SATA_PTX_DRX_N1_RC Close to pin 6, 10 4

@ RS35 1 2 0_0402_5%~D COLAY_HDD1_REXT

3
13
GND
11 SATA_PRX_DTX_P1_R
or pin 16, 20
@ RS36 1 GND DBP
2 0_0402_5%~D SATA_HDD1_CAB_DET SATA_HDD1_PIN17 17 GND DBM 12 SATA_PRX_DTX_N1_R
@ RS37 1 2 0_0402_5%~D SATA_HDD1_PIN17 21 EP
MAX4951CCTPLFT_TQFN20_4X4~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC M/B LA-8321
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
4019H5
Date: Wednesday, August 01, 2012 Sheet 34 of 66
A B C D E
 A B C D E

+1.5VS_WLAN +3VS_WLAN

4.7U_0603_10V6K~D
CE16

0.1U_0402_25V6K~D
CE17

0.1U_0402_25V6K~D
CE18

4.7U_0603_10V6K~D
CE14

0.1U_0402_25V6K~D
CE15

0.1U_0402_25V6K~D
CE19
1 1 1 1 1 1

Wireless LAN 2 2 2 2 2 2

PJP23
1 1 2 2 +1.5VS
1 JWLAN 1
PCIE_WAKE# @ RE19 1 2 0_0402_5% 1 2 +3VS_WLAN RE17 1 2 0_1206_5% +3VS JUMP_43X118
18,31,40,43 PCIE_WAKE# COEX2 @ RE442 1 2
1 2 0_0402_5%~D 3 3 4 4
COEX1 @ RE441 1 2 0_0402_5%~D 5 6 +1.5VS_WLAN
5 6 LPC_LFRAME#_C @ RE36 0_0402_5%~D
17 MINI1CLK_REQ# 7 7 8 8 1 2 LPC_FRAME# 16,40
9 10 LPC_AD3_C @ RE32 1 2 0_0402_5%~D
9 10 LPC_AD3 16,40
17 CLK_PCIE_MINI3# 11 12 LPC_AD2_C @ RE33 1 2 0_0402_5%~D
11 12 LPC_AD2 16,40
17 CLK_PCIE_MINI3 13 14 LPC_AD1_C @ RE34 1 2 0_0402_5%~D
13 14 LPC_AD1 16,40
15 16 LPC_AD0_C @ RE35 1 2 0_0402_5%~D
15 16 LPC_AD0 16,40
@RE37
@ RE37 1 2 0_0402_5%~D 17 18
5,16,19,31,40,43 PLT_RST# 17 18
19 20 WL_OFF#
19 CLK_DEBUG 19 20 WL_OFF# 19
21 22 PLT_RST#
21 22 PLT_RST# 5,16,19,31,40,43
17 PCIE_PRX_DTX_N3 23 24 @ RE27 1 2 0_0402_5%~D +3VS_WLAN
23 24
17 PCIE_PRX_DTX_P3 25 25 26 26
27 27 28 28
29 29 30 30 PCH_SMBCLK 5,10,11,12,13,16,17,34,43
17 PCIE_PTX_DRX_N3 31 31 32 32 PCH_SMBDATA 5,10,11,12,13,16,17,34,43
17 PCIE_PTX_DRX_P3 33 33 34 34
35 35 36 36 USB20_N4 19
37 37 38 38 USB20_P4 19
+3VS_WLAN 39 39 40 40
41 41 42 42
02/20-108 43
45
43
45
44
46
44
46
47 47 48 48
40 E51TXD_P80DATA @ RE41 1 2 0_0402_5%~D EC_TX_DAT 49 50
@ RE42 1 49 50
40 E51RXD_P80CLK 2 0_0402_5%~D EC_RX_CLK 51 51 52 52

53 GND1 GND2 54
BT_RADIO_DIS# RE43 1 2 1K_0402_5%~D
MOLEX_48338-1088~D
CONN@
0823 (U) match the conn list
1

2 2
R1697
100K_0402_5%
2

BlueTooth +3VS

Display Mini Card 1

JDMC
2 +3VS_DMC 2 1
1
CU12

1U_0603_25V6-K~D
1 2 +3VS

3
S
+3VS_DMC +1.5VS_DMC 3 4 L97 BLM18PG330SN1D_2P~D 2
3 4 +1.5VS_DMC BT_ON#
G
QU1
5 5 6 6 2 1 +1.5VS 19 BT_ON# 1 2 2
17 MINI2CLK_REQ# 7 8 L98 BLM18AG601SN1D_2P AO3413_SOT23-3
7 8 RU6 10K_0402_5%~D D
1 1 1 1 1 9 10

1
9 10
4.7U_0603_10V6K~D
CE20

0.1U_0402_25V6K~D
CE21

4.7U_0603_10V6K~D
CE22

0.1U_0402_25V6K~D
CE23

0.1U_0402_25V6K~D
CE24

17 CLK_PCIE_MINI2# 11 11 12 12
13 14 CU15 W=40mils
17 CLK_PCIE_MINI2 13 14
15 16 0.1U_0402_25V6K~D +3VS_BT
2 2 2 2 2 15 16

1
1
17 18 RU8
17 18 DMC_RADIO_OFF# CU16 CU17 300_0603_5%
19 19 20 20 DMC_RADIO_OFF# 19
21 22 PLT_RST# 4.7U_0603_10V6K~D 0.1U_0402_25V6K~D
21 22 2
17 PCIE_PRX_DTX_N2 23 24

2
23 24
17 PCIE_PRX_DTX_P2 25 25 26 26
27 27 28 28
29 29 30 30 D

1
17 PCIE_PTX_DRX_N2 31 31 32 32
33 34 2 QU2
17 PCIE_PTX_DRX_P2 33 34
35 36 USB20_N5 19 G 2N7002E-T1-E3_SOT23-3
35 36
3 37 38 USB20_P5 19 S 3

3
37 38
+3VS_DMC 39 39 40 40
41 41 42 42
2 1 43 44 +3VS_BT
43 44
45 45 46 46
1M_0402_5%~D R944 47 48
47 48
29 DMC_DISP_CAB_DET 49 49 50 50
51 51 52 52 1 2 1
R943 1M_0402_5%~D C1703
@ R1875 1 2 0_0402_5%~DDMC_DET# 53 54 DP_DMC_HPD 29 0.1U_0402_25V6K~D
17 DMC_PCH_DET# 53 54 2 JBT
29 DP_DMC_AUXN 55 55 56 56
29 DP_DMC_AUXP 57 57 58 58 1 1
59 60 2
DMC 61
59
61
60
62 62
DP_DMC_ML3N 29
DP_DMC_ML3P 29
17 BT_DET#
COEX1 3
2
3
63 64 4
( HDMI ) 29 DP_DMC_ML2N
29 DP_DMC_ML2P 65
63
65
64
66 66 DMC 5
4
5
67 68 DP_DMC_ML1N 29 6
69
67
69
68
70 70 DP_DMC_ML1P 29 ( HDMI ) 20 BT_RADIO_DIS# BT_RADIO_DIS#
COEX2
7
6
7
29 DP_DMC_ML0N 71 71 72 72 8 8
29 DP_DMC_ML0P 73 73 74 74 9 9
75 75 76 76 10 10
19 USB20_N8 11 11
19 USB20_P8 12 12
77 GND1 GND2 78
13 GND
M/B Pin DMC Module LOTES_AAA-PCI-112-K01 14 GND
CONN@
signal B0 Ver. Signal
PCH DP Port HDMI usage AMPHE_G846A12211EU

100P_0402_50V8J~D
CONN@

33P_0402_50V8J~D

1 10K_0402_5%~D
DDP 0P TMDS DATA 2 DP_DMC_ML3N 60 DMC_CKN

@C1342
@
1 1

C1704

R1407

C1342
DDP 0N TMDS DATA 2# DP_DMC_ML3P 62 DMC_CKP
4 2 2 4
DDP 1P TMDS DATA 1 DP_DMC_ML2N 63 DMC_D0N

2
DDP 1N TMDS DATA 1# DP_DMC_ML2P 65 DMC_D0P

DDP 2P TMDS DATA 0 DP_DMC_ML1N 68 DMC_D1N

DDP 2N TMDS DATA 0# DP_DMC_ML1P 70 DMC_D1P
DELL CONFIDENTIAL/PROPRIETARY
DDP 3P TMDS CLK DP_DMC_ML0N 71 DMC_D2N Compal Electronics, Inc.
DDP 3N TMDS CLK# DP_DMC_ML0P 73 DMC_D2P PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
DDP AUXP HDMI_CTRL_CLK DP_DMC_AUXN 55 DMC_DDC_DAT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC M/B LA-8321
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
DDP AUXN HDMI_CTRL_DAT DP_DMC_AUXP 57 DMC_DDC_CLK PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
4019H5
Date: Wednesday, August 01, 2012 Sheet 35 of 66
A B C D E
 5 4 3 2 1

please close to JUSB

+5VALW 2.0A +5V_USB2_A @R620
@ R620 1 2 0_0402_5%~D
U42
1 GND OC1# 8 USB_OC2# 16,19 WCM2012F2S-900T04_0805
For ESD request +5V_USB2_A
2 IN OUT1 7
3 6 4 3 USB20_N2_CONN D28
EN1# OUT2 19 USB20_N2 4 3
4 5 USB3RN3_RC 1 8
40,43 USB_PWR_EN# EN2# OC2# R- VCC
USB3RP3_RC 2 7
TPS2062ADR_SO8~D USB20_P2_CONN USB3TN3_RC R+ GND USB20_N2_CONN
19 USB20_P2 1 1 2 2 3 T- D- 6
USB3TP3_RC 4 5 USB20_P2_CONN
L50 T+ D+

0.1U_0402_16V4Z~D
1 1

10U_1206_16V4Z~D
C1584 C1585 LXES4XBAA6-027_MSOP8
@R619
@ R619 1 2 0_0402_5%~D
D 2 2 D

@R622
@ R622 1 2 0_0402_5%~D

WCM2012F2S-900T04_0805
For ESD request +5V_USB2_B

4 3 USB20_N3_CONN D30
19 USB20_N3 4 3 USB3RN4_RC 1 8
R- VCC
+5VALW 2.0A +5V_USB2_B
19 USB20_P3 1 1 2 2 USB20_P3_CONN
USB3RP4_RC
USB3TN4_RC
2
3
R+
T-
GND
D-
7
6 USB20_N3_CONN
U45 USB3TP4_RC 4 5 USB20_P3_CONN
L51 T+ D+
1 GND OC1# 8 USB_OC3# 16,19
2 7 LXES4XBAA6-027_MSOP8
IN OUT1 @R621
@ R621 1
3 EN1# OUT2 6 2 0_0402_5%~D
40,43 USB_PWR_EN# 4 EN2# OC2# 5

TPS2062ADR_SO8~D
0.1U_0402_16V4Z~D

1 1
10U_1206_16V4Z~D

C1586 C1587

2 2

+5V_USB2_A

C
2.0A C

150U_D_10VM_R40M

0.1U_0402_16V4Z~D
1
C1583 1
@R623
@ R623 1 2 0_0402_5%~D +
C1582

L46 2 2
USB CONN
19 USB3TP3 C1599 1 2 0.1U_0402_10V6K~D USB3TP3_C 1 1 2 2 USB3TP3_RC
JUSB3
1 VBUS
19 USB3TN3 C1600 1 2 0.1U_0402_10V6K~D USB3TN3_C 4 4 3 3 USB3TN3_RC USB20_N2_CONN 2 D-
USB20_P2_CONN 3 D+
DLW21SN900HQ2L_0805_4P~D 4 GND For customer request
USB3RN3_RC 5
@R625
@ R625 1 USB3RP3_RC SSRX-
2 0_0402_5%~D 6 SSRX+
@R1654
@ R1654 1 2 0_0603_5%~D
7 GND
USB3TN3_RC 8 @R1574
@ R1574 1
10 2 0_0603_5%~D
USB3TP3_RC SSTX- GND GND_Frame
9 SSTX+ GND 11 1 2
@R626
@ R626 1 2 0_0402_5%~D C804 0.1U_0402_25V6K~D
JAE_PC2RN1SU41A17J6R350-DT~D
CONN@
L47
1 2 USB3RP3_RC +5V_USB2_B
19 USB3RP3 1 2
2.0A
4 3 USB3RN3_RC
19 USB3RN3 4 3

150U_D_10VM_R40M

0.1U_0402_16V4Z~D
DLW21SN900HQ2L_0805_4P~D 1
C1589 1
@R627
@ R627 1 2 0_0402_5%~D +
C1588

B 2 2 B
@R628
@ R628 1 2 0_0402_5%~D
JUSB4
1 VBUS
L48 USB20_N3_CONN 2 D-
19 USB3TP4 C1604 1 2 0.1U_0402_10V6K~D USB3TP4_C 1 1 2 2 USB3TP4_RC USB20_P3_CONN 3 D+
4 GND For customer request
USB3RN4_RC 5 SSRX-
19 USB3TN4 C1603 1 2 0.1U_0402_10V6K~D USB3TN4_C 4 4 3 3 USB3TN4_RC USB3RP4_RC 6 SSRX+
@R1562
@ R1562 1 2 0_0603_5%~D
7 GND
DLW21SN900HQ2L_0805_4P~D USB3TN4_RC 8 @ R1566 1
@R1566
10 2 0_0603_5%~D
USB3TP4_RC SSTX- GND GND_Frame
9 SSTX+ GND 11 1 2
@R629
@ R629 1 2 0_0402_5%~D C801 0.1U_0402_25V6K~D
JAE_PC2RN1SU41A17J6R350-DT~D
CONN@
@R630
@ R630 1 2 0_0402_5%~D

L49
1 2 USB3RP4_RC
19 USB3RP4 1 2

4 3 USB3RN4_RC
19 USB3RN4 4 3
DLW21SN900HQ2L_0805_4P~D

@R631
@ R631 1 2 0_0402_5%~D

A A

Compal Electronics, Inc.

Title
SCHEMATIC M/B LA-8321
Size Document Number Rev
B
4019H5
Date: Wednesday, August 01, 2012 Sheet 36 of 66
5 4 3 2 1
 5 4 3 2 1

+3.3V_F347 +3.3V_F347

@R1569
@ R1569 1 2 0_0402_5%~D +3.3V_F347_R

1 1 1 2
C1707

1
C1705 C1706 C1708
1U_0603_25V6-K~D 0.1U_0402_25V6K~D 0.1U_0402_25V6K~D 22P_0402_50V8J~D R1570 R1571
2 2 2 1 4.7K_0402_5%~D 4.7K_0402_5%~D
place R1564 as close as U602

2
D U602 D
6 2 SPI_MOCLK 1 2 SPI_MOCLK_R
VDD P0.0 SPI_MOSO @
@R1564
R1564 0_0402_5%~D
P0.1 1
@ R1572 19 USB20_P6 USB20_P6 4 32 SPI_MOSI
0_0603_5% USB20_N6 D+ P0.2 SPI_MOCS#
19 USB20_N6 5 D- P0.3 31
+5VALW 1 2 30 I2C_DAT I2C_DAT 38,39 +3.3V_F347
P0.4 I2C_CLK
W=40mils +3.3V_F347 7 REGIN P0.5 29
C1710 @ 1 0.1U_0402_25V6K~D I2C_CLK 38,39
+5VS 1 2 8 VBUS P0.6 28 2
27 1 R1576 2
@ R1575 P0.7
+3.3V_F347 1 2 9 RST#/C2CK
0_0402_5%~D 10 26 SLP_S3 +3.3V_F347 1K_0402_5%
R1577 P3.0/C2D P1.0 BATT_CHG_LED R1841
1 1 P1.1 25 1 2 10K_0402_5%~D
1K_0402_1% 18 24 ACIN#
C1711 C1712 P2.0 P1.2 LID_SW_IN_D#
17 P2.1 P1.3 23 2 1 LID_SW_IN# 17,38,40
1U_0603_25V6-K~D 0.1U_0402_25V6K~D 16 22 BATT_LOW_LED
2 2 P2.2 P1.4 SLP_S5 D70
15 P2.3 P1.5 21
14 20 C1713 @ 1 2 0.1U_0402_25V6K~D SDMK0340L-7-F_SOD323-2~D
P2.4 P1.6 C1714 @ 1 0.1U_0402_25V6K~D
13 P2.5 P1.7 19 2
12 P2.6
11 P2.7 GND 3

C8051F347-GQ_LQFP32_7X7

@C1719
@

@C1715
@

@C1720
@

@C1716
@

@C1721
@

@C1717
@

@C1722
@

@C1718
@
C1719

C1715

C1720

C1716

C1721

C1717

C1722

C1718
+3.3V_F347
CONN@ 1 1 1 1 1 1 1 1 Each CPN represent different boot loader individually
JELCDBG
1
1 SA00003IR10 S IC C8051F347-GQ LQFP 32P MCU for PALB0 (Specter) blue
8Mb SPI
2 2
2 2 2 2 2 2 2 2 SA00003IR20 S IC C8051F347-GQ LQFP 32P MCU for PAR00 (Voyager) green
3 3
0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D
4 ★ SA00003IR30 S IC C8051F347-GQ LQFP 32P MCU for PAR10 (Avenger) white
ROM
C 4 C
5 1
5
6
SA00003IR40 S IC C8051F347-GQ LQFP 32P MCU for PAP00 (Phantom MLK) silver
6 C1730
7 1U_0402_6.3V6K~D
GND 2 U604
GND 8
SPI_MOSI 15_0402_5% 2 1 R1584 5 2 R1585 1 2 15_0402_5% SPI_MOSO
AMPHE_G846A06211EU~D DI SO
SPI_MOCLK_R 15_0402_5% 2 1 R1583 6 CLK
10K_0402_5%~D1 2 R1580 SPI_MOCS# 1 CS
10K_0402_5%~D1 2 R1581 7 HOLD
10K_0402_5%~D1 2 R1582 3 WP
+3.3V_F347 +3.3V_F347 +3.3V_F347 8 4
VCC VSS
1 1
C1723 EN25F80-75HCP_SO8
1

C1724
R1586 0.1U_0402_25V6K~D 22P_0402_50V8J~D
2 2
100K_0402_1%~D R1587 SA00001V400 (S IC FL 8M EN25F80-75HCP SOIC 8P) 《EON》
100K_0402_1%~D
SA00003EW00 (S IC FL 8M W25Q80BVSSIG SOIC 8P) 《WINBOND》
SA000041O00 (S IC FL 8M MX25L8006EM2I-12G SOP 8P 3V) 《MXIC》
2

SLP_S3 SLP_S5
D D
1

18,40 PM_SLP_S3# 2
G
Q210 18,40 PM_SLP_S5#
2N7002E-T1-E3_SOT23-3
2
G
Q211
2N7002E-T1-E3_SOT23-3
+3.3V_F347 behavior
S S
3

+3VALW
@
+3.3V_F347
STATE
PJP24
B
+3.3V_F347 +3.3V_F347
2 2 1 1 S0 S3 S4 S5 DEVICE SMBUS ADDRESS B

JUMP_43X118
MAXIM - LED 0100 000b
AC IN ON ON ON ON
1

Q212
SI3456DDV-T1-GE3_TSOP6~D MAXIM - GPIO 0100 001b
R1588 R1635
BAT only ON ON OFF OFF I2C EEPROM 1010 000b
D

100K_0402_1%~D 100K_0402_1%~D 6
S

5 4
2

ACIN# BATT_LOW_LED 2
1
AC mode battery full in S5:turn off ELC controller
D D 1
1

1
G

14,18,40,43,47 ACIN 2 Q213 40 BATT_LOW_LED# 2 Q247 C1725 R1589

3

G 2N7002E-T1-E3_SOT23-3 G 2N7002E-T1-E3_SOT23-3 1 4.7U_0603_10V6K~D 100K_0402_1%~D

S S 2
3

C1726

2
0.1U_0402_25V6K~D
2

+3VALW B+_BIAS
+3.3V_F347 R1591
100K_0402_1%~D
1

1 2
1

R1590
D
1

R1592 100K_0402_1%~D
100K_0402_1%~D 2
2

G R1842 1 C1727
2

BATT_CHG_LED S
D
3
1

300K_0402_5%~D

0.1U_0402_25V6K~D

Q214
D
1

40 3V_F347_ON 2 Q215 2N7002E-T1-E3_SOT23-3

A Q216 G 2N7002E-T1-E3_SOT23-3 2 A
40 BATT_CHG_LED# 2
2
1

G 2N7002E-T1-E3_SOT23-3 S
3

S R1593
3

100K_0402_1%~D

DELL CONFIDENTIAL/PROPRIETARY
2

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC M/B LA-8321
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
4019H5
Date: Wednesday, August 01, 2012 Sheet 37 of 66
5 4 3 2 1
 5 4 3 2 1

+3.3V_F347 +3.3V_F347
+3.3V_F347
L/R SPK, Logo, TP

1
Num LED CONN LOGO Board CONN Media Board CONN
R1594 R1595 1
4.7K_0402_5%~D 4.7K_0402_5%~D C1728
0.1U_0402_25V6K~D

2
U23 2 +5VALW +5VS
7313_INT# 22 21 +5VS +5VS
39 7313_INT# INT#/O16 V+

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D
37,39 I2C_CLK I2C_CLK 19 1 LSPK_LED_R_DRV#
I2C_DAT SCL P0 LSPK_LED_G_DRV#
37,39 I2C_DAT 20 SDA P1 2 1 1 1 1

C1731

C1745
3 LSPK_LED_B_DRV# C1729 C1732
AD0_0 P2 RSPK_LED_R_DRV# 0.1U_0402_25V6K~D 0.1U_0402_25V6K~D
D 18 AD0 P3 4 D
AD0_1 23 5 RSPK_LED_G_DRV#
AD1 P4 2 2 2 2
AD0_2 24 AD2 P5 6 RSPK_LED_B_DRV# 20mil JLOGO
7 JCAP 1 JMEDIA
P6 1
1

TP_LED_R_DRV# 14 8 1 LID_SW 2 1 2 +5VS

R1596 R1597 TP_LED_G_DRV# P12 P7 LED_R_7313#_1 1 LOGO_LED_R_DRV# 2 1 2
15 P13 P8 10 2 2 3 3 3 3 4 4 +5VALW
4.7K_0402_5%~D 4.7K_0402_5%~D TP_LED_B_DRV# 16 P14 P9 11 LOGO_LED_R_DRV# LED_B_7313#_1 3 3
LOGO_LED_G_DRV# 4 4
LED_R_7313#_1 5 5 6 6 LED_R_7313#_1
17 12 LOGO_LED_G_DRV# LED_G_7313#_1 4 LOGO_LED_B_DRV# 5 7 LED_B_7313#_1 7 8 LED_B_7313#_1
OSC P10 LOGO_LED_B_DRV# CAPS_LED# 4 5 G7 LED_G_7313#_1 7 8 LED_G_7313#_1
13 40 CAPS_LED# 5 6 8 9 10
2

P11 NUM_LED# 5 6 G8 WLES ON/OFF LED# 9 10 WLES ON/OFF LED#

9 GND GND 25 40 NUM_LED# 6 6 40 WLES ON/OFF LED# 11 11 12 12
40 SCR_LED# SCR_LED# 7 MOLEX_53398-0671~D 13 14
MAX7313DATG+T_TQFN-EP24_4X4~D 7 CONN@ 13 14
8 8 15 15 16 16
9 GND1 17 17 18 18
10 GND2 19 19 20 20
21 21 22 22
FOX_HS8108E 23 24
+3.3V_F347 CONN@ 23 24
25 25 26 26
+3.3V_F347 27 28
KSI2 27 28 KSI2
39,40,44 KSI2 29 29 30 30
1

+3.3V_F347 39,40,44 KSI3 KSI3 31 32 KSI3

31 32
R1600
4.7K_0402_5%~D
CAP, Media, Eyes, Rim 1
C1733
39,40,44 KSI4 KSI4
KSI5
33
35
33 34 34
36
KSI4
KSI5
39,40,44 KSI5 35 36
0.1U_0402_25V6K~D 40,44 KSI6 KSI6 37 38 KSI6
KSI7 37 38 KSI7
40,44 KSI7 39 40
2

U24 2 KSO3 39 40 KSO3

40,44 KSO3 41 41 42 42
1

7313_INT# 22 21 40,44 KSO9 KSO9 43 44 KSO9

R1598 R1599 INT#/O16 V+ LID_SW 43 44 LID_SW
45 45 46 46
4.7K_0402_5%~D 4.7K_0402_5%~D I2C_CLK 19 1 PWR_G_7313# 47 48 PWR_G_7313#
SCL P0 47 48

Touchpad LED CONN

I2C_DAT 20 2 PWR_R_7313# 49 50 PWR_R_7313#
SDA P1 PWR_B_7313# 49 50 PWR_B_7313#
3 51 52
2

AD2_0 P2 LED_R_7313#_1 51 52
18 AD0 P3 4 53 53 54 54
AD2_1 23 5 LED_G_7313#_1 +5VS_TP_LED 55 56
AD2_2 AD1 P4 LED_B_7313#_1 JTP 55 56
24 AD2 P5 6 57 57 58 58
P6 7 1 1 59 59 60 60
1

C HDD_R_7313# C
14 P12 P7 8 2 2
R1601 HDD_G_7313# 15 10 +5VS 3 AMPHE_G283010211CEU
HDD_B_7313# P13 P8 PWR_R_7313# TP_CLK 3 CONN@
4.7K_0402_5%~D 16 P14 P9 11 40 TP_CLK 4 4
17 12 PWR_G_7313# 1 40 TP_DAT TP_DAT 5
OSC P10 PWR_B_7313# 5
13 1 +3VALW 6
2

P11 C1734 LID_SW_IN# 6

9 GND GND 25 17,37,40 LID_SW_IN# 7 7
0.1U_0402_25V6K~D C554 TP_LED_R_DRV# 8
MAX7313DATG+T_TQFN-EP24_4X4~D 2 TP_LED_G_DRV# 8
0.1U_0402_25V6K~D 9 9
2 TP_LED_B_DRV# 10 10
11 11
12 12
HDD_B 13 13

D
14
15
GND1
GND2 SPK LED Board CONN
3

5 @ D27 MOLEX_53398-1371~D +5VS

G 2 TP_CLK CONN@
Q271B 1
S DMN66D0LDW-7 3 TP_DAT 1 1
4

+5VS

0.1U_0402_25V6K~D

C1735

0.1U_0402_25V6K~D

C1736
HDD_B_7313# PJDLC05C_SOT23-3
2 2
1

R1602 HDD_R JSPKLED

100K_0402_5% 1
+5VS_TP_LED 1
D 2 2
3

LSPK_LED_R_DRV# 3
2

SATA_LED_ACT +5VS LSPK_LED_G_DRV# 3

5 4 4

D
G 6 LSPK_LED_B_DRV# 5

S
D 5
6

Q273B 5 4 RSPK_LED_R_DRV# 6
PCH_SATALED# DMN66D0LDW-7 B+_BIAS RSPK_LED_G_DRV# 6
16 PCH_SATALED# 2 S 2 7
4

G Q2 RSPK_LED_B_DRV# 7
1 8 8
B HDD_R_7313# 1 SI3456DDV-T1-GE3_TSOP6~D 9 11 B

G
9 G11

1
Q271A S C1746 10 12
1

3
DMN66D0LDW-7 R1660 0.1U_0402_25V6K~D 10 G12

1U_0603_25V6-K~D
300K_0402_5%~D 1 ACES_87212-10G0
HDD_G 2 CONN@

C62
2
+5VALW EN_TPLED
D
6

2
D

1
2 1
1

G 2
40 EN_TPLED#
R1603 Q273A G R1643 C1756
100K_0402_5% 1 S DMN66D0LDW-7 S 1.5M_0402_5%~D 0.1U_0402_25V6K~D
1

3
D 2
PWR BTN Board CONN
Q3

2
HDD_G_7313# SSM3K7002FU_SC70-3~D
2

LID_SW 2
G +5VS

S
Q222 3
1
SSM3K7002F_SC59-3~D
C1744
1 0.1U_0402_25V6K~D
2
D
Reference AD2 AD1 AD0 MAX7313 1
JBTN

LID_SW_IN# ON/OFFBTN# 1
2 43 ON/OFFBTN# 2 2
G HDD_R 3
HDD_G 3
4 4
Q221
S
3 U23 0 1 0 L/R Headlight , Logo, TP HDD_B 5
6
5 G7 7
8
SSM3K7002F_SC59-3~D 6 G8
MOLEX_53398-0671~D
CONN@

A
Num, CAP , SCR A
EJECT, REV, PLAY/PAUSE
FFWD, Vol_DWN, Vol_UP
Wireless ON/OFF DELL CONFIDENTIAL/PROPRIETARY
U24 0 1 1
AWCC Button
Alien Adrenaline Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
Power Button Eyes TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC M/B LA-8321
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
Power Button Rim PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Size Document Number Rev
B
4019H5
Date: Wednesday, August 01, 2012 Sheet 38 of 66
5 4 3 2 1
 5 4 3 2 1

+3.3V_F347
+3.3V_F347 K/B Backlight K/B Backlight CONN Keypad Backlight CONN
+3.3V_F347 +5VS Keypad CONN
1

1
R1605 R1606
AD2 AD1 AD0

1
4.7K_0402_5%~D 4.7K_0402_5%~D 0 0 1 1
1
JKBBL
F5
C1854 1 JKP
2 0.5A_13.2V_NANOSMDC050F-13.2-2
2

2
U25 KB_LED_R1_DRV#_A# 2 KP_DET# KP_DET#
0.1U_0402_25V6K~D 3 3 40 KP_DET# 1 1 2 2
7313_INT# 2 KB_LED_G1_DRV#_A# KP_KSO16 KP_KSO16
38 7313_INT# 22 21 4 40 KSO16 3 4

2
INT#/O16 V+ KB_LED_B1_DRV#_A# 4 JKPBL KSI0 3 4 KSI0
5 5 40,44 KSI0 5 5 6 6
37,38 I2C_CLK I2C_CLK 19 1 KB_LED_R1_DRV# 6 KB_LED_R2_DRV#_A# 1 KSI5 7 8 KSI5
D SCL P0 KB_LED_R1_DRV# 44 6 1 38,40,44 KSI5 7 8 D
37,38 I2C_DAT I2C_DAT 20 2 KB_LED_G1_DRV# KB_LED_G2_DRV#_A# 7 2 KP_LED_B1_DRV#_A# KSI1 9 10 KSI1
SDA P1 KB_LED_G1_DRV# 44 7 2 40,44 KSI1 9 10
3 KB_LED_B1_DRV# 8 KB_LED_B2_DRV#_A# KP_LED_G1_DRV#_A# 3 KSI4 11 12 KSI4
P2 KB_LED_B1_DRV# 44 8 3 38,40,44 KSI4 11 12
AD1_0 18 4 KB_LED_R2_DRV# KB_LED_R3_DRV#_A# 9 4 KP_LED_R1_DRV#_A# KSI2 13 14 KSI2
AD0 P3 KB_LED_R2_DRV# 44 9 4 38,40,44 KSI2 13 14
AD1_1 23 5 KB_LED_G2_DRV# 10 KB_LED_G3_DRV#_A# +5VS_KPBL 5 KSI3 15 16 KSI3
AD1 P4 KB_LED_G2_DRV# 44 10 5 38,40,44 KSI3 15 16
AD1_2 24 6 KB_LED_B2_DRV# KB_LED_B3_DRV#_A# 11 6 +5VS_KPBL 17 18
AD2 P5 KB_LED_B2_DRV# 44 11 6 17 18
7 KB_LED_R3_DRV# 12 KB_LED_R4_DRV#_A# 1 19 20
P6 KB_LED_R3_DRV# 44 12 19 20
1

KP_LED_R1_DRV# 14 8 KB_LED_G3_DRV# +5VS KB_LED_G4_DRV#_A# 13 7 8

P12 P7 KB_LED_G3_DRV# 44 13 G1 G2
R1608 R1609 KP_LED_G1_DRV# 15 10 KB_LED_B3_DRV# 14 KB_LED_B4_DRV#_A# C1856 9 10 AMPHE_G281010112CHR~D
P13 P8 KB_LED_B3_DRV# 44 14 G3 G4
4.7K_0402_5%~D 4.7K_0402_5%~D KP_LED_B1_DRV# 16 11 KB_LED_R4_DRV# 1 2+5VS_KBBL 15 0.1U_0402_25V6K~D CONN@
P14 P9 KB_LED_R4_DRV# 44 15 2
17 12 KB_LED_G4_DRV# F3 16 +5VS_KBBL AMPHE_G25061021A6EU
OSC P10 KB_LED_G4_DRV# 44 16
13 KB_LED_B4_DRV# 0.5A_13.2V_NANOSMDC050F-13.2-21 CONN@
KB_LED_B4_DRV# 44
2

P11
9 GND GND 25 17 G1 G2 18
C1855 19 20
MAX7313DATG+T_TQFN-EP24_4X4~D 0.1U_0402_25V6K~D G3 G4
2 AMPHE_G25161021A6EU
CONN@

+3VS +3VS
+3VS
+3VS

1
1

+3VS R1619 KB_LED_R2_DRV#_A# +3VS R1625 KB_LED_R3_DRV#_A#

1
+3VS R1612 KB_LED_R1_DRV#_A# 4.7K_0402_5%~D 4.7K_0402_5%~D
4.7K_0402_5%~D +3VS R1631 KB_LED_R4_DRV#_A#
D D

3
4.7K_0402_5%~D
D

2
1

R1618 KB_LED_R2_DRV 5 R1624 KB_LED_R3_DRV 5

D
2

3
R1613 KB_LED_R1_DRV 5 4.7K_0402_5%~D G 4.7K_0402_5%~D G

2
4.7K_0402_5%~D G Q84B Q87B R1630 KB_LED_R4_DRV 5
C Q81B S DMN66D0LDW-7 S DMN66D0LDW-7 4.7K_0402_5%~D G C
D D

4
6

6
S DMN66D0LDW-7 Q90B
D
2

4
6

KB_LED_R2_DRV# 2 KB_LED_R3_DRV# 2 S DMN66D0LDW-7

D

4
6
KB_LED_R1_DRV# 2 G G
G KB_LED_R4_DRV# 2
S Q84A S Q87A G

1
S Q81A DMN66D0LDW-7 DMN66D0LDW-7
1

DMN66D0LDW-7 S Q90A

1
DMN66D0LDW-7

+3VS
+3VS
+3VS +3VS

1
1

+3VS R1627 KB_LED_G3_DRV#_A#

1

1
+3VS +3VS R1621 KB_LED_G2_DRV#_A# 4.7K_0402_5%~D
R1615 KB_LED_G1_DRV#_A# 4.7K_0402_5%~D +3VS R1662 KB_LED_G4_DRV#_A#
D

3
4.7K_0402_5%~D 4.7K_0402_5%~D
D

2
1

3
R1626 KB_LED_G3_DRV 5
D D
2
3

3
R1614 R1620 KB_LED_G2_DRV 5 4.7K_0402_5%~D G
2

2
4.7K_0402_5%~D KB_LED_G1_DRV 5 4.7K_0402_5%~D G Q88B R1661 KB_LED_G4_DRV 5
G Q85B S DMN66D0LDW-7 4.7K_0402_5%~D G
D

4
6
Q82B S DMN66D0LDW-7 Q91B
D D
2

4
6

S DMN66D0LDW-7 KB_LED_G3_DRV# 2 S DMN66D0LDW-7

D
4

4
6
KB_LED_G1_DRV# 2 KB_LED_G2_DRV# 2 G
G G KB_LED_G4_DRV# 2
S Q88A G

1
S Q82A S Q85A DMN66D0LDW-7
1

DMN66D0LDW-7 DMN66D0LDW-7 S Q91A

1
DMN66D0LDW-7

B B
+3VS
+3VS +3VS +3VS

1
1

1
+3VS R1629 KB_LED_B3_DRV#_A#
+3VS R1617 KB_LED_B1_DRV#_A# +3VS R1623 KB_LED_B2_DRV#_A# 4.7K_0402_5%~D +3VS R1664 KB_LED_B4_DRV#_A#
4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D
D

3
D D D

2
1

3
R1628 KB_LED_B3_DRV 5
2

2
R1616 KB_LED_B1_DRV 5 R1622 KB_LED_B2_DRV 5 4.7K_0402_5%~D G R1663 KB_LED_B4_DRV 5
4.7K_0402_5%~D G 4.7K_0402_5%~D G Q89B 4.7K_0402_5%~D G
Q83B Q86B S DMN66D0LDW-7 Q92B
D
2

4
6
S DMN66D0LDW-7 S DMN66D0LDW-7 S DMN66D0LDW-7
D D D
2

4
6

6
KB_LED_B3_DRV# 2
KB_LED_B1_DRV# 2 KB_LED_B2_DRV# 2 G KB_LED_B4_DRV# 2
G G G
S Q89A

1
S Q83A S Q86A DMN66D0LDW-7 S Q92A
1

1
DMN66D0LDW-7 DMN66D0LDW-7 DMN66D0LDW-7

Keypad LED contorl

+3VS +3VS +3VS
1

+3VS +3VS +3VS

R1666 KP_LED_R1_DRV#_A# R1667 KP_LED_G1_DRV#_A# R1670 KP_LED_B1_DRV#_A#
A 4.7K_0402_5%~D 4.7K_0402_5%~D 4.7K_0402_5%~D A
1

D D D
3

3
R1665 R1668 R1669
2

4.7K_0402_5%~D KP_LED_R1_DRV 5 4.7K_0402_5%~D KP_LED_G1_DRV 5 4.7K_0402_5%~D KP_LED_B1_DRV 5

G G G
Q93B Q94B Q95B
D D D
2

2
6

S DMN66D0LDW-7 S DMN66D0LDW-7 S DMN66D0LDW-7

4

KP_LED_R1_DRV# KP_LED_G1_DRV# KP_LED_B1_DRV#

2
G
2
G
2
G Compal Electronics, Inc.
Title
S Q93A S Q94A S Q95A
SCHEMATIC M/B LA-8321
1

DMN66D0LDW-7 DMN66D0LDW-7 DMN66D0LDW-7

Size Document Number Rev
B
4019H5
Date: Wednesday, August 01, 2012 Sheet 39 of 66
5 4 3 2 1
 5 4 3 2 1

+3VALW_EC
+3VALW L39
FBMA-L11-160808-800LMT_0603
C539 +3VALW_EC Board ID +3VALW_EC
@R464
@ R464 1 2 0_0805_5% 0.1U_0402_25V6K~D 0.1U_0402_25V6K~D +3VALW_EC 1 2 +EC_VCCA 1 2 ECAGND
1 1 1 1 2 2

2
G
C533 C534 C535 C536 C537 C538 <BOM Structure> @
0.1U_0402_25V6K~D Q307 R465
+3VLP @R2586
@ R2586 1 2 0_0805_5%~D
2 2 2 2 1 1
1000P_0402_50V7K~D BATT_TEMP_Q 3 1 BATT_TEMP 43,45 Ra 100K_0402_5%

D
111
125
0.1U_0402_25V6K~D 0.1U_0402_25V6K~D 1000P_0402_50V7K~D Ra: 100k

22
33
96

67

1
9
KSI[0..7] U14 2N7002E-T1-E3_SOT23-3 AD_BID0
38,39,44 KSI[0..7]
Rb: 56k

VCC
VCC
VCC
VCC
VCC
VCC

AVCC

1
KSO[0..15] R2661 1 2 0_0402_5%~D
38,44 KSO[0..15] Ver: 1.0 R466
1
C540

D
20 GATEA20
GATEA20 1 GATEA20/GPIO00 PWM0/GPIO0F 21 CPU1.5V_S3_GATE CPU1.5V_S3_GATE 9
02/16-102Rb 56K_0402_5%~D
0.1U_0402_25V6K~D
D
KB_RST# 2 23 BEEP# 2
BEEP# 32

2
20 KB_RST# SERIRQ KBRST#/GPIO01 BEEP#/PWM1/GPIO10 SYSTEM_FAN_PWM
16 SERIRQ 3 SERIRQ# PWM Output FANPWM0/GPIO12 26 SYSTEM_FAN_PWM 41 Board ID definition,
16,35 LPC_FRAME# LPC_FRAME# 4 27 MXM1_FAN_PWM MXM1_FAN_PWM 41
LPC_AD3 LPC_FRAME#/LFRAME# ACOFF/FANPWM1/GPIO13 C541 L40 Please see page 3.
16,35 LPC_AD3 5 LPC_AD3/LAD3
16,35 LPC_AD2 LPC_AD2 7 2 1 ECAGND 2 1
LPC_AD1 LPC_AD2/LAD2 BATT_TEMP_Q FBMA-L11-160808-800LMT_0603
16,35 LPC_AD1 8 LPC_AD1/LAD1 BATT_TEMP/AD0/GPI38 63
16,35 LPC_AD0 LPC_AD0 10 64 100P_0402_50V8J~D
LPC_AD0/LAD0 BATT_OVP/AD1/GPI39 EAPD# 32
LPC & MISC 65 ADP_I
ADP_I/AD2/GPI3A ADP_I 45,47
19 CLK_PCI_LPC CLK_PCI_LPC 12 66 AD_BID0 5,45 H_PROCHOT# H_PROCHOT# @ R520 1 2 0_0402_5%~D VR_HOT# VR_HOT# 53,55
PLT_RST# CLK_PCI_EC/PCICLK AD3/GPI3B KP_DET#
5,16,19,31,35,43 PLT_RST# 13 PCIRST#/GPIO05 AD Input AD4/GPI42 75 KP_DET# 39
EC_RST# 37 76 SPDIF_DET#
EC_RST#/ECRST# AD5/GPI43 SPDIF_DET# 32
1

20 EC_SCI# EC_SCI# 20 EC_SCI#/GPIO0E D

1
@ R468 EN_CAM 38
25 EN_CAM CLKRUN#/GPIO1D H_PROCHOT#_EC Q205
33_0402_5%~D DAC_BRIG/DA0/GPO3C 68 2
70 AC_SEL AC_SEL 45 G 2N7002E-T1-E3_SOT23-3
+3VALW_EC EN_DFAN1/DA1/GPO3D IREF
DA Output 71 IREF 47 S
2

3
KSI0_EC IREF/DA2/GPO3E CHGVADJ
55 KSI0/GPIO30 DA3/GPO3F 72 CHGVADJ 47
1 1 KSI1_EC 56 +5VS
KSI1/GPIO31
2 1 SPDIF_DET# KSI2_EC 57 KSI2/GPIO32
R1829 47K_0402_5% @ C542 C543 KSI3_EC 58 83 EC_MUTE_R#@ R471 1 2 0_0402_5%~D EC_MUTE# EC_MUTE# 33
KSI3/GPIO33 EC_MUTE#/PSCLK1/GPIO4A
2 1 EC_RST# 22P_0402_50V8J~D 0.1U_0402_25V6K~D KSI4_EC 59 KSI4/GPIO34 USB_EN#/PSDAT1/GPIO4B 84 SA_PGOOD
SA_PGOOD 52
TP_CLK R472 2 1 4.7K_0402_5%~D
R469 47K_0402_5% 2 2 KSI5_EC LCD_BKL_EN
60 KSI5/GPIO35 CAP_INT#/PSCLK2/GPIO4C 85 LCD_BKL_EN 25
1 2 KSO1 KSI6_EC 61 KSI6/GPIO36 PS2 Interface PSDAT2/GPIO4D 86 ESATA/USB_OFF ESATA/USB_OFF 43 TP_DAT R474 2 1 4.7K_0402_5%~D
R476 47K_0402_5% KSI7_EC 62 87 TP_CLK TP_CLK 38
KSI7/GPIO37 TP_CLK/PSCLK3/GPIO4E
1 2 KSO2 KSO0_EC 39 KSO0/GPIO20 TP_DATA/PSDAT3/GPIO4F 88 TP_DAT
TP_DAT 38
R478 47K_0402_5% KSO1_EC 40 KSO1/GPIO21 +3VS
1 2 EC_SMB_CK1 KSO2_EC 41 KSO2/GPIO22
R470 4.7K_0402_5%~D KSO3_EC 42 97 ODD_EJEECT 34
KSO3/GPIO23 SDICS#/GPXIOA00
1 2 EC_SMB_DA1 KSO4_EC 43 KSO4/GPIO24 WOL_EN/SDICLK/GPXIOA01 98 EN_WOL#
EN_WOL# 31
R473 4.7K_0402_5%~D KSO5_EC HDA_SDO
44 KSO5/GPIO25 Int. K/B ME_EN/SDIMOSI/GPXIOA02 99 HDA_SDO 16
1 2 EC_SMI# KSO6_EC 45 KSO6/GPIO26 Matrix LID_SW#/GPXIOD00 109 LID_SW_IN#
LID_SW_IN# 17,37,38
BKOFF# R495 2 1 10K_0402_5%~D
@ R485 1K_0402_1% KSO7_EC 46 SPI Device I/F
KSO7/GPIO27
1 2 EC_ESB_CLK KSO8_EC 47 KSO8/GPIO28
M_THERMAL# R517 2 1 10K_0402_5%~D
R1530 4.7K_0402_5%~D KSO9_EC 48 119 FRD#
C KSO9/GPIO29 SPIDI/MISO C
1 2 EC_ESB_DAT KSO10_EC 49 KSO10/GPIO2A SPIDO/MOSI 120 R481 1 2 33_0402_5%~D FWR#
R1531 4.7K_0402_5%~D KSO11_EC 50 SPI Flash ROM 126 R482 1 2 33_0402_5%~D SPI_CLK
KSO11/GPIO2B SPICLK/GPIO58 +3VALW_EC
1 2 KB_DET# KSO12_EC 51 KSO12/GPIO2C SPICS# 128 R484 1 2 33_0402_5%~D FSEL# Please place R503
R2660 100K_0402_5%~D KSO13_EC
KSO14_EC
52 KSO13/GPIO2D close to EC with in 750mil
53 KSO14/GPIO2E
KSO15_EC 54 73 PCH_VREG_EN# PCH_VREG_EN# 22 DEPOP# R493 2 1 100K_0402_5%~D
+3VS KSO16 KSO15/GPIO2F GPIO40 EC_PECI R503 1
39 KSO16 81 KSO16/GPIO48 H_PECI/GPIO41 74 2 43_0402_1% H_PECI 5,20
DEPOP# 82 GPIO 89 FSTCHG FSTCHG 47 EC_MUTE# R483 2 1 100K_0402_5%~D
32 DEPOP# KSO17/GPIO49 FSTCHG/GPIO50
1 2 EC_SCI# BATT_CHG_LED#/GPIO52 90 BATT_CHG_LED# BATT_CHG_LED# 37
R486 10K_0402_5%~D 91 CAPS_LED# CAPS_LED# 38
CAPS_LED#/GPIO53
1 2 EC_SMB_CK2 14,44,45 EC_SMB_CK1 EC_SMB_CK1 77 EC_SMB_CK1/SCL0/GPIO44 BATT_LOW_LED#/GPIO54 92 BATT_LOW_LED# BATT_LOW_LED# 37
R489 2.2K_0402_5%~D 14,44,45 EC_SMB_DA1 EC_SMB_DA1 78 93 SCR_LED# SCR_LED# 38
EC_SMB_DA1/SDA0/GPIO45 PWR_LED#/GPIO55
1 2 EC_SMB_DA2 15,17,30,41,44 EC_SMB_CK2 EC_SMB_CK2 79 EC_SMB_CK2/SCL1/GPIO46 SYSON/GPIO56 95 SYSON SYSON 42,43,51
R490 2.2K_0402_5%~D 15,17,30,41,44 EC_SMB_DA2 EC_SMB_DA2 80 121 VR_ON VR_ON 41,53,55
EC_SMB_DA2/SDA1/GPIO47 VR_ON/XCLK32K/GPIO57 ACIN
AC_IN/GPIO59 127 ACIN 14,18,37,43,47
SM Bus 2 1
C550 100P_0402_50V8J~D KSO0 @ R2625
@R2625 1 2 0_0402_5%~D KSO0_EC
18,37 PM_SLP_S3# @ R513 1 2 0_0402_5%~D PM_SLP_S3#_R 6 100 PCH_RSMRST# PCH_RSMRST# 18 KSI0 @R2626
@ R2626 1 2 0_0402_5%~D KSI0_EC
@ R514 1 PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03
18,37 PM_SLP_S5# 2 0_0402_5%~D PM_SLP_S5#_R 14 PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04 101 MXM2_FAN_FB
MXM2_FAN_FB 41
KSO13 @R2627
@ R2627 1 2 0_0402_5%~D KSO13_EC
EC_SMI# 15 102 EC_ON EC_ON 43,48 KSI1 @R2628
@ R2628 1 2 0_0402_5%~D KSI1_EC
20 EC_SMI# PS_ID EC_SMI#/GPIO08 EC_ON/GPXIOA05 3S/4S# KSO5 @R2629
@ R2629 0_0402_5%~D KSO5_EC
46 PS_ID 16 GPIO0A EC_SWI#/GPXIOA06 103 3S/4S# 47 1 2
EC_ESB_CLK @ R496 1 2 0_0402_5%~D EC_ESB_CLK_R 17 104 PCH_PWROK PCH_PWROK 18 KSO2 @R2630
@ R2630 1 2 0_0402_5%~D KSO2_EC
EC_ESB_DAT GPIO0B ICH_PWROK/GPXIOA07 KSI3 @R2631
@ R2631 0_0402_5%~D KSI3_EC
18 GPIO0C GPIO BKOFF#/GPXIOA08 105 BKOFF# 25 1 2
18 SUSPWRDNACK 19 GPO RF_OFF#/GPXIOA09 106 PCH_PWR_EN KSO7 @R2632
@ R2632 1 2 0_0402_5%~D KSO7_EC
MXM2_FAN_PWM SUS_PWR_DN_ACK/GPIO0D PCH_APWROK PCH_PWR_EN 42 KSO15 @R2633
@ R2633 0_0402_5%~D KSO15_EC
41 MXM2_FAN_PWM 25 INVT_PWM/PWM2/GPIO11 GPXIOA10 107 PCH_APWROK 18 1 2
41 SYSTEM_FAN_FB SYSTEM_FAN_FB 28 108 EC_LID_OUT# EC_LID_OUT# 17 KSO14 @R2634
@ R2634 1 2 0_0402_5%~D KSO14_EC
MXM1_FAN_FB FAN_SPEED1/FANFB0/GPIO14 GPXIOA11 KSO4 @R2635
@ R2635 0_0402_5%~D KSO4_EC
41 MXM1_FAN_FB 29 FANFB1/GPIO15 1 2
E51TXD_P80DATA 30 KSO8 @R2636
@ R2636 1 2 0_0402_5%~D KSO8_EC
35 E51TXD_P80DATA E51RXD_P80CLK EC_TX/GPIO16 PM_SLP_S4#_R @ R480 1
35 E51RXD_P80CLK 31 EC_RX/GPIO17 PM_SLP_S4#/GPXIOD01 110 2 0_0402_5%~D PM_SLP_S4# PM_SLP_S4# 18 KSI5 @R2637
@ R2637 1 2 0_0402_5%~D KSI5_EC
43 ON/OFF ON/OFF 32 112 ENBKL KSO12 @R2638
@ R2638 1 2 0_0402_5%~D KSO12_EC
ON_OFF/GPIO18 ENBKL/GPXIOD02 ENBKL 24
44 KB_DET# KB_DET# 34 114 M_THERMAL# KSO6 @R2639
@ R2639 1 2 0_0402_5%~D KSO6_EC
SUSP_LED#/GPIO19 EAPD/GPXIOD03 M_THERMAL# 10,11,12,13
NUM_LED# 36 GPI EC_THERM#/GPXIOD04 115 ACOFF KSO11 @R2640
@ R2640 1 2 0_0402_5%~D KSO11_EC
38 NUM_LED# NUM_LED#/GPIO1A ACOFF 46,47
116 SUSP# SUSP# 9,21,42,43,49,50,51 KSI7 @R2641
@ R2641 1 2 0_0402_5%~D KSI7_EC
SUSP#/GPXIOD05 PBTN_OUT# KSO9 @R2642
@ R2642 0_0402_5%~D KSO9_EC
PBTN_OUT#/GPXIOD06 117 PBTN_OUT# 5,16,18 1 2
B 118 PCIE_WAKE#_EC 1 2 PCIE_WAKE# 18,31,35,43 KSO10 @R2643
@ R2643 1 2 0_0402_5%~D KSO10_EC B
EC_CRY1 EC_PME#/GPXIOD07 @ R467 0_0402_5%~D KSI6 @R2644
@ R2644 0_0402_5%~D KSI6_EC
122 XCLK1 1 2
18 SUSCLK_R @ R511 1 2 0_0402_5%~D EC_CRY2 123 124 +V18R 1 2 KSO3 @R2645
@ R2645 1 2 0_0402_5%~D KSO3_EC
XCLK0 V18R KSI4 @R2646
@ R2646 0_0402_5%~D KSI4_EC
1 2
AGND

C547 4.7U_0603_10V6K~D KSI2 @R2647

@ R2647 1 2 0_0402_5%~D KSI2_EC
GND
GND
GND
GND
GND
1

KSO1 @R2648
@ R2648 1 2 0_0402_5%~D KSO1_EC

R1885 KB930QF-A1_LQFP128_14X14
11
24
35
94
113

69

100K_0402_5% X1 @ 20mil
EC_CRY1 1 2EC_CRY2
02/16-105
2

ECAGND
1 32.768KHZ_12.5PF_9H03200019
1
@ C545 C546
27P_0402_50V8J~D 20P_0402_50V8J~D +3VALW_EC
2 2
1

U44
R1529 EC_ESB_CLK 1 13
ESB_CLK TEST_EN#
47K_0402_5%
30 HDMI_TOGGLE# HDMI_TOGGLE# 2 14 EC_ENVDD EC_ENVDD 24
GPIO00 GPIO08/CAS_DAT
2

RST# 3 15 EN_TPLED# EN_TPLED# 38

RST# GPIO09
2
EC_ESB_DAT 4 16 CP_SEL CP_SEL 47
C623 ESB_DAT GPIO0A
0.1U_0402_25V6K~D USB_PWR_EN# 5 17 PWRSHARE_OE# PWRSHARE_OE# 43
1 36,43 USB_PWR_EN# GPIO01 GPIO0B

24,25 HDMI_IN_SELECT# HDMI_IN_SELECT# 6 18 WLES ON/OFF LED# WLES ON/OFF LED# 38

GPIO02 GPIO0C/PWM0
+3VALW_EC 7 19 EC_AC_BAT#
30,43 HDMI_IN_CAB_DET# GPIO03 GPIO0D/PWM1 EC_AC_BAT# 14

1Mb SPI 45 DYN_TURBO_SEL 8 20 @ R494 1 2 0_0402_5%~D TH_OVERT# 14

GPIO04 GPIO0E/PWM2
9 21 DP_MXM_CARD_SEL

ROM
A 6 DRAMRST_CNTRL_EC GPIO05 GPIO0F/PWM3 DP_MXM_CARD_SEL 28,29 A

1 24 EC_INV_PWM 10 22 LCD_TEST LCD_TEST 25

FSEL# @ R497 1 GPIO06 GPIO10/ESB_RUN#
2 0_0402_5%~D SPI_FSEL# C551
0.1U_0402_25V6K~D 18,24 PCH_ENVDD 11 23 3V_F347_ON 3V_F347_ON 37
GPIO07/CAS_CLK GPIO11/BaseAddOpt
U15
2 60 mil
FRD# @ R500 1 2 0_0402_5%~D SPI_SO 1 8 12 24
GND

CS# VCC GND VCC +3VALW_EC

0.1U_0402_25V6K~D
2 SO HOLD# 7 1
+3VALW 3 6 SPI_CLK_R @ R498 1 2 0_0402_5%~D SPI_CLK C624
WP# SCLK KC3810_QFN24_4X4
4 5 Compal Electronics, Inc.
25

GND SI SPI_FWR# @ R499 1 2 0_0402_5%~D FWR#

MX25L1005AMC-12G_SO8 2 Title

2 1 1 2
SCHEMATIC M/B LA-8321
Size Document Number Rev
@ R1533 @ C626 B
33_0402_5%~D 22P_0402_50V8J~D 4019H5
Date: Wednesday, August 01, 2012 Sheet 40 of 66
5 4 3 2 1
 A B C D E

System Thermal Sensor

Diode circuit s used for skin temp sensor  +3VS
(placed between CPU and MXM).
+3VS

0.1U_0402_25V6K~D
Place C295 close to Q13 as possible. +5VS
1

C1816
SENSOR_DIODE_P1 @R1797
@ R1797 1 2 0_0402_5%~D REMOTE_P1 2
U615

2
10K_0402_5%~D

10K_0402_5%~D
1 1
1

2
C 2 EC_SMB_CK2 R1802 C1857
1 1 VDD SMCLK 8 EC_SMB_CK2 15,17,30,40,44
2 C1815 10K_0402_5%~D 0.1U_0402_25V6K~D
B 1

R1800

R1801
@C1814
@ C1814 470P_0402_50V7K~D 2 7 EC_SMB_DA2
E Q266 2 DP SMDATA EC_SMB_DA2 15,17,30,40,44
100P_0402_50V8J~D
3

1
2 MMBT3904WT1G_SC70-3~D SENSOR_DIODE_N1 @R1796
@ R1796 REMOTE_N1
1 2 0_0402_5%~D 3 6 JSYSFAN

1
DN ALERT
1 1
+3VS 1 2 4 5 40 SYSTEM_FAN_PWM SYSTEM_FAN_PWM 2
THERM#/ADDR GND SYSTEM_FAN_FB 2
40 SYSTEM_FAN_FB 2 1 3 3 G5 5
R1798 4.7K_0402_1%~D EMC1412-A-ACZL-TR_MSOP8 4 6
D65 4 G6
SDMK0340L-7-F_SOD323-2~D MOLEX_53398-0471~D
CONN@

S
45,46,48 MAINPWON 1 3

@ Q274
SSM3K7002FU_SC70-3~D

G
2
40,53,55 VR_ON

+3VS MXM1 Thermal Sensor

0.1U_0402_25V6K~D
+3VS
1 +5VS

C1819
2 SENSOR_DIODE_P2 @ R1806 REMOTE_P2 2
1 2 0_0402_5%~D U616
1
1

C 2 EC_SMB_CK2
1 1 VDD SMCLK 8 EC_SMB_CK2 15,17,30,40,44 2

2
10K_0402_5%~D

10K_0402_5%~D
2 C1817

2
@ C1818 B 470P_0402_50V7K~D 2 7 EC_SMB_DA2 R1811 C1858
E 2 DP SMDATA EC_SMB_DA2 15,17,30,40,44
100P_0402_50V8J~D Q267 10K_0402_5%~D 0.1U_0402_25V6K~D
3

2 1

R1813

R1810
MMBT3904WT1G_SC70-3~D SENSOR_DIODE_N2 @ R1807 1 2 0_0402_5%~D REMOTE_N2 3 6
DN ALERT

1
+3VS 1 2 4 5 JMFAN1

1
THERM#/ADDR GND
1 1
R1808 6.8K_0402_1%~D EMC1412-A-ACZL-TR_MSOP8 40 MXM1_FAN_PWM MXM1_FAN_PWM 2
MXM1_FAN_FB 2
40 MXM1_FAN_FB 2 1 3 3 G5 5
4 4 G6 6
D66

S
45,46,48 MAINPWON 1 3
SDMK0340L-7-F_SOD323-2~D MOLEX_53398-0471~D
@ Q275 CONN@
SSM3K7002FU_SC70-3~D

G
2
40,53,55 VR_ON

+3VS
MXM2 Thermal Sensor
0.1U_0402_25V6K~D

3 +3VS 3
+5VS
1
C1822

SENSOR_DIODE_P3 @R1815
@ R1815 1 2 0_0402_5%~D REMOTE_P3 2
U617

2
10K_0402_5%~D

10K_0402_5%~D
1
1

2
C 2 EC_SMB_CK2 R1820 C1859
1 1 VDD SMCLK 8 EC_SMB_CK2 15,17,30,40,44
2 C1821 10K_0402_5%~D 0.1U_0402_25V6K~D
B 1

R1822

R1819
@C1820
@ C1820 470P_0402_50V7K~D 2 7 EC_SMB_DA2
E Q268 2 DP SMDATA EC_SMB_DA2 15,17,30,40,44
100P_0402_50V8J~D
3

1
2 MMBT3904WT1G_SC70-3~D SENSOR_DIODE_N3 @R1816
@ R1816 1 2 0_0402_5%~D REMOTE_N3 3 6 JMFAN2

1
DN ALERT
1 1
+3VS 2 1 4 5 40 MXM2_FAN_PWM MXM2_FAN_PWM 2
THERM#/ADDR GND MXM2_FAN_FB 2
40 MXM2_FAN_FB 2 1 3 3 G5 5
R1821 15K_0402_5% EMC1412-A-ACZL-TR_MSOP8 4 6
D67 4 G6
SDMK0340L-7-F_SOD323-2~D MOLEX_53398-0471~D
CONN@
D

45,46,48 MAINPWON 1 3

@ Q276
SSM3K7002FU_SC70-3~D
G
2

40,53,55 VR_ON

Pull up resistor
on thermtrip pin SMBUS address
4
4.7k 1111_100xb 4

6.8k 1011_100xb
10k 1001_100xb DELL CONFIDENTIAL/PROPRIETARY
15k 1101_100xb
Compal Electronics, Inc.
22k 0011_100xb PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
33k 0111_100xb BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC M/B LA-8321
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
4019H5
Date: Wednesday, August 01, 2012 Sheet 41 of 66
A B C D E
 A B C D E

+5VALW to +5VS +3VALW to +3VMXM Transfer

+3VALW +3VMXM
+5VALW +5VS Q18
Q26 SI4800BDY-T1-E3_SO8~D 40mil(1A)
SI4800BDY-T1-E3_SO8~D 8 1
8 1 1 7 2

2
10U_0805_25V6K~D

0.1U_0402_25V6K~D
7 2 C601 6 3 1 1

2
10U_0805_25V6K~D

1U_0603_25V6-K~D
1 1 6 3 1 1 10U_0805_25V6K~D 5 C602 C603 R534
5 C599 C600 470_0603_5%
C597 C598 R532 2

4
10U_0805_25V6K~D 10U_0805_25V6K~D 470_0603_5% 2 2

1
2 2 2 2

1
R535
200K_0402_5% +3VMXM_D
1 +5VS_D B+_BIAS 1 2 +3VMXM_GATE 1
D D

3
0.1U_0603_50V7K~D
B+_BIAS 1 2 D

1
0.1U_0603_50V7K~D
R533 DGPU_PWR_EN# 2 1 @ 5 SUSP
G G

C605
102K_0402_1% 1 2 SUSP R1485
D
1

@ G 0_0402_5%

C604
SUSP 2 R1482 S S S

4
G Q27 Q29A 2
0_0402_5% Q29B
S 2 2N7002E-T1-E3_SOT23-3 DMN66D0LDW-7 DMN66D0LDW-7
3

Q28
2N7002E-T1-E3_SOT23-3

+3VALW to +3V_PCH
+3VALW +3V_PCH
+5VALW to +5VMXM Transfer
+5VALW +5VMXM
+3VALW to +3VS @ PJP38 Q19
SI4800BDY-T1-E3_SO8~D
2 2 1 1 100mil(2.5A)
8 1
+3VALW +3VS JUMP_43X118 7 2
1

2
10U_0805_25V6K~D

0.1U_0402_25V6K~D
Q30 C611 6 3 1 1
SI4800BDY-T1-E3_SO8~D Q31 10U_0805_25V6K~D 5 C610 C612 R537
8 1 SI4800BDY-T1-E3_SO8~D 470_0603_5%
2
7 2 8 1

4
2 2
1 1 6 3 1 1 7 2

1
5 1 1 6 3 1 1
C606 C607 C608 C609 5 R539
10U_0805_25V6K~D 10U_0805_25V6K~D 10U_0805_25V6K~D 1U_0603_25V6-K~D C620 C619 C618 C622 200K_0402_5%
4

2 2 2 2 10U_0805_25V6K~D 10U_0805_25V6K~D 10U_0805_25V6K~D 1U_0603_25V6-K~D B+_BIAS 1 2 +5VMXM_GATE +5VMXM_D

4
2 2 2 2

0.1U_0603_50V7K~D
1 @
D D

3
C614
R1486
2 B+_BIAS 1 2 DGPU_PWR_EN# 2 0_0402_5% 5 SUSP 2
G G
0.1U_0603_50V7K~D

R538 B+_BIAS 1 2
2

0.1U_0603_50V7K~D
102K_0402_1% 1 R550
D
1

@ 102K_0402_1% 1 S S
D

4
1
C613

SUSP 2 R1483 @ Q36A Q36B

C621
G 0_0402_5% PCH_PWR_EN# 2 R1488 DMN66D0LDW-7 DMN66D0LDW-7
S 2 G 0_0402_5%
3

Q32 S 2

3
2N7002E-T1-E3_SOT23-3 Q35
2N7002E-T1-E3_SOT23-3

+1.5V To +1.5VS
+1.5VS
B+_BIAS +1.5V Q20
AO4728L_SO8~D
8 1
1

10U_0805_25V6K~D

0.1U_0402_25V6K~D

7 2
R540 6 3 1 1
C615

C616

100K_0402_5% 5
+3VALW +5VALW
2

2 2 +5VALW

D
1

1
0.1U_0603_50V7K~D

1
SUSP 2 Q37 R1484

1
C617

G SSM3K7002FU_SC70-3~D 100K_0402_5% @ R556

S 10K_0402_5%~D R551
3

2 100K_0402_5% R544
2

100K_0402_5%

2
PCH_PWR_EN#

2
22 PCH_PWR_EN# SUSP
D

1
3 D 3

1
40 PCH_PWR_EN 2 Q41
G 2N7002E-T1-E3_SOT23-3 9,21,40,43,49,50,51 SUSP# 2 Q40

0.1U_0603_50V7K~D
S G 2N7002E-T1-E3_SOT23-3

3
1

0.1U_0603_50V7K~D
1 S

3
1
R553 @ 1

C628
100K_0402_5% R552 @

C630
+1.5V 100K_0402_5%
2

2
+1.5V_CPU_VDDQ +0.75VS 2

2
1

R555
1
1

470_0402_5%
R1479 R624
2

+1.5V_D 220_0402_5% 22_0603_5%

2

+5VALW
2
+1.5V_CPU_VDDQ_CHG

D
1

+DDR_CHG

2
SYSON# 2 Q42 +5VALW
G SSM3K7002FU_SC70-3~D R543
S 100K_0402_5%
3

1
1
R542 DGPU_PWR_EN#
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

100K_0402_5%
D D

2
1

SYSON#
D

1
Q204

Q78

5,9 RUN_ON_CPU1.5VS3# 2 2 D

1
G G 19 DGPU_PWR_EN 2 Q39
+1.5VS +VCCP +3V_PCH +3VS S S 2 Q38 G 2N7002E-T1-E3_SOT23-3
40,43,51 SYSON
3

0.1U_0603_50V7K~D

0.1U_0603_50V7K~D
G 2N7002E-T1-E3_SOT23-3 S

3
1
1 S 1
3
1

@ R549 @
C629

C631
4 R545 R546 R547 R548 R554 100K_0402_5% 4
10K_0402_5%~D
470_0402_5% 470_0402_5% 470_0402_5% 470_0402_5% 2 2

2
2

+3V_D +3VS_D
+1.5VS_D +VCCP_D

D D D D
DELL CONFIDENTIAL/PROPRIETARY
6

SUSP SUSP PCH_PWR_EN# SUSP

2
G G
5 2
G G
5 Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
S S S S TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL. THIS DOCUMENT MAY NOT
SCHEMATIC M/B LA-8321
1

Q33A Q33B Q34A Q34B BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
DMN66D0LDW-7 DMN66D0LDW-7 DMN66D0LDW-7 DMN66D0LDW-7 NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
4019H5
Date: Wednesday, August 01, 2012 Sheet 42 of 66
A B C D E
 5 4 3 2 1

H1 H2 H3 H4 H5 H6 H7 H8 H9 H10 H11 H12 H13 H14 H15 H16 H17 H18 H19 H20
H_3P5 H_3P0 H_3P0 H_3P3 H_3P0 H_3P8 H_3P0 H_3P8 H_3P8 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P8 H_3P3 H_3P3 H_3P0 H_3P3
Power Button from IO/B PWR BTN +3VALW_EC

@ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @
38 ON/OFFBTN#

1
02/16-107

2
R502
ON/OFF switch (TOP) H21 H22 H24 H25 H26 H27 H28 H31 H33 H35 FD1 FD2 FD3 FD4 ZZZ
100K_0402_5% H_3P3 H_3P3 H_3P0 H_2P5 H_3P8 H_3P8 H_2P5 H_2P1N H_4P2X2P1N H_1P2

1
@ SW1 D20 @ @ @ @

1
EVQPLHA15_4P 2 ON/OFF ON/OFF 40 @ @ @ @ @ @ @ @ @ @

1
1 3 ON/OFFBTN# 1 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80
3 51ON# 51ON# 46 PCB

3
D D
2 4 1
BAV70W_SOT323-3 +5VALW
C555 @ D64
6
5

IO Board CONN 1
0.1U_0402_25V6K~D
2 PJSOT24C_SOT23-3 6251VDD

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D
51ON#
2 2 2

C1860

C1861

C1862
JIO1
R2658 @
ON/OFF switch (BOT) D 1 1 2 2

1
100K_0402_5% 3 4 USB20_N11
1 1 1 3 4 USB20_N11 19
@ SW2 40,48 EC_ON EC_ON 2 Q43 5 6 USB20_P11
D 5 6 USB20_P11 19

3
EVQPLHA15_4P G 2N7002E-T1-E3_SOT23-3 Q305B @ 7 8

2
7 8

2
1 3 S 5 9 10 ESATA/USB_OFF
ESATA/USB_OFF 40

3
R488 G 9 10
D 11 11 12 12

6
2 4 @ Q305A 13 14
10K_0402_5%~D 13 14 PWRSHARE_OE#
40,45 BATT_TEMP 2 S 15 16 PWRSHARE_OE# 40

4
G DMN66D0LDW-7 PCH_SMBCLK 15 16
5,10,11,12,13,16,17,34,35 PCH_SMBCLK 17 18 IO_DET# 17
6
5

1
PCH_SMBDATA 17 18 USB_OC4#
5,10,11,12,13,16,17,34,35 PCH_SMBDATA 19 19 20 20 USB_OC4# 16,19
S PCIE_WAKE# 21 22 ESATA_DETECT#
ESATA_DETECT# 16,19

1
DMN66D0LDW-7 18,31,35,40 PCIE_WAKE# EXPCLK_REQ# 21 22 SYSON
17 EXPCLK_REQ# 23 23 24 24 SYSON 40,42,51
9,21,40,42,49,50,51 SUSP# SUSP# 25 26 USB_OC1#
25 26 USB_OC1# 16,19
USB_PWR_EN# 27 28 USB_OC0#
36,40 USB_PWR_EN# 27 28 USB_OC0# 16,19
PLT_RST# 29 30
D 5,16,19,31,35,40 PLT_RST# 29 30

1
CLK_REQ# 31 32 CLK_PCIE_EXP#
17 CDCLK_REQ# 31 32 CLK_PCIE_EXP# 17
2 Q306 @ 33 34 CLK_PCIE_EXP
14,18,37,40,47 ACIN 33 34 CLK_PCIE_EXP 17
G 2N7002E-T1-E3_SOT23-3 CLK_PCIE_CD 35 36
17 CLK_PCIE_CD 35 36
S CLK_PCIE_CD# 37 38 PCIE_PRX_DTX_N5 PCIE_PRX_DTX_N5 17
17 CLK_PCIE_CD#

3
37 38 PCIE_PRX_DTX_P5
39 39 40 40 PCIE_PRX_DTX_P5 17
PCIE_PTX_DRX_P4 41 42
17 PCIE_PTX_DRX_P4 41 42
PCIE_PTX_DRX_N4 43 44 PCIE_PTX_DRX_N5 PCIE_PTX_DRX_N5 17
17 PCIE_PTX_DRX_N4 43 44
45 46 PCIE_PTX_DRX_P5 PCIE_PTX_DRX_P5 17
C PCIE_PRX_DTX_P4 45 46 C
17 PCIE_PRX_DTX_P4 47 47 48 48
PCIE_PRX_DTX_N4 49 50 USB20_N1
17 PCIE_PRX_DTX_N4 49 50 USB20_N1 19
51 52 USB20_P1
51 52 USB20_P1 19
USB20_N0 53 54
19 USB20_N0 53 54
USB20_P0 55 56 USB20_N9
19 USB20_P0 55 56 USB20_N9 19
57 58 USB20_P9
57 58 USB20_P9 19
SATA_PRX_DTX_P4 59 60
16 SATA_PRX_DTX_P4 59 60
SATA_PRX_DTX_N4 61 62 +1.5VS
16 SATA_PRX_DTX_N4 61 62
63 63 64 64 +3VALW
SATA_PTX_DRX_N4 65 66 +3VS
16 SATA_PTX_DRX_N4 SATA_PTX_DRX_P4 65 66
16 SATA_PTX_DRX_P4 67 67 68 68
69 69 70 70

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D
2 2 2

C1863

C1864

C1865
71 GND GND 72
73 GND GND 74
1 1 1
CONN@ FOX_QT00070A-1120-9H~D

IO Board CONN 2
+HDMI_IN_5VS

ACES_87152-30051
B B
1 1
30 HDMI_IN_SW_HPD 2 2
30,40 HDMI_IN_CAB_DET# 3 3
30 HDMI_SW_DAT 4 4
30 HDMI_SW_CLK 5 5
6 6
30 HDMI_IN_CK- 7 7
30 HDMI_IN_CK+ 8 8
9 9
30 HDMI_IN_D1- 10 10
30 HDMI_IN_D1+ 11 11
12 12
30 HDMI_IN_D2+ 13 13
30 HDMI_IN_D2- 14 14
15 15
30 HDMI_IN_D0+ 16 16
30 HDMI_IN_D0- 17 17
18 18
19 USB3TP1 19 19
19 USB3TN1 20 20
21 21
19 USB3RP1 22 22
19 USB3RN1 23 23
24 24
19 USB3TP2 25 25
19 USB3TN2 26 26
27 27
19 USB3RP2 28 28 GND2 32
19 USB3RN2 29 29
30 30 GND1 31
A A

JIO2CONN@

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC M/B LA-8321
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
4019H5
Date: Wednesday, August 01, 2012 Sheet 43 of 66
5 4 3 2 1
 5 4 3 2 1

+3VS

1 1 1 1

0.1U_0402_10V6K~D
C2014

0.1U_0402_10V6K~D
C2015

0.1U_0402_10V6K~D
C2013

10U_0603_6.3V6M~D
CD75
2 2 2 2
@ @ @ @

U628 @
11 9 KSO13_VPK
AVCC1 A8/VeREF+/P5.0 KSO14_VPK
A9/VeREF-/P5.1 10
15 57 VPK_XTAL25_IN
D DVCC1 XT2IN/P5.2 VPK_XTAL25_OUT @ RH137 D
40 DVCC2 XT2OUT/P5.3 58 2 1
12 KSO15_VPK 1M_0402_5%~D
C2011 @2 XIN/P5.4
1 0.47U_0603_16V7K~D 17 VCORE XOUT/P5.5 13 @
YH3 24MHZ_12PF_7V24000020

12P_0402_50V8J~D

12P_0402_50V8J~D
C2012 @2 1 0.22U_0402_16V7K~D 55 1 VPK_A0 KSI[0..7]
V18 CB0/A0/P6.0 38,39,40 KSI[0..7]
2 VPK_A1 1 3 @
CB1/A1/P6.1 1 3

CH101
KSI0_VPK 18 3 VPK_A2 @ 1 1 KSO[0..15]
P1.0/TA0CLK/ACLK CB2/A2/P6.2 GND GND 38,40 KSO[0..15]

CH100
KSI1_VPK 19 4 VPK_A3
KSI2_VPK P1.1/TA0.0 CB3/A3/P6.3 VPK_A4
20 P1.2/TA0.1 CB4/A4/P6.4 5
KSI3_VPK VPK_A5 2 4 JKB
21 P1.3/TA0.2 CB5/A5/P6.5 6
KSI4_VPK VPK_A6 2 2
22 P1.4/TA0.3 CB6/A6/P6.6 7 62 GND2 GND4 64
KSI[0..7] KSI5_VPK 23 8 VPK_A7 61 63
38,39,40 KSI[0..7] P1.5/TA0.4 CB7/A7/P6.7 GND1 GND3
KSI6_VPK 24
KSO[0..15] KSI7_VPK P1.6/TA1CLK/CBOUT VPK_GPIO_0 @ T207
@T207 PAD~D KB_DET# KB_DET#
38,40 KSO[0..15] 25 P1.7/TA1.0 TDO/PJ.0 60 40 KB_DET# 59 59 60 60
61 VPK_GPIO_1 @T208
@ T208 PAD~D KSO7 57 58 KSO7
KSO0_VPK TDI/TCLK/PJ.1 @T209
@ T209 PAD~D KSO0 57 58 KSO0
26 P2.0/TA1.1 TMS/PJ.2 62 55 55 56 56
KSO1_VPK 27 63 @T210
@ T210 PAD~D KSI1 53 54 KSI1
KSO2_VPK P2.1/TA1.2 TCK/PJ.3 KSI7 53 54 KSI7
28 P2.2/TA2CLK/SMCLK 51 51 52 52
KSO3_VPK 29 50 KSO9 49 50 KSO9
P2.3/TA2.0 DP/PU.0 USB20_P13 19 49 50
KSO4_VPK 30 52 KSI6 47 48 KSI6
P2.4/TA2.1 DM/PU.1 USB20_N13 19 47 48
KSO5_VPK 31 51 R2 @1 2 100_0402_5%~D +3VS KSI5 45 46 KSI5
KSO6_VPK P2.5/TA2.2 PUR KSO3 45 46 KSO3
32 P2.6/RTCCLK/DMAE0 43 43 44 44
KSO7_VPK 33 64 R227 @2 1 47K_0402_5%~D +3VS KSI4 41 42 KSI4
P2.7/UCB0STE/UCA0CLK RST#/NMI/SBWTDIO @T211
@ T211 PAD~D KSI2 41 42 KSI2
TEST/SBWTCK 59 39 39 40 40
KSO8_VPK 34 W=40mils KSO1 37 38 KSO1
KSO9_VPK P3.0/UCB0SIMO/UCB0SDA R1607 @1 KSI3 37 38 KSI3
35 P3.1/UCB0SOMI/UCB0SCL VBUS 53 2 0_0603_5%~D +5VS 35 35 36 36
KSO10_VPK 36 54 R1578 @1 2 0_0603_5%~D +3VS KSI0 33 34 KSI0
KSO11_VPK P3.2/UCB0CLK/UCA0STE VUSB KSO13 33 34 KSO13
37 P3.3/UCA0TXD/UCA0SIMO 31 31 32 32
KSO12_VPK 38 KSO5 29 30 KSO5
P3.4/UCA0RXD/UCA0SOMI 29 30

0.1U_0402_16V4Z~D

1U_0805_10V7

0.1U_0402_16V4Z~D
@ 2 @ 1 1 @ KSO2 27 28 KSO2
27 28

C294

C1754

C1755
PAD~D T68 @ 41 KSO4 25 26 KSO4
VPK_SMB_DA1 P4.0/PM_UCB1STE/PM_UCA1CLK KSO8 25 26 KSO8
42 P4.1/PM_UCB1SIMO/PM_USB1SDA VSSU 49 23 23 24 24
C VPK_SMB_CK1 KSO6 KSO6 C
43 P4.2/PM_UCB1SOMI/PM_UCB1SCL 21 21 22 22
1 2 2 KSO11 KSO11
44 P4.3/PM_UCB1CLK/PM_UCA1STE DVSS1 16 19 19 20 20
PAD~D T71 @ 45 39 KSO10 17 18 KSO10
PAD~D T70 @ P4.4/PM_UCA1TXD/PM_UCA1SIMO DVSS2 KSO12 17 18 KSO12
46 P4.5/PM_UCA1RXD/PM_UCA1SOMI 15 15 16 16
PAD~D T69 @ 47 14 KSO14 13 14 KSO14
PAD~D T66 @ P4.6/PM_NONE AVSS1 KSO15 13 14 KSO15
48 P4.7/PM_NONE AVSS2 56 11 11 12 12
PAD~D T65 @ 65 9 10
GND_PAD 9 10
7 7 8 8
MSP430F5508IRGCR_VQFN64_9X9 Pin1 & Pin2 5 5 6 6
Loop on KB side 3 3 4 4
(GND_Return) 1 1 2 2

FOX_GB1SV301-160K-8H
TYCO_2-2041070-6~D
Analog Keys CONN@

GND 28
CIS link OK
GND 27
26 26
25 25 KB_LED_R1_DRV# +3VS
24 24 KB_LED_G1_DRV#
KB_LED_R1_DRV# 39
23 23 KB_LED_B1_DRV#
KB_LED_G1_DRV# 39
22 22 KB_LED_R2_DRV#
KB_LED_B1_DRV# 39
VPK_SMB_CK1 @ R2583
21 21 KB_LED_R2_DRV# 39 1 2 2.2K_0402_5%~D
KB_LED_G2_DRV# VPK_SMB_DA1 @ R2584 2 2.2K_0402_5%~D
20 20 KB_LED_B2_DRV#
KB_LED_G2_DRV# 39 1
19 19 KB_LED_R3_DRV#
KB_LED_B2_DRV# 39
18 18 KB_LED_G3_DRV#
KB_LED_R3_DRV# 39
17 17 KB_LED_B3_DRV#
KB_LED_G3_DRV# 39 +3VS
16 16 KB_LED_R4_DRV#
KB_LED_B3_DRV# 39 +5VS
15 15 KB_LED_G4_DRV#
KB_LED_R4_DRV# 39
@ F6
14 14 KB_LED_B4_DRV#
KB_LED_G4_DRV# 39
0.5A_13.2V_NANOSMDC050F-13.2-2
B 13 13 KB_LED_B4_DRV# 39
+5VS_VPK B
12 12 1 2

2
11 11 1

G
VPK_A1 @
10 10 VPK_A0
2
@ R198
1
0_0603_5%
+3VS C1753
9 9 VPK_A3 0.1U_0402_16V4Z VPK_SMB_CK1
8 8 VPK_A2 2 14,40,45 EC_SMB_CK1 6 1 VPK_SMB_CK1 32
7 7

D
1

S
Q304A
6 6 VPK_A7 @ R199 DMN66D0LDW-7 @
5 5

5
VPK_A5
4 4 0_0603_5%

G
VPK_A4
3 3
2 2
2

VPK_A6 KSO0 @ R2601 0_0402_5%~D KSO0_VPK VPK_SMB_DA1

1 1 1 2 14,40,45 EC_SMB_DA1 3 4 VPK_SMB_DA1 32
2 10K_0402_5%~D
2 10K_0402_5%~D

2 10K_0402_5%~D
2 10K_0402_5%~D

2 10K_0402_5%~D
2 10K_0402_5%~D

2 10K_0402_5%~D
2 10K_0402_5%~D

KSI0 @ R2602 1 2 0_0402_5%~D KSI0_VPK

S
CONN@ JKB2 KSO13@ R2603 1 2 0_0402_5%~D KSO13_VPK Q304B
KSI1 @ R2604 1 2 0_0402_5%~D KSI1_VPK DMN66D0LDW-7 @
KSO5 @ R2605 1 2 0_0402_5%~D KSO5_VPK
KSO2 @ R2606 1 2 0_0402_5%~D KSO2_VPK
KSI3 @ R2607 1 2 0_0402_5%~D KSI3_VPK
KSO7 @ R2608 1 2 0_0402_5%~D KSO7_VPK
KSO15@ R2609 1 2 0_0402_5%~D KSO15_VPK @ R2662 1 2 0_0402_5%~D VPK_SMB_CK1
15,17,30,40,41 EC_SMB_CK2
KSO14@ R2610 1 2 0_0402_5%~D KSO14_VPK
KSO4 @ R2611 1 2 0_0402_5%~D KSO4_VPK @ R2663 1 2 0_0402_5%~D VPK_SMB_DA1
15,17,30,40,41 EC_SMB_DA2
KSO8 @ R2612 1 2 0_0402_5%~D KSO8_VPK
KSI5 @ R2613 1 2 0_0402_5%~D KSI5_VPK
KSO12@ R2614 1 2 0_0402_5%~D KSO12_VPK
02/20-108
R1823 1
R1824 1

R1825 1
R1839 1

R1840 1
R1843 1

R1838 1
R1837 1

KSO6 @ R2615 1 2 0_0402_5%~D KSO6_VPK

KSO11@ R2616 1 2 0_0402_5%~D KSO11_VPK
KSI7 @ R2617 1 2 0_0402_5%~D KSI7_VPK
KSO9 @ R2618 1 2 0_0402_5%~D KSO9_VPK
@@ @@ @@ @@ KSO10@ R2619 1 2 0_0402_5%~D KSO10_VPK
KSI6 @ R2620 1 2 0_0402_5%~D KSI6_VPK
KSO3 @ R2621 1 2 0_0402_5%~D KSO3_VPK
A KSI4 @ R2622 0_0402_5%~D KSI4_VPK A
2 1 +3VS 1 2
@ R196 0_0603_5% KSI2 @ R2623 1 2 0_0402_5%~D KSI2_VPK
KSO1 @ R2624 1 2 0_0402_5%~D KSO1_VPK

DELL CONFIDENTIAL/PROPRIETARY
1

@ R197
0_0603_5%
Compal Electronics, Inc.
2

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, Title
TRADE SECRET, AND OTHER PROPRIETARY INFORMATION
OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN SCHEMATIC M/B LA-8321
AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS Size Document Number Rev
SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT B
DELL'S EXPRESS WRITTEN CONSENT. 4019H5
Date: Wednesday, August 01, 2012 Sheet 44 of 66
5 4 3 2 1
 5 4 3 2 1

CPU OTP

1
@ @

PL1
PD1
PESD24VS2UT_SOT23-3
PD2
PESD24VS2UT_SOT23-3
PH1 under CPU botten side :
BATT+
C8B BPH 853025_2P~D
1 2
CPU thermal protection at 93 degree C
BATT++ Recovery at 50 degree C

3
BATT+

D PL2
C8B BPH 853025_2P~D
D
1 2 BATT++ VL
VL

100P_0402_50V8J~D
1

2
100K_0402_1%_TSM0B104F4251RZ
100P_0402_50V8J~D
1

PC4
PC3 PR1
1000P_0402_50V7K~D EC_SMB_CK1 14,40,44
PC1

PC2 28K_0402_1%
2

2
0.01U_0402_25V7K~D
2

PR4
EC_SMB_DA1 14,40,44

1
1
47K_0402_1%~D
PH1 1 2

PJPB1 battery connector Place clsoe to EC pin

BATT_TEMP 40,43

2
JMBTY1
1 1
SMART 2 2 VL
3
Battery: 3
4 4 PR8 100_0402_5%~D MAINPWON 41,46,48
5 CLK_SMB 1 2
5 DAT_SMB
6 1 2
1.BATT++
6 BATT_PRS
7 1 2 1 2
7 SYS_PRES PR9 +3VALW_EC PR7
2.BATT++ 8 8

8
9 100_0402_5%~D PR3 PR6 13.7K_0402_1%
9 D

6
3.BATT++ 10 100_0402_5%~D 10K_0402_5%~D 1 2 3

P
10 PR5 + PQ109A
11 1 2
4.BATT++ 11
12 12 0_0402_5%~D TM_REF1 2 -
O G DMN66D0LDW-7_SOT363-6~D

G
5.CLK_SMB 13 13
14
@ 6251VDD
PU1A
LM393DG_SO8 S
6.DAT_SMB
2

1
GND
C GND 15 C
7.BATT_PRS

1000P_0402_50V7K
16.9K_0402_1%
SUYIN_200275GR013G10PZR~D
8.SYS_PRES

1
@ PR170

0.22U_0603_25V7K~D
1

1
PR10
9.BAT_SLERT
20K_0402_1%~D 2 1
VL

PC6

PC7
10.GND PR11

1
100K_0402_1%~D
11.GND

2
3.2V
12.GND
PR12

1
100K_0402_1%~D
13.GND @ PR171

2
34K_0402_1%

2
PQ2
TP0610K-T1-E3_SOT23-3
+3VALW

3 1
B+ B+_BIAS
0.22U_0603_25V7K~D
100K_0402_1%~D

B B
1

2
@ PR192
1

1
PR13

PR184 2 1

2
@ PC8

@ PC9 10K_0402_5%~D 0_0402_5% @ PC144

0.1U_0603_50V7K~D +COINCELL 1000P_0402_50V7K~D
2

2
2

1
PR14 VL @ PR186
+5VALW 22K_0402_1%~D 0_0402_5%~D
1

8
1 2 @ 2 1 ADP_I 40,47
PR183
+CHGRTC PR31 5

P
+
2

1K_0402_5% 40 Dyn_turbo_SEL 2 1 7 @ PR185

PR15 O 0_0402_5%~D
- 6

G
100K_0402_1%~D JRTC1 0_0402_5% 2 1 AC_SEL 40
2

+COINCELL 1 PU1B
+COINCELL

4
@ PR16 1 @ PR196
D 2
1

2
1

0_0402_5%~D 0_0402_5%~D LM393DG_SO8

D

1
2 1 2 PD3 3 5,40 H_PROCHOT# 2 1
48 SPOK G
G PQ3 BAT54CW_SOT323-3 4 5 @ PC5
G G 1000P_0402_50V7K~D
.1U_0402_16V7K~D

S 2N7002KW 1N SOT323-3
3

2
1

PC10

MOLEX_53398-0271 PQ109B
S DMN66D0LDW-7_SOT363-6~D
1

4
+RTCVCC
2

@
1

PC17
1U_0603_25V6-K~D
2

A
RTC Battery A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2009/2/6 Deciphered Date 2010/2/6 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC M/B LA-8321
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS A3 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, August 01, 2012 Sheet 45 of 66
 A B C D

+5VALW +3VALW

PL4

BAV99W-7-F
FBMA-L11-160808-601LMT_2P PL3
2 1 DOCK_PSID C8B BPH 853025_2P~D VIN
1 2

2
PD4
ADPIN

2.2K_0402_5%~D
@ PR17
PL5 1 2

2
rating current = 18A C8B BPH 853025_2P~D Add PR111 for lot 6 0_0402_5%
DC_IN_S1 1 2 hiccup mode issue

PR18
JDCIN1
5 PR19

1
DETECT

1000P_0402_50V7K~D

1000P_0402_50V7K~D
9 33_0402_5%~D

1
GND_4

2
100P_0402_50V8J~D

100P_0402_50V8J~D
DOCK_PSID

S
DC+_1 1 1 3 1 2 PS_ID 40

1
1 1

8 PR111
GND_3

PC11

PC12

PC13

PC14
2 20K_0402_1%~D PQ4
DC+_2 FDV301N_NL_SOT23-3~D

G
2

2
7 3 +5VALW

1
GND_2 DC-_1

2
PR20 +5VALW
6 4 100K_0402_1%~D
GND_1 DC-_2

10K_0402_1%~D
1

2
1
2

1
C

PR21
FOX_JPD113D-DB570-7F
2 PQ5
B MMBT3904WT1G

2
E @PD6
@ PD6

2
PR22 BAV99W-7-F

1
@ 15K_0402_1%~D

1
PD5 @ PR24
@PR24
@PR23
@ PR23 SM24_SOT23 1 2

1
1K_1206_5%~D
1 2 10K_0402_1%~D
@ PQ6
@PQ6
TP0610K-T1-E3_SOT23-3
VIN
@PR25
@ PR25

2
VIN 1K_1206_5%~D @ PD7
@PD7
B+ PD8
1 2 2 1 3 1
ACIN LL4148_LL34-2
@PR26
@ PR26 RLS4148_LL34-2
Precharge detector Pre_V 12/12
1K_1206_5%~D

1
PD9 PR126
1 2 Min. typ. Max. BATT+
100K_0402_5%

2 1 @ PR164
@PR164 PR32 PR33 0_0402_5%
VS
1

1
100K_0402_5%
@ PR28

@ PR27
@PR27 @ PR29 0_0402_5% 68_1206_5%~D 68_1206_5%~D
H-->L 14.589V 14.84V 15.243V 1 2
1

1K_1206_5%~D LL4148_LL34-2 1 2

2
2 2

VIN1
1 2
L-->H 15.562V 15.97V 16.388V PQ9 @PQ38
@ PQ38
TP0610K-T1-E3_SOT23-3 TP0610K-T1-E3_SOT23-3
2

2
BATT ONLY
2

3 1 3 1
Precharge detector PC16

1
100K_0402_5%
0.1U_0603_50V7K~D
Min. typ. Max.
1

1
@ PR30

PR35
1

100K_0402_5% @PR127
@ PR127
H-->L 4.92V 6.1V 5.25V 100K_0402_5%

2
@ PD18 PR36 PC15
L-->H 6.062V 6.244V 6.43V

2
40,47 ACOFF 2 22K_0402_5%~D 0.22U_0603_25V7K~D
1 2

2
1 2 43 51ON# 1 2
+5VALW 3
@ PQ8
@PQ8
RB715F_SOT323-3 DTC115EUA_SC70-3
@PQ7
@ PQ7
3

DTC115EUA_SC70-3 2 +CHGRTC @ PU10 PR197 @PR138

@ PR138

1U_0603_25V6K
@PR300
@ PR300 MAX1615EUK+_SOT23-5~D @ 200_0805_5% 22K_0402_5%~D
0_0603_5%~D
IN 1 1 2 43 51ON# 1 2
+3VLP 1 2 3 OUT

1
3

PC147
4.7U_0603_6.3V6K
1

PC146
5

2
#SHDN
4 "US California Energy Efficiency"

GND
5/3+
(Reserve 130mW for no battery mode)

2
@

2
3 3

PR119
0.004_2512_1% PL6 VL
2 1 B+
100K_0402_1%~D

SMB3025500YA_2P @PR198
@ PR198 2.2M_0402_5%~D
PR202

B+_MXM 1 4 1 2 B+

1
1

2 3 VS @PR203
@ PR203
@ 499K_0402_1%~D
1 8
100U_25V_M~D

@ PD10
@PD10

2
+ 41,45,48 MAINPWON
PC20

2 3
P
2

0.01U_0402_25V7K~D
MXM_CUR_VIN+ 15 1 1 O

1
47 ACON 3 2
-
1

1
G

PC149
0.1U_0603_25V7K~D

@PR200
@ PR200
PC148

MXM_CUR_VIN- 15 RB715F_SOT323-3 @PU18A

@ PU18A @ PR204
@PR204 499K_0402_1%~D
4

LM393DR_SO8 191K_0402_1%~D
2

2
@

PRG++ 2

2
@

@PR199
@ PR199

SSM3K7002FU_SC70-3~D
34K_0402_1%~D @PR201
@ PR201
2 1 D 2 1 PACIN

1
PACIN 47
For HW request, this is MXM power net 47K_0402_5%~D

1
1000P_0402_50V7K~D

+CHGRTC 2
1

PQ11
PC206

G
S
3
2

PR120 @ @ 2 +5VALW
0.004_2512_1% PL7
SMB3025500YA_2P
4
B+_MXM1 @PQ10
@ PQ10
B+
4
1 4 1 2
DTC115EUA_SC70-3
2 3 3
1
100U_25V_M~D

+
PC22

2 MXM1_CUR_VIN+ 15 Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2009/2/6 Deciphered Date 2010/2/6 Title
MXM1_CUR_VIN- 15
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC M/B LA-8321
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
4019H5 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, August 01, 2012 Sheet 46 of 66
A B C D
 A B C D

@PD11
@ PD11
P2
PQ12
B+ @ PD12
@PD12
B540C-13-F_SMC2~D 2 1 AOD403_TO252-3~D Iada=0~16.923A(330W) 1 2 B540C-13-F_SMC2~D

D
@PJP11
@ PJP11 JUMP_43X118

D
ADP_I = 19.9*Iadapter*Rsense

S
3 2
PQ14 3 2
AOD403_TO252-3~D 2 1
2 1

G
D
PR45 PQ13

G
S

1
VIN 2 3 P3 0.005_2512_1% PL17 PL8 CHG_B+ AOD403_TO252-3~D

1
1.1UH_LFA915AY-H-1R1M=P3_4.07A_20%~D HCB2012KF-121T50_0805
PQ15 1 4 1 2 1 2 PQ16
AOD403_TO252-3~D AOD403_TO252-3~D
G

2200P_0402_50V7K~D
0.1U_0603_50V7K~D
4.7U_0805_25V6-K~D

4.7U_0805_25V6-K~D
2 3 CSIN

D
1
3.3_1210_5%~D

S
1 1

PQ17 3 2 CSIP 3 2
1

AOD403_TO252-3~D
VIN VIN1

1
PR130

PC25

PC26
RB751V40 SC76
D

1
5.075V

PC27

PC28
@PR46
@ PR46 @PR49
@ PR49 PR51

G
S

5600P_0402_25V7K~D
200K_0402_1%~D
0.1U_0603_50V7K~D
2 3 0_0402_5%~D 0_0402_5% 47K_0402_1%~D

1
1

PR48
1 2 1 2 1 2
2

VIN

2
200K_0402_1%~D

PC24
6251VDD

1
2.2U_0603_10V7K~D
G

2
1

2
PC30

PD13
@PD15
@ PD15
1

1
1

1
3.3_1210_5%~D

ACSETIN PR50 1SS355TE-17_SOD323-2

PR131

191K_0402_1%~D 1 2 ACOFF ACOFF 40,46

3

1000P_0402_25V7K
PC29

2
47K PD14 ACSETIN @PR55
@ PR55
2

1 1
10_1206_5%~D
1SS355 SOD323 PR54 200K_0402_1%~D
2

1
PC31
2 47K 1 2 10K_0402_1%~D 1 2 VIN

1
PR52
PR47

@PD16
@ PD16
PR56 PR53 1SS355TE-17_SOD323-2

1 1
2.2U_0805_25V

10K_0402_5%~D 15.4K_0402_1%~D 1 2
PC35

0.1U_0603_50V7K~D
40 FSTCHG 2 1 PU2
D

2
1

1
@ PC36
1

1
1 2 1 24 DCIN 2 1 2PACIN PACIN 46
VDD DCIN

100K_0402_1%~D
PQ18 6251VDD 1 2 PC32 PC33 G
2

PDTA144EU_SOT323-3 .1U_0402_16V7K~D 0.1U_0603_50V7K~D 2 S @ PQ23

3
1

2200P_0402_50V7K~D
PR58
V1 2 PR57 2 23 ACPRN ACPRN 48 2N7002KW 1N SOT323-3
47K_0402_5% ACSET ACPRN PR60

1
@ PC82
@PQ20
@ PQ20 20_0603_5% PQ22

2
PQ19 PDTC115EU_SOT323-3 6251_EN 3 22 1 2 CSON PDTC115EU_SOT323-3
D

3
EN CSON
1

5
6
7
8

1
PDTC115EU_SOT323-3 40 3S/4S# 2 PC34
3

2
PQ24

AO4466L_SO8~D
PR59 0.047U_0603_16V7K~D 2 ACPRN ACPRN 48
D
1

150K_0402_1%~D 4 21 1 2 CSOP G

1
CELLS CSOP PR61 PR63
2 S

3
2
G PQ21 PC37 6800P_0402_25V7K~D 20_0603_5% 100K_0402_5%~D @ PQ68 2
2

3
S 2N7002KW 1N SOT323-3 1 2 5 20 2 1 4 V1 2 1 2N7002KW 1N SOT323-3
3

ICOMP CSIN

2
PR62 20_0603_5%
PC39 PR64 10K_0402_1%~D PC38 0.1U_0603_50V7K~D
1 2 1 2 6 19 1 2 PR67

1
PR66 VCOMP CSIP PR65 PL9 0.02_2512_1%

3
2
1
0.01U_0402_25V7K~D 100_0402_1% 2.2_0603_5%~D 10UH_PCMB104T-100MS_6A_20% BATT+
PR68 40,45 ADP_I 1 2 7 18 LX_CHG 1 2 CHG 1 4
D ICM PHASE
1

47K_0402_5%

680P_0402_50V7K~D 4.7_1206_5%~D
46 PACIN PACIN 1 2 2 PC41 2 3

1
G PQ25 1 2 6251VREF 8 17 DH_CHG
VREF UGATE

5
6
7
8

PR69
S 2N7002KW 1N SOT323-3 PR70 PC42
3

PQ26

AO4712L_SO8~D
PR71 .1U_0402_16V7K~D 2.2_0603_5%~D 0.1U_0603_50V7K~D

10U_0805_25V6K~D

10U_0805_25V6K~D

10U_0805_25V6K~D

10U_0805_25V6K~D

10U_0805_25V6K~D
46 ACON 68.1K_0402_1%~D 9 16 BST_CHG 1 2 BST_CHGA 2 1
CHLIM BOOT

1
40 IREF 2 1

1 2

1
PC46

PC43

PC44

PC84

PC145
PD17
6251aclim 10 15 6251VDDP RB751V40 SC76 4
ACLIM VDDP
1

PC45

2
1

PQ27 PR72 1 2 6251VDD

2
1
PDTC115EU_SOT323-3 100K_0402_1%~D PC47 11 14 DL_CHG
0.01U_0402_25V7K~D VADJ LGATE PR73
2

3
2
1
40,46 ACOFF ACOFF 2 PC48 4.7_0603_5%~D
2

2
12 13 1U_0402_6.3V6K~D
GND PGND

6251VREF 1 2 ISL6251AHAZ-T_QSOP24
3

PR74
11.5K_0402_1%~D PR182
1.43K_0402_1%~D PR75
12.7K_0402_1%~D
1 2

3 3

D
40 CP_SEL 2
G
S 6251VDD
3

PQ48
2N7002KW 1N SOT323-3 PR76
57.6K_0402_1%~D
40 CHGVADJ 1 2
1

1
PR78 PR80
1

47K_0402_1%~D 10K_0402_1%~D
PR77 PR79
100K_0402_1%~D 10K_0402_1%~D
2

2
PACIN 1 2 ACIN 14,18,37,40,43
2

CP mode

1
Iinput=(1/0.02)((0.05*Vaclm)/2.39+0.05) PR81
ACPRN 2 14.3K_0402_1%~D
48 ACPRN
Vaclim=2.87*((11.5K//152K)/((2.87K//152K)+(11.5K//152K)))
2
PQ28
3

CC=0.22~4.62A ACSET=16.89V PDTC115EU_SOT323-3

IREF=1*Icharge
CHGVADJ CV mode
4 IREF=0.22V~3.294V 4

0V 4V per cell
3S/4S# signal
1.882V 4.2V per cell Security Classification Compal Secret Data Compal Electronics, Inc.
High 3S 2009/2/6 2010/2/6 Title
Issued Date Deciphered Date
SCHEMATIC M/B LA-8321
Low 4S 3.294V 4.35V per cell THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 4019H5 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, August 01, 2012 Sheet 47 of 66
A B C D
 5 4 3 2 1

Note:
Use TPS51125 IC can remove RTC refernece LDO 2VREF_51125 5VALWP
Use TPS51427 IC must keep RTC refernece LDO TDC 13.9A
Peak Current 19.8A
3.3VALWP

1U_0603_25V6-K~D
OCP current 23.8A
TDC 8.8A H/S RDS(on) 12.2m ohm(typ),15m ohm(max)

1
Peak Current 12.5A L/S RDS(on) 3.6m ohm(typ),4.5m ohm(max)

PC49
OCP current 15.A

2
D FSW 375KHz D

H/S RDS(on) 12.2m ohm(typ),15m ohm(max)

L/S RDS(on) 3.6m ohm(typ),4.5m ohm(max)
FSW 375KHz PR82
13K_0402_1%~D
PR83
30.9K_0402_1%
+3VALWP 1 2 1 2 +5VALWP

PR84 PR85
TPS51125_B+ 20K_0402_1%~D 20K_0402_1%~D
1 2 1 2 TPS51125_B+
PL18 Typ: 175mA
FBMA-L11-453215800LMA90T_2P ENTRIP2
B+ 1 2 +3VLP ENTRIP1
2200P_0402_50V7K~D

2200P_0402_50V7K~D
0.1U_0603_25V7K~D

4.7U_0805_25V6-K~D

4.7U_0805_25V6-K~D

PR86

4.7U_0805_25V6-K~D

4.7U_0805_25V6-K~D

0.1U_0603_25V7K~D

4.7U_0805_25V6-K~D
57.6K_0402_1%~D PR87
93.1K_0402_1%~D

SIR472DP-T1-GE3_POWERPAK8-5~D
1 2
PC50

PC57
4.7U_0805_10V6K~D
1 2
1

1
PC51

PC52

PC53

PC54

PC55

PC56

PC85
SIR472DP-T1-GE3_POWERPAK8-5~D

5
2

2
PQ29

PQ30
PC58

ENTRIP2

REF
FB2

TONSEL

FB1

ENTRIP1
1
25 P PAD

2
4 4
7 VO2 VO1 24 SPOK 45
C C
PC59 8 23 PC60
0.1U_0603_25V7K~D VREG3 PGOOD 0.1U_0603_25V7K~D
1
2
3

3
2
1
<BOM Structure> 2 1 1 2 BST_3V 9 BOOT2 BOOT1 22 BST_5V 1 2 2 1 <BOM Structure>

PL10
PR88
2.2_0603_1% UG_3V 10
VFB=2.0V 21
PR89
UG_5V 2.2_0603_1% PL11
2.2UH_FDVE1040-2R2M=P3_14.2A_20%~D UGATE2 UGATE1 2.2UH_FDVE1040-2R2M=P3_14.2A_20%~D
1 2 LX_3V 11 20 LX_5V 1 2 +5VALWP
+3VALWP PHASE2 PHASE1
1

PR91
4.7_1206_5%~D

4.7_1206_5%~D
LG_3V LG_5V

330U_D_6.3VM_R18M~D

330U_D_6.3VM_R18M~D
SI7170DP-T1-GE3_POWERPAK8-5~D

SI7170DP-T1-GE3_POWERPAK8-5~D
12 LGATE2 LGATE1 19

5
PQ31
PR90

SKIPSEL

PQ32
680P_0402_50V7K~D

VREG5

680P_0402_50V7K~D
@ PR205 PU3
330U_D_6.3VM_R18M~D

GND
1 1

VIN
0_0402_5% RT8205LZQW(2)_WQFN24_4X4

NC
EN
1
1 2

2
+ +

PC63

@ PC207
4 41,45,46 MAINPWON 2 1
+
PC61

PC62

13

14

15

16

17

18

PC64
@ PR92
499K_0402_1%~D 2 2
B+
2

2
1 2
1
2
3

2
3
2
1
PR95

1
100K_0402_1%~D

1U_0603_25V6-K~D
499K_0402_1%~D 1 2
VS VL

1
PC65
1 2

1
Typ: 175mA
PR93

PC66
22U_0805_6.3V6M~D
@ PR94
@ PR96 0_0402_5%

2
499K_0402_1%~D
Pre_V

2
1 2
ENTRIP1 ENTRIP2

1
B B
TPS51125_B+

0.1U_0603_25V7K~D
D D
3

2
PC67
PQ33B 5 2 PQ33A
DMN66D0LDW-7_SOT363-6~D G G DMN66D0LDW-7_SOT363-6~D 2VREF_51125
S S
4

VL 2 1
1

PR97 100K_0402_1%~D
PQ34
41,45,46 MAINPWON PDTC115EU_SOT323-3

40,43 EC_ON 2 1 2
PR100 2.2K_0402_5%~D
1 2
VS @ PR98
40.2K_0402_1%~D

100K_0402_1%~D
3
1

1
@ PR99

@ PJP4 @ PJP2
D
2
1

@ PC68 2 2 1 2 2 1
0.01U_0402_25V7K~D 1 1
47 ACPRN 1 2 2
2

@ PR118 G JUMP_43X118 JUMP_43X118

1

100K_0402_1%~D S @ PJP3
3

@ PQ70 @ PJP5 2 2
A
SSM3K7002FU_SC70-3~D
+5VALWP 1 1 +5VALW A
+3VALWP 2 2 1 1 +3VALW
JUMP_43X118
40,43 EC_ON 2 JUMP_43X118

@ PQ69
DTC115EUA_SC70-3 Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/2/6 Deciphered Date 2010/2/6 Title
3

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC M/B LA-8321
9/2 for EC power rail AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
4019H5 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, August 01, 2012 Sheet 48 of 66

5 4 3 2 1
 A B C D

+VCCPP
TDC 10.7A
Peak Current 15.3A
OCP current 18.3A
H/S RDS(on) 12.2m ohm(typ),15m ohm(max)
L/S RDS(on) 2.7m ohm(typ),3.3m ohm(max)
FSW 300KHz
1 1

@ PJP6
@PJP6
VCCP_RT8290B_B+ 2 2 1
1 B+
JUMP_43X118

2200P_0402_50V7K~D
0.1U_0603_25V7K~D

4.7U_0805_25V6-K~D

4.7U_0805_25V6-K~D

4.7U_0805_25V6-K~D
PR114

PC69
52 VTTPWRGOOD 1 2 +3VALW

1
PC70

PC71

PC72

PC73
10K_0402_1%~D

SIR472DP-T1-GE3_POWERPAK8-5~D

2
@

5
@ PR117
@PR117 PQ35
10K_0402_1%~D

1
4

PR102 PC74 PL12

3
2
1
PU4 2.2_0603_1% 0.1U_0603_25V7K~D 1UH_FDV0630-1R0MN_11A_20%
PR106 1 PGOOD VBST 10 BST_VCCP 1 2 BST_VCCP-1 2 1 1 2 +VCCPP
43K_0402_1%~D

SIR818DP-T1_POWERPAK-SO8-5~D
PR101 1 2 2 9 DH_VCCP
0_0402_5% TRIP DRVH
2
9,21,40,42,43,50,51 SUSP# 1 2 3 8 LX_VCCP 2

EN SW

5
+5VALW PQ36 PC76
1

4.7_1206_5%~D
4 VFB V5IN 7 2 1 1

PR103

0.1U_0402_10V7K
@ PR194
@PR194 @PC75
@ PC75 PR105 0_0402_5%

220U_D2_4VY_R15M~D
300K_0402_5%~D .1U_0402_16V7K~D 5 6 DL_VCCP +
2

RF DRVL

22_0402_5%
680P_0402_50V7K~D

@ PC83
11 4
2

2
TP

2
2

PR104
TPS51212DSCR_SON10_3X3

1
1

1
2
3

1
PC80
PR121 PC77

1
470K_0402_1% 4.7U_0805_10V6K~D

2
2

2
@ PC79
@PC79 @PR107
@ PR107
1000P_0402_50V7K 1.2K_0402_1%
+3VS 2 1 2 1
@ PR108
@PR108 PR109
162K_0402_1%~D 4.99K_0402_1%~D
1 2 1 2 VCCIO_VFB
2

@PR112
@ PR112
1

PR113 0_0402_5%~D
10K_0402_5%~D 1 2 VCCIO_SENSE 8
PR110
PR115 10K_0402_1%~D
D
1

0_0402_5%
2

9 VCCP_PWRCTRL 2 1 2
G PQ37
100K_0402_5%

S 2N7002KW 1N SOT323-3
3
@ PR116

PC81
0.01U_0402_25V7K~D
1

3 3

2
2

PJP7
2 2 1 1

@ JUMP_43X118
VCCP_PWRCTRL VCCPP Vout +VCCPP PJP8 +VCCP
2 2 1 1
0 1.05V
@ JUMP_43X118
1 1.07V(reserve)

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2008/2/5 Deciphered Date 2008/6/05 Title
SCHEMATIC M/B LA-8321
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
4019H5 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, August 01, 2012 Sheet 49 of 66
A B C D
 A B C D

1 1

+1.8VSP
TDC 0.9A
Peak Current 1.2A
OCP current 3A

PL16
PU6 PL13

4
HCB1608KF-121T30_0603 1UH_PH041H-1R0MS_3.8A_20%
+3VALW 1 2 1.8VSP_VIN 10 2 1.8VSP_LX 1 2

PG
PVIN LX +1.8VSP

22P_0402_50V8J
PJP12 9 3
PVIN LX

1
4.7_1206_5%
2 2 1 1
1

1
PC96
PC88 8 @
@ SVIN

PR124
@ JUMP_43X118 22U_0805_6.3VAM PR128
6 1.8VSP_FB 20K_0402_1%
2

2
FB

22U_0805_6.3VAM

22U_0805_6.3VAM
5

2
EN

1
NC

NC
2 2

TP

PC93

PC95
11

2
SNUB_1.8VSP
9,21,40,42,43,49,51 SUSP# 1 2 EN_1.8VSP

1
1

0.1U_0402_10V7K
PR122 @

PC91
0_0402_5% @ SY8033BDBC_DFN10_3X3 PR129
PR195 1 10K_0402_1%
47K_0402_5%

2
2

680P_0603_50V7K
PC97
2
3 3

PJP13
+1.8VSP 2 2 1 1 +1.8VS
@ JUMP_43X118

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2008/2/5 Deciphered Date 2008/6/05 Title
SCHEMATIC M/B LA-8321
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom
4019H5 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, August 01, 2012 Sheet 50 of 66

A B C D
 A B C D

@ PJP14
JUMP_43X118
2 2 1.5VP_RT8290B_B+ BST_1.5VP
@ PJP18
@PJP18
+1.5VP 0.75VSP
B+ 1 1 2 2 1 1
TDC 1.4A

2200P_0402_50V7K~D
4.7U_0805_25V6-K~D

4.7U_0805_25V6-K~D

4.7U_0805_25V6-K~D

1
0.1U_0603_25V7K~D
PC109 JUMP_43X118
4.7U_0805_6.3V6K~D Peak Current 2A
@

2
1

1
PC102

PC101

PC100

PC99

PC98
+0.75VSP

5
PQ40

4.7U_0805_6.3V6K~D

4.7U_0805_6.3V6K~D
FDMS7696A_POWER56-8-5

DL_1.5VP
@

1
1 1

PC116

PC117
16

17

18

19

20
4
PU7

2
BOOT
PHASE

UGATE

VLDOIN

VTT
PL14 PC104 PR134 21
0.47UH_FDVE0630-H-R47M=P3_17.7A_20% 0.1U_0603_25V7K~D 0_0603_5% PAD

1
2
3
+1.5VP

2
2 1 1 2 BST_1.5VP_2 2 1 15 LGATE VTTGND 1
PR162
DH_1.5VP 1K_0402_1%
14 PGND VTTSNS 2
LX_1.5VP

1
5
PC105 PC169 PQ41 +5VALW

1
FDMS0309S_POWER56-8-5 CS_1.5VP
220U_D2_4VY_R15M~D

1 1 13 CS GND 3

3
E
PR135 RT8207MZQW_WQFN20_3X3 PC115 PQ46
220U_D2_4VY_R15M~D

+ + 4.7_1206_5%~D .1U_0402_16V7K~D 2
B
PMST3906_SOT323-3~D
VDDP_1.5VP 12 4 1 2
VDDP VTTREF

2
C
4 DL_1.5VP

1
2 2 PR158
11 VDD VDDQ 5 1K_0402_1%

PGOOD
1
PR137

TON
1
2
3

1
1
PC108 PC107 7.15K_0402_1%

FB
S5

S3
680P_0402_50V7K~D 4.7U_0805_10V6K~D @PC163
@ PC163

2
3300P_0402_50V7K~D
2 PR144 PR149

10

6
2 1
+3VALW 1 2 1 2
PR136
5.1_0603_5%~D 1.2K_0402_1%~D 1K_0402_1% PR139
1 2 10K_0402_1%~D
+5VALW 1 2 +1.5VP

1
1
2
PC106 2

1U_0603_25V6-K~D PR140
10K_0402_1%~D

2
PR132 PR150
1M_0402_1%~D 1K_0402_1%
PR133 1.5VP_RT8290B_B+ 1 2
0_0402_5%

1
40,42,43 SYSON 1 2
1

1
+3VALW

1
@PR193
@ PR193 @PC103
@PC103
300K_0402_5%~D .1U_0402_16V7K~D PR141

2
+3VALW 150K_0402_1%~D

1
2

PR142 PC78

2
10K_0402_5%~D 1000P_0402_25V7K

2
1
PR154
D

1
10K_0402_5%~D @ PR143
@PR143

2
9,21,40,42,43,49,50 SUSP# 1 2 10K_0402_5%~D 2
G PQ42

10K_0402_5%~D

0.01U_0402_25V7K~D
PR145 S 2N7002KW 1N SOT323-3
D

3
1

1
10K_0402_5%~D

1
@ PR146
PC118 16,19 1.5VDDR_VID0 1 2 2

PC110
G

0.01U_0402_25V7K~D
.1U_0402_16V7K~D
2

3
1
@

2
1
DDR GPIO Output Voltage Selection

PC111
PR148

2
10K_0402_5%~D

2
1.5VDDR_VID1 1.5VDDR_VID0 DDR Vout PQ43

2
3
2N7002KW 1N SOT323-3 3

0 0 1.65V

1
+1.5VP 0 1 1.6V
PR147
75K_0402_1%~D
TDC 14.4A +3VALW
+3VALW

Peak Current 20.6A

2
1 0 1.55V

1
OCP current 24.7A

1
PR152
H/S RDS(on) 12.2m ohm(typ),15m ohm(max) 1 1 1.5V (Default) @PR151
@ PR151 10K_0402_5%~D
10K_0402_5%~D
L/S RDS(on) 2.7 ohm(typ),3.5m ohm(max) D

1
2
FSW 300KHz PR153 PQ45
2
G PQ44
D 1N SOT323-3

1
10K_0402_5%~D 2N7002KW 2N7002KW
S 1N SOT323-3

3
0.01U_0402_25V7K~D
16,19 1.5VDDR_VID1 1 2 2
G

1
0.01U_0402_25V7K~D
@ PJP15 S @

PC120
JUMP_43X118 PJP19 @ PR155

1
1 10K_0402_5%~D
+1.5VP 1 2 2 +1.5V +0.75VSP 2 2 1 1 +0.75VS

PC119
PR156

2
@ JUMP_43X118 10K_0402_5%~D

2
@ PJP16

2
JUMP_43X118

2
1 1 2 2
@
PJP17
JUMP_43X118
4 4
1 1 2 2

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2008/2/5 Deciphered Date 2008/6/05 Title
SCHEMATIC M/B LA-8321
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
4019H5 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, August 01, 2012 Sheet 51 of 66
A B C D
 5 4 3 2 1

+VCCP
D D

VID [0] VID[1] VCCSA Vout

2
@ PR161 @PR163
@ PR163
10K_0402_1%~D 10K_0402_1%~D 0 0 0.9V
@ PR262 The 1k PD on the VCCSA VIDs are empty. 0 1 0.8V

1
0_0402_5%~D
9 H_FC_C22 1 2 VID0_SA These should be stuffed to ensure that
VCCSA VID is 00 prior to VCCIO stability. 1 0 0.725V
1 1 0.675V
PR176
1K_0402_5%~D
@ PR166 2 1
output voltage adjustable network
0_0402_5%~D
1 2 VID1_SA
+3VS
9 VCCSA_SEL
VID1_SA

1
PR168
100K_0402_5%~D
VID0_SA
+VCCSAP
PR173 TDC 4.2A

2
0_0402_5%~D

40 SA_PGOOD
1 2 PR177 Peak Current 6A
1K_0402_5%~D

+VCCSA_PWRGD
2 1

+5VALW

1U_0603_10V6K~D
PR261

2
0_0402_5%~D

PC121
C 1 2 PR157 PR125 C
10_0402_1%~D 0_0402_5%~D

1
2 1 +VCCSA_EN 1 2
PC122 VTTPWRGOOD 49
2.2U_0603_10V7K~D
1 2

18

17

16

15

14

13
PU9
PC128

V5DRV

V5FILT

PGOOD

VID1

VID0

EN
0.1U_0603_25V7K~D
PR159
12 +VCCSA_BT 1 2+VCCSA_BT_1 2 1
BST PL15
19 PGND 2.2_0603_5%~D
0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
SW 11 +VCCSA_PHASE 2 1 +VCCSAP
20 PGND

2200P_0402_50V7K~D
22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D
0.1U_0402_25V6K~D
1
@
2200P_0402_50V7K~D

10U_0805_25V6M~D

10U_0805_25V6M~D

SW 10
PC126

PC127

PR165
0.1U_0402_25V6K~D

21 PGND

2
PC124

PC125

PC129

PC130

PC153

PC154

PC155

PC156

PC157

PC159
4.7_1206_5%~D
TPS51461RGER_QFN24_4X4~D 9
SW
1 1 22

1
VIN
1

@ @
8 @
SW

1
@ PJP20 23 PC131
2

+3VALW PAD-OPEN 43X118

2 2 VIN 680P_0603_50V7K~D
7

2
+VCCSA_PWR_SRC SW
2 1 24 VIN
25
COMP

MODE
SLEW TP

VOUT
VREF
1GND

6
@ PR160
2 1
B B
33K_0402_5%~D
PR175
100_0402_5%~D
PC132 VCCSA_VOUT 2 1
2 1

0.22U_0402_10V6K~D PR169
5.1K_0402_1%~D @ PR181
2 1 2 1 0_0402_5%~D
0.01U_0402_25V7K~D

1 2
PC152 VCCSA_SENSE 9
2

3300P_0402_50V7K~D
PC133

+VCCSAP PJP21 +VCCSA

2 2 1 1

@ JUMP_43X118

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2009/12/01 Deciphered Date 2010/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC M/B LA-8321
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C
4019H5 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, August 01, 2012 Sheet 52 of 66

5 4 3 2 1
 5 4 3 2 1

10/14 modify

CSSUM

Near to PR41 PR42 Next to near controller

75K_0402_1%~D 165K_0402_1%
CSCOMP 2 1 1 2 2 1 CSP1
PR44 62K_0603_1%
2 1 2 1 CSP2
PH7 1 2 PR43 62K_0603_1%
PR312 PC224 PR310 PC19 220K_0402_5%_ERTJ0EV224J~D PC18 2 1 CSP3
47_0402_1% 220P_0402_25V 5.49K_0402_1%~D 4700P_0402_25V7K~D 1500P_0402_7K~D PR280 62K_0603_1%
1 2 1 2 1 2 1 2 2 1 1 2 2 1 CSP4
PR34 PC21 PR281 62K_0603_1%

2
D D
39K_0402_1% 1000P_0402_50V7-K
PC223 PR286

1
22P_0402_50V8J~D 1K_0402_1%
PR303 1 2 PR37 PR296 PC23
1K_0402_1% 4.7K_0402_1% 10_0402_1% 820P_0402_25V7K

2 1
2 1 2 1 1 2 2 1 CSN1
PR276 10_0402_1%

2
PR313 PC216 PC174 PR38 2 1 CSN2
412_0402_1% 680P_0402_50V7K 820P_0402_50V7K 8.2K_0402_1% PR274 10_0402_1%

1
1 2 1 2 2 1 2 1 CSN3
PR315 PR40 10_0402_1%
2.32K_0402_1%~D 2 1 CSN4
1 2 1 2 PR305 10_0402_1%
PR314 PC230

1
22K_0402_1%~D 0.1U_0402_25V6K~D
PC211 1 2
6800P_0402_25V7K

2
1 2
PR320

2
PC218 27K_0402_1%
1000P_0402_50V7K PR39
10K_0402_1%~D

CSREF 1
VCORE_VSN 1 2 CSP4 CSP4 54

1
CSCOMP

CSSUM
DIFFOUT DIFFOUT 0.047U_0402_16V7K~D
PC220 CSN4 CSN4 54

2
@ PR299

53

52

51

50

49

48

47

46

45

44

43

42

41

40
0_0402_5%~D PU5
1 2 CSN2

FB

COMP

CSCOMP
DIFFOUT

TRBST

ILIM

DROOP

CSSUM

IOUT

CSREF
FLAG / GND

CSP4

CSN4
VSN
8 VSSSENSE CSN2 54

1
PC225 0.047U_0402_16V7K~D
@ PR298 1000P_0402_50V7K 39 PC229
VCORE_VSP CSN2 CSP2
8 VCCSENSE 1 2 1 1 2 CSP2 54

2
+VCCP VSP PR319 10K_0402_1%~D
CSP2 38
0_0402_5%~D TSENSE 2 CSN3 CSN3 54
TSENSE

1
1 2 37 0.047U_0402_16V7K~D
PR307 51_0402_5% CSN3 PC214
C 40,55 VR_HOT# 3 VR_HOT#
C
1

1 2 36 1 2 CSP3 CSP3 54

2
PC1056 PR279 130_0402_1% CSP3 PR289 10K_0402_1%~D
8,55 VR_SVID_DAT 4 SDIO
1U_0402_6.3V6K~D 1 2 35 CSN1 CSN1 54
2

CSN1

1
8,55 VR_SVID_CLK PR290 54.9_0402_1% 5 PC40
SCLK 0.047U_0402_16V7K~D
CSP1 34
8,55 VR_SVID_ALRT# 6 1 2 CSP1 CSP1 54

2
ALERT#
For VR_SVID_DAT and CLK +3VS 1 2 DRON 33 PR277 10K_0402_1%~D DRVON 54
5,16,18 VGATE PR317 1.91K_0402_1% 7 NCP6151S52MNR2G_QFN52_6X6
VR_RDY
PWM1/ADDR 32 PWM1 54
8 VR_RDYA
PWM3/IMAX 31 PWM3 54
PR293 40,41,55 VR_ON 1 2 9
2.2_0603_5%~D PR268 0_0402_5% ENABLE
PWM2/VBOOT 30 PWM2 54
+5VS 1 2 NCP6151_VCC 10 VCC PWM4 54
1 2 PWM4 29
PR266 PC226 1 2 11 ROSC VCORE
1K_0402_1% 1U_0402_6.3V6K~D PR292 9.09K_0402_1%~D
PWMA/IMAXA 28 VCORE IMAX SET PWM
CPU_B+ 1 2 12 VRMP VBOOT AT 99A ADDRESS

CSCOMPA
DIFFOUTA
1 2 27 NCP6151_VCC

DROOPA

CSSUMA
VBOOTA SET AT

TRBSTA

COMPA
13

IOUTA
TSENSEA

CSNA
VSNA

CSPA
0V

VSPA

ILIMA
PC87 0.01U_0402_25V7K~D

FBA

1
1
PR273
near Power Stage PR297 76.8K_0402_1%~D PR267
14

15

16

17

18

19

20

21

22

23

24

25

26
heat source 10K_0402_1%~D 10K_0402_1%~D

2
100K_0402_1%_NCP15WF104F03RC

2
TSENSE
2

1
6.65K_0402_1%

0.1U_0402_25V6K~D
1
PR316

PC227
PH6

2
1

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2009/10/09 Deciphered Date 2010/10/09 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC M/B LA-8321
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 4019H5 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, August 01, 2012 Sheet 53 of 66
5 4 3 2 1
 5 4 3 2 1

VCC_core CPU_B+
TDC 70A CPU_B+

SIR472DP-T1-GE3_POWERPAK8-5~D

SIR472DP-T1-GE3_POWERPAK8-5~D

SIR818DP-T1_POWERPAK-SO8-5~D SIR472DP-T1-GE3_POWERPAK8-5~D

SIR818DP-T1_POWERPAK-SO8-5~D SIR472DP-T1-GE3_POWERPAK8-5~D
Peak Current 97.5A

10U_0805_25V6K~D
10U_0805_25V6K~D
OCP current 117A

1U_0805_25V6K

10U_0805_25V6K~D
PC250

1
PC249

PC134

1U_0805_25V6K
PQ89 PQ92

10U_0805_25V6K~D
Loadline = 1.9mohm PC238

1
PC248

PC244

PC135
1 2 PQ93 PQ96

PC237
1 2

2
PR335 0.22U_0603_25V7K~D
2.2_0603_1% PU17 PR333 0.22U_0603_25V7K~D
4 4

DRVH3
53 PWM3 1 2 1 9 2.2_0603_1% PU13 4 4
BST FLAG

DRVH2
53 PWM2 1 2 1 BST FLAG 9
2 8 DRVH3 PL28
PR332 PWM DRVH 0.36UH_ETQP4LR36AFC_28A_20%~D DRVH2 PL29
2 8

3
2
1

3
2
1
D
DRVON 2 PWM DRVH D
1 4.02K_0402_1%~D 3 7 4 1 +VCC_CORE
PR324 0.36UH_ETQP4LR36AFC_28A_20%~D

3
2
1

3
2
1
EN SW
1 4.02K_0402_1%~D

PC139 4.7_1206_5%~D
53 DRVON 2 3 EN SW 7 4 1 +VCC_CORE

PC140 4.7_1206_5%~D
2 1 4 6 3 2

SIR818DP-T1_POWERPAK-SO8-5~D

SIR818DP-T1_POWERPAK-SO8-5~D
+5VS VCC GND

1
PR187
PQ90 PQ91 2 1 4 6 PQ94 PQ95 3 2
VCC GND

PR188
PR329 2.2_0603_1% 5 +5VS
DRVL PR328 2.2_0603_1%
DRVL 5
NCP5911MNTBG_DFN8_2X2

2
1

680P_0402_50V7K~D
NCP5911MNTBG_DFN8_2X2

2
1
PC239

680P_0402_50V7K~D
4 4 4 4

1
1U_0402_6.3V6K~D PC236
2

1
1U_0402_6.3V6K~D

2
2
1
2
3

1
2
3

1
2
3

1
2
3

2
53 CSP3

53 CSN3 53 CSP2

53 CSN2

CPU_B+

SIR472DP-T1-GE3_POWERPAK8-5~D

SIR472DP-T1-GE3_POWERPAK8-5~D
CPU_B+

SIR472DP-T1-GE3_POWERPAK8-5~D

SIR472DP-T1-GE3_POWERPAK8-5~D
10U_0805_25V6K~D

10U_0805_25V6K~D
1U_0805_25V6K

10U_0805_25V6K~D
PC242

1
PC246

PC136
PQ97 PQ100

10U_0805_25V6K~D
PC241

1U_0805_25V6K
1 2 PC252

1
PC247

PC137
PQ101 PQ104

PC251
0.22U_0603_25V7K~D 1 2
PR334

2
C 2.2_0603_1% PU14 4 4 C
PR336 0.22U_0603_25V7K~D
1 2 1 9

DRVH1
BST FLAG

DRVH4
53 PWM1 2.2_0603_1% PU15 4 4
2 8 DRVH1 PL30 53 PWM4 1 2 1 9
PR325 PWM DRVH 0.36UH_ETQP4LR36AFC_28A_20%~D BST FLAG
3
2
1

3
2
1
DRVON 2 1 4.02K_0402_1%~D 3 7 4 1 2 8 DRVH4 PL31
EN SW +VCC_CORE PWM DRVH
PR327 0.36UH_ETQP4LR36AFC_28A_20%~D

PC141 4.7_1206_5%~D

3
2
1

3
2
1
1
2 1 4 6 3 2 DRVON 2 1 4.02K_0402_1%~D 3 7 4 1
SIR818DP-T1_POWERPAK-SO8-5~D

SIR818DP-T1_POWERPAK-SO8-5~D
VCC GND EN SW +VCC_CORE
5

PR189
PQ98 PQ99

PC142 4.7_1206_5%~D
+5VS

1
PR331 2.2_0603_1% 5 2 1 4 6 3 2

SIR818DP-T1_POWERPAK-SO8-5~D

SIR818DP-T1_POWERPAK-SO8-5~D
DRVL VCC GND

PR190
+5VS PQ102 PQ103
NCP5911MNTBG_DFN8_2X2 PR326 5

2
DRVL
1

2.2_0603_1%

680P_0402_50V7K~D
PC245 4 4 NCP5911MNTBG_DFN8_2X2

2
1

1
1U_0402_6.3V6K~D

680P_0402_50V7K~D
2

PC235 4 4

1
1U_0402_6.3V6K~D
2

2
1
2
3

1
2
3

2
1
2
3

1
2
3
53 CSP1

53 CSN1

53 CSP4

53 CSN4

B B

B+
PL22
FBMA-L11-453215800LMA90T_2P
1 2 CPU_B+
1 1
1

100U_25V_M~D

100U_25V_M~D
680P_0402_50V7K~D

680P_0402_50V7K~D

+ +
PC234

PC240

PC257

PC258

330P_0402_50V7K~D

@ @
0.1U_0603_25V
PC243

PC259
2

2 2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2009/10/09 Deciphered Date 2010/10/09 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC M/B LA-8321
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
4019H5 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, August 01, 2012 Sheet 54 of 66

5 4 3 2 1
 5 4 3 2 1

10/14 modify, non CIS parts

10/14 modify
Next to near controller

CSSUM2 1 2 CSP5
PR622 36.5K_0603_1%
PR623 75K_0402_1% PR624 165K_0402_1%
CSCOMP2 2 1 2 1

PR627 PC1042 PR628 PC1043 220K_0402_5%_ERTJ0EV224J 2 1 1 2 2 1 CSP6

24.9_0402_1% 180P_0402_50V8J~D 4.12K_0402_1%~D 2200P_0402_50V7K PH3 PC1041 PR626 36.5K_0603_1%
1 2 1 2 1 2 1 2 2 1 560P_0402_50V7K
PR629 1 2
D D
34K_0402_1% PC1044

2
PC1045 560P_0402_50V7K
10P_0402_50V8J PR630 PR632

1
PR631 1 2 1K_0402_1% 4.7K_0402_1% PC1046
1K_0402_1% PR633 820PF_0402_50V7K
2 1 2 1 1 2 2 1 CSN5

2 1
10_0402_1% PR634 10_0402_1%
PR636 PC1047

2
412_0402_1% 4700P_0402_25V7K PC1048
PR639 1 2 1 2 820PF_0402_50V7K 2 1 CSN6

1
2K_0402_1% 2 PR637 1 PR638 10_0402_1%
1 2 1 2 8.2K_0402_1%
PR640

1
22K_0402_1% PC1050
Close to CPU PC1049 0.1U_0402_25V6K
4700P_0402_25V7K 1 2

2
1 2
+VCC_GFXCORE_AXG PR641 24.3K_0402_1%
DIFFOUT2

2
PC1051
1000P_0402_50V8-J
2

VAXG_VSN

CSCOMP2

CSREF2 1
CSSUM2
PR672 PR682
100_0402_1% 100_0402_1% DIFFOUT2
1

@ PR642

53

52

51

50

49

48

47

46

45

44

43

42

41

40
0_0402_5%~D PU1004
9 VSS_AXG_SENSE 1 2

FB

COMP

ILIM

DROOP

CSCOMP
DIFFOUT

TRBST

CSSUM

IOUT

CSREF
GND

VSN

NC

NC
1
PC1052
@ PR643 1000P_0402_50V8-J 39
9 VCC_AXG_SENSE VAXG_VSP CSN2
1 2 1
2

VSP
CSP2 38
0_0402_5%~D TSENSE2 2 CSN6 CSN6 56
TSENSE

1
37 0.047U_0402_16V7K
CSN3 PC1054
C 40,53 VR_HOT# 3 VRHOT#
C
36 1 2 CSP6 CSP6 56

2
CSP3 PR646 4.87K_0402_1%~D
8,53 VR_SVID_DAT 4 SDIO
35 CSN5 CSN5 56
CSN1

1
8,53 VR_SVID_CLK 5 PC1055
SCLK 0.047U_0402_16V7K
CSP1 34
8,53 VR_SVID_ALRT# 6 1 2 CSP5 CSP5 56

2
ALERT# DRVON2 PR650 4.87K_0402_1%~D
DRON 33 DRVON2 56
7 NCP6131S52MNR2G_QFN52_6X6
VR_RDY PWM5
PWM1/ADDR 32 PWM5 56
8 VR_RDYA
31 PWM6 PWM6 56
PWM3/VBOOT
40,41,53 VR_ON 1 2 9 ENABLE
PR652 0_0402_5% 30
PR653 PWM2
10
100K_0402_1%_NCP15WF104F03RC

TSENSE2 2.2_0603_5% VCC IMAX_AXG

IMAX 29
+5VS 1 2 NCP6131_VCC 1 2 11 ROSC
2

1
6.65K_0402_1%

PR654 9.09K_0402_1%
0.1U_0402_25V6

PWMA/IMAXA 28
1
PR649

PC1058

1 2 12 VRMP

CSCOMPA
DIFFOUTA
PH4

PR656 27 NCP6131_VCC

DROOPA

CSSUMA
VBOOTA

TRBSTA

COMPA
1K_0402_1% PC1059 1U_0402_6.3V6K~D 13
2

IOUTA
TSENSEA

CSNA
VSNA

CSPA
VSPA

ILIMA
CPU_B+_GFX 1 2
1

FBA
GFX CORE
1 2 IMAX SET VCORE PWM
AT 50A VBOOT ADDRESS
14

15

16

17

18

19

20

21

22

23

24

25

26
PC1060 0.01U_0402_50V7K
SET AT

1
0V
PR678
36K_0402_1% PR660 PR677
10K_0402_1% 22K_0402_1%~D

2
B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/02/08 Deciphered Date 2012/02/08 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC M/B LA-8321
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
C B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019H5
Date: Wednesday, August 01, 2012 Sheet 55 of 66
5 4 3 2 1
 5 4 3 2 1

VCC_GFXCORE
TDC 38A CPU_B+_GFX

Peak Current 46A

OCP current 55A

10U_0805_25V6K~D

10U_0805_25V6K~D
1U_0805_25V6K
Loadline = 3.9mohm PC255

1
PC253

PC138
PC254
1 2

2
PQ105
PR338 0.22U_0603_25V7K~D CSD87351Q5D_SON8~D

1
2.2_0603_1% PU16
1 2 1 BST FLAG 9 2
55 PWM6
2 8 DRVH6
D
PR330 PWM DRVH D
7 1 4 +VCC_GFXCORE_AXG
55 DRVON2 DRVON2 2 1 4.02K_0402_1%~D 3 7 3 6
EN SW

PC143 4.7_1206_5%~D
5 2 3

1
2 1 4 VCC GND 6 4

PR191
+5VS
PR337 2.2_0603_1% 5 PL32
DRVL 0.22UH_FDUE0640-H-R22M=P3_25A_20%~D
NCP5911MNTBG_DFN8_2X2

2
1

680P_0402_50V7K~D
PC256

1
1U_0402_6.3V6K~D
2

2
55 CSP6

55 CSN6

CPU_B+_GFX

10U_0805_25V6K~D
C C

1U_0805_25V6K
1

1
PC161
PC158

PC160
1 2

2
PQ107
PR340 0.22U_0603_25V7K~D CSD87351Q5D_SON8~D
1

2.2_0603_1% PU19
1 2 1 BST FLAG 9 2
55 PWM5
2 8 DRVH5
PR341 4.02K_0402_1%~D PWM DRVH
7 1 4 +VCC_GFXCORE_AXG
55 DRVON2 DRVON22 1 3 7 3 6
EN SW
5 2 3

PC150 4.7_1206_5%~D
2 1 4 VCC GND 6 4

1
+5VS
PR206
PR342 2.2_0603_1% 5 PL33
DRVL 0.22UH_FDUE0640-H-R22M=P3_25A_20%~D
NCP5911MNTBG_DFN8_2X2
8
1

PC151
680P_0402_50V7K~D

1U_0402_6.3V6K~D
2

2 1

55 CSP5

55 CSN5

B B

B+
PL23
FBMA-L11-453215800LMA90T_2P
1 2 CPU_B+_GFX

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/02/08 Deciphered Date 2012/02/08 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC M/B LA-8321
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
C B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019H5
Date: Wednesday, August 01, 2012 Sheet 56 of 66
5 4 3 2 1
 5 4 3 2 1

D D

+VCC_CORE Below is 458544_CRV_PDDG_0.5 Table 5-8.

+VCC_CORE +VCC_GFXCORE_AXG
1 1 1 1 1
5 x 22 µF (0805)
PC1218 PC1222 PC1221 PC1217 PC1219
Socket Bottom 5 x (0805) no-stuff
2
10U_0805_6.3VAM
2
10U_0805_6.3VAM
2
10U_0805_6.3VAM
2
10U_0805_6.3VAM
2
10U_0805_6.3VAM +VCC_GFXCORE_AXG_P sites

7 x 22 µF (0805)
Socket Top 2 x (0805) no-stuff
sites

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
1 1 1 1 1 1 1 1 1 1 1 1 1

PC1236

PC1237

PC1238

PC1239

PC1241

PC1242

PC1243
@
PC1220 PC1224 PC1230 PC1214 PC1215 PC1213
10U_0805_6.3VAM 10U_0805_6.3VAM 10U_0805_6.3VAM 10U_0805_6.3VAM 10U_0805_6.3VAM 10U_0805_6.3VAM
2 2 2 2 2 2 2 2 2 2 2 2 2
+VCCP
+VCC_CORE

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
1 1 1 1 1 1 1 1
1 1 1 1 1

PC1257

PC1258

PC1259

PC1267

PC1268

PC1269

PC1270

PC1272
PC1209 PC1206 PC1210 PC1211 PC1208
2 2 2 2 2 2 2 2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 1 1 1 1 1 1 1
2 2 2 2 2

PC1244

PC1245

PC1246

PC1247

PC1248

PC1249

PC1251
C C
2 2 2 2 2 2 2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
1 1 1 1 1 1
1 1 1 1 1

PC1274

PC1283

PC1273

PC1266

PC1285

PC1286
PC1207 PC1223 PC1212 PC1216 PC1226
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 2 2 2 2 2 2
2 2 2 2 2

470U_D2_2VM_R4.5M~D

470U_D2_2VM_R4.5M~D

470U_D2_2VM_R4.5M~D

470U_D2_2VM_R4.5M~D
1 1 1 1
+ + + +

@ PC1253

@ PC1254
PC1252

PC1255
2 2 2 2

220U_D2_4VY_R15M~D

330U_D2_2.5VM_R6M~D

220U_D2_4VY_R15M~D
1 1 1

@ PC1277
1 1 1 1 1
+ + +

PC1276

PC1275
PC1227 PC1228 PC1229 PC1225 PC1231
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M
2 2 2 2 2 2 2 2

1 1 1 1

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
@ @ @ 1 1 1 1 1 1 1
PC1232 PC1233 PC1234 PC1235 @ @ @ @ @ @ @

PC1256

PC1260

PC1261

PC1262

PC1263

PC1264

PC1265
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M
2 2 2 2
2 2 2 2 2 2 2
+VCC_CORE

1 1 1 1
+ + + + @ PC1205
B B

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
PC1200 PC1201 PC1203 470U_D2_2VM_R4.5M~D 1 1 1 1 1 1 1 1
470U_D2_2VM_R4.5M~D 470U_D2_2VM_R4.5M~D 470U_D2_2VM_R4.5M~D @ @ @ @ @ @ @ @
2 2 2 2

PC1271

PC1278

PC1279

PC1280

PC1281

PC1282

PC1287

PC1284
2 2 2 2 2 2 2 2

1 1
+ +

2 PC1204 2 PC1202
470U_D2_2VM_R4.5M~D 470U_D2_2VM_R4.5M~D

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2008/09/15 Deciphered Date 2009/09/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC M/B LA-8321
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 4019H5 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, August 01, 2012 Sheet 57 of 66
5 4 3 2 1
 5 4 3 2 1

VR_ON NCP6151S(PU5) +VCC_CORE

NCP6131S(PU1004) +VCC_GFXCORE

ADAPTER VTTPWRGOOD
TPS51461
+VCCSA
(PU9)
D D

B+ SYSON RT8207M SUSP

+1.5V AO4728L +1.5VS
(PU7)
BATTERY (Q20)

SUSP#
RT8207M CPU1.5V_S3_GATE
(PU7) +0.75VS AO4728L +1.5V_CPU_VDDQ
(QC3)

CHARGER
ISL6251A SUSP# SY8033
+1.8VS
(PU2) (PU6)

SUSP# TPS51212
+VCCP
(PU4)
C C

EC_ON RT8205L
(PU3)

DGPU_PWR_EN#
B+_MXM B+_MXM1 +3VALW SI4800BDY +3VMXM DGPU_PWR_EN#
+5VALW SI4800BDY +5VMXM
(U19)
(U18)
PCH_PWR_EN#

EN_WOL#

PCH_PWR_EN#
SUSP

SUSP

SYSON#
SUSP

SUSP

SYSON#
B RT9013 SI4800BDY SI4800BDY SI3456BDV SI3456BDV B
AO3413 SI4800BDY TPS2062A TPS2062A
(U8) (Q30) (Q31) (Q212) (QS1)
(QH4) (Q26) (U45) (U42)

+VCCAFDI_VRM +3VS +3V_PCH +3.3V_F347 +LAN_IO

+5V_PCH +5VS +USB3_VCCB +USB3_VCCA

SUSP ODD_EN#

SUSP
LCDVDD_ON / EC_ENVDD
BT_ON#

EN_CAM

SI3456BDV SI3456BDV SI3456BDV

(QV6) (Q2) (QS1)
SI2301BDS SI2301BDS RT9025 AO3413
(QV12) (Q1) (U608) (QU1)
+HDMI_5V_OUT +5VS_TP_LED +5VS_ODD

A A

+LCDVDD +3VS_CAM +1.2VS_HDMI +3VS_BT

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SCHEMATIC M/B LA-8321
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
4019H5
Date: Wednesday, August 01, 2012 Sheet 58 of 66
5 4 3 2 1
 5 4 3 2 1

Version Change List ( P. I. R. List ) Page 1

Request
Item Page# Title Date Owner Issue Description Solution Description Rev.
1 52 PWR-VCCSA_COREP 10/05 Alan SMT NC part (PR262) BOM structure change to "Do Not Display" X01
D D
2 45 BATTERY CONN/OTP 10/13 Alan EC detect the battery is insertion when only adapter in BATT_PRS pull high from +3VALW to +3VALW_EC

3 53 CPUCORE1 10/14 Alan For Intel VCORE test Change PC18=1500P X01

4 55 GFXCORE1 10/14 Alan For Intel Vgfx test Change PC1042=180P, PR628=4.12K, PC1041=560P, PR622=PR626=36.5K X01

5 47 CHARGER 10/17 Alan For charger voltage and current setting Change PR71=68.1K, PR75=12.7K, PR182=1.43K, PR45=0.005 X01

6 48, 51 3VALWP/5VALWP, +1.5VP/0.75VSP 10/17 Alan Find tune OC setting Change PR86 =57.6K, PR87 =93.1K, PR137 =7.15K X01

7 45,46 DCIN/DECTOR 10/25 Alan "US California Energy Efficiency" (Reserve 130mW for no battery mode) Refer to page 45 PR170, PR171 and page 46 modify X01

8 46, 47 CHARGER 11/11 Alan NC revise parts NC: PD6, PQ23,PQ68, PD11, PD12, PQ20, X01

9 ** ALL 11/11 Alan Change source for affected by “Thailand flood” Refer to PT-Build_SMT MEMO X01

10 ** ALL 12/13 Alan Change 0 ohm to short pad PR5, PR196, PR186, PR185, PR300, PR46, PR112, PR262, PR298, PR299, PR642, PR643 X01

11 50 1.8VSP 12/14 Alan PL13 footprint is too small to find the 2nd source Change PL13 footprint for 2nd source X01

C
12 48,54,56 DCIN/DECTOR 12/23 Alan PL18, PL22, PL23 footprint DFB modify to larger size PL18, PL22, PL23 update CIS PART X02 C

13 47 DCIN/DECTOR 12/24 Alan Revise PR164 for EE Jeffy request X02

14 45 OTP Value modify 01/11 Alan CPU OTP caculate and test value 93C not mach with schematic 90C Double check with thermal team and agree change to 93C X02

15 46 P46-PWR-DCIN/DECTOR 02/01 Alan Power and EE main part is different, factory request to moidfied it Change PQ5 to SB000008P0L as main source A00

16 46 P46-PWR-DCIN/DECTOR 02/02 Alan Platform is required to consume 4mA above at 19.5V in AC mode Add PR111 for lot 6 hiccup mode issue (3.78mA+1mA=4.78mA) A00
without battery attached.

17 45, 52 DCIN/DECTOR, VCCSAP 02/16 Alan Reduce revise 0 ohm (B+_BIAS enable, VCCSA_SENSE) Change PR16, PR181 to short 0 ohm A00

18 48 3VALWP/5VALWP 02/29 Alan HDMI fail cause the 5V voltage drop to connecter only 4.7V Change PR83 from 30K to 30.9K ohm voltage from 5.05V to 5.15V A00

B B

A A

Compal Electronics, Inc.

Title
SCHEMATIC M/B LA-8321
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019H5
Date: Wednesday, August 01, 2012 Sheet 59 of 66
5 4 3 2 1
 5 4 3 2 1

SMBUS Address [TBD]

2.2K 2.2K

2.2K
+3V_PCH 2.2K
+3VS
H14 SMBCLK PCH_SMBCLK
2N7002 202
C9 SMBDATA PCH_SMBDATA DIMMA0 SMBUS Address [A0]
200
PCH 2N7002

202
D
2.2K System Thermal sensor DIMMB0 SMBUS Address [A4]
D
C8 SML0CLK 53 200

+3V_PCH 51 EMC1412 SMBUS Address [1111_100xb]

2.2K
G12 SML0DATA
202
DIMMA1 SMBUS Address [A2]
E14 M16 MXM Thermal sensor 200
53
2.2K
SML1CLK 51 EMC1412 SMBUS Address [1011_100xb]
202
+3V_PCH DIMMB1 SMBUS Address [A6]
SML1DATA 2.2K 200
MXM1 Thermal sensor
53
51 SMBUS Address [1101_100xb]
2N7002

EMC1412
2N7002

53
51 CPUXDP SMBUS Address [TBD]
HDMI IN
EC_SMB_CK2 111

EC_SMB_DA2 112 STDP6038 SMBUS Address [C0] 53

51 PCHXDP SMBUS Address [TBD]

2.2K
4.7K
C +3VS C
2.2K
+3V_MXM1
4.7K

79 VGA_SMB_CK2
2N7002
80 MXM2 CONN SMBUS Address [TBD] G sensor
VGA_SMB_DA2
2N7002 14
SCL2 13 LNG3DMTR SMBUS Address [32]
NV MXM SMBUS Address:
SDA2 4.7K 4.7K 0x98
+3VALW 0x9E
+3V_MXM 0x56
4.7K 4.7K 0x32 30
32 WLAN CONN SMBUS Address [TBD]
VGA_SMB_CK1
KBC 77 EC_SMB_CK1
2N7002
VGA_SMB_DA1 MXM1 CONN SMBUS Address [TBD]
78 EC_SMB_DA1
2N7002
SCL1 7
0 Ω 0 Ω 8 EXP CONN SMBUS Address [TBD]
SDA1

MXM Current Monitor

B
MXM_CUR_DAT B
SMBUS Address [1000_000xb] 30
MXM_CUR_CLK INA219
KB930 32 mSATA CONN SMBUS Address [TBD]
0 Ω 0 Ω
MXM Current Monitor

INA219 SMBUS Address [1000_101xb]

BATT CONN SMBUS Address [16]

Combo JACK Mic. switch

TS3A225 SMBUS Address [76]

VPK
VPK_SMB_CK1
2N7002
A VPK_SMB_DA1 MSP430F5508 SMBUS Address [TBD] A
2N7002
2.2K
NC DELL CONFIDENTIAL/PROPRIETARY
+3VS
2.2K
Compal Electronics, Inc.
NC PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
Title
SCHEMATIC M/B LA-8321
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. B
4019H5
Date: Wednesday, August 01, 2012 Sheet 60 of 66
5 4 3 2 1
 5 4 3 2 1

Version Change List ( P. I. R. List )

Request
Item Page# Title Date Owner Issue Description Solution Description Rev.
D 1 34 SATA HDD 2011/10/4 Compal HDD EA fial Add HDD re-driver *3, Add RS11~RS37, US1~US3, CS51~CS68 X01 D

2 35 WLAN 2011/10/4 Compal LPC pin assignment error for 80 port Re-assignment pin X01

3 40 EC 2011/10/10 Compal There are double power source for EC Depop R464 X01

Change net name from SUSWARN# to SUSPWRDNACK,

4 40, 18 PCH, EC 2011/10/10 Compal correct net name for not support deep S4/S5 X01
Change net name from SUSWARN#_R to SUSPWRDNACK_R

Delete C1069, C1070, C1071, C1072, C1073, C1074, C1075, C1076, C1079, C1109,
5 28 DP SW 2011/10/10 Compal DP no function, because double CAP for MUX X01
C1127, C1128, C1138, C1139, C1140, C1141, C1203, C1204, C1205, C1206

6 40 EC 2011/10/10 Compal Change board ID to V0.2 Change R466 from 0 ohm to 8.2K ohm X01

7 17 PCH 2011/10/11 Compal Sourcer require change crystal size to 3225 Change YH2 PN to SJ10000EF00 X01

C 8 31 GLAN 2011/10/11 Compal Sourcer require change crystal size to 3225 Change YL1 PN to SJ10000EF00 X01 C

9 44 VPK 2011/10/11 Compal Sourcer require change crystal size to 3225 Change YH3 PN to SJ10000DI00 X01

10 16 PCH 2011/10/11 Compal Sourcer require change crystal size to 3215 Change YH1 PN to SJ10000DM00 X01

11 40 EC 2011/10/11 Compal Sourcer require change crystal size to 3215 Change X1 PN to SJ10000DM00 X01

12 30 HDMI IN 2011/10/11 Compal Sourcer require change crystal size to 3225 Change Y5 PN to SJ10000970L X01

13 30 HDMI IN 2011/10/11 Compal Follow Vandor feedback modify CAP value of crystal Change C1751, C1750 from 27P to 12P X01

14 27 HDMI SW 2011/10/11 Compal HDMI eye diagram fail Add R2600, pop R1855, R1857 X01

15 34 SATA HDD 2011/10/12 Compal Add SATA re-driver co-lay circuit Add RS38~RS49, CS69~CS80 X01

B 16 5 PCH 2011/10/13 Compal PM_DRAM_PWRGD have glitch and leakage Change RC18 from 200 ohm to 10k ohm X01 B

Depop CD75, C2011~C2015, RH137, CH100, CH101, YH3, R2, R227, R1607, R1578
17 44 VPK 2011/10/14 Compal Depop VPK function X01
C294, C1754, C1755, F6, R198, C1753, R197, R1823~R1825, R1837~R1840, R1843

18 44 VPK 2011/10/14 Compal Sourcer require change arreay resister to single Delete RP1~RP6, add R2601~R2624 X01

19 40 EC 2011/10/14 Compal Sourcer require change arreay resister to single Delete RP7~RP12, add R2625~R2648 X01

20 19 PCH 2011/10/14 Compal Sourcer require change arreay resister to single Delete RPH1~RPH5, add RH267~RH285 X01

21 34 SATA HDD 2011/10/18 Compal Delete HDD3 SATA re-driver circuit Delete RS42~RS45, CS73~CR76, RS20~RS28, CS57~CS62, US2 X01

22 27 HDMI SW 2011/10/19 Compal Intel feedback change HDMI DDC pull high resister value Change R437, R438, R461, R462 from 4.7k ohm to 2.2k ohm X01

23 27 HDMI SW 2011/10/19 Compal Intel feedback change HDMI HPD implementation Depop Q264, R1741, R1742, C1058, R1743, add R2652 X01
A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT SCHEMATIC M/B LA-8321
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD B
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 4019H5
Date: Wednesday, August 01, 2012 Sheet 61 of 66
5 4 3 2 1
 5 4 3 2 1

Version Change List ( P. I. R. List )

Request
Item Page# Title Date Owner Issue Description Solution Description Rev.
D 24 29 DMC SW 2011/10/19 Compal Intel feedback change DMC HPD implementation Delete R1236, R1237, Add R2649 X01 D

25 29 DMC SW 2011/10/19 Compal Intel feedback add DMC AUX PU/PD resister Add R2650, R2651 X01

26 9 CPU 2011/10/19 Compal Modify CPU DDR Vref circuit Delete QC5, RC76, RC77, change RC118 connect from +1.5V to +1.5V_CPU_VDDQ X01

27 22 PCH 2011/10/19 Compal Intel feedback follow PDDG Delete LH4, depop CH73 X01

28 22 PCH 2011/10/19 Compal Intel feedback follow PDDG Delete RH224, RH225, RH227 X01

29 21 PCH 2011/10/19 Compal Intel feedback follow PDDG Change LH9 to RH287 (0 ohm) X01

30 20 PCH 2011/10/19 Compal Intel feedback follow PDG Pop RH181, Add RH286 X01

31 33 Audio Amplifier 2011/10/20 Compal Audio Amplifier burned issue Add D74, D75, C2035, C2036 X01

C 32 33 Audio Amplifier 2011/10/21 Compal Audio Amplifier burned issue Change C932, C1102 connect from B+ to +AMP_VDD X01 C

33 32 Audio Jcak 2011/10/21 Compal Change JHP2 connector Change JHP2 footprint to SINGA_2SJ3062-000111F_6P-T X01

35 5 XDP 2011/10/21 Compal Depop CPU XDP Depop RC84~RC95, RC5~RC9, RC112, RC113, CC65, CC66 X01

36 16 XDP 2011/10/21 Compal Depop PCH XDP Depop RH1, RH3~RH10, RH12~RH21, RH24, RH51, CH1 X01

37 20, 26 PCH, CRT 2011/10/21 Compal CRT leakage Depop RH178, add RV115 X01

38 32 Audio Jcak 2011/10/22 Compal Change JHP2 connector from NC to NO Change JHP2 symbol, add RA24, depop R149, QU4 X01

39 29 DMC SW 2011/10/22 Compal DMC AUX channel pu/pd location error Change R2650, R2651 connect from U132 to CONN X01

B 40 32 AUDIO 2011/10/22 Compal Reserve for pop noise Add RA25~RA27, change U631 and U629 pin B2 connect to +3.3V_MUTE X01 B

41 34 ODD 2011/10/24 Compal Zero power ODD function Pop RS10 X01

Add C1069, C1070, C1071, C1072, C1073, C1074, C1075, C1076, C1079, C1109,
Vendor feedback DP MUX need CAP for input and
42 28 DP SW 2011/10/24 Compal C1127, C1128, C1138, C1139, C1140, C1141, C1203, C1204, C1205, C1206 X01
output
Change C1190~C1194, C1164, C1177, C1178, C1200, C1201 to 220nF

43 25 CCD 2011/10/24 Compal Reserve for EMI Add L101, depop RV10, RV51, change D61 connect to onnector side X01

Change U633, delete C1200, C1201, add U634, C2037, C2038

44 28 DP SW 2011/10/24 Compal DP dongle can't display on UMA mode Change C1203~C1206 from 0.22uF to 0.1uF X01
Change AUX, DDC, HDP connect

45 43 PWR BTN 2011/10/24 Compal Avoid SW reverse at SMT NC SW1 pin 1 & pin 4 and SW2 pin 1 & pin 4 X01

A 46 30 HDMI IN 2011/10/24 Compal (STDP6038) doesn’t need to read / write the panel EDID de-pop R1880, R1881 X01 A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT SCHEMATIC M/B LA-8321
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD B
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 4019H5
Date: Wednesday, August 01, 2012 Sheet 62 of 66
5 4 3 2 1
 5 4 3 2 1

Version Change List ( P. I. R. List )

Request
Item Page# Title Date Owner Issue Description Solution Description Rev.
D 47 30 HDMI IN 2011/10/24 Compal keep I2S_DAT/SPDIF_IN has fine performance change R1882 to C2039 0.1UF X01 D

reserver these soltion to avoid I2S_DAT/SPDIF_IN

48 30 HDMI IN 2011/10/24 Compal add U635, C2040 X01
signal has attenuation problem duo to long trance

49 32 Audio 2011/10/24 Compal change combo jack dection method de-pop R2585, pop R1244 X01

50 32 AUDIO 2011/10/24 Compal Reserve for pop noise Add C2041 X01

JACK_PLUG funcion reverse duo to JACK

51 32 AUDIO 2011/10/24 Compal add R2653 and QU8 X01
change to normal open type

52 32 AUDIO 2011/10/24 Compal vendor suggestion change R1752 to C2042 0.1UF X01

53 32 AUDIO 2011/10/25 Compal change combo jack dection circuit pop R149, QU4, depop RA24, change QU8 connect X01

C 54 32 AUDIO 2011/10/25 Compal HP fast plug in/out issue change RC107, RC114 to 1k ohm and pop X01 C

55 32 AUDIO 2011/10/25 Compal pop noise issue change RA20, RA21 to 0 ohm X01

56 32 AUDIO 2011/10/26 Compal pop noise issue change RA22, RA23 to 0 ohm X01

change C205~C208 to 0 ohm (R2654~R2657) and pop, pop C209~C212, R358~365

57 43 USB3.0 2011/10/26 Compal base on EA result, depop MB usb3.0 re-driver depop C100, C111~C113, C140, C156, C186, C187, C194~C196, C200, C2025~C2028, X01
R374, R375, R378, R379, R416~R418, R421, U630, U632

"US California Energy Efficiency"

58 43 PWR BTN 2011/10/26 Compal Add Q305, Q306, R2658 X01
(Reserve 130mW for no battery mode)

59 5 XDP 2011/10/26 Compal Depop CPU XDP Depop RC23~RC24, RC30~RC31, RC33~RC34, RC36~RC39 X01

60 32 AUDIO 2011/10/26 Compal HP fast plug in/out issue change RC109, RC115 to 1k ohm and pop X01
B B

61 29 DMC 2011/10/26 Compal Reserve for DMC card Add R2659 X01

62 29 DMC 2011/10/26 Compal add ESD protect for DMC card change Q302 to SB00000EN00 X01

63 26 CRT 2011/10/27 Compal rise and fall time fail change LV1~LV3 from 75 ohm to 47 ohm X01

64 32 Audio 2011/10/27 Compal audio THD+N fail change C11, C14 to 2.2uF 0805 16V X01

65 40 EC 2011/11/09 Compal For Erp lot 6, reduce power consumption on S5 mode change R483, R493 from 10K to 100K ohm X01

66 26 CRT 2011/11/09 Compal For EMI test fail change LV1~LV3 from 47 ohm to 60 ohm X01

67 42 DC-DC 2011/11/09 Compal For PCH_PWR_EN leakage depop R556, pop R553 X01

68 28 DP 2011/11/25 Compal DP can't hot plug issue depop R2261 and R2262 X01
A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT SCHEMATIC M/B LA-8321
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD B
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 4019H5
Date: Wednesday, August 01, 2012 Sheet 63 of 66
5 4 3 2 1
 5 4 3 2 1

Version Change List ( P. I. R. List )

Request
Item Page# Title Date Owner Issue Description Solution Description Rev.
D 69 34 HDD 2011/11/25 Compal SATA EA test fail pop RS13, RS14, RS31, RS32 X01 D

70 24 LCD 2011/11/30 Compal LCD EA test fail Change RV32 from 100 ohm to 47 ohm X01

71 26 CRT 2011/11/30 Compal CRT EA test fail Change LV4, LV5 from bead to 0 ohm, CV24, V25 from 10P to 4.7P X01

72 33 Audio 2011/11/30 Compal Audio amplifier fine tune Change R929, R939 from 16.5k ohm to 20.5k ohm, R1195 from 10k ohm to 14k ohm X01

73 16 Crystal 2011/11/30 Compal Crystal fine tune Change CH2 from 18P to 15P X01

74 17, 40 PCH, EC 2011/12/08 Compal Chang KB_DET# from PCH to EC (pin 34) Chang KB_DET# from PCH to EC (pin 34), DEL R1733, add R2660 X02

75 32 Audio 2011/12/08 Compal S3/S4/S5/G3 have noise when insert external speaker Add QA1, RA28, RA29 X02

76 40 EC 2011/12/08 Compal "US California Energy Efficiency" Add R2661, Q307 X02

C 77 34 ODD 2011/12/08 Compal ADD pull down resister for ODD_EJEECT# Add RS50 X02 C

78 34 ODD 2011/12/13 Compal Reduce 0 ohm delete RS6 X02

79 All All 2011/12/13 Compal Reduce 0 ohm change 0 ohm to short pad X02

80 32 Audio 2011/12/13 Compal change HP mute IC's power rail to +3VALW change HP mute IC's power rail to +3VALW, pop RA27, depop RA25 X02

81 43 IO CONN 2011/12/14 Compal add +5V_ALW pin for USB change JIO1 pin 13 to +5VALW, pin 14 to ground X02

82 40 44 SMBus 2011/12/15 Compal Battery can't charge when with N13-GS MXM card add R2662, R2663, depop R2583, R2584, Q304, Change R470, R473 to 4.7k X02

83 16-23 PCH 2011/12/16 Compal change PCH to QS sample change UH4 part number to SA00005AG1L X02

84 40 EC 2011/12/16 Compal Change board ID to V0.3 Change R466 from 8.2K ohm to 18K ohm X02

B 85 32 Audio 2011/12/19 Compal Modify line-in circuit Change R2550 connect to LINEIN_L_L1 X02 B

86 19 PCH 2011/12/19 Compal nVIDIA N-13 GE can't detect Change UH5 to SN74AHC1G08DCKR, RH230 to 0 ohm, depop R1908, pop RH231 X02

delete U630, U632, C100, C111~C113, R1844, R1845, R424, R411~R418, R374, R375,
R378, R379, R4, R5, R12, R17, R25, R30, R32, R35, R44~R53, R63, R66, R67, R81, R83
87 43 USB 3.0 2011/12/20 Compal delete USB 3.0 redriver and co-lay circuit X02
R108, R190, R195, R290, R313, R314, R323, R326, R337, R421, R358~R365,
R2654~R2657, C140, C156, C186, C187, C2025~C2028, C194~C196, C200, C209~C212

88 32 Audio 2011/12/22 Compal iPHONE's mic can't recording depop R8, R9 X02

89 43 USB 3.0 2011/12/22 Compal delete USB 3.0 redriver and co-lay circuit delete C209~C212 X02

90 30 HDMI IN 2012/01/02 Compal HDMI IN debug function pop R1650, R1651 X02

91 35 BT 2012/01/03 Compal can't disable bt of combo card change RE42 to 0 ohm, add RE43, connect BT_RADIO_DIS# to JWLAN pin 51 X03
A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT SCHEMATIC M/B LA-8321
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD B
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 4019H5
Date: Wednesday, August 01, 2012 Sheet 64 of 66
5 4 3 2 1
 5 4 3 2 1

Version Change List ( P. I. R. List )

Request
Item Page# Title Date Owner Issue Description Solution Description Rev.
D add net SPDIF_DET# connect JSPDIF pin 5 to EC pin 76, change R1829 connect to D
92 32 40 17 AUDIO 2012/01/03 Compal ADD SPDIF detect pin X03
SPDIF_DET#, change IO_DET# to PCH gpio64, add R1737

93 35 DMC 2012/01/04 Compal double pull up del R945 X03

94 40 board ID 2012/01/04 Compal Change board ID to V0.4 Change R466 from 18K ohm to 33K ohm X03

95 32 audio 2012/01/06 Compal pop noise issue add U632, RA30, RA31, C1874 X03

96 32 audio 2012/01/09 Compal THD+N measure add C1601, change RA30, RA31 to RA16 RA17 pin 2 X03

97 32 audio 2012/01/09 Compal MIC fine turn Change RA13 R1243 from short pad to 0 ohm X03

98 32 audio 2012/01/11 Compal THD+N fail change C11, C14 to 25V X5R X03

99 35 BT 2012/01/16 Compal enable debug function on minicard pop RE42, change RE43 to 1k ohm X03
C C

100 32 AUDIO 2012/01/17 Compal Thailand flood impact change C123, C129, C132, C133 to SGA00004D00 X03

101 34 ODD 2012/01/19 Compal Follow AW14/17 change RS50 to 10K ohm X03

102 40 board ID 2012/02/16 Compal Change board ID to V1.0 Change R466 from 33K ohm to 56K ohm A00

The HDMI-IN display will become white screen when

103 27 HDMI 2012/02/16 Compal depop R1919, R1920 A00
the system attached HDMI then do S3/S4 back.

104 32 audio 2012/02/16 Compal reserve pull low resister for EAPD# add R1218 and depop A00

105 40 KB 2012/02/16 Compal reduce 0 ohm change R2625~R2648 to short pad A00

106 34 M-SATA 2012/02/16 Compal reduce m-sata 3vs ripple change JP2 pin 19 and pin 20 to 3VS A00

B 107 43 switch 2012/02/16 Compal depop SW for MP depop SW1 and SW2 A00 B

32~35 26 change RA13, R1243, R1568, LV4, LV5, RE42, R1650, R1651, R2662, R2663, RS11~
108 all 2012/02/20 Compal reduce 0 ohm A00
30 44 RS14, RS18, RS19, RS29~RS32, RS36, RS37 to short pad

109 14 15 MXM 2012/02/21 Compal Add ESD protect part for MXM add D76~D78 A00

del R1746, add L102, C153, C3, R1752, R1753, move C143, C145, C146, C147
110 32 Audio 2012/02/21 Compal audio codec loss issue A00
change R1750 to 0 ohm

111 16 PCH 2012/02/21 Compal update BIOS ROM change U1 PN to SA000039A2L A00

112 32 Audio 2012/02/21 Compal audio codec loss issue del C3, move C336, add C154 A00

113 31 LAN 2012/02/24 Compal EMI ISN issue Change CL39 to 150pF A00

A 114 32 Audio 2012/02/24 Compal audio codec loss issue change R1753 to L103, L3 from 4.7UH_CBC2012T4R7M to 4.7UH_LQM2MPN4R7MG0 A00 A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT SCHEMATIC M/B LA-8321
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD B
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 4019H5
Date: Wednesday, August 01, 2012 Sheet 65 of 66
5 4 3 2 1
 5 4 3 2 1

Version Change List ( P. I. R. List )

Request
Item Page# Title Date Owner Issue Description Solution Description Rev.
D 115 32 Audio 2012/02/24 Compal reduce 0 ohm change RA12, RA14~RA23, RA27, RA30, RA31, R1244 to short pad A00 D

116 32 Audio 2012/02/29 Compal Audio precision fail change C2042 to 1uF, R1727, R3 to 2.2k ohm A00

117 16-23 PCH 2012/03/07 Compal update PCH PN change PCH PN to SA00005AG3L A00

C C

B B

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT SCHEMATIC M/B LA-8321
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD B
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 4019H5
Date: Wednesday, August 01, 2012 Sheet 66 of 66
5 4 3 2 1
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