Scribd
Upload
39 views4 pages

Experiment No.3 Date: 16/01/2020: Aim:-To Design Parallel RLC Circuit Software Used:-AWR Design Environment 10 Theory

The document describes designing a parallel RLC circuit in AWR Design Environment software. It discusses the theory behind parallel RLC circuits and how their properties can be obtained from considering them as the dual impedance of series RLC circuits. The document also provides the equations for attenuation, Q factor, and fractional bandwidth of parallel RLC circuits. It includes an application of variable tuned circuits, filters, and oscillators using parallel RLC circuits and presents the circuit diagram and simulation procedure and results.

Uploaded by

Saurabh Charde
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
39 views4 pages

Experiment No.3 Date: 16/01/2020: Aim:-To Design Parallel RLC Circuit Software Used:-AWR Design Environment 10 Theory

The document describes designing a parallel RLC circuit in AWR Design Environment software. It discusses the theory behind parallel RLC circuits and how their properties can be obtained from considering them as the dual impedance of series RLC circuits. The document also provides the equations for attenuation, Q factor, and fractional bandwidth of parallel RLC circuits. It includes an application of variable tuned circuits, filters, and oscillators using parallel RLC circuits and presents the circuit diagram and simulation procedure and results.

Uploaded by

Saurabh Charde
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
You are on page 1/ 4

LAB3_159

Sec B

Experiment no.3

Date: 16/01/2020
Aim:-To Design parallel RLC circuit

Software Used:- AWR Design Environment 10

Theory:

The properties of the parallel RLC circuit can be obtained from the duality relationship of
electrical circuits and considering that the parallel RLC is the dual impedance of a series RLC.
Considering this it becomes clear that the differential equations describing this circuit are
identical to the general form of those describing a series RLC.
For the parallel circuit, the attenuation α is given by[18]

 This means that a wide band, low Q circuit in one topology will become a narrow band,
high Q circuit in the other topology when constructed from components with identical values.
The Q and fractional bandwidth of the parallel circuit are given by

The change from a series arrangement to a parallel arrangement results in the circuit having a
peak in impedance at resonance rather than a minimum, so the circuit is an antiresonator.

The graph opposite shows that there is a minimum in the frequency response of the current at
the resonance frequency

when the circuit is driven by a constant voltage. On the other hand, if driven by a constant
current, there would be a maximum in the voltage which would follow the same curve as the
current in the series circuit.

Application:
Variable tuned circuits: A very frequent use of these circuits is in the tuning circuits of
analogue radios. Adjustable tuning is commonly achieved with a parallel plate variable
LAB3_159
Sec B

capacitor which allows the value of C to be changed and tune to stations on different


frequencies. 
Filters: In the filtering application, the resistor R becomes the load that the filter is working into.
The value of the damping factor is chosen based on the desired bandwidth of the filter.
Oscillators: For applications in oscillator circuits, it is generally desirable to make the attenuation
(or equivalently, the damping factor) as small as possible. In practice, this objective requires
making the circuit's resistance R as small as physically possible for a series circuit, or
alternatively increasing R to as much as possible for a parallel circuit. In either case, the RLC
circuit becomes a good approximation to an ideal LC circuit. However, for very low attenuation
circuits (high Q-factor) circuits, issues such as dielectric losses of coils and capacitors can
become important.

Circuit Diagram:

Simulator Procedure:

1. Place all the component as shown in the circuit diagram.


LAB3_159
Sec B

2. Connect them with wire.


3. Add a rectangular graph and choose S parameter from port 2 to port 1. Also set as DB.
4. Choose Simulate > Analyze or click the Analyze button on the toolbar. The simulation
response shown in the following graph should display.
5. Take another graph for smith chart and again analyze it by choosing simulate button.

Simulation Result:
LAB3_159
Sec B

You might also like

pFad - Phonifier reborn

Pfad - The Proxy pFad of © 2024 Garber Painting. All rights reserved.

Note: This service is not intended for secure transactions such as banking, social media, email, or purchasing. Use at your own risk. We assume no liability whatsoever for broken pages.


Alternative Proxies:

Alternative Proxy

pFad Proxy

pFad v3 Proxy

pFad v4 Proxy