ADSP-21469 EZ-Board TM

Evaluation System Manual

Revision 1.0, April 2009

Part Number
82-000221-01

Analog Devices, Inc.

One Technology Way
Norwood, Mass. 02062-9106 a
Copyright Information
© 2009 Analog Devices, Inc., ALL RIGHTS RESERVED. This docu-
ment may not be reproduced in any form without prior, express written
consent from Analog Devices, Inc.
Printed in the USA.

Disclaimer
Analog Devices, Inc. reserves the right to change this product without
prior notice. Information furnished by Analog Devices is believed to be
accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use; nor for any infringement of patents or other rights of
third parties which may result from its use. No license is granted by impli-
cation or otherwise under the patent rights of Analog Devices, Inc.

Trademark and Service Mark Notice

The Analog Devices logo, VisualDSP++, SHARC, EZ-KIT Lite, and
EZ-Extender are registered trademarks of Analog Devices, Inc.
EZ-Board is a trademark of Analog Devices, Inc.
All other brand and product names are trademarks or service marks of
their respective owners.
Regulatory Compliance
The ADSP-21469 EZ-Board is designed to be used solely in a laboratory
environment. The board is not intended for use as a consumer end prod-
uct or as a portion of a consumer end product. The board is an open
system design which does not include a shielded enclosure and therefore
may cause interference to other electrical devices in close proximity. This
board should not be used in or near any medical equipment or RF devices.
The ADSP-21469 EZ-Board is currently being processed for certification
that it complies with the essential requirements of the European EMC
directive 89/336/EEC amended by 93/68/EEC and therefore carries the
“CE” mark.

The EZ-Board evaluation system contains ESD (electrostatic discharge)

sensitive devices. Electrostatic charges readily accumulate on the human
body and equipment and can discharge without detection. Permanent
damage may occur on devices subjected to high-energy discharges. Proper
ESD precautions are recommended to avoid performance degradation or
loss of functionality. Store unused EZ-Board boards in the protective ship-
ping package.
CONTENTS

PREFACE
Product Overview .......................................................................... xii
Purpose of This Manual .................................................................. xv
Intended Audience .......................................................................... xv
Manual Contents ........................................................................... xvi
What’s New in This Manual ........................................................... xvi
Technical or Customer Support ..................................................... xvii
Supported Processors ..................................................................... xvii
Product Information .................................................................... xviii
Analog Devices Web Site ........................................................ xviii
VisualDSP++ Online Documentation ....................................... xix
Technical Library CD ............................................................... xix
Related Documents ................................................................... xx
Notation Conventions .................................................................... xxi

USING ADSP-21469 EZ-BOARD

Package Contents .......................................................................... 1-2
Default Configuration ................................................................... 1-3
EZ-Board Installation ................................................................... 1-5

ADSP-21469 EZ-Board Evaluation System Manual v

CONTENTS

EZ-Board Session Startup ............................................................. 1-6

Evaluation License Restrictions ..................................................... 1-8
Memory Map ............................................................................... 1-8
DDR2 Interface ........................................................................... 1-9
Parallel Flash Memory Interface .................................................. 1-10
SPI Interface .............................................................................. 1-11
Link Port Interface ..................................................................... 1-12
Temperature Sensor Interface ...................................................... 1-13
S/PDIF Interface ........................................................................ 1-14
Audio Interface ........................................................................... 1-14
UART Interface .......................................................................... 1-16
LEDs and Push Buttons .............................................................. 1-17
JTAG Interface ........................................................................... 1-18
Land Grid Array ......................................................................... 1-20
Expansion Interface II ................................................................. 1-20
Power Measurements .................................................................. 1-21
Power-On-Self Test ..................................................................... 1-21
Example Programs ...................................................................... 1-22
Background Telemetry Channel .................................................. 1-22
Reference Design Information ..................................................... 1-23

ADSP-21469 EZ-BOARD HARDWARE REFERENCE

System Architecture ...................................................................... 2-2
DAI Interface .......................................................................... 2-3
DPI Interface .......................................................................... 2-4

vi ADSP-21469 EZ-Board Evaluation System Manual

 CONTENTS

Flags and Memory Selects .............................................................. 2-6

Push Button and Switch Settings ................................................... 2-7
DAI [1–8] Enable Switch (SW1) .............................................. 2-8
DAI [9–16] Enable Switch (SW2) ............................................ 2-8
DPI [1–8] Enable Switch (SW3) .............................................. 2-9
Boot Mode Select Switch (SW4) ............................................ 2-10
DSP Clock Configuration Switch (SW5) ................................ 2-11
DAI [17–20] Enable Switch (SW7) ........................................ 2-11
Programmable Flag Push Buttons (SW8–11) .......................... 2-12
Reset Push Button (SW12) .................................................... 2-12
Asynchronous Control Enable Switch (SW13) ........................ 2-13
DPI [9–14] Enable Switch (SW14) ........................................ 2-13
Audio In1 Left Selection Switch (SW15) ................................ 2-14
Audio In1 Right Selection Switch (SW16) .............................. 2-15
Audio In2 Right Selection Switch (SW17) .............................. 2-15
Audio In2 Left Selection Switch (SW18) ................................ 2-16
JTAG Switches (SW19–22) .................................................... 2-17
Headphone Enable Switch (SW23) ........................................ 2-19
Audio Loopback Switches (SW24–25) ................................... 2-19
Jumpers ...................................................................................... 2-20
Flash WP Jumper (JP1) ......................................................... 2-21
S/PDIF Loopback Jumper (JP2) ............................................ 2-21
UART RTS/CTS Jumper (JP3) .............................................. 2-21
UART Loopback Jumper (JP4) .............................................. 2-21

ADSP-21469 EZ-Board Evaluation System Manual vii

CONTENTS

LEDs ......................................................................................... 2-22

GPIO LEDs (LED1–8) ......................................................... 2-23
Power LED (LED9) .............................................................. 2-23
Reset LED (LED10) ............................................................. 2-23
Thermal Limit LED (LED11) ............................................... 2-24
Connectors ................................................................................. 2-25
Expansion Interface II Connector (J1) ................................... 2-26
RS-232 Connector (J2) ......................................................... 2-26
Link Port 1 Connector (J3) ................................................... 2-26
RCA Audio Connector (J4) ................................................... 2-27
RCA Audio Connector (J5) ................................................... 2-27
S/PDIF IN Connector (J6) .................................................... 2-27
S/PDIF OUT Connector (J7) ............................................... 2-27
Headphone Out Connector (J8) ............................................ 2-28
JTAG Connector (P1) ........................................................... 2-28
Expansion Interface II Connector (P2) .................................. 2-28
DMAX Land Grid Array Connectors (P5–7) ......................... 2-29
Differential In/Out Connectors (P8–9) .................................. 2-29
MLB Connector (P10) .......................................................... 2-29
Link Port 0 Connector (P12) ................................................. 2-30
VDD_DDR2 Power Connector (P13) ................................... 2-30
VDDINT Power Connector (P14) ........................................ 2-30
VDDEXT Power Connector (P15) ........................................ 2-30
Power Connector (P16) ......................................................... 2-31

viii ADSP-21469 EZ-Board Evaluation System Manual

 CONTENTS

Standalone Debug Agent Connector (ZP1) ............................ 2-31

ADSP-21469 EZ-BOARD BILL OF MATERIALS

ADSP-21469 EZ-BOARD SCHEMATIC
Title Page .................................................................................... B-1
Processor - DDR2 Interface .......................................................... B-2
Processor - ASYNC Interface ........................................................ B-3
Processor - DAI, DPI, Link Port Interfaces .................................. B-4
Processor - Power ......................................................................... B-5
S/PDIF, RS-232, JTAG Interfaces ................................................. B-6
Reset Circuit, Push Buttons, LEDs ............................................... B-7
Audio Page 1 ................................................................................ B-8
Audio Page 2 ................................................................................ B-9
Audio Page 3 .............................................................................. B-10
Audio Page 4 .............................................................................. B-11
Audio Page 5 .............................................................................. B-12
Audio Page 6 .............................................................................. B-13
Audio Page 7 .............................................................................. B-14
Expansion II Interface / L. A. Connectors ................................... B-15
Power ........................................................................................ B-16

INDEX

ADSP-21469 EZ-Board Evaluation System Manual ix

CONTENTS

x ADSP-21469 EZ-Board Evaluation System Manual

 PREFACE

Thank you for purchasing the ADSP-21469 EZ-Board™, Analog

Devices, Inc. evaluation system for SHARC® processors.
SHARC processors are based on a 32-bit super Harvard architecture that
includes a unique memory architecture comprised of two large on-chip,
dual-ported SRAM blocks coupled with a sophisticated IO processor,
which gives a SHARC processor the bandwidth for sustained high-speed
computations. SHARC processors represents today’s de facto standard for
floating-point processing, targeted toward premium audio applications.
The evaluation board is designed to be used in conjunction with the Visu-
alDSP++® development environment to test the capabilities of the
ADSP-21469 SHARC processors. The VisualDSP++ development envi-
ronment aids advanced application code development and debug, such as:
• Create, compile, assemble, and link application programs written
in C++, C, and ADSP-21469 assembly
• Load, run, step, halt, and set breakpoints in application programs
• Read and write data and program memory
• Read and write core and peripheral registers
• Plot memory
Access to the ADSP-21469 processor from a personal computer (PC) is
achieved through a USB port or an external JTAG emulator. The USB
interface of the standalone debug agent gives unrestricted access to the
ADSP-21469 processor and evaluation board’s peripherals. Analog

ADSP-21469 EZ-Board Evaluation System Manual xi

Product Overview

Devices JTAG emulators offer faster communication between the host PC

and target hardware. To learn more about Analog Devices emulators and
processor development tools, go to http://www.analog.com/dsp/tools/.
The ADSP-21469 EZ-Board provides example programs to demonstrate
the capabilities of the product.

L The ADSP-21469 EZ-Board installation is part of the Visu-

alDSP++ installation. As an EZ-KIT Lite, an EZ-Board is a
licensed product that offers an unrestricted evaluation license for
the first 90 days. For details about evaluation license restrictions
after the 90 days, refer to “Evaluation License Restrictions” on
page 1-8 and the VisualDSP++ Installation Quick Reference Card.

Product Overview
The board features:
• Analog Devices ADSP-21469 SHARC processor
D Core performance up to 450 MHz
D 324-pin PBGA package
D 25 MHz oscillator
D 5 Mb of internal RAM memory
• Double data rate synchronous dynamic random access memory
(DDR2)
D Micron MT47H64M16HR-3 – 128 MB (64M x 16 bits)
D Performance of up to 225 MHz clock rate
• Parallel flash memory
D Numonyx M29W320EB – 4 MB (4M x 8 bits)

xii ADSP-21469 EZ-Board Evaluation System Manual

 Preface

• SPI flash memory

D Numonyx M25P16 – 16 Mb
• Analog audio interface
D Analog Devices AD1939 audio codec
D Eight DAC outputs for four channels of stereo output
D Four ADC inputs for two channels of stereo input
D Two DB25 connectors for differential inputs/outputs
D 3.5 mm headphone jack with volume control connected to
one of the stereo outputs
D Supports all eight DACs and four ADCs in TDM and I2S
modes at 48 KHz, 96 KHz, and 192 KHz sample rates
• Digital audio interface (S/PDIF)
• RCA phono jack output
• RCA phono jack input
• Link port interface
D Two Samtec ERF8/ERM8 series connectors
D Link ports performance up to 166 MHz
D Two EZ-Boards can mate with no cables required
• Temperature monitor
D ON Semiconductor ADM1032
D Local and remote temperature sensing

ADSP-21469 EZ-Board Evaluation System Manual xiii

Product Overview

• Universal asynchronous receiver/transmitter (UART)

D ADM3202 RS-232 line driver/receiver
D DB9 female connector
• LEDs
D Eleven LEDs: one board reset (red), eight general-purpose
(amber), one temperature sensor LED (amber), and one
power (green)
• Push buttons
D Five push buttons: one reset, two connected to DAI, two
connected to FLAG pins of the processor
• Expansion interface II
D Next generation of the expansion interface design, provides
access to most of the ADSP-21469 processor signals
• Land grid array
D Easy probing of all port pins and most asynchronous
memory interface (AMI) signals
• Other features
D JTAG ICE 14-pin header
D SHARC power measurement jumpers
For information about the hardware components of the EZ-Board, refer
to “ADSP-21469 EZ-Board Hardware Reference” on page 2-1.

xiv ADSP-21469 EZ-Board Evaluation System Manual

 Preface

Purpose of This Manual

The ADSP-21469 EZ-Board Evaluation System Manual provides instruc-
tions for installing the product hardware (board). The text describes
operation and configuration of the board components and provides guide-
lines for running your own code on the ADSP-21469 EZ-Board. Finally, a
schematic and a bill of materials are provided for reference.
The product software installation is detailed in the VisualDSP++ Installa-
tion Quick Reference Card.

Intended Audience
The primary audience for this manual is a programmer who is familiar
with Analog Devices processors. This manual assumes that the audience
has a working knowledge of the appropriate processor architecture and
instruction set. Programmers who are unfamiliar with Analog Devices
processors can use this manual, but should supplement it with other texts
(such as the ADSP-2146x SHARC Processor Hardware Reference for
ADSP-21467/8/9 Processors and SHARC Processor Instruction Set Reference)
that describe your target architecture.
Programmers who are unfamiliar with VisualDSP++ should refer to the
VisualDSP++ online Help and user’s or getting started guides. For the
locations of these documents, see “Related Documents”.

ADSP-21469 EZ-Board Evaluation System Manual xv

Manual Contents

Manual Contents
The manual consists of:
• Chapter 1, “Using ADSP-21469 EZ-Board” on page 1-1
Describes EZ-Board functionality from a programmer’s perspective
and provides an easy-to-access memory map.
• Chapter 2, “ADSP-21469 EZ-Board Hardware Reference” on
page 2-1
Provides information on the EZ-Board hardware components.
• Appendix A, “ADSP-21469 EZ-Board Bill Of Materials” on
page A-1
Provides a list of components used to manufacture the EZ-Board.
• Appendix B, “ADSP-21469 EZ-Board Schematic” on page B-1
Provides the resources to allow EZ-Board board-level debugging or
to use as a reference. Appendix B is part of the online Help.

What’s New in This Manual

This is the first revision of the ADSP-21469 EZ-Board Evaluation System
Manual.

xvi ADSP-21469 EZ-Board Evaluation System Manual

 Preface

Technical or Customer Support

You can reach Analog Devices, Inc. Customer Support in the following
ways:
• Visit the Embedded Processing and DSP products Web site at
http://www.analog.com/processors/technical_support

• E-mail tools questions to

processor.tools.support@analog.com

• E-mail processor questions to

processor.support@analog.com (World wide support)
processor.europe@analog.com (Europe support)
processor.china@analog.com (China support)

• Phone questions to 1-800-ANALOGD

• Contact your Analog Devices, Inc. local sales office or authorized
distributor
• Send questions by mail to:
Analog Devices, Inc.
One Technology Way
P.O. Box 9106
Norwood, MA 02062-9106
USA

Supported Processors
This evaluation system supports Analog Devices ADSP-21462,
ADSP-21465, ADSP-21467, and ADSP-21469 SHARC embedded
processors.

ADSP-21469 EZ-Board Evaluation System Manual xvii

Product Information

Product Information
Product information can be obtained from the Analog Devices Web site,
VisualDSP++ online Help system, and a technical library CD.

Analog Devices Web Site

The Analog Devices Web site, www.analog.com, provides information
about a broad range of products—analog integrated circuits, amplifiers,
converters, and digital signal processors.
To access a complete technical library for each processor family, go to
http://www.analog.com/processors/technical_library. The manuals
selection opens a list of current manuals related to the product as well as a
link to the previous revisions of the manuals. When locating your manual
title, note a possible errata check mark next to the title that leads to the
current correction report against the manual.
Also note, MyAnalog.com is a free feature of the Analog Devices Web site
that allows customization of a Web page to display only the latest infor-
mation about products you are interested in. You can choose to receive
weekly e-mail notifications containing updates to the Web pages that meet
your interests, including documentation errata against all manuals.
MyAnalog.com provides access to books, application notes, data sheets,
code examples, and more.
Visit MyAnalog.com to sign up. If you are a registered user, just log on.
Your user name is your e-mail address.

xviii ADSP-21469 EZ-Board Evaluation System Manual

 Preface

VisualDSP++ Online Documentation

Online documentation comprises the VisualDSP++ Help system, software
tools manuals, hardware tools manuals, processor manuals, Dinkum
Abridged C++ library, and FLEXnet License Tools software documenta-
tion. You can search easily across the entire VisualDSP++ documentation
set for any topic of interest.
For easy printing, supplementary Portable Documentation Format (.pdf)
files for all manuals are provided on the VisualDSP++ installation CD.
Each documentation file type is described as follows.

File Description

.chm Help system files and manuals in Microsoft help format

.htm or Dinkum Abridged C++ library and FLEXnet License Tools software documenta-
.html tion. Viewing and printing the .html files requires a browser, such as Internet
Explorer 6.0 (or higher).

.pdf VisualDSP++ and processor manuals in PDF format. Viewing and printing the
.pdf files requires a PDF reader, such as Adobe Acrobat Reader (4.0 or higher).

Technical Library CD
The technical library CD contains seminar materials, product highlights, a
selection guide, and documentation files of processor manuals, Visu-
alDSP++ software manuals, and hardware tools manuals for the following
processor families: Blackfin, SHARC, TigerSHARC, ADSP-218x, and
ADSP-219x.
To order the technical library CD, go to http://www.analog.com/proces-
sors/technical_library, navigate to the manuals page for your
processor, click the request CD check mark, and fill out the order form.

ADSP-21469 EZ-Board Evaluation System Manual xix

Product Information

Data sheets, which can be downloaded from the Analog Devices Web site,
change rapidly, and therefore are not included on the technical library
CD. Technical manuals change periodically. Check the Web site for the
latest manual revisions and associated documentation errata.

Related Documents
For information on product related development software, see the follow-
ing publications.

Table 1. Related Processor Publications

Title Description

ADSP-21462/ADSP-21465/ADSP-21467/ADSP- General functional description, pinout, and

21469 SHARC Processor Preliminary Data Sheet timing of the processor.

ADSP-2146x SHARC Processor Hardware Refer- Description of internal processor architec-

ence for ADSP-21467/8/9 Processors ture and all register functions.
SHARC Processor Programming Reference Description of all allowed processor assem-
bly instructions.

Table 2. Related VisualDSP++ Publications

Title Description

ADSP-21469 EZ-Board Evaluation System Man- Description of the hardware capabilities of

ual the evaluation system; description of how to
access these capabilities in the VisualDSP++
environment.

VisualDSP++ User’s Guide Description of VisualDSP++ features and

usage.

VisualDSP++ Assembler and Preprocessor Manuals Description of the assembler function and
commands.

VisualDSP++ C/C++ Complier and Library Man- Description of the complier function and
ual for SHARC Processors commands for SHARC processors.

xx ADSP-21469 EZ-Board Evaluation System Manual

 Preface

Table 2. Related VisualDSP++ Publications (Cont’d)

Title Description

VisualDSP++ Linker and Utilities Manual Description of the linker function and com-
mands.

VisualDSP++ Loader and Utilities Manual Description of the loader/splitter function

and commands.

Notation Conventions
Text conventions used in this manual are identified and described as
follows.

Example Description

Close command Titles in reference sections indicate the location of an item within the
(File menu) VisualDSP++ environment’s menu system (for example, the Close com-
mand appears on the File menu).
{this | that} Alternative required items in syntax descriptions appear within curly
brackets and separated by vertical bars; read the example as this or
that. One or the other is required.

[this | that] Optional items in syntax descriptions appear within brackets and sepa-
rated by vertical bars; read the example as an optional this or that.
[this,…] Optional item lists in syntax descriptions appear within brackets delim-
ited by commas and terminated with an ellipse; read the example as an
optional comma-separated list of this.
.SECTION Commands, directives, keywords, and feature names are in text with
letter gothic font.

filename Non-keyword placeholders appear in text with italic style format.

ADSP-21469 EZ-Board Evaluation System Manual xxi

Notation Conventions

Example Description
Note: For correct operation, ...

L
A Note provides supplementary information on a related topic. In the
online version of this book, the word Note appears instead of this
symbol.

Caution: Incorrect device operation may result if ...

a
Caution: Device damage may result if ...
A Caution identifies conditions or inappropriate usage of the product
that could lead to undesirable results or product damage. In the online
version of this book, the word Caution appears instead of this symbol.

Warning: Injury to device users may result if ...

[
A Warning identifies conditions or inappropriate usage of the product
that could lead to conditions that are potentially hazardous for the
devices users. In the online version of this book, the word Warning
appears instead of this symbol.

xxii ADSP-21469 EZ-Board Evaluation System Manual

1 USING ADSP-21469
EZ-BOARD

This chapter provides specific information to assist you with development

of programs for the ADSP-21469 EZ-Board evaluation system.
The following topics are covered.
• “Package Contents” on page 1-2
• “Default Configuration” on page 1-3
• “EZ-Board Installation” on page 1-5
• “EZ-Board Session Startup” on page 1-6
• “Evaluation License Restrictions” on page 1-8
• “Memory Map” on page 1-8
• “DDR2 Interface” on page 1-9
• “Parallel Flash Memory Interface” on page 1-10
• “SPI Interface” on page 1-11
• “Link Port Interface” on page 1-12
• “Temperature Sensor Interface” on page 1-13
• “S/PDIF Interface” on page 1-14
• “Audio Interface” on page 1-14
• “UART Interface” on page 1-16

ADSP-21469 EZ-Board Evaluation System Manual 1-1

Package Contents

• “LEDs and Push Buttons” on page 1-17

• “JTAG Interface” on page 1-18
• “Land Grid Array” on page 1-20
• “Expansion Interface II” on page 1-20
• “Power Measurements” on page 1-21
• “Power-On-Self Test” on page 1-21
• “Example Programs” on page 1-22
• “Background Telemetry Channel” on page 1-22
• “Reference Design Information” on page 1-23
For information about VisualDSP++, including the boot loading, target
options, and other facilities, refer to the online Help.
For more information about the ADSP-21469 SHARC processor, see doc-
uments referred to as “Related Documents”.

Package Contents
Your ADSP-21469 EZ-KIT Lite evaluation system package contains the
following items.
• ADSP-21469 EZ-Board
• VisualDSP++ Installation Quick Reference Card

1-2 ADSP-21469 EZ-Board Evaluation System Manual

 Using ADSP-21469 EZ-Board

• CD containing:
D VisualDSP++ software
D ADSP-21469 EZ-Board debug software
D USB driver files
D Example programs
D ADSP-21469 EZ-Board Evaluation System Manual
• Universal 5.0V DC power supply
• 3.5 mm stereo headphones
• 6-foot RCA audio cable
• 6-foot 3.5 mm/RCA x 2 Y-cable
• 3.5 mm stereo female to RCA male Y-cable
If any item is missing, contact the vendor where you purchased your
EZ-Board or contact Analog Devices, Inc.

Default Configuration
The ADSP-21469 EZ-Board board is designed to run outside your per-
sonal computer as a stand-alone unit. You do not have to open your
computer case.
The EZ-Board evaluation system contains ESD (electrostatic discharge) sensi-
tive devices. Electrostatic charges readily accumulate on the human body and
equipment and can discharge without detection. Permanent damage may
occur on devices subjected to high-energy discharges. Proper ESD precautions
are recommended to avoid performance degradation or loss of functionality.
Store unused EZ-Board in the protective shipping package.

ADSP-21469 EZ-Board Evaluation System Manual 1-3

Default Configuration

When removing the EZ-Board from the package, handle the board care-
fully to avoid the discharge of static electricity, which can damage some
components. Figure 1-1 shows the default jumper and switch settings,
connector locations, and LEDs used in installation. Confirm that your
board is in the default configuration before using the board.

Figure 1-1. Default EZ-Board Hardware Setup

1-4 ADSP-21469 EZ-Board Evaluation System Manual

 Using ADSP-21469 EZ-Board

EZ-Board Installation
For correct operation, install the software in the order presented in the
VisualDSP++ Installation Quick Reference Card. Substitute instructions in
step 3 with instructions in this section.
There are two options to connect the EZ-Board hardware to a personal
computer (PC) running VisualDSP++ 5.0: via an Analog Devices emula-
tor or via a standalone debug agent module. The standalone debug agent
allows a debug agent to interface to the ADSP-21469 EZ-Board. The
standalone debug agent is shipped with the kit.
To connect the EZ-Board to a PC via an emulator:
1. Plug the 5V adaptor into connector P16 (labeled 5.0V).
2. Attach the emulator header to connector P1 (labeled JTAG) on the
back side of the EZ-Board.
To connect the EZ-Board to a PC via a standalone debug agent:

a wall
The debug agent can be used only when power is supplied from the
adaptor.
1. Attach the standalone debug agent to connectors P1 (labeled JTAG)
and ZP1 on the backside of the EZ-Board, watching for the keying
pin of P1 to connect correctly.
2. Plug the 5V adaptor into connector P16 (labeled 5.0V).
3. Plug one side of the provided USB cable into a USB connector of
the standalone debug agent. Plug the other side of the cable into
a USB port of the PC running VisualDSP++ 5.0 update 7 or later.
4. Verify that the yellow USB monitor LED on the standalone debug
agent (LED4, located on the back side of the board) is lit. This signi-
fies that the board is communicating properly with the host PC
and ready to run VisualDSP++.

ADSP-21469 EZ-Board Evaluation System Manual 1-5

EZ-Board Session Startup

EZ-Board Session Startup

1. If you are running VisualDSP++ for the first time, navigate to the
VisualDSP++ environment via the Start–>Programs menu. The
main window appears. Note that VisualDSP++ is not connected to
any session. Skip the rest of this step to step 2.

If you have run VisualDSP++ previously, the last opened session

appears on the screen. You can override the default behavior and
force VisualDSP++ to start a new session by pressing and holding
down the Ctrl key while starting VisualDSP++. Do not release the
Ctrl key until the Session Wizard appears on the screen. Go to
step 3.
2. To connect to a new EZ-KIT Lite session, start Session Wizard by
selecting one of the following.
• From the Session menu, New Session.
• From the Session menu, Session List. Then click New Ses-
sion from the Session List dialog box.
• From the Session menu, Connect to Target.
3. The Select Processor page of the wizard appears on the screen.
Ensure SHARC is selected in Processor family. In Choose a target
processor, select ADSP-21469. Click Next.
4. The Select Connection Type page of the wizard appears on the
screen. For standalone debug agent connections, select EZ-KIT
Lite and click Next. For emulator connections, select Emulator,
and click Next.
5. The Select Platform page of the wizard appears on the screen.
For standalone debug agent connections, ensure that the selected
platform is ADSP-21469 EZ-KIT Lite via Debug Agent. For emu-
lator connections, choose the type of emulator that is connected.

1-6 ADSP-21469 EZ-Board Evaluation System Manual

 Using ADSP-21469 EZ-Board

Specify your own Session name for the session or accept the default
name.

The session name can be a string of any length; although, the box
displays approximately 32 characters. The session name can
include space characters. If you do not specify a session name,
VisualDSP++ creates a session name by combining the name of the
selected platform with the selected processor. The only way to
change a session name later is to delete the session and open a new
session.

Click Next.
6. The Finish page of the wizard appears on the screen. The page dis-
plays your selections. Check the selections. If you are not satisfied,
click Back to make changes; otherwise, click Finish. VisualDSP++
creates the new session and connects to the EZ-Board. Once con-
nected, the main window’s title is changed to include the session
name set in step 5.

L Toor select
disconnect from a session, click the disconnect button
Session–>Disconnect from Target.

To delete a session, select Session –> Session List. Select the ses-
sion name from the list and click Delete. Click OK.

ADSP-21469 EZ-Board Evaluation System Manual 1-7

Evaluation License Restrictions

Evaluation License Restrictions

The ADSP-21469 EZ-Board installation is part of the VisualDSP++
installation. The EZ-Board is a licensed product that offers an unrestricted
evaluation license for the first 90 days. Once the initial unrestricted
90-day evaluation license expires:
• VisualDSP++ restricts a connection to the ADSP-21469 EZ-Board
via the USB port of the standalone debug agent interface only.
Connections to simulators and emulation products are no longer
allowed.
• The linker restricts a user program to 27306 words of memory for
code space with no restrictions for data space.
• The EZ-Board hardware must be connected and powered up to use
VisualDSP++ with a valid evaluation or permanent license.
Refer to the VisualDSP++ Installation Quick Reference Card for details.

Memory Map
The ADSP-21469 processor has internal static random access memory
(SRAM) for instructions and data storage; see Table 1-1. The internal
memory details can be found in the ADSP-2146x SHARC Processor Hard-
ware Reference for ADSP-21467/8/9 Processors.
The EZ-Board includes three types of external memory: double data rate
two synchronous dynamic random access memory (DDR2 SDRAM),
serial peripheral interconnect (SPI) flash, and parallel flash. See Table 1-2.
For more information about a specific memory type, go to the respective
section in this chapter.

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 Using ADSP-21469 EZ-Board

Table 1-1. Processor Internal Memory Space

Start Address End Address Contents

0x0000 0000 0x0003 FFFF IOP Registers

0x0009 2000 0x0009 DFFF BLOCK 0 RAM

0x0009 E000 0x000B 1FFF Reserved

0x000B 2000 0x000B DFFF BLOCK 1 RAM

0x000B E000 0x000B FFFF Reserved

0x000C 0000 0x000C 7FFF BLOCK 2 RAM

0x000C 8000 0x000D FFFF Reserved

0x000E 0000 0x000E 7FFF BLOCK 3 RAM

Table 1-2. EZ-Board External Memory Map

Start Address End Address Content
0x0020 0000 0x021F FFFF DDR2 (~DDR2CS0)
0x0400 0000 0x043F FFFF Flash memory (~MS1)
0x0800 0000 0x08FF FFFF Unused chip select (~MS2) for non-DDR2 addresses
0x0800 0000 0x0BFF FFFF Unused chip select (~DDR2_CS2) for DDR2 addresses
0x0C00 0000 0x0CFF FFFF Unused chip select (~MS3) for non-DDR2 addresses
0x0C00 0000 0x0FFF FFFF Unused chip select (~DDR2_CS3) for DDR2 addresses

DDR2 Interface
The ADSP-21469 processor connects to a 128 MB Micron
MT47H64M16HR-3 chip through the DDR2 SDRAM controller. The
DDR2 memory controller on the processor and DDR2 memory chip are
powered by an on-board 1.8V regulator. Data is transferred between the
processor and DDR2 on both the rising and falling edges of the DDR2

ADSP-21469 EZ-Board Evaluation System Manual 1-9

Parallel Flash Memory Interface

clock. The DDR2 controller on the processor can operate at a maximum

clock frequency of half the processor’s core clock. This equates to a DDR2
clock rate of 225 MHz, which is the ADSP-21469 processor limitation.
With a VisualDSP++ session running and connected to the EZ-Board via
the USB standalone debug agent, the DDR2 registers are configured auto-
matically each time the processor is reset. The values are used whenever
DDR2 is accessed through the debugger (for example, when viewing
memory windows or loading a program).
To disable the automatic setting of the DDR2 registers, select Target
Options from the Settings menu in VisualDSP++ and uncheck Use XML
reset values. For more information on changing the reset values, refer to
the online Help.
An example program is included in the EZ-Board installation directory to
demonstrate how to setup and access the DDR2 interface. For more infor-
mation on how to initialize the registers after a reset, search the
VisualDSP++ online Help for “reset values”.

Parallel Flash Memory Interface

The parallel flash memory interface of the ADSP-21469 EZ-Board con-
tains a 4 MB (4M x 8 bits) Numonyx M29W320EB chip. Flash memory
connects to the 8-bit data bus and address lines 0 through 21. Chip enable
is decoded by the MS1 select line (default) through switch SW13 position 2;
see “Asynchronous Control Enable Switch (SW13)” on page 2-13. To use
the MS0 line instead of MS1 to interface to flash memory, make the respec-
tive change to SW13. The address range for flash memory is 0x0400 0000 to
0x043F FFFF.

Flash memory is pre-loaded with boot code for the power-on-self test
(POST) program. For more information, refer to “Power-On-Self Test”
on page 1-21.

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 Using ADSP-21469 EZ-Board

By default, the EZ-Board boots from the 8-bit parallel flash memory. The
processor boots from flash memory if the boot mode select switch (SW4) is
set to position 2; see “Boot Mode Select Switch (SW4)” on page 2-10.
Flash memory also is preloaded with configuration flash information, such
as board revision, BOM revision, and other data.
Flash memory code can be modified. For instructions, refer to the online
Help and example program included in the EZ-Board installation
directory.
For more information about the parallel flash device, refer to the Num-
onyx Web site: http://www.numonyx.com/.

SPI Interface
The ADSP-21469 processor has two SPI ports which can be accessed via
the digital peripheral interface (DPI) pins.
The SPI flash memory, a 16 Mb ST M25P16 device, connects to the SPI
port of the processor and designates:
• DPI pin 5 (DPI_P5) as a chip select
• DPI pin 3 (DPI_P3) as the SPI clock
• DPI pin 1 (DPI_P1) as the master out slave in (MOSI) pin
• DPI pin 2 (DPI_P2) as the master in slave out (MISO) pin
The same SPI port and DPI pins connect to the serial flash memory and
audio codec via switch SW3. See “DPI [1–8] Enable Switch (SW3)” on
page 2-9. The DPI pins also are available on the expansion interface II.
By default, the EZ-Board boots from the 8-bit flash parallel memory. SPI
flash can be selected as the boot source by setting the boot mode select
switch (SW4) to position 1. See “Boot Mode Select Switch (SW4)” on
page 2-10.

ADSP-21469 EZ-Board Evaluation System Manual 1-11

Link Port Interface

The audio codec is set up to use DPI pin 4 as the SPI chip select. For more
information, refer to “Audio Interface” on page 1-14.

Link Port Interface

The ADSP-21469 processor has two dedicated link ports. Each link port
has a clock pin, an acknowledge pin, and eight data pins. The ports can
operate at up to 166 MHz and act as either a receiver or a transmitter. The
ports can be used to interface gluelessly to other ADSP-21469 processors
that also have the link port pins brought out.
The EZ-Board enables access to link ports 0 and 1 via connectors P12 and
J3, respectively. Two ADSP-21469 EZ-Boards can mate gluelessly via the
link port connectors. The processors can communicate via the link ports,
all while performing independent tasks on each of the EZ-Boards. To
loopback the link port connectors on one EZ-Board or connect three or
more EZ-Boards, obtain a standard, off the shelf connector from Samtec.
For more information, see “Link Port 0 Connector (P12)” on page 2-30.
The EZ-Board design enables a multi-processor JTAG session using con-
nectors J3 and P12. Two or more EZ-Boards can connect via the link ports
and JTAG interfaces and run in a single multi-processor debug session
using VisualDSP++. For more information, see “JTAG Interface” on
page 1-18.
By default, the EZ-Board boots from the 8-bit flash parallel memory. Link
port 0 can be selected as the boot source by setting the boot mode select
switch (SW4) to position 4. See “Boot Mode Select Switch (SW4)” on
page 2-10.

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 Using ADSP-21469 EZ-Board

Temperature Sensor Interface

Two external pins (THD_P and THD_M) of the processor are connected to an
internal thermal diode. The EZ-Board uses ON Semiconductor’s
ADM1032 digital thermometer and under/over temperature alarm to
monitor the processor’s temperature as well as the thermal diode that
exists inside the ADM1032 device. The device uses the I2C bus, DPI pins,
and flag pins to communicate to the processor. The following DPI and
flag pins are used by the processor and temperature sensing monitor.
• DPI pin 8 (DPI_P8) as the serial clock signal (SCK)
• DPI pin 7 (DPI_P7) as the serial data signal (SDA)
• Flag 3 as the IRQ (not used by default)
• Flag 0 as the thermal limit (not used by default)
The two DPI pins are required; the pins are connected to the temperature
sensing monitor via a switch (SW3) and can be shut off if the pins are used
on the expansion II interface. The thermal limit flag is connected to a
LED (LED11) for a visual alarm if the limit is exceeded. The thermal limit
flag and ADM1032 IRQ connect to the flag pins of the processor, but are
nonessential for communications. Consequently, SW13 has both flag pins
defaulted in the OFF position.
See “DPI [1–8] Enable Switch (SW3)” on page 2-9 and “Asynchronous
Control Enable Switch (SW13)” on page 2-13 for more information.
Example programs are included in the EZ-Board installation directory to
demonstrate sensor operations.

ADSP-21469 EZ-Board Evaluation System Manual 1-13

S/PDIF Interface

S/PDIF Interface
The ADSP-21469 processor has a built-in S/PDIF transmitter and
receiver for digital audio applications. The EZ-Board supports the S/PDIF
interface and brings out both the transmitter and receiver via RCA con-
nectors J4 and J5, respectively. The S/PDIF’s in and out pins are
connected by DAI pins via switches SW1 and SW7:
• DAI pin 1 (DAI_P1) as SPDIF_OUT
• DAI pin 18 (DPI_P18) as SPDIF_IN
SW1 and SW7 can be turned off to disconnect the DAI pins from the RCA
connectors if the pins are used on the expansion II interface. See “DAI [1–
8] Enable Switch (SW1)” on page 2-8 and “DAI [17–20] Enable Switch
(SW7)” on page 2-11 for more information.

Audio Interface
The AD1939 device is a high-performance, single-chip codec featuring
eight digital-to-analog converters (DACs) for audio output and four ana-
log-to-digital converters (ADCs) for audio input. This translates to four
stereo channels of audio out and two stereo channels of audio in.
The codec can input and output data at a sample rate of up to 192 kHz on
all channels.
The analog audio channels are available via single-ended RCA connectors
(J4 and J5) or differential DB25 connectors (P8 and P9). By default, the
EZ-Board is shipped with the RCA connectors used by the AD1939 codec
for audio in and out. To use the differential connectors, change DIP
switches SW15–18. A standard, off the shelf DB25 connector to XLR cables
is required to operate in this mode.

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 Using ADSP-21469 EZ-Board

For more information, see “Audio In1 Left Selection Switch (SW15)” on
page 2-14 through “Audio In2 Left Selection Switch (SW18)” on
page 2-16, and “ADSP-21469 EZ-Board Schematic” on page B-1.
The processor interfaces with the codec via the DAI and DPI pins. The
DAI pins can be configured to transfer serial data from the codec in
Time-Division Multiplexing (TDM) or Integrated Interchip Sound (I2S)
mode. See “DAI Interface” on page 2-3 for more information about the
AD1939 connection to the DAI. The DPI interface pins can be config-
ured to use the SPI interface of the processor to set up the codec’s control
registers. See “DPI Interface” on page 2-4 for more information about the
AD1939 connection to the DPI.
The master input clock (MCLK) of the codec is generated by the on-board
12.288 MHz oscillator. The internal PLL of the codec is used to generate
varying sample rates. The codec can be set up for 48 KHz, 96 KHz, or
192 KHz frequencies. The codec can run at these frequencies in both
TDM and I2S modes with all ADCs inputs and DACs outputs. To run
192 KHz with all ADCs and DACs in TDM mode, the codec must run in
dual-line TDM mode.
For information on how to configure the multi-channel codec, refer to the
product datasheet at
http://www.analog.com/en/audiovideo-prod-
ucts/audio-codecs/ad1939/products/product.html.

The EZ-Board is connected to the AD1939 codec in master mode. The

internal PLL drives the ABCLK and ALRCLK clock signals out. Both clocks
are driven back to the codec’s DBCLK and DLRCLK pins via the R257 and R258
resistors. The ABCLK and ALRCLK clocks that are driven by the codec also
connect to the processor’s serial ports via the DAI pins. Resistors R262 and
R263 are used to feed the bit clock and frame sync signals of the processor’s
serial ports. Connecting the codec in this manner enables a flexible audio
sample rate and allows the processor to run at the maximum core
frequency.

ADSP-21469 EZ-Board Evaluation System Manual 1-15

UART Interface

The audio interface also has a 3.5 mm connector (J8) for headphones. The
headphones share the output with the external DAC5 and DAC6 circuits of
the analog audio interface. Switch SW23 must be enabled for the head-
phones. A volume control potentiometer (R493) is used to increase or
decrease the headphone’s volume. For more information, see “Headphone
Enable Switch (SW23)” on page 2-19.
Example programs are included in the EZ-KIT Lite installation directory
to demonstrate how to configure and use the board’s analog audio
interface.
The DAI and DPI pins going to the AD1939 device can be disabled, then
used on the expansion II interface. Refer to “DAI Interface” on page 2-3
and “DPI Interface” on page 2-4 for more information about the DAI and
DPI switches.

UART Interface
The ADSP-21469 processor features a built-in universal asynchronous
receiver and transmitter (UART). The UART interface supports full
RS-232 functionality via the Analog Devices 3.3V ADM3202 line driver
and receiver (U42). The UART signals are available on the EZ-Board via
DIP switch SW14. The UART signals are routed through a DIP switch, can
be disconnected from the respective DPI interface, and used on the expan-
sion II interface. The following DPI pins are used for the RS-232
interface.
• DPI pin 9 (DPI_P9) as UART_TX
• DPI pin 10 (DPI_P10) as UART_RX
• DPI pin 11 (DPI_P11) as UART_RTS
• DPI pin 12 (DPI_P12) as UART_CTS

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 Using ADSP-21469 EZ-Board

Example programs are included in the EZ-Board installation directory to

demonstrate UART and RS-232 operations.
For more information about the UART interface, refer to the
ADSP-2146x SHARC Processor Hardware Reference for ADSP-21467/8/9
Processors.

LEDs and Push Buttons

The EZ-Board has eight general-purpose user LEDs connected directly to
the processor, one LED connected to the temperature sensing monitor
(ADM1032), one EZ-Board power LED, and one board reset LED. The
EZ-board also has five push buttons: four general-purpose push buttons,
connected directly to the processor, and one push button for a board reset.
Table 1-3 summarizes the LED connections to the processor. To use the
LEDs connected to the DAI or DPI interface, configure the respective reg-
isters of the processor. For more information, refer to the ADSP-2146x
SHARC Processor Hardware Reference for ADSP-21467/8/9 Processors.

Table 1-3. LED Connections

LED Reference Designator Processor Pin Connected via Switch

LED1 DPI_P6 SW3.6

LED2 DPI_P13 SW14.5

LED3 DPI_P14 SW14.6

LED4 DAI_P3 SW1.3

LED5 DAI_P4 SW1.4

LED6 DAI_P15 SW2.7

LED7 DAI_P16 SW2.8

LED8 DAI_P17 SW7.1

ADSP-21469 EZ-Board Evaluation System Manual 1-17

JTAG Interface

Two general-purpose push buttons are attached to the flag pins of the pro-
cessor, while the other two are attached to the DAI pins. All of the push
buttons and LEDs connect to the processor through DIP switches. The
DIP switches can disconnect the processor pins, which, in turn, connect
to the push buttons and LEDs. See the respective switch section in
“ADSP-21469 EZ-Board Hardware Reference” on page 2-1.
The state of the push buttons, connected to the flag pins, can be deter-
mined by reading the FLAG register. The push buttons connected to the
DAI pins must be configured as interrupts. It is necessary to set up an
interrupt routine to determine each pin’s state. Table 1-3 shows the push
button and processor connections.

Table 1-4. Push Button Connections

PB Reference Designator Processor Pin Connected via Switch

SW8 (PB1) FLAG1/IRQ1 SW13.4

SW9 (PB2) FLAG2/IRQ2/MS2 SW13.5

SW10 (PB3) DAI_P19 SW7.3

SW11 (PB4) DAI_P20 SW7.4

An example program is included in the ADSP-21469 installation directory

to demonstrate functionality of the LEDs and push buttons.

JTAG Interface
The JTAG connector (P1) allows the standalone debug agent module to
connect a VisualDSP++ debug session to the ADSP-21469 processor. The
debug agent operates only when the external 5V wall adaptor (P16) is
used.

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 Using ADSP-21469 EZ-Board

The standalone debug agent can be replaced by an external emulator, such

as the Analog Devices high-performance USB-based emulator. Be careful
not to damage the connectors when removing the debug agent. The emu-
lator connects to P1 on the back side of the board; see “EZ-Board
Installation” on page 1-5 for more information.
The ADSP-21469 EZ-Board can be set up as a single- or multi-processor
system. By default, the board is set up in single-processor mode. In sin-
gle-processor mode, create a VisualDSP++ session based on a standalone
debug agent or an external emulator. To use the EZ-Board in multi-pro-
cessor mode, install an external emulator. Only one external emulator is
required for the main EZ-Board; other EZ-Boards in the JTAG chain do
not require an emulator. In this mode, create a VisualDSP++ session based
on the number of JTAG devices that are in the JTAG chain.
For a dual ADSP-21469 EZ-Board session, connect two EZ-Boards via
connectors J3 and P12. Flip one of the two EZ-Boards by 180 degrees to
allow the boards to mate. To switch between single- and multi-processor
modes, use DIP switches SW19–22. For more information, see “JTAG
Switches (SW19–22)” on page 2-17.
For three or more ADSP-21469 EZ-Board sessions, connect each of the
EZ-Board with the link port cables. The cables connect the link ports and
JTAG pins of each EZ-Board. By using the link port cables, you put the
EZ-Board in a JTAG serial chain and the ADSP-21469 processors’ link
ports in a ring. For three EZ-Boards, three link port cables are required.
Similarly, for four EZ-Boards, four link port cables are required. Note
that each respective EZ-board also requires its own power supply.
Part numbers for Samtec standard, off the shelf link port cables can be
found in “Link Port 0 Connector (P12)” on page 2-30.
For more information about emulators, contact Analog Devices or go to:
http://www.analog.com/en/embedded-processing-dsp/sharc/con-
tent/sharc_development_tools/fca.html.

ADSP-21469 EZ-Board Evaluation System Manual 1-19

Land Grid Array

Land Grid Array

The ADSP-21469 EZ-Board has provisions for probing every DAI pin,
DPI pin, and the asynchronous memory interface pins of the processor on
connectors P5–7. The connector locations are designed to be used in con-
junction with a Tektronix DMAX logic analyzer connector, but can be
probed with any oscilloscope or logic analyzer. For pinout information,
refer to “ADSP-21469 EZ-Board Schematic” on page B-1.
For more information on the Tektronix DMAX logic analyzer interface,
go to the Tektronix Web site.

Expansion Interface II
The expansion interface II allows an Analog Devices EZ-Extender or a
custom-design daughter board to be tested across various hardware plat-
forms with identical expansion interfaces.
The expansion interface II implemented on the ADSP-21469 EZ-Board
consists of two connectors: a 0.1 in. shrouded header (P2) and a Samtec
QMS series header (J1). The connectors contain a majority of the
ADSP-21469 processor’s signals.

L DDR2 interface is not brought out to the expansion interface

because the interface layout and net length is critical.
For pinout information, go to “ADSP-21469 EZ-Board Schematic” on
page B-1. The mechanical dimensions of the expansion connectors can be
obtained by contacting Technical or Customer Support.
For more information about daughter boards, visit the Analog Devices
Web site at:
http://www.analog.com/en/embedded-processing-dsp/sharc/con-
tent/sharc_development_tools/fca.html.

1-20 ADSP-21469 EZ-Board Evaluation System Manual

 Using ADSP-21469 EZ-Board

Limits to current and interface speed must be taken into consideration

when using the expansion interface II. Current for the expansion
interface II is sourced from the EZ-Board; therefore, the current should be
limited to 1A for 5V and 500 mA for the 3.3V planes. If more current is
required, then a separate power connector and a regulator must be
designed on a daughter card. Additional circuitry can add extra loading to
signals, decreasing their maximum effective speed.

L Analog Devices does not support and is not responsible for the
effects of additional circuitry.

Power Measurements
Several locations are provided for measuring the current draw from vari-
ous power planes. Precision 0.05 ohm shunt resistors are available on the
VDDINT, VDDEXT, and VDD_DDR2 voltage domains. For current
draw measuments, the associated jumper on connector P13—15 must be
removed. Once the jumper is removed, voltage across the resistor can be
measured using an oscilloscope. Once voltage is measured, current can be
calculated by dividing the voltage by 0.05. For the highest accuracy, a dif-
ferential probe should be used for measuring voltage across the resistor.
For more information, see “VDD_DDR2 Power Connector (P13)” on
page 2-30, “VDDINT Power Connector (P14)” on page 2-30, and
“VDDEXT Power Connector (P15)” on page 2-30.

Power-On-Self Test
The power-on-self-test program (POST) tests all EZ-Board peripherals
and validates functionality as well as connectivity to the processor. Once
assembled, each EZ-Board is fully tested for an extended period of time
with a POST. All EZ-Boards are shipped with the POST preloaded into
one of its on-board flash memories. The POST is executed by resetting the

ADSP-21469 EZ-Board Evaluation System Manual 1-21

Example Programs

board and pressing the proper push button(s). The POST also can be used
as a reference in custom software designs or hardware troubleshooting.
Note that the source code for the POST program is included in the Visu-
alDSP++ installation directory along with the readme text file, which
describes how the EZ-Board is configured to run a POST.

Example Programs
Example programs are provided with the ADSP-21469 EZ-Board to dem-
onstrate various capabilities of the product. The programs are installed
with the VisualDSP++ software and can be found in the
<install_path>\214xx\Examples\ADSP-21469 EZ-Board directory. Refer
to the readme file provided with each example for more information.

Background Telemetry Channel

The USB debug agent supports the background telemetry channel (BTC),
which facilitates data exchange between VisualDSP++ and the processor
without interrupting processor execution.
The BTC allows you to read and write data in real time while the proces-
sor continues to execute. For increased performance of the BTC,
including faster reading and writing, please check our latest line of proces-
sor emulators at:
http://www.analog.com/en/embedded-processing-dsp/sharc/USB-EMU-
LATOR/products/product.html. For more information about BTC, see the
online help.

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 Using ADSP-21469 EZ-Board

Reference Design Information

A reference design info package is available for download on the Analog
Devices Web site. The package provides information on the design, lay-
out, fabrication, and assembly of the EZ-KIT Lite and EZ-Board
products.
The information can be found at:
http://www.analog.com/en/embedded-processing-dsp/sharc/pro-
cessors/ez-kit-lite-design-database/recourses/index.html.

ADSP-21469 EZ-Board Evaluation System Manual 1-23

Reference Design Information

1-24 ADSP-21469 EZ-Board Evaluation System Manual

2 ADSP-21469 EZ-BOARD
HARDWARE REFERENCE

This chapter describes the hardware design of the ADSP-21469 EZ-Board

board.
The following topics are covered.
• “System Architecture” on page 2-2
Describes the ADSP-21469 EZ-Board configuration and explains
how the board components interface with the processor.
• “Flags and Memory Selects” on page 2-6
Shows the locations and describes the DAI pins, DPI pins, general
purpose flags, and asynchronous memory select lines.
• “Push Button and Switch Settings” on page 2-7
Shows the locations and describes the push buttons and switches.
• “Jumpers” on page 2-20
Shows the locations and describes the configuration jumpers.
• “LEDs” on page 2-22
Shows the locations and describes the LEDs.
• “Connectors” on page 2-25
Shows the locations and provides part numbers for the on-board
connectors. In addition, the manufacturer and part number infor-
mation is provided for the mating parts.

ADSP-21469 EZ-Board Evaluation System Manual 2-1

System Architecture

System Architecture
This section describes the processor’s configuration on the EZ-Board
(Figure 2-1).

4 MB
Flash 25 MHz
(4M x 8 ) Oscillator

LINK
AMI CLK PORT

Port 1
CONN

Link
128 MB
DDR2

DDR2 LINK
(64M x 16) PORT

Port 0
Link
CONN
ADSP-21469
ADM1032
Sensor
TEMP

DSP
450 MHz
324-lead PBGA

SPDIF I2C
IN
JTAG
Port

SPDIF DAI DPI

CIRC
SPDIF
OUT
Stand
PBs/ Alone
AD1939 SPI ADM3202
LEDs Debug
CODEC Flash
16Mb Agent

Aud Aud
HP Head RS232 JTAG
In Out
Out Out CONN CONN
(4) (8)

DAI
Sharc Expansion
Interface II. 5V 3.3V
Power
DPI DAI = 0.1" Header PWR
Regulation
1.8V
IN
DPI = 0.1" Header 1.1V
AMI = High Speed Conn.
AMI

Figure 2-1. System Architecture

2-2 ADSP-21469 EZ-Board Evaluation System Manual

 ADSP-21469 EZ-Board Hardware Reference

The EZ-Board is designed to demonstrate the ADSP-21469 SHARC pro-

cessor capabilities. The processor has an I/O voltage of 3.3V. The core
voltage of the processor is 1.1V, and the double data rate (DDR2) voltage
is 1.8V.
The input clock is 25 MHz. The default boot mode of the processor is
external parallel flash boot. See “Boot Mode Select Switch (SW4)” on
page 2-10 for information on how to change the default boot mode.

DAI Interface
The digital application interface (DAI) pins are connected to the signal
routing unit (SRU) of the processor. The SRU is a flexible routing system
providing a large system of signal flows within the processor. The SRU
allows you to route the DAI pins to different internal peripherals in vari-
ous combinations.
The DAI connects various peripherals on the EZ-Board. Table 2-1 shows
the DAI pin names, associated peripheral and net names, switch designa-
tors through which the pins connect to the peripherals, and default switch
settings.

Table 2-1. DAI Connections

DAI Pin Peripheral Peripheral Net Connected via Switch Setting
Switch (Default)

DAI_P1 S/PDIF SPDIF_OUT SW1.1 ON

DAI_P2 AD1939 SOFT_RESET SW1.2 ON

DAI_P3 LEDs LED4 SW1.3 ON

DAI_P4 LEDs LED5 SW1.4 ON

DAI_P5 AD1939 ASDATA1 SW1.5 ON

DAI_P6 AD1939 ASDATA2 SW1.6 ON

DAI_P7 AD1939 ABCLK SW1.7 ON

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System Architecture

Table 2-1. DAI Connections (Cont’d)

DAI Pin Peripheral Peripheral Net Connected via Switch Setting
Switch (Default)

DAI_P8 AD1939 ALRCLK SW1.8 ON

DAI_P9 AD1939 DSDATA4 SW2.1 ON

DAI_P10 AD1939 DSDATA3 SW2.2 ON

DAI_P11 AD1939 DSDATA2 SW2.3 ON

DAI_P12 AD1939 DSDATA1 SW2.4 ON

DAI_P13 AD1939 DBCLK SW2.5 ON

DAI_P14 AD1939 DLRCLK SW2.6 ON

DAI_P15 LEDs LED6 SW2.7 ON

DAI_P16 LEDs LED7 SW2.8 ON

DAI_P17 LEDs LED8 SW7.1 ON

DAI_P18 S/PDIF SPDIF_IN SW7.2 ON

DAI_P19 Push buttons PB3 SW7.3 ON

DAI_P20 Push buttons PB4 SW7.4 ON

To use the DAI on the expansion II interface, disable any signal driving a
DAI pin with the associated switch. The pinout of the expansion connec-
tors can be found in “ADSP-21469 EZ-Board Schematic” on page B-1.

DPI Interface
The digital peripheral interface (DPI) pins are connected to a second sig-
nal routing unit of the processor (SRU2). The SRU2 unit, similar to the
SRU, is a flexible routing system providing a large system of signal flows
within the processor. The SRU2 allows you to route the DPI pins to dif-
ferent internal peripherals in various combinations.

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 ADSP-21469 EZ-Board Hardware Reference

The DPI connects various peripherals on the EZ-Board. Table 2-2 shows
the DPI pin names, associated peripheral and net names, switch designa-
tors through which the pins connect to the peripherals, and default switch
settings.

Table 2-2. DPI Connections

DPI Pin Peripheral Peripheral Net Connected via Switch Setting
Switch (Default)

DPI_P1 SPI memory SPI_MOSI SW3.1 ON

AD1939

DPI_P2 SPI memory SPI_MISO SW3.2 ON

AD1939
DPI_P3 SPI memory SPI_CLK SW3.3 ON
AD1939

DPI_P4 AD1939 AD1939_CS SW3.4 ON

DPI_P5 SPI memory SPI_CS SW3.5 ON

DPI_P6 LEDs LED1 SW3.6 ON

DPI_P7 Temp sensor TEMP_SDA SW3.7 ON

DPI_P8 Temp sensor TEMP_SCK SW3.8 ON

DPI_P9 UART UART_TX SW14.1 ON

DPI_P10 UART UART_RX SW14.2 ON

DPI_P11 UART UART_RTS SW14.3 OFF

DPI_P12 UART UART_CTS SW14.4 OFF

DPI_P13 LEDs LED2 SW14.5 ON

DPI_P14 LEDs LED3 SW14.6 ON

To use the DPI on the expansion II interface, disable any signal driving a
DPI pin with the associated switch. The pinout of the expansion connec-
tors can be found in “ADSP-21469 EZ-Board Schematic” on page B-1.

ADSP-21469 EZ-Board Evaluation System Manual 2-5

Flags and Memory Selects

Flags and Memory Selects

The processor has four asynchronous memory selects, four flag pins, three
interrupt request pins, and one timer expired pin. All flag/memory pins
are multi-functional and depend on the ADSP-21469 processor setup.
Table 2-3 shows the pin names, corresponding peripheral and net names,
switch designators through which the pins connect to the peripherals, and
default switch settings.
To use the flags or memory selects on the expansion II interface, disable
any signal driving a flag or memory pin with the associated switch. The
pinout of the expansion connectors can be found in “ADSP-21469
EZ-Board Schematic” on page B-1.

Table 2-3. Flags and Memory Select Connections

Flag/Memory Pin Peripheral Peripheral Net Connected via Switch
Switch Setting
(Default)
MS0 Parallel flash memory FLASH_CS SW13.1 OFF

MS1 Parallel flash memory FLASH_CS SW13.2 ON

FLAG0/IRQ0 Temp sensor THERMAL_LIMIT SW13.3 OFF

FLAG1/IRQ1 Push buttons PB1 SW13.4 ON

FLAG2/IRQ2/MS2 Push buttons PB2 SW13.5 ON

FLAG3/TIMEXP/MS Temp sensor TEMP_IRQ SW13.6 OFF

3

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 ADSP-21469 EZ-Board Hardware Reference

Push Button and Switch Settings

This section describes operation of the push buttons and switches. The
push button and switch locations are shown in Figure 2-2.

Figure 2-2. Push Button and Switch Locations

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Push Button and Switch Settings

DAI [1–8] Enable Switch (SW1)

The DAI [1–8] enable switch (SW1) disconnects the DAI pins one through
eight on the processor from the associated peripherals on the EZ-Board
and allows the DAI signals to be used on the expansion II interface; see
Table 2-4.

Table 2-4. DAI [1–8] Enable Switch (SW1)

SW1 Position DAI Pin Peripheral Peripheral Net Switch Setting
(Default)
SW1.1 DAI_P1 S/PDIF SPDIF_OUT ON

SW1.2 DAI_P2 AD1939 SOFT_RESET ON

SW1.3 DAI_P3 LEDs LED4 ON

SW1.4 DAI_P4 LEDs LED5 ON

SW1.5 DAI_P5 AD1939 ASDATA1 ON

SW1.6 DAI_P6 AD1939 ASDATA2 ON

SW1.7 DAI_P7 AD1939 ABCLK ON

SW1.8 DAI_P8 AD1939 ALRCLK ON

DAI [9–16] Enable Switch (SW2)

The DAI [9–16] enable switch (SW2) disconnects the DAI pins nine
through 16 on the processor from the associated peripherals on the
EZ-Board and allows the DAI signals to be used on the expansion II inter-
face; see Table 2-5.

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Table 2-5. DAI [9–16] Enable Switch (SW2)

SW2 Position DAI Pin Peripheral Peripheral Net Switch Setting
(Default)

SW2.1 DAI_P9 AD1939 DSDATA4 ON

SW2.2 DAI_P10 AD1939 DSDATA3 ON

SW2.3 DAI_P11 AD1939 DSDATA2 ON

SW2.4 DAI_P12 AD1939 DSDATA1 ON

SW2.5 DAI_P13 AD1939 DBCLK OFF

SW2.6 DAI_P14 AD1939 DLRCLK OFF

SW2.7 DAI_P15 LEDs LED6 ON

SW2.8 DAI_P16 LEDs LED7 ON

DPI [1–8] Enable Switch (SW3)

The DPI [1–8] enable switch (SW3) disconnects the DPI pins one through
eight on the processor from the associated peripherals on the EZ-Board
and allows the DPI signals to be used on the expansion II interface; see
Table 2-6.

Table 2-6. DPI [1–8] Enable Switch (SW3)

SW3 Position DPI Pin Peripheral Peripheral Net Switch Setting
(Default)
SW3.1 DPI_P1 SPI memory SPI_MOSI ON
AD1939

SW3.2 DPI_P2 SPI memory SPI_MISO ON

AD1939

SW3.3 DPI_P3 SPI memory SPI_CLK ON

AD1939
SW3.4 DPI_P4 AD1939 AD1939_CS ON

SW3.5 DPI_P5 SPI memory SPI_CS ON

ADSP-21469 EZ-Board Evaluation System Manual 2-9

Push Button and Switch Settings

Table 2-6. DPI [1–8] Enable Switch (SW3) (Cont’d)

SW3 Position DPI Pin Peripheral Peripheral Net Switch Setting
(Default)

SW3.6 DPI_P6 LEDs LED1 ON

SW3.7 DPI_P7 Temp sensor TEMP_SDA ON

SW3.8 DPI_P8 Temp sensor TEMP_SCK ON

Boot Mode Select Switch (SW4)

The boot mode select switch (SW4) determines the boot mode of the pro-
cessor. Table 2-7 shows the available boot mode settings. By default, the
processor boots from the on-board parallel flash memory.
The selected position of SW4 is marked by the notch down the entire rotat-
ing portion of the switch, not the small arrow.

Table 2-7. Boot Mode Select Switch (SW4)

SW4 Position Processor Boot Mode

0 SPI slave boot

1 Boot from SPI flash memory (SPI master boot)

2 Boot from 8 external parallel flash memory (default)

3 Reserved
4 Link port 0 boot

5 Reserved

6 Reserved

7 Reserved

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DSP Clock Configuration Switch (SW5)

The clock configuration switch (SW5) controls the core frequency of the
processor at power up. The core to clock-in ratio is multiplied by the
25 MHz oscillator (U41) to produce the power up core frequency.
Table 2-8 shows the switch settings.
The core clock frequency can be increased or decreased via software by
writing to the PMCTL register. For more information on changing the core
clock frequency and other settings, refer to the ADSP-2146x SHARC Pro-
cessor Hardware Reference for ADSP-21467/8/9 Processors.

Table 2-8. Processor Clock Configuration Switch (SW5)

Position 1 Position 2 Clock Ratio
CLKCFG0 CLKCFG0 Core: Clock

ON ON Reserved

ON OFF 32:1

OFF ON 16:1 (Default)

OFF OFF 6:1

DAI [17–20] Enable Switch (SW7)

The DAI [17–20] enable switch (SW7) disconnects the DAI pins 17
through 20 on the processor from the associated peripherals on the
EZ-Board and allows the DAI signals to be used on the expansion II inter-
face; see Table 2-9.

Table 2-9. DAI [17–20] Enable Switch (SW7)

SW7 Position DAI Pin Peripheral Peripheral Net Switch Setting
(Default)
SW7.1 DAI_P17 LEDs LED8 ON

SW7.2 DAI_P18 S/PDIF SPDIF_IN ON

ADSP-21469 EZ-Board Evaluation System Manual 2-11

Push Button and Switch Settings

Table 2-9. DAI [17–20] Enable Switch (SW7) (Cont’d)

SW7 Position DAI Pin Peripheral Peripheral Net Switch Setting
(Default)

SW7.3 DAI_P19 Push buttons PB3 ON

SW7.4 DAI_P20 Push buttons PB4 ON

Programmable Flag Push Buttons (SW8–11)

Four momentary push buttons (SW8–11) are provided for general-purpose
user input. The buttons are connected to the GPIO pins of the processor.
The push buttons are active high and, when pressed, send a high (1) to the
processor. Switches SW7 and SW13 disconnect the push buttons from the
responding signals. Refer to “DAI [17–20] Enable Switch (SW7)” on
page 2-11 and “Asynchronous Control Enable Switch (SW13)” on
page 2-13 for more information.

Reset Push Button (SW12)

The reset push button (SW12) resets the following ICs:
• ADSP-21469 processor (U1)
• AD1939 audio codec (U45)
• Parallel flash memory (U18)
The reset also is linked to the expansion II interface; any daughter card
connected to the expansion interface that requires a reset can use SW12.
The reset push button does not reset the standalone debug agent once the
debug agent is connected to a personal computer (PC). After communica-
tion between the debug agent and PC is initialized, pushing a reset button
does not reset the USB chip on the debug agent. The only way to reset the
USB chip on the debug agent is to power down the EZ-Board.

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Asynchronous Control Enable Switch (SW13)

The asynchronous control enable switch (SW13) disconnects the control
pins of the processor from the associated peripherals on the EZ-Board
and allows the respective control signals to be used on the expansion II
interface; see Table 2-10.

Table 2-10. Asynchronous Control Enable Switch (SW13)

SW13 Processor Pin Peripheral Peripheral Net Switch Setting
Position (Default)
SW13.1 MS0 Parallel flash FLASH_CS OFF
memory

SW13.2 MS1 Parallel flash FLASH_CS ON

memory
SW13.3 FLAG0/IRQ0 Temp sensor THERMAL OFF
LIMIT

SW13.4 FLAG1/IRQ1 Push buttons PB1 ON

SW13.5 FLAG2/IRQ2/MS2 Push buttons PB2 ON

SW13.6 FLAG3/TIMEXP/MS3 Temp sensor TEMP_IRQ OFF

DPI [9–14] Enable Switch (SW14)

The DPI [9–14] enable switch (SW14) disconnects the DPI pins nine
through 14 on the processors from the associated peripherals on the
EZ-Board and allows the DPI signals to be used on the expansion II inter-
face; see Table 2-11.

Table 2-11. DPI [9–14] Enable Switch (SW14)

SW14 DPI Pin Peripheral Peripheral Net Switch Setting
Position (Default)

SW14.1 DPI_P9 UART UART_TX ON

SW14.2 DPI_P10 UART UART_RX ON

ADSP-21469 EZ-Board Evaluation System Manual 2-13

Push Button and Switch Settings

Table 2-11. DPI [9–14] Enable Switch (SW14) (Cont’d)

SW14 DPI Pin Peripheral Peripheral Net Switch Setting
Position (Default)

SW14.3 DPI_P11 UART UART_RTS OFF

SW14.4 DPI_P12 UART UART_CTS OFF

SW14.5 DPI_P13 LEDs LED2 ON

SW14.6 DPI_P14 LEDs LED3 ON

Audio In1 Left Selection Switch (SW15)

The audio selection switch (SW15) connects the left channel of the In1 line,
connected to the AD1939’s ADC1 circuit, to either the single-ended RCA
connectors or the differential DB25 connector. By default, SW15 is set up
to use the RCA connectors. To use the standard, off the shelf DB25 con-
nector to XLR cables, change the switch to the differential setting; see
Table 2-12. For more information, see “Differential In/Out Connectors
(P8–9)” on page 2-29.

Table 2-12. Audio In1 Left Selection Switch (SW15)

SW15 Position Single-Ended RCA IN (Default) Differential DB25 IN (P8)

SW15.1 ON OFF

SW15.2 OFF ON

SW15.3 ON OFF

SW15.4 OFF ON

SW15.5 ON OFF

SW15.6 OFF ON

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Audio In1 Right Selection Switch (SW16)

The audio selection switch (SW16) connects the right channel of the In1
line, connected to the AD1939’s ADC2 circuit, to either the single-ended
RCA connectors or the differential DB25 connector. By default, the
switch is set up to use the RCA connectors for audio in. To use the stan-
dard, off the shelf DB25 connector to XLR cables, change the switch to
the differential setting; see Table 2-13. For more information, see “Differ-
ential In/Out Connectors (P8–9)” on page 2-29.

Table 2-13. Audio In1 Right Selection Switch (SW16)

SW16 Position Single-Ended RCA IN (Default) Differential DB25 IN (P8)

SW16.1 ON OFF

SW16.2 OFF ON

SW16.3 ON OFF

SW16.4 OFF ON

SW16.5 ON OFF

SW16.6 OFF ON

Audio In2 Right Selection Switch (SW17)

The audio selection switch (SW17) connects the right channel of the In2
line, connected to the AD1939’s ADC4 circuit, to either the single-ended
RCA connectors or the differential DB25 connector. By default, the
switch is set up to use the RCA connectors for audio in. To use the stan-
dard, off the shelf DB25 connector to XLR cables, change the switch to
the differential setting; see Table 2-14. For more information, see “Differ-
ential In/Out Connectors (P8–9)” on page 2-29.

ADSP-21469 EZ-Board Evaluation System Manual 2-15

Push Button and Switch Settings

Table 2-14. Audio In2 Right Selection Switch (SW17)

SW17 Position Single Ended Use RCA IN (Default) Differential DB25 IN (P8)

SW17.1 ON OFF

SW17.2 OFF ON

SW17.3 ON OFF

SW17.4 OFF ON

SW17.5 ON OFF

SW17.6 OFF ON

Audio In2 Left Selection Switch (SW18)

The audio selection switch (SW18) connects the left channel of the In2 line,
connected to the AD1939’s ADC3 circuit, to either the single-ended RCA
connectors or the differential DB25 connector. By default, the switch is
set up to use the RCA connectors for audio in. To use the standard, off
the shelf DB25 connector to XLR cables, change the switch to the differ-
ential setting; see Table 2-15. For more information, see “Differential
In/Out Connectors (P8–9)” on page 2-29.

Table 2-15. Audio In2 Left Selection Switch (SW18)

SW18 Position Single Ended RCA IN (Default) Differential DB25 IN (P8)

SW18.1 ON OFF

SW18.2 OFF ON

SW18.3 ON OFF

SW18.4 OFF ON

SW18.5 ON OFF

SW18.6 OFF ON

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JTAG Switches (SW19–22)

The JTAG switches (SW19–22) select between a single-processor (one
EZ-Board) and multi-processor (more than one EZ-Board) configura-
tions. By default, the four DIP switches are set up for a single EZ-Board
configuration; see Table 2-16.
The default configuration applies to either a debug agent or an external
emulator, such as the Analog Devices high-performance USB-based emu-
lator (HP-USB ICE for short). To use an external emulator and multiple
EZ-Boards simultaneously in one VisualDSP++ multi-processor session,
set up the boards as shown in Table 2-17. Attach the boards to each other
via connectors J3 and P12. For two EZ-Boards, no external cables are
required. For three or more EZ-Boards, obtain Samtec link port cables
described in “Link Port 1 Connector (J3)” on page 2-26 and “Link Port 0
Connector (P12)” on page 2-30.

Table 2-16. Single-Processor Configuration

Switch Position Single EZ-Board Use (Default)

SW19.1 ON

SW19.2 OFF

SW19.3 ON

SW19.4 OFF

SW19.5 ON

SW19.6 OFF

SW19.7 ON

SW19.8 OFF

SW20.1 ON

SW20.2 OFF

SW21.1 ON

SW21.2 OFF

ADSP-21469 EZ-Board Evaluation System Manual 2-17

Push Button and Switch Settings

Table 2-16. Single-Processor Configuration (Cont’d)

Switch Position Single EZ-Board Use (Default)

SW22.1 OFF

SW22.2 OFF

Table 2-17. Multiple-Processor Configuration

Switch Position Main EZ-Board EZ-Board(s)
Attached to Emulator Not Attached to Emulator

SW19.1 ON OFF

SW19.2 ON ON

SW19.3 ON OFF

SW19.4 ON ON

SW19.5 ON OFF

SW19.6 ON ON

SW19.7 ON OFF

SW19.8 ON ON

SW20.1 ON OFF

SW20.2 OFF OFF

SW21.1 OFF OFF

SW21.2 ON ON

SW22.1 OFF ON

SW22.2 ON OFF

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Headphone Enable Switch (SW23)

The headphone enable switch (SW23) connects the AD1939’s OUT3 circuit
to the 3.5 mm headphone connector (J8). By default, the headphone
enable switch is disabled. To use the headphones, set SW23 to all ON. For
more information, see “Headphone Out Connector (J8)” on page 2-28.

Audio Loopback Switches (SW24–25)

The audio loopback switches (SW24 and SW25) are used for testing only.
The switches loop back any analog signal generated from the AD1939’s
digital-to-analog converter (DAC) circuit to analog-to-digital converter
(ADC) circuit.

ADSP-21469 EZ-Board Evaluation System Manual 2-19

Jumpers

Jumpers
This section describes functionality of the configuration jumpers.
Figure 2-2 shows the jumper locations.

Figure 2-3. Configuration Jumper Locations

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 ADSP-21469 EZ-Board Hardware Reference

Flash WP Jumper (JP1)

The flash WP jumper (JP1) write-protects block 0 of the parallel flash
chip. Block 0 is located at address range 0x0400 0000–0x0400 1FFF. The
POST begins at block 0 and continues on to other blocks in flash mem-
ory. When the jumper is installed on JP1, and the parallel flash driver
from Analog Devices is used, block 0 is read-only. By default, JP1 is not
installed.

S/PDIF Loopback Jumper (JP2)

The S/PDIF loop back jumper ( JP2) is used for internal testing only. The
jumper loops back any digital audio signal from the S/PDIF’s Data Out
pin to the S/PDIF’s Data In pin. By default, JP2 is not installed.

UART RTS/CTS Jumper (JP3)

The UART RTS/CTS jumper (JP3) connects the RTS and CTS pins of the
RS-232 interface. By default, JP3 is installed.

UART Loopback Jumper (JP4)

The UART loop back jumper (JP4) is used for internal testing only. The
jumper loops back the UART receive data from the UART transmit data.
By default, JP4 is not installed.

ADSP-21469 EZ-Board Evaluation System Manual 2-21

LEDs

LEDs
This section describes the on-board LEDs. Figure 2-4 shows the LED
locations.

Figure 2-4. LED Locations

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GPIO LEDs (LED1–8)

Eight LEDs connect to the DAI and DPI pins of the processor; see
Table 2-18. The LEDs are active high and lit by writing a ‘1’ to the correct
DAI or DPI pin.

Table 2-18. GPIO LEDs

LED Reference Designator Processor Pin

LED1 DPI_P6

LED2 DPI_P13

LED3 DPI_14

LED4 DAI_P3

LED5 DAI_P4

LED6 DAI_P15

LED7 DAI_P16

LED8 DAI_P17

Power LED (LED9)

When LED9 is lit solid, it indicates that the board is powered.

Reset LED (LED10)

When LED10 is lit, it indicates that a master reset of all major ICs is active.
The reset LED is controlled by the Analog Devices ADM708 supervisory
reset circuit. You can assert the reset push button (SW12) to assert a master
reset and activate LED10. For more information, see “Reset Push Button
(SW12)” on page 2-12.

ADSP-21469 EZ-Board Evaluation System Manual 2-23

LEDs

Thermal Limit LED (LED11)

The thermal limit LED (LED11) reports a status of the thermal sensor,
ADM1032 (U43). The thermal sensor monitors the processor’s tempera-
ture. When the high temperature limit set by the IC is violated, LED11 is
turned on as a visual indicator. The ADM1032 has built-in hysteresis,
which causes the LED to de-activate only when the temperature is signifi-
cantly within the limit. For more information, see “Temperature Sensor
Interface” on page 1-13.

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Connectors
This section describes connector functionality and provides information
about mating connectors. The connector locations are shown in Figure 2-5.

Figure 2-5. Connector Locations

ADSP-21469 EZ-Board Evaluation System Manual 2-25

Connectors

Expansion Interface II Connector (J1)

J1 is a board-to-board connector providing signals from the asynchronous
memory interface (AMI) of the processor. The connector is located on the
right edge of the board. For more information, see “Expansion Interface
II” on page 1-20. For availability and pricing of the connector, contact
Samtec.

Part Description Manufacturer Part Number

104-position 0.025”, SMT header SAMTEC QMS-052-06.75-L-D-A

Mating Connector

104-position 0.025”, SMT socket SAMTEC QFS-052-04.25-L-D-A

RS-232 Connector (J2)

Part Description Manufacturer Part Number

DB9, female, vertical mount NORCOMP 191-009-213-L-571

Mating Cable

2m female-to-female cable DIGI-KEY AE1020-ND

Link Port 1 Connector (J3)

Part Description Manufacturer Part Number

ERF8 10X2, RA female SAMTEC ERF8-010-01-S-D-RA-L

Mating Cable

6” cable ERF8 to ERM8 10X2 SAMTEC ERCD-010-06.00-TBL-SBR-1

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RCA Audio Connector (J4)

Part Description Manufacturer Part Number

RCA 2x3 KYOYAKU ENT WSP-256V1-09

Mating Cable (shipped with the EZ-KIT)

6' RCA audio cable CABLESTOGO 03171

RCA Audio Connector (J5)

Part Description Manufacturer Part Number

RCA 2x3 KYOYAKU ENT WSP-256V1-09

Mating Cable (shipped with the EZ-KIT)

6' RCA audio cable CABLESTOGO 03171

S/PDIF IN Connector (J6)

Part Description Manufacturer Part Number

RCA 1X1 SWITCHCRAFT PJRAN1X1U01X

Mating Cable (shipped with the EZ-KIT)

6' RCA audio cable CABLESTOGO 03171

S/PDIF OUT Connector (J7)

Part Description Manufacturer Part Number

RCA 1X1 SWITCHCRAFT PJRAN1X1U01X

Mating Cable (shipped with the EZ-KIT)

6' RCA audio cable CABLESTOGO 03171

ADSP-21469 EZ-Board Evaluation System Manual 2-27

Connectors

Headphone Out Connector (J8)

Part Description Manufacturer Part Number

3.5mm stereo_jack CUI SJ1-3525NG

Mating Headphones (shipped with the EZ-KIT)

Stereo headphones KOSS 151225 UR5

JTAG Connector (P1)

The P1 connector provides access to the JTAG signals of the ADSP-21469
processor. The standalone debug agent requires two connectors, P1 and
ZP1. Pin 3 is missing to provide keying. Pin 3 in the mating connector
must have a plug. For more information, see “JTAG Interface” on
page 1-18.
Remove the standalone debug agent when an emulator is used with the
EZ-Board. Follow the installation instructions provided in “EZ-Board
Installation” on page 1-5, using P1 as the JTAG connection point.

Expansion Interface II Connector (P2)

P2 is a board-to-board connector providing signals for the DAI and DPI
interfaces and GPIO signals of the processor. The connector is located on
the right edge of the board. For more information, see “Expansion Inter-
face II” on page 1-20. For availability and pricing of the connectors,
contact Samtec.

Part Description Manufacturer Part Number

60-position 0.1”, SMT header SAMTEC TSSH-130-01-L-DV-A

Mating Connector

60-position 0.1”, SMT socket SAMTEC SSW-130-22-F-D-VS

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DMAX Land Grid Array Connectors (P5–7)

The land grid array areas (P5–7) are intended for probing of the processor
signals. The pads are exposed and designed to attach a Tektronix logic
analyzer to the connectors listed in the following table. For more informa-
tion about the land grid array, consult the Tektronix Web site.

Part Description Manufacturer Part Number

Primary retention TEKTRONIX 020290800

Alternate retention TEKTRONIX 020291000

Differential In/Out Connectors (P8–9)

The differential in and out connectors (P8–9) are intended for an evalua-
tion of the AD1939 codec via XLR connectors. A standard, off the shelf
DB25 connector to XLR cables is required; the cable details can be found
in the following table.

Part Description Manufacturer Part Number

25-position DB25 socket TYCO 1734350-2

Mating cables

Snake (8)XLRF-25P 9.9’ HOSA DTF-803

Snake (8)XLRM-25P 9.9’ HOSA DTM-803

MLB Connector (P10)

The media local bus (MLB) connector (P10) is intended for an evaluation
of the ADSP-21462 processor’s MLB interface. P10 is not available on the
ADSP-21469 EZ-Board because the ADSP-21469 processor does not sup-
port MLB.

ADSP-21469 EZ-Board Evaluation System Manual 2-29

Connectors

Link Port 0 Connector (P12)

Part Description Manufacturer Part Number

ERM8 10X2, RA Male SAMTEC ERM8-010-01-S-D-RA

Mating Cable

6” cable ERF8 to ERM8 10X2 SAMTEC ERCD-010-06.00-TBL-SBR-1

VDD_DDR2 Power Connector (P13)

The VDD_DDR2 power connector (P13) is used to measure voltage and cur-
rent supplied to the DDR2 memory interface of the processor. By default,
P13 is ON, and the power flows through the two-pin IDC header. To mea-
sure power, remove the jumper on P13 and measure voltage across the
0.1 ohm resistor. Once voltage is measured, power can be calculated. For
more information, refer to “Power Measurements” on page 1-21.

VDDINT Power Connector (P14)

The VDDINT power connector (P14) is used to measure voltage and current
supplied to the processor core. By default, P14 is ON, and the power flows
through the two-pin IDC header. To measure power, remove the jumper
on P14 and measure voltage across the 0.1 ohm resistor. Once voltage is
measured, power can be calculated. For more information, refer to “Power
Measurements” on page 1-21.

VDDEXT Power Connector (P15)

The VDDEXT power connector (P15) is used to measure the processor’s I/O
voltage and current. By default, P15 is ON, and the power flows through the
two-pin IDC header. To measure power, remove the jumper on P15 and
measure voltage across the 0.1 ohm resistor. Once voltage is measured,
power can be calculated. For more information, refer to “Power Measure-
ments” on page 1-21.

2-30 ADSP-21469 EZ-Board Evaluation System Manual

 ADSP-21469 EZ-Board Hardware Reference

Power Connector (P16)

The power connector (P16) provides all of the power necessary to operate
the EZ-Board.

Part Description Manufacturer Part Number

0.65 mm power jack CUI 045-0883R

Mating Power Supply (shipped with the EZ-Board and EZ-KIT)

5.0VDC@3.6A power supply GLOBTEK GS-1750(R)

Standalone Debug Agent Connector (ZP1)

ZP1 connects the standalone debug agent to the EZ-Board. The standalone
debug agent requires two connectors, ZP1 and P1. For more information,
see “JTAG Connector (P1)” on page 2-28.

ADSP-21469 EZ-Board Evaluation System Manual 2-31

Connectors

2-32 ADSP-21469 EZ-Board Evaluation System Manual

A ADSP-21469 EZ-BOARD BILL
OF MATERIALS

The bill of materials corresponds to “ADSP-21469 EZ-Board Schematic” on

page B-1.

Ref. Qty. Description Reference Designator Manufacturer Part Number

1 1 74LVC14A U14 TI 74LVC14AD

SOIC14

2 1 IDT74FCT3244A U17 IDT IDT74FCT3244APYG

PY SSOP20

3 1 12.288MHZ U12 EPSON SG-8002CA MP

OSC003

4 1 25MHZ OSC003 U41 EPSON SG-8002CA MP

5 3 SN74LVC1G08 U48-50 TI SN74LVC1G08DBVR

SOT23-5

6 1 SN65LVDS2D U44 NATIONAL DS90LV018ATM

SOIC8 SEMI

7 1 M25P16 SO8W U40 ST MICRO M25P16-VMW6G

8 1 MT47H64M16 U2 MICRON MT47H64M16HR-3

FBGA84

9 1 ADM1032 U43 ON SEMI ADM1032ARZ

SOIC_N8

10 2 SI7601DN U15-16 VISHAY SI7601DN

ICS010

11 1 21469 U18 ST MICRO M29W320EB70ZE6E

M29W320EB
"U18"

ADSP-21469 EZ-Board Evaluation System Manual A-1

Ref. Qty. Description Reference Designator Manufacturer Part Number
12 1 ADM708SARZ U46 ANALOG ADM708SARZ
SOIC8 DEVICES

13 1 ADM3202ARNZ U42 ANALOG ADM3202ARNZ

SOIC16 DEVICES

14 1 ADSP-21469 U1 ANALOG ADSP-21469KBZ-ENG

PBGA324 DEVICES

15 2 ADP1864AUJZ VR2-3 ANALOG ADP1864AUJZ-R7

SOT23-6 DEVICES

16 1 ADP1710 TSOT5 VR1 ANALOG ADP1710AUJZ-R7

DEVICES

17 1 ADP1715 VR4 ANALOG ADP1715ARMZ-1.8-R7

MSOP8 DEVICES

18 1 AD1939 LQFP64 U45 ANALOG AD1939YSTZ

DEVICES

19 16 AD8652ARZ U20-26,U28-30,U32- ANALOG AD8652ARZ

SOIC_N8 34,U36-38 DEVICES

20 1 AD8397 U51 ANALOG AD8397ARDZ

SOIC_N8_EP DEVICES
21 1 ADM1085 U52 ANALOG ADM1085AKSZ-REEL7
SC70_6 DEVICES

22 2 RCA 1X1 J6-7 SWITCH- PJRAN1X1U01X

CON012 CRAFT

23 5 MOMENTARY SW8-12 PANASONIC EVQ-PAD04M

SWT013

24 4 DIP8 SWT016 SW1-3,SW19 C&K TDA08H0SB1

25 6 DIP6 SWT017 SW13-18 CTS 218-6LPST

26 3 DIP4 SWT018 SW7,SW24-25 ITT TDA04HOSB1

27 1 DB9 9PIN J2 NORCOMP 191-009-213-L-571

CON038

28 5 DIP2 SWT020 SW5,SW20-23 C&K CKN9064-ND

A-2 ADSP-21469 EZ-Board Evaluation System Manual

 ADSP-21469 EZ-Board Bill Of Materials

Ref. Qty. Description Reference Designator Manufacturer Part Number

29 3 IDC 2X1 P13-15 FCI 90726-402HLF
IDC2X1

30 4 IDC 2X1 JP1-4 FCI 90726-402HLF

IDC2X1

31 3 IDC SJ1-3 DIGI-KEY S9001-ND

2PIN_JUMPER_
SHORT
32 1 3.5MM J8 DIGI-KEY CP1-3525NG-ND
STEREO_JACK
CON001

33 1 PWR .65MM P16 CUI 045-0883R

CON045

34 1 5A RESETABLE F1 MOUSER 650-RGEF500

FUS005

35 1 QMS 52x2 J1 SAMTEC QMS-052-06.75-L-D-A

QMS52x2_SMT

36 1 IDC 7x2 P1 SAMTEC TSM-107-01-T-DV-A

IDC7x2_SMTA

37 1 ROTARY SW4 COPAL S-8110

SWT027

38 2 RCA 2x3 J4-5 KYOYAKU WSP-256V1-09

CON_RCA_6B ENT.

39 1 ERM8 10X2 P12 SAMTEC ERM8-010-01-S-D-RA

ERM8_10X2_SM
T

40 1 ERF8 10X2 J3 SAMTEC ERF8-010-01-S-D-RA-L

ERF8_10X2_SM
T

41 2 DB25 25PIN P8-9 TYCO 1734350-2

DB25F

42 1 IDC 30x2 P2 SAMTEC TSSH-130-01-L-DV-A

IDC30X2_SMTA

ADSP-21469 EZ-Board Evaluation System Manual A-3

Ref. Qty. Description Reference Designator Manufacturer Part Number
43 9 YELLOW LED1-8,LED11 PANASONIC LN1461C
LED001

44 2 22PF 50V 5% C262-263 AVX 08055A220JAT

0805

45 2 0.22UF 25V 10% C126-127 AVX 08053C224KAT2A

0805

46 1 0.1UF 50V 10% C123 AVX 08055C104KAT

0805

47 1 600 100MHZ FER5 DIGI-KEY 490-1014-2-ND

200MA 0603

48 2 600 100MHZ FER7-8 STEWARD HZ1206B601R-10

500MA 1206

49 2 10UF 16V 20% CT59-60 PANASONIC EEE1CA100SR

CAP002

50 1 190 100MHZ 5A FER9 MURATA DLW5BSN191SQ2

FER002

51 8 10UF 6.3V 10% C97-98,C100-101, AVX 08056D106KAT2A

0805 C103-104,C254,
C257
52 2 4.7UF 6.3V 10% C240,C246 AVX 08056D475KAT2A
0805

53 35 0.1UF 10V 10% C26-27,C53,C117- AVX 0402ZD104KAT2A

0402 120,C148,C151-152,
C160,C162,C169-
170,C178,C188-189,
C191,C197,C199-
200,C211,C213-214,
C225,C227-228,
C237,C264,C267-
271,C273

A-4 ADSP-21469 EZ-Board Evaluation System Manual

 ADSP-21469 EZ-Board Bill Of Materials

Ref. Qty. Description Reference Designator Manufacturer Part Number

54 94 0.01UF 16V 10% C28,C30-43,C45-50, AVX 0402YC103KAT2A
0402 C52,C54-96,C99,
C102,C105-116,
C121-122,C125,
C128-131,C136-142,
C266

55 33 10K 1/16W 5% R99,R190,R196-200, VISHAY CRCW040210K0FKED

0402 R202,R205-210,R217,
R224-225,R233-239,
R256,R259-260,
R463-466,R469,R494

56 2 4.7K 1/16W 5% R185,R501 VISHAY CRCW04024K70JNED

0402

57 4 0 1/16W 5% 0402 R462,R485,R492, PANASONIC ERJ-2GE0R00X

R498

58 1 22 1/16W 5% R230 PANASONIC ERJ-2GEJ220X

0402

59 13 33 1/16W 5% R191-192,R201, VISHAY CRCW040233R0JNEA

0402 R203-204,R211,
R257-258,R261-263,
R495-496

60 1 100UF 10V 10% CT61 AVX TPSC107K010R0075

C

61 2 2.2UF 10V 10% C238-239 AVX 0805ZD225KAT2A

0805

62 1 1000PF 50V 5% C51 AVX 04025C102JAT2A

0402

63 2 1A SK12 D4-5 DIODES INC B120B-13-F

DO-214AA

64 1 107.0 1/10W 1% R228 DIGI-KEY 311-107CRTR-ND

0805

65 1 249.0 1/10W 1% R227 DIGI-KEY 311-249CRTR-ND

0805

ADSP-21469 EZ-Board Evaluation System Manual A-5

Ref. Qty. Description Reference Designator Manufacturer Part Number
66 2 0.1UF 16V 10% C255-256 AVX 0603YC104KAT2A
0603

67 2 1UF 16V 10% C260-261 PANASONIC ECJ-1VB1C105K

0603

68 2 68PF 50V 5% C243,C249 AVX 06035A680JAT2A

0603

69 2 470PF 50V 5% C242,C248 AVX 06033A471JAT2A

0603

70 1 220UF 6.3V 20% CT45 SANYO 10TPE220ML

D2E

71 11 330 1/10W 5% R248-255,R467-468, VISHAY CRCW0603330RJNEA

0603 R497

72 2 0 1/10W 5% 0603 R452,R458 PHYCOMP 232270296001L

73 4 10 1/10W 5% R244-247 VISHAY CRCW060310R0JNEA

0603

74 1 10.0K 1/16W 1% R231 DALE CRCW060310K0FKEA

0603

75 8 237.0 1/10W 1% R267,R272,R280, DIGI-KEY 311-237HRTR-ND

0603 R285,R293,R298-299,
R304

76 24 49.9K 1/10W 1% R265,R271,R282, DIGI-KEY 311-49.9KHRTR-ND

0603 R284,R295,R297,
R300,R302,R310,
R336-337,R343-344,
R363-364,R369,R378,
R397-398,R403,R412,
R431-432,R437

77 1 75.0 1/10W 1% R229 DALE CRCW060375R0FKEA

0603

78 4 1UF 6.3V 20% C132-135 PANASONIC ECJ-0EB0J105M

0402

79 4 100 1/16W 5% R240-243 DIGI-KEY 311-100JRTR-ND

0402

A-6 ADSP-21469 EZ-Board Evaluation System Manual

 ADSP-21469 EZ-Board Bill Of Materials

Ref. Qty. Description Reference Designator Manufacturer Part Number

80 1 562.0 1/10W 1% R461 VISHAY CRCW0603562RFKEA
0603

81 1 390PF 25V 5% C258 AVX 06033A391FAT2A

0603

82 1 5600PF 16V 5% C259 AVX 0805YA562JAT2A

0805

83 1 15.0K 1/16W 1% R232 DIGI-KEY 311-15.0KHRTR-ND

0603

84 40 4.99K 1/16W 1% R264,R273,R278-279, VISHAY CRCW06034K99FKEA

0603 R291-292,R305-306,
R311,R313-314,R324,
R326-328,R342,
R349-350,R352-354,
R357,R366,R371,
R383-384,R386-388,
R391,R400,R405,
R417-418,R420-422,
R425,R434,R439

85 2 24.9K 1/10W 1% R448,R454 DIGI-KEY 311-24.9KHTR-ND

0603

86 1 31.6K 1/16W 1% R473 PANASONIC ERJ-3EKF3162V

0603

87 3 10UF 10V 10% C29,C161,C265 PANASONIC ECJ-2FB1A106K

0805

88 8 5.76K 1/16W 1% R266,R269,R277, PANASONIC ERJ-3EKF5761V

0603 R281,R290,R294,
R303,R307

89 3 0.05 1/2W 1% R446,R459-460 SEI CSF 1/2 0.05 1%R

1206

90 3 10UF 16V 10% C244-245,C250 AVX 1210YD106KAT2A

1210

91 1 GREEN LED001 LED9 PANASONIC LN1361CTR

92 1 RED LED001 LED10 PANASONIC LN1261CTR

ADSP-21469 EZ-Board Evaluation System Manual A-7

Ref. Qty. Description Reference Designator Manufacturer Part Number
93 2 1000PF 50V 5% C236,C251 AVX 12065A102JAT2A
1206

94 1 255.0K 1/10W R447 VISHAY CRCW06032553FK

1% 0603

95 2 80.6K 1/10W 1% R449,R455 DIGI-KEY 311-80.6KHRCT-ND

0603

96 3 5A D1-3 ON SEMI MBRS540T3G

MBRS540T3G
SMC

97 2 2.5UH 30% L1-2 COILCRAFT MSS1038-252NLB

IND013

98 3 1.0K 1/16W 1% R194-195,R287 PANASONIC ERJ-2RKF1001X

0402

99 1 8.20K 1/10W 1% R502 DIGI-KEY 541-8.20KHCT-ND

0603

100 6 10.0K 1/16W 1% R474,R486-488,R491, DIGI-KEY 541-10.0KLCT-ND

0402 R499

101 10 100K 1/16W 5% R475-484 DIGI-KEY 541-100KJTR-ND

0402
102 1 30.9K 1/16W 1% R453 DIGI-KEY 541-30.9KLCT-ND
0402

103 25 33 1/32W 5% RN1-14,RN18,RN22, PANASONIC EXB-28V330JX

RNS005 RN26-34
104 4 51.1 1/16W 1% R218-221 DIGI-KEY 541-51.1LCT-ND
0402

105 16 2.67K 1/16W 1% R316,R318,R322, PANASONIC ERJ-2RKF2671X

0402 R338,R367-368,R373,
R377,R401-402,R407,
R411,R435-436,R441,
R445

A-8 ADSP-21469 EZ-Board Evaluation System Manual

 ADSP-21469 EZ-Board Bill Of Materials

Ref. Qty. Description Reference Designator Manufacturer Part Number

106 31 100.0 1/16W 1% R193,R274-275,R288, DIGI-KEY 541-100LCT-ND
0402 R309,R331-335,R340,
R351,R358-362,R385,
R392-396,R419,
R426-430,R489-490

107 2 47UF 16V 20% CT57-58 PANASONIC EEE-FC1C470P

ELEC_6MM
108 4 37.4K 1/16W 1% R268,R276,R289, DIGI-KEY 541-37.4KLCT-ND
0402 R308

109 8 1000PF 50V 5% C144,C150,C154, DIGI-KEY 490-3244-1-ND

0402 C159,C164,C168,
C171,C176

110 4 100pF 50V 5% C147,C155,C165, MURATA GCM1555C1H101JZ13

0402 C175 D

111 8 300PF 100V 5% C143,C145,C153, DIGI-KEY 490-1362-1-ND

0603 C157,C163,C173,
C177,C179

112 16 2.43K 1/16W 1% R315,R319,R323, DIGI-KEY 541-2.43KLCT-ND

0402 R325,R346-347,
R374-375,R380-381,
R408-409,R414-415,
R442-443
113 16 750.0 1/16W 1% R317,R320-321,R341, DIGI-KEY 541-750LCT-ND
0402 R345,R348,R372,
R376,R379,R382,
R406,R410,R413,
R416,R440,R444

114 16 620PF 50V 5% C181,C186-187, DIGI-KEY 490-3239-1-ND

0402 C192,C194-195,
C201,C204,C208-
209,C215,C218,
C222-223,C229,C232

ADSP-21469 EZ-Board Evaluation System Manual A-9

Ref. Qty. Description Reference Designator Manufacturer Part Number
115 16 680PF 50V 5% C182-183,C185, DIGI-KEY 490-3240-1-ND
0402 C193,C202-203,
C206-207,C216-217,
C220-221,C230-231,
C234-235

116 4 0.036 1/2W 1% R450-451,R456-457 SUSUMU RL1632S-R036-F

1206
117 1 470UF 2.5V 20% CT47 SANYO 2R5TPE470MF
D2E

118 40 22UF 6.3V 20% CT1,CT3,CT5-6, PANASONIC EEE-FC0J220R

ELEC_4MM CT8-11,CT14,CT16,
CT18-19,CT23-24,
CT27-28,CT31-32,
CT35-36,CT39-40,
CT43-44,CT49-56,
CT62-69

119 8 22UF 6.3V 20% C180,C184,C196, MOUSER 647-UWP0J220MCL

ELEC_5MM C205,C210,C219,
C224,C233

120 1 5K 1/20W 20% R493 PANASONIC EVJ-Y15F03A53

RES_POT_DUA
L

121 4 51 1/32W 5% RN35-38 DIGI-KEY EXB-28V510JX

RNS005

122 9 10 1/32W 5% RN15-17,RN19-21, PANASONIC EXB-28V100JX

RNS005 RN23-25

123 9 82 1/32W 5% RN40-48 PANASONIC EXB-28V820JX

RNS005

124 9 47PF 50V 10% CN1-9 TDK CORP CKCL44C0G1H470K

CNS001

125 16 6.81K 1/10W 1% R312,R329-330,R339, DIGI-KEY 311-6.81KHRTR-ND

0603 R355-356,R365,R370,
R389-390,R399,R404,
R423-424,R433,R438

A-10 ADSP-21469 EZ-Board Evaluation System Manual

 ADSP-21469 EZ-Board Bill Of Materials

Ref. Qty. Description Reference Designator Manufacturer Part Number

126 1 806 1/10W 1% R286 VISHAY CRCW0402806RFKED
0402

127 1 30A GSOT05 D6 VISHAY GSOT05-GS08

SOT23-3

128 2 30A GSOT03 D7,D10 VISHAY GSOT03-GS08

SOT23-3

129 1 40A ESD5Z2.5T1 D8 ON SEMI ESD5Z2.5T1G

SOD-523

130 1 7A D9 VISHAY VESD01-02V-GS08

VESD01-02V-GS
08 SOD-52

131 1 16.9K 1/16W 1% R500 VISHAY CRCW040216K9FKED

0402

ADSP-21469 EZ-Board Evaluation System Manual A-11

A-12 ADSP-21469 EZ-Board Evaluation System Manual
 A B C D

1 1

2 2

ADSP-21469 EZ-BOARD
SCHEMATIC

3 3

ANALOG 20 Cotton Road

Nashua, NH 03063
4 DEVICES PH: 1-800-ANALOGD 4

Title ADSP-21469 EZ-BOARD

TITLE
Size Board No. Rev
C A0221-2008 0.2
Date 3-13-2009_14:36 Sheet 1 of 16

A B C D
 A B C D

VDD_DDR2
U1
D13 B2
DDR2_ADDR0_Z DDR2_ADDR0 DDR2_DATA0 DDR2_DATA0_Z
C13 A2
DDR2_ADDR1_Z DDR2_ADDR1 DDR2_DATA1 DDR2_DATA1_Z

VDD3M9
VDDQ6G1
VDDQ7G3
VDDQ8G7
VDDQ9G9
VDDQ1C1
VDDQ2C3
VDDQ3C7
VDDQ4C9

VDD4R1
A9

VDDQ5E9

A1
VDD1E1
U2

VDD2J9

J1
D14 B3
DDR2_ADDR2_Z DDR2_ADDR2 DDR2_DATA2 DDR2_DATA2_Z

VDDQ10

VDD5

VDDL
C14 A3 M8 G8
DDR2_ADDR3_Z DDR2_ADDR3 DDR2_DATA3 DDR2_DATA3_Z DDR2_ADDR0 A0 DQ0 DDR2_DATA0
B14 B5 M3 G2
DDR2_ADDR4_Z DDR2_ADDR4 DDR2_DATA4 DDR2_DATA4_Z DDR2_ADDR1 A1 DQ1 DDR2_DATA1
A14 A5 M7 H7
DDR2_ADDR5_Z DDR2_ADDR5 DDR2_DATA5 DDR2_DATA5_Z DDR2_ADDR2 A2 DQ2 DDR2_DATA2
1 D15 B6 N2 H3
1
DDR2_ADDR6_Z DDR2_ADDR6 DDR2_DATA6 DDR2_DATA6_Z DDR2_ADDR3 A3 DQ3 DDR2_DATA3
C15 A6 N8 H1
DDR2_ADDR7_Z DDR2_ADDR7 DDR2_DATA7 DDR2_DATA7_Z DDR2_ADDR4 A4 DQ4 DDR2_DATA4
B15 B8 N3 H9
DDR2_ADDR8_Z DDR2_ADDR8 DDR2_DATA8 DDR2_DATA8_Z DDR2_ADDR5 A5 DQ5 DDR2_DATA5
A15 A8 N7 F1
DDR2_ADDR9_Z DDR2_ADDR9 DDR2_DATA9 DDR2_DATA9_Z DDR2_ADDR6 A6 DQ6 DDR2_DATA6 DDR2 end of line terminators and VTT tracking circuit have been
D16 B9 P2 F9
DDR2_ADDR10_Z DDR2_ADDR10 DDR2_DATA10 DDR2_DATA10_Z DDR2_ADDR7 A7 DQ7 DDR2_DATA7 omitted since overall trace length is less than 2.5" for each net.
C16 A9 P8 C8
DDR2_ADDR11_Z DDR2_ADDR11 DDR2_DATA11 DDR2_DATA11_Z DDR2_ADDR8 A8 DQ8 DDR2_DATA8
B16 A11 P3 C2
DDR2_ADDR12_Z DDR2_ADDR12 DDR2_DATA12 DDR2_DATA12_Z DDR2_ADDR9 A9 DQ9 DDR2_DATA9 For a custom design, please adhere to any EE-note from ADI
A16 B11 M2 D7
DDR2_ADDR13_Z DDR2_ADDR13 DDR2_DATA13 DDR2_DATA13_Z DDR2_ADDR10 A10/AP DQ10 DDR2_DATA10 and any recommendations by the memory manufacturer.
B17 A12 P7 D3
DDR2_ADDR14_Z DDR2_ADDR14 DDR2_DATA14 DDR2_DATA14_Z DDR2_ADDR11 A11 DQ11 DDR2_DATA11
A17 B12 R2 D1
DDR2_ADDR15_Z DDR2_ADDR15 DDR2_DATA15 DDR2_DATA15_Z DDR2_ADDR12 A12 DQ12 DDR2_DATA12
R8 D9
C1 A4 DDR2_ADDR13 RFU/A13 DQ13 DDR2_DATA13
DDR2_CS0_Z DDR2_CS0 DDR2_DQS0 DDR2_DQS0_Z R3 B1
D1 B4 DDR2_ADDR14 RFU/A14 DQ14 DDR2_DATA14
DDR2_CS1 DDR2_DQS0 DDR2_DQS0_Z R7 B9
C2 A10 DDR2_ADDR15 RFU/A15 DQ15 DDR2_DATA15
DDR2_CS2 DDR2_DQS1 DDR2_DQS1_Z
D2 B10 L2 F7
DDR2_CS3 DDR2_DQS1 DDR2_DQS1_Z DDR2_BA0 BA0 LDQS DDR2_DQS0 VDD_DDR2
C3 L3 E8
C18 DDR2_DM0 DDR2_DM0_Z DDR2_BA1 BA1 LDQS DDR2_DQS0
DDR2_BA0_Z DDR2_BA0 C11 L1 B7
C17 DDR2_DM1 DDR2_DM1_Z DDR2_BA2 BA2 UDQS DDR2_DQS1
DDR2_BA1_Z DDR2_BA1 A8
B18 B7 F3 UDQS DDR2_DQS1
DDR2_BA2_Z DDR2_BA2 DDR2_CLK0 DDR2_CLK0_Z DDR2_DM0 LDM
A7 B3 A2 R194 C26
DDR2_CLK0 DDR2_CLK0_Z DDR2_DM1 UDM NC1 1.0K 0.1UF
B13 K9 E2 0402 0402
DDR2_CLK1 DDR2_ODT ODT NC2
A13 K2
2 DDR2_CLK1 DDR2_CKE CKE J2 2
E1 L8 VREF DDR2_VREF
DDR2_CKE DDR2_CKE_Z DDR2_CS0 CS
C7 K7 J8
DDR2_CAS DDR2_CAS_Z DDR2_RAS RAS CK DDR2_CLK0 R195 C27
C9 L7 K8 1.0K 0.1UF
DDR2_RAS DDR2_RAS_Z DDR2_CAS CAS CK 0402

GNDQ10
0402

B2GNDQ1
B8GNDQ2
D2GNDQ3
D8GNDQ4
E7GNDQ5
F2GNDQ6
F8GNDQ7
H2GNDQ8
H8GNDQ9
C10 K3 R193

E3GND1
J3GND2
N1GND3
P9GND4
GND5

GNDL
DDR2_WE DDR2_WE_Z DDR2_WE WE 100.0
B1 0402
DDR2_ODT DDR2_ODT_Z

A7

A3

J7
MT47H64M16
FBGA84
D4
VREF1 DDR2_VREF DDR2_CLK0
D11
VREF2
ADSP-21469
PBGA324

RN3 RN7 RN14

1 8 1 8 1 8
DDR2_ADDR2_Z R1A R1B DDR2_ADDR2 DDR2_DATA3_Z R1A R1B DDR2_DATA3 R1A R1B
2 7 2 7 2 7
DDR2_ADDR3_Z R2A R2B DDR2_ADDR3 DDR2_DATA2_Z R2A R2B DDR2_DATA2 DDR2_DQS0_Z R2A R2B DDR2_DQS0
3 6 3 6 3 6
DDR2_ADDR0_Z R3A R3B DDR2_ADDR0 DDR2_DATA1_Z R3A R3B DDR2_DATA1 R3A R3B VDD_DDR2
4 5 4 5 4 5
DDR2_ADDR1_Z R4A R4B DDR2_ADDR1 DDR2_DATA0_Z R4A R4B DDR2_DATA0 DDR2_DQS0_Z R4A R4B DDR2_DQS0

33 33 33
RNS005 RNS005 RNS005
C28 C30 C31 C32 C33 C34 C35 C36
RN4 RN8 RN13 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF
3 0402 0402 0402 0402 0402 0402 0402 0402 3
1 8 1 8 1 8
DDR2_ADDR5_Z R1A R1B DDR2_ADDR5 DDR2_DATA6_Z R1A R1B DDR2_DATA6 DDR2_DQS1_Z R1A R1B DDR2_DQS1
2 7 2 7 2 7
DDR2_ADDR4_Z R2A R2B DDR2_ADDR4 DDR2_DATA7_Z R2A R2B DDR2_DATA7 R2A R2B
3 6 3 6 3 6
DDR2_ADDR7_Z R3A R3B DDR2_ADDR7 DDR2_DATA4_Z R3A R3B DDR2_DATA4 DDR2_DQS1_Z R3A R3B DDR2_DQS1
4 5 4 5 4 5
DDR2_ADDR6_Z R4A R4B DDR2_ADDR6 DDR2_DATA5_Z R4A R4B DDR2_DATA5 R4A R4B

33 33 33
RNS005 RNS005 RNS005
VDD_DDR2

RN5 RN9 RN12

1 8 1 8 1 8
DDR2_ADDR10_Z R1A R1B DDR2_ADDR10 DDR2_DATA10_Z R1A R1B DDR2_DATA10 DDR2_CLK0_Z R1A R1B DDR2_CLK0
2 7 2 7 2 7 C29 C43 C37 C38 C42 C41 C40 C39
DDR2_ADDR11_Z R2A R2B DDR2_ADDR11 DDR2_DATA11_Z R2A R2B DDR2_DATA11 R2A R2B 10UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF
3 6 3 6 3 6 0805 0402 0402 0402 0402 0402 0402 0402
DDR2_ADDR8_Z R3A R3B DDR2_ADDR8 DDR2_DATA8_Z R3A R3B DDR2_DATA8 DDR2_CLK0_Z R3A R3B DDR2_CLK0
4 5 4 5 4 5
DDR2_ADDR9_Z R4A R4B DDR2_ADDR9 DDR2_DATA9_Z R4A R4B DDR2_DATA9 R4A R4B

33 33 33
RNS005 RNS005 RNS005

RN6 RN10 RN11

1 8 1 8 1 8
DDR2_ADDR13_Z R1A R1B DDR2_ADDR13 DDR2_DATA12_Z R1A R1B DDR2_DATA12 DDR2_CAS_Z R1A R1B DDR2_CAS
2 7 2 7 2 7
DDR2_ADDR12_Z R2A R2B DDR2_ADDR12 DDR2_DATA13_Z R2A R2B DDR2_DATA13 DDR2_RAS_Z R2A R2B DDR2_RAS
3 6 3 6 3 6
DDR2_ADDR15_Z R3A R3B DDR2_ADDR15 DDR2_DATA14_Z R3A R3B DDR2_DATA14 DDR2_WE_Z R3A R3B DDR2_WE
4 5 4 5 4 5
DDR2_ADDR14_Z R4A

33
R4B DDR2_ADDR14 DDR2_DATA15_Z R4A

33
R4B DDR2_DATA15 R4A

33
R4B
ANALOG 20 Cotton Road
Nashua, NH 03063
RNS005 RNS005 RNS005
4
RN1
R191
33 RN2
DEVICES PH: 1-800-ANALOGD 4

0402
DDR2_BA2_Z
1
R1A R1B
8
DDR2_BA2 DDR2_DM0_Z DDR2_DM0 DDR2_CKE_Z
1
R1A R1B
8
DDR2_CKE Title ADSP-21469 EZ-BOARD
2 7 2 7
R2A R2B DDR2_CS0_Z R2A R2B DDR2_CS0

DDR2_BA0_Z
3
R3A R3B
6
DDR2_BA0
R192
33
DDR2_ODT_Z
3
R3A R3B
6
DDR2_ODT
DSP - DDR2 INTERFACE
0402
DDR2_BA1_Z
4
R4A R4B
5
DDR2_BA1 DDR2_DM1_Z DDR2_DM1
4
R4A R4B
5 Size Board No. Rev
C A0221-2008 0.2
33 33
RNS005 RNS005
Date 3-31-2009_10:10 Sheet 2 of 16

A B C D
 A B C D

U1 RN24 RN20

V16 U18 1 8 1 8
ADDR0_Z AMI_ADDR0 AMI_DATA0 DATA0_Z ADDR0_Z R1A R1B ADDR0 DATA0_Z R1A R1B DATA0 RN46 CN1
U16 T18 2 7 2 7
ADDR1_Z AMI_ADDR1 AMI_DATA1 DATA1_Z ADDR1_Z R2A R2B ADDR1 DATA1_Z R2A R2B DATA1 1 8 1 8
T16 R18 3 6 3 6 MS0 R1A R1B C1A C1B
ADDR2_Z AMI_ADDR2 AMI_DATA2 DATA2_Z ADDR2_Z R3A R3B ADDR2 DATA2_Z R3A R3B DATA2 2 7 2 7
R16 P18 4 5 4 5 RD R2A R2B C2A C2B
ADDR3_Z AMI_ADDR3 AMI_DATA3 DATA3_Z ADDR3_Z R4A R4B ADDR3 DATA3_Z R4A R4B DATA3 SW13: ASYNC CONTROL ENABLE 3 6 3 6
V15 V17 MS1 R3A R3B C3A C3B
ADDR4_Z AMI_ADDR4 AMI_DATA4 DATA4_Z 10 10 DEFAULT: OFF ON OFF ON ON OFF 4 5 4 5
U15 U17 RNS005 RNS005 WR R4A R4B C4A C4B
ADDR5_Z AMI_ADDR5 AMI_DATA5 DATA5_Z SW13
T15 T17 RN25 RN21 1 12 82

ON
ADDR6_Z AMI_ADDR6 AMI_DATA6 DATA6_Z MS0

1
RNS005
R15 R17 1 8 1 8 2 11
ADDR7_Z AMI_ADDR7 AMI_DATA7 DATA7_Z ADDR7_Z R1A R1B ADDR7 DATA7_Z R1A R1B DATA7 MS1 FLASH_CS

2
V14 2 7 2 7 3 10 3.3V
ADDR8_Z AMI_ADDR8 ADDR6_Z R2A R2B ADDR6 DATA6_Z R2A R2B DATA6 FLAG0/IRQ0 TEMP_THERM

3
T10
U14 AMI_MS0 MS0_Z 3 6 3 6 4 9
1 ADDR9_Z AMI_ADDR9 ADDR5_Z R3A R3B ADDR5 DATA5_Z R3A R3B DATA5 FLAG1/IRQ1 PB1 1

4
U10
T14 AMI_MS1 MS1_Z 4 5 4 5 5 8
ADDR10_Z AMI_ADDR10 ADDR4_Z R4A R4B ADDR4 DATA4_Z R4A R4B DATA4 FLAG2/IRQ2/MS2 PB2

5
J4
R14 AM_RD RD_Z 6 7
ADDR11_Z AMI_ADDR11 FLAG3/TIMEXP/MS3 TEMP_IRQ

6
V10 10 10
AMI_WR WR_Z

G4
V13 RNS005 RNS005 DIP6 U18
ADDR12_Z AMI_ADDR12 SWT017

VDD
R10
U13 AMI_ACK ACK RN15 RN23 E1 E2
ADDR13_Z AMI_ADDR13 ADDR1 A0 D0 DATA0
T13 R8 1 8 1 8 D1 H2
ADDR14_Z AMI_ADDR14 FLAG0/IRQ0 FLAG0/IRQ0_Z ADDR8_Z R1A R1B ADDR8 WR_Z R1A R1B WR ADDR2 A1 D1 DATA1
R13 V7 2 7 2 7 C1 E3
ADDR15_Z AMI_ADDR15 FLAG1/IRQ1 FLAG1/IRQ1_Z ADDR9_Z R2A R2B ADDR9 MS1_Z R2A R2B MS1 ADDR3 A2 D2 DATA2
V12 U7 3 6 3 6 A1 H3
ADDR16_Z AMI_ADDR16 FLAG2/IRQ2/AMI_MS2 FLAG2/IRQ2/MS2_Z ADDR10_Z R3A R3B ADDR10 MS0_Z R3A R3B MS0 3.3V ADDR4 A3 D3 DATA3
U12 T7 4 5 4 5 B1 H4
ADDR17_Z AMI_ADDR17 FLAG3/TIMEXP/AMI_MS3 FLAG3/TIMEXP/MS3_Z ADDR11_Z R4A R4B ADDR11 RD_Z R4A R4B RD ADDR5 A4 D4 DATA4
T12 D2 E4
ADDR18_Z AMI_ADDR18 K3 R211 33 10 10 ADDR6 A5 D5 DATA5
R12 MLBCLK 0402 MLBCLK RNS005 RNS005 C2 H5
ADDR19_Z AMI_ADDR19 K4 ADDR7 A6 D6 DATA6
V11 MLBDAT MLBDAT_Z RN16 RN18 A2 E5
ADDR20_Z AMI_ADDR20 L2 ADDR8 A7 D7 DATA7
U11 MLBSIG MLBSIG_Z 1 8 1 8 B5 F2
ADDR21_Z AMI_ADDR21 L3 ADDR15_Z R1A R1B ADDR15 FLAG3/TIMEXP/MS3_Z R1A R1B FLAG3/TIMEXP/MS3 C46 C47 ADDR9 A8 D8
T11 MLBSO MLBSO_Z 2 7 2 7 0.01UF 0.01UF A5 G2
ADDR22_Z AMI_ADDR22 L4 ADDR14_Z R2A R2B ADDR14 FLAG2/IRQ2/MS2_Z R2A R2B FLAG2/IRQ2/MS2 0402 0402 ADDR10 A9 D9
R11 MLBD0 MLBDO_Z 3 6 3 6 C5 F3
ADDR23_Z AMI_ADDR23 ADDR13_Z R3A R3B ADDR13 FLAG1/IRQ1_Z R3A R3B FLAG1/IRQ1 ADDR11 A10 D10
K2 R462 0 4 5 4 5 D5 G3
J2 EMU 0402 EMU ADDR12_Z R4A R4B ADDR12 FLAG0/IRQ0_Z R4A R4B FLAG0/IRQ0 ADDR12 A11 D11
BOOT_CFG0 BOOT_CFG0 N15 B6 F4
J3 TRST TRST 10 33 ADDR13 A12 D12
BOOT_CFG1 BOOT_CFG1 K15 RNS005 RNS005 A6 G5
H3 TCK TCK ADDR14 A13 D13
BOOT_CFG2 BOOT_CFG2 K16 RN17 RN22 C6 F5
TMS TMS ADDR15 A14 D14
G1 L15 1 8 1 8 D6 G6
CLK_CFG0 CLK_CFG0 TDI TDI ADDR16_Z R1A R1B ADDR16 MLBDO_Z R1A R1B MLBDO ADDR16 A15 D15/A-1 ADDR0
G2 M15 R203 33 2 7 2 7 E6
CLK_CFG1 CLK_CFG1 TDO 0402 TDO ADDR17_Z R2A R2B ADDR17 MLBSO_Z R2A R2B MLBSO ADDR17 A16
2 3 6 3 6 B2 2
M1 N11 ADDR18_Z R3A R3B ADDR18 MLBSIG_Z R3A R3B MLBSIG 3.3V ADDR18 A17 C4
RESET RESET THD_P TEMP_PLUS 4 5 4 5 C3 NC
N12 ADDR19_Z R4A R4B ADDR19 MLBDAT_Z R4A R4B MLBDAT 3.3V ADDR19 A18
K1 THD_M TEMP_MINUS D4
XTAL 10 3.3V 33 ADDR20 A19
L1 M2 R204 33 RNS005 RNS005 D3
DSP_CLKIN CLKIN CLKOUT 0402 DSP_CLKOUT ADDR21 A20

ADSP-21469 RN19 R217

PBGA324 10K
C44 1 8 3.3V 3.3V 0402 B4
0.1UF ADDR23_Z R1A R1B ADDR23 R206 RESET RESET
0402 XTAL PIN TEST POINT 2 7 10K F6
DNP ADDR22_Z R2A R2B ADDR22 R202 0402 BYTE
DO NOT POPULATE C44 3 6 10K DSP OSC TP1
A3
ADDR21_Z R3A R3B ADDR21 0402 RDY/BSY RY/BY~
4 5 F1
ADDR20_Z R4A R4B ADDR20 R201 FLASH_CS CE
P10 U41 4 33 C45 G1
1 2 10 VDD 0402 0.01UF RD OE
MLBCLK MLB NOT SUPPORTED ON 21469 DSP RNS005 1 3 0402 A4
3 4 OE OUT DSP_CLKIN JP1 WR WE
MLBSIG P10 UNPOPULATED BY DEFAULT GND 1 2 WP B3

H6GND1
GND2
5 6 25MHZ 2 VPP/WP~
MLBDAT P10 CAN BE USED WITH A 21462 DSP OSC003 IDC2X1

H1
7 8 M29W320EB
MLBSO OSC JP1 DEFAULT: OFF TFBGA48
9 10 C48 R205
MLBDO 0.01UF 10K
MLB_DEVICE 0402 0402
5X2_2MM
DNP

RN41 CN2 RN45 CN6

3.3V
1 8 1 8 1 8 1 8
ADDR1 R1A R1B C1A C1B ADDR18 R1A R1B C1A C1B
2 7 2 7 2 7 2 7 3.3V
ADDR3 R2A R2B C2A C2B ADDR19 R2A R2B C2A C2B
SW4 3 6 3 6 3 6 3 6
3 C 1 ADDR2 R3A R3B C3A C3B ADDR16 R3A R3B C3A C3B 3
2 BOOT_CFG0 4 5 4 5 4 5 4 5 3.3V
1 3 ADDR0 R4A R4B C4A C4B ADDR17 R4A R4B C4A C4B
2
BOOT_CFG1
0 4
4 82 82 3.3V
7 5 BOOT_CFG2 RNS005 RNS005
6 R210 R209
10K 10K
SWT027 0402 0402
ROTARY RN42 CN3 RN40 CN7
R198 R197 R196 R207 R208
10K 10K 10K 1 8 1 8 1 8 1 8 10K 10K
0402 0402 0402 ADDR7 R1A R1B C1A C1B ADDR22 R1A R1B C1A C1B U43 1 0402 0402
2 7 2 7 2 7 2 7 VCC
ADDR6 R2A R2B C2A C2B ADDR20 R2A R2B C2A C2B 8
SW4: BOOT MODE SELECT 3 6 3 6 3 6 3 6 TEMP_SCK SCK 3.3V
ADDR5 R3A R3B C3A C3B ADDR23 R3A R3B C3A C3B 7 6
POSITION BOOT MODE 4 5 4 5 4 5 4 5 TEMP_SDA SI ALERT TEMP_IRQ
ADDR4 R4A R4B C4A C4B ADDR21 R4A R4B C4A C4B
2 4
0 SPI Slave Boot 82 82 TEMP_PLUS D_PLUS THERM TEMP_THERM
RNS005 RNS005 3
1 SPI Master Boot TEMP_MINUS D_MINUS

2 AMI Boot (Parallel Flash) DEFAULT RN43 CN4 RN48 CN8 GND
C49
0.01UF
ADM1032 5 0402
4 Link Port 0 Boot 1 8 1 8 1 8 1 8 SOIC_N8
ADDR11 R1A R1B C1A C1B DATA3 R1A R1B C1A C1B
3,5,6 or 7 Reserved 2 7 2 7 2 7 2 7
ADDR9 R2A R2B C2A C2B DATA1 R2A R2B C2A C2B
3.3V 3 6 3 6 3 6 3 6
ADDR10 R3A R3B C3A C3B DATA2 R3A R3B C3A C3B
4 5 4 5 4 5 4 5
ADDR8 R4A R4B C4A C4B DATA0 R4A R4B C4A C4B

SW5 82 82
1 4 RNS005 RNS005
ON

CLK_CFG0
ANALOG 20 Cotton Road
1

2 3
CLK_CFG1
2

RN44 CN5 RN47 CN9 Nashua, NH 03063

DIP2
4
R200
SWT020

R199
SW5: DSP CLOCK CONFIG ADDR12
1

2
R1A R1B
8

7
1

2
C1A C1B
8

7
DATA4
1

2
R1A R1B
8

7
1

2
C1A C1B
8

7
DEVICES PH: 1-800-ANALOGD 4

10K 10K 1 2 CLOCK RATIO ADDR14 R2A R2B C2A C2B DATA6 R2A R2B C2A C2B
0402 0402
CLKCFG0 CLKCFG1 CORE:CLKIN ADDR13
3
R3A R3B
6 3
C3A C3B
6
DATA7
3
R3A R3B
6 3
C3A C3B
6 Title ADSP-21469 EZ-BOARD
4 5 4 5 4 5 4 5
ON ON Reserved ADDR15 R4A R4B C4A C4B DATA5 R4A R4B C4A C4B

ON OFF 32:1
DSP - ASYNC INTERFACE
82 82
OFF ON 16:1 DEFAULT
RNS005 RNS005 Size Board No. Rev
OFF OFF 6:1 C A0221-2008 0.2
Date 4-14-2009_10:36 Sheet 3 of 16

A B C D
 A B C D

RN26 RN30 RN38

U1 1 8 1 8 1 8
DPI_P2_Z R1A R1B DPI_P2 DAI_P1_Z R1A R1B DAI_P1 LDAT0_3_Z R1A R1B LDAT0_3
R6 R2 2 7 2 7 2 7
DAI_P1_Z DAI_P1 DPI_P1 DPI_P1_Z DPI_P3_Z R2A R2B DPI_P3 DAI_P2_Z R2A R2B DAI_P2 LDAT0_2_Z R2A R2B LDAT0_2
V5 U1 3 6 3 6 3 6
DAI_P2_Z DAI_P2 DPI_P2 DPI_P2_Z DPI_P4_Z R3A R3B DPI_P4 DAI_P3_Z R3A R3B DAI_P3 LDAT0_1_Z R3A R3B LDAT0_1
R7 T1 4 5 4 5 4 5
DAI_P3_Z DAI_P3 DPI_P3 DPI_P3_Z DPI_P1_Z R4A R4B DPI_P1 DAI_P4_Z R4A R4B DAI_P4 LDAT0_0_Z R4A R4B LDAT0_0
R3 R1
DAI_P4_Z DAI_P4 DPI_P4 DPI_P4_Z 33 33 51
U5 P1 RNS005 RNS005 RNS005
DAI_P5_Z DAI_P5 DPI_P5 DPI_P5_Z
T5 P2 RN27 RN31 RN37
DAI_P6_Z DAI_P6 DPI_P6 DPI_P6_Z
1 V6 P3 1 8 1 8 1 8 1
DAI_P7_Z DAI_P7 DPI_P7 DPI_P7_Z DPI_P5_Z R1A R1B DPI_P5 DAI_P8_Z R1A R1B DAI_P8 LDAT0_7_Z R1A R1B LDAT0_7
V2 P4 2 7 2 7 2 7
DAI_P8_Z DAI_P8 DPI_P8 DPI_P8_Z DPI_P6_Z R2A R2B DPI_P6 DAI_P7_Z R2A R2B DAI_P7 LDAT0_6_Z R2A R2B LDAT0_6
R5 N1 3 6 3 6 3 6
DAI_P9_Z DAI_P9 DPI_P9 DPI_P9_Z DPI_P7_Z R3A R3B DPI_P7 DAI_P6_Z R3A R3B DAI_P6 LDAT0_5_Z R3A R3B LDAT0_5
V4 N2 4 5 4 5 4 5
DAI_P10_Z DAI_P10 DPI_P10 DPI_P10_Z DPI_P8_Z R4A R4B DPI_P8 DAI_P5_Z R4A R4B DAI_P5 LDAT0_4_Z R4A R4B LDAT0_4
U4 N3
DAI_P11_Z DAI_P11 DPI_P11 DPI_P11_Z 33 33 51
T4 N4 RNS005 RNS005 RNS005
DAI_P12_Z DAI_P12 DPI_P12 DPI_P12_Z
U6 M3 RN28 RN32 RN36
DAI_P13_Z DAI_P13 DPI_P13 DPI_P13_Z
U2 M4 1 8 1 8 1 8
DAI_P14_Z DAI_P14 DPI_P14 DPI_P14_Z DPI_P9_Z R1A R1B DPI_P9 DAI_P9_Z R1A R1B DAI_P9 LDAT1_3_Z R1A R1B LDAT1_3
R4 2 7 2 7 2 7
DAI_P15_Z DAI_P15 DPI_P10_Z R2A R2B DPI_P10 DAI_P10_Z R2A R2B DAI_P10 LDAT1_2_Z R2A R2B LDAT1_2
V3 3 6 3 6 3 6
DAI_P16_Z DAI_P16 DPI_P11_Z R3A R3B DPI_P11 DAI_P11_Z R3A R3B DAI_P11 LDAT1_1_Z R3A R3B LDAT1_1
U3 4 5 4 5 4 5
DAI_P17_Z DAI_P17 DPI_P12_Z R4A R4B DPI_P12 DAI_P12_Z R4A R4B DAI_P12 LDAT1_0_Z R4A R4B LDAT1_0
T3
DAI_P18_Z DAI_P18 33 33 51
T6 RNS005 RNS005 RNS005
DAI_P19_Z DAI_P19
T2
DAI_P20_Z DAI_P20 RN29 RN33 RN35

R219 51.1 J18 N18 R218 51.1 1 8 1 8 1 8

LCLK_0 0402 LCLK_0 LCLK_1 0402 LCLK_1 DPI_P13_Z R1A R1B DPI_P13 DAI_P16_Z R1A R1B DAI_P16 LDAT1_7_Z R1A R1B LDAT1_7
R220 51.1 K17 P17 R221 51.1 2 7 2 7 2 7
LACK_0 0402 LACK_0 LACK_1 0402 LACK_1 DPI_P14_Z R2A R2B DPI_P14 DAI_P15_Z R2A R2B DAI_P15 LDAT1_6_Z R2A R2B LDAT1_6
E18 K18 3 6 3 6 3 6
LDAT0_0_Z LDAT0_0 LDAT1_0 LDAT1_0_Z R3A R3B DAI_P14_Z R3A R3B DAI_P14 LDAT1_5_Z R3A R3B LDAT1_5
F17 L16 4 5 4 5 4 5
LDAT0_1_Z LDAT0_1 LDAT1_1 LDAT1_1_Z R4A R4B DAI_P13_Z R4A R4B DAI_P13 LDAT1_4_Z R4A R4B LDAT1_4
F18 L17
LDAT0_2_Z LDAT0_2 LDAT1_2 LDAT1_2_Z 33 33 51
G17 L18 RNS005 RNS005 RNS005
LDAT0_3_Z LDAT0_3 LDAT1_3 LDAT1_3_Z
G18 M16 RN34
2 LDAT0_4_Z LDAT0_4 LDAT1_4 LDAT1_4_Z 2
H16 M17 1 8
LDAT0_5_Z LDAT0_5 LDAT1_5 LDAT1_5_Z DAI_P17_Z R1A R1B DAI_P17
H17 N16 2 7
LDAT0_6_Z LDAT0_6 LDAT1_6 LDAT1_6_Z DAI_P20_Z R2A R2B DAI_P20 SW1: DAI [1-8] ENABLE
J16 P16 3 6
LDAT0_7_Z LDAT0_7 LDAT1_7 LDAT1_7_Z DAI_P19_Z R3A R3B DAI_P19 DEFAULT: ALL ON
4 5
ADSP-21469 DAI_P18_Z R4A R4B DAI_P18 SW1
PBGA324 1 16

ON
DAI_P1 SPDIF_OUT

1
33
RNS005 2 15
DAI_P2 AD1939_SOFT_RESET

2
3 14
DAI_P3 LED4

3
SW3: DPI [1-8] ENABLE 4 13
LINK PORT 1 / JTAG IN DAI_P4 LED5

4
DEFAULT: ALL ON 5 12
DAI_P5 ASDATA1

5
J3
SW3 6 11
DAI_P6 ASDATA2

6
2 1 1 16

ON
TCK_LINKPORT MSC1 D7 LDAT1_7 DPI_P1 SPI_MOSI

1
7 10
DAI_P7 ABCLK

7
4 3 2 15
GND1 D6 LDAT1_6 DPI_P2 SPI_MISO

2
8 9
DAI_P8 ALRCLK

8
6 5 3 14
TDO_IN MSC2 D5 LDAT1_5 DPI_P3 SPI_CLK

3
DIP8
8 7 4 13 SWT016
GND2 D4 LDAT1_4 DPI_P4 AD1939_CS

4
10 9 5 12
TMS_LINKPORT MSC3 D3 LDAT1_3 DPI_P5 SPI_CS

5
12 11 6 11
EMU_LINKPORT MSC4 D2 LDAT1_2 DPI_P6 LED1 SW2: DPI [9-16] ENABLE

6
14 13 7 10
TRST_LINKPORT MSC5 D1 LDAT1_1 DPI_P7 TEMP_SDA DEFAULT: ALL ON EXCEPT POS. 5 & 6 OFF

7
16 15 8 9
DA_SOFT_RESET_LINKPORT MSC6 D0 LDAT1_0 DPI_P8 TEMP_SCK

8
SW2
18 17 DIP8 1 16

ON
GND3 ACK LACK_1 DAI_P9 DSDATA4

1
SWT016
20 19 2 15
GND4 CLK LCLK_1 DAI_P10 DSDATA3

2
3 14
3 DAI_P11 DSDATA2 3

3
LINKPORT_EDGE_F
ERF8_10X2_SMT SW14: DPI [9-14] ENABLE 4 13
DAI_P12 DSDATA1

4
R463 R464
10K 10K DEFAULT: ALL ON EXCEPT POS 3 & 4 OFF 5 12
DAI_P13 DBCLK

5
0402 0402
3.3V 3.3V SW14 6 11
DAI_P14 DLRCLK

6
1 12

ON
DPI_P9 UART_TX

1
7 10
DAI_P15 LED6

7
2 11
DPI_P10 UART_RX

2
3.3V 8 9
DAI_P16 LED7

8
3 10
DPI_P11 UART_RTS

3
DIP8
4 9 SWT016
DPI_P12 UART_CTS

4
R225 R224 R222 5 8
LINK PORT 0 / JTAG OUT DPI_P13 LED2

5
10K 10K 10K
0402 0402 0402 6 7
DPI_P14 LED3 SW7: DPI [17-20] ENABLE

6
P12 U40 8 DNP
VCC DIP6
2 1 5 2 SWT017 DEFAULT: ALL ON
TCK_LINKPORT MSC1 D7 LDAT0_7 SPI_MOSI SI SO SPI_MISO
4 3 6
GND1 D6 LDAT0_6 SPI_CLK SCK SW7
6 5 1 NOTE: SHUTTING OFF DIP SWITCHES SW1, SW2, SW3 1 8

ON
TDO_OUT MSC2 D5 LDAT0_5 SPI_CS CS DAI_P17 LED8

1
8 7 3 SW7, OR SW14 ALLOWS A USER TO USE THESE DAI OR 2 7
GND2 D4 LDAT0_4 WP DAI_P18 SPDIF_IN

2
10 9 7 DPI PINS VIA THE EXPANSION II INTERFACE. 3 6
TMS_LINKPORT MSC3 D3 LDAT0_3 HOLD DAI_P19 PB3

3
12 11 GND 4 5
EMU_LINKPORT MSC4 D2 LDAT0_2 DAI_P20 PB4

4
M25P16 4 3.3V
14 13 SO8W DIP4
TRST_LINKPORT MSC5 D1 LDAT0_1 SWT018
16 15 R223
DA_SOFT_RESET MSC6 D0 LDAT0_0 10K
18 17 0402
GND3 ACK LACK_0 DNP
20
GND4 CLK
19
LCLK_0 C50
0.01UF
ANALOG 20 Cotton Road
Nashua, NH 03063
LINKPORT_EDGE_M 0402
4 ERM8_10X2_SMT
R466
10K
R465
10K
DEVICES PH: 1-800-ANALOGD 4

0402 0402
Title ADSP-21469 EZ-BOARD
DSP - DAI, DPI, LINK PORT INTERFACES
Size Board No. Rev
C A0221-2008 0.2
Date 3-31-2009_14:34 Sheet 4 of 16

A B C D
 A B C D

VDD_DDR2 VDDINT U1
VDDINT
U1 A1 J11
VSS1 VSS39
C5 D12 A18 J12
VDD_DDR2_1 VDD_INT1 VSS2 VSS40
C12 E6 C4 J14
VDD_DDR2_2 VDD_INT2 VSS3 VSS41
D3 E8 C6 J17
VDD_DDR2_3 VDD_INT3 VSS4 VSS42 C87 C86 C71 C70 C69 C68 C67 C66 C65 C72 C102
D6 E9 C8 K5 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF
VDD_DDR2_4 VDD_INT4 VSS5 VSS43 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
D8 E14 D5 K7
VDD_DDR2_5 VDD_INT5 VSS6 VSS44
D18 E15 D7 K8
VDD_DDR2_6 VDD_INT6 VSS7 VSS45
E2 F6 D9 K9
VDD_DDR2_7 VDD_INT7 VSS8 VSS46
1 E4 F7 D10 K10
1
VDD_DDR2_8 VDD_INT8 VSS9 VSS47
E7 F8 D17 K11
VDD_DDR2_9 VDD_INT9 VSS10 VSS48
E10 F9 E3 K12
VDD_DDR2_10 VDD_INT10 VSS11 VSS49
E11 F10 E5 L7
VDD_DDR2_11 VDD_INT11 VSS12 VSS50
E17 F11 E12 L8
VDD_DDR2_12 VDD_INT12 VSS13 VSS51
F3 F12 E13 L9
VDD_DDR2_13 VDD_INT13 VSS14 VSS52 VDDINT
F5 F13 E16 L10
VDD_DDR2_14 VDD_INT14 VSS15 VSS53
F15 G6 F2 L11
VDD_DDR2_15 VDD_INT15 VSS16 VSS54
G14 G13 F4 L12
VDD_DDR2_16 VDD_INT16 VSS17 VSS55
VDDEXT G16 H5 F14 L14
VDD_DDR2_17 VDD_INT17 VSS18 VSS56 C64 C63 C62 C61 C60 C59 C58 C91 C57 C73 C56
H6 F16 M5 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF
H15 VDD_INT18 VSS19 VSS57 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
VDD_EXT1 H13 G7 M7
H18 VDD_INT19 VSS20 VSS58
VDD_EXT2 H14 G8 M8
J5 VDD_INT20 VSS21 VSS59
VDD_EXT3 J6 G9 M9
J15 VDD_INT21 VSS22 VSS60
VDD_EXT4 J13 G10 M10
K14 VDD_INT22 VSS23 VSS61
VDD_EXT5 K6 G11 M11
L5 VDD_INT23 VSS24 VSS62
VDD_EXT6 K13 G12 M12
M14 VDD_INT24 VSS25 VSS63
VDD_EXT7 L6 G15 N14
M18 VDD_INT25 VSS26 VSS64
VDD_EXT8 L13 H4 N17
N5 VDD_INT26 VSS27 VSS65
VDD_EXT9 M6 H7 P5 VDDINT
P6 VDD_INT27 VSS28 VSS66
VDD_EXT10 M13 H8 P7 VDDINT
2 P8 VDD_INT28 VSS29 VSS67 2
VDD_EXT11 N6 H9 P9
P10 VDD_INT29 VSS30 VSS68
VDD_EXT12 N7 H10 P11
P12 VDD_INT30 VSS31 VSS69
VDD_EXT13 N8 H11 P13
P14 VDD_INT31 VSS32 VSS70 C97 C98
VDD_EXT14 N9 H12 V1 C88 C55 C54 C96 C90 C89 C94 C95 C93 C92 10UF 10UF
P15 VDD_INT32 VDDEXT VSS33 VSS71 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0805 0805
VDD_EXT15 N13 J1 V18 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
V8 VDD_INT33 VSS34 VSS72
VDD_EXT16 J7 F1
U8 N10 VSS35 VSS73
VDD_EXT17 VDD_THD J8 G3
T8 VSS36 VSS74
VDD_EXT18 J9 G4
V9 C116 VSS37 VSS75
VDDINT VDD_EXT19 0.01UF J10 G5
U9 0402 VSS38 VSS76
VDD_EXT20 R9
FER5 T9 VSS77
600 VDD_EXT21
0603 ADSP-21469
H1 PBGA324
VDD_A
H2
VSS_A
C53 C52 C51
0.1UF 0.01UF 1000PF
0402 0402 0402 ADSP-21469
PBGA324

VDDEXT
3 VDDEXT VDDEXT 3

C79 C78 C77 C76 C75 C85 C74

0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF C99 C84 C83 C82 C81 C80 C100 C101
0402 0402 0402 0402 0402 0402 0402 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 10UF 10UF
0402 0402 0402 0402 0402 0402 0805 0805

VDD_DDR2

VDD_DDR2

C104 C103
C113 C114 C115 C105 C111 C112 C107 C106 C108 C109 C110 10UF 10UF
0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0805 0805
0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
ANALOG 20 Cotton Road
Nashua, NH 03063
4 DEVICES PH: 1-800-ANALOGD 4

Title ADSP-21469 EZ-BOARD

DSP - POWER
Size Board No. Rev
C A0221-2008 0.2
Date 3-19-2009_12:57 Sheet 5 of 16

A B C D
 A B C D

3.3V

3.3V

J7
R232
15.0K SERIAL PORT
0603
CON012 C126
SPDIF 0.22UF
0805 3.3V
COAX 2 SPDIF_COAX_IN C121
0.01UF
1 INPUT 0402 1
1 R229 U44
75.0 C119
C127 0603 R230 0.1UF U42
0.22UF 1 8 22 0402 C118
0805 RIN- VCC 0402 1 0.1UF J2
2 7 C1+ 0402
RIN+ ROUT SPDIF_IN 3
3 6 C1- 2 1
NC1 NC3 V+
R231 4 5 ADM3202 4 6 6
10.0K NC2 GND C117 C2+ V-
0603 0.1UF 5 2
LOOPBACK HEADER 0402 C2-
SN65LVDS2D 7
SOIC8 FOR TESTING PURPOSES ONLY
11 14 TX_OUT 3
JP2 DEFAULT: OFF UART_TX T1IN T1OUT
JP2 10 7 8
1 UART_CTS T2IN T2OUT
SPDIF_COAX_IN 12 13 RX_IN 4
2 UART_RX R1OUT R1IN
SPDIF_COAX_OUT 9 8 9
IDC2X1 3.3V 3.3V 3.3V UART_RTS R2OUT R2IN
ADM3202ARNZ 5
SOIC16 C120
0.1UF
0402 CON038
JP3
1
J6
C125 C122 C124 2
C123 R227 CON012 0.01UF 0.01UF 0.01UF
0.1UF 249.0 0402 0402 0402 IDC2X1
1
U48
0805 0805 SPDIF DNP JP4
SPDIF_OUT 4 SPDIF_COAX_OUT 2 JP3 DEFAULT: ON 1
2 COAX RX_IN
2
SN74LVC1G08
SOT23-5
OUT TX_OUT
1 IDC2X1
R228
2 1
U47
107.0 LOOPBACK HEADER 2
4 0805 65LVDS2D SN74LVC1G08 SN74LVC1G08
2 FOR TESTING PURPOSES ONLY
SN74LVC1G08 JP4 DEFAULT: OFF
SOT23-5
DNP

SINGLE PROCESSOR JTAG SETTINGS

VIA HP-USB EMUALTOR OR DEBUG AGENT (DEFAULT)
BOARD ATTACHED All USB interface circuitry is considered proprietary and has
SWITCH TO EMULATOR been omitted from this schematic.
SW19.1 ON
When designing your JTAG interface please refer to the
SW19.2 OFF 3.3V 3.3V
Engineer to Engineer Note EE-68 which can be found at
SW19.3 ON
http://www.analog.com
SW19.4 OFF
JTAG SWITCHES
SW19.5 ON
SW19.6 OFF SW19
1 16 R99 R190
ON

SW19.7 ON TRST TRST_LOCAL

1

10K 10K
2 15 0402 0402 "JTAG"
SW19.8 OFF TRST_LINKPORT
2

3 14
EMU EMU_LOCAL
3

SW20.1 ON 4 13 P1
EMU_LINKPORT
4

1 2
SW20.2 OFF 5 12 EMU_LOCAL
TMS TMS_LOCAL
5

3 4
3 6 11 3
SW21.1 ON TMS_LINKPORT
6

5 6
7 10 TMS_LOCAL
SW21.2 OFF TCK TCK_LOCAL
7

7 8
8 9 TCK_LOCAL 5V 3.3V
TCK_LINKPORT
8

9 10
SW22.1 OFF DIP8 TRST_LOCAL
SWT016 11 12
SW22.2 OFF TDI_LOCAL
13 14
TDO_LOCAL
IDC7X2_SMTA
SW20
MULTI PROCESSOR JTAG SETTINGS VIA HP-USB EMUALTOR 1 4 DA_PWR VDD_EXT_DSP
ON

TDI TDI_LOCAL
1

USING TWO OR MORE EZ-BOARDS (LINK PORT CABLES 2 3

DA_SOFT_RESET DA_SOFT_RESET_LINKPORT
2

REQUIRED FOR MORE THAN TWO BOARDS) DIP2 RESET RESET

SWT020 R185
BOARD ATTACHED BOARD(S) NOT ATTACHED DA_SOFT_RESET DA_SOFT_RESET

GND
4.7K
0402
SWITCH TO EMULATOR TO EMULATOR DA_STANDALONE
SW19.1 ON OFF SW21
1 4
ON

SW19.2 ON ON TDO TDO_LOCAL

1

2 3
SW19.3 ON OFF TDO_OUT
2

DIP2
SW19.4 ON ON SWT020
SW19.5 ON OFF
SW22
SW19.6 ON ON 1 4
ON

TDI TDO_IN
1

SW19.7 ON OFF 2 3
TDO_LOCAL TDO_IN
2

SW19.8 ON ON DIP2
SWT020 ANALOG 20 Cotton Road
Nashua, NH 03063
SW20.1 ON OFF
4 SW20.2 OFF OFF DEVICES PH: 1-800-ANALOGD 4

SW21.1 OFF OFF

SW21.2 ON ON
Title ADSP-21469 EZ-BOARD
SW22.1 OFF ON
SPDIF, RS-232, JTAG INTERFACES
SW22.2 ON OFF Size Board No. Rev
C A0221-2008 0.2
Date 4-1-2009_17:04 Sheet 6 of 16

A B C D
 A B C D

3.3V

DSP PIN CONNECTED

COMPONENT CONNECTED TO VIA SWITCH
R233 PB1 FLAG1/IRQ1 SW13.4
10K
0402 PB2 FLAG2/IRQ2/MS2 SW13.5
LABEL "PB1" R240 R244 PB3 DAI_P19 SW7.3
100 10
0402
U14
0603 PB4 DAI_P20 SW7.4
1 2
PB1
1 SW8 LED1 DPI_P6 SW3.6 1
74LVC14A
MOMENTARY
SOIC14 LED2 DPI_P13 SW14.5
SWT013
C132
1UF LED3 DPI_P14 SW14.6
0402
LED4 DAI_P3 SW1.3
LED5 DAI_P4 SW1.4
LED6 DAI_P15 SW2.7
LED7 DAI_P16 SW2.8
LED8 DAI_P17 SW7.1
R234
10K
0402

LABEL "PB2" R241 R245

100 10
U14
0402 0603
3 4 3.3V 3.3V
PB2
SW9
74LVC14A
MOMENTARY
SOIC14
SWT013
C133
1UF
0402

RESET
LED10 LED11
RED YELLOW
LED001 LED001

R469 R256 R239

10K 10K 10K
0402 0402 0402
R235
10K R255 R497
2 0402 RESET 330 330 2
0603 0603
LABEL "PB3" R242 R246
100 10 U46
U14
0402 0603
5 6 SW12 1 8
PB3 MOMENTARY MR RESET
U49
SW10 SWT013 1 4 7
74LVC14A PFI RESET RESET TEMP_THERM
MOMENTARY 4
SOIC14
SWT013 2 5
C134 DA_SOFT_RESET PFO
SN74LVC1G08
1UF
SOT23-5
0402 ADM708SARZ
SOIC8

R236
10K
0402 U17
LABEL "PB4" R243 R247
100 10 2 18
U14 LED1 1A1 1Y1
0402 0603
9 8 4 16
PB4 LED2 1A2 1Y2
SW11 6 14
74LVC14A LED3 1A3 1Y3
MOMENTARY
SOIC14
SWT013 8 12
C135 LED4 1A4 1Y4
1UF
0402 11 9
LED5 2A1 2Y1
13 7 3.3V
LED6 2A2 2Y2
15 5
3 LED7 2A3 2Y3 3
17 3
LED8 2A4 2Y4
3.3V
1
OE1
19 POWER
OE2 LED8 LED7 LED6 LED5 LED4 LED3 LED2 LED1 LED9
YELLOW YELLOW YELLOW YELLOW YELLOW YELLOW YELLOW YELLOW GREEN
IDT74FCT3244APY LED001 LED001 LED001 LED001 LED001 LED001 LED001 LED001 LED001
SSOP20

R237 R238
10K 10K
0402 0402
R467 R468 R248 R249 R250 R251 R252 R253 R254
330 330 330 330 330 330 330 330 330
U14 U14
0603 0603 0603 0603 0603 0603 0603 0603 0603
11 10 13 12

74LVC14A 74LVC14A
SOIC14 SOIC14

3.3V

C131
0.01UF
0402
C129
0.01UF
0402
C130
0.01UF
0402
C128
0.01UF
0402
ANALOG 20 Cotton Road
Nashua, NH 03063
4 DEVICES PH: 1-800-ANALOGD 4

Title ADSP-21469 EZ-BOARD

RESET CIRCUIT, PUSHBUTTONS, LEDS
Size Board No. Rev
74LVC14A ADM708 IDT74FCT3244 SN74LVC1G08
C A0221-2008 0.2
Date 3-31-2009_14:34 Sheet 7 of 16

A B C D
 A B C D

J4 J5
DB25 Female Connectors for Conversion to XLR Connectors
WHITE (LEFT) RED (RIGHT) WHITE (LEFT) RED (RIGHT)

3.3V A3V OUT3 (L) OUT3 (R) OUT4 (L) OUT4 (R)
P8
P9
9 10 9 10
1
1
OUT8P
14
14
OUT1 (L) OUT1 (R) OUT2 (L) OUT2 (R) OUT8N

17

32

45

51

62
U45 2

5
DVDD1

DVDD2

AVDD1

AVDD2

AVDD3

AVDD4
2
15
15
28 54 4 6 4 6 3
OUT7P
ABCLK_Z ABCLK ADC1LN ADC1LN
1 29 53 OUT7N
3 1
16
ALRCLK_Z ALRCLK ADC1LP ADC1LP
16
27 56 IN1 (L) IN1 (R) IN2 (L) IN2 (R) 4
ASDATA1_Z ASDATA1 ADC1RN ADC2LN
4
26 55 OUT6P
17
ASDATA2_Z ASDATA2 ADC1RP ADC2LP
17
58 3 5 3 5 5
OUT6N
ADC2LN ADC3LN
5
21 57 18
DBCLK DBCLK ADC2LP ADC3LP
18
22 60 NOTE: THE NUMBER INSIDE EACH OF THE CIRCLES IS THE ACTUAL 6
OUT5P
DLRCLK DLRCLK ADC2RN ADC4LN
6
20 59 PIN NUMBER FOR THE RESPECTIVE CONNECTOR. 19
OUT5N
DSDATA1 DSDATA1 ADC2RP ADC4LP
19
19 7
DSDATA2 DSDATA2 37 IN4P
7
18 OL1N DAC1N OUT4P
20
DSDATA3 DSDATA3 36 IN4N
20
15 OL1P DAC1P OUT4N
8
DSDATA4 DSDATA4 39 8
OR1N DAC2N
21
38 A3V IN3P
21
34 OR1P DAC2P OUT3P
9
SPI_CLK CCLK 41 IN3N
9
30 OL2N DAC3N OUT3N
22
SPI_MOSI CIN 40 22
31 OL2P DAC3P
10
SPI_MISO COUT 43 IN2P
10
35 OR2N DAC4N OUT2P
23
AD1939_CS CLATCH 42 IN2N
23
OR2P DAC4P OUT2N
11
7 R461 11
AD1939_CLKIN 2 OL3N DAC5N 562.0 24
MCLKI_XI 6 0603 IN1P
TP9 24
3 OL3P DAC5P OUT1P
12
MCLKO_XO 9 C258 IN1N
12
OR3N DAC6N 390PF OUT1N
U50 25
1 8 0603 25
RESET 4 14 OR3P DAC6P
13 DB25F
2 RESET 11 C259 13 DB25F
AD1939_SOFT_RESET OL4N DAC7N 5600PF
2 SN74LVC1G08
49 10 0805 2
SOT23-5 NC1 OL4P DAC7P

27
26
3.3V

27
26
50 13
NC2 OR4N DAC8N
63 12
NC3 OR4P DAC8P
64
NC4 61 AD1939_LF
LF
C266 23 52 AD1939_CM
0.01UF VSUPPLY CM
0402 24 47
VSENSE FILTR
DGND1

DGND2

AGND5
AGND1

AGND2

AGND3

AGND4

25
VDRIVE C257 C256 C254 C255
10UF 0.1UF 10UF 0.1UF
16

33

44

46

48

AD1939 0805 0603 0805 0603

LQFP64

C262
22PF
0805

R486 HEADPHONE OUT (SHARED WITH OUT3/DAC5&6)

10.0K
0402
3.3V 3.3V R262 R496
CT59
33 33 R488
6 10UF
0402 0402 10.0K
CAP002 CT58
0402 R485
ABCLK_Z ABCLK ASDATA1_Z ASDATA1 U51 47UF
1 6 0
R493 ELEC_6MM
0402
R257 R495 5K 7
33 33 RES_POT_DUAL J8
0402 0402 2 R489 5 1
R259 R494 100.0
DBCLK ASDATA2_Z ASDATA2 AD8397
10K 10K 0402 5
0402 0402 SW23: HEAD PHONE ENABLE SOIC_N8_EP
3 R263 AD1939_VREF 4 3
33 DEFAULT: ALL OFF
0402 3
SW23
ALRCLK_Z ALRCLK CT57
1 4 C263 R492 2
ON

AD1939_CS OUT3_SE_L 47UF

1

22PF 0
ELEC_6MM
R258 2 3 0805 0402 CON001
OUT3_SE_R
2

33
AD1939_SOFT_RESET 0402 DIP2
SWT020
DLRCLK R487
10.0K
3.3V NOTE: A USER NEEDS TO TURN SWITCH SW23 0402 R484 R483
100K 100K
ON IN ORDER TO USE THE HEAD PHONE CONNECTOR. CT60
R491 0402 0402
5 10UF
10.0K
CAP002
0402
U51
4 2
3.3V R493
5K 1
RES_POT_DUAL
R260 3 R490 3
10K AD1939 OSC 100.0
AD8397
0402 0402
LOOPBACK CONNECTOR AD1939_VREF
SOIC_N8_EP
R261
U12 4 33 FOR TESTING PURPOSES ONLY
VDD 0402
1
OE OUT
3
AD1939_CLKIN
A3V DEFAULT: ALL OFF
3.3V
GND SW24 5V 5V
2
12.288MHZ 1 8 AD1939_VREF
ON

IN1_SE_L OUT1_SE_L
1

OSC003 3.3V
2 7
IN1_SE_R OUT1_SE_R
2

3 6
OUT3_SE_L
3

4 5
OUT3_SE_R ANALOG 20 Cotton Road
4

C136 C137 C138 C139 C140 C141 C271 C264 C265

0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF DIP4 0.1UF 0.1UF 10UF Nashua, NH 03063
C142 0402 0402 0402 0402 0402 0402 SWT018 0402 0402 0805
4 0.01UF
0402
1
SW25
8
DEVICES PH: 1-800-ANALOGD 4
ON

IN2_SE_L OUT2_SE_L
1

IN2_SE_R
2 7
OUT2_SE_R Title ADSP-21469 EZ-BOARD
2

3 6
OUT4_SE_L
AUDIO PAGE 1
3

4 5
OUT4_SE_R
4

AD1939 OSC DIP4 Size Board No. Rev

SWT018
C A0221-2008 0.2
Date 3-31-2009_14:45 Sheet 8 of 16

A B C D
 A B C D

IN1
C143
300PF
0603

Bottom Left (White)

CT1
J4 R266 R264
22UF
5.76K 4.99K
ELEC_4MM
1 CON_RCA_6B 0603 0603 1
3 IN1_SE_L

R265
U20
1 49.9K 2
0603
1
ADC1_DIFF-
SW15 3
1 12

ON
AD8652ARZ

1
SOIC_N8 CT62
2 11 R267
22UF

2
237.0
ELEC_4MM
3 10 0603
IN1_R

3
4 9 ADC1LN
IN1_C

4
5V
5 8
IN1P ADC1_DIFF-

5
6 7 C144

6
1000PF
DIP6 0402
SWT017 IN1_R IN1_C
R268 C145 C147
37.4K 300PF 100PF
0402 0603 0402 R286
806
0402

CT63 AD1939_VREF
R269 R273 R272
22UF
5.76K 4.99K 237.0
ELEC_4MM
0603 0603 0603
R287 C161
ADC1LP 1.0K 10UF CT61
0402 0805 100UF
CT3
C
22UF
ELEC_4MM
C150
2 6
U20
1000PF 2
IN1N R274 5V 0402
100.0 7
0402
5
R271 AD1939_VREF
AD8652ARZ
49.9K
SOIC_N8
0603
C148
0.1UF C151
0402 0.1UF
0402

C157 IN1 (LEFT) SETTINGS

300PF
0603 SINGLE ENDED USE DIFFERENTIAL USE
Bottom Right (Red) SWITCH RCA IN (DEFAULT) DB25 IN (P8)
J4
CT5
R281 R279 SW15.1 ON OFF
22UF
5.76K 4.99K
CON_RCA_6B
ELEC_4MM
0603 0603 SW15.2 OFF ON
5 IN1_SE_R SW15.3 ON OFF
SW15.4 OFF ON
R282
2 49.9K 2
U21 SW15.5 ON OFF
0603
1 SW15.6 OFF ON
ADC2_DIFF-
SW16 3 NOTE: DIFFERENTIAL USE REQUIRES A DB25 TO XLR CABLE.
1 12
ON

AD8652ARZ
1

SOIC_N8 CT65
2 11 R280
3 22UF IN1 (RIGHT) SETTINGS 3
2

237.0
ELEC_4MM
3 10 0603
IN2_R SINGLE ENDED USE DIFFERENTIAL USE
3

4 9 ADC2LN
IN2_C SWITCH RCA IN (DEFAULT) DB25 IN (P8)
4

5 8
IN2P ADC2_DIFF- SW16.1 ON OFF
5

6 7 C154
SW16.2 OFF ON
6

1000PF
DIP6 0402
SWT017 IN2_R IN2_C SW16.3 ON OFF
R276 C153 C155
37.4K 300PF 100PF SW16.4 OFF ON
0402 0603 0402
SW16.5 ON OFF
SW16.6 OFF ON
NOTE: DIFFERENTIAL USE REQUIRES A DB25 TO XLR CABLE.
CT64
R277 R278 R285
22UF
5.76K 4.99K 237.0
ELEC_4MM
0603 0603 0603
ADC2LP
CT6
22UF
ELEC_4MM
C159
U21
6 1000PF
IN2N R275 5V 0402
100.0 7
0402
5
R284 AD1939_VREF
AD8652ARZ
49.9K
SOIC_N8
0603
C152
0.1UF
0402
C160
0.1UF
0402
ANALOG 20 Cotton Road
Nashua, NH 03063
4 DEVICES PH: 1-800-ANALOGD 4

Title ADSP-21469 EZ-BOARD

AUDIO PAGE 2
Size Board No. Rev
C A0221-2008 0.2
Date 3-31-2009_14:34 Sheet 9 of 16

A B C D
 A B C D

C173
300PF
IN2
0603

Bottom Left (White)

CT11
J5 R303 R305
22UF
5.76K 4.99K
ELEC_4MM
CON_RCA_6B 0603 0603

3 IN2_SE_L
1 1
R302
U22
1 49.9K 2
0603
1
ADC3_DIFF-
SW18 3
1 12

ON
AD8652ARZ

1
SOIC_N8 CT66
2 11 R304
22UF

2
237.0
ELEC_4MM
3 10 0603
IN3_R

3
4 9 ADC3LN
IN3_C

4
5 8
IN3P ADC3_DIFF-

5
6 7 C176

6
1000PF
DIP6 0402
SWT017 IN3_R IN3_C
R308 C177 C175
37.4K 300PF 100PF
0402 0603 0402

CT67
R307 R306 R299
22UF
5.76K 4.99K 237.0
ELEC_4MM
0603 0603 0603
ADC3LP
CT10
22UF
ELEC_4MM
C171 IN2 (LEFT) SETTINGS
U22
6 1000PF
IN3N R309 5V 0402 SINGLE ENDED USE DIFFERENTIAL USE
100.0 7
2 0402 SWITCH RCA IN (DEFAULT) DB25 IN (P8) 2
5
R300 AD1939_VREF SW18.1 ON OFF
AD8652ARZ
49.9K
0603
SOIC_N8 SW18.2 OFF ON
C178
0.1UF C170 SW18.3 ON OFF
0402 0.1UF
0402 SW18.4 OFF ON
SW18.5 ON OFF
SW18.6 OFF ON
NOTE: DIFFERENTIAL USE REQUIRES A DB25 TO XLR CABLE.
C179
300PF
0603 IN2 (RIGHT) SETTINGS
Bottom Right (Red) SINGLE ENDED USE DIFFERENTIAL USE
J5
CT8
R294 R292 SWITCH RCA IN (DEFAULT) DB25 IN (P8)
22UF
5.76K 4.99K
CON_RCA_6B
ELEC_4MM
0603 0603 SW17.1 ON OFF
5 IN2_SE_R SW17.2 OFF ON
SW17.3 ON OFF
R295
2 49.9K 2
U23 SW17.4 OFF ON
0603
1 SW17.5 ON OFF
ADC4_DIFF-
SW17 3 SW17.6 OFF ON
1 12
ON

AD8652ARZ NOTE: DIFFERENTIAL USE REQUIRES A DB25 TO XLR CABLE.

1

SOIC_N8 CT68
2 11 R293
22UF
2

237.0
ELEC_4MM
3 10 0603
IN4_R
3

3 4 9 ADC4LN 3
IN4_C
4

5 8
IN4P ADC4_DIFF-
5

6 7 C164
6

1000PF
DIP6 0402
SWT017 IN4_R IN4_C
R289 C163 C165
37.4K 300PF 100PF
0402 0603 0402

CT69
R290 R291 R298
22UF
5.76K 4.99K 237.0
ELEC_4MM
0603 0603 0603
ADC4LP
CT9
22UF
ELEC_4MM
C168
U23
6 1000PF
IN4N R288 5V 0402
100.0 7
0402
5
R297 AD1939_VREF
AD8652ARZ
49.9K
SOIC_N8
0603
C162
0.1UF C169
0402 0.1UF
0402

ANALOG 20 Cotton Road

Nashua, NH 03063
4 DEVICES PH: 1-800-ANALOGD 4

Title ADSP-21469 EZ-BOARD

AUDIO PAGE 3
Size Board No. Rev
C A0221-2008 0.2
Date 3-31-2009_14:34 Sheet 10 of 16

A B C D
 A B C D

C193

OUT1
680PF
0402

R325 R338
2.43K 2.67K
CT19
0402 0402 R340
U24 22UF
5 100.0
DAC1P ELEC_4MM
0402
7
OUT1P
6
AD8652ARZ
R341
SOIC_N8
750.0
0402 R343
49.9K
1 0603 1
R312 5V 5V 5V
6.81K
0603

C192 R313
620PF 4.99K
0402 0603 C188 C189 C191
0.1UF 0.1UF 0.1UF
0402 0402 0402
AD1939_VREF
MIddle Left (White)
R311
C184 4.99K J4
CT49
22UF 0603 R335
U25 22UF
ELEC_5MM 3 100.0 CON_RCA_6B
ELEC_4MM
0402
1 OUT1_SE_L 4

2
AD8652ARZ
C181 R314 R475 1
SOIC_N8
620PF 4.99K 100K
0402 0603 0402
R342
4.99K
0603

R339
6.81K
R317 0603
750.0
0402
CT18
R331
2 2
U24
100.0
22UF AD1939_VREF 2
ELEC_4MM
R315 R316 0402
2.43K 2.67K 1
0402 0402 OUT1N
3
DAC1N
AD8652ARZ
C267
SOIC_N8
0.1UF
C182 R310 0402
680PF 49.9K
0402 0603

C183
680PF
0402

R319 R318
2.43K 2.67K
CT14
0402 0402 R332
U26 22UF
5 100.0
DAC2P ELEC_4MM
0402
7
OUT2P
6
AD8652ARZ
R320
SOIC_N8
750.0
0402 R336
49.9K
0603
R329
6.81K
0603

C186 R324
3 620PF 4.99K 3
0402 0603

AD1939_VREF
Middle Right (Red)
R328
C180 4.99K J4
CT50
22UF 0603 R334
U25 22UF
ELEC_5MM 5 100.0 CON_RCA_6B
ELEC_4MM
0402
7 OUT1_SE_R 6

6
AD8652ARZ
C187 R326 R476 2
SOIC_N8
620PF 4.99K 100K
0402 0603 0402
R327
4.99K
0603

R330
6.81K
R321 0603
750.0
0402
CT16
R333
U26 22UF
2 100.0
ELEC_4MM
R323 R322 0402
2.43K 2.67K 1

DAC2N
0402 0402
3
AD8652ARZ
OUT2N
ANALOG 20 Cotton Road
Nashua, NH 03063
4 SOIC_N8
C185
680PF
R337
49.9K
DEVICES PH: 1-800-ANALOGD 4

0402 0603
Title ADSP-21469 EZ-BOARD
AUDIO PAGE 4
Size Board No. Rev
C A0221-2008 0.2
Date 3-19-2009_12:57 Sheet 11 of 16

A B C D
 A B C D

C206
680PF
0402

DAC3P
R374
2.43K
0402
R373
2.67K
0402
5
U28

7
R361
100.0
0402
CT24
22UF
ELEC_4MM

OUT3P
OUT2
6
AD8652ARZ
R372
SOIC_N8
750.0
0402 R369
49.9K
0603
R370 5V 5V 5V
6.81K
1 0603 1

C204 R371
620PF 4.99K
0402 0603 C200 C199 C197
0.1UF 0.1UF 0.1UF
0402 0402 0402
AD1939_VREF
MIddle Left (White)
R352
C205 4.99K J5
CT51
22UF 0603 R351
U29 22UF
ELEC_5MM 3 100.0 CON_RCA_6B
ELEC_4MM
0402
1 OUT2_SE_L 4

2
AD8652ARZ
C194 R349 R477 1
SOIC_N8
620PF 4.99K 100K
0402 0603 0402
R357
4.99K
0603

R355
6.81K
R345 0603
750.0
0402
CT23
R358
U28 22UF
2 100.0
ELEC_4MM AD1939_VREF
R375 R377 0402
2.43K 2.67K 1
2 0402 0402 OUT3N 2
3
DAC3N
AD8652ARZ
SOIC_N8
C268
C207 R363 0.1UF
680PF 49.9K 0402
0402 0603

C203
680PF
0402

R346 R368
2.43K 2.67K
CT27
0402 0402 R360
U30 22UF
5 100.0
DAC4P ELEC_4MM
0402
7
OUT4P
6
AD8652ARZ
R376
SOIC_N8
750.0
0402 R364
49.9K
0603
R356
6.81K
0603

C195 R350
620PF 4.99K
0402 0603
3 3
AD1939_VREF
Middle Right (Red)
R353
C196 4.99K J5
CT52
22UF 0603 R362
U29 22UF
ELEC_5MM 5 100.0 CON_RCA_6B
ELEC_4MM
0402
7 OUT2_SE_R 6

6
AD8652ARZ
C201 R366 R478 2
SOIC_N8
620PF 4.99K 100K
0402 0603 0402
R354
4.99K
0603

R365
6.81K
R348 0603
750.0
0402
CT28
R359
U30 22UF
2 100.0
ELEC_4MM
R347 R367 0402
2.43K 2.67K 1
0402 0402 OUT4N
3
DAC4N
AD8652ARZ
SOIC_N8
C202 R344
ANALOG 20 Cotton Road
Nashua, NH 03063
680PF 49.9K
4 0402 0603
DEVICES PH: 1-800-ANALOGD 4

Title ADSP-21469 EZ-BOARD

AUDIO PAGE 5
Size Board No. Rev
C A0221-2008 0.2
Date 3-19-2009_12:57 Sheet 12 of 16

A B C D
 A B C D

C220
680PF

OUT3
0402

R408 R407
2.43K 2.67K
CT32
0402 0402 R395
U32 22UF
5 100.0
DAC5P ELEC_4MM
0402
7
OUT5P
6
AD8652ARZ
R406
SOIC_N8
750.0
0402 R403
49.9K
1 0603 1
R404 5V 5V 5V
6.81K
0603

C218 R405
620PF 4.99K
0402 0603 C214 C213 C211
0.1UF 0.1UF 0.1UF
0402 0402 0402
AD1939_VREF
Top Left (White)
R386
C219 4.99K J4
CT53
22UF 0603 R385
U33 22UF
ELEC_5MM 3 100.0 CON_RCA_6B
ELEC_4MM
0402
1 OUT3_SE_L 9

2
AD8652ARZ
C208 R383 R479 7
SOIC_N8
620PF 4.99K 100K
0402 0603 0402
R391
4.99K
0603

R389
6.81K
R379 0603
750.0
0402
CT31 AD1939_VREF
R392
2 2
U32
100.0
22UF 2
ELEC_4MM
R409 R411 0402
2.43K 2.67K 1
0402 0402 OUT5N
3
DAC5N C269
AD8652ARZ
0.1UF
SOIC_N8
0402
C221 R397
680PF 49.9K
0402 0603

C217
680PF
0402

R380 R402
2.43K 2.67K
CT35
0402 0402 R394
U34 22UF
5 100.0
DAC6P ELEC_4MM
0402
7
OUT6P
6
AD8652ARZ
R410
SOIC_N8
750.0
0402 R398
49.9K
0603
R390
6.81K
0603

C209 R384
3 620PF 4.99K 3
0402 0603

AD1939_VREF
Top Right (Red)
R387
C210 4.99K J4
CT54
22UF 0603 R396
U33 22UF
ELEC_5MM 5 100.0 CON_RCA_6B
ELEC_4MM
0402
7 OUT3_SE_R 10

6
AD8652ARZ
C215 R400 R480 8
SOIC_N8
620PF 4.99K 100K
0402 0603 0402
R388
4.99K
0603

R399
6.81K
R382 0603
750.0
0402
CT36
R393
U34 22UF
2 100.0
ELEC_4MM
R381 R401 0402
2.43K 2.67K 1

DAC6N
0402 0402
3
AD8652ARZ
OUT6N
ANALOG 20 Cotton Road
Nashua, NH 03063
4 SOIC_N8
C216
680PF
R378
49.9K
DEVICES PH: 1-800-ANALOGD 4

0402 0603
Title ADSP-21469 EZ-BOARD
AUDIO PAGE 6
Size Board No. Rev
C A0221-2008 0.2
Date 3-19-2009_12:57 Sheet 13 of 16

A B C D
 A B C D

C234
680PF
0402

DAC7P
R442
2.43K
0402
R441
2.67K
0402
5
U36

7
R429
100.0
0402
CT40
22UF
ELEC_4MM

OUT7P
OUT4
6
AD8652ARZ
R440
SOIC_N8
750.0
0402 R437
49.9K
0603
R438 5V 5V 5V
1 6.81K 1
0603

C232 R439
620PF 4.99K
0402 0603 C228 C227 C225
0.1UF 0.1UF 0.1UF
0402 0402 0402
AD1939_VREF
Top Left (White)
R420
C233 4.99K J5
CT55
22UF 0603 R419
U37 22UF
ELEC_5MM 3 100.0 CON_RCA_6B
ELEC_4MM
0402
1 OUT4_SE_L 9

2
AD8652ARZ
C222 R417 R481 7
SOIC_N8
620PF 4.99K 100K
0402 0603 0402
R425
4.99K
0603

R423
6.81K
R413 0603
750.0
0402
CT39
R426
U36 22UF
2 100.0
ELEC_4MM
R443 R445 0402
2 2.43K 2.67K 1 AD1939_VREF 2
0402 0402 OUT7N
3
DAC7N
AD8652ARZ
SOIC_N8
C235 R431 C270
680PF 49.9K 0.1UF
0402 0603 0402

C231
680PF
0402

R414 R436
2.43K 2.67K
CT43
0402 0402 R428
U38 22UF
5 100.0
DAC8P ELEC_4MM
0402
7
OUT8P
6
AD8652ARZ
R444
SOIC_N8
750.0
0402 R432
49.9K
0603
R424
6.81K
0603

C223 R418
620PF 4.99K
0402 0603
3 3
AD1939_VREF
Top Right (Red)
R421
C224 4.99K J5
CT56
22UF 0603 R430
U37 22UF
ELEC_5MM 5 100.0 CON_RCA_6B
ELEC_4MM
0402
7 OUT4_SE_R 10

6
AD8652ARZ
C229 R434 R482 8
SOIC_N8
620PF 4.99K 100K
0402 0603 0402
R422
4.99K
0603

R433
6.81K
R416 0603
750.0
0402
CT44
R427
U38 22UF
2 100.0
ELEC_4MM
R415 R435 0402
2.43K 2.67K 1
0402 0402 OUT8N
3
DAC8N
AD8652ARZ
SOIC_N8 ANALOG 20 Cotton Road
Nashua, NH 03063
C230 R412
4 680PF
0402
49.9K
0603 DEVICES PH: 1-800-ANALOGD 4

Title ADSP-21469 EZ-BOARD

AUDIO PAGE 7
Size Board No. Rev
C A0221-2008 0.2
Date 3-19-2009_12:57 Sheet 14 of 16

A B C D
 A B C D

5V 3.3V

P2
1 2 P5
GND1 PWR_IN1
3 4 J1 P6 A1 B1
GND2 PWR_IN2 2 1 DATA3 D0 GND9
5 6 ADDR1 ADDR1 ADDR0 ADDR0 A1 B1 A2 B2
GND3 VDDIO1 4 3 ADDR3 D0 GND9 DATA1 D1 D2 DPI_P10
7 8 ADDR3 ADDR3 ADDR2 ADDR2 A2 B2 A3 B3
GND4 VDDIO2 6 5 ADDR7 D1 D2 ADDR13 GND0 D3 DPI_P9
9 10 ADDR5 ADDR5 ADDR4 ADDR4 A3 B3 A4 B4
GND5 3.3V1 8 7 GND0 D3 ADDR9 DATA5 D4 GND10
11 12 ADDR7 ADDR7 ADDR6 ADDR6 A4 B4 A5 B5
GND6 3.3V2 10 9 ADDR4 D4 GND10 DATA7 D5 D6
13 14 ADDR9 ADDR9 ADDR8 ADDR8 A5 B5 A6 B6
DAI_P1 DAI1 DAI5 DAI_P5 12 11 ADDR17 D5 D6 ADDR12 GND1 D7
15 16 ADDR11 ADDR11 ADDR10 ADDR10 A6 B6 A7 B7
DAI_P2 DAI2 DAI6 DAI_P6 14 13 GND1 D7 ADDR8 RD CLK1+ GND11
1 17 18 ADDR13 ADDR13 ADDR12 ADDR12 A7 B7 A8 B8
1
DAI_P3 DAI3 DAI7 DAI_P7 16 15 DSP_CLKOUT CLK1+ GND11 CLK1- D8 DPI_P13
19 20 ADDR15 ADDR15 ADDR14 ADDR14 A8 B8 A9 B9
DAI_P4 DAI4 DAI8 DAI_P8 18 17 CLK1- D8 ADDR14 GND2 D9 DPI_P14
21 22 ADDR17 ADDR17 ADDR16 ADDR16 A9 B9 A10 B10
DPI_P14 DPI14 DPI13 DPI_P13 20 19 GND2 D9 FLAG3/TIMEXP/MS3 DATA2 D10 GND12
23 24 ADDR19 ADDR19 ADDR18 ADDR18 A10 B10 A11 B11
DPI_P4 DPI4 DPI3 DPI_P3 22 21 ADDR2 D10 GND12 DATA0 D11 D12 DPI_P5
25 26 ADDR21 ADDR21 ADDR20 ADDR20 A11 B11 A12 B12
DPI_P1 DPI1 DPI5 DPI_P5 24 23 ADDR6 D11 D12 MS1 GND3 D13 DPI_P6
27 28 ADDR23 ADDR23 ADDR22 ADDR22 A12 B12 A13 B13
DPI_P2 DPI2 DPI6 DPI_P6 26 25 GND3 D13 ADDR21 DATA6 D14 GND13
29 30 ADDR25 ADDR24 A13 B13 A14 B14
DPI_P8 DPI8 DPI7 DPI_P7 28 27 ADDR1 D14 GND13 DATA4 D15 D16 DPI_P7
31 32 ADDR27 ADDR26 A14 B14 A15 B15
DPI_P9 DPI9 DPI10 DPI_P10 30 29 ADDR5 D15 D16 ADDR22 GND4 D17 DPI_P8
33 34 ADDR29 ADDR28 A15 B15 A16 B16
DPI_P12 DPI12 DPI11 DPI_P11 32 31 GND4 D17 ADDR23 RD D18 GND14
35 36 ADDR31 ADDR30 A16 B16 A17 B17
RESET RESET NC 34 33 ADDR0 D18 GND14 D19 D20 DPI_P1
37 38 WR WR RD RD A17 B17 A18 B18
FLAG0/IRQ0 FLAG0 FLAG1 FLAG1/IRQ1 36 35 ADDR18 D19 D20 FLAG2/IRQ2/MS2 GND5 D21 DPI_P4
39 40 ACK ACK RSVD1 A18 B18 A19 B19
FLAG2/IRQ2/MS2 FLAG2 FLAG3 FLAG3/TIMEXP/MS3 38 37 GND5 D21 MS0 D22 GND15
41 42 MS1 MS1 MS0 MS0 A19 B19 A20 B20
DAI_P9 DAI9 DAI15 DAI_P15 40 39 ADDR20 D22 GND15 D23 CLK2-
43 44 FLAG3/TIMEXP/MS3 MS3 MS2 FLAG2/IRQ2/MS2 A20 B20 A21 B21
DAI_P10 DAI10 DAI16 DAI_P16 42 41 WR D23 CLK2- GND6 CLK2+
45 46 RSVD2 RSVD3 A21 B21 A22 B22
DAI_P11 DAI11 DAI17 DAI_P17 44 43 GND6 CLK2+ WR D24 GND16
47 48 RSVD4 RSVD5 A22 B22 A23 B23
DAI_P12 DAI12 DAI18 DAI_P18 46 45 ACK D24 GND16 D25 D26 DPI_P3
49 50 RSVD6 RSVD7 A23 B23 A24 B24
DAI_P13 DAI13 DAI19 DAI_P19 48 47 ADDR15 D25 D26 ADDR10 GND7 D27 DPI_P2
51 52 RSVD8 RSVD9 A24 B24 A25 B25
DAI_P14 DAI14 DAI20 DAI_P20 50 49 GND7 D27 RD D28 GND17
53 54 DSP_CLKOUT CLKOUT RESET RESET A25 B25 A26 B26
RSVD1 RSVD2 52 51 ADDR11 D28 GND17 WR D29 D30 DPI_P11
55 56 FLAG0/IRQ0 FLAG0 FLAG2 FLAG2/IRQ2/MS2 A26 B26 A27 B27
RSVD3 RSVD4 54 53 ADDR16 D29 D30 RESET GND8 D31 DPI_P12
57 58 FLAG1/IRQ1 FLAG1 FLAG3 FLAG3/TIMEXP/MS3 A27 B27 DMAX_ALT
2 RSVD5 RSVD6 56 55 GND8 D31 ADDR19 DNP 2
59 60 DATA1 DATA1 DATA0 DATA0 DMAX_ALT
RSVD7 RSVD8 58 57 DNP
IDC30X2_SMTA DATA3 DATA3 DATA2 DATA2
60 59
DATA5 DATA5 DATA4 DATA4
62 61
DSP PIN PERIPHERAL NET CONNECTED SWITCH DATA7 DATA7 DATA6 DATA6
64 63
NAME CONNECTED TO VIA SWITCH DEFAULT DATA9 DATA8
66 65 P7
DAI_P1 SPDIF_OUT SW1.1 ON DATA11 DATA10
68 67 A1 B1
DAI_P2 AD1939_SOFT_RESET SW1.2 ON DATA13 DATA12 DAI_P5 D0 GND9
70 69 A2 B2
DAI_P3 LED4 SW1.3 ON DATA15 DATA14 DAI_P1 D1 D2 DAI_P18
72 71 A3 B3
DAI_P4 LED5 SW1.4 ON DATA17 DATA16 GND0 D3 DAI_P20
74 73 A4 B4
DAI_P5 ASDATA1 SW1.5 ON DATA19 DATA18 DAI_P6 D4 GND10
76 75 A5 B5
DAI_P6 ASDATA2 SW1.6 ON DATA21 DATA20 DAI_P3 D5 D6 DAI_P19
78 77 A6 B6
DAI_P7 ABCLK SW1.7 ON DATA23 DATA22 GND1 D7 DAI_P17
80 79 A7 B7
DAI_P8 ALRCLK SW1.8 ON DATA25 DATA24 CLK1+ GND11
82 81 A8 B8
DAI_P9 DSDATA4 SW2.1 ON DATA27 DATA26 CLK1- D8
84 83 A9 B9
DAI_P10 DSDATA3 SW2.2 ON DATA29 DATA28 GND2 D9
86 85 A10 B10
DAI_P11 DSDATA2 SW2.3 ON DATA31 DATA30 DAI_P2 D10 GND12
88 87 A11 B11
DAI_P12 DSDATA1 SW2.4 ON RSVD10 RSVD11 DAI_P8 D11 D12
3.3V 5V 90 89 A12 B12
DAI_P13 DBCLK SW2.5 OFF RSVD12 RSVD13 GND3 D13
92 91 A13 B13
DAI_P14 DLRCLK SW2.6 OFF RSVD14 RSVD15 DAI_P4 D14 GND13
94 93 A14 B14
DAI_P15 LED6 SW2.7 ON RSVD16 RSVD17 DAI_P7 D15 D16
96 95 A15 B15
3 DAI_P16 LED7 SW2.8 ON PWR_IN1 GND1 GND4 D17 3
98 97 A16 B16
DAI_P17 LED8 SW7.1 ON PWR_IN2 GND2 DAI_P9 D18 GND14
100 99 A17 B17
DAI_P18 SPDIF_IN SW7.2 ON VDDIO1 GND3 DAI_P14 D19 D20
102 101 A18 B18
DAI_P19 PB3 SW7.3 ON VDDIO2 GND4 GND5 D21
104 103 A19 B19
DAI_P20 PB4 SW7.4 ON 3.3V1 3.3V2 DAI_P10 D22 GND15
QMS52X2_SMT A20 B20
NOTE: SHUTTING OFF ANY OF THE SWITCHES FOR EXPANSION USE DAI_P12 D23 CLK2-
A21 B21
WILL CAUSE LOSS OF FUNCTIONALITY TO THE RESPECTIVE GND6 CLK2+
A22 B22
PERIPHERAL ON THE EZ-BOARD. DAI_P15 D24 GND16
A23 B23
DAI_P16 D25 D26
A24 B24
DSP PIN PERIPHERAL NET CONNECTED SWITCH DSP PIN PERIPHERAL NET CONNECTED SWITCH GND7 D27
A25 B25
NAME CONNECTED TO VIA SWITCH DEFAULT NAME CONNECTED TO VIA SWITCH DEFAULT DAI_P11 D28 GND17
A26 B26
DPI_P1 SPI_MOSI SW3.1 ON MS0 FLASH_CS SW13.1 OFF DAI_P13 D29 D30
A27 B27
DPI_P2 SPI_MISO SW3.2 ON MS1 FLASH_CS SW13.2 ON GND8 D31
DMAX_ALT
DPI_P3 SPI_CLK SW3.3 ON FLAG0/IRQ0 TEMP_THERM SW13.3 OFF DNP
DPI_P4 AD1939_CS SW3.4 ON FLAG1/IRQ1 PB1 SW13.4 ON
DPI_P5 SPI_CS SW3.5 ON FLAG2/IRQ2/MS2 PB2 SW13.5 ON
DPI_P6 LED1 SW3.6 ON FLAG3/TIMEXP/MS3 TEMP_IRQ SW13.6 OFF
DPI_P7 TEMP_SDA SW3.7 ON NOTE: SHUTTING OFF ANY OF THE SWITCHES FOR EXPANSION USE
DPI_P8 TEMP_SCK SW3.8 ON WILL CAUSE LOSS OF FUNCTIONALITY TO THE RESPECTIVE
DPI_P9 UART_TX SW14.1 ON PERIPHERAL ON THE EZ-BOARD. ANALOG 20 Cotton Road
Nashua, NH 03063
DPI_P10 UART_RX SW14.2 ON
4 DPI_P11 UART_RTS SW14.3 OFF DEVICES PH: 1-800-ANALOGD 4
DPI_P12 UART_CTS SW14.4 OFF
DPI_P13 LED2 SW14.5 ON Title ADSP-21469 EZ-BOARD
DPI_P14 LED3 SW14.6 ON
EXPANSION II INTERFACE / L.A. CONNECTORS
NOTE: SHUTTING OFF ANY OF THE SWITCHES FOR EXPANSION USE
WILL CAUSE LOSS OF FUNCTIONALITY TO THE RESPECTIVE Size Board No. Rev
C A0221-2008 0.2
PERIPHERAL ON THE EZ-BOARD.
Date 3-31-2009_14:34 Sheet 15 of 16

A B C D
 A B C D

5V
ANALOG AUDIO (AD1939) POWER
F1 FER9 5V A3V
5A 190
FUS005 FER002
4 3

1 2 VR1
P16
1 5
1 IN OUT
C245 R473
D6
C236 10UF 3 31.6K
D2 GSOT05 EN
1000PF 1210 0603
MBRS540T3G 30A
3 1206 2 4
5A SOT23-3 GND ADJ
SMC
2 C260
1 POWER 1UF ADP1710 1
CON045 0603 TSOT5
D4 D7
R474 C261
SK12 GSOT03
10.0K 1UF
"5V" 0402 0603
1A
DO-214AA
30A
SOT23-3
5V
FER7
C251 600 R501 R502
1000PF 1206 4.7K 8.20K
1206 0402 0603

VDD_DDR2
FER8 5V
600
1206 R498
0
0402
U52 6
SHGND R500 VDD
16.9K 1 4
0402 EN_IN EN_OUT

SHGND 3 5 C250 C247

VIN CEXT 10UF 10UF
GND 1210 0805
2 ADM1085 C272 DNP
SC70_6 10000PF Remove P14 when measuring VDDINT
R499 0402
10.0K DNP
0402 SJ2
SHORTING
JUMPER
1.1V @ 2A DEFAULT=INSTALLLED
PGND2

R456 R457
R454 VR3 0.036 0.036
24.9K 1206 1206 TP6 P14
0603 5 U16 1 2
2 1 IN 2
5V COMP IDC2X1 VDDINT TP7
4 1 5
GND Test Points are scattered on PCB for Test Measurement Purposes. CS L2 R459
C248 C249 2 6 2.5UH 0.05
LABEL "GND" ON ALL TPs 470PF 68PF 3 6 R458 IND013 1206
0603 0603 FB PGATE 0 3 7
GND 0603
TP19 TP11 TP12 TP13 TP18 TP17 TP14 TP15 TP10 TP16 R455 2 ADP1864AUJZ 4 8
C273 80.6K SOT23-6
0.1UF 0603
D3
0402 CT47 CT48 C246
MBRS540T3G D9
SI7601DN 470UF 2.2UF 4.7UF
5A VESD01-02V-GS08
ICS010 D2E B 0805
SMC 7A
DNP
SOD-523
R453
30.9K PGND2 W2
0402 COPPER

PGND2 4A

PGND2

PGND2

5V

"VDD_DDR2"
3 P13 3
1.8V @ 500mA 1 2
3.3V TP4 TP3
IDC2X1 VDD_DDR2

R446
C244 C241 Remove P15 when measuring VDDEXT VR4 0.05
10UF 10UF 1206
1210 0805 1 3
DNP SJ3 EN OUT
SHORTING 2
JUMPER IN
3.3V @ 2A DEFAULT=INSTALLLED 4
SS

6GND1
7GND2
8GND3
GND4
D5 D8
C238 C237 C239
SK12 ESD5Z2.5T1
2.2UF 0.1UF 2.2UF
1A 40A
PGND

5
0805 0402 ADP1715 0805
"VDDEXT" MSOP8
DO-214AA SOD-523
R450 R451
R448 VR2 0.036 0.036
24.9K 1206 1206 TP5 3.3V P15
0603 5 U15 1 2
1 IN
COMP IDC2X1 VDDEXT Remove P13 when measuring VDD_DDR2
4 1 5 TP8
CS L1 R460 SJ1
C242 C243 2 6 2.5UH 0.05 SHORTING
470PF 68PF 3 6 R452 IND013 1206 JUMPER
0603 0603 FB PGATE 0 3 7 DEFAULT=INSTALLLED
GND 0603
R449 2 ADP1864AUJZ 4 8
80.6K SOT23-6
0603
D1
CT45 CT46 C240
MBRS540T3G D10
SI7601DN 220UF 2.2UF 4.7UF
5A GSOT03
ICS010 D2E B 0805
SMC 30A

R447
DNP
SOT23-3
ANALOG 20 Cotton Road
Nashua, NH 03063
255.0K PGND
4 0603
DEVICES PH: 1-800-ANALOGD 4

PGND W1
COPPER Title ADSP-21469 EZ-BOARD
PGND
4A
POWER
Size Board No. Rev
PGND
C A0221-2008 0.2
Date 3-31-2009_14:34 Sheet 16 of 16

A B C D
I INDEX

A C
ABCLK signal, 1-15, 2-3, 2-8 configuration, of this EZ-Board, 1-3
AD1939 codec, 1-14 connectors
DAI connections, 2-3, 2-8, 2-9, 2-14 diagram of locations, 2-25
DPI connections, 2-5, 2-9 J1 (expansion interface II), 1-20, 2-26
AD1939_CS signal, 2-9 J2 (RS-232), 2-26
ALRCLK signal, 1-15, 2-8 J3 (link port 1), 1-12, 1-19, 2-17, 2-26
analog audio interface, See audio J4 (RCA), 1-14, 2-27
analog-to-digital converters (ADCs), See J5 (RCA), 1-14, 2-27
AD1939 codec J6 (S/PDIF in), 2-27
architecture, of this EZ-Board, 2-2 J7 (S/PDIF out), 2-27
ASDATA1-2 signals, 2-3, 2-8 J8 (headphones), 1-16, 2-28
async control enable switch (SW13), 1-10, 1-13, P10 (MLB), 2-29
1-18, 2-6, 2-12, 2-13 P12 (link port 0), 1-12, 2-17, 2-30
audio P13 (VDD_DDR2 power), 2-30
codec, See also AD1939 codec P14 (VDDINT power), 2-30
interface, 1-14 P15 (VDDEXT power), 2-30
left select switch (SW15), 2-14 P16 (5.0V wall adaptor), 1-3, 1-5, 1-18, 2-31
left select switch (SW18), 2-16 P1 (JTAG), 1-5, 1-18, 1-19, 2-28
loopback switches (SW24-25), 2-19 P2 (expansion interface II), 1-20, 2-28
RCA connectors (J4-5), 1-14, 2-27 P5-7 (DMAX land grid array), 1-20, 2-29
right select switch (SW16), 2-15 P8-9 (diff in/out), 2-29
right select switch (SW17), 2-15 ZP1 (debug agent), 2-31
contents, of this EZ-Board package, 1-2
core voltage, 2-3
B
customer support, xvii
background telemetry channel (BTC), 1-22
bill of materials, A-1
board schematic (ADSP-21469), B-1 D
boot DAI_P1-2 pins, 2-3
modes, 2-10 DAI_P15-17 pins, 2-3, 2-23
mode select switch (SW4), 1-11, 1-12, 2-10 DAI_P19-20 pins, 1-18, 2-3

ADSP-21469 EZ-Board Evaluation System Manual I-1

INDEX

DAI_P3-4 pins, 2-3, 2-23 F

DAI_P5-14 pins, 2-3 features, of this EZ-Board, -xii
DB25 connector, 2-14, 2-15, 2-16 FLAG0 pin, 1-18, 2-6, 2-13
DBCLK signal, 1-15, 2-4, 2-9 FLAG1 pin, 1-18, 2-6, 2-13
debug agent connector (ZP1), 2-31 FLAG2 pin, 1-18, 2-6, 2-13
default configuration, of this EZ-Board, 1-3 FLAG3 pin, 2-6, 2-13
differential on/out connectors (P8-9), 2-29 FLAG4 pin, 2-13
digital audio interface (DAI) FLASH_CS singal, 2-6, 2-13
connections, 2-3 flash WP jumper (JP1), 2-21
data transfer from codec, 1-15
LED connections, 2-23
SW1 switch, 2-8 G
SW2 switch, 2-8 general-purpose IO pins (GPIO), 1-17, 2-12
SW7 switch, 1-14, 1-18, 2-11, 2-12
digital peripheral interface (DPI)
H
connections, 2-5
LED connections, 2-23 headphones
SPI memory connections, 1-11 enable switch (SW23), 1-16, 2-19
SW14 switch, 1-16, 2-5, 2-13 out connector (J8), 2-28
SW3 switch, 1-11, 2-9
digital-to-analog converters (DACs), See I
AD1939 codec installation, of this EZ-Board, 1-4, 1-5
DLRCLK signal, 1-15, 2-4, 2-9 Integrated Interchip Sound (I2C) mode, 1-15
double data rate (DDR2) memory, xii, 1-9, 2-3 internal memory space, 1-9
DPI_13-14 pins, 2-23 IO voltage, 2-3
DPI_P6 pin, 2-23 IRQ0-2 pins, 1-18, 2-6, 2-13
DSDATA1-4 signals, 2-4, 2-9
DSP clock config switch (SW5), 2-11
J
J3 (link port 0) connector, 1-12, 1-19, 2-17,
E
2-26
example programs, 1-22 J8 (headphones) connector, 1-16
expansion interface II JTAG, 2-17
J1 connector, 1-20, 2-26 interface, 1-18
P2 connector, 1-20, 2-28 J3 connector, 1-12
external memory, 1-8, 1-9 P1 connector, 1-5, 1-18, 1-19, 2-28
SW19-22 switches, 1-19, 2-17

I-2 ADSP-21469 EZ-Board Evaluation System Manual

 INDEX

jumpers MS2-3 select lines, 1-18, 2-6, 2-13

diagram of locations, 2-20 multi-processor configuration, 2-17
JP1 (flash WP), 2-21
JP2 (S/PDIF loopback), 2-21
N
JP3 (UART RTS/CTS), 2-21
JP4 (UART loopback), 2-21 notation conventions, xxi
P10 (VDDMEM power), 2-30
P13 (VDDINT power), 1-21 O
P14 (VDDEXT power), 1-21 oscilloscope, 1-21
P15 (VDD_DDR2 power), 1-21

P
L
P12 (link port 0) connector, 1-12, 1-19, 2-17,
land grid array connectors (P5-7), 1-20, 2-29 2-30
LEDs package contents, 1-2
diagram of locations, 2-22 parallel flash memory, -xii, 1-10, 2-6, 2-12
connections, 1-17 PB1-2, 2-6, 2-13
LED10 (reset), 2-23 PB3-4, 2-12
LED11 (thermal limit), 1-13, 2-24 POST (power-on-self test) program, 1-10, 1-21
LED1-8 (DAI, DPI), 2-23 power
LED1 (DPI_P6, SW3), 2-5, 2-10 5V wall adaptor (P16), 1-3, 1-5, 1-18, 2-31
LED2 (DPI_P13, SW14), 2-5, 2-14 LED (LED9), 2-23
LED3 (DPI_14, SW14), 2-5, 2-14 measurements, 1-21
LED4 (DAI_P3, SW1), 1-5, 2-3, 2-8 product overview, xii
LED5 (DAI_P4, SW1), 2-3, 2-8 push buttons
LED6 (DAIP15, SW2), 2-4, 2-9 connections, 1-18, 2-6
LED7 (DAI_16, SW2), 2-4, 2-9 SW8-11 (IO) switches, 1-18, 2-12
LED8 (DAI_P17, SW7), 2-4, 2-11
LED9 (power), 2-23
license restrictions, xii, 1-8 R
link port RCA audio connector
cables, 1-19, 2-17, 2-26, 2-27, 2-30 J4, 1-14, 2-27
interface, -xiii, 1-12 J5, 1-14, 2-27
reference design info, 1-23
reset
M
LED (LED10), 2-23
master input clock (MCLK), 1-15 push button (SW12), 2-12
media local bus (MLB) connector (P10), 2-29 restrictions, of evaluation license, 1-8
memory map, of this EZ-Board, 1-8 RS-232 connector (J2), 2-26
MS0-1 select lines, 1-10, 2-6, 2-13

ADSP-21469 EZ-Board Evaluation System Manual I-3

INDEX

S SW2 (DAI 9-16 enable) switch, 2-8

schematic, of ADSP-21469 EZ-Board, B-1 SW3 (DPI 1-8 enable) switch, 1-11, 2-5, 2-9
SDRAM interface, 1-9 SW4 (boot mode select) switch, 1-11, 1-12,
serial clock signal (SCK), 1-13 2-10
serial data signal (SDA), 1-13 SW5 (DSP clock config), 2-11
serial peripheral interconnect (SPI) ports, See SW7 (DAI 17-20 enable) switch, 1-14, 1-18,
SPI interface 2-11, 2-12
session startup procedure, 1-6 SW8-11 (IO) push buttons, 1-18, 2-12
signal routing units switches, diagram of locations, 2-7
SRU2 (DPI interface), 2-4 system architecture, of this EZ-Board, 2-2
SRU (DAI interface), 2-3
single-processor configuration, 2-17 T
SOFT_RESET signal, 2-8 TEMP_SCK signal, 2-5, 2-10
SPDIF_IN signal, 1-14, 2-11 TEMP_SDA signal, 2-5, 2-10
S/PDIF interface temp sensor interface, xiii, 1-13, 2-6, 2-10,
connections, 1-14, 2-3 2-24
in connector (J6), 2-27 thermal limit LED (LED11), 2-24
loopback jumper (JP2), 2-21 time-division multiplexed (TDM) mode, 1-15
out connector (J7), 2-27 TIMEXP pin, 2-13
SPDIF_OUT signal, 1-14, 2-8
SPI_CLK signal, 2-5, 2-9
SPI_CS signal, 2-5, 2-9 U
SPI interface, -xiii, 1-11 UART
SPI_MISO signal, 2-5, 2-9 interface connections, 1-16
SPI_MOSI signal, 2-5, 2-9 loopback jumper (JP4), 2-21
SRAM memory, 1-8 RTS/CTS jumper (JP3), 2-21
standalone debug agent, xi, 1-5, 1-8, 1-10, 1-18 UART_CTS signal, 1-16, 2-5, 2-14, 2-21
SW12 (reset) push button, 2-12 UART_RTS signal, 1-16, 2-5, 2-14, 2-21
SW13 (async control enable), 1-10, 1-13, 1-18, UART_RX signal, 1-16, 2-5, 2-13
2-6, 2-12, 2-13 UART_TX signal, 1-16, 2-5, 2-13
SW14 (DPI 9-14 enable) switch, 1-16, 2-5, universal asynchronous receiver transmitter, See
2-13 UART
SW15 (audio left select) switch, 2-14 USB monitor LED (LED4), 1-5
SW16 (audio right select) switch, 2-15
SW17 (audio right select) switch, 2-15
V
SW18 (audio left select) switch, 2-16
SW19-22 (JTAG) switches, 1-19, 2-17 VDD_DDR2
SW1 (DAI 1-8 enable) switch, 1-14, 2-3, 2-8 power connectors (P13), 2-30
SW23 (headphone enable) switch, 1-16, 2-19 voltage domain, 1-21
SW24-25 (audio loopback) switches, 2-19

I-4 ADSP-21469 EZ-Board Evaluation System Manual

 INDEX

VDDEXT VisualDSP++ environment, 1-6

power connector (P15), 2-30 voltage planes, 1-21, 2-30
voltage domain, 1-21
VDDINT
power connector (P14), 2-30
voltage domain, 1-21

ADSP-21469 EZ-Board Evaluation System Manual I-5