TRIBHUWAN UNIVERSITY

INSTITUTE OF ENGINEERING
PULCHOWK CAMPUS

LAB REPORT ON
Advanced Electronics

SUBMITTED BY: SUBMITTED TO:

Department of Electronics
Achyut Kayastha and
(075BEI005) Computer Engineering
 Differential Amplifier
Objectives:

1) To investigate the differential amplifier in differential and common modes of operation

2) To determine the common mode rejection ratio (CMRR)

Theory:

Differential Amplifier
The amplifier whose output is proportional to the difference between the input voltages is
known as differential amplifier.

vi1 vo1

vo

vi2 vo2
Figure 1: Schematic Diagram of Differential Amplifier

Double Ended Output Operation:

In double ended output operation, input is the differential input between Vi1 and Vi2
whereas output is the differential output between V01 and V02.

vi1 vo1

vo

vi2 vo2
Figure 2: Schematic Diagram for Double Ended Output Operation

The differential voltage gain in double ended output operation is given by:

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Single Ended Output Operation:

In single ended output operation, input is the differential input between Vi1 and Vi2 whereas
the output is V01 and V02 with respect to ground.

vi1 vo1

vo

vi2 vo2

Figure 3: Schematic Symbol for Single Ended Output Operation The

differential voltage gain in single ended output operation is given by:

Common Mode Gain in Differential Amplifier:

When the input signal of differential amplifier is equal in magnitude and phase, i.e. when the
inputs of differential amplifier are tied together, it is said to be in common mode of operation.

The voltage gain in common mode operation is given by:

(a) For single ended output operation:

(b) For double ended output operation:

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Equipment and components required:
1) Dual Power Supply 1 piece
2) Signal Generator 1 piece
3) Dual Trace Oscilloscope 1 piece
4) Digital Multi-meter 1 piece
5) Resistor (100 kΩ) 1 piece
6) Resistor (15 kΩ) 1 piece
7) Resistor (10 kΩ) 2 pieces
8) Resistor (1 kΩ) 1 piece
9) Potentiometer (200 Ω) 1 piece
10) Silicon Transistor (2N2222) 3 pieces

NOTE: Since the experiment is conducted in simulation program, above listed components
are available in the program’s library

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Procedure:

1. First of all both inputs are connected to ground.

2. DC voltages across the collector resistor RC of both transistors Q1 and Q2 and across RE of
Q3 is taken and recorded as follows:

VRC1 = 6.10V IC1 = VRC1/RC1 = 0.61mA

VRC2 = 6.10V IC2 = VRC2/RC2 = 0.61mA
VRE = 1.23V IE3 = VRE/RE3 = 1.23mA

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3. To calculate differential mode gain for single ended and double ended output operation

a) Vi1 = 50 mV peak to peak at 1 kHz Vi2

= Ground (0 volts)

V01 with respect to ground = 1.7V

Phase relation of V01 with respect to Vi1= 180

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V02 with respect to ground = 1.7V

Phase relation of V02 with respect to Vi1= 0

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 Single Ended Differential Voltage Gain

= 34

= 34
b) Vi1 = Ground (0 volts)
Vi2 = 50 mV peak to peak at 1 kHz

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V01 with respect to ground = 1.7V
Phase relation of V01 with respect to Vi2= 0

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V02 with respect to ground = 1.7V

Phase relation of V02 with respect to Vi2= 180

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 Single Ended Differential Voltage Gain

= -34

=-34
c) Case 1: When Vi1 is grounded:

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 V01 – V02 = 1.2V

Case 2: When Vi2 is grounded:

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 V01 – V02 = 1.2V

Double Ended Differential Voltage Gain

Case 1: When Vi1 is grounded:

=-24V
Case 2: When Vi2 is grounded:

=24V

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d) Calculating common mode gain and common mode rejection ratio (CMRR) for
single ended and double ended output operation:

Vi1 = 1 volt peak at 1 kHz

Vi2 = 1 volt peak at 1 kHz with same phase as Vi1

So, Vin = Vi1 = Vi2

V01 with respect to ground = 5.4mV

Phase relation of V01 with respect to Vin = 180

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V02 with respect to ground = 5.4mV

Phase relation of V02 with respect to Vin = 180

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V01 – V02 = 0V

Common Mode Gain for Single Ended Output Operation:

-3
= 5.4*10

-3
= 5.4*10

Common Mode Gain for Double Ended Output Operation:

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 =0

CMRR for single ended case:

= 75.98 dB
CMRR for double ended case:

= ∞
Discussion and conclusion:

Thus, in this lab session, we analyzed the operation of differential

amplifier in differential and common mode of operation and determined
the common mode rejection proportion eventually. We first tuned the
signal generator by setting it to 50 mV and 1kHz frequency. We also
analyze the phase value of output obtained with its input. Therefore, the
lab work was concluded respectively.

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