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Homework 4 Solutions ECE 426 Spring 2018 Gabriel Kuri

This document contains solutions to 5 homework problems related to virtual memory concepts: 1. It explains that page tables map pages of logical memory to frames of physical memory through page table entries. 2. It calculates the number of pages, maximum physical memory, and optimal page table structure for a given virtual address space and page size. 3. It states that page faults occur when a process needs data not in physical memory, and are resolved by paging in the faulted data. 4. It shows the page load order and faults for different replacement algorithms on a sample reference string. 5. It defines thrashing as frequent paging due to insufficient memory, and lists increasing RAM or reducing

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92 views2 pages

Homework 4 Solutions ECE 426 Spring 2018 Gabriel Kuri

This document contains solutions to 5 homework problems related to virtual memory concepts: 1. It explains that page tables map pages of logical memory to frames of physical memory through page table entries. 2. It calculates the number of pages, maximum physical memory, and optimal page table structure for a given virtual address space and page size. 3. It states that page faults occur when a process needs data not in physical memory, and are resolved by paging in the faulted data. 4. It shows the page load order and faults for different replacement algorithms on a sample reference string. 5. It defines thrashing as frequent paging due to insufficient memory, and lists increasing RAM or reducing

Uploaded by

Roopa Shri
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Homework 4 Solutions ECE 426

Spring 2018
Gabriel Kuri

5 Problems - 50 pts total

1 (10 pts) Explain the purpose of pages and frames as they relate to executing processes.

Page tables allow a process to use non-contiguous blocks of physical memory by mapping page of logical
memory to frame of physical memory through the use of a page table.

2 (10 pts) A computer system has a 32-bit virtual address space with a page size of 8K, and 4 bytes per
page table entry.

(a) How many pages are in the virtual address space?


232
Number of pages is the address space divided by the page size: 213 = 219 addressable pages

(b) What is the maximum size of addressable physical memory in this system?
With 4 byte entries in the page table we can reference 232 pages. Since each page is 213 , the maximum
addressable physical memory size is 232 × 213 = 245

(c) If the average process size is 1GB, would you use a one-level, two-level, or three-level page table? Why?
2 or 3 level page table due to the large amount of memory consumed per process.

3 (10 pts) Explain under which circumstances page faults occur and how they are resolved by the operating
system.

Page faults occur when a process needs to access data or instructions which have not been loaded in to
physical memory. The operating systems then pages in the data or instructions which caused the ”page
fault”.

4 (10 pts) Consider the following page reference string:

7, 2, 3, 1, 2, 5, 3, 4, 6, 7, 7, 1, 0, 5, 4, 6, 2, 3, 0, 1

Using the FIFO, LRU, and Optimal page replacement algorithms with 3 frames, show the page load order
and number of page faults that would occur.

FIFO (17 page faults): 7; 7 2; 7 2 3; 1 2 3; 1 5 3; 1 5 4; 6 5 4; 6 7 4; 6 7 1; 0 7 1; 0 5 1; 0 5 4; 6 5 4; 6 2 4; 6


2 3; 0 2 3; 0 1 3
LRU (18 page faults): 7; 7 2; 7 2 3; 1 2 3; 1 2 5; 3 2 5; 3 4 5; 3 4 6; 7 4 6; 7 1 6; 7 1 0; 5 1 0; 5 4 0; 5 4 6; 2
4 6; 2 3 6; 2 3 0; 1 3 0
OPT (13 page fauts): 7; 7 2; 7 2 3; 1 2 3; 1 5 3; 1 5 4; 1 5 6; 1 5 7; 1 5 0; 1 4 0; 1 6 0; 1 2 0; 1 3 0

1
5 (10 pts) Explain thrashing as it relates to virtual memory and what affect it has on the operating system.
Name at least 2 methods to reduce thrashing.

Thrashing occurs when a particular process is constantly paging in and paging out the same chunk of code or
data due to insufficient physical memory to hold them in RAM. This creates a severe performance penalty as
the operating system has to constantly bring the code/data back in to RAM from disk for execution by the
processor. We can eliminate thrashing by increasing the amount of physical RAM or reducing the number
of processes currently consuming physical memory.

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