TA7280P, TA7281P: 5.8W Dual Audio Power Amplifier. 22W BTL Audio Power Amplifier
TA7280P, TA7281P: 5.8W Dual Audio Power Amplifier. 22W BTL Audio Power Amplifier
TA7280P,TA7281P
5.8W Dual Audio Power Amplifier.
22W BTL Audio Power Amplifier.
· High power
: POUT (1) = 22W (typ.)
(VCC = 14.4V, f = 1kHz, THD = 10%, RL = 4Ω, BTL)
POUT (2) = 19W (typ.)
(VCC = 13.2V, f = 1kHz, THD = 10%, RL = 4Ω, BTL)
POUT (3) = 15W (typ.)
(VCC = 13.2V, f = 1kHz, THD = 1%, RL = 4Ω, BTL)
POUT (4) = 5.8W (typ.) / ch
(VCC = 13.2V, f = 1kHz, THD = 10%, RL = 4Ω, DUAL)
· Low distortion
: THD (1) = 0.03% (typ.)
(VCC = 13.2V, f = 1kHz, POUT = 4W, RL = 4Ω, GV = 40dB, BTL)
THD (2) = 0.06% (typ.)
(VCC = 13.2V, f = 1kHz, POUT = 1W, RL = 4Ω, GV = 52dB, DUAL)
· Low noise
: VNO (1) = 0.14mVrms (typ.)
(VCC = 13.2V, RL = 4Ω, GV = 40dB, Rg = 0, DIN noise: DIN45405, BTL)
VNO (2) = 0.7mVrms (typ.)
(VCC = 13.2V, RL = 4Ω, GV = 52dB, Rg = 10kΩ, BW = 20Hz~20kHz, DUAL)
· Protector circuit
: Thermal shout down, Over voltage protection, Out−VCC short, Out−GND short and Out−Out short
protection.
· Operating supply voltage range
: VCC (opr) = 9~18V
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Block Diagram
DUAL
R + R1 + R2
G V = 20log f (dB)
R f + R1
In case of Rf = 0
The voltage gain is set as follows:
GV = 52dB (typ.)
(2) BTL amplifier
The recommended BTL connection
amplifier shown in (Fig. 2) .
AMP. 1 is noninverting amplifier and
AMP. 2 is invert one.
The output voltage is divided by
resistors R3 and R4.
The divided voltage is applied to
inverting input of amp. 2. R3 and R4
are determined in the following equation.
R3 + R 4 R + R1 + R2
= 20log f (dB) GV in Dual mode
R3 R f + R1
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The voltage gain in this circuit is 6dB higher than that in Dual mode.
R + R1 + R2
G V = 20log f (dB)
R f + R1
In case of Rf = 0
GV = 52+6 = 58 (dB)
In case of Rf = 430Ω
GV = 34+6 = 40 (dB)
Each voltage gain can be set as shown above.
2. Muting
Audio muting can be accomplished by connecting pin(6) (ripple filter) to GND as shown in (Fig. 3).
Then, the bias circuits are cut off.
However, caution must be exercised to the following items.
(1) The recovery time from the muting operation is determined
by the capacities of the ripple filter capacitor between
pin(6) and GND, and of the capacitor for NF.
(2) As this muting system is operated by the short-circuit of
ripple filter: C5, the ripple rejection ratio becomes worse
in the muting condition.
At mute on, some pop noise of breaking the bias are
produced.
The output waveform at muting on
/ off during BTL, are shown in
(Fig.4).
(Provided VCC = 13.2V, RL = 4Ω, non-
signal.)
50dB or more can be obtained for
muting amount.
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3. Measures against oscillation.
C7, C8, C9, C12: The capacitor of polyester film having small variation of the temperature characteristics is
recommended as the capacitor for oscillation prevention.
C12: Reduces the gain in the high range frequency (150kHz or over) and increases the oscillation allowance.
R5: Increases the oscillation allowance at output cripping of the low range frequency (100Hz or less).
Since the oscillation allowance varies according to the following item, carry out the temperature test to confirm
the oscillation allowance.
(1) Gain to be used (GV setting).
(2) Capacity of capacitor
(3) Kinds of capacitor
(4) Layout of printed board
It is recommended to use the capacitor having the capacity exceeding the oscilltation stopping value. At using
with the voltage gain GV lowered or with the high range frequency and the oscillation becomes liable to be
produced.
Therefore, application with GV = 40dB or over is advisable.
Especially for using with the gain lowered in dual operation, insert 1000pF between NF (pin(2) and pin(4)) and
GND.
This capacitor reduces the gain of the high range frequency and is effective for oscillation prevention.
4. Output waveform at power supply on / off (reference)
BTL and dual amplifier DC output waveforms in the condition of VCC = 13.2V, RL = 4Ω at non-signal (input
short) are shown in (Fig. 5) and (Fig. 6).
DUAL
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The popping time at power supply on / off varies according to the rise and fall times.
The condition in which the power supply is rapidly and repeatedly mode on / off, that is, the condition in which
the charge is made on the external capacitor of IC is different from the conditions shown in (Fig. 5) and (Fig. 6) .
Electrical Characteristics
(unless otherwise specified, VCC = 13.2V, RL = 4Ω, Rg = 600Ω, f = 1kHz, Ta = 25°C)
Test
Characteristic Symbol Cir- Test Condition Min. Typ. Max. Unit
cuit
Quiescent current ICCQ 2 VIN = 0 ― 80 145 mA
POUT (1) 1 THD = 10%, VCC = 14.4V ― 22 ―
Output power POUT (2) 1 THD = 10% 16 19 ― W
Total harmonic
THD (1) 1 POUT = 4W, GV = 40dB ― 0.03 0.25 %
distortion
Output offset
VOFF 1 VIN = 0 ― 0 0.35 V
voltage
Voltage gain GV (1) 1 VOUT = 0.775Vrms (0dBm) ― 40 ― dB
Rg = 0
Output noise voltage VNO (1) 1 ― 0.14 ― mVrms
DIN45405 noise filter
fripple = 100Hz
Ripple rejection ratio R. R. (1) 1 ― -52 -40 dB
Vripple = 0.775Vrms (0dBm)
Output power POUT (4) 2 THD = 10% 5 5.8 ― W
Total harmonic
THD (2) 2 POUT = 1W ― 0.06 0.30 %
distortion
Voltage gain GV (2) 2 VOUT = 0.775Vrms (0dBm) 50 52 54 dB
Dual mode
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Typ. DC Voltage Of Each Terminal
(VCC = 13.2V, Ta = 25°C, dual mode test circuit )
Terminal No. 1 2 3 4 5 6 7 8 9 10 11 12
DC voltage TA7280P 1.5 1.5 GND 1.5 1.5 6.4 6.4 12.3 GND VCC 12.3 6.4
(V)
TA7281P 6.4 12.3 VCC GND 12.3 6.4 6.4 1.5 1.5 GND 1.5 1.5
(2) DUAL
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TA7281P
(1) BTL
(2) DUAL
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Package Dimensions
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