Kendryte Freertos Programming Guide en
Kendryte Freertos Programming Guide en
FreeRTOS SDK
Programming Guide
Translate by Sipeed
KENDRYTE
This document provides users with programming guidelines based on the FreeRTOS SDK development.
Release notes
Disclaimer
The information in this document, including the referenced url address, is subject
to change without notice.The Documentation is provided "as is" without warranty of
any kind, including any warranties of merchantability, fitness for a particular
purpose, or non-infringement, and any warranties referred to elsewhere by any
proposal, specification or sample.This document is not responsible for any
infringement of any patent rights arising out of the use of the information in this
document.No license, express or implied, by estoppel or otherwise, is hereby
granted.All trademark names, trademarks and registered trademarks mentioned are the
property of their respective owners and are hereby acknowledged.
Copyright notice
Copyright © 2018 Jia Nan Technology.all rights reserved.
ii
table of Contents
12.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
. . . . . . . . . . . . . . . . . . . . . . . . . . 63
12.2 Functional . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
descriptio . . . . . . . . . . . . . . . . . . . . . . . . 67
n
12.3 Api . . . . . .. 70
13.1 reference
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
12.4 type of. . .. .. .. .. . . .
. . . . . . . . . . . . . . . . . . . . . . . . 70
data
13.2 Functional . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
description
Chapter 13. Digital Camera . . . . . . . . . . . . . . . . . . . . . . . . 75
Interface (dvp) . . . .
13.3 Api reference . . . 78
14.1 Overview. . .. .. . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
13.4 type. of
. .data
. . .. .. . . . . . . . . . . . . . . . . . . . . . . . . 78
14.2 . . . .
Functional . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Chapter description
Serial camera (SCCB)
14 control .bus
. 81
14.3 Api reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Chapter Timer . . . . . . . . . . . . . . . . . . . . . . . . . . 81
15 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Overview
15.1 . . . .
85
15.2 Functional . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . 85
description
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
15.3 Api reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
. .
Chapter 17 Watchdog Timer (wdt) 89
15.4 type of data . . .
17.1 Overview .....................................................................................................................................
. . 89
17.2 Functional description .............................................................................................. 89
Chapter Pulse width (PWM)
17.3 Api reference .................................................................................................................89
16 modulator
17.4 type of data .................................................................................................................... 92
16.1 Overview . . .
. . . .
Chapter Fast Fourier (FFT) 95
1816.2 Functional
Transform Accelerator. . .
. . . . . . . . . . . . . . . . . . . . . . . 95
description
18.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . 95
. .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
16.3 Api reference . . .
18.2 Functional
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
description
. . . . .
18.3 Api . . .
reference . . .
. . .
18.4 type of data . . .
. . . . .
目录 v
Chapter 1
FreeRTOS Expansion
1.1 Overview
FreeRTOS is a lightweight real-time operating system.This SDK adds some new features for K210.
• uxTaskGetProcessorId
• xTaskCreateAtProcessor
1.3.1 uxTaskGetProcessorId
1.3.1.1 description
Get the current logical processor ID.
第 1 章 FreeRTOS 扩 展 2
1.3.2 xTaskCreateAtProcessor
1.3.2.1 description
Create a task at the specified logical processor.
B aseT ype_ t x T as k C reateA tP r o ces so r ( U B aseT ype_ t uxProcessor , T ask F unction_ t pxTaskCode ,
const char ∗ const pcName , const co n fig S T A C K _ D E P T H _ T Y P E usStackDepth , void ∗ const
pvParameters , U B aseT ype_ t uxPriority , T ask H andle_ t ∗ const px C reated T ask );
1.3.2.3 Parameters
1.3.2.4 Return
value
pdPASS
Succ
ess other
fail
ure
3
chapter 2
Device List
/dev/uart1 UART
/dev/uart2 UART
/dev/uart3 UART
/dev/gpio0 GPIO High speed gpio
/dev/gpio1 GPIO
/dev/i2c0 I2C
/dev/i2c1 I2C
/dev/i2c2 I2C
/dev/i2s0 I2S
/dev/i2s1 I2S
/dev/i2s2 I2S
/dev/spi0 SPI
/dev/spi1 SPI
/dev/spi3 SPI
/dev/sccb0 SCCB
/dev/dvp0 DVP
/dev/fft0 FFT
/dev/aes0 AES
/dev/sha256 SHA256
/dev/timer0 TIMER Cannot be used with /dev/pwm0
/dev/timer1 TIMER Cannot be used with /dev/pwm0
/dev/timer2 TIMER Cannot be used with /dev/pwm0
第 2 章 设备列表 4
Chapter 3
Pin configuration
3.1 Overview
The pin configuration includes fpioa and power domain configuration.
3.3.1 fpioa_function_t
3.3.1.1 description
The function number of the pin.
3.3.1.2 definition
3.3.1.3 member
3.3.2 fpioa_cfg_item_t
3.3.2.1 description
Fpioa pin configuration.
3.3.2.2 definition
typedef struct _ fpioa_ cfg_ item
{
int number ;
fpioa_ fu nction_ t function ;
} fpioa_ cfg_ item _ t ;
3.3.2.3 Members
Member description
name
number Pin
function number
function
number
第 3 章 管脚配置 19
3.3.3 fpioa_cfg_t
3.3.3.1 description
Fpioa configuration.
3.3.3.2 definition
3.3.3.3 member
3.3.4 sysctl_power_bank_t
3.3.4.1 Desc
ribe the
power domain
number.
3.3.4.2 definition
3.3.4.3 member
第 3 章 管脚配置 20
3.3.5 sysctl_io_power_mode_t
3.3.5.1 description
Io Output voltage value.
3.3.5.2 definition
3.3.5.3 member
3.3.6 power_bank_item_t
3.3.6.1 description
Single power domain configuration.
3.3.6.2 definition
3.3.6.3 member
3.3.7 power_bank_cfg_t
3.3.7.1 Desc
ribe the
power domain
configuratio
n.
3.3.7.2 definition
3.3.7.3 member
3.3.8 pin_cfg_t
3.3.8.1 Desc
ribe the pin
configuratio
n.
3.3.8.2 definition
} pin_cfg_t ;
3.3.8.3 member
input
3.3.9 Example
Chapter 4
System control
4.1 Overview
The system control module provides configuration functions for the operating system.
• system_set_cpu_frequency
• system_install_custom_driver
4.3.1 system_set_cpu_frequency
4.3.1.1 description
Set the cpu frequency.
4.3.1.3 parameter
4.3.2 system_install_custom_driver
4.3.2.1 description
Install a custom driver.
void sy s tem _ in s tall_ cu s to m _ d riv er ( const char ∗ name , const custom _ driver_ t ∗ driver );
4.3.2.3 parameter
4.3.2.4 The
return value
is none.
4.3.3 Example
4.4.1 driver_base_t
4.4.1.1 Descri
be the driver
implementation
base class.
4.4.1.2 definition
4.4.1.3 member
4.4.2 custom_driver_t
4.4.2.1 description
Custom drive implementation.
4.4.2.2 definition
typedef struct _ custom _ driver
{
driver_ base_ t base ;
int (∗ io_control )( uint32_t control_code , const uint8_t ∗ write_buffer , size_t
write_len , uint8_t ∗ read_buffer , size_t read_len , void ∗ userdata );
} custom _ driver_ t ;
4.4.2.3 member
第 4 章 系统控制 26
Chapter 5
5.1 Overview
Any external interrupt source can be individually assigned to an external interrupt on
each CPU.This provides great flexibility to adapt to different application needs.
• pic_set_irq_enable
• pic_set_irq_handler
• pic_set_irq_priority
第 5 章 可编程中断控制器 (PIC) 28
5.3.1 pic_set_irq_enable
5.3.1.1 description
Set whether irq is enabled.
5.3.1.3 parameter
5.3.1.4 The
return value
is none.
5.3.2 pic_set_irq_handler
5.3.2.1 description
Set up the irq handler.
void p ic_ s et_ irq _ h an d ler ( uint32_t irq , p ic_ irq_ hand ler_ t handler , void ∗ userdata );
5.3.2.3 parameter
5.3.2.4 The
return value
is none.
第 5 章 可编程中断控制器 (PIC) 29
5.3.3 pic_set_irq_priority
5.3.3.1 description
Set the irq priority.
void p ic_ s et_ irq _ p rio rity ( uint32_t irq , uint32_t priority );
5.3.3.3 Parameters
5.4.1 pic_irq_handler_t
5.4.1.1 description
Irq handler.
5.4.1.2 definition
5.4.1.3 parameter
Chapter 6
6.1 Overview
Direct Memory Access (DMA) is used to provide high-speed data transfer between peripherals
and memory and between memory and memory.CPU efficiency can be improved by quickly moving
data through DMA without any CPU operation.
• dma_open_free
• dma_close
• dma_set_request_source
• dma_transmit_async
第 6 章 直接存储访问 (DMA) 31
• dma_transmit
• dma_loop_async
6.3.1 dma_open_free
6.3.1.1 description
Open an available dma device.
6.3.2 dma_close
6.3.2.1 description
Turn off the dma device.
6.3.2.3 parameter
6.3.2.4 The
return value
is none.
6.3.3 dma_set_request_source
6.3.3.1 description
Set the dma request source.
6.3.3.3 parameter
6.3.3.4 The
return value
is none.
6.3.4 dma_transmit_async
6.3.4.1 description
Perform dma asynchronous transfer.
void dm a_ transm it_ as yn c ( handle_t file , const volatile void ∗ src , volatile void ∗ dest ,
int src_inc , int dest_inc , size_t element_size , size_t count , size_t burst_size , S
em ap ho reH andle_ t co m pletion _ event );
6.3.4.3 parameter
6.3.4.4 The
return value
is none.
6.3.5 dma_transmit
6.3.5.1 description
Perform dma synchronous transmission.
void dm a_ transm it ( handle_t file , const volatile void ∗ src , volatile void ∗ dest , int
src_inc , int dest_inc , size_t element_size , size_t count , size_t burst_ size );
6.3.5.3 parameter
incrementing t,
element size inpu
(bytes) t,
Burst inpu
transmission t
quantity
6.3.6 dma_loop_async
6.3.6.1 description
Perform dma asynchronous loop transfer.
6.3.6.3 parameter
Note: Phase completion refers to the completion of the transfer of a single source to the
target count element.
6.3.6.4 The
return value
is none.
6.3.7 Example
6.4.1 dma_stage_completion_handler_t
6.4.1.1 description
The dma stage completes the handler.
6.4.1.2 definition
6.4.1.3 parameter
Chapter 7
standard IO
7.1 Overview
The standard io module is the basic interface for accessing peripherals.
• io_open
• io_close
• io_read
• io_write
• io_control
第 7 章 标 准 IO 37
7.3.1 io_open
7.3.1.1 Descri
ption Open a
device.
7.3.1.3 parameter
0 failure
other Device handle
7.3.2 io_close
7.3.2.1 Descri
ption Turns
off a device.
7.3.2.3 parameter
return desc
value ript
ion
0 succ
other ess
fail
ure
7.3.3 io_read
7.3.3.1 Description
Read from the device.
7.3.3.3 parameter
7.3.4 io_write
7.3.4.1 Desc
ription
Write to the
device.
7.3.4.3 parameter
len success
other failure
7.3.5 io_control
7.3.5.1 description
Send control information to the device.
int io_ control ( handle_t file , uint32_t control_code , const uint8_t ∗ write_buffer , size_t
write_len , uint8_t ∗ read_buffer , size_t read_len );
7.3.5.3 Parameters
7.3.5.4 Return
value
The number of bytes actually read.
7.3.6 Example
Chapter 8
8.1 Overview
Embedded applications typically require a simple method that consumes less system resources to
transfer data.Universal Asynchronous Transceiver (uart)
To meet these requirements, it has the flexibility to perform full-duplex data exchange with external
devices.
• uart_config
8.3.1 uart_config
8.3.1.1 description
Configure the uart device.
void uart_ config ( handle_t file , uint32_t baud_rate , uint32_t databits , uart_ stopbits_ t
stopbits , uart_ parity_ t parity );
8.3.1.3 parameter
8.3.1.4 The
return value
is none.
8.3.2 Example
uint8_t b = 1;
/∗ Write 1 byte ∗ /
io_write ( uart , &b , 1);
/∗ Read 1 byte ∗ /
while ( io_read ( uart , &b , 1) != 1);
8.4.1 uart_stopbits_t
8.4.1.1 description
Uart stop bit.
8.4.1.2 definition
第 8 章 通用异步收发传输器 (UART) 42
8.4.1.3 member
8.4.2 uart_parity_t
8.4.2.1 description
Uart check digit.
8.4.2.2 definition
typedef enum _ uart_ parity
{
UART_PAR ITY_N ONE ,
UART_PAR ITY_O DD ,
U A R T _ P A R IT Y _ E V E N
} uart_ parity_ t ;
8.4.2.3 Members
UART_PARITY_NONE No
UART_PARITY_ODD parity
UART_PARITY_EVEN check
parity
check
43
Chapter 9
9.1 Overview
The chip has 32 high-speed gpio and 8 universal gpio.
• gpio_get_pin_count
• gpio_set_drive_mode
• gpio_set_pin_edge
• gpio_set_on_\changed
• gpio_get_pin_value
• gpio_set_pin_value
第 9 章 通用输入/输出 (GPIO) 44
9.3.1 gpio_get_pin_count
9.3.1.1 description
Get the number of gpio pins.
9.3.1.3 parameter
9.3.1.4 The
number of
return value
pins.
9.3.2 gpio_set_drive_mode
9.3.2.1 description
Set the gpio pin drive mode.
void g p io _ s et_ d riv e_ m o d e ( handle_t file , uint32_t pin , g pio_ drive_ m od e_ t mode );
9.3.2.3 Parameters
9.3.3 gpio_set_pin_edge
9.3.3.1 description
Set the gpio pin edge trigger mode.
Note: /dev/gpio1 is not supported at this time.
9.3.3.3 parameter
9.3.3.4 The
return
value is
none.
9.3.4 gpio_set_on_changed
9.3.4.1 description
Set the gpio pin edge trigger handler.
Note: /dev/gpio1 is not supported at this time.
9.3.4.3 Parameters
9.3.4.4 Return
value None.
9.3.5 gpio_get_pin_value
9.3.5.1 description
Get the value of the gpio pin.
9.3.5.3 Parameters
9.3.6 gpio_set_pin_value
9.3.6.1 description
Set the value of the gpio pin.
9.3.6.3 parameter
no.
9.3.7 Example
gpio_set_drive_mode(gpio, 0, GPIO_DM_OUTPUT);
gpio_set_pin_value(gpio, 0, GPIO_PV_LOW);
9.4.1 gpio_drive_mode_t
9.4.1.1 description
Gpio drive mode.
9.4.1.2 definition
typedef enum _gpio_drive_mode
{
GPIO_ DM_
INPUT , GPIO_DM_INP
UT_PULL_DOWN , GPIO_D
M_INPUT_PULL_UP , GPIO
_DM_OUTPUT
} gpio_drive_mode_t;
9.4.1.3 member
Chapter 9. General Purpose 48
Input/Output (gpio)
GPIO_DM_INPUT Input
GPIO_DM_INPUT_PULL_DOWN Input drop down
GPIO_DM_INPUT_PULL_UP Input pull up
GPIO_DM_OUTPUT Output
9.4.2 gpio_pin_edge_t
9.4.2.1 description
Gpio edge trigger mode.
9.4.2.2 definition
typedef enum _gpio_pin_edge
{
GPIO_
PE_NONE ,
GPIO_ PE_
FALLING ,
GPIO_ PE_
RISING , GPIO_P
9.4.2.3
E_BOTmember
H
} gpio_pin_edge_t;
Member name description
9.4.3 gpio_pin_value_t
9.4.3.1 description
Gpio value.
9.4.3.2 definition
typedef enum _gpio_pin_value
{
GPIO_PV_L
OW , GPIO_P
V_HIGH
} gpio_pin_value_t;
Chapter 9. General Purpose 49
Input/Output (gpio)
9.4.3.3 member
GPIO_PV_LOW low
GPIO_PV_HIGH high
9.4.4 gpio_on_changed_t
9.4.4.1 description
The gpio edge trigger handler.
9.4.4.2 definition
typedef void (∗gpio_on_changed_t)(uint32_t pin, void ∗userda ta);
9.4.4.3 Parameters
Chapter 10
10.1 Overview
The i2c bus is used to communicate with multiple external
devices.Multiple external devices can share an i2c bus.
• i2c_get_device
• i2c_dev_set_clock_rate
• i2c_dev_transfer_sequential
• i2c_config_as_slave
• i2c_slave_set_clock_rate
Chapter 10 Integrated Circuit Built-in Bus 51
(i2c)
10.3.1 i2c_get_device
10.3.1.1 description
Register and open an i2c device.
10.3.1.3 parameter
10.3.2 i2c_dev_set_clock_rate
10.3.2.1 description
Configure the clock rate of the i2c device.
10.3.2.3 Parameters
10.3.3 i2c_dev_transfer_sequential
10.3.3.1 description
Read and write to the i2c device first.
10.3.3.3 parameter
10.3.4 i2c_config_as_slave
10.3.4.1 description
Configure the i2c controller to be in slave mode.
10.3.4.3 parameter
no.
10.3.5 spi_dev_set_clock_rate
10.3.5.1 description
Configure the clock rate for the i2c slave mode.
10.3.5.3 Parameters
10.3.6 Example
uint8_ t reg = 0;
uint8_ t data_ buf [2] = { 0x00 ,0x01 }; data_
buf [0] = reg;
/∗ Write 0x01 to the 0 register ∗/
io_ write (dev0 , data_buf , 2);
/ ∗ Read 1 byte of data from the 0 register ∗/
i2c_dev_transfer_sequential(dev0 , ®, 1, data_buf , 1);
Chapter 10 Integrated Circuit Built-in Bus 54
(i2c)
10.4.1 i2c_event_t
10.4.1.1 description
I2c event.
10.4.1.2 definition
typedef enum _i2c_event
{
I2C_EV_
START , I2C_
EV_ RESTART ,
I2C_EV_STOP
} i2c_event_t;
10.4.1.3 member
10.4.2 i2c_slave_handler_t
10.4.2.1 description
I2c slave device handler.
10.4.2.2 definition
typedef struct _i2c_slave_handler
{
void (∗on_receive)(uint32_t data); uint32_t (∗
on_transmit)();
void (∗on_event)(i2c_event_t event);
} i2c_slave_handler_t;
Chapter 10 Integrated Circuit Built-in Bus 55
(i2c)
10.4.2.3 member
Chapter 11
11.1 Overview
The i2s standard bus defines three types of signals: the clock signal bck, the channel
selection signal ws, and the serial data signal sd.a basic
The i2s data bus has one master and one slave.The roles of the master
and slave remain unchanged during the communication process.The i2s
module includes separate transmit and receive channels for excellent
communication performance.
• Automatically configure the device according to the audio format (supports 16, 24, 32
bit depth, 44100 sample rate, 1 - 4 channels)
• Configurable for playback or recording mode
• Automatically manage audio buffers
• i2s_config_as_render
• i2s_config_as_capture
• i2s_get_buffer
• i2s_release_buffer
• i2s_start
• i2s_stop
Chapter 11 Integrated Circuit Built-in Audio 57
Bus (i2s)
11.3.1 i2s_config_as_render
11.3.1.1 description
Configure the i2s controller to output mode.
11.3.1.3 parameter
no.
11.3.2 i2s_config_as_capture
11.3.2.1 description
Configure the i2s controller to capture mode.
11.3.2.3 Parameters
11.3.2.4 Return
value is none.
11.3.3 i2s_get_buffer
11.3.3.1 description
Get the audio buffer.
11.3.3.3 parameter
11.3.3.4 The
return
value is
none.
11.3.4 i2s_release_buffer
11.3.4.1 description
Release the audio buffer.
11.3.4.3 parameter
Chapter 11 Integrated Circuit Built-in Audio 59
Bus (i2s)
11.3.4.4 The
return
value is
none.
11.3.5 i2s_start
11.3.5.1 description
Start playing or recording.
11.3.5.3 parameter
11.3.5.4 The
return
value is
none.
11.3.6 i2s_stop
11.3.6.1 description
Stop playing or recording.
11.3.6.3 parameter
11.3.6.4 The
return
value is
none.
11.3.7 Example
while (1)
{
uint8_ t ∗buffer ;
size_ t frames ;
i2s_get_buffer(i2s, &buffer , &frames );
memcpy ( buffer , pcm , 4 ∗ frames ); i2s
_release_buffer(i2s, frames );
pcm += frames ;
if ( pcm >= pcm_ end )
pcm = pcm_start;
}
11.4 type of data
The relevant data types and data structures are defined as follows:
11.4.1 audio_format_type_t
11.4.1.1 Desc
ribe the
audio
format
type.
11.4.1.2 definition
11.4.1.3 member
AUDIO_FMT_PCM PCM
11.4.2 audio_format_t
11.4.2.1 Desc
ribe the
audio format.
11.4.2.2 definition
11.4.2.3 member
11.4.3 i2s_align_mode_t
11.4.3.1 description
I2s alignment mode.
11.4.3.2 definition
typedef enum _i2s_align_mode
{
I2S_ AM_
STANDARD ,
I2S_AM_ RIGHT , I
2S_AM_LEFT
} i2s_align_mode_t;
Chapter 11 Integrated Circuit Built-in Audio 62
Bus (i2s)
11.4.3.3 member
Chapter 12
12.1 Overview
Spi is a high speed, full duplex, synchronous
communication bus.
• spi_get_device
• spi_dev_config_non_standard
• spi_dev_set_clock_rate
• spi_dev_transfer_full_duplex
• spi_dev_transfer_sequential
• spi_dev_fill
Chapter 12 Serial Peripheral 64
Interface (spi)
12.3.1 spi_get_device
12.3.1.1 description
Register and open a spi device.
12.3.1.3
Parameters
parameter name description input
Output
file Spi controller handle Input
name Specify the path to Input
access the device
mode Spi mode Input
frame_format Frame format Input
chip_select_mask Chip select mask Input
data_bit_length Data bit length Input
12.3.1.4 Return
value
Sp device handle.
12.3.2 spi_dev_config_non_standard
12.3.2.1 description
Configure non-standard frame format parameters for the spi device.
12.3.2.3 parameter
no.
12.3.3 spi_dev_set_clock_rate
12.3.3.1 description
Configure the clock rate of the spi device.
12.3.3.3 parameter
12.3.4 spi_dev_transfer_full_duplex
12.3.4.1 description
Full-duplex transmission of spi devices.
Note: Only standard frame formats are supported.
12.3.4.3 Parameters
12.3.5 spi_dev_transfer_sequential
12.3.5.1 description
Write the spi device first and then read it.
Note: Only standard frame formats are supported.
12.3.5.3 parameter
12.3.6 spi_dev_fill
12.3.6.1 description
Fill the spi device with a string of identical frames.
Note: Only standard frame formats are supported.
12.3.6.3 parameter
12.3.6.4 The
return
value is
none.
12.3.7 Example
12.4.1 spi_mode_t
12.4.1.1 description
Spi mode.
12.4.1.2 definition
typedef enum _spi_mode
{
SPI_MODE_
0 ,
SPI_MODE_
1 ,
SPI_MODE_
2 ,
SPI_MODE_
12.4.1.3 member
3,
} spi_mode_t; Member name descriptio
n
SPI_MODE_ Spi mode
0
0 Spi mode
SPI_MODE_ 1
Spi mode
1 2
SPI_MODE_ Spi mode
3
2
SPI_MODE_
3
12.4.2 spi_frame_format_t
12.4.2.1 description
Spi frame format.
12.4.2.2 definition
typedef enum _spi_frame_format
{
SPI_ FF_
STANDARD ,
SPI_FF_DUAL ,
SPI_FF_QUAD ,
S PI_FF_OCTAL
} spi_frame_format_t;
Chapter 12 Serial Peripheral 69
Interface (spi)
12.4.2.3 member
SPI_FF_STANDARD standard
SPI_FF_DUAL Double line
SPI_FF_QUAD Four lines
SPI_FF_OCTAL Eight lines (not supported by /dev/spi3)
12.4.3 spi_inst_addr_trans_mode_t
12.4.3.1 description
The transmission mode of the spi instruction and address.
12.4.3.2 definition
typedef enum _spi_inst_addr_trans_mode
{
SPI _ A IT M_ ST AN DA
RD , SPI_AITM_ADDR_ST
ANDARD , SPI_AITM_AS_
FRAME_FORMAT
} spi_inst_addr_trans_mode_t;
12.4.3.3 member
Chapter 13
13.1 Overview
Dvp is a camera interface module that supports forwarding
camera input image data to the ai module or memory.
• dvp_config
• dvp_enable_frame
• dvp_get_output_num
• dvp_set_signal
• dvp_set_output_enable
• dvp_set_output_attributes
• dvp_set_frame_event_enable
• dvp_set_on_frame_event
Chapter 13. Digital Camera Interface 71
(dvp)
13.3.1 dvp_config
13.3.1.1 Descri
be the
configuration
of the dvp
device.
13.3.1.3 parameter
13.3.1.4 The
return
value is
none.
13.3.2 dvp_enable_frame
13.3.2.1 description
Enable processing of the current frame.
13.3.2.3 parameter
13.3.2.4 The
return
value is
Chapter 13. Digital Camera Interface 72
(dvp)
none.
Chapter 13. Digital Camera Interface 73
(dvp)
13.3.3 dvp_get_output_num
13.3.3.1 description
Get the number of outputs of the dvp device.
13.3.3.3 parameter
13.3.3.4 Retu
rns the
number of
output.
13.3.4 dvp_set_signal
13.3.4.1 description
Set the dvp signal status.
13.3.4.3 Parameters
no.
Chapter 13. Digital Camera Interface 74
(dvp)
13.3.5 dvp_set_output_enable
13.3.5.1 description
Set whether dvp output is enabled.
13.3.5.3 parameter
13.3.5.4 The
return
value is
none.
13.3.6 dvp_set_output_attributes
13.3.6.1 description
Set the dvp output characteristics.
13.3.6.3 Parameters
13.3.7 dvp_set_frame_event_enable
13.3.7.1 description
Sets whether dvp frame events are enabled.
13.3.7.3 parameter
13.3.7.4 The
return
value is
none.
13.3.8 dvp_set_on_frame_event
13.3.8.1 description
Set the dvp frame event handler.
13.3.8.3 Parameters
13.3.9 Example
13.4.1 video_format_t
13.4.1.1 Des
cribe the
video
format.
13.4.1.2 definition
13.4.1.3 member
VIDEO_FMT_RGB565 RGB565
VIDEO_FMT_RGB24_PLANAR
RGB24 Planar
Chapter 13. Digital Camera Interface 77
(dvp)
13.4.2 dvp_frame_event_t
13.4.2.1 description
Dvp frame event.
13.4.2.2 definition
typedef enum _video_frame_event
{
VIDEO_ FE_
BEGIN , VIDEO_
FE_END
} dvp_frame_event_t;
13.4.2.3 member
13.4.3 dvp_signal_type_t
13.4.3.1 description
Dvp signal type.
13.4.3.2 definition
typedef enum _dvp_signal_type
{
DVP_SIG_POWER_DOWN ,
DVP_SIG_RESET
} dvp_signal_type_t;
13.4.3.3 Members
DVP_SIG_POWER_DO Powe
WN DVP_SIG_RESET r
down
rese
t
Chapter 13. Digital Camera Interface 78
(dvp)
13.4.4 dvp_on_frame_event_t
13.4.4.1 description
The handler when the timer is triggered.
13.4.4.2 definition
typedef void (∗dvp_on_frame_event_t)(dvp_frame_event_t event, void ∗userdata);
13.4.4.3 parameter
Chapter 14
14.1 Overview
Sccb is a serial camera control bus.
• sccb_get_device
• sccb_dev_read_byte
• sccb_dev_write_byte
14.3.1 sccb_get_device
14.3.1.1 description
Register and open an sccb device.
Chapter 14 Serial Camera Control Bus (sccb) 80
14.3.1.3
Parameters
parameter name description input
Output
file Sccb controller Inpu
handle
name t
Specify the path
slave_address inpu
reg_address_width from the device to
t
access the device
inpu
Register address
width t
14.3.1.4 Return
value
Sccb device
handle.
14.3.2 sccb_dev_read_byte
14.3.2.1 description
Read a byte from the scbb device.
14.3.2.3 parameter
14.3.2.4 Retu
rns the
byte read
by the
value.
Chapter 14 Serial Camera Control Bus (sccb) 81
14.3.3 sccb_dev_write_byte
14.3.3.1 description
Write a byte to the sccc device.
14.3.3.3 parameter
14.3.3.4 The
return
value is
none.
14.3.4 Example
Chapter 15
Timer
15.1 Overview
The timer provides high-precision timing.
• timer_set_interval
• timer_set_on_tick
• timer_set_enable
15.3.1 timer_set_interval
15.3.1.1 description
Set the timer trigger interval.
Chapter 15 Timer 83
15.3.1.3 Parameters
15.3.2 timer_set_on_tick
15.3.2.1 description
Set the handler when the timer fires.
15.3.2.3 parameter
15.3.2.4 The
return
value is
none.
15.3.3 timer_set_enable
15.3.3.1 description
Set whether timer is enabled.
Chapter 15 Timer 84
15.3.3.3 parameter
15.3.3.4 The
return
value is
none.
15.3.4 Example
15.4.1 timer_on_tick_t
15.4.1.1 description
The handler when the timer is triggered.
15.4.1.2 definition
Chapter 15 Timer 85
15.4.1.3 parameter
Chapter 16
16.1 Overview
Pwm is used to control the duty cycle of the pulse output.
• pwm_get_pin_count
• pwm_set_frequency
• pwm_set_active_duty_cycle_percentage
• pwm_set_enable
16.3.1 pwm_get_pin_count
16.3.1.1 description
Get the number of pwm pins.
Chapter 16 Pulse Width Modulator 87
(pwm)
16.3.1.3 parameter
16.3.2 pwm_set_frequency
16.3.2.1 Descri
ption Sets the
pwm frequency.
16.3.2.3 Parameters
16.3.3 pwm_set_active_duty_cycle_percentage
16.3.3.1 description
Set the pwm pin duty cycle.
16.3.3.3 Parameters
16.3.4 pwm_set_enable
16.3.4.1 description
Set whether the pwm pin is enabled.
16.3.4.3 Parameters
16.3.5 Example
Chapter 17
17.1 Overview
Wdt provides recovery when the system is in error or not
responding.
• Configuration timeout
• Manual restart timing
• Configured to reset or enter interrupt after timeout
• Clear the interrupt after entering the interrupt to cancel the reset, otherwise wait for
the second timeout after reset
• wdt_set_response_mode
• wdt_set_timeout
• wdt_set_on_timeout
• wdt_restart_counter
• wdt_set_enable
Chapter 17 Watchdog Timer (wdt) 91
17.3.1 wdt_set_response_mode
17.3.1.1 description
Set the wdt response mode.
17.3.1.3 parameter
17.3.1.4 The
return
value is
none.
17.3.2 wdt_set_timeout
17.3.2.1 description
Set the wdt timeout.
17.3.2.3 parameter
17.3.3 wdt_set_on_timeout
17.3.3.1 description
Set the wdt timeout handler.
17.3.3.3 parameter
17.3.3.4 The
return
value is
none.
17.3.4 wdt_restart_counter
17.3.4.1 description
Cause wdt to restart counting.
17.3.4.3 parameter
17.3.4.4 The
return
value is
none.
Chapter 17 Watchdog Timer (wdt) 93
17.3.5 wdt_set_enable
17.3.5.1 description
Set whether wdt is enabled.
17.3.5.3 parameter
17.3.5.4 The
return
value is
none.
17.3.6 Example
/ ∗ After 2 seconds, enter the watchdog interrupt function to print the imeout, and then reset it in 2
seconds.
void on_timeout(void ∗unused)
{
printf ("Timeout \n");
}
wdt_set_response_mode(wdt, WDT_RESP_INTERRUP
T); wdt_set_timeout(wdt, 2e9);
wdt_set_on_timeout(wdt, on_timeout , NULL ); w
dt_set_enable(wdt, true );
17.4 type of data
The relevant data types and data structures are defined as follows:
17.4.1 wdt_response_mode_t
17.4.1.1 description
Wdt response mode.
17.4.1.2 definition
typedef enum _wdt_response_mode
{
WDT_ RESP_
RESET , WDT_RES
P_INTERRUPT
} wdt_response_mode_t;
17.4.1.3 member
17.4.2 wdt_on_timeout_t
17.4.2.1 description
Wdt timeout handler.
17.4.2.2 definition
typedef int (∗wdt_on_timeout_t)(void ∗userda ta);
17.4.2.3 parameter
Chapter 18
18.1 Overview
The fft module is hardware-based to implement the base 2 time-division acceleration of fft.
• fft_complex_uint16
18.3.1 fft_complex_uint16
18.3.1.1 description
Fft operation.
Chapter 18 Fast Fourier Transform Accelerator 97
(fft)
18.3.1.3 parameter
18.3.2 Example
18.4.1 fft_data_t
18.4.1.1 description
Fft computes the incoming data format.
18.4.1.2 definition
typedef struct tag_fft_data
{
int16_ t I1 ;
Chapter 18 Fast Fourier Transform Accelerator 99
(fft)
int16_ t R1 ;
int16_ t I2 ;
int16_ t R2;
} fft_data_t;
18.4.1.3 member
18.4.2 fft_direction_t
18.4.2.1 description
Fft operation mode
18.4.2.2 definition
Chapter 19
19.1 Overview
The sha256 module uses hardware to implement the time division operation acceleration of
sha256.
• sha256_hard_calculate
19.3.1 sha256_hard_calculate
19.3.1.1 description
Shabrating the data
19.3.1.3 parameter
Chapter 19. Secure Hash Algorithm Accelerator 101
(sha256)
19.3.2 Example
Chapter 20
20.1 Overview
The aes module is hardware-based to implement the time-division acceleration of aes.
• aes_ecb128_hard_encrypt
• aes_ecb128_hard_decrypt
• aes_ecb192_hard_encrypt
• aes_ecb192_hard_decrypt
• aes_ecb256_hard_encrypt
• aes_ecb256_hard_decrypt
• aes_cbc128_hard_encrypt
• aes_cbc128_hard_decrypt
• aes_cbc192_hard_encrypt
• aes_cbc192_hard_decrypt
• aes_cbc256_hard_encrypt
Chapter 20. Advanced Encryption 103
Accelerator (aes)
• aes_cbc256_hard_decrypt
• aes_gcm128_hard_encrypt
• aes_gcm128_hard_decrypt
• aes_gcm192_hard_encrypt
• aes_gcm192_hard_decrypt
• aes_gcm256_hard_encrypt
• aes_gcm256_hard_decrypt
20.3.1 aes_ecb128_hard_encrypt
20.3.1.1 description
Aes-ecb-128 encryption operation
20.3.1.3 parameter
20.3.1.4 The
return value is
none.
20.3.2 aes_ecb128_hard_decrypt
20.3.2.1 description
Aes-ecb-128 decryption operation
20.3.2.3 parameter
no.
20.3.3 aes_ecb192_hard_encrypt
20.3.3.1 description
Aes-ecb-192 encryption operation
20.3.3.3 parameter
no.
20.3.4 aes_ecb192_hard_decrypt
20.3.4.1 description
Aes-ecb-192 decryption operation
Chapter 20. Advanced Encryption 105
Accelerator (aes)
20.3.4.3 parameter
no.
20.3.5 aes_ecb256_hard_encrypt
20.3.5.1 description
Aes-ecb-256 encryption operation
20.3.5.3 parameter
20.3.5.4 The
return value is
none.
Chapter 20. Advanced Encryption 106
Accelerator (aes)
20.3.6 aes_ecb256_hard_decrypt
20.3.6.1 description
Aes-ecb-256 decryption operation
20.3.6.3 parameter
no.
20.3.7 aes_cbc128_hard_encrypt
20.3.7.1 description
Aes-cbc-128 encryption operation
20.3.7.3
Parameters
parameter description input
name Output
context Aes-cbc-128 Encrypted computed structure containing Input
encryption key and offset vector
input_data Aes-cbc-128 plaintext data to be encrypted Input
input_len Aes-cbc-128 Length of plaintext data to be Input
encrypted
Chapter 20. Advanced Encryption 107
Accelerator (aes)
20.3.7.4 Return
value None.
20.3.8 aes_cbc128_hard_decrypt
20.3.8.1 description
Aes-cbc-128 decryption operation
20.3.8.3
Parameters
parameter description input
name Output
context Aes-cbc-128 decrypts the computed structure, including Input
the decryption key and offset vector
input_data Aes-cbc-128 ciphertext data to be decrypted Input
input_len Aes-cbc-128 Length of ciphertext data to be Input
decrypted
output_data The result of the AES-CBC-128 decryption Output
operation is stored in this buffer.
20.3.8.4 Return
value None.
20.3.9 aes_cbc192_hard_encrypt
20.3.9.1 description
Aes-cbc-192 encryption operation
20.3.9.3 parameter
Chapter 20. Advanced Encryption 108
Accelerator (aes)
20.3.9.4 The
return value is
none.
20.3.10 aes_cbc192_hard_decrypt
20.3.10.1 description
Aes-cbc-192 decryption operation
20.3.10.3 parameter
20.3.10.4 The
return value is
none.
20.3.11 aes_cbc256_hard_encrypt
20.3.11.1 description
Aes-cbc-256 encryption operation
20.3.11.3 parameter
20.3.11.4 The
return value is
none.
20.3.12 aes_cbc256_hard_decrypt
20.3.12.1 description
Aes-cbc-256 decryption operation
20.3.12.3 parameter
20.3.12.4 The
return value is
none.
Chapter 20. Advanced Encryption 110
Accelerator (aes)
20.3.13 aes_gcm128_hard_encrypt
20.3.13.1 description
Aes-gcm-128 encryption operation
20.3.13.3 parameter
20.3.13.4 The
return value is
none.
20.3.14 aes_gcm128_hard_decrypt
20.3.14.1 description
Aes-gcm-128 decryption operation
20.3.14.3 parameter
20.3.14.4 The
return value is
none.
20.3.15 aes_gcm192_hard_encrypt
20.3.15.1 description
Aes-gcm-192 encryption operation
20.3.15.3 parameter
20.3.15.4 The
return value is
none.
20.3.16 aes_gcm192_hard_decrypt
20.3.16.1 description
Aes-gcm-192 decryption operation
20.3.16.3 parameter
20.3.16.4 The
return value is
none.
20.3.17 aes_gcm256_hard_encrypt
20.3.17.1 description
Aes-gcm-256 encryption operation
20.3.17.3 parameter
20.3.17.4 The
return value is
none.
Chapter 20. Advanced Encryption 113
Accelerator (aes)
20.3.18 aes_gcm256_hard_decrypt
20.3.18.1 description
Aes-gcm-256 decryption operation
20.3.18.3 parameter
20.3.18.4 The
return value is
none.
20.3.19 Example
c b c _ c o n t ex t _ t cb c _ c o n te x t ; cbc_cont
ext.input_key = cbc_ key ; cbc_contex
t.iv = cbc_ iv;
aes_cbc128_hard_encrypt(&cbc_context , aes_ input_ data , 16L, aes_output_data); memcpy
(aes_ input_ data , aes_ output_ data , 16L);
aes_cbc128_hard_decrypt(&cbc_context , aes_ input_ data , 16L, aes_output_data);
20.4.1 aes_cipher_mode_t
20.4.1.1 description
Aes The way to encrypt/decrypt.
20.4.1.2 definition
typedef enum _aes_cipher_mode
{
AES_ ECB = 0 ,
AES_ CBC = 1 ,
AES_ GCM = 2 , A
ES_CIPHER_MAX
} aes_cipher_mode_t;
20.4.1.3 Members
Member description
name
AES_EC Ecb encryption/decryption
Cbc encryption/decryption
B
Gcm encryption/decryption
AES_CB
C
AES_GC
M