Ec20 R2.1 Mini Pcie: Hardware Design
Ec20 R2.1 Mini Pcie: Hardware Design
1 Mini PCIe
Hardware Design
Rev. EC20_R2.1_Mini_PCIe_Hardware_Design_V1.1
Date: 2019-09-10
Status: Released
www.quectel.com
LTE Standard Module Series
EC20 R2.1 Mini PCIe Hardware Design
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History
Woody WU/
1.0 2017-12-22 Initial
Niko WU
1. Added LTE-TDD band B34 (Table 1, 19, 20, 23, 24
and 26).
2. Updated key features of EC20 R2.1 Mini PCIe
module (Table 2).
3. Updated names of pin 3 and 5 from RESERVED to
COEX_UART_RX and COEX_UART_TX
respectively (Figure 2).
4. Updated pin definition and description of
COEX_UART_RX and COEX_UART_TX (Table 4).
Lorry XU/
1.1 2019-09-10 5. Updated reference circuit of USB interface (Figure 5).
Niko WU
6. Added description of COEX UART interface (Chapter
3.6.2).
7. Updated reference circuit of (U)SIM interface with an
8-pin (U)SIM card connector (Figure 7).
8. Updated description of PCM interface (Chapter 3.9).
9. Updated description of W_DISABLE# (Chapter
3.10.3).
10. Added note for antenna requirements (Chapter 5.2).
11. Updated thermal consideration (Chapter 6.6).
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Contents
1 Introduction .......................................................................................................................................... 7
1.1. Safety Information...................................................................................................................... 8
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8 Appendix A References..................................................................................................................... 49
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Table Index
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Figure Index
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1 Introduction
This document defines EC20 R2.1 Mini PCIe module, and describes its air interfaces and hardware
interfaces which are connected with customers’ applications.
This document helps customers quickly understand module interface specifications, electrical
characteristics, mechanical specifications and other related information of the module. To facilitate
application designs, it also includes some reference designs for customers’ reference. The document,
coupled with application notes and user guides, makes it easy to design and set up wireless applications
with EC20 R2.1 Mini PCIe.
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The following safety precautions must be observed during all phases of operation, such as usage, service
or repair of any cellular terminal or mobile incorporating EC20 R2.1 Mini PCIe module. Manufacturers of the
cellular terminal should send the following safety information to users and operating personnel, and
incorporate these guidelines into all manuals supplied with the product. If not so, Quectel assumes no
liability for customers’ failure to comply with these precautions.
Full attention must be given to driving at all times in order to reduce the risk of an
accident. Using a mobile while driving (even with a handsfree kit) causes
distraction and can lead to an accident. Please comply with laws and regulations
restricting the use of wireless devices while driving.
Switch off the cellular terminal or mobile before boarding an aircraft. The operation
of wireless appliances in an aircraft is forbidden to prevent interference with
communication systems. If the device offers an Airplane Mode, then it should be
enabled prior to boarding an aircraft. Please consult the airline staff for more
restrictions on the use of wireless devices on boarding the aircraft.
Cellular terminals or mobiles operating over radio signals and cellular network
cannot be guaranteed to connect in all possible conditions (for example, with
unpaid bills or with an invalid (U)SIM card). When emergent help is needed in such
conditions, please remember using emergency call. In order to make or receive a
call, the cellular terminal or mobile must be switched on in a service area with
adequate cellular signal strength.
The cellular terminal or mobile contains a transmitter and receiver. When it is ON, it
receives and transmits radio frequency signals. RF interference can occur if it is
used close to TV set, radio, computer or other electric equipment.
In locations with potentially explosive atmospheres, obey all posted signs to turn
off wireless devices such as your phone or other cellular terminals. Areas with
potentially explosive atmospheres include fuelling areas, below decks on boats,
fuel or chemical transfer or storage facilities, areas where the air contains
chemicals or particles such as grain, dust or metal powders, etc.
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2Product Concept
2.1. General Description
EC20 R2.1 Mini PCIe module provides data connectivity on LTE-FDD, LTE-TDD, DC-HSDPA, HSPA+,
HSDPA, HSUPA, WCDMA, TD-SCDMA, EVDO, CDMA, EDGE and GPRS networks with PCI Express
Mini Card 1.2 standard interface. It supports embedded operating systems such as Linux, Android, etc.,
and also provides audio, high-speed data transmission and GNSS functionalities for customers’
applications.
EC20 R2.1 Mini PCIe module can be applied in the following fields:
Module Description
NOTES
SS
1. EC20 R2.1 Mini PCIe contains Telematics version and Data-only version. Telematics version
supports voice and data functions, while Data-only version only supports data function.
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1)
2. Rx-diversity function is optional.
2)
3. GNSS function is optional.
3)
4. Digital audio (PCM) function is only supported on Telematics version.
The following table describes the detailed features of EC20 R2.1 Mini PCIe module.
Features Description
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Main UART:
Support RTS and CTS hardware flow control
Baud rate can reach up to 230400bps; 115200bps by default
UART Interfaces
Used for AT command communication and data transmission
COEX UART*:
LTE/WLAN&BT coexistence UART
Support one digital audio interface: PCM interface
GSM: HR/FR/EFR/AMR/AMR-WB
Audio Features WCDMA: AMR/AMR-WB
LTE: AMR/AMR-WB
Support echo cancellation and noise suppression
Support 16-bit linear data format
Support long frame synchronization and short frame synchronization
PCM Interface
Support master and slave modes, but must be the master in long frame
synchronization
Compliant with USB 2.0 specification (slave only); the data transfer rate
can reach up to 480Mbps
Used for AT command communication, data transmission, firmware
USB Interface
upgrade, software debugging, GNSS NMEA output and voice over USB
Support USB serial driver for: Windows 7/8/8.1/10, Linux 2.6/3.x/4.1~4.15,
Android 4.x/5.x/6.x/7.x/8.x/9.x, etc.
Include main antenna, diversity antenna and GNSS antenna receptacle
Antenna Connectors
connectors
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RoHS All hardware components are fully compliant with EU RoHS directive
NOTES
1) Within
1. operation temperature range, the module is 3GPP compliant.
2)
2. Within extended temperature range, the module remains the ability to establish and maintain a
voice, SMS, data transmission, emergency call*, etc. There is no unrecoverable malfunction. There
are also no effects on radio spectrum and no harm to radio network. Only one or more parameters
like Pout might reduce in their value and exceed the specified tolerances. When the temperature
returns to normal operation temperature levels, the module will meet 3GPP specifications again.
3. “*” means under development.
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The following figure shows the block diagram of EC20 R2.1 Mini PCIe.
PCM&I2C GNSS
GNSS
EC20 R2.1 Antenna
Antenna
UART
Interface
Module Connector
(U)SIM Diversity
Diversity
Antenna Antenna
Connector
W_DISABLE#
PERST#
DTR
WAKE#
RI
LED_WWAN#
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3Application Interfaces
The physical connections and signal levels of EC20 R2.1 Mini PCIe comply with PCI Express Mini Card
Electromechanical Specification. This chapter mainly describes the definition and application of the
following interfaces for EC20 R2.1 Mini PCIe:
Power supply
UART interfaces
USB interface
(U)SIM interfaces
PCM and I2C interfaces
Control and Indication signals
The following figure shows the pin assignment of EC20 R2.1 Mini PCIe module. The top side contains
EC20 R2.1 module and antenna connectors.
RI 17 18 GND
RESERVED 19 TOP BOT 20 W_DISABLE#
GND 21 22 PERST#
UART_CTS 23 24 RESERVED
UART_RTS 25 26 GND
GND 27 28 NC
GND 29 PIN51 PIN52 30 I2C_SCL
DTR 31 32 I2C_SDA
RESERVED 33 34 GND
GND 35 36 USB_DM
GND 37 38 USB_DP
VCC_3V3 39 40 GND
VCC_3V3 41 42 LED_WWAN#
GND 43 44 USIM_PRESENCE
PCM_CLK 45 46 RESERVED
PCM_DOUT 47 48 NC
PCM_DIN 49 50 GND
PCM_SYNC 51 52 VCC_3V3
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The following tables show the pin definition and description of the 52 pins on EC20 R2.1 Mini PCIe.
Type Description
DI Digital Input
DO Digital Output
IO Bidirectional
OC Open Collector
PI Power Input
PO Power Output
It is prohibited
LTE/WLAN&BT to be pulled up
5 RESERVED COEX_UART_TX 1) DO
coexistence signal to high level
before startup.
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(U)SIM card
Fundamental reset
22 PERST# PERST# DI Active low.
signal
Connect to
23 PERn0 UART_CTS DI UART clear to send
DTE’s RTS.
Connect to
25 PERp0 UART_RTS DO UART request to send
DTE’s CTS.
Require
30 SMB_CLK I2C_SCL DO I2C serial clock external
pull-up to 1.8V.
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Require
32 SMB_DATA I2C_SDA IO I2C serial data external
pull-up to 1.8V.
Require
differential
36 USB_D- USB_DM IO USB differential data (-)
impedance of
90Ω.
Require
differential
38 USB_D+ USB_DP IO USB differential data (+)
impedance of
90Ω.
3.0V~3.6V, typically 3.3V
39 3.3Vaux VCC_3V3 PI
DC supply
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PCM frame
51 RESERVED PCM_SYNC 2) IO
synchronization
3.0V~3.6V, typically 3.3V
52 3.3Vaux VCC_3V3 PI
DC supply
NOTES
1)
1. LTE/WLAN&BT coexistence UART function is under development.
2)
2. The digital audio (PCM) function is only supported on Telematics version.
3. Keep all NC, reserved and unused pins unconnected.
The following table briefly outlines the operating modes to be mentioned in the following chapters.
Mode Details
EC20 R2.1 Mini PCIe is able to reduce its current consumption to a minimum value in sleep mode. There
are three preconditions must be met to make the module enter sleep mode.
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The host’s USB bus, which is connected with the module’s USB interface, enters suspend state.
When the module enters airplane mode, the RF function will be disabled, and all AT commands related to
it will be inaccessible. For more details, please refer to Chapter 3.10.3.
The typical supply voltage of EC20 R2.1 Mini PCIe is 3.3V. In the 2G network, the input peak current may
reach 2.7A during the transmitting time. Therefore, the power supply must be able to provide a rated
output current of 2.7A at least, and a bypass capacitor of no less than 470µF with low-ESR should be
used to prevent the voltage from dropping.
The following figure shows a reference design of power supply where R2 and R3 are 1% tolerance
resistors and C3 is a low-ESR capacitor.
MIC29302WU U1
LDO_IN VCC_3V3
2 IN OUT 4
GND
ADJ
EN
D1 R1 R2
C1 C2
82K 1% R4
1
R5 47K 1%
4.7K
MCU_POWER R6
_ON/OFF 47K
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EC20 R2.1 Mini PCIe provides one main UART interface and one COEX UART interface.
The main UART interface supports 9600bps, 19200bps, 38400bps, 57600bps, 115200bps and
230400bps baud rates, and the default is 115200bps. This interface supports RTS and CTS hardware
flow control, and can be used for AT command communication and data transmission.
The following table shows the pin definition of the main UART interface.
The signal level of main UART interface is 3.3V. When connecting to the peripheral MCU/RAM,
customers need to pay attention to the signal direction. The reference circuit is as follows:
MCU/ARM Module
TXD UART_TXD
RXD UART_RXD
RTS UART_RTS
CTS UART_CTS
GND GND
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The following table shows the pin definition of the COEX UART interface.
NOTES
1. AT+IPR command can be used to set the baud rate of the main UART, and AT+IFC command can be
used to set the hardware flow control (hardware flow control is disabled by default). Please refer to
document [2] for details.
2. “*” means under development.
EC20 R2.1 Mini PCIe provides one integrated Universal Serial Bus (USB) interface which complies with
USB 2.0 specification. It can only be used as a slave device. Meanwhile, it supports high speed (480Mbps)
mode and full speed (12Mbps) mode. The USB interface is used for AT command communication, data
transmission, GNSS NMEA output, software debugging, firmware upgrade and voice over USB.
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Test Points
Minimize these stubs
Module MCU
R3 NM_0R
R4 NM_0R
L1 USB_DM
USB_DM
USB_DP USB_DP
A common mode choke L1 is recommended to be added in series between the module and customer’s
MCU in order to suppress EMI spurious transmission. Meanwhile, the 0Ω resistors (R3 and R4) should be
added in series between the module and the test points so as to facilitate debugging, and the resistors are
not mounted by default. In order to ensure the integrity of USB data line signal, L1/R3/R4 components
must be placed close to the module, and also R3 and R4 should be placed close to each other. The extra
stubs of trace must be as short as possible.
Please follow the requirements below during USB interface design so as to meet USB 2.0 specification.
It is important to route the USB signal traces as differential pairs with total grounding. The impedance
of USB differential trace is 90Ω.
Do not route signal traces under crystals, oscillators, magnetic devices or RF signal traces. It is
important to route the USB differential traces in inner-layer with ground shielding on not only upper
and lower layers but also right and left sides.
Special attention should be paid to the selection of ESD device on the USB data line. Its parasitic
capacitance should not exceed 2pF and should be placed as close as possible to the USB interface.
EC20 R2.1 Mini PCIe’s (U)SIM interface circuitry meets ETSI and IMT-2000 requirements. Both 1.8V and
3.0V (U)SIM cards are supported. The following table shows the pin definition of the (U)SIM interface.
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EC20 R2.1 Mini PCIe supports (U)SIM card hot-plug via the USIM_PRESENCE pin. The function
supports low level and high level detections. By default, It is disabled, and can be configured via
AT+QSIMDET command. Please refer to document [2] for details about the command.
The following figure shows a reference design for (U)SIM interface with an 8-pin (U)SIM card connector.
USIM_VDD
100nF
Module
15K
(U)SIM Card Connector
GND
USIM_VDD VCC GND
USIM_RST 0R RST VPP
USIM_CLK 0R IO
CLK
USIM_PRESENCE
0R
USIM_DATA
GND
33pF 33pF 33pF
GND GND
Figure 6: Reference Circuit of (U)SIM Interface with an 8-pin (U)SIM Card Connector
If (U)SIM card detection function is not needed, please keep USIM_PRESENCE unconnected. A
reference circuit for (U)SIM interface with a 6-pin (U)SIM card connector is illustrated in the following
figure.
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USIM_VDD 100nF
Module
15K
GND (U)SIM Card Connector
USIM_DATA 0R
GND GND
Figure 7: R Reference Circuit of (U)SIM Interface with a 6-pin (U)SIM Card Connector
In order to enhance the reliability and availability of the (U)SIM card in customers’ applications, please
follow the criteria below in (U)SIM circuit design:
Keep placement of (U)SIM card connector to the module as close as possible. Keep the trace length
as less than 200mm as possible.
Keep (U)SIM card signals away from RF and power supply traces.
To avoid cross-talk between USIM_DATA and USIM_CLK, keep them away from each other and
shield them with surrounded ground.
In order to offer good ESD protection, it is recommended to add a TVS diode with parasitic
capacitance not exceeding 15pF.
The 0Ω resistors should be added in series between the module and the (U)SIM card connector so
as to facilitate debugging. The 33pF capacitors are used for filtering interference of EGSM900.
Please note that the (U)SIM peripheral circuit should be close to the (U)SIM card connector.
The pull-up resistor on USIM_DATA line can improve anti-jamming capability when long layout trace
and sensitive occasion are applied and should be placed close to the (U)SIM card connector.
EC20 R2.1 Mini PCIe provides one Pulse Code Modulation (PCM) digital interface and one I2C interface.
The following table shows the pin definition of PCM and I2C interfaces that can be applied in audio codec
design.
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EC20 R2.1 Mini PCIe provides one PCM digital interface, which supports 16-bit linear data format and the
following modes:
In primary mode, the data is sampled on the falling edge of the PCM_CLK and transmitted on the rising
edge. The PCM_SYNC falling edge represents the MSB. In this mode, the PCM interface supports
256kHz, 512kHz, 1024kHz or 2048kHz PCM_CLK at 8kHz PCM_SYNC, and also supports 4096kHz
PCM_CLK at 16kHz PCM_SYNC. The following figure shows the timing relationship in primary mode with
8kHz PCM_SYNC and 2048kHz PCM_CLK.
125us
PCM_SYNC
PCM_DOUT
PCM_DIN
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In auxiliary mode, the data is sampled on the falling edge of the PCM_CLK and transmitted on the rising
edge. The PCM_SYNC rising edge represents the MSB. In this mode, the PCM interface operates with a
256kHz, 512kHz, 1024kHz or 2048kHz PCM_CLK and an 8kHz, 50% duty cycle PCM_SYNC. The
following figure shows the timing relationship in auxiliary mode with 8kHz PCM_SYNC and 256kHz
PCM_CLK.
125us
PCM_CLK 1 2 31 32
PCM_SYNC
MSB LSB
PCM_DOUT
MSB LSB
PCM_DIN
Clock and mode can be configured by AT command, and the default configuration is master mode using
short frame synchronization format with 2048kHz PCM_CLK and 8kHz PCM_SYNC. In addition, EC20
R2.1 Mini PCIe’s firmware has integrated the configuration on some PCM codec’s application with I2C
interface. Please refer to document [2] for details about AT+QDAI command.
The following figure shows a reference design of PCM interface with an external codec IC.
MIC_BIAS
PCM_CLK BCLK
PCM_SYNC FS MIC+
BIAS
SPKOUT+
I2C_SCL SCLK
I2C_SDA SDIN SPKOUT-
Module Codec
2.2K
2.2K
1.8V
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NOTE
The following table shows the pin definition of control and indication signals.
3.10.1. RI Signal
The RI signal can be used to wake up the host. When a URC returns, there will be the following behaviors
on the RI pin after executing AT+QCFG="risignaltype","physical".
120ms
High
Low
URC return
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The DTR signal is used for sleep mode control. It is pulled up by default. When module is in sleep mode,
driving it to low level can wake up the module. For more details about the preconditions for module to
enter sleep mode, please refer to Chapter 3.4.1.
EC20 R2.1 Mini PCIe provides a W_DISABLE# signal to disable or enable the RF function (GNSS not
included). The W_DISABLE# pin is pulled up by default. Its control function for airplane mode is disabled
by default, and AT+QCFG=“airplanecontrol”,1 can be used to enable the function. Driving it to low level
can make the module enter airplane mode.
Software method can be controlled by AT+CFUN, and has the same effect with W_DISABLE# signal
function, the details are as follows.
The PERST# signal can be used to force a hardware reset on the card. Customers can reset the module
by driving PERST# signal low for 150ms~460 and then releasing it. The reset scenario is illustrated in the
following figure.
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VCC_3V3
≤460ms
≥150ms
PERST# VIH≥2.3V
VIL≤0.5V
The LED_WWAN# signal of EC20 R2.1 Mini PCIe is used to indicate the network status of the module,
and can absorb a current up to 40mA. According to the following circuit, in order to reduce the current of
the LED, a resistor must be placed in series with the LED. The LED is emitting light when the
LED_WWAN# output signal is low.
LED_WWAN# R
VCC
There are two indication modes for LED_WWAN# signal to indicate network status, which can be
switched through following AT commands:
The following tables show the detailed network status indications of the LED_WWAN# signal.
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The WAKE# signal is an open collector signal which is similar to RI signal, but a host pull-up resistor and
AT+QCFG="risignaltype","physical" command are required. When a URC returns, a 120ms low level
pulse will be outputted. The state of WAKE# signal is shown as below.
120ms
High
(external
pull-up)
Low
URC return
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4 GNSS Receiver
4.1. General Description
EC20 R2.1 Mini PCIe includes a fully integrated global navigation satellite system solution that supports
Qualcomm Gen8C Lite (GPS, GLONASS, BeiDou/Compass, Galileo and QZSS). Additionally, it supports
standard NMEA-0183 protocol, and outputs NMEA sentences at 1Hz data update rate via USB interface
by default.
By default, EC20 R2.1 Mini PCIe GNSS engine is switched off. It has to be switched on via AT command.
For more details about GNSS engine technology and configurations, please refer to document [3].
Autonomous 35 s
Cold start
@open sky
XTRA enabled 18 s
Autonomous 26 s
TTFF Warm start
(GNSS) @open sky
XTRA enabled 2.2 s
Autonomous 2.5 s
Hot start
@open sky
XTRA enabled 1.8 s
Accuracy Autonomous
CEP-50 <2.5 m
(GNSS) @open sky
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NOTES
1. Tracking sensitivity: the minimum GNSS signal power at which the module can maintain lock (keep
positioning for at least 3 minutes continuously).
2. Reacquisition sensitivity: the minimum GNSS signal power required for the module to maintain lock
within 3 minutes after loss of lock.
3. Cold start sensitivity: the minimum GNSS signal power at which the module can fix position
successfully within 3 minutes after executing cold start command.
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5 Antenna Connection
5.1. Antenna Connectors
EC20 R2.1 Mini PCIe is mounted with three antenna connectors for external antenna connection: a main
antenna connector, an Rx-diversity antenna connector, and a GNSS antenna connector. And Rx-diversity
function is enabled by default. The impedance of the antenna connectors is 50Ω.
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The following table shows the requirements on main antenna, Rx-diversity antenna and GNSS antenna.
Type Requirements
NOTE
Since the GNSS port has a 2.85V voltage output, a passive antenna that causes shorting to GND, such
as PIFA antenna is not recommended.
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EC20 R2.1 Mini PCIe is mounted with RF connectors (receptacles) for convenient antenna connection.
The dimensions of the antenna connectors are shown as below.
U.FL-LP mating plugs listed in the following figure can be used to match the receptacles.
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For more details of the recommended mating plugs, please visit http://www.hirose.com.
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This chapter mainly describes the following electrical and radio characteristics of EC20 R2.1 Mini PCIe:
The input voltage of EC20 R2.1 Mini PCIe is 3.0V~3.6V. The following table shows the power supply
requirements of EC20 R2.1 Mini PCIe.
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The following table shows the I/O requirements of EC20 R2.1 Mini PCIe.
NOTES
S
1. The PCM and I2C interfaces belong to 1.8V power domain and other I/O interfaces belong to
VCC_3V3 power domain.
2. The maximum voltage value of VIL for PERST# signal and W_DISABLE# signal is 0.5V.
6.4. RF Characteristics
The following tables show the conducted RF output power and receiving sensitivity of EC20 R2.1 Mini
PCIe module.
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The following table shows the ESD characteristics of EC20 R2.1 Mini PCIe.
In order to achieve better performance of the module, it is recommended to comply with the following
principles for thermal consideration:
On customers’ PCB design, please keep placement of the PCI Express Mini Card away from heating
sources.
Do not place components on the PCB area where the module is mounted, in order to facilitate adding
of heatsink.
Do not apply solder mask on the PCB area where the module is mounted, so as to ensure better heat
dissipation performance.
The reference ground of the area where the module is mounted should be complete, and add ground
vias as many as possible for better heat dissipation.
Add a heatsink on the top of the module and the heatsink should be designed with as many fins as
possible to increase heat dissipation area. Meanwhile, a thermal pad with high thermal conductivity
should be used between the heatsink and module.
Add a thermal pad with appropriate thickness at the bottom of the module to conduct the heat to
PCB.
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Shielding Cover
Thermal Pad
PCI Express Mini Card Connector
Application Board
Application Board
NOTES
1. The module offers the best performance when the internal BB chip stays below 105°C. When the
maximum temperature of the BB chip reaches or exceeds 105°C, the module works normal but
provides reduced performance (such as RF output power, data rate, etc.). When the maximum BB
chip temperature reaches or exceeds 115°C, the module will disconnect from the network, and it will
recover to network connected state after the maximum temperature falls below 115°C. Therefore, the
thermal design should be maximally optimized to make sure the maximum BB chip temperature
always maintains below 105°C. Customers can execute AT+QTEMP command and get the
maximum BB chip temperature from the first returned value.
2. For more detailed guidelines on thermal design, please refer to document [4].
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LTE-TDD @PF=256
3.85 mA
(USB disconnected)
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This chapter mainly describes mechanical dimensions as well as packaging specification of EC20 R2.1
Mini PCIe module. All dimensions are measured in millimeter (mm), and the dimensional tolerances are
±0.05mm unless otherwise specified.
30.00±0.15
24.20±0.20
8.25±0.10
3x3.00±0.10 5.98±0.10
5.45±0.10
6.38±0.10 2xΦ2.60±0.1
0.61±0.05
6.35±0.10 2.35±0.10
34.30±0.20 50.95±0.15
48.05±0.20
1.40±0.10
4.90±0.20
9.90±0.10
10.35±0.10 7.26±0.10
4.00±0.10
1.00±0.10
Pin1 Pin51
Top View Side View
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The following figure shows the standard dimensions of Mini PCI Express. Please refer to document [1]
for Detail A and Detail B.
EC20 R2.1 Mini PCIe adopts a standard Mini PCI Express connector which compiles with the directives
and standards listed in document [1]. The following figure takes the Molex 679100002 as an example.
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Figure 21: Dimensions of the Mini PCI Express Connector (Molex 679100002)
EC20 R2.1 Mini PCIe modules are packaged in a tray. Each tray contains 10 modules. The smallest
package of EC20 R2.1 Mini PCIe contains 100 modules.
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8Appendix A References
Table 28: Related Documents
PCI Express Mini Card Electromechanical PCI Express Mini Card Electromechanical
[1]
Specification Revision 1.2 Specification
Abbreviation Description
CS Coding Scheme
DL Down Link
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FR Full Rate
HR Half Rate
ME Mobile Equipment
MO Mobile Originated
MT Mobile Terminated
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RF Radio Frequency
Rx Receive Direction
TX Transmitting Direction
UL Up Link
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