Electronics Casebook

of
• • •

lrCUI

Published by

Electronics
A McGraw-Hill Publication

14-6
Price $2.00/ Printed in U.S.A.
Foreword
This first edition of Electronics' Casebook of Circuit Design
provides the reader with novel circuit ideas and packaging
schemes - furnishes him with solutions to unusual design
problems.

The new handbook will also serve as a text and reference for
many years to come.We hope it takes its place as a welcome
addition to your technical library.

The author of each article is an able technologist with a special

skill.His talents have led him to design something a little better
and a little different ... perhaps a lot better and a lot different.
But most important, the author has allowed the reader to
benefit from his experiences and share his knowledge.

The material in this book - carefully selected from recent

issues of Electronics - represents uncounted hours of work
both in developing the equipment and in gathering informa­
tion that electronics engineers need to do their work more
efficiently.

That book is good that stimulates new applications of elec­

tronic techniques.We hope our new casebook provides such
stimulation.

The editors of Electronics

 Table of Contents

DESIGNER'S CASEBOOK Pages

Bias control a nd low parasitics shorten a m p l ifier rise time. . . . . . . . . . . . . . . . . . 7
Powe r su pply red uces ripple by varying series resista n ce. . . . . . . . . . . . . . . . . . . . 8
O ne-shot m u ltivibrator with zero recovery time. . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Fast- pulse a m plifier d rives 50-ohm load. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Tu n nel-d i ode pu lser measu res ca ble delay. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Fast-pu lse generator tests digital circ u it delay. . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Sim ple mercury relay circ u it develops single clean p u lse. . . . . . . . . . . . . . . . . . . . 13
Two u n ijunction transistors produce th ree-state circu it. . . . . . . . . . . . . . . . . . . . . 14
Electro n ic thermostat controls temperatu re to with i n 0. 1 oc. . . . . . . . . . . . . . . . . 14
B readboard ing I C systems with color-coded mod ules. . . . . . . . . . . . . . . . . . . . . . 16
Cu rves speed design of m u ltip l ier circuits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Overload protection for d·c amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Latching gate removes counter am bigu ity. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Delay circuit varies tu rn-off, turn -on. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Tra nsistors control smal l d-e motor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
FET converts transducer for use i n a-c bridge . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Charge feed back i ncreases pu lse-rate meter accuracy. . . . . . . . . . . . . . . . . . . . . . 23
Low-cost emitter-follower exte nds voltmeter's range. . . . . . . . . . . . . . . . . . . . . . . 25
Adapter for curve tracer tests FET's at h igh voltage. . . . . . . . . . . . . . . . . . . . . . . 26
H ig h-speed level sh ifter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Low-cu rrent ala rm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Therm istor regulator provides fast response. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Adjusta ble cu rrent l i m iter for reg u lated power supply. . . . . . . . . . . . . . . . . . . . . . 29
Voltage spl itter ba lances floating power supply. . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Bistable m u ltivibrator i m m u ne to noise. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
D-e converter circuit uses capacitors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
H ig h voltage, high cu rrent i n electro-optic mod u lator. . . . . . . . . . . . . . . . . . . . . . 32
Li near a m pl ifier circ u it elimi nates transformers. . . . . . . . . . . . . . . . . . . . . . . . . . 33
Two u n iju n ctions form low-cost level detector. . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Exclusive OR circuit req u i res n o voltage supply. . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Single component cha nges ba ndpass i nto genera l fi lter . . . . . . . . . . . . . . . . . . . . 35
Diode quad mod u l ator suppresses carrier 65 d b. . . . . . . . . . . . . . . . . . . . . . . . . . 37
Audio d iscrimi nator measures large freq uency changes. . . . . . . . . . . . . . . . . . . . 38
C l i p couples neon osci l lators. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
No mov i ng parts i n auto tachometer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
S i m u lator circuit generates video or noise pulses. . . . . . . . . . . . . . . . . . . . . . . . . 40
Sil icon switch turns off sta l led servomotors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
D-e logarithm ic amplifier com presses i n put cu rrent. . . . . . . . . . . . . . . . . . . . . . . 43
Gate varies rewa rds from teach i ng machi ne. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Low-pass amplifier with adjustable bandwidth. . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Capacitor charg i ng controls variable ra m p generator. . . . . . . . . . . . . . . . . . . . . . 47
B iasi ng with FET for low d rift. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Zener d iode allows delay without large capacitors. . . . . . . . . . . . . . . . . . . . . . . . . 49
One-megahertz flip-flop saves sta ndby power. . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Circuit protects meter from periodic cu rrent spi kes. . . . . . . . . . . . . . . . . . . . . . . . 52
Low-drift cu rrent generator com pensates for temperatu re. . . . . . . . . . . . . . . . . . . 52
Direct-cou pled amplifier cuts cost of d-e voltmeter. . . . . . . . . . . . . . . . . . . . . . . . 53
Diode and resistor i nc rease i n put resista nce of Sch m itt. . . . . . . . . . . . . . . . . . . . 54
Control i s accu rate to the 0.01 oc. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Feed back choke red uces power supply ripple. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
 Pages
Modified tape recorder stores tim i ng signals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Diode lowers m u lti 's reset power level. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Period of sawtooth ra m p extends to 5 hou rs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Sq uare-law detector has 40-db dynamic range. . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Tra nsistors replace diodes i n mil l iohmmeter circu it. . . . . . . . . . . . . . . . . . . . . . . . 63
No pulse-form ing network i n scr trigger generator. . . . . . . . . . . . . . . . . . . . . . . . 63
Scr bridge inverter elim inates tra nsformers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Feed back improves paral lei-T fi lter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Triangle waveform generator resets automatical ly. . . . . . . . . . . . . . . . . . . . . . . . . 66
H ig h MOS i m pedance benefits pH measurement. . . . . . . . . . . . . . . . . . . . . . . . . . 67
AND gate protects system should the voltage fa il. . . . . . . . . . . . . . . . . . . . . . . . . 67
Low-cost strobe bu ilt with scr i n trigger. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Series gating red uces components i n cou nter. . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
U n ij u nction controls spacing between pu lses. . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Fu l l-wave detector without transformer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
M u ltivi brator controls sing le-diode gate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Diffe rential d i scri m i nator rejects com mon-mode noise. . . . . . . . . . . . . . . . . . . . . 73
M u ltivi brator provides contin uous phase control. . . . . . . . . . . . . . . . . . . . . . . . . . 74
I ntegrated circu its q u ickly assembled. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Series reg ulator gives overload protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Hydrophone p ream p l ifier cuts ca ble noise. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Two events, i n seq uence, produce detector output. . . . . . . . . . . . . . . . . . . . . . . . 78
Transmission l i nes cou ple multi ple-driver receivers. . . . . . . . . . . . . . . . . . . . . . . . 79
FET i nsures sta ble sawtooth wave. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Converting audio oscil lators to sq uare-wave generators. . . . . . . . . . . . . . . . . . . . 81
Di rect cu rrent reg ulator d rives fluorescent lam ps. . . . . . . . . . . . . . . . . . . . . . . . . 82
Therm istor measures negative resista nce to tu n nel diode. . . . . . . . . . . . . . . . . . . 83
Ferrite cyl i nder mod u lates m icrowave signals. . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Glass reed switch controls operational a m pl ifier. . . . . . . . . . . . . . . . . . . . . . . . . . 85
Pulsed oscillator conserves power. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Ampl ifier provides 10 15-ohm i n put resistan ce . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Sawtooth generator d rives cathode-ray tu be. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
I nterlock protects display tube. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
M u ltira nge d-e voltmeter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Fa i l-safe freq uency divider. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
FET' s prod uce sta ble oscil lators. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
Switch i ng amplifier converts u n i polar to bipolar pulses. . . . . . . . . . . . . . . . . . . . 93
Detector stores peaks of video bu rsts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Circuit sam ples a signal, holds it u p to 1 m i n ute. . . . . . . . . . . . . . . . . . . . . . . . . . 96
FET stabilizes amplitude of Wien bridge oscil lator. . . . . . . . . . . . . . . . . . . . . . . . 97
I C a m plifier provides variable refere nce voltage. . . . . . . . . . . . . . . . . . . . . . . . . . 98
Reducing transie nts i n switched inductive toads. . . . . . . . . . . . . . . . . . . . . . . . . . 98
Loga rith m ic ampl ifier has 66-d b range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Low-freq uency osci llator suppl ies high pulse power. . . . . . . . . . . . . . . . . . . . . . . 100
Cross-cou pled transistors form ba la nced m ixer. . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Tra nsistor switch for clickless keyi ng. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 02
Ampl ifiers and triggers simulate blood pressure. . . . . . . . . . . . . . . . . . . . . . . . . . 1 02
H ig h-speed wideband gate provides 70-db isolation. . . . . . . . . . . . . . . . . . . . . . . . 103
Suppressed carrier modu lator with noncritical components. . . . . . . . . . . . . . . . . . 104
Pulse circu it fires scr pair. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
Front-end nuvistor lowers transistor a m pl ifier noise. . . . . . . . . . . . . . . . . . . . . . . . 105
Voltage-control led m u lti produces tria ngular output. . . . . . . . . . . . . . . . . . . . . . . 106
Freq uency-mod u lated output from low-cost u n ijunction. . . . . . . . . . . . . . . . . . . . 108
Tu n i ng fork drives portable freq uency sta ndard. . . . . . . . . . . . . . . . . . . . . . . . . . 1 08

contin ued
 Pages
Diode bias replaces batteries i n logarithmic converter. . . . . . . . . . . . . . . . . . . . . 109
Lig ht-sensitive FET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 10
U n ij u n ction memory stores u ntil readout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
Wa rn i ng lights mon itor d-e su pply voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
Tu n nel diodes lock output of servoci rcu it. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 12
Age circuit possesses 60-decibel gai n. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 13
Add ing tra nsistors makes voltage shifter adj ustable. . . . . . . . . . . . . . . . . . . . . . . 1 14
B i polar pu lse generator tests fast fli p-flops. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 15
Zener d iode controls va riable phase shifter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
Emitter follower enhances oscil lator's freq uency variation . . . . . . . . . . . . . . . . . . 1 17
Neon tube sta ircase generator performs two jobs . . . . . . . . . . . . . . . . . . . . . . . . . 1 18
Switch converts m u ltivi brator from asta ble to one-shot. . . . . . . . . . . . . . . . . . . . 1 20
Feed back turns fixed capacitor i nto va riable capacita nce. . . . . . . . . . . . . . . . . . . 1 20
Age a m pl ifier handles 60-d b range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
Time will tel l how fast a motor revs u p. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
Scr trigged by capacitor lowers cost of oven control. . . . . . . . . . . . . . . . . . . . . . . 1 23
Forwa rd feed stabil izes d-e d ifferential a m pl ifier. . . . . . . . . . . . . . . . . . . . . . . . . . 1 24
Modified fli p-flop quadruples fan -out. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
Novel sweep c i rcuit e l i m i nates ra mp pedestal . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 26
Gated m u ltivibrator output provides constant pu lse width . . . . . . . . . . . . . . . . . . . 1 27
Modified decade counter e l i m i nates components. . . . . . . . . . . . . . . . . . . . . . . . . 1 28
Tu n ne l-d iode sensor protects reg ulator from short c i rcu it. . . . . . . . . . . . . . . . . . . 1 29
I solati ng transistor improves one-shot. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130

REFERENCE SHEETS
Nomograph simpl ifies desig n of f-m/f-m telemetry syste ms. . . . . . . . . . . . . . . . 131
Nomogra phs calcu late val ues for twin-T notch fi lter. . . . . . . . . . . . . . . . . . . . . . . 134
Charting the bandwidth of isolating r·f chokes. . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
Nomograph finds output voltage error. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
Cu rves opti mize lead im pedance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140
Graphs reveal reasons for h igh cost of mai ntena nce. . . . . . . . . . . . . . . . . . . . . . . 142

CIRCUIT DESIGN
Powerful logic from power-less ci rcuits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145
Using tra nsistor circu its to m u lti ply a nd d ivide . . . . . . . . . . . . . . . . . . . . . . . . . . . 149
Getting the most out of feed back. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156
Pa i ring Sch m itt triggers produces lower hysteresis and faster switching . . . . . . . . 163
Scattering parameters speed design of h igh-freq uency transistor c i rcuits. . . . . . . 168
Analyzi ng networks with state varia bles. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 79
Ringing choke simplifies d-e to d-e conversion. . . . . . . . . . . . . . . . . . . . . . . . . . . . 187
Topology cuts design d rudgery. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190
FET's ca l l the tune i n active fi lter desig n . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200

SOLID STATE
I m provi ng the pe rformance of m u ltipu rpose IC's with feed back. . . . . . . . . . . . . . 204
Off-the-shelf i ntegrated c i rcu its for versatile and accu rate timer . . . . . . . . . . . . . . 208

INSTRUMENTATION
Six cl ues to nanovolt signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1 2
Correlation ente ring new fields with rea l-time signal a nalysis. . . . . . . . . . . . . . . . 2 1 5
Low-freque ncy noise pred icts when a transistor will fa i l . . . . . . . . . . . . . . . . . . . . 222
Circu it desig n

Designer's casebook

12V
Bias control a nd low parasitics r-------�-
vee

shorten a mplifier rise time

B y D .D . Mcleod
United K i ngdom Atomic Energy Authority,
Aldermaston, England

The pulse amplifier at the right achieves fast rise

PULSE
time by precise bias control at transistor Q:! without INPUT
introducing parasitics in the input signal line.
50
The circuit meets the following two design re­
quir('ments. First, the input stage must be biased to
provide the highest gain-bandwidth product, fT. At
this frequ<'ncy, the current gain f3 of the transistor
is unity. T1w typical fT characteristics shown be­ Fast-rise-time pu lse amplifier uses a low-frequency
low are a family of constant contours, which are transistor Ql to stabilize the bias of Q� without
a function of col1ector voltage and current. To estab­ req u i ring many components, which might add
lish transistor operation at a particular value of fT, parasitic reactances at the base of Q2.
The circuit is biased to provide a high value of
the current and the voltage at the transistor ter­ gain-bandwidth product.
minals must be stabilized.
Secondly, the circuit must be arranged to mini­
mize parasitics such as stray capacitance and series 15
lead inductance. As an example, in a grounded
emitter stag(• the input signal should not go through
a decoupling capacitor to reach ground. In addi­
f2
tion, the number of bias resistors connected to the
base of the signal input transistor should be kept
to a minimum.
Transistor Q:? is a high-frequency type and is rJ) 9
1-
....1
used as the fast-rise-time amplifier. The trans­ 0
>
admittance of this stage is approximately 1/ R6• Re­ I
sistance RH and the parallel compensating capacitor >u 6
C-t are the only extra series components in the
signal channel. Only a single resistor, R3, is used
to maintain the collector current of Q:! at the re­ 3
quired level. As a result the shunt parasitic ca­
pacitance is very small.
Q1 is a low-frequency transistor which operates
as a d-e amplifier to bias Q2• Resistance R3 in Q1's
0.1 0.5 5 10 50 100
collector isolates the signal circuit from the bias
Ic - Mo
circuit. The decoupling network, consisting of C1
and R:!, allows other stabilized stages similar to Curves of constant gain-bandwidth product for transistor
Qa are given as a function of the voltage and current
Q1 and Q2 to be connected to the same zener. at the collector. Since a fast rise time requires
The stabilization of voltage and current at Q2 a large bandwidth, the transistor stage must
may be analyzed in the following manner: operate at the largest value of fT.

7
 Assuming that the d-e emitter current of Q1 is For the values of resistance and current gain used
much smaller than the collector current of Q2, then in this circuit, the first term in the denominator is
base current lb1 of Q1 is approximately very small compared to R4 and may be ignored.
(V. - V.bt) - lc2 R.
Hence, the collector current is relatively independ­
I bl - (1)
Rin
_
ent of the transistor parameters and may be con­
sidered stabilized.
where V. = the zener-diode voltage = 3.3 volts
vebl = is the base-to-emitter voltage drop
The collector voltage of Q2 is

Ie2 = is the collector current in Q2 R. + R,

Vc2 = Vee - (V. - Vebt) R4
(4)
Rin = the input impedance of Q1 + R2 = 5,000
ohms when Ie� = 100 #Lamps
Ie� = emitter current of Qt Since the supply voltage is assumed stabilized,
equation 4 indicates that the collector voltage is
Since the collector current of Q1 is the base current also relatively independent of transistor parameters.
Ib2 of transistor Q2 then: Equation 4 also indicates that the value of Ve2 may
Ic2 = #2 Ib2 = #2 fJ1 I b1 (2) be established by the collector supply, Vee· Collec­
where /31 and {32 are the current gains of transistors tor current, Ic2, is set independently by Vz and R.
Q1 and Q2, respectively. and allows a particular fT contour to be selected.
Evaluation of equations 3 and 4 show that
le2 = 10 rna
Substituting equation 2 into 1:

(3) Vc2 = 5. 7 volts.

These values bias Q2 on the maximum fT contour.

A conventional full-wave rectifier, Dt and D2,

Power supply reduces ripple followed by a capacitor filter supplies power to the
regulator circuit. A portion of the a-c ripple ap­
by va rying series resistance pearing across Ct and C2 is fed to the base of Q1
through Ca and Rt. Transistor Q1 inverts this ripple
voltage, and applies it to the bases of the series
By Richard E. R isely* regulator transistors Qa and Q•.
Motorola Co., Riverside, Calif. Because of the phase relationship between the
ripple at the bases and at the collectors the com­
Reduced ripple and good regulation is obtained in bined series resistance of Qa and Q. is decreased or
the inexpensive, regulated supply shown below. increased, depending on whether the ripple voltage
Costing less than $15, the circuit is useful for in­ at the collectors is going more positive or more
dustrial or commercial applications that require negative, respectively, than -12V. The change in
high performance at low cost. resistance compensates for the change in voltage
Now with The Marquardt Corp., Pomona, Calif.
• level caused by the ripple. As a result the amplitude

D1 04
1 N4001 2N554

03
- c2 I N 963B 12 VOLTS
1000
+ 25V O TO 1 AMP
- cl
1000
+ 25V

02
tN400t
Low cost d-e supply reduces the ripple at the output by controlling the d·c
resistance of series regulator transistors Q. and Q, with the ripple voltage.

8
 2.5 12
I 1 = 0 MA
I
I
2.0 I
I /I= 600 MA REGULATION
I /
I /
1 /
1 /
/
� 1•1000 MA

0
c:
-t
.... ..,
z c:
..... -t
(.) 1
a:
w
0 :!!
0.. ..,
..,
I r-
� -0.5
,
I
t= E
c
_, r-
::;,
(!) -1.0 !::
w <
a: 0
r-
-t
-1.5
en
::u

}
E
en
2 .0
1•1000 MA

2.5
I= 600 MA RIPPLE

3.0 I• 300 MA

0
- 40 -30 - 20 - 10 0 10 20 30 40 50 60
AMBIENT TEMPERATURE, •c

Load regulation and ripple are shown as a function of temperature. Over a temperature
range from 15° C to 35° C the regu lation is better than 0. 1 %-

of the ripple at the output is reduced and held be­ transistors. At room temperatures, the output volt­
low 10 millivolts root mean square over a wide age will not vary by more than 0.1 % if the load
temperature range. current is varied from 0 to 1 amperes. However,
As in an ordinary supply, the regulator also because no temperature compensation is used the
maintains the d-e output level, by sensing the regulation varies 2% over a temperature range from
changes in the output voltage through zener diode, -4occ to 60°C. Curves above show the ripple and
Da, and controlling the resistance of the regulating load regulation.

recharge the timing capacitor C2• Recovery takes

One-shot multivibrator place during the trigger input.
A 20-nanosecond positive trigger pulse will turn
with zero recovery time Q1 on, lower its collector 5 volts, and hold the base
at -4 volts for 20 nanoseconds. During this time,
Q3 is off, but Q2 has been turned on by Q1 and the
By Peter T. Rux energy in C2 has charged C1 to 4 volts. When the
trigger drops to zero, 03 is reverse-biased and C2
begins discharging through � and R5 until the base
Monmouth, Ore.

of Qa is 0.6 volt positive. This turns Q3 back on

and resets the multivibrator.
This monostable multivibrator circuit is useful for D2 and the combination of Rt and Dt provide
converting digital data in an RZ format (return to a low impedance path to recharge C1 rapidly to 5
zero) to NRZ (non-return to zero). The one-shot volts when the trigger ends and Q1 turns off. If Ct
shown on page 76 effectively achieves zero recovery were not recharged completely between trigger
time by using the energy in the input capacitor to pulses, arrival of the next trigger would not lower

9
 +t2V

Rt
680 +SV

Dt
CLE V I TE
CGD t030

OUTPUT (NRZl
Ct Rs
470pF 4.7K
02

�
TRIGGER (RZ) 2N2369
tN4t48

03
1 N 4t 48

Adjustment of R5 determi nes reset time of Qa.

the base of Q3 completely to -4 volts; this shortens For RZ to NRZ conversion, R5 can be adjusted
the one-shot's timing cycle. Because C1 is large, its so that Q3 begins to reset just as a new trigger pulse
voltage remains fairly constant over the trigger arrives. The effect of this adjustment is shown at
pulse period. the bottom of the schematic.

Fast-pu lse a m plifier +12 VOL TS

drives 50-oh m load

By E . J. Ken nedy
Oak Ridge National Laboratory, Oak Ridge, Tenn.

The linearity and rise time of most fast pulse ampli­

fiers are degraded when driving a 50-ohm load.
The circuit at the right possesses excellent char­
acteristics when used as a current driver. One big
advantage of the circuit is that one transistor is al­
ways on (Q1 for a negative input and Q:! for a posi­
tive input) resulting in equal output drive for posi­
tive and negative input signals. �fost emitter-fol­
-12 VOLTS
lower configurations that were studied, including
the well-known \Vhite emitter-follower circuit, Equal-amplitude positive andnegative output pulse can
be achieved with this 50-ohm driver circuit.
lacked both equal-polarity drive and fast rise-time.
The output pulse response of the circuit is sim­ Qt and Q:!. A 10% overshoot on the edges of the
ilar for both positive and negative input signals. pulse can be eliminated by inserting a small in­
A feedthrough spike at the beginning and at the ductance in series with the emitters of Qt and Q2•
end of the output pulse is due to the input signal Measured output voltage drift was approximately
feeding through the collector-base capacitance of 0.25 Me/ °C from 25° to 50°C.

10
Ci rcuit design

Designer's casebook

measuring the length of time it takes the pulse to

Tunnel-diode pu lser travel along the cable, reflect from the end and
return to the input. Calibrated oscilloscope sweep
measures cable delay circuits or interval timers are used to determine
the time between the transmitted and reflected
pulses. Because of instabilities in the sweep circuit
By Peter J. Kind l mann or low resolution in the interval timers, however,
YaJe Un iversity, New Haven, Conn. this method is usually inadequate for high precision
work.
The testing cycle in the new technique is started
A technique for determining the propagation delay by pushing switch s2 to its alternate position at
time of a cable on the basis of frequency, rather R9• This discharges capacitor C5, which triggers
than time, results in increased accuracy. In this tunnel diode D2• A negative pulse developed at D2
technique, a pulse generated by a tunnel diode is differentiated and applied to tunnel diode D1
travels along the line and is reflected by the open through diode D3• Tunnel diode D1 is part of a con­
end. The reflected pulse retriggers the tunnel diode ventional univibrator circuit that is biased by re­
and the process is repeated. The result is a series sistor R3 slightly below the circuit's threshold for
of pulses at a constant repetition rate that can be free-running operation. D1 is triggered and gen­
measured accurately. The circuit for performing erates a pulse that travels along the cable. After
this measurement, shown below, is designed for use reflection from the open end, the pulse returns
with the 50-ohm cable. along the cable, triggers D1, and the process is re­
In the standard time-measuring procedure, a peated. The resulting oscillation is amplified in Q1,
pulse is transmitted along an open-circuited cable. which produces negative pulses that are 0.5 volt in
The cable's propagation delay is determined by amplitude and 20 nanoseconds wide. The pulses

-t5V

50 OHM OUTPUT
Rt TO FREQUENCY
tO COUNTER

+15V

Propagation delay time of the cable is measu red by a frequency counter, which receives its triggering pulses from
Q1. Tunnel diode D1 generates these pulses and a lso the pul ses to be transmitted along the biasing and u n known
line. The insert shows an additional transformer that is req uired if the cables do not have 50-ohm impedances.

11
 generated by Q1 appear at the output of transformer in measurement accuracy. As long as the pulse is
T1 triggering a frequency counter. not attenuated more than 10 db on its round trip,
The measurement is made in two steps. First, the circuit will operate satisfactorily. If the attenu­
the frequency associated with a low-loss, "biasing" ation is greater, the triggering point of D1 is
cable is measured. For proper operation the biasing shifted, by some fraction of the pulse rise time­
cable should have a minimum propagation delay usually about 0.5 nanosecond-resulting in a less
of 25 nanoseconds. Then the unknown cable is accurate measurement. However, in high-quality
connected in series with the biasing cable and the cable, 10 db of attenuation corresponds to propaga­
testing cycle is repeated. The delay time of the tion delays of about 500 nanoseconds or more, or
cable is one half the difference in periods of the to physical lengths ranging from 250 to 500 feet.
measured frequencies. This measuring procedure So accurate measurements can still be made for
eliminates the need to know the regeneration time considerable lengths of cable . For extremely long
of D1 because the regeneration time contributes lengths, in which cable attenuation is a problem,
equally to both measurement steps, and cancels out an identical circuit may be connected to the open
in the subtraction. end to produce an amplified reflected pulse.
In making the measurement, it is important that In the circuit, transformer T1 is a 2-to-1 stepdown
D1 is triggered only once at the start of each part transformer wound on a small ferrite bead such
of the test. Otherwise, multiple pulses will be de­ as Ferroxcube type 396T-125-3C3. Both the pri­
veloped and the counter will read erroneously. A mary and secondary are wound with number 30
stop button, sl, is provided to stop the pulse re­ varnish-insulated wire.
flection process before changing cables. If cables with impedances other than 50 ohms
As an example of the circuit's stability, a Tex­ are to be measured, an impedance transformer
tronix 60-nanosecond delay box was used as a such as the one in the diagram insert on page 87
biasing cable and an adapter-General Radio-to­ is required. This transformer is constructed like
female BNC-was used as the unknown sample. T1 except that the primary must have 3yZ/ 50
The adapter's delay measured 0. 190 ± 0.003 nano­ turns, where Z is the new impedance of the line.
seconds. Much longer delays can be measured with Both the biasing cable and the unknown cable
picosecond accuracy. should have the same impedance to minimize mul­
Attenuation in the cable is one of the limitations tiple pulse reflections.

Fast pu lse generator tests

digital circuit delay
(/)
0
By Cl ive P. Hoh berger z
0
u
Case Institute of Technology, Cleveland .....
(/)
0 1.0
a:
�
2
Fast, high-current pulses are frequently needed for I
..:..-
measuring delay in high-speed digital circuits. To 0.8

be useful, the pulses must be spaced far enough

apart so that phase and amplitude distortion does 0.6
not result in overlapping. A ratio of pulse duration,
td, to the interval between pulses, t�, of about 1-to-5
or 1-to-10 is desirable.
The circuit on page 89 generates negative
Vs- VOLTS
pulses with an amplitude range from -2 to - 12
volts and with rise and fall times of 30 nanoseconds Interval between pulses, t •• is a function of the
or less. Pulse amplitude is a function of the supply tra nsistor selected for Q1 as well as of the su pply
voltage, vs• voltage V The curves show typical data for two
•.

different transistors operating i nto a 1 50-ohm,

Values of t1 and td depend on the transistor se­ 50-picofarad load. The value of t. starts at
lected for Q1• The spacing interval, t1, is about 400 approximately 475 nanoseconds and i ncreases linearly
to 500 ns at -2 volts and increases linearly with at about 70 nanoseconds per volt.

12
 Cz
Tc, 0.002
T 0.005

OUTPUT

Pulse generator provides high-current pulses of constant width whose amplitude and spaci ng interval, t1, varies with
the magnitude of the su pply voltage V The delay line in th e oscil lator circuit is 20 feet of su bmi niature coaxial cable.
•.

VR as shown by the graph on the facing page. operating as a high-gain saturated pulse amplifier
With reference to the values of� the type 2N974 to provide the output drive for Qa. Even when V�
transistor provides a 100-nsec pulse and the type is - 12 volts and the output current is large, the
2N3638 provides a wider, square pulse of 150 nsec. average dissipation of Q3 is well below its rating
Therefore, except at low values of V the ratio, R of 150 milliwatts. A square pulse is obtained at
tu/ ti is smaller than 1-to-5. the output for resistive loads as low as 68 ohms
Q1 is connected in a delay-line oscillator circuit. and for moderate capacitive loads that are often
The delay line consists of 20 feet of type RG- 174/ U encountered in computer circuits. The decoupling
subminiature coaxial cable whose outer conducting network consisting of C1, C2 and L1 reduces the
shield is grounded only at the midpoint of the noise that would otherwise be introduced in the
cable. The oscillator's waveform would normally power supply by Q:3·
be symmetrical with a period of about 300 to 400 The entire generator, including a battery supply,
nsec. However because the turn-off time of Q1 is can easily be put into a box 3 x 4 x 5 inches for
100 to 150 nsec, and because it is heavily loaded convenient use in the field. A positive pulse version
and has a large base overdrive, the output is the of this circuit can be obtained by changing the
desired asymetric rectangular pulse . polarity of V�� and substituting n-p-n transistors
Q2 is a high-speed , germanium mesa transistor with characteristics similar to the p-n-p transistors.

Simple mercu ry relay circuit

develops single clean pulse
OUT

By Wayne King
Scientific Data Systems, Inc., Santa Mon ica, Calif.

In digital circuitry, a switch-closure that provides Make-before-break contacts on the mercu ry-wetted relay
provide a clean output pulse whenever switch S1 is closed.
a single, clean , short pulse is often desired. The
circuit at right develops such a pulse by using
the make-before-break characteristics of mercury­ and the output pulse has no undesirable spikes.
wetted relays with type-D contacts. Positive or The pulse width is a function of relay operating
negative pulses are obtained, depending on the time. In one particular case, the operate-time
polarity of the supply voltage, E. specification of the relay was 6 milliseconds and
When switch S1 is closed, the movable arm of a 4-millisecond pulse was obtained.
the relay travels from its normally closed position In this circuit, resistors R1 and R:.! are adjusted
to its normally open position. For a brief period, to provide the desired amplihtde and power. S 1
both positions are bridged and a pulse appears at may be any ordinary momentary-contact switch.
the output. Since, in the relay, the capillary action Because of the time constant in the relay, any
of the mercury closes the circuit between the mov­ bounce in the contacts of sl will not be detected
able and fixed contacts, there is no contact bounce in the output pulse.

13
 Circuit design

Designer's casebook
Two unijunction transistors and the circuit enters state two. If the input pulse
is negative, Q2 is back-biased and is turned off.
produce three-state circuit This produces state three.
The reset pulse turns off Qt by reverse-biasing
By Steven F . Su mmer the base one emitter junction and turns on Q2 by
City College Research Foundation, New York
making the emitter current rise above the peak­
point value.
Temperature changes will shift the peak-point
Logic circuits are normally binary elements which voltages and current of Q1 and Q2. Resistors Rt
store information by assuming either of two states. and Rj reduce the variations over a moderate tem­
However, it is sometimes possible to reduce the perature range.
number of components in a logic circuit by using The trinary module was used as the basic build­
trinary elements, which can assume three different ing block for coding the dash, dot and space of
states. In the circuit shown below an inexpensive Morse code symbols from a standard typewriter
trinary module has been designed by using the keyboard. Six circuits were triggered in parallel
latching characteristics of unijunction transistors. to form the code for any one symbol. The outputs
The three possible states are: of each module were connected to AND gates and
1. Terminal A at zero volts and terminal B at were read out sequentially by the system's clock.
1.5 v. If binary circuits were used, 12 Hip-flop circuits
2. Terminals A and B both at 1.5 v. would be needed.
3. Terminals A and B both at zero v.
These correspond to the absence of an input
pulse or the arrival of positive or negative input
pulse. Input pulses are ± 12 volts in amplitude and
300 microseconds in duration. A 12-volt, positive
Electron ic thermostat controls
pulse at the reset terminal restores the circuit to tem peratu re to within 0.1 °C
state one.
A voltage divider consisting of Ra and R4 biases
transistor Q1 at 85% of its minimum peak-point By Gerrit H . P. Koh n ke
or firing voltage. Transistor Q2 is similarly biased Natu u rku ndig Laboratorium der
by a divider consisting of R5 and R6. In state one, Rijks-U niversiteit, G roningen, Netherlands
Q1 is off and terminal A is at zero volts; Q2 is
conducting and terminal B is at 1.5 volts. requires that both the
Accurate temperature control
If a positive input pulse appears, the peak­ sensing device and the control circuitry respond
point current of Q1 is exceeded and Q1 turns on, to small changes in temperature. The electronic

+15V

R5 R7
120 330

OUTPUT A O U TPUT B
R&
Rz Re
100
150 150

Trinary logic element uses two inexpensive unijunction transistors to store information i n
three different states. Because unijunction tra nsistors can b e constructed from a b a r of
silicon, the trinary mod u le may be easily converted into an integrated circuit.

14
 •
1VRMS

OVEN

Thermostat senses an un balanced voltage across the Wheatstone bridge terminals FE, when the resistance of the
thermistor R,,., changes with temperature. The ampl ified error signal actuates a relay which controls the heater voltage.

thermostat shown above, though relatively simple Qa is a phase-sensitive detector in which the power
in design, can maintain the temperature To of a de­ line waveform is the phase reference.
vice to within 0. 1 °C between -25° and 200°C. The If the temperature of a refrigerated unit is to
temperature T0 is fixed by the resistance of R3 in be controlled, the relay would energize a solenoid­
the Wheatstone bridge at the left in the schematic. operated valve connected to the refrigerant. Switch
Continuous control over the entire temperature s2 is placed in its other position to maintain the
range may be obtained by replacing R3 with a proper phase relationships for operating the relay.
calibrated precision-potentiometer. In this instance the relay would be activated above
The circuit is shown with the phase-reversing the temperature To established by R3•
switch, S2 , in position to control an oven tempera­ The circuit may be analyzed in the following
ture above the ambient temperature. Thermistor manner. Near balance,
Rth, which is placed in the oven and is part of the Rth = Ra and (1)
Wheatstone bridge, senses the change in tempera­ A Rt,l
Rth - Ra
V GH = V GH
_
ture. The bridge's voltage source is a 60 cycles-per­ A VFE - (2)
4 Rth 4 Rth
second voltage obtained from the step-down wind­
ing on transformer Tt. When the oven is at the The resistance of the thermistor used in this circuit
desired temperature, the voltage VFE == 0, where varied with temperature according to the relation
VFE is the bridge-output voltage. This implies that Rth! To = Rth12a0 c exp K(25° - To) (3)
Ra == Rth· If the temperature decreases, the bridge where Rthl2s°C = 1,000 ohms andK = 0 . 023 per°C (4)
is unbalanced and a 60 cps voltage, AVFE, in phase Therefore the ratio of the increase in the therm­
with the line voltage appears across terminals FE. istor's resistance, caused by the drop in tempera­
AVFE is amplified by a factor of G in Q1 and Q2 ture, to the resistance Rth at the temperature To is
and appears in phase with the line voltage at the approximately
base of Qa. Transistor Q3 will conduct if both its
base and collector are negative with respect to the (5)
emitter. This occurs on the negative half-cycle of
the line voltage. If G AVFE is large enough, relay Kt where AT is the drop in temperature and ARth is
in the collector of Q3 is energized and closes a con­ the incremental increase in the resistance of the
tact to apply heater-voltage to the oven. The relay thermistor. Thus
is held in its energized position during the positive
portions of the line voltage by capacitor Ct. As the (6)
temperature of the oven rises to the temperature
specified, the bridge becomes more balanced and This signal is amplified by Q1 and Q2• Therefore,
the current through the relay decreases. Eventually at the base of Q3
the relay opens, removing power from the heaters.
(7)
GK(AT)
If the bridge passes through the balance point, the VDE- _
V GH
unbalanced voltage becomes out of phase with the 4
line voltage and Q3 no longer conducts. Therefore The sensitivity of the detector is such that the

15
 relay is energized when VDE = 0.25 volts root mean values. As a result, R8 has the major influence over
square (rms) and deenergized when VnE = 0.12 the temperature at which the thermostat operates.
volts rms. The gain G = 300, and the bridge supply For maximum accuracy the temperature of R3 must
voltage VGH = 1 volt rms. Therefore from equation be held as constant as possible. The temperature
7, the difference in temperature at which the relay range of the unit is determined by the allowable
is energized is temperatures for the thermistor.
In the schematic, the transistors and diodes are
4 ll vDB 4(0.25 - 0.12)
llT = = =
0. 07500 of European manufacture. The diodes are silicon
GKV GH 300(.023) (1) and must operate with 150 milliamperes. The tran­
It can also be shown that the relay is deenergized sistors are germanium and have low-frequency cur­
0.07°C before bridge balance is reached. rent gains (P) of 150 at 1 rna. Npn transistors may
All resistors in the bridge should have 1% toler­ be used if the diodes and polarized capacitors are
ances. Resistors Rt and R2 are the same type and reversed. The relay has a winding resistance of 130
value and are mounted closely together, so that ohms. A current of 15 milliamperes is required to
temperature variations will not affect their relative actuate the relay.

The reverse side of four modules can be seen

Breadboarding IC systems in the top photograph on p. 103. The first board on
the left shows the printed circuit wiring for a ten­
with color-coded modules lead, integrated-circuit package. The next board
shows a standard T0-5 transistor and other dis­
crete components mounted on the printed circuit.
By Eugene L. Field The third and fourth boards are wired for T0-5
Sylvania Electronic Systems, Williamsville, N.Y. case- and Hat-package versions of the same inte­
grated circuit logic element. All boards use the
I ntegrated circuit packages, such as Batpacks, re­ same printed circuit.
quire special handling to prevent damage from ex­ One basic etched circuit may be used for logic
cessive heat during soldering operations or lead elements manufactured by a number of companies.
breakage during testing. The problem is especially The only changes required are in the pin connec­
severe when breadboarding with flatpacks because tions and the decal on the front of the board. Pin
interconnections are changed many times in the connections may be changed by removing portions
process of achieving the final design. of the etched conductor and by wiring between
To reduce these problems, a technique has been points. For example, the same basic printed circuit
developed that not only permits repeated changes layout may be used for Sylvania's SUHL line, for
in interconnections, but also saves a great deal of
time in the design of new circuitry. It has also
been useful and economical for integration of sub­
systems, for trouble shooting equipment, and for
evaluation tests.
The photograph at the right shows a typical
breadboard arrangement with 144 integrated cir­
cuit modules plugged into power-supply strips that
are mounted across the face of a standard 19-inch
rack. Each integrated circuit is mounted on its own
printed circuit module with provisions for such
additional discrete components as timing resistors,
diodes or coupling capacitors. Integrated circuit
packages and discrete components are mounted on
the back of the modules and are not visible in the
photograph. All modules are color-coded with de­
cals that identify the pin connections and the logic
function. Interconnections between modules are Integrated circuit packages are mounted on individual
modules and are interconnected to set up a breadboard
made with wires that have small pin-plugs on each
circuit. Power is supplied through a printed circuit
end. The plugs mate with pin jacks mounted on the board that is sandwiched between insulator strips
modules. mounted along the face of the rack.

16
 .---�,... OWERSUPPLY
,...P
PINS

T
PIN
"ACKS

,.,I..
..

1 I· t! --.J '---P
--- OWERSUPPU
PINS
Modules are supplied with mounting holes for inserting a thumb-screw that engages a th readed hole on the
mounting strips. Terminals are miniature pin jacks which a ccept pin plugs for interconnecting the modules.
In each of the four corners is a pin for a pressure connection to the power-su pply strips.

Signetics' SEIOO line and for Texas Instruments'

Series 53. Decals are easily and inexpensively made
from "Scotch-Cal," a product of the Minnesota
Mining and Manufacturing Corp. Three boards us­
ing the same etched circuit for different logic func­
tions are shown in the photograph at the right.
Special purpose modules can be constructed for •

testing and for mounting other devices such as

miniature relays and crystals. As an example, read­
Color-coded decals, affixed to boards using the
out circuits are mounted on the bottom row of the same printed circuit, differentiate the various
rack in the photograph on page 102. The lamp logic functions. The decals also indicate the
driver circuit and a small incandescent bulb pro­ interconnection term inals and the d iscrete
vide a very useful indicator module for showing components mou nted on the boards.
logic levels at various points in a digital system.
The modules are mounted on aluminum angle­ generators can be varied readily for worst-case
brackets. On the surface of each angle bracket is a analysis effects.
sandwich assembly consisting of a strip of circuit Breadboard systems such as the one in the
board between two strips of insulation. Four etched photograph have been used at Sylvania in the de­
conductors on each printed circuit strip are used sign of Minuteman ground-support equipment. The
as power lines. Holes are drilled in the outer technique has been used successfully at frequencies
insulator strip to allow the power-supply pins on as high as 2.5 megacycles per second. If the bread­
the module to make contact with the etched con­ board is laid out and interconnected carefully, the
ductors. To insure good contact, small "fuzz but­ frequency range may be extended.
tons" made of copper wire-mesh are trapped be­ The circuit modules are extremely sturdy and
tween the conductor and the outer layer of can be used over and over again. Also, the test
insulation. The modules are firmly mounted to the setups can be used in many phases of developing
strips by small thumb screws which engage tapped deliverable hardware. Certain breadboard circuits
holes regularly spaced on the aluminum angle­ like multielement shift registers are needed so
bracket. This procedure for obtaining power con­ often that they are kept mounted on a strip and
nections by standardized pin-layouts minimizes ready to use. Some functions have been assembled
wiring errors that cause damaged circuits. to serve as simulators or special test devices during
In working with the system a variety of modules evaluation test programs.
are "plugged" into the rack and are automatically Another feature of the technique is that a drafts­
supplied with power by the power-supply printed man can derive a logic diagram directly from the
circuit board. Interconnections are then made for breadboard. When time is critical, close-up photo­
the circuit that is to be breadboarded. Entire sys­ graphs can record all the information required for
tems of counters, shift registers, gating circuitry, a drawing. On the other hand, once a logic drawing
line drivers and readout indicators can be inter­ exists and the modules are available, a relatively
connected and tested as a complete unit. Voltages inexperienced technician can easily put together a
from external power supplies and input signal complicated breadboard system.

17
 r-----� 100
Curves speed design 80
60

of m u ltiplier circuits �
50

�
40
30

By D. B ruce Swa rtz

Sperry M icrowave Electronics Co., Clearwater, Fla.

L&J
>
Frequency multipliers are circuits that permit cur­ � 6
rent Bow at several different frequencies. A varactor g 5

frequency-doubler circuit shown below is a typical �

1-4
4

� 3 L I N HENRI ES
example of a multiplier. Parallel resonant circuits
or traps consisting of an inductance, L, in parallel
X
C IN FARADS

with a capacitance, C, are used at the output of

2

the doubler to reject the fundamental current. Sim­

1 �-L-L�LLLU�LL�--L-�-LLLLU�LU 1
ilarly, a trap in the input circuit keeps second har­ 0.1 0.2 0.3 0.4 0.6 0.8 1.0 2 3 4 5 6 7 8 910
monic voltage from appearing across the generator Ltc X 10
3
terminals.
The usual design procedure for such a stage be­ Reactance curves show the impedance of a lossless par­
a llel-resonant circuit as a fu nction of the L/C ratio.
gins with the selection of components of a reson­

I
ant trap circuit to stop current Bow at one fre­

( f!fo) 2 - 1
quency, followed by calculation of the equivalent
reactance of this trap at other frequencies of in­
terest. In many cases, this reactance is used as
part of the matching circuit. The equivalent re­
actance for various ratios of L and C can be de­
log Z = - log
I J/Jo
which is derived from equation 1.
+ ! log L
C ( 2)

An example illustrates the use of the curves. As­

sume that L/C == 400. To determine the reactance
termined by the relatively complex impedance­
at a frequency fo/ 2, the graph is entered on the
equation given by

( :!)
ordinate at the point marked 0.4 which corresponds
(.iwL) to L/C == 400. A vertical line drawn upward crosses
the line f == % fo at XL 13 ohms. ==
j (wL - �c )
Z =
If the L/ C ratio falls outside the range of the
(1)
graph, the values of L/ C are multiplied by 102 and
the reactances are multipled by 10. If the L/ C
However, calculations by this method are tedious ratios are multipled by 10- 2 the reactances are
and time consuming. multiplied by 10- 1• Using the same example as be­
The graph at the right enables the impedance fore, except with L/ C == 40 X 103, the inductive
to be determined easily from the ratio L/ C. The reactance at f == % fo would be about 130 ohms. If
reactance of the parallel resonant circuit is shown in the same example, L/ C == 4, the inductive re­
actance of the circuit would be 1.3 ohms. In most
practical applications the L/ C ratio will fall within
at frequencies f, which are either higher or lower
than the resonant frequency fo. The left hand ordi­
nate is the inductive reactance, Xr., of the tuned the range shown on the graph.
circuit when the frequency, f, is less than fo. The The graph is derived by assuming that the re­
right hand ordinate is the capacitive reactance, Xc, sistance in the resonant circuit is zero. For most
of the circuit when the frequency, f, is greater than experimental work, the small error introduced by
fu. The graph is based on the relationship this assumption can be ignored.

GENERATOR L OA D
w1 CURRENT 2 w1 CURRENT
VARACTOR

Varactor doubler uses traps for filtering a n d for matching t h e diode

impedance. The traps are resonant at radian frequencies Wt and "'2·

18
Ci rcuit design

Designer's casebook

+ 24V DC
Overload protection
for d-e amplifier
Qt
2 N 2617
By Leander Payerl ,
Visolux-Eiectronic GmbH, Berl in

I n spite of the loss which occurs, a high series

resistance is often included in a d-e amplifier to
protect it in the event of an overload. In the d-e
OUTPUT:
amplifier circuit at the right however, an elec­
Q ___ 2 2 V DC
tronic fuse switches the high series resistance R3 4 0 ma
into the circuit only when an overload or short
circuit actually occurs. This circuit restores the full
outr:ut voltage immedaitely after the short circuit Electronic fuse in d-e amplifier cuts in h igh series
resistance Ra when there is an overload or short
circuit and bypasses Ra instantly when they are removed.
or overload is removed.
During normal or:eration, there is only a small All resistors 0.5 w u n less otherwise specified.
resistance in the load, formed by R2 and the col­
lector-emitter resistance of Q2 . In this state the
voltage drop across R2 is less than the turn-on base­ circuit, maximum output current is 40 milliamperes.
emitter voltage of Q1 . Hence, Q1 and Q4 are off, When Q2 turns off, voltage R2 may decrease
and Q2 is on, shunting R3• enough to turn off Q1• This circuit will thus oscillate
If lout increases beyond a certain level because at an amplitude and frequency determined by Ra
of short circuit or overload, the voltage drop across until the fault is removed. In the circuit shown, the
R2 increases and Q1 turns on. Simultaneously, tran­ amplitude of the oscillation is 1.5 volts peak to
sistor Q4 turns on and zero-biases the base of Q2. peak; its frequency is about 250 kc. The base of Q-t
This cuts off Q2 so that R3 limits the current. is shunted by a small capacitor to prevent oscilla­
Switching will occur when IoutR2 > VBEl· In this tions that might be excited by fast load changes.

Latching gate removes C LOCK

I N PUT
O
l
------------
Dt
1 N 270
�.---------�

counter ambiguity -6 VOLTS 02

1 N 2 70

By Roy A. Wi lson
A

r
Hycon Man ufacturing Co. Monrovia, Calif.

Rt
Clock pulses being gated into a register require 1K
positive gating action to avoid putting an extra -12v
count into the register. The ordinary diode gate Adding latching feature to diode gate allows output to
provides this positive gating action with the addi­ follow clock in put when S1 is closed. When S1 is opened,
tion of a silicon controlled rectifier. output will be fixed at existing clock level.

19
 The latching gate on page 91 allows the output output will remain at zero as long as S1 remains
to follow the clock input when sl is closed and, open. This is because point A is now at - 12 volts,
after sl is opened, the output remains indefinitely precluding any possibility of the gate becoming
at the level of the clock input at the time the switch forward-biased.
opened. If sl is opened when the scr is conducting, the
Closing of switch S1 grounds point A; this for­ output will remain at -6 volts. Opening of the
ward-biases the gate-to-cathode terminals of the switch applies - 12 volts to the scr cathode through
scr every time the clock input is at -6 volts. When R1 and D2• This reverse-biases D�, maintaining the
the clock returns to zero, the scr has no voltage voltage across the scr. The scr will continue to
across it and thus turns off. conduct and maintain the output at -6 volts until
If sl is opened during the time the scr is off the sl is again closed.

of the input pulse, which it can never exceed.

Delay ci rcuit varies An input voltage of 28 volts d-e is applied to the
turn-on delay circuit, a relaxation oscillator. The
turn-on, turn-off turn-on time for the unijunction transistor Q1 is set
by adjusting R1, which controls the charging rate
of cl. As cl is charging, the emitter voltage of Ql
By Cruz R. Mora rises exponentally towards the supply voltage.
North American Aviation, Inc., Downey, Calif. When the emitter voltage reaches its peak, the
emitter becomes forward biased, providing a dis­
charge path for C1 and briefly turning on Q1o The
Turn-on and turn-off delays, independently and con ­ resulting voltage pulse across R4 is coupled through
tinuously variable, are achieved with the four-stage D3, to the gate of SCR1. This turns on SCR�, re­
circuit shown below. Both input and output delays sulting in a voltage drop across R11 which provides
are variable from 1.5 to 1500 milliseconds; a limita­ forward bias to Q4• In turn, Q4 provides forward
tion on the maximum turn-on delay is the duration bias to Q5 turning it on. The resultant output volt-

TUR N -OFF ON- OFF I N VE R TER

DELAY CON TROL AMPLI FIER

r - - - - -- ,
r - - - - - --
STAGE 2 STAGE 3 STAGE 4

2e v

I I
1 27. 5 v
I OUTPUT

!j
STAGE t STAGE 2 STAGE 3 S TAGE 4

Rt - t M R5 - 8 2 K c 2 - 2.5p.F R9-t K R13- 390

R2 - 680 R6 - 22 K D4 - t N645 R10- t . 2 K Rt 4 - 3. 3 K

R3 - 330 R7 - t M 0 2 - t N645 Ru - 2 20 R - LOAD RES ISTOR
L
R4 - t OO R 8 - 75 0 2 - 2Nt671A R1 2 - 470 D4 - t N6 4 5

c 1 - 2 . 5p.F 0 3 - 2 N t 1 32 c3 - o. o s&p.F 05 - 1 N 6 4 5

01 - 2 Nt67t 0 3 - 1 N645 04 - 2 N 388

SCRc2 Nt595 0 6 - 2 Nt t 3 2

Increasing time constants R1C1 and R1C2, i n con­

junction with u nijunction transistors having
h igher intrinsic stand-off ratios, i ncreases
possi ble time delays up to fou r minutes.
See pulses at top of page 93.

20
 ±:: PULSE age across Rr. is slightly less than 28 volts because

I
of voltage drops across D1 and Q,; .
The turn-off operation is started by transistor
Qa . While the input voltage is present, the collector
of Qa is at nearly zero volts and almost all the input
��""",_-""
voltage appears across R:;. When the input voltage
O V OLT S 1 drops to zero, Q:I turns on and a voltage of about
O U T P U T PULSE
I
I 25.5 volts appears across Rr.. The turn-off delay
T U RN - ON DELAY
1 I TU R N - OFF D ELAY time is controlled by the setting of R7 which governs
VA R I A B L E FROM -l I VA R I A B L E FROM
1 . 5 m S * TO 1,500mS I
I N D E PEN DENT OF I
I 1 . 5 mS TO 1 , 500 mS
the charging rate of C2• When the peak emitter
voltage of Q:! is reached, c!! discharges, turning Q:!
1 N DE PEN DENT OF
1 on. The conduction of Q2 connects the anode of
TURN - O FF D EL AY I 1 T U R N - ON D E L AY
0 V O LTS SCR1 to nearly ground potential; at the same in­
* mS = M I LL I SECONDS stant, the cathode of SCR1 is above ground poten­
Time delay capabilities of the circuit are repre· tial because of the charge on Ca. The reverse bias
sented by the pu lses. The maxi mum input de· on SCR1 simultaneously turns it off and also Q:1
lay is l i m ited by the width of the original pulse. and Q4 off.

Transistors control
small d-e motor
B
6V

By James B . Tiedemann Dt

U niversity of Kansas, Lawrence, Ka n.

Ot
2 N t 55
A versati le transistor servo-control circuit combines
the functions of a rectifier and a power amplifier
while providing directional control of a small direct­
current motor.
The direction of the motor's rotation B is de­
termined by the polarity of the input signal. This
input, or error signal, provides the base current to
turn on Qa or Q4. These transistors in turn supply
Dt .D 2 , D 3 , D4
the base drive for either Q1 or Q2. Current from I N 538
the six-volt transformer will drive the motor in
I N PUT
either direction, depending on which of the p-n-p
power transistors, Q1 or Q2 is conducting. Six volt d-e motor B is energized by rectified voltage
Input impedance and sensitivity are determined from fi lament transformer T1 . Motor's direction of
by resistors R1 and R2. They must be large enough rotation is controlled by the polarity of the i n put
signal which determines whether Q1 or Q� is conducti ng.
to prevent excessive base current in Q3 and Q4 at
the highest input-signal level anticipated. A value
of 1,000 ohms will cause a typical six-volt motor grounded collector configuration of Q1 and Q2 pro­
to start with a one-volt signal. If the source is not vides a high base impedance, control transistors
limited by current, Qa and Q4 can be protected Qa and Q4 and rectifiers Da and D4 need only
without sensitivity loss with zeners at Da and D4. handle a few milliwatts of power. An ordinary fila­
A six-volt, d-e motor, such as a Pittman DC85A-6, ment transformer, with a secondary current rating
requires several hundred milliamperes for reason­ of one amrere, is satisfactory for T1 • Heat sinks
able power output. Rectifiers D1 and D2 and tran­ are not required unless sustained operation at full
sistors Q1 and Q2 should therefore be capable of power is required. A center-tapped battery and po­
handling at least 750 milliamperes. Because the tentiometer can be used as the signal source.

21
Circuit design

Designer's casebook

the bridge's fourth arm. The bridge is excited by

FET converts transducer a reference a-c voltage Etn· The amplitude of the
a-c output voltage Eo varies proportionally with the
d-e transducer output voltage, Vgs E o is expressed

( )
for use in a-c bridge .

Rds � R1 (1)
Eo
Ein
By Alan R. Greenfield = 2 Rds + R1
where �M is the effective resistance between the
a nd Wi l l ia m H. McCloskey
FET' s drain and source terminals. If Rds Rt, then:

( )
�
Oceanics division of

Rds
I nterstate Electronics Corp., Anaheim, Calif.
E in
Eo
� _
1 (2)
R1
-
4
A field effect transistor (FET) operating as a volt­
age-controlled resistor converts d-e voltage output and the ratio, Rds/ Rt, will be either slightly greater
of a transducer to a-c so the transducer can be used or slightly less than unity. Eu then becomes a
in a bridge-controlled f-m oscillator, as in the small alternating voltage, which has either posi­
circuit shown below. Transducers that are essen­ tive or negative phase with respect to E 1 11 • In the
tially variable resistors provide easy measurement oscillator, the phase of Eu controls the direction of
of many parameters in a typical data acquisition the output frequency's deviation.
system. Placed in an a-c bridge, the transducers With low drain-source voltages (less than 1 volt)
control the output frequency of an f-m oscillator near the origin of the Id versus Vds curves, the FET
and provide extremely high sensitivity. But some displays the characteristics of a variable resistor.
transducers produce a variable d-e voltage rather Because the FET is unipolar, this property holds,
than a varying resistance and must be converted. regardless of the polarity of the drain-source volt­
Three matched precision resistors (R1 in the age. The variable resistance effect is best observed
schematic) form the arms of a bridge; the FET's in an FET having high pinchoff voltage and high
drain and source terminals are connected to make gate-source voltage compared to VdM · Expressed

TO DATA
ll OSCILLATOR LOG G I N G
TRIAD CONTROL BRI DGE OSCI L L ATOR EQU I PMENT

£1
# SP67

0.6V P-P
5 KC LJ
TRANS­
DUCER

BIAS
VO LT A G E
SOU R C E

Drain-source resista nce of the Siliconix 2N2386 is controlled by the transducer d·c output. This unbalances
the bridge and provides an a·c output whose frequency change is directly proportional to the d·c voltage change.

22
mathematically: justs the thermistor changes so that they are equal
Rds = Ro e ,yc• (3)
in amplitude but opposite in polarity to the FET' s
variations.
where Ro and ., represent characteristics of the Resistors R4 and Rn are computed to produce a
FET. If this equation is substituted into equation 2, 350-ohm resistance for the entire FET bridg<.' arm,
then:

( �:V" I)
and to adjust the effects of controlled changes of

E., Et R. Rd,.. Resistors R,1 and R7 compris<.> an adjustable

=
- (4) balance network required to compensate for slight
differences in the values of the bridge resistors R1•
Because E1n, Ro, Rt, and 71 are constants, Eo is con­ The RC combination made up of potentiom<.•ter R8
trolled only by Vgs · and capacitor C1 has a similar function : it bal­
The transducer output Et is summed with a 0.6 ances any reactive components which can upset
volt d-e bias to obtain Vg s · The bias is set to pro­ the bridge balance.
vide zero temperature coefficient at the quiescent Transformer T 1 isolates the input to the bridge
operating point, for example when Et == 0. Zero circuit, allowing the FET source terminal to be
temperature coefficient occurs only at the bias returned to common, and eliminating floating input
point, so Rds varies slightly with temperature as Et to the oscillator.
takes on non-zero values. Thermistor R2 compen­ The balanced bridge represents zero output for
sates for changes in FET resistance caused by the transducer. The oscillator is adjusted to run
temperature; resistor R3 (in parallel with R2) ad- at center frequency for the bridge's zero output.

able for measuring statistically distributed pulses.

Charge feedback i ncreases The description of the circuit operation assumes
that the range switch is connected to C1 • An input
pulse-rate meter accuracy pulse, 50 nanoseconds wide and about 0.8 volts in
amplitude, triggers a monolithic dual input NOR
By R .J . Sm ith -Savi l le and S. Ness gate (Motorola type �1C 359) cross-connected to
operate as a flip-Hop. This module's advantage
U n iversity of Manchester, England over a standard MC 352 flip-flop is that the input
switching threshold voltage is defined by an ex­
In many pulse-rate meters the input pulse triggers ternal bias voltage of 0.4 v and its temperature
a monostable multivibrator to supply a current coefficient is only +0.2 mv,/°C as opposed to
pulse to an output ammeter. The width of the cur­ + 1.7 mvj°C for the MC 352.
rent pulse determines the meter scale factor. For When the flip-Hop is triggered, switching tran­
a given meter deflection, the ratio of time between sistors Q1 and Q2 are turned off, removing the
pulses to the pulse interval is a constant, independ­ short circuit across both the range capacitor, Ct,
ent of the range. This makes it easier to calculate and the output circuit consisting of R2, C11, and C;.
the true pulse rate of statistically distributed pulses As a result, charging current flows through Rt to
from the apparent pulse rate. It also allows the Ct and through R2 to C" and C7• Under these cir­
ammeter to be calibrated directly in terms of true cumstances the charge per pulse delivered to the
rate, if desired. output capacitor is
The circuit on page 86 also operates on this
principle. However, for improved accuracy, the cur­
rent pulse width is controlled by a feedback voltage
Q,
= 1\ - Vi
�
Vr
dt (1)
0
proportional to the charge on the output capacitor.
The feedback insures that the same charge is fed and the voltage, Vc, across the range capacitor, Ct , is
to the output circuit for each pulse. The unit meas­
ures pulse rates from 50 to 5 x 1()5 pulses/sec in
five ranges. On each range, the dead time is 5%
Vo = /.
0
-Jt
' v 1-Cv1 ;, dt (2)

of the mean pulse interval at the maximum count where v1 is measured at the high-potential ends of
rate. R1 and R2 (neglecting the voltage drop across the
For equally spaced pulses, the response can be diodes D1 and D2); Vr is the steady voltage, pro­
extended linearly to beyond 5 megacycles per sec­ portional to count rate r, developed across the out­
ond by increasing the value of resistor R2. However, put integrating capacitors due to the finite resis­
the ratio of dead time to pulse spacing increases, tance of the ammeter; and v1c is the instantaneous
with the result that the extended range is not suit- value of Vc. Since Vtc is less than 0.05vt, the

23
 Vas
VEE
+0.4V
Pulse-rate meter improves measurement accuracy
Vee
-3.6V
+ 1.6V by insuring that on any range each input pulse
delivers the same charge to the output circuit.
01

1
...,__ -+-......

1 1---..

...
.------....- -- + 12V
5 04 3 2 MC359 ::r. 0.1
BAY 3f
OR
t N4147

v,.

v,

--f t---..
50pf
IN

tK

second term in the integrand of equation 2 can be will not exceed 0.6% for the circuit values shown.
ignored with an error less than 0.2% . If necessary, the error term could be eliminated by
When Vc exceeds the input switching threshold, connecting R2 into an operational amplifier which
VT, the flip-flop returns to its initial state, rapidly presents a virtual ground at its input. The ampli­
discharging C1 and cutting off the current How to fiers output could be arranged to drive either a
the output. The time, tr, at which this occurs is linear or logarithmic display. The circuit is thus
VT R1 C1
capable of linearity and accuracy well within 1%.
tr = (3 ) The +0.2 mv I °C temperature coefficient asso­
Vt
ciated with VT is compensated for by the tem­
Equation 3 assumes that v1 is a step voltage.
At this time, Vc and VT are equal.
perature coefficient of the residual voltage across
Q •. As a result, the over-all temperature coefficient
Vc = V T at t = t r (4) of the meter current, Ir, is less than 0.02% j°C. In
Substituting equations 2, 3 and 4 into equation 1; addition to its dependence on the +0.4 volt supply,
multiplying by the rate r; and using the fact that VT also partially depends on the values of the
Vr is a constant, the d-e current in the meter is + 1.6 and -3.6 volt supplies to the flip-Bop. For

I, = r R�C1 ( VT - �: ) (5)
maximum accuracy, these three voltages must be
stabilized. The circuit is less sensitive to variations
of the + 12 volt supply and will accommodate de­
Except for the small error term, Vr/Vt the meter viations of ± 10% with an error of less than ± 0.5%
current, Ir, is independent of the amplitude or wave­ on all but the highest pulse range. On the highest
form of v�, and is defined solely by r, R�, R2, Ct, pulse range the turnoff time of the circuit becomes
and VT· Since the error term is proportional to r2 comparable to the current pulse width, resulting in
it does introduce a nonlinearity. However, this term less effective charge feedback.

24
 back to Q2, then the amplifier will have a gain ap­
Low-cost emitter-fol lower proaching 1/f. The circuit shown below can provide
gains of 3 and 10 to extend the range of a 1.5-volt
extends voltmeter's range vacuum tube voltmeter, for example, down to 500
and 150 millivolts full scale. However, there are
two disadvantages : the open circuit gain is not very
by Allan K. Scidmore large (typically 50) and it is sensitive to supply
U n iversity of Wisconsin, Madison voltage variations. Since feedback helps stabilize
the circuit and insure linearity, increased gain is
Many commercial mu ltimeters whose lowest volt­ obtained at their expense. Sensitivity to supply
age scales are either 1.5 or 3 volts cannot be used voltage variations is defined as S = t::..V2 I (A t::..Vs )
•

with semiconductor circuits because the VBE of where A = V2/V1 is the over-all gain, and Vs is the
germanium transistor is about 150 millivolts. The supply voltage. S gives the effective input voltage
saturated VcE of both germanium and silicon tran­ change produced by supply voltage variations,
sistors is even smaller . But a low-voltage d-e pre­ typically 1 to 4 x I0- 2 •
amplifier that is inexpensive and stable with tem­ Additional open circuit gain may be obtained by
perature and supply voltage variations, below right, substituting a current source for the load resistor
extends the range of such instruments so they can of Q2• This reduces the battery supply effect on
be used effectively in semiconductor circuit the zero setting. To reduce sensitivity to negative
measurements . supply voltage excursions, a current source can
Transistors Q1 and Q2 in the diagram below also be substituted for the common emitter resistors
left constitute an emitter-coupled amplifier; Q3 R2 and R3• These changes are shown in the circuit
is an emitter-follower connected so the circuit's below right. These modifications provide open
entire output voltage is fed back to Q2• With con­ circuit gains of greater than 300 and sensitivities to
stant input voltage, the output voltage is essentially supply voltage changes of about 4 x 10·8 • The circuit
fixed, so a variation of RE = (R2 + R3) changes the now has gains of 3, 10, and 30, which extend the
collector current of Q1• Therefore, RE may be ad­ 1.5-volt meter scale to 500, 150, and 50 millivolts
justed to equalize the base-emitter drop of Q1 and full-scale deflection.
Q2 and thus make the output voltage zero for zero In the circuit below, right, zero-adjust control is
input. The gain of this emitter-follower circuit is provided by variable resistor R1• This resistor con­
almost unity. trols the collector current of Q2• R7 permits open­
H a fraction, f, of the output voltage V2 is fed circuit zero adjustment.

+3V +3V

R7
500K
Ot
1N56A
Rt
4.7K
03
2 N 1 304
Os
02 03
1N482A
Ot V
2Nt304 2 N I 30 4 R4 z 2N1304

v1 ---..-- v,
I
fV2
I
--r -=-
03
":"
Rs R
R3 1 N 56A s
1.8K 1.8 K
500
04
1 N 56 A

- t.5V - 1.5V

Emitter-follower amplifier uses feedback for stability a nd linearity; these are requirements for application i n
multimeters at low ranges. For additional open circuit gain, t h e circuit is modified t o include current sources
for load resistor and common emitter resistors. R1 in drawi ng at right provides circuit zero-set.

25
Ci rcu it des i g n

Designer's casebook
input current steps are thus developed across the
Adapter for curve tracer collector load. For Q�, this load consists of the par­
allel combination of Ra, ( R1 + 100 K) and the input
tests FET's at high voltage impedance of Qa-which is between 20,000 and
200,000 ohms. Q2 has an equal load. The voltage
developed across this load is approximately 10 I,
By Robin Wi l l iams where I is the input current in milliamperes.
Ph ilips Laboratories, a division of North American The second stage, Qa, or Q4, has a gain of 10
Philips, I nc., Briarcliff Manor, N. Y. and a common load resistance, RL. The value of RL
can be adjusted so that the output voltage will be
equal to - 100 I, where the factor 100 represents
When a field effect transistor has to be tested at the total gain of both stages. Q3 and Q4 should be
relatively high gate and drain voltages, an adapter selected to have approximately equal gain so that
circuit is used with a standard transistor curve positive and negative signals will be amplified
tracer such as Tektronix 575 or equivalent to con­ equally within ± 5% .
vert input current steps from the curve tracer into At zero input current, R 1 and R 2 are adjusted s o
output voltage steps for the FET gate. Output volt­ that Q a and Q4 just conduct and are i n their linear
ages from ± 0.1 volt/ step to a total of ± 80 volts ranges; simultaneously, Q3 and Q4 collector cur­
allow a wide range of testing conditions making it rents are made equal. Under these conditions, the
a useful circuit to check FET parameters. collector currents will cancel out in R1• to give zero
The circuit, shown below, is simple and sym­ output voltage.
metrical. The input stage consists of two similar Because the circuit is intended only for FET
circuits, connected back to back. The curve tracer measurements and the gate terminal has a high
supplies input current steps to the emitter of Q1 or impedance-typically greater than 1 megohm-R2
Q2, positive current to Q1 and negative to Q2. The will not be loaded down appreciably and the output
emitter current is passed to the collector according voltage will be accurate. A small power supply is
to the common base transfer ratio, approximately shown to the right of the adapter, making the unit
0.980 to 0.995. Voltage steps proportional to the complete and self-contained.

C? D RA I N
I + tOO V
a:
0
..... t.5K
(.)
...., 2W t N4004
_J
_J
0
(.)
CURVE
TRACER

Fo�L;c�o;�
I I
BAS E o l
BASE
1
4

I
I
( I N PUT )
I I
I E M I T TER o l I
L_ _ _ _ ...J
I
I
I
I
I ZERO t.5 K 1 N4 004
I VOLTS 2W
I
I 1 - 1 00 V

�------� S OUR C E
Adapter converts input current steps from curve tracer into output voltage steps for FET gate.

26
 The only adjustments required are the usual ones curve tracer is set at 0.1 milliampere per step, this
made on the curve tracer. The voltage scales for gives an output gate voltage of - 100 X 0.1 =
the FET gate are then derived from the base cur­ - 10 volts/ step. The negative sign is caused by the
rent scale of the curve tracer according to the signal inversion in the circuit; this is necessary to
simple formula: retain simplicity and a zero voltage datum line.
Volts/ step at gate output = - 100 X base cur­ The circuit was tested and found to be stable in
rent in milliamperes . gain and insensitive to ambient temperatures from
For example, if the base current switch on the 0° to 50°C.

The collector of Q1, which might be the output

High-speed level shifter of a Hip-Hop or a monostable is tied to the base
of Q2• When Q1 is turned on it causes 15 milli­
By G i l bert Marosi amperes to How through the emitter of Q2• This
lowers the voltage at the collector of Q2 to ground.
General Precision I nc., Palo Alto, Calif. When Q1 is turned off, Q2 also turns off. The col­
lector of Q2 then tries to rise to -30 volts, but is
clamped to - 6. 8 volts by the diode D2. Capacitor
Transistor Q2 in the common emitter circuit below, c2 decreases the rise and fall time of Q2.
shifts logic level from a plus 6.8 volts to a negative The shifting of the level occurs in the circuit
level of 6.8 volts. Rise and fall times of 60 nano­ within the dotted lines. The output circuit, Q3 acts
seconds are easily attained. as a buffer for the emitter follower.

-30V

c2

+6. VJL 100 pF

I n GO
GO 02 I
I N914
I
-6.8V I
J L 6.8V

o, I
Output pulse rise and fall t N 9t4 I
times are controlled by the
charge time of Cs, Qa is a _ _ __ _ _ _ _ _ _ _J
buffer for the emitter follower.
- 30V

and long life, making the alarm particularly useful

Low-current alarm for protecting homes or stores.
The alarm may be used with a continuous wire
or foil loop as a sensor. If the loop is either open-or
By W. Vol lenweider short-circuited, the circuit will trigger. Because of
National Research Council, Fort Churchill, the low loop current, loop resistance is not critical,
Manitoba, Canada and may range up to 1,000 ohms before the system
fails to operate.
Normally, transistor Q1 is held at cut-off by the
A transistorized intruder alarm, on page 106, has protector battery B1, which is connected to the
a current drain of only 500 microamperes, and emitter of Q1 through diode D1 and to the base
requires only one 1lh-volt battery in the protector through R1• The collector of Q1 is coupled through
loop. This results in versatility, low operating cost C1 to the gate of the silicon controlled rectifier, Q2.

27
 RL
120 TO SOUNDING
2 DEVICE (BELL)
120KR2
W

1.5V I+ R3
a,

B , L- �------
_o
,o
·�PROT;:oR ____ _
NES - - - - -�-------� 10K
I L� �f-
_

.
.,. D1N92
t
___ ____

Solid state alarm circuit operates with a 6- or 1 2-volt

B2OR 12 VOLTS
alarm battery and a 1 %-volt battery in the protection loop.
ALARM BATTERY +
6
t
Holding resistor RL is required if a conventional If the protector loop is short-circuited, current
alarm bell is used. from the protector battery is limited by R1, and D1
After htrning on the circuit with key switch S1, keeps Q1 conducting. Q1 is triggered into conduc­
current flows in the protector loop. If the loop is tion through R2 as before.
broken, Q1 is triggered into conduction through R2; The circuit is reset by turning the key switch
then a pulse appears across R3 and triggers the St off momentarily and then on again.
scr into conduction7 sounding the alarm. No moving parts add to unit reliability.

around an F22 glass-encapsulated, germanium­

Thermistor reg ulator bead, thermistor made by Standard Telephones &
Cables Ltd., a subsidiary of the International Tele­
provides fast response phone & Telegraph Corp. With the main power
supply fed from a constant voltage transformer,
By Gregory A. R. Trol lope drift became negligible after about an hour.
Department of Chemical Engi neeri ng, U n iversity of
An unconventional chopper circuit, V1 and V2,
Birmingham, England
is used in the amplifier, where the chopper oscillator
plate modulates the power supply to the chopper
circuit. When the output of the thermistor-bridge
A sensitive but inexpensivetemperature regulator circuit is zero and the chopper circuit has been
with a fast thermal response, is provided by the balanced by VRt, the plate voltages of the chopper
circuit shown below. This circuit was evolved tubes V1, V2 fluctuate with the same amplitude,

COARSE , F I N E TEMPERATURE CONTROLS Dt LOW FORWARD RESISTANCE

50K tOK
D 2 HIGH REVERSE RESISTANCE
1 50 V
..------.-�111-- STA BI LIZED

I
PLATE
Rt R ELAY

L__. HEATER
4.7 M
_., TO

CIRCUIT
50K

v5
v3 t/2 t2AT7
tOOK v2 22K 112 t2AT7 O.t,u F 220K
....-��....-
.. -__.
-- t/2 t 2AT7
� tOOK

1M
---�l'ttlv--- 150V STABILIZED "-----J

Temperature regulator uses high-resistance thermi stor in b ridge circuit. Variation of its
resistance u n balances chopper circu it, generating pulses to control heater circuit.

28
so there is no output from the transformer T1. 400 cycles per second. T2 acts as a plate modula­
Variation of the thermistor resistance unbalances tion choke so that the plate supply to the tubes
the circuit, creating positive- or negative-going V1, V2 is about 250 volts d-e plus 50 volts a-c.
pulses between the plates of the tubes. However, Mter the V4 stage of amplification, the signal is
positive-going pulses with respect to V1 are con­ rectified by D2 and fed to tube V5, which in turn
siderably damped by the low forward resistance operates a plate relay, controlling the heater circuit.
diode D1. An output is obtained from the chopper The transformer T 1, a small shielded audio inter­
circuit only when the temperature of the thermistor stage transformer, must have a good common mode
is below the set-point. rejection. Some adjustment of R1 may be necessary,
The circuit using V3 is a Hartley oscillator op­ depending upon the actual plate relay used.
erating at a frequency determined by the inductance Not all l2AT7 tubes function equally well in the
of the primary of T2 and the 0.01 microfarad in chopper circuit but it is not difficult to find one
parallel with it. This frequency is approximately which operates as required.

venting any significant current flow in Q8 •

Adjustable current limiter R1 is the current-sensing resistor and R2 selects
the portion of the sensed voltage (V8) required to
for reg ulated power supply turn on Q1. Potentiometer R2 is adjusted so that the
limiter functions at just above the normal load cur­
By Pau l Ga l l uzzi rent, in this case one ampere. Resistor R8 limits
the base current in Q1 while R4 and R5 perform a
Transistor Automation Corp., Cambridge, Mass.
similar function in the base of Q2.
Under normal operating conditions, Q1 and Q2
remain off, allowing Q6 and Q8 to function in the
The pass transistor in a series-regulated power sup­ conventional manner. The limiter also serves as
ply is protected from excessive power dissipation a short-circuit protector since a direct short at the
by the current limiting circuit below. The circuit power supply output terminals will shut off the
includes a !-ampere, 12-volt regulated supply; the regulator. Regulated output voltage reappears
current limiting section is within the dotted lines. when the overload is removed.
This protective circuit automatically resets when This current-limiter circuit may be designed for
the overload is removed. The two transistors in use at higher or lower current levels through the
the limiter do not degrade the power supply regula­ proper selection of components.
tion. This current limiting circuit may be easily incor­
The limiter operates by turning Q1 on when V8 porated into existing power supply designs. Its
exceeds 0.7 volt. This, in turn, switches Q2 on. small number of components makes it simple to
The base of Qa is then effectively grounded, pre- package and it is an inexpensive protective feature.

U N R EGULATED CUR R ENT L I M ITER REGULATED

VOLTAGE
+20 V
r - - - - -R 1- -
1 -I 12V, t A
OUTPUT

�----�----.-- +

Rg

+ 330

OUTPUT

Ct
VOLTS
ADJ
R O.Of
10
500
R R
e u
330 t.2 K

L., _ _ _ _ _ _ _ _ _ _ _ _ .J

Current-limiting protection i s added to a series-regulated power supply. The tw o transistors, shown

within the dotted l ines, accomplish the protection without degrading the performance of the power supply.

29
 Ci rcu it design

Designer's casebook

of transistors Q5 and Q6•

Voltage spl itter balances When an unbalanced load is applied, the ground
point tries to move up or down with respect to the
floating power supply plus and minus 12-volt lines. As a result, an error
voltage, generated between the bases of Q1 and
By Ja mes M. Kasson Qz, is amplified by the common-emitter d-e ampli­
fier Q3 and appears at the base of the emitter-fol­
Santa Rita Technology, Inc., Menlo Park, Cal if. lower Q4• The error voltage from Q4 acts to turn
on either Q5 or Q6, returning the ground refer­
An ungrou nded, or floating, power supply of Vo volts ence to its proper position. Both output transistors
can be converted to produce an output with a cannot be on simultaneously; all unbalanced current
reference anywhere between zero and V0• While flows through either Q5 or Q6• When an unbalanced
not as versatile as when two separate power sup­ load is connected at the output, the impedance from
plies are used, th is approach is considerably less ground to either the + 12 or - 12-volt line acts as
expensive. the load for the emitter follower.
In the circuit below, a 24-volt d-e power supply Resistors RD and R10 are used when the power
is converted to an output of + 12 volts d-e and - 12 supply is not current limited.
volts d-e. The 24-volt source used was a Harrison If only small unbalanced currents are required,
Labs 6202A. the components to the right of the dotted line may
With small heat sinks, the voltage splitter delivers be omitted. In this case, the emitter or Q4 is
unbalanced currents up to 700 milliamperes in grounded and a small protective resistor added in
either direction with a change in output voltage of series with the base of Q4• When the circuit is
less than 10 mv. operated this way, the permissible unbalanced cur­
A balanced voltage divider R1R2 establishes a 12- rent is determined by the quiescent current of Q4.
volt reference voltage at the base of Q1. Q1 and Q2 The parts in the circuit shown below cost approxi­
form a differential amplifier, where the base of Q:! mately $6 in very small quantities. In lots of 100,
is in the negative feedback path from the emitters the cost would be approximately $4.

+12VOLTS -��----�--.--
+--;---�-

03

24 VOLTS
POWER
SUPPLY
D-C

-t2VOLTS
A 24-volt power supply is split into a ± 1 2-volt output. Negative feedback loop permits
u n it to deliver unbalanced cu rrents up to 700 m i l liamperes in either direction.

30
Bistable multivi brator 2500
R1

immune to noise

By R . Wayne Sim ister

2N2924
U niversity of Utah, Radio-Television Services,

Q2
Salt Lake Citv

When speed of switching is not an important fac­

tor, a bistable multivibrator can be made free from
accidental triggering because of noise by adding
a capacitor, shown as c!! in the diagram, right.
Such an arrangement makes it possible to use the
circuit in a high-noise environment with high re­
liability and without special shielding or layout Addition of capacitor C2 prevents accidental triggering
precautions. of bistable mu ltivibrator because of noise.
This circuit has proved valuable in operating
closed-circuit television and in controlling video­ again breaks the feedback path for noise.
tape and audio-tape recorders. The larger the value of C2, the less susceptible
Capadtor C2 bridges the collectors of Q1 and to noise the circuit becomes, keeping in mind that
Q2 to eliminate the most stubborn case of noise the larger values reduce the frequency response
triggering. If Q1 is conducting, a negative noise proportionally. 'Vith C2 equal to 0. 1 microfarad in
pulse at its base could cause it to cease conduc­ the circuit shown, the upper frequency limit ac­
tion. The resulting positive pulse from the collector cepted by the input is about 400 cycles per second.
of Q1 through resistor R2 to the base of Q2 would With C2 at 0.47 p.f, the limit is about 100 cycles per
normally allow Q2 to go into full conduction. How­ second. C3 and C4 should be half the value of C2
ever, the decreasing voltage at Q2's collector is to insure proper triggering and maximum speed.
immediately fed back through c2 to Ql' s collector, In this circuit, a relay is used as Q2' s collector
thus suppressing the pulse and breaking the feed­ load for alternately controlling other electronic cir­
back path. cuits. D1, which normally protects Q2 from the
When Q1 is cut off and a positive noise pulse ar­ inductance of the relay when it is de-energized,
rives at the base of Qt, the negative-going pulse can usually be eliminated because small inductive
at the collector of Q1 is shunted to ground through loads are bypassed to ground through c2 and con­
C2 and transistor Q2, which is conducting. This ducting transistor Q1.

� - -� +
D-e converter ci rcuit
- -

uses capacitors

By J . M. Ma rzolf
U.S. Naval Research Laboratory, Washi ngton

D-e to d-e converters usually employ transistors

A LL TRANSISTORS 2 N174 ALL CAPACITORS t ,OOO p.F
A LL DIODES 1 N 2 !50
for switching elements, a transformer to change
the voltage level and a rectifier to provide the d-e Three-stage d-e to d-e converter. Solid arrows show the
charge cycle; dotted a rrows show the d ischarge cycle.
output. The circuit shown to the right eliminates the
transformer and accomplishes conversion by al­
ternately charging and discharging capacitors. low-power, high-voltage battery applications. It
Relative simplicity of design and the use of low­ might also be used for applications requiring low­
voltage components make this circuit useful in magnetic fields such as magnetometer instrumenta-

31
 100�------�
tion circuits.
For voltage step-up, as shown in the diagram, ;e
!,..
> 90
the capacitors are charged in parallel and dis­ u
z
LU

� 80
charged in series. To step down the voltage, the
capacitors are charged in series and discharged ...
LU
in parallel. The transistors, rectifier diodes and
capacitors, with the exception of the output rectifier
and filter capacitor, need only be rated at the
input voltage level. Any number of stages can be
connected to obtain an output at that multiple
of the input voltage.
The transistors function as switches and are all
driven simultaneously by phased square-wave
pulses. A small static inverter generates the square­
wave pulses. Other sources might be used, pro­
vided the pulses are electrically isolated from each
other. The driving circuits are phased so that when
the input transistor is turned on, the interstage
transistors are turned off. The current How will
simultaneously charge all the capacitors in paral­
lel, as shown by the small solid arrows.
During the discharge cycle, the input transistor
is turned off and the interstage transistors are 1 .4 1.6
simultaneously turned on. This connects the inter­
stage transistors in series and the capacitors dis­ Output characteristics of the three-stage converter.
charge through the output circuit, as shown by the
small dotted arrows. During the discharge cycle, be used for the same output power. The output
current does not How through the interstage rec­ characteristics of this circuit are shown in the
tifiers because they are all reverse-biased. The curves for output volts, power and efficiency as a
capacitor across the load, acting as an energy function of output current. The driving power for
storage device, continues to supply power to the the transistors was excluded in the derivation of
load during the portion of the cycle when the these curves; however, it is relatively constant for
other capacitors are being charged. all loads. The curves indicate a no-load voltage
The circuit was operated at approximately 2,500 more than three times the input voltage. The switch­
cycles per second with 1,000-p.f capacitors. At a ing spikes caused the higher output voltage, which
higher frequency, lower values of capacitors may led to poor regulation at very light loads.

High voltage, high current

in electro-optic modu lator

By Carl F. Johnson
International Business Machines Corp., Lexington, Ky.
MODULATOR ELECTR ICA L AR RANGEMENT
Electro-optic light modulator circuit. The high·
Generation of h igh electric fields,usually required voltage power su pply is required to supply the electric
for light modulation, can impose severe current re­ field for the electro-optic crystal. Switching tubes
quirements on the high-voltage power supply. The v�. and Vu charge and discharge the crystal voltage.
arrangement above right uses switching tubes to
minimize this current drain. others. Characteristics of these materials are given
Light modulation employing the electro-optic, or in reference 1. Under the influence of the electric
Pockels effect, depends on applying an electric field field, the crystals become birefringent, changing the
to electro-optic crystals such as potassium dihydro­ index of refraction and the velocity of light. This
gen phosphate (KDP), cuprous choride (CuCl) and effect on the index of refraction also changes the

32
 L I G HT
polarization of light passing through the crystal.
The polarization change, which is a function of the

T
applied electric field, results in an intensity change
in the output light-if the output is viewed through

�:�LaENS::lo:::�•:��:o:���
C RYSTAL
a polarizer.
Relatively high fields across the electro-optic
crystals are required to produce a polarization shift
sufficient to vary the light intensity from full on to
off.
Position of the crystal in a typical optical ar­ Optical arrangement shows position of the electro-optic
rangement is shown at the right. crystal relative to the l ight source and modulator.
Pulse tubes VA and VB act as the switching ele­
ments. A 4PR65A is a typical tube to use as VA and
VB· The operation is explained by assuming that
initially both tubes are off and that the voltage
across the crystal is zero.
To turn the light on, VA is turned on with an
input pulse, and the power supply voltage appears
across the crystal. Because the crystal acts as a low­
loss capacitor, VA can then be turned off and the
voltage will remain across the crystal. The crystal
rapidly charges to the potential of the high voltage Detected light output in trace 1 shows the light being
supply since tube VA can conduct high peak cur­ gated on for approximately one millisecond and
off for one ms. The horizontal time base is o.5 ms/cm.
rents for short periods of time. Trace 2 shows the lead ing edge of the detected l ight
Tube VB is then pulsed on briefly to discharge output. Approximately six microseconds (JLS) are
the crystal voltage and turn the light off. required to gate the light on or off. Horizontal
Short bursts of current through VA and VB con­ time base is 2 p.s/cm.
trol the state of the crystal so that the average cur­
rent requirements from the power supply are low.
Light modulation by electro-optic materials is Reference
applicable in light-beam communication systems,
facimile systems and in light-beam deflection for 1. Richard A. Soref and Donald H. McMahon "Bright hopes for

lO K
display systems: flat panels a nd l ight deflectors," Electronics,
displays. Nov. 29, 1965, p. 56.

Linear amplifier circuit

eliminates transformers

By John Althouse

BIATSO VOLTS
Escondido, Calif.

Modu lation transformers at audio and ultrasonic

carrier frequencies are bulky and expensive. They +0 2
can be eliminated with the circuit shown in the ..L
schematic at right.
The linear modulator comprises an integrated­ Siliconix field effect transistor replaces the mod­
u lation transformer in this linear amplifier circuit.
circuit operational amplifier and a field effect tran­
sistor. Since the circuit is linear and single ended, gate source voltage characteristic for a typical field
neither a filter nor transformer is needed. effect transistor is markedly similar. Thus, the re­
If the input circuit of the operational amplifier at sistor may be replaced by an FET, and by applying
right is assumed to be a resistor, and if this re­ the modulating signal to the gate, linear modulation
sistance is varied to control the amplifier gain, then of the audio signal may be obtained.
the resistance versus output voltage characteristic Carrier level is adjusted by d-e bias that sets the
is hyperbolic. The drain source resistance versus gate midway between zero bias and pinchoff.

33
Ci rcuit design

Designer's casebook
Two unijunctions form + 24 +24 + 24

low-cost level detector

0 T0-6V
By John G. Peddie
H . Dell Foster Co., San Antonio, Tex. OUTPUT
PULSE
The low-cost level detector shown at the right
provides constant-width pulses at a fixed repetition
rate while the input signal exceeds a specific level. Relaxation oscillator formed by C1, R4, Qa
In the application for which the circuit was re­ a nd Rs produces un iform pulses as long as
quired, the main design problems were: threshold set by R2 is exceeded at i n put.
A maximum of 100 microamperes could be drawn
from the signal source.
The reference level was negative with respect to another UJT, is reached, it fires and provides a dis­
ground and the supply voltage was positive with charge path for c] .
respect to ground. As long as the input voltage is above the thres­
A three-stage circuit was developed to provide hold of the circuit, Q2 will stay on-forming a re­
the necessary level detection pulse. An emitter fol­ laxation oscillator out of C1, R4, Q3 and R5• An emit­
lower input stage Q1 draws only 35 p.a, well under ter follower could replace Q2, but the threshold
the maximum specified. The threshold of the circuit would not be as predictable and also would be
is set by R2, which forms a voltage divider with more affected by temperature.
R1. The second stage, Q2, is a unijunction transistor If temperature stability is not critical, type
(UJT) whose triggering level is set by potentio­ 2N2160 unijunction transistors may be used, reduc­
meter R2. When Q2 fires, a series resistance is ing the cost still further. To improve temperature
formed, consisting of R4, Rbb and R3. Capacitor C1 stability, R5 can be reduced to 27 ohms, at the
now begins to charge. When the peak point of Q3, sacrifice of lower output pulse amplitude.

This is expressed in the truth table shown at the

Excl usive OR circuit right for the logical expression, F == AB' + A' B.
Usually, high speed is not required and stand­
req uires no voltage supply ard transistor-resistor (TRL) NOR logic is used.
With TRL, an equivalent expression is derived
By T. P. Sylvan using double negation and by applying De Mor­
General Electric Co., Schenectady, N . Y. gan's theorem 1 :
F == AB' + A'B
A simplified exclusive OR circuit, useful in indus­ == (AB' + A'B )"
trial controls, reduces the number of components == [ (AB')' (A'B)']'
required in conventional circuits of this type, and == [(A' + B) (A + B')]'
requires no voltage supply for the transistors. == (A' + B)' + (A + B')'
An exclusive OR circuit yields a logical !, if only == [(A' + B)' + (A + B')']"
one of the logic inputs is present. The logic output
is 0 if none of the logic inputs is present, or, if An exclusive OR circuit using TRL and based on
more than one of the logic inputs are present. this final expression is shown in the upper diagram

34
 +
Definitions of logic symbols and theorems
A + B stands for "A or B".
AB stands for "A and B" (sometimes shown as
A. B).
A' stands for logic negation "not A" (sometimes A .....----"oflll'ltl---4�
shown as A).
A!' stands for double negation.
(A + B)' stands for "not A or B" (nor functions).
De Morgan's theorem states that (A + B)' ==
A'B' or (AB)' == A' + B'.

at right. It has npn transistors and provides posi­

tive true outputs-a positive input or output voltage
corresponds to a 1 in the truth table; a zero or nega­
tive voltage corresponds to a 0 in the truth table.
Base-bias resistors are not shown but may be re­
quired, depending on logic levels, transistor char­ Conventional transistor-resistor NOR circuit to perform
logic function F = [(A' + 8)' + (A + 8')'] " .
acteristics, operating temperature range and noise
requirements.
The simplified, exclusive OR circuit, shown
at the right, is a hybrid circuit that uses TRL
plus a dual-diode output gate to perform the OR
function. The logic signals are applied to the base
and collector of the transistors so they perform -::- 16U1
both the NOT and the AND function. Besides
requiring fewer components, the circuit also has
the advantage of not needing a separate transistor
voltage supply. Reducing the number of stages
also reduces the propagation time by about 4:1.
Truth table for exclusive OR
Simplified, faster exclusive OR circuit which
has fewer components and operates without
voltage su pply, achieves output F = A8' + A'8.
Inputs Outputs
A B F == AB' + A'B The circuit can easily be extended to three or
more inputs, requiring one transistor and one
0 0 0
diode for each additional input.
0 1 1
1 0 1 Reference
1 1 0 1. GE Transistor Manua l , Seventh Edition, Chapter 5, p. 1 23,
General Electric Co., Syracuse, N. Y.

Single component changes

bandpass into general filter

By Richa rd Ku rzrok, Communications Systems

Laboratory, Radio Corp. of America, New York

The general filter network at the right offers both

sharp pass and reject behavior at adjacent frequen­
Bandpass filter is converted to general filter
by bridging network with Coo and retuning
cies. The characteristic is achieved simply by bridg- with the variable capacitor C.

35
a::l
c

c!,
en
30
0
...J
z
2
ffi
1-
20
Cl')
z

t2 20
F R EQUENCY- M h z

Response curves of bandpass and general filter.

ing a conventional bandpass network with a single Characteristics of general filter
capacitor. The circuit is useful in systems requiring
asymetrical frequency selectivity characteristics.
The general filter is formed by bridging the filter Characteristics Bandpass Band reject
with capacitor C00• Equation 1 expresses the nor­
malized rejection frequency, Xp, with respect to the
Center frequency... . . . .
Peak insertion loss. . . . .
center frequency, f0, as obtained from nodal analy­ 20 Mhz 19. 1 5 M hz

3-db bandwidth . .
0.9 d b 34 d b
sis of the circuit
. . . . . • 1 M hz
12 Qt =
= Co
p f fo
X
-

( 1)
Ct Coo fadb
From this the value of C00 is With all values on the right side of equation 2
Co12 Qt known or derived, Coo
is calculated and found to
Coo = ���
Ct Xp (2) equal 47 pf. After bridging the original bandpass
network with this value of capacitance, the peak
where rejection frequency measures 19.15 Mhz. The

(3)
curves above show the response of the original
Qt = �
fa o a
bandpass and the general filter network. To evalu­
ate the quality of band-reject behavior the theoreti­
The basic bandpass filter in the diagram is de-­ cal insertion loss, I.L., at the frequency of peak
signed for a 20-Mhz center frequency, £0, and ex­ rejection, 19.15 Mhz, is derived from a nodal
hibits a large loaded Q with low insertion loss. It analysis of the general filter circuit:

10 log (1 +
incorporates a commercial air-core inductor wound
on o/s" stock, chosen to resonate with Ct, the total
I.L. =
Xp2)
+ 20 log Col QuL
circuit capacitance, which is equal to C01 + C =
121 picofarads. Coo Ct
(4)
Using equation 1 with center frequency fo = 20
Mhz and bandwidth f3na = I Mhz, Qt = 20. With a normalized frequency, XP = -1.7 and the
The normalized frequency is found to be -1.7 given values of Col, Coo, Ct and QUL, I .L. is calcu­
with the peak signal rejection frequency, f, equal lated to be 32.3 db, very close to the measured value
to 19.15 Mhz. Negative polarity indicates that the of 34.7 db.
frequency of peak rejection is below the center fre­ The generalized Biter can be used as a selection
quency. filter for mixers or frequency converters.

36
 Diode q uad modulator
suppresses carrier 65 db
GR UNIT PA D
osc r-
CARRIER IN

20 B �
... BALANCED � 10
MOD
1 PADB UO
MODULATION IN

�
GR UNIT
osc

STOD ART
250 MC MC

By W.H. El lis
l OUT

Page Commu nications Engineers, I nc., Washi ngton

N M-30

MSIOGDNUALATOEUDT RTUTAHNRSOFRMERMODr-4ULATION
FIM

A balanced modulator/ demodulator has been de­

Method for determining suppression uses the type
veloped for an experimental high-capacity com­ NM-30 field intensity meter as a tuned voltmeter.
munication system. It operates at a carrier fre­
quency of 250 megahertz (megacycles per second),
with a modulation rate of 110 megabits per second.
The circuit at the right suppresses the carrier

MTROADNUSLAFiy
OTRIOMNER
voltage to 65 decibels below that of the desired
sidebands and suppresses the modulation signal
at the output to 39 db below the modulator's input
level. The input modulation level is 3 volts and the
carrier level is 0.3 volt. At the modulated terminals,
the sideband voltages are within 1 db of each other.
Insertion loss in the circuit is 6 db.
Hewlett Packard's diode quad, made up of
matched hot carrier diodes is the nonlinear ele­ Balanced modulator/demodulator obtains h igh
ment. The manufacturer guarantees greater than carrier and modulation suppression by using closely
50 db balance for the quad at 70 Mhz. Even at 250 matched diodes and by providing adjustments for
Mhz, the quad was very well balanced. This elim­ amplitude and phase. Rt adjusts the amplitude while
inates bias networks to equalize the diode's oper­ the coaxial l ine adjusts the phase. Varying R2 allows
a slight amplitude adjustment.
ating characteristics.
In general high carrier and modulation suppres­
sion is difficult to achieve because extremely ac­ former to drive the modulation transformer in­
curate amplitude and phase balance in both the creases the modulation rejection.
carrier and modulation inputs are necessary. For Carrier suppression is measured with the ex­
example, to get rejection of 60 db, assuming no perimental arrangement shown in the block dia­
phase shift, the amplitudes must be within 0.01% gram above. The Stoddart type NM-30 field in­
of each other. Assuming identical amplitudes, the tensity meter is first tuned to the carrier frequency.
phase balance must be better than 0.006°. Next the attenuator and the coaxial line are ad­
Carrier balance is obtained by adjusting the justed for the minimum carrier level and the read­
length of the variable line for proper phasing and ing on the output meter of the field intensity meter
the attenuator for proper amplitude balance. Be­ is recorded. Mter the receiver is returned to the
cause adjustment of the attenuator changes the sideband frequency, the output meter level is again
phasing, attenuator and line adjustment is an recorded. The difference in the readings is the car­
iterative process. rier suppression with respect to the sidebands.
The modulation section poses a more difficult Modulation suppression is measured in the same
problem because it is a broadband circuit. As a way except in this case the suppressed modulation
result, it is not possible to make fine phase adjust­ signal is compared to the input modulation signal.
ments with tuned elements. Nor is it possible to Insertion loss is measured by tuning the receiver
use delay-line phasing because a delay in the ar­ to one sideband and recording its level. Next, the
rival of the balanced components from the trans­ input signal is connected directly to the receiver
former is not permissible. and its level recorded. The difference in reading
Phase balance in the modulation circuit is (corrected 6 db) is the insertion loss. A 6-db cor­
achieved by using wideband transformers that are rection is necessary because each sideband voltage
designed to be as well balanced as possible. The is theoretically one-half the carrier amplitude.
modulation transformer has a frequency response Sideband levels are measured simply by tuning
from 100 kilohertz to over 100 Mhz. A degree of to each sideband and recording the output level.
amplitude balance is obtained by adjusting the Work is continuing on improving modulation bal­
center tap on the high frequency potentiometer, ance and frequency response, and reducing inser­
R2• Using a RuthroH balanced-to-unbalanced trans- tion losses.

37
C i rcu it d es i g n

Designer's casebook
center or reference frequency of the circuit can
Audio discriminator measures easily be adjusted by changing the RC time con­
stant.
large freq uency changes The transfer function for the RC network,
Vo == vi exp (2j arc tan RCw),
shows that when the input signal frequency varies,
By Jea n F. Del pech the phase angle of V0 changes but its amplitude
l n stitut d' E lectronique, Orsay, France does not. Therefore,
V" == l vol cos ((l>t + cp)
where cp == 2 arc tan RCw.
The circu it below produces a linear error voltage The second stage compares vi and V0 and pro­
which is proportional to a frequency change of an duces an output voltage, V, proportional to their
input signal. If the signal is generated by a coil phase difference cp. Input voltage vi is fed simul­
on the shaft of a small d-e motor, the error voltage taneously through R1 and R8 to the base of the
can be used in a feedback loop to stabilize the chopper pair Q2 and Qa, so that during each half
motor's speed. cycle, one transistor is on and the other off. When
The circuit is useful in the measurement of drift, Q2 is off and Qa on, part of the signal V0 is fed to
wow and flutter on recorder turntables and tape ground through R6; part of the signal flows through
recorders, where the input signal originates from a Ra, R9 and Rto, charging C4. On the next half cycle,
prerecorded audio signal. C4 is charged through Rn, Rto and R9.
The circuit's first stage shifts the phase of the The error voltage, V, appearing across C4 is
input signal in proportion to its deviation from a V == k Vi COS cp
reference frequency. The second stage of the cir­ Since V must equal zero when the frequency of
cuit is a phase-sensitive rectifier that produces a the input voltage w == w0, the reference frequency,
d-e error voltage proportional to the deviation. The cp == 2 arc tan RC(I, == 1rj2.

P H A SE VAR Y I NG STAGE PHASE SENS I T I VE RECT I F I E R

Rt
47K
,..----��- -10V

I
I
Rt
47 K

l ouvur
I
R2
22K
I
I

Two-stage audio frequency discriminator first shifts phase of incoming

signal in proportion to its freq uency deviation, then produc es d-e voltage
proportional to the phase shift. Varying R and C alters the center frequency.

38
 Therefore, values for R and C are chosen so For example, at a center frequency of 600 hertz
that ljRC = (•J0• (cycles per second), a deviation of ± 60 hz can be
With a calibrated nonlinear scale, it is possible measured within ±3 hz. The center frequency can
to measure with good accuracy rather large fre­ be changed from several cycles to several hundred
quency variations, of up to ± 50%. For smaller kilocycles. The stability is temperature dependent,
deviations, a linear scale produces good results. but is better than 0.5% at room temperature.

potential, which, when exceeded, fires the tube

Cli p cou ples neon oscillators The circuit shown below is part of an electronic
organ tone generator which uses the principle for
By Robert F. Woody J r. frequency division. The diagram shows the clip as
a shield (dotted lines) around each lamp in a con­
Christiansburg, Va. ventional relaxation oscillator stage.
When L1 fires, the voltage at A is made sharply
negative. R2 and C2 are adjusted so that their effec­
The clip of an octal tube grid placed around a con­ tive time constant causes L2 to be fired once for
ventional neon lamp converts the lamp into a three­ every two pulses from L 1 , resulting in frequency
terminal device that can be used to synchronize division by two. The principle is applied to each
successive stages of neon lamp relaxation oscilla­ stage in the frequency divider chain.
tors, overcoming their inherent instability. The divider can operate at any frequency from
Negative pulses to the clip create an electrostatic 100 hertz (cycles per second) to 4,000 hz.
field within the lamp and reduce its ionization No-load output voltage is 15 volts peak to peak.

t80 V --��----�---,

Ct
O.Oot

3, 520 h z 1 , 760 h z 880 h z 440 hz

Three stages of neon oscillators are synchronized by grid c l i p cou pling between stages.

The circuit on page 78 shows the tachometer to

No moving parts the right of the dotted line.
The top waveform on page 78 is the voltage
in a uto tachometer across the coil, which is also the tachometer input.
The waveform consists of a peak oscillatory voltage
of about 200 volts-decaying rapidly as the spark
By J .A. I rvi ne plug fires-followed by a voltage step equal to the
Findlay, l rvine Ltd., Penicuik, Scotland battery voltage when the breaker points close.
The center waveform is the voltage across C1
and C2. It shows the effect of 01 conducting on
automobile tachometer circuit
A rel iable, accurate the first positive excursion of voltage across the
uses standard passive components with no moving coil. Ct and C2 are charged to about 200 volts. The
parts, and may be built into any panel-type meter. RtCt and R2C2 time constants are chosen so that

39
the voltage across C1 and C2 decays more slowly
than the coil voltage. In this way, D1 does not con­
duct again until the points open once more.
The lower waveform is the voltage across C2.
+
Zener diode D2 limits the maximum charging volt­ .,..
age across C2. The decay of voltage across C2 is I
I
governed by the fixed R2C2 time constant, resulting I
I
--'--
in constant area pulses.
With a four-stroke engine, the mean current flow­ Ct
ing through the meter is calculated easily. If N == 0.1/'F
250 V
engine speed in rpm, n == number of cylinders and Rs
220 Dt
V == zener voltage , the number of current pulses
per second (pps) flowing through the meter is

N n
60 " 2
pps = (1 ) Dt - 400 PIV, tA PEAK

D2 - 6 VOLT ZENER DIODE

ft>>C2R2 R2c2
The area of each current pulse Tachometer circuit, shown to the right of the
dotted line, connects to the automobile circuit

R2 t=O
V at the battery and the contact points.
(2)
t_
_ _

A = - e dt = VC2

Therefore, the mean meter current is

(3)
APPROXIMATELY
NnVC2 200 V
I =
120 t2 V

If full-scale meter deflection corresponds to 6,000

rpm and the motor has six cylinders, then full-scale
deflection current from equation 3 is 6,000 L
6,000 X 6 X 6 X 1
TIME
. APPROX IMATELY
I max = = 1 ,800 miCroamperes 200 V
120
The pulse rate, calculated from equation 1, is
300 pps, corresponding to a minimum time interval
of 3.3 milliseconds. If R2C2 is one-quarter of this V=ZENER VOLTAGE
value, then equation 2 is accurate within 2%. This
means that the tachometer will follow the engine
speed up to full scale with an error of less than 2%.
Calibration is not affected by Ct , R1 or R2• If a Waveforms indicate voltage condition s that occur
in the tachometer circuit. Top waveform shows
low temperature coefficient zener diode is used, the the primary coil voltage; center waveform is
accuracy of the tachometer is the same as that of the voltage across C1 and C,; the lower
the meter over the normal temperature range. waveform shows the voltage across Cs.

radars. The circuit on page 79 provides a group of

Si m ulator ci rcuit generates pulses with a fixed pulse repetition frequency-at
the touch of switch S1•
video or noise pulses A pulse generator connected to input J1 is set
at the desired prf, pulse width and amplitude.
By La rry Tu rf With St in the position shown and capacitor C1
charged to the battery voltage, Q1 is biased off
Ai rborne I nstruments Laboratory, a division of while Q2 is in the on condition. When S1 is pressed
Cutler-Hammer, I nc., Deer Park, N .Y.
momentarily, a negative trigger is applied to the
base of Q2, reversing the off-on states of Q1 and Q2.
I n simulation, it is often necessary to generate a This produces a positive gate pulse at the collector
predetermined number of pulses; for example. to of Q2, the duration of which is controlled by R8•
simulate the target returns of different types of This gate pulse is coupled to the base of Q3, pro-

40
clueing bipolar output pulses which are coupled to
the bases of Q4 and Q.,. Their outputs operate the
diode gate Dt, D2, Da and D4.
-J I- MI C RO S E C O N D
{l; -1 1-- 555 MICROSECONDS
1

��1111111111111111111 1 11111111111111
"'hen S1, is momentarily pressed, a predeter­
mined number of pulses are gated out at }2. The

:
number of pulses depends on the duration of the I .,
gat<_>s at the collectors of Q4 and Q:.. I t
�
This is il1ustrated in the pulse diagram shown

gl MIL ISECONDS -iI

to the right. A pulse generator is set to a prf of
1,800 pulses per second, a pulse width of 1 micro­
second and an amplitude of 1 volt, and con­
nected to the input J 1 ·
�t21-11
If a pulse count of approximately 20 is required,
then the pulse duration on the collector of Q�as
set by R8 must be 555 x 20, or 11 milliseconds.

PULSES ---11 111

��11--1 111 1 1111111111
'Vhen pulse groups at a specific prf are desired,
the pulse generator is connected to r� and switch
S2 is placed in position 2. The generator pulses are
differentiated and these negative triggers produce a •

20
t
"bundle" of pulses at a specific prf rate.
Connecting a noise generator at J 1 and follow­ Typical i n put and output pulses for a radar that
ing the same procedures as outlined above will has a prf of 1 ,800, a pulse width of 1 microsecond
supply noise bursts when S 1 is pressed or at a and an amplitude of 1 volt. If 20 output pulses
specific repetition rate. are required at J:!, the duration of the gate pulse
Either pulse or noise outputs can be used in con­ is set to 1 1 milliseconds by adjustment of R...
To get a pulse count different from 20, potentiometer
junction with integrating techniques in counting R,. is adju sted to provide a different pu lse duration.
and threshold devices. It is also possible to use The pu lse count is equal to the prf rate

OMPAENRUATLION Sz Caty- PGINEUPNLUSTREATOR

this technique in signal to noise measurements. times the duration of the gate pulse.

+tSVR7
1 2 0.01 J3

Ra
-=

CPOUUTLNSTE
3.6K 100K

Rt
.n.

1.8K
Rto
3M
.1'--...--T'""'r-

Jt C7-r1
PUGELNSIENPUTNOISE--
UNLESCRAEPSOAITSCHTIEARNCWEISVEALNUOETSEDIN: OJJHFMS Rts RS.t&K
OR
05

DIODES A R E TYPE
-= 0.33 2N697

-= 431(

1N270 - ts v --------._--�

Group of pulses is generated by connecting pulse generato r to J1 and momentarily pressing St.
The n u mber of output pulses at J2 depends on duration of the gate which is set by Rs. Automatic
generation of pulses at a specific prf is made possible by c onnecting pulse generator to Ja.

41
 Circu it desig n

Designer's casebook

+28 V
Silicon switch turns off
stal led servomotors

By David Perl man

Apparatus a n d Optical division,
Eastman Kodak Co. , Rochester, N.Y.

Burnout of stalled direct-current servomotors is

prevented by the timed safety circuit at the right.
The timer turns on coincidentally with the servo­
motor, regardless of the direction of servo rotation,
and removes power from the motor if it remains on
for more than 15 seconds (an abnormal condition 04
1
indicating stall). 1 N 755A

To start the servo, current is supplied to the

servo armature through pairs of power transistors, R7 Rtt
Q1 -Q:! and Q:J·Q4 in a bridge circuit. For clock­ 220 K 390 K
wise rotation, Q1 and Q:! are saturated, connect­
ing the motor between the 28 volt d-e supply and
ground. For counterclockwise rotation, Q:� and Q4

RE S E T
are saturated, reversing the power supply po­
c3
larity on the motor armature (drive circuitry for 0.0022p. F
the servo switching transistors is not shown).
With the motor energized and Q1 conducting,
current flows through Q 1 , D1 and R 1 , charging the Timing circuit triggers silicon controlled switch
timing capacitor C 1 • \\'hen the charge reaches Q1 if motor is powered for more than 15 seconds.
about seven volts, it breaks down zener diode D4.
Charging time constant R,C1 is chosen so that this
takes about 15 seconds. Conduction of D4 triggers .! E -----..
the silicon controlled switch, Q;, into the "on" state.
When Q; conducts, the voltage on its emitter actu­
T
lL�____. Rs lr•
ates an external disabling circuit (not shown) which +
cuts off transistors Q1 and Q:.!. This removes the
28-volt d-e supply from the servo and stops it. The
same sequence occurs for rotation in the other di­
rection, except charging goes through Q:l and D:.!.
Once the servo is disabled, it will not start again Reset-time equation is derived from this equ ivalent
unless the timing circuit is reset. External reset circuit. S represents Q7 i n the actual circuit.
circuitry momentarily grounds the base of Qt;,
turning it off. This allows current to flow through
R10 and R1:! to charge C4• \Vhen the reset line is re­ level. Rectifiers D1 and D:.! become reverse biased
opened, Qu turns on and the resulting negative by V('t since points A and B are both near ground
pulse coupled through D:; returns Q; to its block­ potential. Transistor Q;;, which has a high BV 1mo,
ing state. had been held off by the voltage v('] - v('(1
During normal operation, the motor turns off Ra/ (R.. + R:;). Now, Qr. becomes forward biased
before the voltage Vm across C1 reaches the zener with a base current equal to (Vc1 V ER/ Rrt). Col-
-

42
lector current will Bow until C1 is discharged to
within a few tenths of a volt, effectively resetting
the timer. Reset occurs within a small fraction of dt (hFE>> 1)
the timing interval.
Since C1 cannot charge to more than the zener
voltage of 7.5 volts without triggering Q7, reset
time will be maximum when Vc1 is slightly below V1 is the voltage across C1 as Q5 starts conducting
7.5 volts. Assuming an average hFE is 30, cl will and V, is the voltage remaining after T seconds of
discharge from 7 volts to 0.8 volt in 0.08 second. discharge. Because the emitter-base voltage is
The discharge time is calculated as follows, refer­ omitted in the derivation, the equation is invalid if
ring to the figure on the facing page: Vc1 is less than approximately 0.8 volt. It is as­
IB � VC I/Rli ; I c = hFE Vci/Rli sumed the switch S closes at T = 0.

D-e logarith m ic ampl ifier

com presses input current

By George W. Ca ndel
Autonetics, a division of North American Aviation I nc.,
Ana heim, Ca l if.

This simple d-e logarithmic amplifier is useful in

many instrumentation and detector applications.
The amplifier compresses a positive input current
range into a proportional voltage output according OUTPUT
to the relation:
V = A log I
where I is the input current, A is a constant and V Rs
5K
is the output voltage. This characteristic is derived
from the logarithmic relationship between voltage
and current in diode D1 of the circuit at the right. D-e logarithmic amplifier compresses input current
Because the diode leakage current and the cur­ into output voltage in accordance with V = A log I.
Amplifier trades voltage gain for resistance multiplication.
rent drawn by the amplifier are negligible com­
pared to the diode current over the input current
range of interest, the diode voltage is linearly am­
plified by transistors Q1 and Qa. Thus the output
voltage is essentially a logarithmic function of the
diode current.
Diode D1 is a low-leakage diode-in this case
the PS 5570. A field effect transistor is used for Q1
since it is capable of input resistances as high as
100 gigaohms. The amplifier circuit is also designed
to trade voltage gain for input resist�nce multipli­
cation. Resistors R7 and R8 form a feedback path
from the output to the input of Q1 to increase the
input impedance. The voltage gain is a function of
the ratio R7/ R8• As this ratio decreases, the voltage
gain decreases , but the input impedance increases.
Differential amplifier Q3-Q4 allows the use of a
larger load resistor for Q1, thereby yielding more
voltage gain for this stage. Qa and Q4 also provide Input currents from lo-s ampere to one milliampere result
compensation for voltage drift with temperature. in a compressed output voltage range of 0. 1 to 1 volt.

43
Variations in the base to emitter junction voltages R8, establishes a low output impedance.
of transistors Q8 and Q_. due to temperature changes Transistor Q2 provides the operating current and
are compensated so that the collector voltage of a low source impedance for the field effect tran­
Qs tends to remain constant. sistor. It also serves as a convenient isolated feed­
� and Rr; are selected to set the quiescent volt­ back point for summing with the input signal from
age output-usually in the vicinity of zero. the diode.
The output of emitter-follower Q5 increases the The graph on page 91 of amplifier output voltage
voltage gain capability of transistor Q3, provides as a function of input current shows that input cur­
more output current capability and, in conjunction rent from 10 nanoamperes to 1 milliampere is com­
with the shunt feedback, through resistors R1 and pressed into a voltage range of 0.1 to 1 volt.

be reinforced-with the presentation of these 50

Gate varies rewards rewards on a quasi-random schedule.
The circuit on page 93 shows an astable multi­
from teaching machine vibrator and a monostable multivibrator both feed­
ing into an AND gate; the output of the AND gate
feeds the triggering circuitry of the reward dispens­
By Guy S. Pennington J r. and ing device.
James A. Boehm , I l l The astable multivibrator runs at a fixed rate
Speech and Hearing Center of approximately 100 cycles per second, and, as­
New Mexico State U niversity, Las Cruces suming a symmetrical circuit, the output is a sim­
ple square wave. 01, D2, R3 and R4 provide a quick
Teaching machines are designed to reinforce learn­ discharge path for C1 and C2 to achieve sharp rise
ing by "rewarding" all correct answers. But studies and fall times at the output. This is fed into one
in human learning have demonstrated that it is of the AND gate inputs. A 5-microsecond mono ­
often desirable to shift from a 100% reinforcement stable multivibrator, triggered by each correct re­
schedule to an intermittent one. For example, if sponse, feeds the other input of the AND gate.
candy is used as a reward, there is a practical The 5-p.s monos table output, T2 , is therefore
limit to the number of candies that can be con­ random in time in comparison to the period Ta­
sumed in a given period of time. about 10 milliseconds-of the astable multivibrator
Besides varying the number of rewards for a (see waveforms below). The probability, p, of an
given number of correct responses, it is sometimes output from the AND gate is approximated by

T1 + 2T2
desirable to vary the interval in which these re­
Ta
wards are given. p =
These features have been incorporated into a ---­

teaching machine in the form of a circuit which Since T2 is very small compared to Th the prob­
provides for a series of variable probability sched­ ability can be expressed as:
T1
ules ranging from continuous ( 100% ) reinforce­

Ta
ment to cessation (0%) of reinforcement. At a 50% p =­
setting, for example, 50 out of 100 responses would

OUTPUT OF ASTABLE
MULTIVIBRATOI'

ov

n n
OUTPUT OF MONOSTABLE
-1 2 V
MULT I V I BRATOR
..____.... ._____

-----.u•--- - --- --------

_ _ _ _ _ _ _ _ ______.... ....____

OY
OUTPUT OF AND GATE
-1 2 V
Output waveforms from the astable multivibrator, monostable multivibrator and the AND gate.

44
 1
,

"2A-NIDN"PUT
r---------- ------,
-�v oc

TDCOIRFSIPCGRUENIEWTSRAIINRNYGDG
PERIOD=T3
I

E VICE
I
I
I
I
l
I

I
- - - - - - - --

Rs
I

RSEWINTFCOHRCEMENT
1K
I
L------���---- --�
100%

I - 1 2 V DC �
II
L----- ------ �-------- ---

CPROUERSLPOEECNITSEPUT 15 K
- - - - - - - -- - - - - ---- -- - - - - - - - - - --,
I I
I
I
33K 1K
I

I +6VD C
I
I

DRIVE R 1 5 -JL S M O N O S TA B L E INVERTER

I
33K I
I

-
I
I
I
I
I
I
L----- -��TI���Q� - ------- ---- ---L---- - - - - - - - -- �

Correct responses trigger monostable mu ltivibrator; its output i s fed i nto an AN D gate with the output from a n
astable multivibrator. Output of A N D gate feeds triggering circuit of reward-dispensing device.

The pulse duration T 1 is controlled by R2K and The value of C is calculated using the following
C2 and the period T3 is controlled by the combina­ assumptions:
tion of RtK, R2K, Ct and c2. Also, the symmetry of • output of the astable multivibrator is symmetri­

the astable multivibrator output waveform can be cal (p = 0.5 )

adjusted by RtK and R2K while maintaining a con­ • RtK = R2K == R where R is chosen in terms of

stant frequency. If Ra, R�;, R. and R6 are kept rela­ the drive requirements for Q1 and Q2• (15K for
tively small compared to R1K and R2K, the follow­ 2N404 transistors)
ing equation approximates the output of Q2: • The astable multivibrator is running at its se­

R2 KC2
lected period T3• C is calculated:
T1 = t (on) = 1.44" "" 1 . 44 T3p
C
R
=

Therefore, the desired probability can be obtained

by selecting RtK and R2K in accordance with The value obtained is then adjusted to the nearest
standard value. Using this value of C, values of
Ta
R2 K - 1.44p (1)
RtK and R2K are calculated from equations 1 and
C
_

2 for the various desired probability values.

(� )
Values of p ranging from 0.1 to 0.9 can be ob­
Rt K - 1 R.K
tained.
= (2) For 100% reinforcement, the "correct response"
where Ta
pulses bypass the astable and monostable multi­
= selected period of oscillation in seconds vibrators and are fed directly into the triggering
c = c1 = c2 circuitry of the reward dispenser.

45
 Circuit design

Designer's casebook

Low-pass amplifier
with adjustable bandwidth
By M ichael G. Wilson F R EQUENCY
Harvey M udd College, Claremont, Calif.

Circuits with automatical ly adjustable bandwidths

are useful in frequency-response equalization and
other system applications. In designing a low-pass
amplifier circuit whose bandwidth is adjustable, it COMPL E X FR EQU E NCY S:o cr + j c.�
is desirable to maintain the same type of frequency Moving th e poles along rays in the complex frequency
response for all bandwidths. plane results in maximally flat gain versus frequency, with
A commonly used type of frequency response is bandwidth dependent upon distance of poles from origin.
the maximally Hat or Butterworth1 response. In the
maximally Hat low-pass circuit, the circuit poles are
distributed uniformly around a semicircle drawn in
the complex frequency plane. For a four-pole cir­
cuit, the poles must be oriented at angles of 22.5°
and 67.5� respectively. The radius of the semicircle
is directly proportional to bandwidth. To increase
the bandwidth and maintain maximally Hat fre­
quency response, the pole locations must be moved
out to a larger circle, while maintaining the same
angular spacing around that circle. The poles must
move along rays from the origin as shown in the
upper illustration.
A circuit which effectively allows the poles to
be moved in the desired manner is the feedback
pair circuit2 at the right. Feedback resistor Rr, tran­
sistor current gain {3, transistor input impedance
h1e, and output capacitance C determine the pole
locations. The poles are located in the complex Feedback pair circuit has two poles whose
location can be changed by varying bias voltage on

_1_ [1 (4{:j - 1)1/2]

frequency plane at variable-capacitance diodes D1 and o•.

S =
::C j h ie
2hieC R,
angle does not change as the bandwidth is varied
This corresponds to a bandwidth, in hertz, of by changing output capacitance C.

2� ( h,;R , )"'
Output capacitance C is made up of the tran­
sistor capacitance plus capacitance provided by

(4{:j :R: )1'2

variable-capacitance diodes Dt and D2• Adjusting
The angle of the ray along which the pole must the bias voltage on these varicap diodes changes
the amplifier bandwidth while maintaining a
move is given by arctan
h·
-1 • Thus the maximally Hat frequency response. The bias voltage
could be derived from an electronic error sensor

46
and the circuit arranged to automatically adjust iw
the bandwidth. 2 W' • 280
In the feedback pair circuit, Rr is 30,000 ohms,
which gives a pole angle of 67.5° for a f3 of 50 and
hie of 1,000. For the same values of f3 and hie, an Rt
of 180,000 ohms places the pole angle at 22.5°. Two
2 W" • t 90
circuits in cascade, with pole angles of 67.5° and
22.5° respectively, gives a four-pole, maximally
flat frequency response.
A single stage with a 67.5° angle was built and
tested. Bandwidth varied from 190 to 280 kilohertz
as the bias voltage on the varicap diodes was
varied from 0 to 10 volts. This is shown in the semi­
circle at the right in which the poles move along a
nearly radial path.
Variable bandwidth circuits are also obtained
by mechanically varying circuit parameters such as
capacitors and inductors. The advantage of this cir­
cuit is that a single element is electronically (volt­
age) variable and the shape of the pass band
(maximally flat) is maintained independently of
bandwidth. Additional amplifiers can be connected
in cascade with feedback pair circuits providing
variable bandwidth.

References
Changing the bias voltage on the variable-capacitance
1. J . M . Pettit and M . M . McWhorter, Electronic Amplifier Ci rcuits: diodes in the experimental circuit moved the
Theory and Design, New York: McGraw- H i l l Book Co., 1961.
2. G.E. Valley and H . Wa l l man, Vacuum Tube Ampl ifiers, New poles along a nearly radial path. Bandwidth
York: McGraw-Hill Book Co., 1948. varied from 190 khz to 280 khz.

Capacitor charging controls Each charge and discharge of capacitor C1, which
represents one cycle, is switched by Q2 and Q3•
Q2 conducts when the input is at ground but the
varia ble ram p generator charging current is switched via Q3 when the input
signal is more negative, but more positive than - 10
By D.J . Grover volts. This allows Q4 to switch "on" and C1 dis­
charges through it to a voltage set by the variable
Marconi Instru ments, Inc., resistor R21 ·
St. Albans, Herts, England
The peak of the ramp is set by variable resistor
RtD · In the event that the ramp reaches too high
a voltage before reset (or discharge of C1), the
A variable slope ramp generator, useful in display emitter follower, Q5, raises the base potential of Q6
and sampling systems, is shown in the figure and turns off the emitter-coupled bistable multi­
on page 92. The circuit maintains a constant peak vibrator formed by Q6 and Q8• Current generator
voltage amplitude independent of the input ampli­ Q7 now predominates in controlling the charging
tude with a period equal to that of the input wave­ of C3, and applies a more positive potential to the
form. Feedback circuitry detects and corrects the base of Q1, thereby reducing the charging current
waveform voltage amplitude for a fixed period. of C1. This reduces the ramp incline, and results
The ramp slope is a function of the rate of charg­ in a decrease in peak ramp potential.
ing of C1. Capacitor C1 is charged by the constant With the bistable multivibrator off, the base
current generator, Q1 and R4, through Q2 • The potential of Q8 falls below that established by the
charging current is controlled by the potential on resistive divider Rto and R11• The bistable is reset
the base of Q1. The waveform to which the ramp is at the beginning of the next cycle by the leading
to be synchronized is squared externally, generating edge of the input square wave through D3 and C5•
a negative pulse at half-frequency which is then ap­ When the ramp is too slow, the bistable multi­
plied to the input. vibrator stays on, and supplies a current exceeding

47
 +20 V

03
2N404

O U T P UT

R te Rg
220 K 3.9K
I NPUT

- 20 V
Ramp slope depends upon charging rate of capacitor c •. T he peak is set by variable resistor Ra ..

that due to Q7, thereby increasing the negative Capacitor C3 is large enough to ensure that the
charging of Ca. This in turn increases the negative change in ramp gradient is neglible over two cycles;
potential on the base of Q1, speeds up the charging however, it is small enough to allow compensation
of cl and increases the ramp slope. for errors due to power supply ripple. The emitter­
In one cycle Q7 generates a charge which exceeds base junctions of Q1, QG , Q8 and D2 compensate
that of the bistable when it is on for 50% of the for temperature variations.
time but is less than that of the bistable when it The circuit is designed to synchronize over a
is on for 100% of the time. This constitutes a closed­ 3-to-1 frequency range centered at 70 khz with an
loop servo control, causing the bistable multivibra­ error too small to be observed on an oscilloscope.
tor to hover between conduction and cut off to The base of the ramp is variable between - 19 and
correct the ramp slope. -16 volts and the peak between 0 and -4 volts.

Biasing an FET for low drift + 35 V -8.4V

By Robert T. Buchholz
Honeywell Inc., Aeronautical Division, St. Petersburg, Fla. •

Eo

H igh input impedance and low drift is a combina­

tion that is difficult to achieve without the use of
choppers and demodulation techniques.
One way to obtain low drift is to use matched bi­ Leakage current of Dt is of opposite pouuity to
polar transistors-providing their base-to-ground FET gate leakage, providing a method of temperature
circuits are low impedance paths. But this rules out compensation while preserving high input impedance.
the possibility of high input circuit impedance.
Biasing a field effect transistor (FET) at the
temperature coefficients in the drain circuit cancel
proper drain current can achieve a low tempera­
each other. The drift with temperature in the gate­
ture coefficient (TC). This results because two
• Now with Lockheed Electronics Co., Houston to-source depletion region compensates for the

48
 2.5 ---:====:::::;'1
drift in the majority carrier drain circuit. If the .- U N IT Rs
gate of the FET is grounded, less than two milli­
A - NO. 1 F E T - 1 4 t K
volts of drift results over the temperature range of
B - NO. 2 F E T - 145 K
-25° to + HX>°C.
C - N O. 3 F E T - t 1 0 K
To achieve high input impedance, however, the
D - NO. 4 F E T - 108 K
gate must be kept above ground. When this is
done, an additional temperature effect occurs be­
tween +50° and + 100°C. This effect is due to
the reverse leakage current of the gate-to-drain di­
ode flowing through this high impedance. For a
planar device, this results in 15 to 20 millivolts of
drift across a 200,000 ohm gate impedance. A diode 1.5
and resistor divider network can be designed to
compensate for this drift.
In the circuit on page 92, the reverse leakage of
diode D 1 flows through resistor Rc. The value of Rc
TE M PE R AT U R E - D EG R E E S C
is selected so that the voltage drop produced across
Curves show the low drift obtained by using circuit on page
it by the diode leakage is equal to the drop pro­ 92. Four FET's were tested with indicated values of R •.

duced by reverse leakage across Rg. The leakage

current from diode D1 is of opposite polarity to the
FET gate leakage. pedance is essentially Rg. Drift of less than two
Resistor R1 serves to couple the temperature millivolts, as shown above, is maintained because
compensating voltage to the gate of the FET. With the gate is kept at zero volts over the temperature
a value of R1 much greater than Rg, the input im- range of -25° to 100°C.

.---+-------....-
.. - t2V
Zener diode a llows delay
tOK
without large capacitors
01
2 N 32 3
By A. S. Robinson INPUT
Ava lon Beach, New South Wales, Australia

2.2 K

A pulse-stretching circu it, designed around a zener

diode, can achieve long delay without the large
values of capacitance that might require bulky, un­
reliable electrolytic capacitors. Zener diode 02 isolates output transistor from R1C1
during charge cycle. When C1 reaches the 02 breakdown
The circuit at the right has a 6.2-volt zener diode,
rating of 6.2 volts, output transistor Q2 is turned on.
D:!, between the output transistor and the con­
trolling time-constant components R1 and Ct . In
the quiescent state, transistor Q1 is off and transis­
tor Q!? is on. Qt is cut off by the reverse emit­ -preventing the time constant from being modified
ter bias of diode D1• Q!? is conducting because of by the input impedance of Q2 in parallel with R2.
the base current flowing through R1 and D2• When the voltage across C1 reaches the breakdown
When a negative one millisecond input pulse is voltage of D2, Q2 again switches on.
applied to the base of Qt, it overcomes the reverse In the circuit, the delay is 10 milliseconds be­
bias of D1, causing Qt to conduct. This provides a cause the charge cycle is ended at approximately
discharge path for Ct. The discharge of Ct causes half the available supply voltage by the zener
D2 to cease conducting and the collector of Q2 diode, D2 • Furthermore, the value of R1 is limited
rises toward - 12 volts, turning it off. to about 100 k by the base-current requirement of
At the end of the input pulse, Q1 cuts off, allow­ Q2. When C1 is 1 p.f-the largest convenient size
ing Ct to recharge through R1 . During the charging of a polyester film capacitor-a variable R1 permits
cycle, Q2 is isolated from R1 C1 by zener diode D2 a delay as long as 50 milliseconds.

49
C i rcu it desig n

Designer's casebook
transistors are switched through the active region,
One-mega hertz fl ip-flop instantaneous power dissipation increases. The
average power dissipation is given by the empiri­
saves stand by power cal expression:
p � 150 + f (1.55)
where P is in microwatts, f is the trigger rate in
By M . E . McGee and J . H . Wujek J r. khz, and QL f L 1,000.
Lawrence Rad iation Laboratory The circuit consists of two interconnected flip­
U n iversity of Ca lifornia, Livermore flops, sharing a common diode steering network at
the input. Diodes Dt . D-t , Dr. and D8 protect the
emitter-base junctions from breakdown and also
A complementary flip-flop with a power dissipa­ increase switching speed by clamping the back­
tion of less than two milliwatts at one megahertz bias levels at the base of the transistors.
has been designed for use aboard space vehicles. In the packaging schemes used, the anodes of
This dissipation level represents an improvement D-t and D8 are not connected internally, but were
by a factor of five over presently available inte­ brought out for d-e set and reset purposes. The
grated circuits. Required standby power of 150 table to the right of the circuit diagram describes
microwatts is 50 times less than required by IC' s. the function of various circuit points . A current
The complementary-pair concept of flip-flop de­ pulse of 10 microamperes sets or resets the flip-flop.
sign has long been recognized as a means of con­ When operated as a scaler, DS and DR arc con­
serving power. The circuit below does not use nected to ground. Similarly, the resistors R:! and
collector resistors, hence power dissipation oc­ R6 are not connected internally to the output, thus
curs only in the saturated transistors and the re­ providing a shift register function capability.
sistors supplying the "turn-on" base drive. As the In the quiescent state, only about 12 p.a is sup-

.-----.---��-- � c POINT FU NCTION

01 05
V ee 6V

TaF OUTPUT
t a r CONNECT TO
T AND F
FOR B I N ARY
OPE RATION
OS DC SET
DR D C R E SET
OS a DR CONNECT
TO GROUND
FOR BI N ARY
OPE RATI ON
AS AC S ET

AR AC R E S ET

1. at a a 2 :
SELECT E D
2 N 3251 .
2.03 a a 4 :
COM P LE M E NT

3. 0 1 - 0 8 :
TO 2 N3251

I N3 2 06 O R
OR AS AR OS IN9 1 4
One megahertz flip-flop is desig ned for binary operation, as a scaler or shift register.
The com plementary-pair design achieves the low power dissipation.

50
Parameters for selection of transistors. 7 r-------�

10
Characteristic li m its
(T = 25°C u nless noted) Min Max Test Conditions

hvE . . . . . . . .
. . . 40 VcE=5V, lc= 10 p.a.
hFE . 80 240 VcE=5V, lc= 1 00 p.a. 7
6
hvB ( -55°C) . . . . . 15 VcK=5V, lc= 100 p.a.
h te . . . . . . . . . . . . 1 .25 lc=500 p.a., Vc•= 1V
5
f=100 Mhz
BVcso (volts) . . • • 40 lc= 1 0 rna, ls=O,
300 p.s pulse at (f)
1-
..J
1 % duty cycle 0
>
BVcso (volts) . . . • 50 lc= 10 p.a., 1.=0 5
w
BV.so (volts) . .. . 5.0 1.=10 p.a., lc=O C)
6
<[
Cob {pf) . . . . . . . Vcs = 1 0 V, 1-
..J
f= 1 00 khz 0
>
VeE (sat) (volts) 0.25 lc= 1 0 rna, ls= 1 rna
>-
..J
VBE (sat) (volts) 0.90 lc= 1 0 rna, ls= 1 rna 0..
0..
::::> 4
Ul 10
::e
::::> 7
plied to the bases of the saturated transistors. :::l'
:z:
Thus, the transistors must have good low-level 2 5
characteristics. The table above lists the salient
1
parameters selected from the 2N3251 family. Both
npn and pnp devices are individually packaged in
a T0-46 case. FREQ U ENCY : t M h z
TRIGGER = 4 . 5 V , O.SJL SEC W I D E
A fan out of 7 at 1 megahertz is obtained over
RISE T I M E : 8 NANOSECO N DS
the temperature range - 10°C to + 100° C for a
power supply tolerance of ±5%. A fan out of 10
is possible at 200 khz from -50°C to + 100°C at
a ±5% power supply tolerance. Fan out as a func­
tion of temperature and minimum supply voltage 0 ....___..___.___..__-1-_-1-__....1.-_..L-_..L..._.
- 70 - 50 - 30 - 1 0 + 1 0 30 50 70 90 t10
is shown in the graph at the right.
TE M PE R AT U R E ( ° C )
Two different circuit packages were developed.
An unencapsulated polyester film cccordwood" pack­ Fan out varies as a function
of the minimum supply voltage and the temperature.
age is used where volume and weight are not pri­
When the ambient temperature is lowered,
mary considerations. In the hybrid package the re­ the supply voltage must be increased in order to
sistors and capacitors are deposited thin films, on drive the sa me number of flip-flops that are
a miniature printed-circuit board, on which the driven at higher temperatures.
semiconductor active elements are mounted. The
total package weighs less than two grams. The cir­
cuit has not been made in monolithic form because 3 r-------�
diffusing four transistors on one chip, with the en

required low-level performance, results in very low �

0

1
>
yields. Added to the yield problem is the problem
of depositing high-valued resistors on a small sur­ :2
0
face area. Since this circuit requires a total re­ � WI L L N OT T R I G G E R
......
sistance of about 1.7 megohms, a large surface is ...J
0..
required. About half the o/s- x lh-inch thin-film :IE
<[
I N PUT P U L S E : 100 N S LONG
substrate is used for the resistor pattern, the re­ a:
R I SE TI M E : FA L L T I M E : I N S
w
mainder bearing the capacitor and conductor pat­ Cl F A N OUT = 5 A · C a 5 D - C L O A D S P E R S I D E
Cl
tern. a:
t-
Performance testing indicates a noise immunity
exceeding 1.5 volts for a one-nanosecond rise time o-70�--- -�--�-�--��
· 50 - 30 - 1 0 + 10 30 50 70 90 110
over -50° to + 100°C. Results are shown in the TE M PE R AT U R E ( ° C )
graph at the right. Transistors with high values of
Curve shows noise immunity in excess of 1 .5 volts
ft and hFE were used to give pessimistic results. The
for temperature range -50°C to + 1 00°C. A d-e load is
devices used had an ft of about 150 Mhz at 150 defined as 75,000 ohms returned to +6 volts; a-c load is
p.a and hFE of 150 at 100 p.a. 3,000 ohms in series with 100 pf to ground.

51
 INPUT OUTPUT
.-------..-- + t 5 V
Circuit protects meter
from periodic current spikes

By Cornel ius Pittman and Bill Bi rnbaum

Beckman Instru ments, I nc., Fullerton, Cal if.

Capacitor C stores the voltage when relay S1 opens.

In instrumentation setups, where a transducer must
be pulsed, it is desirable to isolate the readout so

��ruI-- SPTEO-:
that a .. spike" produced by the pulsing current does + t5 V

RIOADGE
not appear at the meter.
The circuit at the right makes an output meter
insensitive to disturbances at the input during a
predetermined period of time. In effect, the circuit I -----V't#rl-t-1
�
I

TIME
stores the transducer output while the transducer is
I I
momentarily disconnected during the pulse period.
A relay drive circuit, operating coincidentally with
-t5V
the transducer pulse drive, opens relay sl to provide
the isolation between the operational amplifier out­ ....._---
put and the meter voltage. When S1 is opened, the Charging of C increases readout voltage during storage.
meter voltage is stored by capacitor C during the
pulse period.
Between pulses, S1 is closed and no storage oc­
curs. The output of the system's operational am­
plifier, a voltage proportional to the transducer
current, is conducted to the meter with a gain of
approximately one and is displayed as an indica­
tion of the current. During this period, the response
time of the circuit, TR == (rbdB1+ R1) C == 1.5 milli­ Driver opens switching circuit.
seconds, where B1 is Q1's short-circuit current gain,
40, rbl is its base resistance, 2,000 ohms, and R1 is a time constant, Ta == B2R2C = 40 (10 K) (10) == 4
resistor added to reduce the effects of magnetic seconds as shown above. Since the storage time
induction if sl is a magnetic device. constant is more than 1,000 times greater than
When sl is opened and the storage cycle begins, the response time, the increase in output voltage
the output theoretically should not change. Actu­ shown in the characteristic response curve above,
ally, C continues to charge toward + 15 volts with is negligible during the storage period.

amplifiers and precision voltage comparators-have

Low-drift current generator base-current temperature coefficients which are pre­
dictable as a function of operating current.
com pensates for tem perature The base-current temperature coefficient of
matched pairs, at collector currents from 10 to 50
By Cha rles C. Hanson microamperes is approximately 0.8% per degree
centigrade of Io, where 10 is the base current at
International Business Machines Corp., Rochester, M i n n . 25°C. Therefore, a generator whose output changes
with temperature at the same rate is needed. Re­
sistor networks cannot provide the high common­
The temperature-compensated current generator mode input impedance required to maintain accu­
on the facing page solves the problem of obtaining racy with changes in common-mode voltage.
sufficient input base current in circuits where com­ The current generator circuit diagramed presents
mon-mode voltages are applied at the input ter­ 1,000 megohms of output impedance while supply­
minals. The solution is based on the fact that ing up to .200 nanoamperes of temperature-compen­
matched transistor pairs-as used in differentia] sated current. The allowable range of common-

52
mode voltage is +6 to -25 volts. The three +i2 V
1N695 germanium diodes D�, D2 and D3 provide
the necessary compensating network. They operate
at 1.3 milliamperes and are closely controlled for a
forward drop, Vt of 0.3 volt and a temperature co­
efficient of 1.95 millivolts/ °C. Therefore,
Vx = 3 v , - V B El = 3 (0.3) - 0.55
lour TO
= 0 35 volt
.

where VBEt is the base to emitter voltage of Q1. Dl FFERENTIAL

MATC HED
The temperature coefficient at Vz:, PAIR

dV
d
T = 3 ( 1 .95 mv/°C ) - 2.75 mv/°C
3. 1 mv/°C
=

where 2.75 mv/ °C is temperature coefficient of Q1• Temperature-compensated current generator's output

( z)
changes at the same percentage per degree centigrade
whatever the output cu rrent, set by adjusting R,..
V, = s (V,) ; therefore,
With an output current of 100 nanoamperes, VBr­
!i z ( !�·)
= s = ( z)
s (3. 1 mv/"C) the base-to-emitter voltage of Q2-drifts in a direc­
tion opposite to Vz: and Vy at a rate of 0.1%/ °C.
The percentage change in Vy per degree centigrade The net reduction in voltage across R3 is 0.8% I °C
is the same as that of Vx. At 25°C this equals and the output current is reduced at the same rate.

% dVX
The output-current drift of the generator when
0 .003 1 combined with an operational amplifier will be as
= (1 00% / 0C ) = 0. 90% /0C
dT 0.35 low as 0. 1 nanoamperes/ °C from 10°C to 55°C.

Di rect-coupled amplifier
cuts cost of d-e voltmeter

By Ja mes M. Colwel l
Hewlet-Packard Co., Loveland, Colo.

H igh input impedance and low drift can be

achieved at low cost in a d-e voltmeter by a modi­
fication of conventional techniques. The new circuit
is based on the familiar technique of using a d-e
amplifier to drive the voltmeter. Usually the
amplifier is chopper-stabilized, but this adds to
the cost of the instrument. A direct-coupled d-e
amplifier is used because it reduces the cost and
achieves high input impedance and low drift, either
with a vacuum tube differential input or with hybrid
circuits having high gain and large amounts of
feedback.
The circuit at the right is a direct-coupled am­ Direct-coupled amplifier has unity gain and achieves
plifier with approximately unity gain. It is com­ h igh-input impedance and low drift using FET.
prised of three bipolar transistors and one field
effect transistor (FET) yielding high input im­ scale. FET Q1 is biased, as illustrated in the curves
pedance and low drift at low cost. It is suitable for on page 110, to obtain the required impedance con­
a d-e voltmeter with a low range of 0.1-volt full version and to balance the effect of temperature

53
 on bipolar transistor base-emitter voltages.
The drain current for Q1 is supplied from the to v,. = 0
constant current source Q3, which, along with the ...
z ,- - - - - - - - - - - - - - -
power supply voltage, sets the FET operating point w 1
a::
a:: I
-designated in the curves as point Q. This point :::> I
u I V� = + E
is at the intersection of Ido and Vdso on the Vg� == I do
A
z !-------.--�--
+E characteristic. Since Ido is constant and in­ <(
a::
0
dependent of the d-e input, the FET load line is C R ITI C A L
along this characteristic at ambient temperature. Io
- - - - - - - - - - - - - - - --
E is the d-e voltage drop from gate to the source
of the FET and is approximately one volt.
For a positive d-e input referenced to ground, v. "

operation shifts on the load line in the direction of D R A I N TO S O U R C E VOLTA G E

A. For a negative d-e input, the operating point Bias curves show the FET load line a s V,. = + E at
moves toward B. Since the voltage drop from gate ambient temperature. Dotted l ines show how V,.
to source remains unchanged, the unknown input shifts to compensate for temperature variations.
signal from the high impedance gate is converted
to the low impedance of the source; after going efficient of Vgs of Q1 for the values given is
through the slightly-greater-than unity gain ampli­ approximately - 2 7 millivolts per degree centi­
.

fier, it is fed to the low impedance point at the grade. This value sets Ido remote from the critical
output from which the meter is driven . values of drain current and where the temperature
As the temperature changes, Ido will not change coefficient of Vgs is primarily dependent upon FET
appreciably; however, Vgso will change if Ido departs mobility carrier variations . Mobility varies little
from the value of the critical drain current. This with temperature between FET's.
makes it possible to choose a value of Ido so that With precision components, the over-all tempera­
V18o == +E-(the FET load line)-has a tempera­ ture coefficient of this amplifier is less than 0.5
ture coefficient equal in magnitude but opposite in mv/ °C in the range 0°C to 50°C if the input is
sign to the temperature coefficient of the rest of the shunted by less than one megohm. The maximum
ampli:Ber. The drift of the bipolar part of this drift over this range is 30 mv.
amplifier comes mostly from the base-emitter The variable resistor R1 balances the small am­
junction of Q2. Accordingly, the temperature co- plifier drift at very high and low temperatures.

Diode and resistor i ncrease

+
r---------------------.------ �c

i n put resistance of Sch mitt

By Joseph Gaon 02
2N2270
JMR Electronics Corp., Bayside, N .Y.

A slight modification of the conventional Schmitt

trigger circuit signi:Bcantly increases its input im­
pedance, permitting the preceding circuit to drive
many more stages. Since the modified circuit no
longer loads the driving stage, the driving voltage Conventional Schmitt trigger circuit clamps i n put
signal level and prevents driver from triggering
may be used to trigger simultaneously several cir­
other stages requiring h igher trip levels.
cuits requiring different turn-on voltages. A single
stage can drive 12 modi:Bed Schmitt circuits.
In a conventional Schmitt trigger circuit, at the and consists of Rt in parallel with R5 and R3 + �.
right, when the input exceeds about 6.5 volts, Q1 Adding Rb and D1 to the modified trigger circuit
is turned on and the input signal remains clamped significantly reduces the loading. Resistor Rb is
to this level. As a result, the input signal cannot selected to saturate Q1 with no input.
drive any additional circuits which may have higher When the input voltage exceeds the trip point,
trigger levels. The approximate load seen by the which is still about 6.5 volts, D1 is reverse-biased.
driving circuit when Q1 is on is about 1,680 ohms The only loading of the input signal is the leakage

54
 �-
�---�---.- c
Rz
Rb
2.2K

220 K

Qz
2 N 22 70

Rs
5.6K
Dz
1 N645
03
1 N645 Rs
56K

Modified Schmitt trigger includes diode D1 and resistor Two d iodes can be added to the modified circuit to
Rb to prevent the i n put signal from being clamped. prevent reverse breakdown of Q1's emitter-base junction.

current of diode D1 above the trip point and Rb, Q1 is exceeded when Qt is turned off. (Vebo is de­
and the base leakage current of Q1 below the trip fined as the reverse emitter-base voltage meas­
point. Since Rb is much larger than Rt or R5, the ured with the collector open.) When the input volt­
modified circuit exhibits a much higher input re­ age falls below the trip point, the emitter of Q1
sistance than the conventional circuit. is clamped to its base through D2• This prevents
The figure, above right, shows an additional breakdown of Q1's base-to-emitter junction. Diode
modification for circuits in which the Vebo rating of Da is reverse-biased, and the input unloaded.

thermistor is one element in a relaxation oscillator

Control is accu rate to 0.01 oc consisting of unijunction transistor Ql, capacitor cl,
and resistors R3 and R4 and R1•
By Kees van der Geer When the temperature falls below the calibrated
setting on R1, the resistance of thermistor R2 in­
Jutphaas, the Netherlands
creases. The voltage on the emitter of Q1 increases
and oscillations begin. Oscillations on base B1 of
An economical thermostat, designed to maintain transistor Q1 are rectified and filtered by R4, D1
the temperature of a liquid bath to within 0.01 ° and Ct. After amplification by Q2, the d-e voltage
from 15 to 35°C. actuates the relay, closing the heating circuit.
The operation centers around thermistor R2, The relay opens when the voltage at point A is
which has a linear temperature coefficient of -6% decreased by about 1.4 millivolts. The result is a
per degree centigrade over the desired range. The temperature sensitivity of about 0.01 °C.

+ 24 V

r::-ll___. HPOWE
EATERR
SOURCE

R2 --,
T
- - - - -

(PH I LL I PS I
B8 320A/t K-3) I
_ _ _ _ _ _j

Thermistor temperature sensor is part of u n ijunction transistor oscillator that controls heater.

55
Circuit design

Designer's casebook
a current rating of 30 milliamperes and a weight of
Feedback choke reduces 1 pound; it costs approximately $1. A 4-henry choke
in series with the load would, in this case, require
power supply ripple a current capacity of 1 amp, a resistance of a few
ohms and would weigh 25 pounds. It would cost
about $25.
By Jesse T. Quatse A 30-henry choke with a current-carrying capac­
Carnegie I nstitute of Technology, Pittsburgh ity of 1 ampere is difficult to obtain commercially
because its large size limits the demand for it.
Extremely low ripple and light weight can be ob­ In the circuit illustrated, power is supplied to
tained from an inexpensive, regulated power supply the regulator by a standard full-wave bridge. Regu­
by placing a high-inductance choke in the feedback lation is obtained by comparing the feedback
path. The circuit illustrated is a simplified ex­ through transistor Q1 with the 8.2 volts across zener
ample of a supply that weighs less than 3 pounds diode D1• The current passed by the d-e resistance
and costs less than $30. It is useful for lightweight of Lt is amplified by Darlington amplifier Q�-Qa
digital equipment where low ripple and only mod­ and supplied to the load. The voltage at which this
erate regulation are important. Over the full range current is supplied can be selected by the ratio of
of zero to 1 ampere, d-e regulation is 1% and the R1 and R2. In this circuit, the ratio provides an out­
ripple is less than 2 millivolts rms at 1 ampere. put of 12 volts.
Reducing ripple with a choke in series with the Ripple is reduced by feedback through the Darl­
load-the usual location-greatly increases both ington amplifier. The ratio of ripple to d-e voltage
the cost and weight of the regulator. But when the at the emitter of Qa cannot exceed this ratio at the
choke is placed in a feedback circuit, a much base of Q2• Since all the base current of Q2 passes
smaller choke can be used. Choke Lt has a d-e through L1, the small choke reduces ripple as if it
resistance of 700 ohms, an inductance of 30 henries, were in series with the load.

o,
2N1073 -t2 V, 1 AMP
t17 V A-C 1 N 1 1 24A

Rt
50 150
tW ,.

o,
2N 508A
L1
-- 700 OHMS, 30 MA , 30 HY I,OOOpF
+ t5V

R2
t,OOO pf t,OOOpf Dt 390
tW
L...
50V 15 V 1 N 1 769

Choke L, placed in the feedback path from Q1 to Qa, holds down the ripple in the current supplied to the load
through Darlington amplifier Q.·Qa. The choke acts as if it were in series with the load since all
the base current of Q2 passes through it. However, the current is not as g reat as a series choke would carry.

56
 TO RECORDER T2
Modified tape recorder
stores timing signals

By Gordon Si lverman
Rockefeller I nstitute, New York

A low-cost analog magnetic tape system can be

converted to a system for recording the time of
events. In the biomedical experiments for which
the system was devised, it was necessary to record,
for later analysis, nerve responses and the inter­
vals at which stimuli were applied.
� - 170V
In the unmodified model, the damped sinusoidal A L L DIODES IH463

characteristic of the responses to step and pulse Recording circuit consists of a d ifferentiating
inputs, as illustrated below, right, produces errors section and a standard monostable tube circuit.
The output is a series of pulses, 30 m icroseconds
and results in an unsatisfactory timing system. in duration, with a peak of -50 volts.
However, if the timing pulse is narrow enough­
containing frequency components beyond the re­
corder's passband-the system works satisfactorily.
I "
In practice, the second pip in the pulse response ,,
is eliminated by integrating the trailing edge of STEP RESPON SE
I \ /
I
the recorded pulse.
Signal waveforms in the system, below right, il­
"'
en
I
·�
z t
f '
.
lustrate how the system functions. The input gate .
en '
signal is differentiated in the pulse-shaping circuit "'
a: '
'
shown above right by C1 and R2. At the same "'
>
time, C2 and the parallel combination of R3, R. t=
c I
and D3 produce a series of differentiated signals d -0.2 I
at the grid of V1• The series of alternately positive a:
\ I
-0.4 •. I
and negative pulses corresponds respectively to the .. ,
leading and trailing edges of the gate signal. -0.6
Since Vt is biased off, it is insensitive to negative­
going signals. But positive signals drive the tube -0.8
into conduction and cause the plate voltage to
-1.00

�··�se of tape recorder to step and

drop. The negative signal that results passes
through diode D2• A sequence of negative pulses pulse inputs. Step
mput s1gnal can not be used for timing marker since
then appears at the common anode junctions of many processing errors result from its sinusoidal nature.
D1 and D2, each pulse corresponding to an edge
of the input gate.
Tubes V2 and V3 form a standard monostable
PULSE TO BE RECOR� L _ _

circuit, and V3 is normally on, V2 normally off. I I

I I
Each negative pulse turns V3 off and V2 on. The I
I
I
output at T2 then consists of 30-microsecond nega­
Ir
I
tive pulses with a peak of 50 volts, which can be
--+- 30�SECS. v---
SIGNAL TO TAPE
RECORDER
fed to the tape recorder.
1
On playback, the signals from the tape recorder PLAYBACK SIGNAL 0.5 VOLTS
pass to the circuit on page 76 through n., and tube
V4 acts as a pulse amplifier. Each edge of the origi­
nal gate signal appears as a negative-going pulse

Pulse to be recorded is converted in the record circuit

at this tube's plate. The signal magnitude can be
adjusted with the recorder's volume control.
Tubes Vr� and V6 form a standard bistable cir­ to a series of negative-going pulses. Each pulse
corresponds to an edge of the pulse. The output of the
cuit. It is possible for the circuit to assume a state tape recorder is another series of pulses from which
equivalent to the gate's being on when the power the pulse is reconstructed in the playback circuit.

57
 8.2K
150V ---.,"""--....---�

ZD 2 1 S

)
0.05 p F

(.
0.05pF

51 52
ZD2tS
11 0FF ' ON"
180K 180K
1 20 K 1 20 K
5.6 K
- 1 70V
-1 70V

47 K 47 K

� lpf
PLAYBACK
INPUT _

v4

1 10K 270K
12AX7

'=" 270 K

-170 V ALL DIODES 1 N 4 6 3

Playback circuit consists of pulse amplifier a n d

bistable circuit. The negative
pulses change the state of the bistable, reprod ucing the orig inal pulse at its output.

is first turned on. However, switch S1 can be oper­ gate s ignal, turns the bistable circuit on. When
ated to manually turn off the gate. Each successive the second negative pulse arrives, the bistable
negative pulse corresponding to the gate edge changes state. The transistor output is summed
changes the state of the bistable, and reproduces to boost the output signal level sufficiently to allow
the original timing pulse. The first negative pulse, the driving of data-processing equipment without
corresponding to the leading edge of the original additional amplifier circuitry.

rapid reset because the almost fully charged timing

Diode lowers m ulti's capacitor must be discharged at nearly the same
instant.
reset power level In the quiescent state, when Q1 is on and Q2
is off, the voltage at point b equals the supply
voltage, - 16 volts. The voltage at point b is the
By H i rosh i I nose and Tada h i ro Tomiyama base-emitter forward voltage of Q1 plus the for­
Faculty o f Engineering, U niversity o f Tokyo ward drop of diode D1. Transistor Q2 conducts
when triggered by a negative pulse of sufficient
amplitude. The potential at point b rapidly rises
A single diode added to a conventional astable or almost to ground potential, cutting off D1 and
monostable multivibrator, as shown in the sche­ Q1, and setting the monostable multivibrator. The
matic, greatly reduces the energy required to reset voltage at point a, which has followed the rise
the circuit before its normal self-restoration period. in voltage at point b, now decreases exponentially
Usually, a high-energy reset pulse is needed for towards - 16 volts with a time constant RC as

58
 v
- 16V

3. 3 K

(I) (I) en
� (I) e
=l 0 0
0
2
e
.,., 2
(I) " " II "
....
...
N
Ot ,:. � t-N

2SA40t

24 K
v1 +t2v

S034 50 pF R ESET

����� �(--�IN���T-
1.[4V
2.7pS
20K 20K
-v lf
1.5}15
V = -16V
� = t i2V
R = IOOK
Addition of diode D1 to conventional m u ltivibrator de­
C = VARIABLE
creases requ i red am plitude and duration of reset pulse.
T2 • SELF- RESTORING
TIME
SET 10
+
RESET
• 5
I
I SELF RESTORING
POI NT A
-. +
-- I
I
1 -.;.�-
� -=-
�- 0 �--�--�--�----L---�--�-=�
......._ ......, -..
ov --------;l
- r -----�
� �-������-���

h-
.
1 I I 0 1 2 3 4 5 6 7
I I l
POINT 8 ! MINIMUM RESET PULSE AMPLITUDE Vrt ( VOLTS)

:j 1·
!
--==,·�-��==��=
1 <���---

1
ov � Trigger sensitivity of an experimental monostable
f I .... --. ..._ _ multivibrator with reset d iode added. M i n i m u m
I 1
I
I
I
I I
reset pulse amplitude m ust be i ncreased slightly
- - - - - - - - - --- - - - - - - for h ig her self-restoration time, r��.

silicon diode D1• Therefore, a trigger pulse with

-16V I
an amplitude approximately that of the set trigger
is sufficient to reset the monostable multivibrator
i Tt :
I
:
!+---__;___ T2 -----
at any time after it has been set. The diode Dt
is also helpful in protecting Q1 from possible base­
Curves show that monostable multivibrator is reset i n emitter breakdown caused by large inverted pulses
minimum possible time interval, T1, when triggered b y a
negative pulse of fixed sufficient a mplitude. The minimum
or from large voltage swings of the timing capaci­
interval is a function of the self-restoring time of the tance.
m u ltivibrator, T2. The curves for an experimental circuit show
the relation between minimum reset interval T 1
shown in the waveforms above. and the minimum required reset pulse amplitude,
Without the diode, the voltage at the base of Vrt, for various self-restoring times, T2 , and a reset
Q1 would be identical to that at point a. To reset pulse width of 1.5 microseconds. Q1 and Q2 are ger­
the circuit immediately after setting, a reset trigger manium-drift transistors with alpha cutoff frequen­
of large energy would have to be applied at the cies of 230 megahertz. The experimental monstable
base of Q1• The additional diode isolates the base multivibrator with a self-restoring time of 100 milli­
of Q1 from point a, so that the potential at point c seconds is reset in 6 microseconds with a trigger
is approximately zero except for the negligible of 4 volts. The added diode can also be applied
voltage drop caused by the leakage current through to synchronization of an astable multivibrator.

59
 The tapped voltage divider network, Ru, serves as
Period of sawtooth ramp a constant current source for the charging resistor,
R. The amount of current is selected by the posi­
extends to 5 hours tion of switch S2, and the charging resistance is
selected by the position of switch S1 . The ramp
By Ron Chapman period is the product of the settings of both cali­
Electron Physics Section, National Research Cou ncil,
brated switch positions.
Ottawa, Canada The two temperature-compensating potentiom­
eters, R3 and R4, are adjusted to set the critical
drain current of the field effect transistor, Qa, at
The measurement of the energy spectrum of par­ its zero temperature coefficient value while main­
ticles frequently requires a stable reference saw­ taining the input to the operational amplifier at
tooth voltage of exceptionally long duration. The zero voltage level. Temperature changes from 25°
circuit shown generates a ramp whose period is to 50°C do not change the ramp perceptibly, and re­
stable to 0.03% and deviates from linearity by less duce the period by only 0.03%. Q3, matches the im­
than 0. 1 % for periods of up to 5 hours. pedances between the timing resistor, R, and the
An operational amplifier and its feedback net­ input to the operational amplifier. The resistor, R5,
work, resistor R and timing capacitor C, integrate provides temperature compensation for the unijunc­
a small step voltage to form the ramp, which resets tion transistor circuit. Its value is determined ex­
when the output reaches a predetermined ampli­ perimentally.
tude. A push-button switch in series with the sili­ All leads to Qa's gate are Teflon-insulated to
con-controlled switch Q1, opens the relay circuit minimize leakage. The positive and negative power
which normally shorts the timing capacitor, C, and supplies are regulated to within 0.1 %. Ramp ampli­
open-circuits Q1. Capacitor C begins to charge tudes up to 200 volts can be obtained by amplify­
through resistor R. When the ramp voltage rises to ing the signal with a vacuum-tube operational am­
a peak of 5 volts, the operational amplifier's output plifier. For signal readout, the gate voltage from
voltage appears at the gate of unijunction transistor, the anode of Q1, serves as a synchronizing signal
Q2, causing it to fire. Capacitor C1 then discharges for the readout device.
through resistor R9 and produces a positive pulse To obtain a 5-hour period, the timing capacitor
at the anode of diode D1 and at the cathode gate must be replaced with a 10-microfarad low-leakage
of Q1. The switch fires, energizing the relay and type of capacitor. A 10-millisecond period requires
terminating the cycle. a 0.005 pi timing capacitor.
The ramp amplitude and period are calibrated In addition to the push-button method of initiat­
by potentiometers R1 and R2 respectively. The peak ing the ramp period, a pulse can be applied to one
ramp voltage, 5 volts, is independent of the period. electrode of the silicon-controlled switch.

�----�----.- + 1 5 V

c
2.0

+ 5V

A.ov
TIME
SECONDS

Rtt
100 K

FOUR
2.2 K
MATCHED

Ra m p periods from 100 to 4,000 seconds are selected by t he positioning of switches & and
S. . Periods u p to 20,000 seconds are possible by changing timing capacitor C to
10 p.f. Potentiometer R10 adjusts the amplifier output to 0 when the input is 0.

60
Circuit design

Designer's casebook
DESI RE D
Square-law detector COM B I N E D
O UTPUT

t 0.1 C HA R ACTE R I STIC-A

has 40-db dynamic range
u
c
>
By Robert J. Matheson 2.. SECOND
;::)
STAGE
.._ OUTPUT
;::)
I nstitute for Telecom m u nication Sciences and Aeronomy, 0... CHARACTERISTICA
.._
Boulder, Colo. 0.01
0

A diode network and detector circuit provides an

output proportional to the square of an input volt­
age. It has a 40-decibel input range, uses no
critical or expensive components and is easily ex­ o.oot
tended to larger dynamic ranges, if required. This
circuit replaces such devices as thermal converters, FI RST
second-harmonic generators and diode-shaping net­ STAGE
works in metering circuits. OUTPUT
CHA R ACTERISTIC
Splitting its 40-db input range into two 20-db
0.0001 '------'--�--....J
segments avoids limitations such as high-amplitude o.ot 0.1 1 10
saturation and low-amplitude drifts and nonlineari­ INPUT (V RM S ) --+-
ties inherent in other diode network schemes [see Output characteristics required to give a square-law
plot directly below]. Two identical stages operating device with a smooth transition between stages.

..
R , .�
, _ ..

.. tB, �
R R R R
INPUT lOOK : 13K
• .
�
510 :� tOOK : lll ;
� �·
•
450 KC

�
02

I
2N2925
0.1 1N38 �
05
�·L
11 ' ) 2N3638 _... r-1� ��
' ---+-1-f
..... �r;,
� � 1N38
�-� ,._. -+-.
:
....,...
... ...

� i ��
1N459
�� I �. I �� IN459 2N2925 •
� ( 31 � r �
� � � � (31
1- .._ .._
tN270 • 1K � ' tN270
� . �
�� ::: : , ���
0.01
9·01_
,::lo.oot: 1M
•
� F-
• tN270 : IM
:••• R tA ._• '\ •
'\ .
.
t. 2 K � � tN270 :: ,.. : ...
:.
• • 4
0.001 RtA R2A RlA R4A
R2A R3A R4A
�· 1N4002
�r tN459

-t!v
FIRST STAGE SECOND STAGE

Diode network In series with the emitter lead of transistor Qt is the key to circuit operation. It causes the
effective emitter resistance to decrease as the emitter voltage increases. Thus Qt acts as a current source and
produces an output current proportional to the square of the base voltage. Values for resistance are as
follows: Ru, Ru= 3. 18K, RtB = 57.9K, RaB = 18.75K, Ra • 3K, R, = 10, Ru, R.a = 5.06K, Ru = 1.861(,
R2a = 64.2K, Re = 300 a nd Re, Re = 990.

61
 at convenient levels produce the two segments.
When matched, the stages, shown in the block
diagram, give the proper output function by means
of input amplifiers and output attenuators.
Operation of each stage is as follows: a signal
between 0.4 and 4.0 volts root mean square is
detected and applied to the base of transistor Q1
(see schematic). The diode network, in series with
the emitter lead of Q1, causes the effective emitter
resistance to decrease as the emitter voltage in­
creases. Transistor Q1 acts as current source to
produce an output current it proportional to the
square of the base voltage. An output voltage of 0.1
to 10 volts develops across the 1,000-ohm load
formed by resistors Rt and R2•
Stage two is essentially identical to stage one.
u However, because of an additional 20 db of am­
Q
> plification, its operating range of 0.4 to 4.0 volts
corresponds to an input signal of 0.04 to 0.4 volts.
Similarly, although Q2 is capable of supplying as
much output current i2 as Q�, the output is de­
veloped only across R1• This results in an output
voltage of 0.001 to 0.1 volt.
Each stage saturates and gives a constant output
for voltages above its operating range. For voltages
below its operating range, the stage is cut off and
has zero output. The output characteristic at the
low end of the operating region of stage one adds
to the saturated output of stage two. In this way
-o.t the desired square-law characteristic is achieved.
Minor differences between the stages are omission
of a 270-kilohm resistor and substitution of a dif­
ferent diode in the detector compensation network.
These differences extend the second stage square-
..0.01Mv ..._
0.01
____ _,______.a-_____, law characteristic beyond the controlled cutoff
O.t I
tO required by the first stage.
INPUT VOLTAGE ( VO LTS RMS AT 450 kiLOHERTZ) Thus, detection and squaring is accomplished at
,.....,... output chll racteristics of the circuit voltage levels where diode offset and temperature
operating with a 17-volt power supply. Adding coefficient are easily made negligible. Moreover,
stages extends the dynamic range on the low end
when the outputs of the two stages are combined,
without seriously affecting total accuracy. Greater
accuracy is achieved by increasing the number only one of the stages contributes significantly to
of segments in each diode network. the total output. Either stage one swamps out the

r----- OUT PUT

STAGE ONE

v2
990
INPUT
450khz�--...----l
10
DETECTOR

STAGE TWO
990
"------11 D ETECTOR
-. j
2
The 40-clb input range of the diode detector is split into two 20-db segments, thus avoiding high-frequency
saturation, low-frequency drift and nonlinearities inherent in other diode networks. Both stages are identical
and operate at levels that produce the two segments. When matched, the stages give the proper output
function by means of input amplifiers and output attenuators.

62
saturated output of stage two, or stage one is cut affecting total accuracy.
off and contributes nothing to the output of stage Preliminary tests using three stages indicate that
two. It is this feature that gives over-all accuracy little difficulty is involved in adding stages to get
comparable to that of an individual stage (see out· larger dynamic ranges. Increasing the number of
put plot). It also permits additional stages to extP.nd segments in each diode network and careful tem­
the dynamic range on the low end without senously perature compensation achieve greater accuracy.

Transistors replace diodes Cl)

0..
2i
ct

in mi lliohmmeter circuit �
u
ii
I
t­
z
By Peter Lefferts lU
0:::
0:::
TIA Electric Co., Princeton, N.J., ;::)
u
subsidiary, Heineman n Electric Co. 0:::
lU
t­
au
2i
Substituti9n of transistors for diodes in the recti­ u
I
0
fier circuit of an a-c milliohmmeter produces a sig­
nificant increase in sensitivity and linearity. The
cost of the circuit is reduced because a relatively
inexpensive milliammeter is used instead of a
microammeter, a consequence of the transistors Milliohmmeter u ses transistors as rectifiers with gain,
permitting measurement of low val u es of a-c voltage.
providing gain.
In the circuit on the right the transistor base­
emitter junctions are connected in a full-wave cir­ As indicated in the graph, negative feedback
cuit to rectify the incoming signal. The amplified in the emitter circuit results in linear voltage rec­
collector current deflects the milliameter. tification at lower input voltages than is possible
For a given output current, the base to emitter with diodes. However, the input impedance is as
voltage drop of the transistor is smaller than the low as 100 ohms during the positive portion of the
voltage drop across a conventional diode. The input wave. This is not detrimental, because the
lower voltage drop and the transistor's gain re­ circuit is intended to measure voltage drops across
sults in at least a 30-to-1 increase in sensitivity. low values of resistance.

its cost by 25%. Its sharply-peaked output pulses

No pulse-forming network are ideal for applications from triggering modula­
tors in radars to firing flash tubes in strobe units.
in scr trigger generator Capacitor Ct in the circuit is charged by the
+ 150-volt supply through the charging choke L1
By James E. Curry, * and diode D1 • With C1 fully charged, an incoming
pulse, typically a 4-volt square pulse of 1-microsec­
ITT Gilfillan, I nc., Los Angeles ond duration, turns on the scr. Provided with a re­
sistive path to ground, C1 discharges through the
A modification of the well-known line-type radar primary of the pulse transformer producing a spiked
modulator produces a general-purpose triggering output pulse; in this case the pulse has a 300-volt
circuit that is immune from noise. While trigger peak amplitude and its width at the 50%-amplitude
generators built with silicon-controlled rectifiers level is 5 microseconds. Pulse amplitude can be
are not new, the circuit on page 96 replaces the varied by adjusting the transformer-turns ratio.
expensive pulse-forming network with a capacitor, During discharge, the ringing of C1 with the
improving the circuit's performance while reducing charging choke L1 drives the voltage across C1 to
-15 volts, back-biasing the scr and shutting it off.
• Now with Houston Fearless Corp., Los Angeles Diode D1 isolates the power supply from the capac-
 60� sec
itor's discharging effect [see wave shapes].
An important aspect of the circuit's design is pro­ +3oov--, .r+--
tection against accidental tum-on of the scr during o �=:V
-tsv-
T I M E -.
the charging cycle. If low-level noise or reftections 25ps
from the load were to cause such a tum-on, the
+300V
entire 150-volt supply would be shorted to ground,
blowing a fuse or tripping a circuit breaker in the + 1 5 0V
protection circuitry [not shown].
The scr is conducting during approximately the
first 10 microseconds after triggering, so false trig­
gering pulses have no effect. For the next 15 p.s, Ct
and L1 are ringing and the voltage at C1 is negative
as shown in the waveform; the negative voltage 2N688
back-biases the scr, preventing a false triggering
pulse from turning on the scr. At 25 p.s after trigger­
ing, when the voltage at C1 is zero or rising, the scr t= l us
is vulnerable to false tum-on by low-level noise Capacitor cl is charged by the supply through charging
pulses for a period of 5 p.s. However, this time in­ choke L1 and diode Dt to 300 volts. An incoming trigger
terval occurs long enough after discharge so that pulse turns on the scr, discharging C1 through the primary
most reftective pulses have been dissipated. The cir­ of the pulse transformer and producing a 300-volt spiked
cuit's 5-p.s interval of vulnerability is much briefer output pulse. The ringing of l1 and Ct turn s off the scr.
than those of comparable scr triggering circuits and
constitutes the circuit's principal advantage.
At 30 p.s after discharge, and certainly by 40 p.s, is again charged up to +300 volts and the circuit
there is enough charge on the capacitor to forward is ready for the next triggering pulse. The circuit's
bias the scr and a large triggering pulse is again maximum pulse repetition rate is 12 khz, leaving
required to tum it on. By 60 p.s after discharge C1 about 80 microseconds between pulses.

+eov
Scr bridge inverter
eli mi nates transformers

By l. M . Tibbets
Electronic Tube Division,
Sylvan ia Electric Products, I nc., Emporium, Pa.

A bridge inverter's cost can be cut in half by slave­

triggering two silicon-controlled rectifiers with a
capacitive load. Slave-triggering eliminates bulky
and expensive gate transformers and enables the en­
DIRECT 0-C SCR3 '='
tire inverter to be easily mounted on a printed cir­ COUPLING TO GEC50
MULTIVIBRATOR
cuit board. The circuit at the right was designed
as part of a power supply for an electroluminescent n +2v
panel serving as a capacitive load. .J LOv
IN Ov
n
The bridge circuit is directly coupled to a multi­ +2v
100
vibrator which drives it with staggered square Ov..J l..
pulses, each 2 volts in amplitude. The input pulses
Capacitive load C1 slave triggers SCR1 and SCR.,
drive SCR3 and SCR4 directly while SCRt and eliminating the need for gating transformers.
SCR2 are slave-driven by the capacitive load Ct.
Slave triggering is an indirect switching tech­
nique, employing two or more switches, in which switching during the second half-cycle of bridge
secondary or slave devices are turned on automati­ operation. Only the master trigger, SCR3, is turned
cally by the energy released when a primary device, on directly; the firing of SCR3, however, switches
the master trigger, is fired. In this circuit, for exam­ load Ct into a position where it turns off SCR4 and
ple, slave triggering is illustrated by the sequential generates a switching signal to tum on SCR2 (which

64
then turns off SCR1). Thus the other three active and D2, placing 10 volts across the gate-cathode
elements in the bridge are all turned on or off by junction of SCR1 and turning it on. C1 now charges
the firing of SCR3• rapidly through the path L�, SCR�, C1 and SCR.t,
An input of 800 pulses per second {both half­ making the left side of cl positive.
cycles of a 400-hertz multivibrator) gives a 400-hz While this charge on C1 is still intact, a second
output. Bridge switching inverts the second pulse of pulse turns on SCR3, placing the entire C1 voltage
each successive pair of pulses while choke L1 and across SCR4, reverse biasing it and shutting it off.
load capacitance C1 resonate in series to shape the The C1 voltage also sets up a current flow through
resulting square wave to a sine wave with a peak Rt and Dt ; the resulting 10-volt drop across D1
amplitude of 350 volts. turns on SCR2. With SCR2 conducting, the anode
An initial positive charge is placed on the right of SCR1 is shorted to the right side of C1• This
side of load capacitor C�, through diode D3 and reverse biases SCR2 and shuts it off. With a second
resistor R5 to prepare the circuit for bridge opera­ charging path Lt, SCR2, C1 and SCR3 established,
tion. The first half-cycle begins when a pulse turns cl charges rapidly in the opposite direction, and
on SCR4; C1 is then discharged through SCR4, R3 the cycle begins over again.

1 decibel at 62 hertz. For 120 and 180 hertz, ca­

Feedback improves pacitor values C1, C2 and C3 decrease proportionally
from those at 60 hertz.
parallel-T filter The emitter-followers, Q2 and Q3, minimize the
effects of source and load impedances.
By James Strattan , The best results are obtained when preliminary
H igh Fidelity Recording, Wich ita, Kan.
adjustments on the parallel T are made with
somewhat less feedback than the 150-ohm re­
sistor, R4, provides. To reduce the feedback, R,.
A single-transistor feedback circuit reduces the should be increased to approximately 680 ohms.
high attenuation in the pass band that severely If R4 is replaced by a potentiometer, the feedback
limits the conventional T-notch filter. can be varied. Replacing Q1 with a transistor of
Without feedback, a 60-hertz filter having the higher beta, such as a 2N3390, reduces the loss
component values shown below for R1, R2, Ra, C�, through the circuit at frequencies below 60 hertz.
C2 and Ca will have a Q factor of 0.25. The addi­ A basic application for this circuit is in repro­
tion of feedback between the collectors of Q1 and ducing stereo tape, where the design salvages sig­
Q2 {the feedback transistor) improves the response nals normally buried far below the noise level of
by a factor of 80. Thus, the filter response is down the original tape recording.

-32 V

c,
0.5 J'f
470 K
Q2
0.25 l'f 2 N2613
INPUT--1t---+----f-f

R3
470 K 2 .65 K

Transistor Q. provides feed back for the parallel T-notch filter. Values shown for components are designed
for 60 hertz. For 120 and 180 hertz decrease capacitor Ct., c� and Ca values proportionally. Control of the rejection
bandwidth is provided if the 1 50-ohm resistor is made vari a ble to 680 ohms. This is done with a potentiometer.

65
C i rcu it design

Designer's casebook

minimize loading effects. When the increasing ramp

Triangle waveform generator reaches approximately 6 volts peak, the Schmitt
trigger Q7-Q8 fires, coupling a pulse to the one-shot
resets a utomatically multivibrator. The multivibrator flips, turning off
the positive constant current source Q5, and turning
By Robert G. Teeter on the negative constant sink Q4• This action
linearly discharges the capacitor and the circuit
RF Commun ications, I nc. , Rochester, N.Y.
is ready to repeat the cycle. The time constant of
the one-shot multivibrator is made much longer
For synthesizing waveforms of predetermined than the output triangle width. This assures that
shape, a triangular wave generator is very useful. the one-shot is always in the proper initial state
The circuit of a generator which produces a single to accept the input pulse.
triangular pulse each time it is triggered externally Resistors R1 and R2 can be varied to control the
is shown below. The output pulse has constant rise and fall times respectively. If the capacitor, C,
peak amplitude with no flattening and independ­ is set at 0.01 microfarad, R1 and R2 can be varied
ently adjustable rise and fall times. to produce rise times (and fall times) from 100 to
When an input pulse has triggered the one-shot 900 microseconds. With R1 at 22K ohms, R2 at 6.8K
multivibrator, Q1-Q2, to change state; the pulse ohms and C at 0.01 p.f, the rise and fall times are
appearing on the collector of Q2 triggers Q5 full on both 800 p.sec. With these values, the input pulse
and the capacitor C charges. This linearly increas­ repetition rate can be varied from 20 to 50 pps with­
ing ramp is buffered by the emitter follower Q6 to out distorting the waveform.

�------��--�-- + t S V

100

tOK
22 K

PULSE INVERTER 22K

ONE - SHOT
M U LT I V I B RATOR · 3V
1�1000pf 3,600pF

a,
2N3394

Schmitt trigger, Q1·Qs, resets one-shot

multivibrator, Q�·Qa, and limits
the amplitude of the output waveform.

66
H ig h MOS i mpedance
benefits pH measurement
By Da n iel J. Soltz
Honeywell, Inc., Industria l Division, Fort Washi ngton, Pa.

The extremely h igh input impedance and stability

of metal oxide semiconductor (MOS) field effect
transistors permits design of a simple solid state
amplifier to aid in the measurement of the alka­
linity-acidity content (pH) of solutions. Because
it is small, the amplifier, with its input impedance
of 1014 ohms, can be built right into the pH meas­
uring electrodes. The amplifier output impedance
is less than 5,000 ohms; consequently, readings
may be obtained through long cables.
The very high input impedance is obtained by
the use of commercially available dual MOS-FETs
on a single chip. The devices are p-channel en­
hancement types connected in a differential mode +V
for amplifier stability. Gate leakage current, usu­ In the pH amplifier the h ighi n put impedance of MOS
ally a problem in junction-type FETs with tem­ transistors Q1 a nd Q2 approximately matches the
perature changes, is much lower in MOS-FETs at impedance of the standard pH electrodes. Potentiometer
room temperature and remains constant as tem­ R, adjusts the amplifier gain and Rs zeros the amplifier
perature increases. output at a pH of 7, pure water's acidity-a lkalin ity.
Transistor Q5 forms part of a constant current
source which fixes the operating bias of Q1 and Q2.
Diode D1 compensates for Q5 ' s base-emitter volt­ the gain can be adjusted to any value from 0 to 10
age variations with temperature. by changing R1. R2 is a temperature-dependent
In the output stage of the amplifier are two resistor which, when immersed in the sample solu­
matched npn silicon transistors, Q3 and Q4, con­ tion, compensates proportionately for variations of
nected differentially to form a symmetrical load the electrode temperature. The input signals are
for the input stage. Over-all amplification, A, es­ about 60 millivolts per pH unit. The pH unit scale
sentially is a function of resistors R1 and R2, so varies from 0 to 14. A pH of 7 corresponds to 0
R1
output volts and the amplifier output is adjusted
A = volts out
volts in R.z
to this value by potentiometer R3• The voltage is
positive below a pH of 7 and negative above it.

Values of resistors RA through Ry are chosen so

AN D gate protects system that 2 milliamperes How through each 1.5-kilohm re­
sistor. This reverse-biases each of the associated
should the voltage fai l diodes DA through Dy. Base current of the transis­
tors Q1 and Q2 is sufficient to saturate them and
energize the relay, K1. R2 and R4 act as bleed re­
By Alan Shapi ro sistors which keep diodes D1 and D6 forward
Beta I n stru ment Corp., Newton U pper Fal ls, Mass. biased.
Should one of the monitored voltages fail, the
If a critical voltage supply fails, this simple AND corresponding diode becomes forward biased, and
circuit detects it and energizes an interlocking relay the voltage at the anode of D1 or the cathode of D6
to prevent damage to the system's components. The drops to about one volt. This cuts off either Q1 or
circuit draws only 2 milliamperes from each moni­ Q2 and the relay becomes deenergized, opening the
tored voltage source, which may be as small as 3 interlock circuit.
volts, and of either polarity. If the -20-volt supply for the AND circuit

67
 t N 4 57 t N 457

t N 4 57 I N457

9mo
1 N 457
+ 20 V 1 N 4 57

Kt
SIGMA 11 F
Rc = 2,300 R4
I min= 4.6 m o t20 K

9mo
-20V
Simple circuit monitors d-e voltages of either polarity. As lo ng as all the voltages are present, the relay is
kept energized. But if one voltage should be absent, Q1 or Q2 is turned off and the protective relay is opened.

should fail, the high impedance presented to the voltage should be less than the difference between
emitter of Q1 cuts it oH. Similarly, Q2 cuts oH if the 3 volts and the value of the voltage to be moni­
+20-volt supply fails. tored.
The circuit's response time is the sum of the re­ The number of circuits that can be monitored is
lay actuation time and the voltage decay time. The limited by the sum of the leakage currents through
voltage decay time can be reduced significantly by the 1N457's. \Vhen th is exceeds approximately 100
adding a zener diode in series with the correspon­ microamperes, the transistors Q1 and Q2 may re­
ing dropping resistor, RA through Ry. The zener main on under any conditions.

Low-cost strobe built A timing light with a xenon-filled Hashtube

mounted in a pistol grip housing can be purchased
for about $20 with a built-in power supply ade­
with scr i n trigger quate to drive the strobe synchronizing circuit.
Mter the circuit is mounted inside the housing,
the modification is completed by wrapping 10 turns
By Arthu r C. Eberle
of No. 18 bare copper wire around the Hashtube.
Columbia Gas System Service Corp. Colu mbus, Ohio One end of the wire is connected to the secondary
tap of the photoflash transformer, T1 . and the other
By using a silicon controlled rectifier in the trig­ end is left unconnected. The finished unit in its
gering circuit, a low-cost general-purpose strobo­ gun-type housing is more easily handled than con­
scope can be made by modifying an automobile ventional strobes which are often bulky.
engine-timing strobe. The unit is triggered by low­ In the circuit, capacitors C1 and C2 are charged
powered transducer pulses and can be built for one­ by the power supply to about 500 and 200 volts re­
quarter the cost of a commercial laboratory strobe. spectively. An incoming pulse causes the scr in the

68
triggering circuit to fire, discharging C2. The re­
X EN O N
sulting surge of current produces a 6-kilovolt pulse F LAS HTUBE
at the secondary of T 1• This ionizes the xenon gas �
in the flashtube, providing a conductive path
through which C1 discharges, and a 100-microsec­
ond flash of light is produced. The ringing of T1 and
c2 turns off the scr, preparing it for the next pulse.
A special feature of this circuit is its ability to
respond to low-power pulses; it was initially de­
signed to be triggered by a photodiode when com­
mercial strobes proved to be too insensitive. It can
be triggered by a 10-microsecond pulse of 3-volt
amplitude at a current of 5 milliamperes. An input
of 25 pulses per second is possible before the pho­ J"'U"L
P U LS E --------'
toflash transformer saturates and the circuit ceases I N PU T --------'
to respond. Tests of response time made with a Incoming pulse triggers the scr discharging C2 i nto T11
IN2175 photodiode showed a circuit delay of about producing a 6-kilovolt pulse to ion ize the gas. cl then
10 p.sec and a flash duration of 100 p.sec. d ischarges, producing a 1 00-�sec flash of l ight.

Series gating reduces changing to the logical 1 state unless all preceding
bits are in a logical 1 state; each bit must be gated
by inputs from all preceding bits. Thus, the most
components in cou nter significant bit of a 20-bit counter would be gated
by 20 diodes, one for each preceding bit, plus one
By Robert C. Sanford for the clock. The preceding bit gate would contain
19 diodes, the one before would contain 18 diodes
Electrac, I nc. Anaheim, Calif. and so on until the second bit, which would contain
two diodes. A total of 209 diodes is required. Two­
Parallel binary counters are used in computers or stage noninverting amplifiers would be required in
other applications where the delay time of a con­ most cases to drive the gates.
ventional counter cannot be tolerated. The series-gated parallel counter, on page 82,
In the standard parallel-gated counter shown be­ requires much fewer components than the standard
low, counter logic prohibits any flip-Bop from parallel counter. Each flip-flop drives only one

FF FF FF FF
1 2 4 8

CLOCK

To change the state of a flip-flop to logical 1 in the stand ard para llel-gated counter, each AND gate requires
information from every preceding bit, all of which must b e in a logical 1 state.

69
 +V
�
� ·=
� �
:·
:· ...
FF F F F F F F FF
1 1 2 1 4 1 8 1 16 1
T
I ....
......
T
I ....
.,
T
1 .
,.,
....
T
l __......
·�
T

o.... D 0
. .... . ....
.... f""' . .....

�� �� ,,
�� ��
CLOCK

Cumulative voltage drops across the diodes limits the num ber of permissible bits in this series-gated parallel counter.

::
+V
=·. :· �-
�-
� �. �.
..

FF FF FF FF FF
1 1 2 1 4 1 8 1 16 1

T
I .....
.....
T
.....
..,
T
·�
.....
T
.....
. .,
T

+R-
... .. ....
-.9_+
.....
+ R-
A & &
... .. ....
...9. +
.....
+R-
&&&
" "' "'
-.E.+
.....
&&
R
" " "'
A A A
H
:• R t 3� 3� n
�
: Rt
��
:: R , :: Rt
.. . .. .
•

CLOCK
- Vt

Voltage across resistor R compensates for the drop acror. s series diode D, thereby maintai ning a fixed triggering
level at point A for each bit. When th is compensation occur s point A is at logical zero.

diode in each gate. A 20-bit series-gated parallel diodes to clamp the succeeding stages to zero.
counter required 58 diodes and no amplifiers. When Voltage divider network R and R1 above com­
each Hip-flop is in a logical zero state, it clamps pensates for the series diode voltage drops. Choose
the following stage so that it cannot be set to a resistor values so that the voltage at gate junction
logical 1. If the selected flip-Hop is in the logical A represents a desired logical 1 level. When the
1 state, but some preceding flip-flop is in the zero voltage at A indicates logical zero, voltage drops
state, the zero will be propa�ated throu�h the series across each R and D are eaual and opposite.

been designed in which the time between pulses

U n ij unction controls is linearly voltage-controlled over a 20-to-1 range.
Unlike other unijunction circuits, the period rather
spacing between pulses than the pulse repetition frequency is varied line­
arly in the circuit at the top of page 83.
By Arthu r M. R idenou r a nd Fra ncis Tu rco In the new circuit, the unijunction' s trip point
and hence the time between pulses is varied by
adjusting the voltage VcoN·r· Until the trip point is
H RB·Singer I nc., State College, Pa.

reached the output at the 330-ohm resistor will be

In a unijunction circuit, it is often desirable to gen­ approximately at the level of the control voltage.
erate a train of pulses with constant pulse width When the capacitor charges to the trip point, the
but with variable spacing. To do this a circuit has unijunction transistor conducts and the output

70
voltage drops. The unijunction immediately turns 20 .-------�:r---..
off and the cycle repeats, generating a pulse every
time the unijunction transistor momentarily con­
ducts.
During the nonconducting portion of the cycle
the output voltage Vo is

(1)
where Rat and Ra2 are the unijunction' s base-l
and base-2 internal resistances such as in the lower
schematic on the right. Since Ra t + Ra2 is gener­
-

ally much larger than R2, the output is approxi­ Cl)

c
mately at the level of the control voltage. When z
c
u
the unijunction conducts, Rat becomes very small I&J
Cl)
and the output voltage drops to ::;

RB2 VcoNT
_,

Vo VcoNT (2)
!i
R2 + RB2
= -

Since Rn2 is usually larger than R2, the output volt­

age at this time will be above ground potential. 330
Linear control over pulse period is held by charg­
ing the 10-microfarad capacitor with a constant
current source consisting of the zener diode and
transistor circuit Qt. Since the zener maintains a
constant voltage across the transistor's emitter cir­
cuit the emitter and collector current will be con­
stant. Consequently, the capacitor charges linearly.
With the given circuit values, the time between
pulses as a function of control voltage is shown
in the graph. The time, �t, required to charge to a
specified trip voltage is given by Pulse spacing is controlled by the u n ijunction circuit.

at _- .1 VI C (VT - Vmin)C
A negative output pulse 20 #'sec side is developed when
_
(3) Q:� conducts. Experimental pulse-spacing values as a
- I function of control voltage are shown on the graph.
Thus, the slope of the curve can be varied either
VcONT
by varying the charging current, I, or the value of B+
capacitor C. In this equation VT is the trip point
voltage and Vmin is the minimum voltage to which
the capacitor discharged.
1
The natural pulse width of the circuit is about
20 microseconds, but longer pulse widths may be
obtained by connecting a one-shot multivibrator to
the output.
Although the linearity of the circuit is good, it
is affected by the current-dependent internal resist­ +
ances of the unijunction transistor. This resistance
affects the minimum voltage to which the capacitor
discharges and therefore affects �V in equation 3.
Improved linearity can be achieved by synchron­
ously discharging the ramp on the emitter of the Equivalent circuit represents Q1 as a constant current
unijunction through an external circuit. This allows sou rce I and Q:� by the diode Vo and resistors R81 and Rs2.
the minimum capacitor voltage to be determined Substituting into equation 3
by the external circuit rather than by the unijunc­
tion transistor parameters.
From the equivalent circuit, the trip point voltage I
[
.1t = _Q vD +VC ON T RB I
R a t + (R t + R B2) v m in
Jc 5)
VT may be expressed as
-

RBI
Since all the terms except Vco:sT on the right side of
VT = Vo + vcoNT (4)
RBI + (RI + RB2)
equation 5 are approximately constant, the time be­
tween pulses is proportional to the control voltage.
C i rcu it desig n

Designer's casebook

--....--
Full-wave detector
.. - + 10 V

R7
50K
without transformer Rt
IOK

By Col in Ya rker
Marcon i Instru ments Ltd. , St. Albans, England INPUT
'V
Ful l-wave detection of a signal with both input and ..L
output referenced to ground is provided without a
transformer. Operation of the detector is from d-e to
more than 10 kilohertz.
A half-wave rectifier with a diode or a transistor
is normally used to detect an a-c signal for auto­
----4...,_____.�-- - IO V
matic gain control or a similar application. The
a-c to d-e conversion efficiency of a half-wave de­ Transformerless full-wave detector reference
tector is low, 0.318 volt peak reference to 1 volt to ground. Each half-cycle of input sine
wave causes negative half-cycle at the output.
peak, compared with the conversion efficiency of
0.636 volt peak for a full-wave detector. Further­
more, the circuit time constant of a half-wave cir­
cuit is much longer than that of the full-wave cir­
cuit for a given ripple content.
The main disadvantage of a full-wave detection
circuit is that a transformer is necessary to refer­
ence the input and output to ground, which affects
the circuit's low-frequency response and compli­
cates the circuit.
With the positive half-cycle of a sine wave ap­
plied to the input, diode D1 is backbiased and
diode D2 is clamped to ground when the emitter of
Qt goes positive. With the negative half-cycle ap­
plied to the input, diode D2 is backbiased while
diode D1 is clamped to ground when the base of
Qt goes negative. Each half-cycle, positive or nega­
tive, causes a positive half-wave voltage to develop
across resistor R2 in the collector circuit of Q1•
Transistor Q2 acts as a restorer to reference the
output back to ground. Potentiometers R;; and R6
are adjusted to obtain equal amplitude of the two o �--�----�---��
2 3 4 5
output half-wave voltages. These appear across R4
PE AK VOLTS I N
in the collector circuit of Q2. Potentiometer R1
biases Q2 to a minimum level of continuous con­ Linear relationship exists between input and out·
put peak voltage, except in 1 . 5-volt i n put region.
duction to form a sharp cusp-shaped wave form
across R4. This adjustment of R7 causes a slight
d-e offset across R4, which is made negligible Nonlinearity occurs in the region of 1.5 volts peak
in proportion to the output-signal amplitude. at the input, because of the changing impedance
The curve shows the relationship between the of the diodes and the transistor Q, . The upper
peak input and output voltages. level is limited by the negative supply voltage and

72
can be extended if required. improvement in gain would be 0.636/0.318 x 2 = 4,
If the circuit replaces a bridge-detector circuit with an equal ripple level. Thus, reducing output
with a 1:1 transformer, it would have a gain of levels to those of a half-wave circuit results in
2 down to d-e. The ripple percentage would be the less ripple with the same time constant.
same using an equivalent load impedance and The circuit could also be used as a frequency
smoothing capacitor. doubler. In this mode, Q2 may be omitted if the
If the circuit replaces a half-wave detector, the d-e level at the collector of Q1 is not critical.

I N PU T
M ultivibrator controls r-----t---...-- Vcc • - 1 2 V DC

single-diode gate R2
1K

By S. Hoi Tsao
National Research Cou ncil, Ottawa, Canada

A simple b ilateral gate is shown with part of the

collector circuit of a typical saturated multivibrator
which controls its gating action.
When Q1 turns on and Q2 turns off, the ger­
manium diode D1 is forward biased. The collector Transistors Q1 and Q2 are part of a saturated mu ltivibrator.
of Q1 bottoms, and the output is thus held close to The single-diode bilateral gate consists essentially of
Ro and Dt. It permits an output when Q2 turns on,
ground potential. As the state of the multivibrator blocking D�o As Q2 turns off, D1 and Q1 clamp output
changes, with Q1 off and Q2 on, D1 becomes re­ close to ground when Q1 conducts heavily.
verse biased, allowing an output to appear across
Ro and Q2 (now saturated) in parallel with RL. With
the input grounded, the change in output voltage The maximum allowable input voltage should not
amounts to about 0.2 volt. exceed ± Vce R1/Ro. Under these conditions, the
For best results, both R1 and Ro must be com­ gated signal has little effect on the switching action
parable in magnitude to the geometric mean of the of the multivibrator and spurious triggering does
forward and reverse resistance of Dh and consid­ not occur.
erably larger than R1 and R2. The gain of the gate Complementary as well as a multiple number
can be approximated by of gates can also be controlled by a single multi­
R Ro RL vibrator. Capacitive coupling offers another modi­
G = + RI
where R =
R Ro + R L
-,
fication for a-c signals.

and their power supplies, and still provides com­

Differential discriminator mon-mode rejection of high and low-frequency
rejects common-mode noise noise.
The discriminator shown-designed to be com­
patible with low-cost RTL (resistor-transistor logic)
By Forrest Salter integrated circuits -is part of a system for trans­
Argonne National Laboratory, Argonne, I ll.
mitting phase-modulated digital data over a 3-
mile telephone line.
The system's transmitter consists of a shift
Tunnel diodes serve as current level detectors in register and line driver made from Fairchild Micro­
the differential discriminator shown. Diodes allow logic circuits. The line driver holds both sides of
detection wave-form restoration and storage of high the line at ground for no transmission and
speed serial binary information transmitted over polarizes the line in either direction during trans­
long distances. This method of detecting serial mission, (positive for a logical one and negative for
bit information eliminates differential amplifiers zero). This permits the receiver to detect the start

73
 +3

I
I I
I
SHIFT REGISTER I TRANS- I1
- ! MILINESSION I I
I DIFFERENTIAL POLARITY CHANGE
T ,T POT CORE BY FERROXCUBE, PART NO. I40 8 P - L00- 3 E
I
1 2

I DISCRIMINATOR I
DETECT
PRIMARY 10 TURNS , SECONDARY 40 TURNS, WIRE SIZE N0. 29
#J LOGIC CIRCUITRY BY FAIRCHILD SEMICONDUCTOR _..
I .__ __, +3 I
Attenuated binary bits--received at the termination of telep hone transmission-trigger tun nel diodes and the
original pulse wave form are restored. The toggle circuit restores the d·c level lost i n the pulse transformer.

of transmission with either a leading one or zero, through them. This current in tum is a function
saving synchronization time. of the difference of potential between the two
The differential discriminator in the receiver in­ input terminals.
cludes two tunnel diodes and two high-frequency As the forward peak current of either tunnel
pulse transformers arranged back to back to sense diode is exceeded, impedance changes abruptly,
current for logical bit detection. producing a pulse on the output of the transformer.
Resistor R1 in the receiver terminates the tele­ Both are tied into a NOR gate to signal the con­
phone line in its correct impedance. The two in­ trol circuitry that information has been received in
put capacitors to the discriminator form a low­ the toggle and can be gated out.
pass filter for bypassing high-frequency noise. The These high-speed pulses-coupled through the
values of resistance and capacitance are chosen transformers-set the toggle, which reestablishes
to match the impedance of the telephone line and the d-e voltage level. The pulses are conducted
for frequency response. through the emitter followers, Q1 and Q2, which
The detector is differential because changes of provide the current gain and positive d-e shift to
state of the tunnel diodes depend on the current achieve stable triggering.

1 ----..\.
•lt- -A._•�
.J�A..
-.A ..Jr------vz
"-'
M ultivi brator provides
conti nuous phase control

By S . Tesic
U niversity of Belgrade, Yugoslavia

A single potentiometer provides smooth 180° phase

control in the free running multivibrator at the
right. With a synchronizing voltage, V �, at the in­
v,
put, the phase of the output voltage, V2, varies as
the arm of the potentiometer is moved from transis­
tor Q1 toward Q2. The circuit has the advantage of
maintaining a constant output voltage over the
phase-control range. The phase depends on the
energy distribution ratio between the two active
elements of the symmetrical generator. Moving the potentiometer arm changes the phase
Since the frequency of the circuit is controlled relationship between synchronizing voltage V1 and
by the synchronizing voltage, the circuit may be output voltage Vs. Ampl itude of Va remains constant.

74
 Phase relationship between
a 30-megahertz square-wave
synchronizing voltage
and the output sine wave
at two different
potentiometer settings.

operated over a large frequency range. In addition peak-to-peak, about 10 times the amplitude neces­
the synchronizing voltage may be either a sine wave sary to synchronize the circuit directly at the
or a square wave. emitter.
The minimum amplitude of V 1 is that value The photographs, taken at two different settings
necessary to synchronize the circuit when the of the potentiometer, show how the phase of a
potentiometer is at its midrange. At this point the sine-wave output at 30 megahertz varies in rela­
circuit is least sensitive. The voltage is about 2 volts tionship to the square-wave synchronizing voltage.

I nteg rated circuits

quickly assem bled

By Forrest Sa lter
Argonne National Laboratory, Argonne, I ll.

An easy way to breadboard integrated circuit as­

semblies is to use IC's in dual in-line packages
(DIP's) and plug the DIP leads directly into the
type of connector normally used as edge connectors
for printed circuit boards.
This assembly offers fast turn-around, quick
changes and the possibility of repeated re-use. By
N OT E : C O N N ECTORS M O U N T E D ON 1 / 2 " CENTERS
using this method a small control system was built
in days rather than weeks. Cross section of three con nectors placed side
by side with integrated circuits in position.
A printed circuit edge connector (EMS048DJOOO),
made by Hughes Connecting Devices, a division of
Hughes Aircraft Co., possesses the correct dimen­ interconnections to the integrated circuits.
sions. The contact rows are the proper distance Voltage and ground leads should be inserted first,
apart and the tenth-of-an-inch spacing matches the keeping them on the bottom layer away from the
DIP lead spacing. To plug in the DIP's requires logic wiring and any required changes. Partial in­
near-zero insertion force. sertion of the J acpin allows easy removal for any
A cross-sectional view, at the right, shows the necessary changes.
IC' s in position. The insertion of blank insulating Additional etched cards can conveniently provide
boards or etched circuit boards as shown applies voltage and ground interconnections, besides lock­
pressure to pinch the leads into position, providing ing the integrated circuits into position. Because the
two-sided contact on each lead. locations of ground and power terminals may differ
On the wiring side of the connector, two remov­ from package to package, it is a good idea to make
able crimp-type pins with leads (Hughes's Jacpin the one-sided % 2"-thick etched cards longer than
EJ20N24COOO) are provided for each integrated necessary. These cards can then be cut at the
circuit terminal. This permits a wide variety of appropriate locations and placed back-to-hack with

75
Etched boards pinch the leads of in-line Pins Inserted in the wiring side of the connectors
integrated circuits mounted i n the connectors.
allow the integrated circuits to be con nected
These boards a re also arranged to interconnect
to each other and to external circuitry.
common grou nd and power connections.

an insulating shim between them to provide proper connect external circuitry through an etched board.
pressure. The two extreme longitudinal rows of The cost of the connectors and pins to accom­
contacts on an assembly of connectors are not used modate 54 integrated circuits is about $120, or
for the integrated circuits because each circuit must about $2.20 per dual in-line pack. The low cost
straddle two connectors. If desired, these rows can makes this construction practical for prototypes.

with the load resistance.

Series regulator g ives Since there is no current flow in Rt and R2 prior
to turn-on, Vo appears across the base-emitter
overload protection junction of Qs. If the magnitude of this forward­
bias voltage is sufficiently large, Qa will turn on,
By M ichael A. Torla forcing Q1 and Q2 into conduction. There is, there­
fore, a critical value of RL for each combination of
Sylvan ia Electric Products I nc., Waltham, Mass. V,u and Ra. If the load resistance is less than this
critical value, the regulator cannot start. This criti­
The series voltage regulator at the right provides cal value is the minimum load resistance.
If the load current is increased above maximum
both overload and short-circuit protection. The
design limits with the regulator operating at some
circuit is characterized by low power dissipation
normal quiescent point, the voltage developed
and high speed, and the output voltage is automati­
across R9 becomes sufficiently large to forward
cally restored upon removal of the overload. U su­
bias the base-emitter junction of transistor Qr.. The
ally, a series regulator of this type exhibits high
resulting collector-current flow develops a voltage
across Rs and C1 such that the reverse bias across
power dissipation in the pass transistor, or requires
the manual restoration of the input power after
diode D2 is reduced. At some specific value of over­
fuses or circuit breakers trip.
load current, the collector current of Qr. develops
Before the regulator turns on, resistor Ra and
a sufficiently large voltage across C, and Rs to for­
the load resistor, R�., form a voltage divider, such
ward bias the diode D2• This "turn-off" voltage
that some small fraction of the input voltage ap­
across Ct and Rs is a function of the output volt­

( )
pears across the output terminals:
age Vu:
. RL
V0 Vm (1) (2)
RL + Ra
_ .

where Vm is the reference voltage across Dt and

The combined resistance of the sensing and refer­ Vw2 is the forward bias across D2• The resulting
ence network is assumed to be large in comparison current flow through D2 reduces the current through

76
 INPUT
OUTPUT
VO LTAGE VOLTAGE
+30 -38V OC t26.5V, ot O.S A
Rg
0.9
Rt
Q5 , o, 5,1 1 0
2N1132 1 N942 R5
499
02
1N645
R&
03 Q4 500 R
2N1 1 32 2N11 32 L

c, Re R2 R7
1,uf 1 , 500 1 , 5 00 499

RESI STORS R3 ,Rg - 1 WATT

ALL OTHER F I XED RESI STORS - 114 WATT

During overload, degenerative feedback reduces the voltage across the reference diode, D1, and output voltage falls
u ntil Q11 turns off, thus shutting off the regulator. Regulator can not tu rn on u nless the load current is decreased.

reference diode D�, thus decreasing the reference

voltage, V DI· This change in the reference volt­
age is accompanied by a corresponding decrease TURN - ON
CHARACTERI STIC
in the output voltage, V0• From equation 2, it is
seen that the combined effect of these two volt­
age changes is to increase the forward bias across
D2.
As a result, capacitor C1 discharges more current
through D2, further reducing the reference diode
current. This degenerative type of feedback con­
tinues until the reference diode current and voltage,
as well as the output voltage, drop to approxi­ c
mately zero. With no appreciable output voltage or
0 500ma 700ma
load current, transistor Q5 turns off. As soon as ca­
pacitor C1 has fully discharged, the regulator re­ OUTPUT CURRENT IN M I L L I A M PERES

turns to its normal operating mode. Output turn-on and turn-off characteristics of the
In a typical output characteristic shown for this series regulator represent a hysteresis-type effect,
type of regulator, point A is the open-circuit volt­ due to changing loads, component variations, a nd i n put
voltage variations. Maxi mum average power dissipation
age, while point E represents the maximum design of the pass transistor, Q1, 5 watts, occurs at point B.
load current. The slope of the line segment AB is
the output impedance of the regulator. When there
is an overload, the line segment BC represents the tion occurs at point B, which is the point of maxi­
turn-off characteristic. Point C is the voltage seen mum dissipation of the pass transistor, Q1• The
at the output terminals when the regulator is in its time required for the quiescent point of Q1 to shift
short-circuit mode. This voltage may be any value from B to C or from D to E is in the order of micro­
between 0 volts and point D, which is the starting seconds.
voltage as determined by equation 1. The series regulator can be used to supply power
The line segment DE represents the tum-on to capacitive loads. In this case, however, capacitor
characteristic as the regulator returns to its operat­ cl must be adjusted to provide immunity from
ing condition at normal full load. The geometric surges of load current which occur during the start­
figure, BCDE, represents a hysteresis-type effect ing cycle of the regulator.
which arises as a result of changing input voltage A second effect of capacitive loads is the increase
conditions, load resistance changes, and variations in tum-off time which this type of load causes. This
of component parameters within the regulator, pre­ increase in turn-off time, however, does not impair
venting unstable system operation due to overload. the operation of the circuit, since the switching
The circuit's maximum average power dissipa- times are still in the microsecond range.

77
 Circuit design

Designer's casebook

- 9V
Hyd rophone preamplifier
cuts cable noise

By Frank Watl ington

Geophysical Field Station, OUT
Columbia U niversity, St. David's, Bermuda

A hydrophone preamplifier, built with a field effect

transistor, eliminates unwanted noise and added ALL RESISTORS
capacitance produced by long cables. These unde­ MFTALLIZED TYPE

sirable effects occur when long cables are used with

hydrophones or other piezoelectric transducers. Effectsof noise pickup and added capacitance caused by
long cables are eliminated with this circuit configuration.
The FET circuit (at the right) eliminates these The 1-megoh m resistor, shown dotted at the input,
effects as efficiently as vacuum-tube circuits in reduces low-frequency excursions in the signal. These
a cathode-follower configuration and has additional occur when hydrophone moves slowly in the water.
advantages . The solid state circuit does not require
high voltage and high filament current, as tube cir­ water, the motion causes tremendous low-fre­
cuits do. A small 9-volt battery, such as the Bur­ quency excursions in the signal. In this case the
gess 2U6, powers the FET circuit. Continuous 1-megohm resistor is added. This reduces the input
power can be obtained during a week-long ocean­ impedance and increases the lower frequency at the
ographic field trip with a portable hydrophone. threshold point of 3 decibels. By increasing this fre­
Frequency response for short lengths of cable, quency a higher cut-off point occurs and the low­
approximately 50 feet, is Hat in the audio region frequency excursions are not transmitted.
down to 2 hertz. The voltage gain is approximately The circuit is so small that it can be potted in
unity. In addition, the circuit can be used with epoxy, attached to the hydrophone and dropped
cables up to 3,000 feet in length. into the water. It can be subjected to hydrostatic
If the hydrophone lies still along the ocean floor, pressure directly if, for example, it is immersed in
the 1-megohm resistor, shown dotted, is not castor oil. The battery is not potted with the cir­
needed. However, if the hydrophone moves in the cuit and can be replaced as needed.

With all semiconductors in a nonconducting

Two events, i n seq uence, state, the sequence detector operates as follows:
• If signal B is applied first to the voltage divider
produce detector output formed by resistors R1 and R2, a voltage of about
+7 volts is placed on the base of transistor Q1.
• Since the values of resistors R3 and � are

By Roy A. Wilson equal, the potential at node M is half the voltage

Hycon Manufacturing Co., Monrovia, Calif. of the supply. Here the voltage at node M is + 14
volts.
• With node M at + 14 volts and the base of Q1

An output pulse is provided by this amplifier only at + 7 volts transistor Q1 will not conduct.
when some event, designated A, precedes another • When signal A is applied across the voltage

event, B. Any other sequence is ignored. divider of resistors Rll and R6, about 9 volts appear

78
 -----+-- +28

Rt
20 K +7V

_lBv A Rs
2K 02
2 N697 20K
_:[2av
R4
+9V Dt 1.8K R ESET
2 N I 59 5
Rs
tK 6.8K

An output is provided when an event, A, precedes another event, B. Other sequences a re ignored.

across the 1-kilohm resistor. enters at B, transistor Q1 turns on, and an output
• Since node M is at + 14 volts and the gate of pulse is produced.
the silicon controlled rectifier, Db is at +9 volts, A reset pulse is generated at any time and used
the scr conducts. to short resistor R4 by means of transistor Q2.
• When the scr conducts, node M drops to Thus, the current through the scr is dropped below
ground potential. Thus, when a positive signal its holding value.

the line holds capacitive crosstalk between leads to

Transm ission l ines couple a minimum. The twisted-pair distribution of signal
multi ple-driver receivers lead and ground return minimizes inductive cross­
talk. This tends to cause cancellation of the mag­
netic field associated with currents that How in each.
By R.C. Ga rava l ia Referencing all receivers to a single-driver
Automatic Electric Co. , Chicago
ground as shown in the block diagram below makes
possible the use of d-e coupling. Control of the
state of these receivers is accomplished by:
A d-e coupled transmission l inesolves any ground­ • Designing receivers with a common base input;

differential problem between driving and receiving • Connecting the base of this stage through the

subsystems separated by as much as 120 feet. This cable to reference ground;

eliminates the costly transformer coupling usually • Turning the driver on and off to cause the

required in such cases. The lightly twisted line­ emitter to vary above and below this ground.
composed of 24-gage solid wire-has a character­ By controlling receivers in this way almost three
istic impedance of approximately 100 ohms. volts of ground differential can be tolerated.
Using very low voltage (1.5 volts) excursions on This design permits coupling up to four receivers

IN Pu

--
__
rs_
_
_
---t:..-1 CABLE DRIVER v -tr
A -- -�-
--
-

__
- -

r s
....,._w
T
_1_ ��� �-c--_
- -- 1r
AB L E
_......,
-- -'Jrh
+
.ft-J
RESISTI V E
T ERM I NA T ION

DRIVE R i - - -- -- , i -- 1
GR OUN D
- - - - - - -

I : --- I
I
I

All receivers are referenced to a single-driver

:1 I� - - - - - ,I I
I I I
_J L - - - - - - - - .....l
I
g round, accom plishing d-e cou pling without
CA B L E RECE IVER 1 CABLE REC E I V E R 4
L___ _ _ _ _ _

expensive transformer equ ipment.

79
 R2
100

820 DRIVER
I N 4009 GROUND
A --!e-...

18K

-E = - 6 V -------41�---a
0

+6 ....-
. --. 0
LL..
O CD 1-
4 1-----. + 6 -
LL.. u
0�
1- 0
0 0::
...J UJ
>w
LL..
I- LL.
::l ::l
T I M E -. O CD + 0. 3 .___.
RECEIVER GROUND
T I M E _.

In the quiescent state, transistor Q1 and Qa are biased at c ut-off wh ile Q2 is held in saturation.
A voltage of +6 a pplied to A and A' simultaneously sends Q. into conduction.

on any one line. Changing resistor values increases R1 and R3• Therefore, the line potential is a func­
this maximum limitation. tion of the total receivers used. Resistor R:� helps
A circuit schematic of the complete driver-re­ isolate the individual receiver's base-to-emitter
ceiver configuration appears above. Only one driver voltage variations from the line. Resistor R2 termi­
and receiver are shown on the line. The driver nates the line in its characteristic impedance value
circuit is a low-output impedance, pulse-amplifier of 100 ohms.
switch with basic topology similar to a standard This condition prevails until a positive voltage
DTL (diode-transistor logic) NAND/ NOR gate. of +6 appears at A and A' simultaneously. \¥hen
The receiver circuit employs the common-base am­ this occurs Q1 goes into conduction. Transistor Q1
plifier and buffer circuit to increase drive capability. saturates and supplies current to the line. This
In the quiescent state, transistors Q1 and Qa are raises the potential of the line above driver ground.
biased at cutoff while Q2 is held in saturation. (Re­ In turn, all receiver common-base amplifiers are
fer to the schematic and wave-shape diagrams.) reverse biased. Thus, transistor Q2 cuts off while
The emitter current of Q� flows through resistors Q3 goes into saturation.

The design exploits the near-zero temperature drift

FET insures sta ble of an FET at its bias point.
The generator consists of FET constant-current
sawtooth wave source, Qt , variable capacitor C1 and unijunction­
transistor switch, Q2. Potentiometer R2 establishes
Q1's constant drain current of 0.1 milliamperes­
By Emanuel Elad the point that determines the zero drift bias of
the FET. The negative feedback provided by the
Lawrence Radiation Laboratory,
U n iversity of Ca liforn ia, Berkeley
high resistance of source resistors Rt and R2 in­
sures stability of the drain current, despite fluctua­
tions of the supply voltage. The constant current
The stable sawtooth wave generator on page 123 delivered by the FET linearly charges variable
takes advantage of the extremely low drift proper­ capacitor C1 to the triggering level of Q2. The
ties of a field effect transistor to supply a constant charging time is a function of Ct.
current independent of line voltage fluctuations. Varying C1 adjusts the frequency of the gener-

80
ated wave form over the range of 500 hertz to 50 + 20 v
kilohertz. The storage capacitor is discharged in 1
microsecond through conducting switch Q2. The
sawtooth voltage at cl is applied to the output
terminals through emitter follower Qa. The ampli­
tude of the output signal is determined by poten­
tiometer R4 in the range of zero to 8 volts. Base 2
of Q:.e supplies a synchronizing output signal for
oscilloscope display. The circuit can operate as a
portable unit with a battery of its low current drain.
The linearity of the sawtooth wave form over its
dynamic range of frequencies is within 1%.
t 20 V
(SIGNAL O U T
Temperature stable F ET su pplies a constant
c urrent to charge capacitor C1. Varying
Cz
0. t pf
../1IV1.
C1 cha nges the sawtooth frequency. ':'

+9 V
Converti ng audio oscil lators
to sq uare-wave generators

By R.S. Sel leck

Consu ltant, Los Angeles

Any audio oscillator becomes a square-wave gen­

erator, at less than half the usual cost, when the N
I P UT
conversion circuit at the right is coupled to the
oscillator. The circuit will shape sine waves up to 3
megahertz before the trailing edges of the square
wave begin to deteriorate.
Input signals from 0.2 volt to 10 volts in ampli­
tude can be used to trigger the circuit. High con­
ductance germanium transistors permit triggering
at low signal levels, while silicon diodes limit the
maximum input voltage to 0.7 volt. The circuit is
symmetrical and either bias voltage can be easily ALL DIODES 1 N 3064 -9 V
removed when unidirectional pulses are desired.
Positive signal turns on D1 and Q1; this d rives the
Power is provided by two 9-volt transistor batteries a mplitude-limiting pair, Q. and Da, into conduction,
that can be packaged with the circuit in a single squaring up the wave form. Similarly a negative
self-contained unit. square pulse is generated by the lower half of the
Capacitor C1 blocks any direct-current compo­ circuit. Emitter followers isolate the output,
preserving the mtegrity of the square wave.
nents present in the incoming signal; diode Dt cuts
the positive excursion of the alternating component
to 0.7 volt, and places it across the 47-kilohm re­ The emitter follower formed by Q3 and the 3.3-
sistor and the base-emitter junction of Q1 , turning kilohm resistor in Q8 's emitter isolate the load from
Q1 on. Q1 is a germanium transistor which h1rns the wave-shaping circuitry; this isolation enables
on quickly, squaring up the wave form and creating a pulse of 6-volt amplitude to drive a 50-ohm re­
a voltage drop across its 4.7-kilohm collector re­ sistive load without wave form distortion.
sistor. This voltage turns on the wave-shaping pair, Since all transistors in the circuits are biased
Q2 and D2• Q2 shapes the wave to its final square­ off, a leakage current of only 20 microamperes
ness, while D2 clips the top of the pulse, assuring Bows when the circuit is not in operation; thus,
uniform height. The lower half of the circuit oper­ the unit can be stored with its batteries without
ates to generate negative pulses. significant loss of battery life.

81
 Circuit design

Designer's casebook

Direct current regulator

drives fluorescent lamps
By David B. Hoisi ngton
U.S. Naval Postgraduate School
M onterey, Calif.

Fluorescent lamps in buses, trains, boats and other

vehicles are usually energized by solid state in­
verters operating at frequencies above 500 hertz.
However, fluorescent lamps can operate from a
direct-current source. And with direct current there
is no Bicker, little or no acoustical noise, lamp effi­
ciency equals the efficiency at the higher frequen­ 10
cies and radio-frequency interference is minimized.
D-e operation has not been widely used up to
now because the required resistive ballasts are very
inefficient. However, modern solid state devices Fluorescent lamp is operated di rectly from d-e
permit the design of efficient constant-current s upply without a-c conversion. Transistors Q1,
Q2 and Qa are part of a regu lated constant­
sources. current sou rce that controls lamp cu rrent.
The solid state circuit of a current regulator for
fluorescent lamps, at the right, is designed for a
yacht, but is suitable for other vehicles with a 75- value of the current-sensing resistor. This is neces­
volt d-e source. sary because the triggering levels of the Schmitt
Switching transistor Qa on and off furnishes the circuit are a function of supply voltage. In case of
correct average voltage and hence the current to poor source regulation, compensating circuits may
operate the lamp. The series inductor tends to main­ be introduced.
tain lamp current constant; the diode provides a The efficiency of this circuit is high. Total power
current path when Qa is off. losses in the regulating circuit, including losses in
Q3 is controlled by the Schmitt trigger circuit the inductor, are only 3 watts. For the same lamp
consisting of Q1 and Q::!. When lamp current rises with a typical 60-hz ballast, the loss is 4.5 watts.
above a preset value, the voltage developed across Operation at relatively low d-e voltages is desir­
the series 5.6-ohm resistor turns on Q1 • Immedi­ able because high voltage transistors are expensive.
ately, Q!.! stops conducting and turns off Qa. When The peak emitter-to-collector voltage for Q3 equals
the current falls, Q:1 turns on. With the circuit con­ the supply voltage plus the forward voltage drop
stants in the schematic, the lamp current varies across the diode. This is roughly 77 volts when a
±27% from its average value at a 1-khz rate. 75-volt supply is used. Modification of the circuit
To start the lamp, the push button is depressed, to permit operation with a silicon controlled recti­
closing the circuit through the lamp heaters. This fier would make operation practical at considerably
also shunts the 5.6-ohm resistor, allowing higher higher supply voltages.
currents that are needed to heat the filaments. When For reliable operation over a wide temperature
the switch is released, the voltage surge caused by range and with varying voltages and variable lamp
the series inductor ignites the lamp. The shunt ca­
Lamp ratings
pacitor reduces radio-frequency interference caused
by plasma oscillations in the lamp. Lamp wattage 6 8 14 15 20
A range of supply voltages from 60 to 75 volts Bulb size (in.) o/s o/s 1% 1% 1 V2
can readily be accommodated by changing the Operating voltage 48 57 41 46 59

82
characteristic, the d-e supply voltage should be at horizontally mounted. This is needed to prevent a
least 15% greater than the rated drop across the mercury deficiency at the positive terminal after
lamp. As in the table on page 94, 6-watt to 20- several hours of operation. An enclosed mounting
watt lamps are available with rated drops of 59 will help maintain the required temperature. With
volts and less. A 40-watt T-12 lamp has a rated vertical mounting, the negative terminal should be
106-volt drop. at the top, partly because most of the heat is devel­
With d-e operation the bulb temperature should oped at an anode end, and partly to aid the heavy
be at 40°C or above, particularly if the lamp is mercury-atoms to return toward the anode.

thermistor, will yieJd the absolute value of the tun­

Thermistor measures negative nel diode's resistance at its operating point.
The tunnel diode is supported by two lamina
resistance of tunnel diode springs and paralleled by a disk-type thermistor
in series with a disk capacitor between the springs.
By Dr. A. Ambrozy This keeps the inductance in the loop containing
Rn very small and thus its reactance very low.
Tec h n ical U n iversity, Buda pest
The thermistor is heated by direct current pro­
vided by transistor Qt, with the current level ad­
The negative resistance of a tunnel diode theoreti­ justed with potentiometer R6. A 20-kilohertz, 5-volt
cally could be measured simply and effectively by source, divided by resistors Ra and R.�, provides
the circuit on the right. In this circuit, when the the alternating current which modulates the tunnel
absolute value of the negative resistance of the diode's bias.
diode equals the calibrated potentiometer resis­ The operating point of the tunnel diode is set
tance, there is no current flow. Thus the tunnel on the negative resistance slope of its voltage­
diode's absolute value can be read directly from current characteristic by varying R1• The heating
the potentiometer. However, what is theoretically current of the thermistor is adjusted at the selected
possible and what is practical are two different
things; stray reactance associated with variable
resistor R will cause the circuit to be unstable.
To eliminate the problem, a thermistor is sub­ Theoretical circuit
to measure a tu nnel
stituted for the variable resistor as in the circuit R diode's negative
shown below. The thermistor cancels the negative resistance is unstable
resistance of the tunnel diode and a calibrated because of inherent
potentiometer, whose resistance equals that of the stray reacta nce.

28 V D - C

Stray reactances are eliminated in this

stable method of measuring the diode's
resistance. S2 and R5 provide the shifting of
the working point into characteristic's val ley.

83
operating point until the voltage readout of the valley of the characteristic curve where the tunnel
20-khz selective amplifier is a minimum. This occurs diode resistance, R0 = oo . After closing the switch
when the absolute value of the tunnel diode's nega­ St, the differential bridge is balanced by the cali­
tive resistance equals the thermistor resistance. brated variable resistor R.. Thus, the calibrated
The value of the thermistor's resistance is deter­ potentiometer equals the thermistor resistance
mined by removing the tunnel diode from its which equals the negative resistance of the tunnel
holder or by shifting its operating point to the diode, RDN; thus Rv = Rth = RnN·

MODULATION
Ferrite cyli nder modulates CURRENT

m icrowave sig nals �

By T. Koryu I sh i i a n d Thomas A. K riz* TWO- W I RE

LI N E
Marquette U n iv., Milwaukee, Wis.

A miniature ferrite device utilizes a novel spin

alignment process in the ferrite to modulate a Modu•tor consists of a ferrite cylinder, a two-wire
microwave signal. Although the maximum modu­ transmission line and a modulating current line. The
outside diameter of the ferrite cylinder is 0.050
lation level is only 30% , this is achieved in a inches and the inside diameter is 0.030 inches.
simply constructed device that is physically very
small.
Because low intensity, external magnetic fields '
'
'
are used, the modulator driver can be solid state.
\ VSWR
'
7.0
Tested with a simple two-wire line, the unit may

\/
be incorporated in strip line circuits and conse­
quently has applications in microwave integrated f!? 1 20
_,
0 '
circuits. � 100
_,
'
\ s.o ;
In the simple modulator in the diagram, a fer­ _,
\
rite cylinder surrounds a two-wire line through � 80 '
' '
(I)
>
t­ I
e: so
which a microwave signal is transmitted. The �
'
ferrite is in a remanent state, implying that a mag­ .- ... ,

netic field exists without an applied magnetizing 5 3.0

40
, , ��' ' ��'
,
0
current. In the modulating line, a current propor­ w
t-
�
tional to the desired modulation varies the ferrite's 20
t­
permeability. This amplitude modulates the mi­ w
Q
crowave signal, because the ferrite behaves like an 0
electrically controlled inductive discontinuity. In 7. 2
the experiment, a manganese-magnesium ferrite F R EQUENCY - GIGAHE R TZ

material was employed. Detected output level versus frequency (solid line) was
Analysis shows that modulation results from measured with modulating pulse current of 2 amperes.
H igh voltage standing-wave ratios (broken l ine) partially
interaction of the magnetic fields of both the mi­
reduces output levels.
crowave signal and the modulating current with
the ferrite's electron spins. In a remanent state, the
ferrite is essentially magnetized along the closed When a microwave signal is applied it encoun­
circular path presented by the cylinder. However, ters a large inductive discontinuity at the ferrite.
within the ferrite some magnetic domains are This occurs because the ferrite's relative permea­
oriented to produce components of magnetization bility increases the line � inductance per unit
in other directions. It is the electron spins of these length in the region near the ferrite. A small ca­
domains which interact with the modulating and pacitive discontinuity caused by a similar abrupt
signal fields. change in permittivity also exists in this region.
• Now with A.C. Electronics, division of General Motors But the inductive discontinuity predominates.
Corp., Oaktree, Wis. Applying a modulating current changes the elec-

84
 (f)
tron spin alignment within the domains and also t-
�
the magnitude of the inductive discontinuity. The 0
>
equations that describe the interaction show that �
the magnitude of the inductive discontinuity de­ �
:E
creases when the modulation current, Im, is in a di­ I
rection to drive the ferrite toward saturation. As LIJ
C)
the modulation current drops, the ferrite moves z
<X
away from saturation and the inductive discon­ :I:
u
tinuity increases. LIJ
C)
In one experiment the two-wire line was con­ <X

nected by means of wideband transformers be­ �

0
tween two sections of X-band waveguide. A micro­ > 10
0
wave source fed one waveguide section and the LIJ
t-
other contained a diode detector. The source pro­ u
LIJ 0
duced several milliwatts output at a reasonably t-
LIJ 400 800 �200
constant level over a frequency range from 7.0 to 0
MODU LATION CURRENT - M I L L I AMPERE
7.45 gigahertz.
A 2-amperes pulse of modulation current re­ Detected voltage at constant frequency versus modulating
current amplitude exhibits a nearly l inear relationship.
sulted in a detected voltage curve plotted in the
graph on page 96. At each frequency the pulse
duration was 10 nanoseconds. Because the trans­ this test was 7.19 Ghz and the quiescent reference
former tapers were not smooth, a large voltage level without modulation was 80 millivolts.
standing-wave ratio-also shown in the graph­ The frequency and impulse response data shows
occurred at the low end of the band. A smoother that the usable bandwidth for modulation is about
taper would have corrected this. Actually, trans­ 25 megahertz, the ferrite relaxation time being
formers are unnecessary; one may couple the two­ the major limitation.
wire line system directly to a source and load. The modulation curves demonstrate that the
Radiation levels are surprisingly low because the change in detected output is relatively linear with
microwave signal is propagated along the wire line respect to amplitude of the modulation current.
as a surface wave. If square-law detection is presumed this means
The graph on the right indicates the change in the modulation process is approximately square­
detected d-e voltage as a function of d-e modu­ law. A maximum modulation level of 30% was
lation current, Im. The microwave frequency in achieved with a modulation current of 2 amperes.

integral of the difference between voltage levels

Glass reed switch controls applied at the inputs to the d-e amplifier. \Vhen sl
is closed, the input signal is applied to both inputs
operational amplifier equally and the difference signal is zero; so there
is no change in integrator's output level. When S1
is open, the input signal is applied to only the
By Hays Penfield , plus side of the amplifier and the output is the time­
Harvard College Observatory, Cambridge, Mass. integral of the input. To hold a particular integra­
tion level, switch 81 is closed at that level. By
merely reopening 81, integration can continue.
H igh rel iability, fast switching time and high Opening and closing 81 in synchronism with an
leakage-resistance make the glass reed switch ideal a-c input signal allows synchronous detection and
for controlling an operational amplifier integrator. integration of the signal. The amplifier will
Depending on the portion of the cycle at which integrate only the portion of the input signal that
switch sl is opened or closed, the circuit on page is present while switch sl is open. The circuit is
98 can gate out unwanted signals or maintain used for synchronous detection at the Harvard
the integrated output at a specified level. It can College Observatory.
also operate as a synchronous detector. Maximum An integrator, connected at the output of each
switching speed is about 300 hertz. of 21 filters separates the frequency spectrum of
Switch 82 removes the charge from feedback radio-telescope signals. The integrators switch in
capacitor, C. With 82 open, the output is the time- synchronism with the receiver's input switch that

85
 connects alternately to the antenna and a compari­
son load. Synchronous S\\<Uching speeds are about 4
to 5 hertz. Signals as low as 20 microvolts and inte­
gration times of more than 30 minutes have been
used.
The integration factor is inversely proportional
to the feedback capacitance, C. With S1 open, the
integration factor is 10/C volts per volt-second. s1
If C is 1 microfarad, and a 100-millivolt input signal
D-C OUT
is present for 1 second, the output is 1 volt.
To zero-balance the amplifier, current is supplied
to one of the inputs through a 3 megohm resistor.
Adjusting the 100 kilohm potentiometer establishes

1% 100K
the desired zero balance current. Each reed switch ALL FIXED

10K 10K
requires about 30 milliamperes of driving current RESISTORS

obtained from a 2-volt source.

Almost any d-e amplifier can be used. Circuits
have operated satisfactorily with the type 1507
+ t 5V -15V
manufactured by the Burr-Brown Research Corp.
and the p.A709 manufactured by Fairchild Semi­
conductor, a division of Fairchild Camera and In­ Reed switch S1 controls integration in operational amp­
strument Corp. lifier. Circuit integrates only when St and s. are open.

this circuit is pulsed on when required. It can

Pulsed oscillator be used in applications such as tone generators,
where the output is not needed continuously and
conserves power power must be conserved.
Pulsed oscillators can also calibrate cathode-ray
oscilloscopes. The gate that initiates the sweep also
By R.C. Lavigne and L. l. Kleinberg triggers the oscillator allowing its waveform to be
Goddard Space Flight Center, displayed. If the oscillator's frequency is known,
Greenbelt, Md. the time base can be calibrated.
The circuit, a Wien bridge oscillator, has an
The osci llator circuit shown below needs no stand­ output-frequency range of 100 hertz to 100 kilo­
by power. In contrast to other oscillators that oper­ hertz and no inductors. With no forward biasing
ate continuously and have their outputs gated, networks, both transistors are normally off. When

����-----1-- + 20 V

_n_-!;
T
�------�--� �------��- our
,MT
40V
j_ -
j_
ov

L(\(\-5.1 v
ri _L 6 V j --�
V
...J L 5 ov
T T
OUTPUT
TYPICAL
PULSES
I N PUT
P U LSES

Wien bridge oscillator operates only when a gating pulse is a pplied to the in put. Pulses at input
and output indicate how amplitude of the oscillations varies with the level of the gating pulse.

86
a gating pulse of 5 to 10 volts is applied to the The amplitude of oscillation is determined by
input, both transistors are turned on and oscilla­ the amplitude of the input gating pulse as shown
tion occurs. If R2 = R3 and C2 = Ca, the oscillat­ in the diagram. If the amplitude of oscillation rises
ing frequency is given by

f =
1
21r � c2
exponentially during the gating pulse, potentiometer
Ra can be adjusted to increase feedback.
Values of R1 and C1 are chosen so that the time
constant Rt C 1 is much longer than the period of
When the gating pulse ends, both transistors turn the gating pulse. This prevents pulse droop which
off until the next gating pulse is applied. would result in a decaying amplitude of oscillation.

Am plifier provides
I N 75 1A

101 s.ohm i n put resistance

I N 645
Dt
By A.D. Delag range
U . S. Nava l Ordnance Laboratory, Silver Springs, M d.
OUTPUT
A buffer ampl ifier with an input impedance of 101 5
ohms has been built with a metal oxide semicon­
ductor field effect transistor (MOS FET). The im­
:-1
L01001
pedance value is considered infinite for most cir­ I N PUT
cuits. Amplifier gain is unity to an accuracy of 0. 1%
for a 100-kilohm load.
Designed to drive a 100-kilohm load, the ampli­
fier may be used directly with any system whose
input-current requirement is less than 100 micro­
amperes. For low-impedance loads the circuit
at the right may be used to drive an operational
amplifier in feedback configuration. A typical input
and output impedance of 101 5 ohms and 0. 1 ohm
respectively is possible from the over-all combina­
tion.
Input transistor Q1 is an enhancement-mode in­
sulated-gate field-effect MOS device with an in­
herent input impedance of 1015 ohms. It is con­
nected as a source follower (analogous to an emitter
+ 2 8 V �----_.----�
follower for a conventional transistor). Its load is
transistor Q2. High d-e bias without low imped­ Field effect transistor Q 1 provides t h e circuit with
ance a-c signal loading is provided by transistor 10 15 ohms input impedance. The am plifier drives a 100·
kilohm load and may be used d i rectly with any system
Q2. whose input current is less than 100 microamperes.
Transistor Q3 is an emitter follower also with
a current-source load, Q4, for additional impedance
gain. Zener diode D3 shifts the d-e level of the D4 and D1 are for temperature compensation. The
output by an amount equal to the gate-source drop amplifier contains several internal loops, but gain
across the input transistor. The drain of Q1 is con­ around each is considerably less than unity. There
nected to the emitter follower rather than to the is no tendency for the transistor amplifier circuit
supply voltage. Thus, the drain-source voltage is to oscillate.
independent of the input voltage. With proper adjustment, the output voltage
Since tha voltage gain of the follower circuit is equals the input voltage within ± 10 millivolts over
less than unity, a slight amount of positive feed­ the allowable range of ± 10 volts. The semicon­
back is added through resistor R3 to increase the ductor device in this circuit is new and is the key
gain. Gain is adjusted by potentiometer R2; poten­ element that gives the buffer amplifier its very high
tiometer R1 adjusts the d-e zero value. Diodes D2, input impedance.

87
C i rcu it des i g n

Designer's casebook
range. When one of the capacitors is connected by
Sawtooth generator the range switch to the emitter of Q2, the capacitor
charges quickly. When C3 charges, the collector
d rives cathode-ray tube current of Q2 decreases, the current through R2
causes Q1 to conduct and the voltage drop across
Rt makes Q2 cut off. Capacitor C3 now is dis­
By C.C. Hoo charged by R8 and R9 to the potential of Cs. \Vhen
Paratronix l nstrumentos Electronicos, Sao Pau lo, Brazil C3 is discharged, C2 again conducts and the cycle
repeats.
During the time that Q2 is conducting, C" is
A transistorized sawtooth generator with an os­ charged through Q3 and the conducting diode Dt.
cillating frequency range of 6 hertz to 450 khz When the sweep begins, the base and emitter of
(divided into five ranges), good linearity and con­ Q3 become less negative. Since c� is large enough
stant amplitude is shown below. The unit is used to remain almost fully charged over the complete
to drive a cathode-ray tube when a portable oscillo­ sweep cycle, the voltage across RR and RB is prac­
scope of light weight and low power consumption tically constant. Hence, the current through these
is desired. Transistors Q1 and Q2 form the sawtooth elements is constant and the sweep voltage pro­
oscillator; Q3 is in a bootstrap circuit used to in­ duced is linear.
crease linearity. Resistor R4 is a semivariable potentiometer
-9 v
(-3.6 mo)
R, R2
8. 2 k 220 k

F REQUENCY T U N I N G

Rs
I k
O U T P UT

1 1 1 1 1 � 9v
( - 3.6 mo )
--------.--+--�����-.--�---+-- o v
Portable-scope driver is composed of transistors Q1, Q�� and Qa. The first two form a sawtooth oscillator, the latter
is in a bootstrap circuit. The design provides constant amplitude over the frequency range of 6 hz to 450 khz.

A trigger voltage of 0.5 to 5 volts root mean provided to adjust linearity. Too small a value
square is applied to the base of transistor Q1 and causes poor linearity; too large a value stops the
synchronizes the oscillation to the input waveshape. oscillation. Resistor R4 also influences amplitude
When the circuit is connected to its power source, and frequency range. The best point is achieved
the current through resistors Rt and R4 causes Q2 when good linearity is obtained on both the highest
to conduct. Capacitor Ct and C2 are charged by and lowest frequencies. This point is not critical.
the current through R7• Resistor R1 should be Resistor R5 is used to eliminate parasitic oscilla­
small so that the charging time is short compared tion at the highest frequency range. Resistors Rs
to the sweep duration. The voltage division be­ and R6 stabilize the transistors.
tween R1 and capacitors Ct and C2 drives the The following results were obtained: Nonlin­
base of Q1 positive. When the base of Q1 goes posi­ earity: less than 1% trom 20 hz to 200 khz, less
tive, the transistor cuts off completely. than 15% from 6 hz to 450 khz; output voltage:
Capacitors C3 through C7 select the frequency 3 volts peak to peak; triggering voltage: 0.5 to 5

88
volts sinusoidal; triggering range: ± 10% at 2 for C6 == 6800 pf and 50 to 450 khz for C1 == 560 pf.
volts or above; free running frequency: 6 to 48 The transistors used were the germanium-alloy
hz for Ca == 8 p.f, 47 to 630 hz for C4 == 0.68 p.f, diffused type (AF117) with hFE == 150 and f1 =
470 hz to 5.9 khz for c5 == 0.068 p.f, 4.7 to 59 khz 75 Mhz.

• If V s becomes greater than normal, D1 remains

Interlock protects in the avalanche (breakdown) state. Da also breaks
down, causing current to flow into inverter 2. The
display tube current that was flowing into the base of Q1 is
shunted through Q2 to ground. Relay K1 becomes
de-energized, causing the interlock contacts to
By Ka rl E. Spri nger open.
• If the filament feed lines are opened, there is
H ughes Ai rcraft Co. , Culver City, Calif. no voltage drop across R1. Circuit action is then
similar to that in the first fault described.
• If the filament feed lines are shorted, the volt­
Cathode-ray tubes, like most tubes should not have
age drop across R1 is greater than the breakdown
high voltage applied to the anodes without filament
of D2• Current flows into the input of inverter 2.
excitation. The interlock circuit in the diagram mini­
Circuit action is then similar to that in the second
mizes the possibility. This circuit provides protec­
fault. The interlocking circuit can accommodate a
tion against filament power-supply failure or under­
wide range of filament voltages and currents if
voltage, overvoltage and open and shorted filament
the following relationships governing the critical
feed lines.
parameter selections are used:
Under normal conditions the voltage drop across
R1 is greater than the breakdown voltage of D1 but (1)
R1 -
_ v., - v f
less than that of D2 . The supply voltage, V�<, is
If
V01 � V., - V f - 1
also less than the breakdown voltage of Da. Current
only flows into inverter 1 through D1, drawing Q1's (2)
collector voltage down and energizing K�, thus VD2 � Vs - V f + l (3 )
closing the high voltage interlock contacts. Vo2 < Vs (4 )
Four possible system faults activate the circuit V 03 � Vs + 1 (5)
as follows : \Vhere V8 is the supply voltage, V r is the filament
voltage, and VDu V 02 , and V o3 are zener diode
• If the filament supply voltage, Vs, falls below

its normal value, the voltage drop across R1 is not

sufficient to break down D1. With no input current voltages.
to converter 1, relay K1 is de-energized, and the Selection of zener voltages to fulfill the condi­
interlock contacts open. tions of equality of equations 1 through 5, yields

H I GH
+ Vs ------1--.--�

l��3
VOLTAGE
t2 y l +.___
_

amps I NTE R LOCK

1
I
03 I
t N 9648
Kt
v, SIGMA
,___ __, _j_
3
6, V
Dt
1 N 750A
22 R J C C
2 500G - SIL

Interlock circuit protects cathode-ray tube against four possible system faults.

89
 the narrowest margin of under-over voltage control, to the circuit's protective features. Line losses may
but requires greater precision in other circuit com­ be compensated for by reducing the resistance R1
ponents. from its original calculated value. Further reduction
There are other inherent advantages in addition of R1 brightens the crt display.

a shunt resistor, Rs. At the same time resistor R,

M u lti range d-e voltmeter which is approximately equal to the meter's in­
ternal resistance, is connected in the metering
circuit. This combination of resistors increases the
By Richa rd Tra i na
meter range to 500 microamperes and measures the
Ai rborne Accessories Corp. , H i l lside, N.J. drain current.
\Vith the input set at the low limit of the voltage
to be measured, the drain current of the FET is set
Full-scale meter deflection of 1.0 volt is obtained at 350 microamperes (approximately the point of
independently of the input voltage with the circuit zero temperature coefficient of the FET used)
shown below. The 1-volt range may be positioned with the suppression-adjust potentiometer. This
anywhere between 0 and 7 v d-e. For example, the action sets the bias of the FET. The increased bias
meter may be set to read 1 to 2 , 4 to 5 , 3.5 to 4.5 , voltage returns the bridge essentially to a zero
and so on. input condition regardless of the applied input
A varying electric field applied across a field voltage.
effect transistor produces the very high input The rotary switch is moved to position 2. The
impedance, essential for optimum operation in a meter now replaces resistor R and R:! is short
voltmeter. The higher a meter's input impedance circuited. The zero-adjust potentiometer zeros the
the less the meter affects a measured circuit. \Vith meter.
this circuit a voltmeter with an input impedance The input voltage is now raised 1 v d-e above
(sensitivity) of 1.0 megohm per volt is obtained the low limit and the calibration-adjust potenti­
for all scales. ometer gives full-scale deflection on the meter.
With the rotary switch in position 1 the 100- The meter reads 1 volt full scale with an accuracy
microampere meter is connected in parallel with of ± 2 % and good stability.

-9 --------.---�---�

5.1 k
R

5k
ZERO
ADJUST

..
I N PU T

1M

tO k
S U P P R E S SION
A D J UST

10 k 5.1 k 1 .0 k

+ -------_.---��--�

An FET circuit cou pled

with a 1 00-microampere meter move ment makes a d-e voltmeter with a 1 -volt full-scale
range. Range can be set between 0 and 7 volts. Accuracy of the voltmeter is ± 2%.

90
 pacitor C3 is charged by the clock and provides a
Fail-safe freq uency divider negative voltage that keeps Q3 biased on. Resistor
Ra limits the base current supplied to Qa. Compo­
By A. L. Plevy and E. N. Monacchio nents R3 and C3 are selected to offer ripple to the
base of Q3 at the clock frequency. This ripple is
Consulting Engineers amplified and fed to the multivibrator through Q3
and serves to lock the multivibrator to the clock.
Frequency division by as much as 60 to 1 is pos­ If the clock fails, Ca discharges and Qa is turned
sible when the emitters of the astable multivibra­ off, providing a high impedance path to ground.
tor, formed by transistors Q1 and Q2, are tied to the As a result, the multivibrator stops oscillating. The
collector of Q3 instead of being returned to ground circuit runs at 10 kilohertz when Q3 is on, and is
as in a conventional circuit. The frequency-divider easily synchronized to a 92-volt sinusoidal or
formed stops oscillating if the clock fails and is square-wave clock over a frequency range of 10 to
locked when the clock is running. 600 khz. Photographs below show locked Lissajous
Normally, the multivibrator operates at the de· patterns that indicate a 10-to-1 and 60-to-1 fre­
sired output frequency with a repetition rate, tr, quency division. To obtain these patterns the output
expressed as: of the multi, which is a good square wave, was pur­
tr == l/ 2(0.7)R1Cl � 1/2(0.7)R2Ca. posely distorted by uncompensating the scope
A half-wave rectifier made up of components probe. The waveshape used for the patterns appears
D b Ra and Ca is connected to the base of Q3• Ca- at the right.

r---+--- OU T P U T

Rt
68 k

Up to 60 frequency divisions are possible from the astable multivibrator connected to the
half-wave rectifier. The emitters of Q1 and Q. are not returned directly to ground, as
in the conventional astable mu ltivibrator. I nstead, they are connected to the collector of
Oa. When Oa is biased on, it provides a ground return path for the multivibrator.

Locked Ussajous patterns indicate a 10-to·l and a 60-to·l frequency division (left and center). To obtain these Lissa·
jous patterns the square-wave output of the multivibrator was distorted purposely by u ncompensating the probe of
the oscil loscope. The waveshape for the Lissajous patterns is shown at right; it was measu red at 100 kilohertz with a
vertical scale of 2 volts per centimeter and a horizontal of 0. 1 microsecond per centimeter.

91
 Circuit d esign

Designer's casebook

FET's produce
stable oscillators 300

N
.c
2
By Tom F. Prosser
!:
M icroelectronics Division, Philco Corp., >­
u
Santa Clara, Calif. z
&A.I
5 250
&A.I
0::
&A.
Oscillators that are inexpensive but stable can be 0::
made with field effect transistors. The oscillators �
..J
can be tuned to frequencies ranging from subaudio
�
..J
to near gigahertz and, with modifications, can
0
sweep through a wide frequency range. 200
An example of the manually tuned type of r-f
oscillator is shown in the circuit below. The cir­
cuit features load leveling for constant output volt­
age. Basically, it is a Colpitts oscillator.
The drain-source voltage of one FET, Q1, is 0 1 2 3 4 5 6 7 8 9 tO 1t 12 13 14

limited by the variable resistance of a second, Q2. INPUT BIAS I N VOLTS

Consequently, the oscillator's output voltage is lim­

ited. Oscillations occur when the drain-source volt­ Frequency control characteristics of the sweep
age of Q1 is as low as 6 volts. Transistor Q1, made oscillator i ndicate that the oscillator can sweep over
more than 100 Mhz in a nonlinear manner, or over
by Amelco Semiconductor, a division of Teledyne, a narrow range in a linear manner. The equation
Inc., has high mutual conductance (gm = 5,000 mi- indicates the angular frequency of oscillation.

0.01
Vcc =+20V -.-.o�..---1 �

O.OI
I

Ct
0.001

0.001

NOT E :
All CAPACITANCES ARE IN MICROFARADS
UNLESS INDICATED.

Load leveling is achieved in the oscillator when one FET, Q•• acts as a variable resistance.
Despite load variations, Q1's drain-source voltage remains fixed.

92
 Vee
+ 20 V
tOK

0.01 ::r:
O.OOt

SYNC
INPUT

1r
lOOK

NOTE ;
ALL CAPACITANCES ARE IN MICROFARADS
UNLESS I N D I CATE D.

TransistorQa's triangular shaped output sweeps Varicap tu ning capacitors D2 and Da

and the oscil lator frequency via the buffer ampl ifier, Q4. Lo ad leveling is accomplished by Q1 and Q,.

cromhos and generates low self-noise, under 4 output curve of unijunction transistor Q3 is tri­
microvolts. angularly shaped. This output voltage buffered by
The circuit produces an unloaded output voltage amplifier Q4 changes the capacitance of the Vari­
of up to 15 volts peak to peak in the 300- to 400- caps and hence the oscillator frequency. Resistor
megahertz region. A portion of this voltage is cou­ R2 sets the sweep deviation by controlling the am­
pled through the transformer, rectified by diode D1 plitude of the voltage applied to the Varicaps. De­
and filtered by R1 and C1 • The setting of resistor R1 pending upon the setting of R2, the oscillator can
controls the operating point of FET Q2 and hence sweep a wide range nonlinearly or a narrow range
the output amplitude. R1 is set for a full-load linearly. C2 and C3 refer to the capacitances of D2
oscillator output of 10 volts peak to peak. and D3 in the formula on the graph.
A sweep-frequency version of the load-leveling As in the fixed-frequency oscillator, transistors
oscillator is shown above. Components D2 and D3 Q1 and Q2 respond to output load change with fast
are voltage-variable capacitances covering a fre­ leveling action while supplying high output voltages
quency range from 200 to 300 Mhz. The voltage with low harmonic distortion.

nected directly to the output of a transistorized

Switching ampl ifier converts logic circuit.
u n i polar to bipolar pulses When the input of the converter circuit is at
zero potential, transistor Q1 becomes forward
biased and conducts heavily. Under this condition
By W. O. Waddle Q1 furnishes a low resistance path for the cur­
Texas G a s Transmission Corp., Owensboro, Ky. rent from supply voltage E1 through part of resistor
R to the load R�.. Thus, a positive voltage Eo is
dropped across R�..
Conversion of positive pulses to positive and nega­ Variable resistor R (a low value resistor, about
tive pulses is accomplished with the circuit on page 10% of Rc) is set to the limit of the positive pulse
104 in both transistor logic circuits and interface swing. During the rise of the input pulse, diode
amplifiers. D1 blocks current. Thus, resistor R becomes part
Such unipolar-bipolar converters are often used of a voltage divider on the positive output voltage
in business machines and data transmission sets. To swing. The application of a positive voltage (ap­
achieve the conversion the input circuit is con- proximately equal to E1) to the input of Q1 causes

93
 Ecc
-25 v

02
1 N 1 98

+ Eo +G v

8v
�
nrr�-!-·
+V + E our

+ E, -Eo
+Bv
O
0 I 2 3 2 3

During the positive pa rt of the in put waveform, Q1 conducts and produces a positive output
voltage, Eo. When the i n put voltage reaches the value E1r transistor Q1 becomes
reverse-biased, stops conducting and causes a negative output storage, - Eo.

the transistor to be reverse-biased and subse­ age swing. Bias supply E2 and diode 02 limit
quently cut off. the signal when the output swing is negative.
Now that transistor Q1 is not conducting, there Typical operating values are as shown. The
is a high-resistance path for current from E1 to characteristics of diodes 01 and 02 are selected
R�.. Supply voltage E('(' is then free to provide according to the switching rate required and the
current through resistor Rc, diode 01 and load current through the diode on the negative output
resistor R�, to develop a negative voltage across pulse. A transistorized buffer amplifier added
R�. approximately equal to voltage supply E2• at the input is a simple method of accomplishing
Diode Dt passes current on the negative pulse the switching action. Resistor Rc is found on the
and bypasses resistor R on the negative output volt- basis of Eo, required on the negative output swing.

Detector stores pea ks

of video bursts
2-Mhr
250 n sec
By David S. G reenstei n BURST
ONE - SHOT
Honeywell, I nc . , Boston

The peak detector shown senses the highest peak

of an amplitude-modulated 2-megahertz burst to
within 5 millivolts. Peak values from 5 millivolts ...___.. COMPARATOR
to 1 volt are stored for approximately 100 micro­
seconds and each time the peak exceeds the stored Comparator senses when the amplitude of the 2-Mhz
signal becomes 5 millivolts or more
value a pulse is produced. This detection is use­
than the voltage stored on capacitor C.
ful where position information about a video
signal is required. Burst detectors are found
in radar, sonar and video and are used for sam­
pling time delay signals. 2-Mhz signal when it exceeds the voltage stored
Conventional diode detectors cannot achieve on capacitor C by 5 millivolts [see block diagram].
such accuracy or range because diode junctions On sensing the amplitude, the comparator trig­
are sensitive to temperature changes and require gers the 250-nanosecond one-shot multivibrator,
large turn-on voltages. Furthermore, conventional producing an output pulse. This pulse, coupled
detectors don't usually furnish a signal when with one from the synchronized pulse generator,
the storage is updated. turns on the field effect gate circuit, raising the
The comparator detects the amplitude of the voltage stored on the capacitor to a new value.

94
 +9v -t2v + 4. 5 v A M PL I F I E R A N D
FI ELD E FF ECT STORAGE

+9v

2 -Mhz f 5 0 - n sec
B U R ST -�� D E L AY L I N E
I M PU LS E

- 4. 5 v

- 4.5 v - 12v - 4. 5 v

+ 4. 5 v +9v - 4. 5 v

CO M PA R ATOR

+ 4. 5 v

Rs
51 k
+9v - 4. 5 v - 4. 5 v

S C H M I TT T R I G G ER ._,______..,.

The peak i s stored for 1 00 microseconds by capacitor Ct. To assure storage for this period
the capacitor must discharge with a time constant of at least 20 milliseconds.

A 125-nanosecond pulse from the synchronized field effect gate driving pulse is provided by the
pulse generator ensures that the gate is turned off !50-nanosecond delay line, caused by propaga­
after 90° of the 2-Mhz sinusoidal waveform. It is tion delays and the fact that the comparator trig­
essential that the field effect gate be turned off or gers a one-shot at some time during the first 90°
the capacitor will discharge. of the 2-Mhz signal.
The synchronized pulse generator is not neces­ Over-all gain for the amplifier and field effect
sary if the 2-Mhz maximums are Batter than those storage section shown schematically must be 1
of a sine wave or if the input frequency is much because the output of this circuit is the stored
below 2 Mhz. Compensation for the delay in the voltage that is compared with the 2-Mhz input;

95
 capacitor C1 is the storage capacitor. To store a and high gain-bandwidth product of 400 Mhz. The
voltage for 100 microseconds within 0.5%, the on resistance must be low because the low-pass
capacitor must discharge with a time constant network made up of the on resistance of Q1 and
of at least 20 milliseconds. Resistor R1 in parallel capacitor C1 must pass the 2-Mhz signal frequency.
with cl provides the required time constant. The comparator is a three-stage, direct-coupled
Field effect transistors Q1 and Q2 have a neg­ differential amplifier with a gain of approximately
ligible effect on the time constant because of their 800 in the frequency range of 25 khz to 9 Mhz.
high impedance. Because of the finite gate-source Low-frequency feedback is provided by R� and
capacitance, the turn-on pulse at the gate of Q1 R6 to produce low d-e gain. The comparator drives
feeds through to the storage capacitor and appears a Schmitt trigger that fires a 250-nanosecond one­
as a negative step with an amplitude of approxi­ shot. Improvements in the performance are pos­
mately 1 volt. This step is constant for all signal sible since the sensitivity is largely a function of the
levels. Compensation for the step is accomplished gain and stability of the comparator.
by adjusting the d-e level with potentiometer R2• To eliminate unwanted oscillations, the com­
Gain is adjusted with potentiometer R3• Pontenti­ ponents are assembled on a sheet of brass. Tran­
ometer Rt zero-adjusts the source follower. sistor sockets are not used and the cases of Qs, Q4,
N-channel field effect transistors, CM603, manu­ Q5 and Q6 are mounted upside down in individual
factured by Crystalonics, Inc., are used because heat sinks bolted to the brass plate for positive
of their low "on" resistance of 35 ohms maximum grounding and isolation.

Circuit sa m ples a signal,

holds it u p to 1 m i n ute
I N PU T
SI GNAL
TO BE
By Robert S. Cu i kay SAMPLED

Northeastern U n iversity, Boston

e, --fo--4:-f

Where pu lse information is required, as in data

systems, the circuit shown is used to sample sig­
nals and store them for up to 1 minute. These sig­
nals vary less than 5%. The circuit has a high cur­
rent transfer ratio and operates from -55° to
+85°C with low power consumption.
The signal to be sampled is applied to the base
of transistor Q1• Forward biasing the base-to­
JL v2---J .-.--�H
I N PUT
emitter junction of Q3 with a positive voltage, V2, GATE
saturates Q3• Transistor Q3 must be saturated dur­ SIGNAL

ing a specified sampling time, set by the input gate

signal. Thus the collector of Q3 saturates from a
positive voltage of V 1 to approximately the emitter
voltage of Q3 and provides a current return path
for the previously inhibited transistors Q1 and Q2.
The sampled signal is then transferred to the stor­ Sampling and holding an
age capacitor cl through a signal path indicated by:
i nput signal u p to 1 minute
is possible with this high energy circu it. The circuit
operates well over a temperature range of
V8 = es - V B El - VDl + VD2 + VD3 +85° to -55° C.

where
emitter-to-base protection diode
Va = sampled input signal voltage
V02 = forward junction voltage drop of isolation
e. = input signal
diode
V B Et = base-to-emitter voltage j unction drop of V oa = forward junction voltage drop of compen-·
transistor Q1 sation diode.
Vm = forward junction voltage drop of the To make the sampled signal equal to the input

96
signal (Vs == es), VnEb VDl, Vn2 and Vns must total tion of transistor Q2 ; the reverse leakage of the
zero. Although the junction drops of V BEb V n1 and isolation diode and the capacitor leakage. It can
Vn2 may not be properly matched, the adjustment then be read out as Vs.
of Vns by a potentiometer across diode Ds will allow The circuit has several features:
for compensation of any voltage-junction drop dif­ • The sampled signal transfer rate from circuit

ferences. input to the holding capacitors is equal to the

When the sampling gate time ends, the voltage square of the current transfer ratio (hFE2 ) of tran­
on the base of Q3 equals the emitter's voltage. The sistors Q1 and Q2 . If a beta of 100 is given, the sig­
equalization cuts off Q3 and allows the collector nal transfer ratio approaches 10,000. So high-beta
node to rise to a positive voltage level of V 1· The transistors are not required.
voltage V1 reverse biases the protection diode D1 • The input impedance of the circuit is given as

and the isolation diode D2, stopping the sampling hFE2 Rtu in parallel with Rs. Numerical values of
of the input signal. Rs and Rtn under typical circuit conditions are 107
Thus transistors Q1 and Q2 are cut off. Now, the and 8 X 107 ohms respectively. These resistor
only discharge or leakage paths for the sampled values yield an input impedance of approximately
and stored input signal voltage on capacitor c1 8.8 X 106 ohms.
are: the load impedance in parallel with the storage • The driving impedance to the storage capacitor

capacitor; the reverse biased base-to-emitter june- and equivalent loads is less than 900 ohms.

In the circuit, output voltage V0 is rectified by

FET sta bi lizes a mplitude D1 and filtered by R3C1. Potentiometer R2 sets
the gate-source voltage, VGs, which in turn estab­
of Wien bridge osci l lator lished the output amplitude.
Oscillations occur when
Vo'
Vns where Vo' (Vo ) .
By Joseph J. Pa n ico R6
= -3- , =
Technology Division , GCA Corp., R4 + R6
Bedford, Mass.
the frequency of oscillation w == 1/RC.
The circuit provides distortionless output over a
When the drain-source voltage, Vn s , of a field frequency range of d-e to 100 kilohertz if the tran­
effect transistor approaches zero, the FET behaves sistor's Vr>s does not exceed several hundred milli­
very much like a linear variable resistance, and volts. The drain-source resistance, Rns, becomes
remains nearly linear at higher voltages below nonlinear at greater voltages than this. However,
pinch-off. This characteristic makes FET' s useful by adding a resistor in series with the FET drain,
as a stabilizing element in oscillator circuits like larger amplitudes can be obtained, with low dis­
the Wien bridge oscillator below. tortion and very little sacrifice in control.

PH I LBROOK OPERATIONAL
A M P L I F I E R ' PP65A I O R
Rt
EQU I VA L E N T
5K

c
0.018

R4

vo
R5

1
- 1 5V V I

I _1_
FET -P CHANNEL
2 N 2608 ":"'

Vos

_j_
R3 Dt

R2
1 Ct
56K f 0 3 309
R
=
c
20 K
0.01 T 200 K
AM PL ITUDE
0.2

VGS TRIM

':" _L ':"' ':"'

Oscillator output Yo, will be distortiontess if it exceeds 10 volts, provided Vo/Vo' is greater than 10 to 1 .

97
Ci rcu it desig n

Designer's casebook

This produces a stable voltage, Vz. The desired

IC amplifier provides reference voltage Eo is obtained in accordance with
varia ble reference voltage the relationship
E n == - VzRt / R!!
Resistor R1 is adjustable so that voltage Eo can be
By Joh n Althouse brought to exactly the desired reference voltage re­
gardless of variations in breakdown voltages among
Escondido, Calif. individual diodes of type D1.

A precisely adjustable reference voltage covering - 20 v

a range from -5 to +5 volts is derived from the
integrated-circuit operational amplifier shown. With
a resistor divider it translates a zener reference to

1
a desired voltage. The circuit is valuable where
the required voltage reference must be low (in one
application, two volts power a thermistor bridge
circuit). Vz

1
Other advantages exist: a zener diode of moderate
tolerance--and consequently of lower cost-can be
used; the diode current will not change with the
load, improving the stability of the reference volt­ :r: 0.0022,u.f
age; and the zener voltage can be selected for the
best diode characteristics rather than for required
reference voltages. Operational amplifier network a nd resistor R1 and Ra
reduce the zener breakdown voltage to a des i red
Resistor R was selected to provide the manu­ reference whi le isolating the zener voltage from output
facturer's recommended current through zener D1. load. Reference voltage is adjusted with R1.

Red ucing tra nsients

---�-----,
R2
in switched i nd uctive loads 22 k
I

* I I

�!- --G!2
By John L. Haynes ,,5 a -c
VOLTAGE sc•,
Endevco Laboratories, Mou nta in View, Calif. C106A 1 SCR2
4.7k 1 C106B
I
I I
Alternating-current circuits connected to electro­
mechanical apparatus are protected from transients
with the aid of a silicon controlled rectifier. An When the solid-line portion of the circu it is used, a-c
turnoff transients are eliminated. Adding the dotted
unsuppressed relay, solenoid or motor winding can portion of the circuit eliminates turn-on tra n sients.
generate kilovolt spikes with rise times in the nano­
second range. The circuit shown, with the solid
lines and switch S closed, eliminates turn-off other equipment operating from a 115 volt, a-c
transients in the a-c load, so there is no radio­ supply.
frequency interference, radiated or conducted. When the a-c current flows in the load it is
The circuit could be used in paper-tape punches, full-wave rectified by the diode bridge and flows
paper-tape readers, typewriters, motor drive for a through SCR1 • YVhen the contact closes, SCR1 con­
tape transport, servo motors, plotting tables and ducts until the current in the load goes to zero.

98
Then SCRt turns off, so it doesn't interrupt the can drive the core into saturation, causing a large
normal current. The circuit will work equally welJ one-cycle surge current.
with any power factor load, since turnoff is deter­ To eliminate turn-on transients the circuit is
mined by zero crossings of the load current, not modified by opening switch S and including the
by zero crossings of the a-c line voltage. dotted component leads. This modification offers
Turn-on transients can also be a problem, be­ a 2-to-1 margin for core saturation to eliminate
cause of two primary factors : the turn-on surge. \Vhen the contact is open, SCR1
• If the line voltage is at or near peak when is on and SCR2 is off. The load sees only the high
SCR1 is turned on, a relatively large change in impedance of R1 and R2; the voltage across SCR2
voltage with respect to time ( dv I dt) results in is essentially the a-c line voltage.
both the load and SCR. When the contact closes it shunts the gate drive
• If the load is switched off at or near the peak of SCR1 • So, SCR1 turns off when the line voltage
line voltage of either polarity, the iron core of the goes to zero. Turnoff occurs as before. \Vhen the
contact coil can be left magnetized near saturation contact opens, SCR1 immediately turns on, shunt­
at one end of the hysteresis loop. Turning the unit ing the gate drive for SCR2, which in turn shuts
back on at the opposite peak of the line voltage off at the next zero crossing of the load current.

Vs
Logarithmic a m plifier R3 20V AT 10 mo
4.7 K

has 66-d b range

R2
10K
By Jean F. Del pech
I n stitute d' Eiectronique, Orsay, France Vo

, ,., ,
Two diodes driven by a current generator form a V i --I
low-cost logarithmic amplifier. The silicon planar o, 02
diodes, D1 and D2 (type 11\'914), are selected be­ R1
cause th ey follow a nearly ideal logarithmic char­ 4.7 K

acteristic over more than a 60-decibel range. Se­

lected samples can cover an 80-db range.
Because the diodes are current driven, the output Logarithmic amplifier uses two planar diodes and th ree
impedance of their driver amplifier, Q�, must be epoxy enca psulated silicon transistors. Diodes are
very high so that load changes are not affected by cu rrent driven; Darli ngton circu it, Q2 a nd Qa, gives
the impedance of Q 1 • To accomplish this, the im­
necessary h igh output impedance that exceeds 1 00 k.

pedance must exceed 100,000 ohms to cover a 60-db

signal voltage range. Since the maximum current
through each diode could be as high as 10 milli­
amperes, a line voltage of 1 kilovolt is needed to
ac·hieve the high output impedance. This, of course,
is impractical.
To overcome this high impedance requirement, z

a feedback circuit combining a line voltage of 20

>-
100 mV
volts, an output impedance of 100 kilohms and peak
output current of 10 milliamperes is incorporated
in the circuit.
Resistors R1, R2, Ra and R5 bias driver, Q1. so 10 mV
that its quiescent collector current reaches 10 milli­
amperes. To provide the required bias and at the
same time a high value of a-c output impedance,
1 mv �-------�---�����--�
a variation of the bootstrap circuit is used. The 400mV 600 mV BOOmV 1V
variation consists of loading the coJlector of Q1 Vour
with the combination of R,, and a Darlington pair,
Q2 and Q.1 · If Q1 remains in its linear operating
Experimental data indicates wide range over
which the amplifier's output voltage is nearly
region, its a-c collector current, i, will be inde- an ideal loga rithmic fu nction of its i n put voltage.

99
pendent of collector load.
Since the input current of Q:l is negligible, i Low-freq uency oscillator
flows through RG, producing a voltage drop v == iR6•
But the voltage gain of the Darlington amplifier is
suppl ies high pulse power
1 - £ where £ is a value < < 1 and the voltage drop
v between the collector of Q1 and the line is almost By S. l . Gaytan
equivalent to the voltage drop v ' == v/ £. This cor­
responds to an equivalent a-c collector Joad im­ Phelps Dodge Corp. , Douglas, Ariz.
pedance R6' == - R6/ £. If 1 / £:::::: 500, then an ap­
parent value of Rr.' == 2.50 kilohms; an actual Rn ==
470 ohms. This load is in parallel with the output A low-frequency oscillator and a bridge inverter­
impedance of amplifier Q1 and supplies output formed with a silicon controlled rectifier-can gen­
impedances higher than 100 kilohms with almost erate high-power square waves at frequencies up
any silicon planar transistor. Small epoxy encapsu­ to 100 hertz. In mining geophysics, the combination
lated silicon transistors are actuallv used. measures earth conductivity that varies with water
This amplifier was designed f� r analog multi­ content, inherent conductivities of various rock
plication at 1 khz over a 3-decade signal range. formations and the concentration of metallic ores

1j
U TC
+24 V A22
T2
U TC
A 22

tO K

22K

SCR4
2N692

'----....-
... - w '-----4�- z
02
FROM T1
01
FROM T
I N 367f 2 1 N3671
._---+-- W ..-----4111--- z

FROM CONSTANT
3 CURRENT SUPPLY
BOO VOLT S ,
2.5 AMP E R E S

04
03
1 N 3671 I N 3671

'------4111- v '------..,_- X
FROM T2 FROM T
1
y X

High-power pulse generator uses a bridge inverter to provide a bipolar square wave a nd eliminates need for center·
tapped current supply. Connections to the scr's (bottom half of drawing) come from the transformers (top half).

100
and dissolved minerals in ground water. Reliable sisting of Q::� and Q4• The multivibrator's pulsed
and effective operation follows when the source output is coupled through transformers T1 and T:!
provides constant current over a predetermined to the gate of the four scr' s. This quartet is ar­
variation in load resistance. ranged in a bridge circuit that controls the power
For geophysical applications only low frequency across load terminals, A and B.
square waves of 0. 1 to 4 hz are usually required. "'hen the voltage from transformer T1 fires SCR1
However, by proper choice of timing capacitors the and SCR�, the load current flows from left to right
circuit may be used to 100 hz. Above this frequency across terminals A and B. Autotransformer action
circuit losses become severe. in the center-tapped coil, Lt , charges capacitor
The low-frequency relaxation oscillator consists at AB to approximately twice the supply voltage.
of transistor Q1 and unijunction transistor Q:!. The 'Vhen the voltage from transformer T2 fires SCR:!
time constant RTCT determines oscillator fre­ and SCR_., the capacitor across AB charges in the
quency. Switch S 1 and potentiometer R1 in com­ reverse direction through these two scr' s.
bination with resistor R2 allow the time constant During the process of reversing the charge, SCH1
to be varied by a factor of 40 to 1. Transistor Q1 , and SCR::� are back-biased and turned off. 'Vhile
which has a very low collector leakage current, sup­ SCR:! and SCR4 conduct, current flows through
plies constant current to charge capacitor CT. the load in the opposite direction.
Pulses generated at the base of Q:! synchronize Power supply capabilities rather than the scr
the free-running, emitter-coupled multivibrator con- circuit limit power levels.

in the output once the balance control is adjusted

Cross-coupled transistors to nul1 the carrier.
The circuit was found to function best when
form balanced mixer driven from a low impedance source of approxi­
mately 50 ohms. Signals were applied for mixing
By Leona rd E. Geisler through a 50- to 500-kilohertz bandpass fil ter. A
!-megahertz carrier was obtained from a crvsta1-
Radio Astronomy Laboratory, contr�lled oscillator using a capacitive volta ge di­
U n iversity of M ichiga n , Ann Arbor vider. The ratio of crystal oscillator amplitude to
signal amplitude was 10 to 1. The 1-Mhz oscillator
A mixer circuit with two transistors offers advan­ bad an amplitude of 600 millivolts. Signals were
tages over the conventional diode quad: the costly amplified to produce 60 mv at the mixer input.
transformer required with the diode quad is elimi­ Bt'cause of the inherent wide bandwidth of the
nated and the cross-con led trans::;tGr mixrr t'X ­ mixer input, the input circuits and the crystal
hibits some conversion gain; the quad i s inherently oscillator must be shielded. This prevents external
lossy. mixing of the signals before they are app1ied to
The collectors of the two trans:stors (2�\ 1303) tlv.:• balanced mixer. The output of the mixer is
are wired together to share the output load and approximately 600 ohms.
their bases and emitters are cross-conn;:cted. Thus
a positive-going carrier wave turns on one tran­
- to v
sistor while the other is ker t in the off position.
L OUTPUT
This produces a positive pulse across the common
collectm· load. f C I RC U IT
"'hen the phase of the carrier wave is reversed,
the two transistors switch conditions, again pro­
ducing a positive pulse across the common load. 50 -TO 500-kh z
In effect frequency-doubler action is achieved with­ BANDPASS

{- CRYSTAL
F I LTER 0.1 1Jf O.l pf
1 -M h z
out a phase-shifting transformer. When a signal
ESIG �
._rooa...___.
is applied to the input terminal at the right a fre­ OSCI L L ATOR
quency-doubled output also results. � 330 330

The result is a mixture of frequencies dependent

on the ratio of signal levels. The mixed signals that
appear across the output load are the upper and
lower sidebands of the two input signals-tht> even Cross-coupled tra n sistors perform as balanced mixers
order harmonics of the input and the carrier. Ko without expensive transformers. Configu ration cancels
component at the fundamental frequency appears fundamental frequency and produces two sidebands.

101
 Ci rcu it des i g n

Designer's casebook

Transistor switch Capacitor Ct preserves the d-e conditions on Q1

and isolates the collector of Q2 from Q1·s bias,
for clickless keying reducing key clicks to negligible proportions. The
2.2-kilohm resistance across the transformer pri­
mary absorbs energy spikes that might occur if
By Ja mes M. Little the switch was operated with the output load dis­
connected.
R a n k Bush M u rphy Electronics, Welwyn Garden City, Eng.
The circuit operates well with up to 0.2 micro­
farad across the switch contacts, yielding square­
Audio tones can be switched noiselessly at rates signal bursts when tested at switching speeds up
up to 50 kilohertz with the circuit shown below. to 50 bauds (code elements per second). Signal
It produces a balanced output and its performance suppression during the off periods is better than
is tolerant of the value of capacitance across the 70 decibels. The minimum base current required
operating switch contacts, permitting remote con­ to allow distortionless transmission of a signal of
trol by long cable. Only a single two-terminal 7 mil1iamperes peak is approximately 4 milliam­
power supply is required. peres. About twice this amount has been provided
The circuit uses two transistors and a 1 : 1 trans­ to allow for wide tolerances.
former. Transistor Q1 is an emitter-follower driven
by continuous a-c signal. Transistor Q2 is made
of silicon. A germanium transistor is unsuitable be­
cause it does not provide a completely open circuit
.. off'• condition with the base open circuited. Amplifiers and triggers
When switch S1 is open a resistance of 10
megohms develops between Q2• s collector and simulate blood pressure
emitter, for signals of either polarity. \Vhen St
is closed, Q2 is heavily saturated and offers only
a few ohms of resistance between collector and By Mau rice E. Swin nen
emitter for currents in either direction. Therefore Walter Reed Army Medical Center, Washi ngton
full signal current is passed through the transformer
primary. The output voltage that results is about
0.5 volt root mean square. Blood pressure readings can be simulated with op­
erational amplifiers coupled to Schmitt triggers.
The voltage simulation is useful for calibrating de­
-t2 v vices that record the analog electrical output of a
o, catheter. Another application will be in checking
2 N 1024
equipment to digitize such outputs.
To simulate blood pressure, a triangular wave
whose frequency equals the heart rate is modulated
by a second triangular wave whose frequency

1[ 3 equals respiration rate. The modulated signal rides

on a fixed d-e voltage that imitates diastolic pres­
sure level. Systolic pressure level is indicated by
the peak voltage.
Each triangular wave is generated by connecting
02 a modular operational amplifier in an integrator
2 N 1643 configuration and feeding its output into a Schmitt
trigger (Qt and Q2, or Q3 and Q4) with large hys­
teresis. The Schmitt trigger output is then inte­
Two transistors and a 1:1 transformer accomplish grated by the amplifier to obtain a triangular wave,
audio switching without collector bias. whose peak values are equal to the hysteresis levels

102
 + 12 + 12 + 12 +� .......,
-2 �
27 k 27k 10k RESPIRATION RATE
4 70pf 470pf 100k 10M 0.47pf

10k 10k

-12 -12 -12 -= - 12 -12 -1 2 -=

10k
10k
10k

+ 12 10k

MAX �
+ 10

DIASTO L I C 0 -------
A L L T R A N S I STORS = 2 N 2 2 70 50 k
A L L RESISTORS = 1/2 WATT LEVEL
A L L A M P L I F I E RS = NE XUS SGX- 3 - 1 2 -::

Heart a nd respiration rates are simu lated by triangular waveforms generated by operational
amplifiers and Sch mitt triggers. The waveforms are combined to simulate blood pressure.

of the Schmitt trigger. The output characteristics The heart rate oscillator generates a frequency
are set by the potentiometers R1 through R4. ranging from 0.2 to 20 hz while the respiration rate
\Vhen the negative output of the Schmitt circuit can be adjusted from 0.1 to 10 hz. Potentiometers
is presented to the operational amplifier the pulse R1 and Ra set the rates. Centering potentiometers
is integrated in a negative direction. Thus, the R2 and R4 adjust the symmetry of each Schmitt
trailing edge of the triangular waveform, which trigger pulse around the zero reference line, and
decreases to -8 volts, is generated. At -8 volts, consequently, the symmetry of the triangular wave­
the Schmitt cuts off, and its output voltage reverts forms. The signals are summed in a third opera­
to +2 volts. The output voltage is applied to the tional amplifier together with an adjustable d-e
input of the operational amplifier, which begins voltage that represents the diastolic level to pro­
generating the leading positive-going edge of the duce the composite analog signal. The output volt­
triangular waveform. age reaches a distortionless peak of + 10 volts.

biased on, diodes D1 and D:! conduct and diode Da

High-speed wideband gate is off. The output of the gate is then coupled to the
input through the low forward resistance of Dt and
provides 70-db isolation D:!. \Vhen the polarity of the control voltage is re­
versed, diodes D1 and D:! are cut off and Da con­
By Jacques Gi l bert ducts. This results in very high attenuation of the
radio frequency signal.
Defense Research Board, Valcartier, Quebec Blocking capacitor C connected in series with
Da allows the full control voltage to be appJied to
the diodes in the backward direction. If the control
A simple gate circuit using only three silicon diodes voltage waveform is symmetrical with respect to
can provide extremely high attenuation for radio ground, the capacitor acquires a fixed charge during
frequency signals. For example, it can be used in a the first few cycles of the control signal and main­
duplexer as a transmit-receiver switch to permit tains this charge indefinitely. Thus the charging
connection of the transmitter and receiver to a com­ time constant of the capacitor does not interfere
mon antenna. The circuit, top of page 70, provides with the steady state operation of the gate at high
more than 70-decibel isolation over a 25-megahertz switching rates. Turn on and turn off times are
bandwidth, centered at 30 Mhz. The gate switches about 100 nanoseconds.
at rates as high as 500 kilohertz. A good practice is to select the transformer turns
When the control voltage is positive, the gate is ratio, n, to match the source impedance when the

103
 gate is on. In this circuit an n of 1.5 was chosen.
Under this condition an approximate relation for
isolation in terms of the transmitted power is:
r-----+- {� � 5

-sv
_ o_ c
---o-­
_ _

Pon 1
CONTROL
2.2 K VOLTAGE

Po r r = 4w4 C r4 R r2 (2=
PU LSES
R-,-+
----R
=-L
-= --:-)-=-
2 Dz

where Po n = transmitted power for the on cases ;

1 N 91 6
5 0 - 0HM

Po r r = transmitted power for the off case ;

SOURCE
c
Cr = depletion layer capacitance of diodes ; O.OOt ,u f
50-0HM
Rr = dynamic forward resistance of diodes ;
03
LOAD

w = frequency in radians ; 1 N 9t6

RL = load resistance.
While a matched transformer input is not neces­
sarily the best condition for minimum insertion
Series diodes 01 and 02 conduct and 03 is off when
loss or maximum attenuation, measurements made the gate is biased positively by the control voltage.
on the gate show 85-db isolation at 20 Mhz and Conversely, diode 01 and 02 are off and 03
75-db at 40 Mhz with less than 4-db insertion loss. conducts when the control voltage is negative.

The carrier drive consists of a complementary

Suppressed carrier modulator pair of square-wave signals whose peak amplitude
is slightly higher than the pinch-off voltage of the
with noncritical components field effect transistors. After phase inversion, both
the modulated and inverted modulated signals are
inserted into the modulator by emitter-followers
By Cl ifford H . McDermott which maintain equal driving-point impedances.
Aerojet-General Corp. , El Monte, Calif. Suppression balancing is accomplished by adjusting
the !-kilohm potentiometer. The level of the modu­
lating signal must be maintained below 1 volt
Suppressed carrier modu lationat low to moderately peak to peak or provisions must be made to protect
high frequencies can be obtained without trans­ against forward biasing of the FET gate junctions.
formers or complex balancing techniques. The func­ For the component values shown, at a carrier
tion is accomplished with a phase splitting network frequency of 100 kilohertz and a modulation of 5
and two field effect transistors operating in a khz, carrier signal rejection is 50 decibels and
switching mode. modulation signal rejection is 60 db.

+ 1 0 v ------.-----��---,
Ov lf
CA R R I E R I N P U TS

8. 2 k -6v

2N930

M O D U LATION
I N PUT -----1 1----....---+-t
..
1.0v
U C 200
S U P P R ESSED
....,...-e.---+---- C A R R I E R
OUTPUT

2k
6.2 k

PHASE
INVERTER
Two switched field effect transistors co u p l ed t o a
AND
phase splitting network provide su ppressed carrier
DRIVI NG
modulation at low to moderately high frequencies.
C IRCU I TS
Waveforms indicate the process at different circuit
stages.

104
 And a voltage i s induced across P:.! that turns Q:!
Pulse circuit fi res scr pair on through diode D:.!. This action allows winding
P1 to pass full load current plus magnetizing cur­
rent. The potential induced across the secondary
winding, S1. drives SCR1 through diode D:�. The
polarity of the secondary s:.! potential is inverted
By Brian McCon nel l
Coq u itlam, New Westminister, British Colu mbia and therefore blocked by D4 to prevent excessive
reverse voltage on the gate of SCR2.
\Vhen the core saturates, all induced voltages
H igh-power firing pulses of exact dimensions are collapse, turning Q2 off. Sufficient current to just
alternated between a pair of silicon controlled saturate the core is maintained through R1• The
rectifiers by the pulse circuit shown. The relative value of this current is much less than the load
timing of the pulses is controlled by the symmetry current. \Vhen the negative half cycle commences,
of the low-power, rectangular input. Q:� is turned on by gate 2 and the action is re­
The positive half cycle of the input waveform peated-in reverse-through the P:.! primary wind­
turns transistor Q1 on by means of gate 1. \Vith ing. Since all induced potentials are reversed,
Q1 on, current flows in transformer winding Pt . SCR2 is driven on this time.
-14v

TO TO
GATE 1
ON W ITH
+ Ve

GAT E 2
ON W IT H
- Ve

I N PU T
<1 khz - ,o o_+
: - c..=J - L.. _
_ _ _ _o

SC R 1 n : n : 5 0 · fL S eC
...J L+---J L+-- P U LS E
SCR 2
____n__n_

The circuit delivers an exact pulse then stalls until the ne xt half cycle. Care should
be taken to insure that Q1 and Q2 do not turn on simu ltaneously.

vantage in power-limited, low-noise amplifiers is

Front-end n uvistor lowers that its internal noise is significantly lower than
that of a bipolar transistor.
transistor a mplifier noise An example of a hybrid nuvistor-transistor am­
plifier is the preamplifier, top of page 72, designed
for use in a narrow-band signal processor. The ap­
By George C. Kuipers plication calls for an input frequency of 15 hertz
A.C. Electron ics D. R.L., General Motors Corp., Goleta, Calif. and a source impedance of approximately 300 kil­
ohms. The nuvistor supplies adequate amplifica­
tion, even in a starved condition. Here the plate
A nuvistor tube makes a good front end in an current is lower than recommended. The amplified
otherwise all-transistor amplifier of low-level sig­ signal level is much higher than the noise level of
nals at sub-audio frequencies, such as a preampli­ transistor Q�, so Q1 does not add significantly to
fier for an infrared radiometer. The tube's ad- the total noise present.

105
 r-------��--�---.- +20v

930

Low-noise tube at the prea mplifier's input boosts signal lev el h igh encugh to overcome noise i ntroduced i n the
transistor stages. Direct cou pling between the tube and Q1 provides temperature sta bility, while feedback through
R. and C1 stabil izes ga in.

To obtain this desired noise condition, a quie­ connected between the emitters of Q:� and Q1, in­
scent plate current of 400 microamperes was se­ creases the open-loop input impedance and de­
lected for the nuvistor, T 1. This plate current re­ creases the open-loop output impedance while
duces T1's amplification factor to 10 from the rated stabilizing the a-c closed loop gain. Open-loop gain
value of 35 and increases the dynamic plate re­ at 15 hertz is 90 decibels and the closed-loop gain
sistance to approximately 10 kilohms, the output is 40 decibels. This yields an excess gain for the
impedance of the first stage. The 2N2484 transis­ loop of 50 decibels.
tors are high-beta, low-noise devices that exhibit a The preamplifier output stage consists of a unity
minimum noise figure when the source resistance gain, buffer amplifier Qa and Q4. The low output
is 5 to 15 kilohms. impedance of this stage assures that the feedback
The direct coupling between T 1 and Qt pro­ network will not load transistor Q2, in addition to
vides an input impedance that does not Joad Tt's providing a low-impedance source for further
output. Also, T1's plate voltage supplies a stable processing circuitry. Output impedance is 10 ohms,
d-e bias to the base of Q�, making the d-e tempera­ when an input impedance of 4 megohms is present
ture stability of Q1 excellent. The collector cur­ for the preamplifier.
rent of Q1 is set at 150 p.a for optimum noise per­ Preamplifier's gain is 40 db with an equivalent
formance. Bootstrapping could also be used to noise resistance of 50 kilohms measured in a 6 hz
achieve an input impedance that does not load the bandwidth centered at 15 hz. The gain varies less
nuvistor output while retaining a good temperature than 0. 1 db over a temperature range of -40°C
stability factor. to 60°C. The noise bandwidth was limited to ap­
The emitter-coupled feedback loop, R1 and C1 proximately 1.5-kilohertz for this circuit application.

By adding a d-e ampl ifier consisting of transistors

Voltage-controlled m ulti Q7, Qs, Q!) and Q1 1 to a modified astable multi­
vibrator circuit formed of transistors Q1, Q2, Qa
prod uces tria ng ular output and Q6, triangular and square waveshapes are made
available. The outputs may be linearly controlled
By Gi l bert Ma rosi through a frequency range of 25 to 1 by a voltage,
Genera l Precision Eq u ipment Corp., maintaining a symmetrical triangular output.
Lin k Grou p, Sunnyvale, Calif. This arrangement is inherently self-starting,

106
suited to high-frequency circuits and has fast ris� voltage of resistors R::; and Rn.
and fall times-typically 80 nanoseconds. Transistors Q:; and Qn form a current-mode
The basic astable multivibrator consists of tran­ switch that compares the vol tages at the collectors
of Q:1 and Q-t. \Vith Qa on and Q-t off the voltage at
the base of Qa is 18 volts; at the base of On it is 15
sistors Q:� and Q4• Tran s istor Q10 clamps the col­
lectors of Q:1 and Q4 to about 4 volts. \Vith Q-t on,
the voltage at the base of Qa is volts. Therefore, Q:; is off and Qn is on. "'hen that's

Vna = aVec + fJVcc + 2 Vo ( 1)

so, 10 m illiamperes of current i s provided for
resistor Ra in addition to the current furnished by
where a == Rd (Rt + R4) and /3 == R:� / ( R:.? + R:�). Q t . \Vhen Q4 turns on , Q,; turns off an d Q�. turns
The voltage at the emitter of Q:� rises linearJy be­ on, driving 10 mi1liampcrcs into resistor Rn. The
cause of the constant current of Q1 that charges presence of Q:; and Q11 also increases the regenera­
caracitor Ct.
\vhcn the emitter of Q:� reaches Vn:l, Q:l turns on.
tive action of the circuit. The frequency of opera­
tion is expressed as
The increase of potential at the collector is fed to
the base of Q4 and causes Q-t to cut off. \Vith Q-t
off, the voltage at the emitter of Qa drops by a (2)
decrement (/3 Vc·(' + 2 Vll) to ( a Vee + VnE:�) and
the emitter of Q4 to a v('(' - 2 Vn - /3 Vee + VnE-t• where RT ==Ri + Rs +Rn .
Since the base of Q-t is set at Vn-t == a Vc·(· + The triangular voltage waveform acros s the tim­
f3 Ve<· + 2 V]l, Q4 is back-biased. So Q:.? charges ing capacitor is amplified by trans i s tors Q,, Q :-;, Q !l
Ct linearly until the emitter of Q4 reaches Vn-t· Tran­ and Q 1 1 and is referenced to gronncl. The h i gh input
sistor Q-t then turns on and the cycle repeats. Tran­ impedance to Q7 and Qs docs not affect the con­
sistors Q:; and Qo insure that the outputs at the stant-current charging of C t . Both the symmetry of
collectors of Qa and Q-t are no less than 4 volts. the triangular '''ave and the duty cycle of the square
Since the constant currents of Q1 an d Q:! determine wave may be adjusted indepen dently by potentiom­
the frequency of operation, the voltage at the col­ eters Ru and R 1 0• If symmetrical o:;eration is dc's �red
lectors of Q:1 and Q4 would vary with frequency if throughout the frequency range, potentiometers
no additional current were provided to raise the Ru and R 1 0 arc short-circuited and Rs is adjusted.

+ 20 v
FREQUENCY
C O N T R O L VO LTA G E

3. 3 k

T R I A NG U L A R
OUTPUT

V\/'v
+20

Ow
2 N 3f02

Both square a nd tria ngular waveshapes are produced by thi s arrangement,

which has rise and fal l ti mes of 80 nanoseconds.

107
 C i rcu it d esig n

Designer's casebook
modulation frequency sets the rate at which Eo
Freq uency-modulated output changes.
The period T between pulses with no input signal
from low-cost unijunction can be varied by changing the values of R2 and
Ct. The period may be calculated from

T = [V 1m/V cc] RC In (1/1 - n)

By Ga ry M. N ickus
R D F West, Westminster, Calif.
With the values shown, the period is 10-4 sec­
A frequency-modulated pu lse generator that has onds. Periods longer than 1 second can be obtained
many applications in industrial control can be built by increasing C2, but for values greater than 10
for less than $3 with a unijunction transistor. The microfarads, additional resistance of 1 ohm per ,...f
generator is designed for synchronizing two proc­ should be inserted between points A and B to
protect the emitter of the unijunction transistor.
The amplitude of En will vary with the size of
esses or test instntments.
Operation of the generator depends on the in­
C, , ranging from 2 volts peak to peak when C1
equals 0.001 ,_,.f to 10 volts at 3 p.f.
trinsic standoff ratio, n, of the unijunction. \Vhen
the voltage on the emitter of the unijunction tran­
sistor reaches a value of nV11n, a negative resistance
is established between the emitter and base of Q1 ,
causing capacitor C1 to discharge through resistor
R,. Thu s, a positive pulse is produced. Tun i ng fork drives
Transistor Q1 is an emitter follower that supplies
a potential Vnn to transistor Q2• \Vithout an input porta ble freq uency standard
signal, Vnn is 16 volts d-e. \Vith an input signal,
E1n, however, Vnn is amplitude modulated, centered
around 16 volts d-e; and Vnn causes the output By Stua rt V. Scheffel
signal, E.. , to be frequency modulated. An increase Scheffel Electronics, Santa Barbara, Calif.
in the voltage at the base of Q1 raises V mh and
as Vnn goes up, the period between pulses at R1
also increases. The modulating signal E1 .. can have Replacing the pulse transformer in a blocking oscil­
any waveshape. The amplitude of E111 determines lator with a tuning fork produces an accurate 400-
the amount that the period of Eo changes; the hertz portable frequency standard. The simple, bat-

+ V ee
2 4 v de

c.
0.003,�tf

l...k.__k -r
_L
2v
'---- E o

Frequency-modulated output voltage results when modulated waveshape Vss is produced by Q1.
The period of the output is controlled by VBB and is directly proportional to it.

108
 TUNING FORK 47 -kilohm resistor is placed in parallel with the
400 hz
pickup coil to improve the shape of the negative
5.6 k half-cycle of the sine wave, insuring a symmetrical
-=.._ 3 v
output signal. The 1.2-volt peak-to-peak pickup
�....--...._OUT
. PUT
coil voltage is larger than the base bias of 0.54
400 h z
volt: therefore, the transistor is driven into satura­
n n 7v
T I 2 N 335 ...J u L- ov tion on positive voltage swings and is cut off on
negative excursions. The resulting output signal is
1.5k a crisp square-wave with a peak-to-peak amplitude
s 47k
of 7 volts with a frequency stabilized at 400 hz.
Because the circuit is self-contained and built
with rugged components it is well suited for use
in a portable field instrument. A breadboard version
of the circuit oscillated for 39 hours on two AA
Tuning fork replaces the pulse transformer in a cells. The tuning fork is a Varo Model 6250L-400.
blocking oscillator and converts the circuit into
a portable freq uency standard that generates a
square wave at the resonant frequency of the fork.
Diode bias replaces batteries

tery-powered circuit is ideal for checking out servo in logarithmic converter

control systems in military equipment.
\Vhcn switch S is closed, the transistor conducts By R . K. N isbett
and current flows through the drive coil of the
ITT Federal laboratories,
hming fork. The drive coil is a small electromagnet San Fernando, Calif.
located ncar the top of the space between the wide
steel tines. Once energized, the drive coil attracts
both tines, starting fork vibration. A converter circuit designed for data compression
Another small electromagnet, the pickup coil, is produces an output voltage proportional to the
mounted directly beneath the drive coil. As the logarithm of an a-c input over a 36-decibel range.
tines vibrate they alternately increase and decrease Bias provided by a single diode replaces the bias
the magnetic permeability of the pickup coil's core, batteries usually needed in an a-c logarithmic
increasing the permeability to a maximum when the converter.
tines are closest together and decreasing it to a In all logarithmic conversion amplifiers, the log­
minimum when the tines are farthest apart. The arithm is obtained by passing the signal through
changes in permeability cause the magnetic field a diode biased in the region where its impedance
to expand and contract. When the field cuts across
the windings of the pickup coil, a voltage is gener­ �----��- + 24v

ated. An expanding flux field generates a positive

voltage, a contracting flux field induces a negative
signal.
47}Jf
At the start the positive signals increase the
forward bias of the transistor when applied to the �A-C GROUND)
base. A larger surge of current Bows through the
drive coil, causing a larger deflection of the tines.
The longer excursion of the tines brings them closer
to the core of the pickup coil on their inward swing.
When the tines are close to the core wider varia­
tions in the extent of the flux field are developed,
inducing voltages of greater positive amplitude. ALL
ALL DIODES G E1N3068
RESISTORS 1 '•
These voltages are again applied to the base. This
regenerative cycle quickly drives the transistor into
saturation on positive swings of the pickup coil
signal.
When the fork reaches mechanical resonance­
about 15 seconds after the switch closes-the
pickup coil signal is a slightly clipped sine wave Diode Da biases converting diodes D1 and o. whose
with an amplitude of 1.2 volts peak to peak. The impedances vary loga rithmica l ly with a-c current.

109
 + 1 0 �------.--r--�r---� at elevated temperatures . Resistor R2 has a nega­
tive temperature coefficient which increases the
current flow through D1 and D2. To force more
current through the diodes at higher temperatures,
0
R1 has a positive temperature coefficient. If an
additional diode voltage boost is needed, a positive
thermal coefficient resistor of 10 ohms may be
placed in the a-c ground circuit between the con­
�
"C version diodes and the 47-p.f capacitor. Without
0 -to
0
compensation, the output voltage was found to
....
0
decrease at a rate of 0.8 millivolt root mean square
UJ per degree centigrade.
!:::.!
�
<(
::E
0:: -20
0
z

UJ
(!)
<(
....
FREQUE NCY = I k z Lig ht-sensitive FET
�
0 - 30
>
....
:::>
a..
By B ruce R . Smith
�
Marshall Laboratories, Burl ington, Mass.

-40
I ncident l ight saturates field effect transistor Qt,
shown below, and turns off npn transistor Q� to
provide a positive output voltage. When the light
source is removed, Q1 remains on due to a gate cir­
---�---�
- 5 0 �-
0 0.1 0.2 0.3 0.4 cuit which feeds back the positive output to Q1•
O U T P U T V O LTAG E ( VO LTS RMS) Thus, a latching function is provided which is use­
ful for such applications as an electronic garage­
Input (normalized to 0 db) as plotted against
the output voltage is l inear to within ± 1 d b door opener, a smoke or fume detector or a warning
over a 36-db range o f in put voltages. mechanism in a paper or steel mill where a break
in the sheets might require stoppage of the flow
operation. The circuit is also suitable in star track­
ers, because of its high voltage gain (more than
is proportional to the logarithm of its current. This 100,000) and sensitivity (as great as 0. 1 foot­
circuit has two converting diodes of opposite po­ candle).
larities. So, logarithmic compression of both the The circuit has good noise immunity because of
positive and negative portions of the amplified the diodes in the emitter and base of Q2• Addi­
a-c waveform takes place as they pass through tional diodes in the emitter circuit will increase the
the 47 -microfarad capacitor to a-c ground. noise immunity in the reset and turn-on lines. Reset
Diode Da shunts nearly all of the quiescent is accomplished by a positive pulse at the reset
collector current past diodes D1 and D2• In addi­ terminal greater than the combined voltage drops
tion, it provides each of them with the required of diode D2, the base-to-emitter junction of Q2 and
0.15-volt forward bias, keeping them in the logari­
thmic portion of the operating curve. Ordinarily
this bias is supplied by a floating battery and a
network of adjustable resistors. The rest of the
circuit operates as a conventional common emitter
amplifier. The range of input signals that the cir­ 2 20 k
�uit can handle is limited only by the linear operat­
mg range of the converting diodes. The curves
shown above are a plot of the input (normalized to
0 db) against the output voltage and show that
the circuit is linear within ± 1 db over an input o,
range of 36 db. The range can be increased to 40
2 20 k
1 N 914

db by increasing the d-e supply voltage and the -12v '----- t 2 v RESET
size of shunting resistor R1• This reduces the effect
of a-c impedance to ground of the d-e power supply. High voltage gain, good noise immunity and sensitivity
are availa ble from this arrangement. Transistor Q .
Compensation is required to reduce changes in is a light-sensitive field effect that triggers a
voltage across the junctions of diodes D1 and D2 positive output voltage when lig ht is applied.

1 10
 that produced across diode D1. t6v
A modified version of the circuit appears at the 2 70
right. Here, Q:! has been replaced by a pnp tran­ Ot
F F-409
sistor. In this configuration, both Q1 and Q:! are 02
normally off, and thus the circuit will not draw 2N3677
power until activated.
\Vhen light is applied, Q1 saturates Q!! and pro­ -=
vides a positive potential, as before. This potential
1 N9 1 4
is fed back to the gate circuit of Q1 to provide the
hold potential.
-2v RESET
o,
Note that the anode of diode D1 is connected 390 k 1 N 914
directly to the gate to couple to the reset pulse -G v ':'
and prevent positive excursions greater than 0.7
volt from appearing in the gate circuit. This version By us ing a pnp transistor for Q2 i nstead of an n pn, the
circuit remains in an off state u ntil activated by the
docs not have as much noise immunity as the light source. Thus, no power is d issi pated by the
npn circuit. circu it. Noise i m m u nity for this arrangement is poor.

vhl but less than vhl + 'l'}vbb is applied to capacitor

U n ij unction memory C. The intrinsic ratio 1J is a parameter of the tran­
sistor and varies from 0.56 to 0.68 for this unijunc­
stores unti l readout tion. Thus, the emitter-base junction remains re­
verse biased. \Vhen switch S is opened, Vbl drops
until the emitter-base junction is forward biased;
By R .G. Maim at which time the voltage across C, which is the
Westinghouse Electric Corp. , Ba ltimore negative of the normal work-function voltage,
appears across resistor R1 • Capacitor C then dis­
A unijunction transistor can provide a simple and charges through R1 and switch S can then be
inexpensive memory circuit if destruction of in­ closed, resetting the memory.
formation during readout is permitted. Storage To detect the presence of a voltage on C, the
times from 5 to 10 minutes can be readily obtained d-e component, Vh�, must be subtracted from the
if the quality of the storage capacitor is high and output V0• \Vithout a voltage on C no output is
the leakage of the transistor is low. produced, as shown in the accompanying wave­

--- - -1
To store the information, a voltage greater than forms.

:� --t:s= �

--
--
•,
----------

I -
1
I
2N491
:I I
I
VIN .,._____ � ·�

l j
_____

�.------ vo
I I
vb1 1• _.J
I I
S OPEN
c

vb2 - - - - - - - - ------
Ov __ _.. -----------·• ------
Several minutes of storage time can be obtained with the u n ij unction transistor in this circuit.
Waveforms are a plot of output voltage, Vo, versus ti me. In the top waveform, with switch
closed, the spike above Vb1 i nitiates storage action. Bottom waveform, with switch open,
shows 0 volts across C and no output voltage is produced.

111
 C i rcu it desig n

Designer's casebook
Potentiometers R:! and R3 provide some adjust­
Wa rn i ng lig hts mon itor ment of the critical supply voltage levels which
trigger the warning lamps. The voltages handled
d-e supply voltage by the circuit are typical for a 28-volt batteryI alter­
nator d-e supply in an aircraft; however, the circuit
can monitor voltages as large as 600 volts with
by Robert L. Nuckol ls I l l appropriate lamps and semiconductor devices. This
Electro n ic Designs Development, circuit was designed for cockpit installation and
Wich ita, Kan. is not temperature compensated, but it will operate
satisfactorily over a range of 50° to 90°F.
Overvoltages in an aircraft's d-e supply can ruin t28 v

expensive radio equipment. A pilot confronted by

a myriad of dials may not notice supply voltage
changes on a voltmeter dial in time to take cor­
rective action. The circuit at the right, replaces
the voltmeter with warning lights that display over­
voltage or undervoltage conditions. Installed in an
automobile, the circuit warns of voltage regulator
malfunctions so that repairs can be made before
the battery is destroyed.
\Vhen the 28-volt supply voltage rises to 32 volts,
it hack biases zener diode D1 into conduction;
current flows through R1 and Dh triggering scR1
and turning on the red overvoltage warning lamp.
Although the cathode of scR1 is clamped at 0.6 BOTH LAMPS NO. 327 I N A I RCRAFT TYPE
P RESS -TO - TEST LAMP F I X T U RES
volt by diode D:h the voltage at the anode of zener
D1 is 1.1 volts; the 0.5-volt difference is enough An increase in supply voltage to 32 volts
to turn on the SCR which requires only 0.2 volt for brings zener diode D1 into conduction firing
SCR1 and turn ing on the red overvoltage warning lamp.
triggering. Once turned on, the sen continues to
conduct and the lamp remains lit. It can be extin­
guished by pressing the lamp's press-to-test mount­
ing fixture. This opens the circuit.
To control the yellow undervoltage warning lamp, Tu n nel diodes lock
zcncr diode D:! is chosen so that it is back biased
into conduction as long as the supply voltage stays output of servocircuit
above 24 volts. The current through D:! holds
transistor Q1 in saturation by making the base of
Q1 positive with respect to its grounded emitter. By Joh n C. McKech n ie
With Q1 in saturation, the gate of scR:! is held 0.2 Martin Co., Orlando, Fla
volt above ground by the voltage drop across Q1•
Since the cathode of scR:! is fixed at 0.6 volts by
diode D:h the reverse bias from gate to cathode on An often-ignored property of tunnel diodes, the
sen:! is 0.4 volt, maintaining sCR.:.! and the lamp in reverse current-voltage curve, can be the basis for
a normally off condition. a family of circuits that delivers a nearly constant
When the supply voltage drops below 24 volts, output when the input voltage is between two
zener diode D:! cuts off; this drops the base voltage specified levels. This form of response, provided
on transistor Q1 to ground and shuts it off. With by an offset hysteresis transfer function, is par­
Q1 an open circuit, the gate of SCR:! is switched to ticularly u seful in servosystems.
the supply voltage and SCR:! conducts, turning on Features of the offset hysteresis transfer function
the yellow lamp. [the top curve in the diagram at the right] are:

1 12
 • Output is delayed until the input signal, e, point B, any further increase in e1 is mostly ab­
reaches a minimum level, eou· sorbed across R1 and the output voltage, e0, remains
• There are only two response states, full on nearly constant.
(plus or minus) and off. Then, as e1 decreases to a value that equals e.,u,
• Once the function is on, an overshoot voltage the reverse current through D1 also decreases.
in the opposite direction-to Corr-is necessary to \Vhen the current falls to i,., at point C of the curve,
turn it off. Dt switches to its lower voltage state. This state,
• An increase in the input signal will not change e1 , is determined by the in t(•rsl•ction at point D of

the output when the function is on. Dt 's characteristic curve and the load line of R1 •
Among the circuit types that can exploit these It is apparent from the curve that e rr is less than
c u, accomplishing the desired hysteresis char­
..

actions are analog computing elements, absolute ..

value threshold detectors, bang-bang elenwnts of acteristic.

nonlinear servosystl•ms and servofeedback loop �feanwhile, D:.! in the lower loop is virtually a
clements. A circuit built with radiation-hard tunnel short circuit. As the positiV(' e1 gradually increases
diodes has been developed at the �fartin Co. to from zero, a forward current flows through D:! and
produce a dead band and gated response in the R:.!. As long as e1 is pos iti\'(', forward conduction is
fet•dback of a missile servosystem. maintained and essentially all of E 1 in the lower
The basic form of the circuit is shown and the loop is dropped across H:.!.
reverse current-voltage characteristic of the tunnel The switching point of the output with respect
diodes is displayed in the lower section of the dia­ to the input voltage level depends upon the values
gram. The forward current-voltage characteristic is selected for Rt and R:.!. The output voltage in the
s imilar to that of a conventional diode; that is, it on state is varied with output resistors Ra and R4,
pn•s(•nts essentially zero impedance. which combine with the output load resistance to
The circuit consists of two loops, each containing make a voltage divider.
a tunnel diode, a current-limiting resistor, an output
resistor and a ground reference. The upper loop
( e�,R 1 ,H.:�,e. ) providt>s the hysteresis characteristic
.

when the input voltag(-' , e�, is positive. \Vhen the

Age circuit possesses
input is negative, the loops work in reverse.
As c. rises until it equals e.,.. , the reverse current 60-deci bel gai n
in the upper loop through D1 increases to a value
i," at point A on the characteristic curve. At this
point, D1 switches to its higher voltage state, e:.!, By Wi l l iam H . El l is J r.
as determined by the intersection of the curve and Page Communications Engi neers, I nc., Washington, D.C.
the load line of the current-limiting resistor, R1, at
point B. Since the curve's slope is quite steep at
I ntegrated circu its, diodes and a single transistor
t
eo
Rt form an automatic gain control circuit that provides

c an output change of less than 6 decibels for an

input change of greater than 60 db. Frequencies
can range from 20 hertz to over 10 khz [See Elec­
tronics, p. 81, Nov. 28, 1966 for an alternate circuit. ]
Resistor R1 and diodes D1 , D:.! , Da and D4 form
a voltage divider in the circuit [at top p. 108]. Cur­
rent through the diodes t•stablishes the voltage
division ratio because it changes the effective re­
sistance of the diodes. The signal at the voltage
divider is amplified by the integrated circuit at the
left of the diagram on the next page, an operational
amplifier with a gain of 100. The output of this
amplifier is rectified by D., and D11•
Effective full-wave rectification-which improves
the low frequency performance of the circuit-is
achieved without a transformer by the second
operational amplifier. The control signal at the out­
Offset hysteresis transfer function, shown at top, is
achieved in the circuit by exploiting the reverse put of the second amplifier is buffered by the
current-voltage characteristic of tun nel diode, seen emitter follower, Q� , that drives the input diodes.
in bottom cu rve. For manual control the feedback loop is broken

1 13
 + 1 211 2.2 k 1k

100

Ot
2N3642

220k

220 k
1 N270 10k

INPUT 05

I2 .2.p.f
4 7k
. 0 7
3

1nl
1 N 270
41
6
D&
04
10k

T
1 N270

":' - 6v -= OUTPUT
2 2k
Full-wave rectification by the operational amplifier at the
-6v
left before feedback to the amplifier at the right,
improves low-frequency performance. ":'
R2
fO k

and a potentiometer inserted to control current How Variable voltage division requires several volts of
through the diode voltage divider. Adjusting R2 input signal for maximum age range under maxi­
varies age delay. Capacitor C1 controls age delay. mum signal conditions. Consequently, one or more
The circuit exhibits good d-e stability at a stages of linear amplification may be required ahead
temperature of 70°C. of the age circuit.

current source that preserves the preset voltage

Adding transistors ma kes drop across Rh regardless of input. If the shift de­
sired is a fixed one, the potentiometer can be re­
voltage shifter adjustable placed by a fixed resistor.
Output transistor, Q3 is an emitter follower, which
buffers the effect of the load on the amount of shift.
By Ja mes E . Wa lters Resistor R1 clamps the base of Q3, a fixed voltage
Light M il itary Electronics Division, drop below V 1• The level shift is due only to
General Electric Co. , Utica, N .Y. �hanges made to variable resistor, Rt.

Single-transistor circu its for shifting voltage levels

have been the rule in digital systems that require
two or more driving voltages. In contrast, the cir­
+ 6v n vt
i N PUT
6.8k
Ov
cuit at the right is more complex but offers sev­
eral advantages over the usual logic-level shifter: it v2
ourpur n -4v
has high input impedance, has good thermal sta­ -10 V
03
bility and provides accurate control and adjustment 2 N 2907
of the output level.
These advantages are frequently desirable in
interfacing, where the amount of shift must be
adjustable, or the amount of shift must be more
precise than that of the zener shifter. The circuit,
as shown, is capable of shifting signals over approx­
imately an 18-volt range.
As the input voltage V 1 goes from Q1 through Qs -12 v
its level is shifted downward by the voltage drop
across potentiometer R1. Transistor Q2 is a constant-
Potentiometer R1 combines with constant current
generator Q� to form an adjustable zener d iode.

1 14
Because Q1 and Qa are complementary npn and pnp amounts of voltage drop can be made from the fol­
transistors, the voltage drop across their base­ lowing current-voltage relationships:
0.6) • a Ra
emitter junctions cancel out and these thermal drifts
(Vcc
(Ra + R4) R2
-
nullify each other. Diode Dt compensates for the It =

-1.8 millivolt per °C drift of Q:! base to emitter drop.

Selection of component values for different Vc = Vt - It Rt for It > ib a and Vbel = Vbe2

point of the hmnel diode from point A on the Id

Bipolar pulse generator versus Vd curve where the ratio is 1 to 7, to point
B, where the ratio is 1 to 1. In addition, this ad­
tests fast fli p-flops justment changes the prf slightly.
The bases of transistor Q1 and Q:! act as a cur­
rent switch. The bases are connected between the
By Otaka r A. Horna
tunnel diode, Dt , and the d-e level shifting network
Research I nstitute for Mathematical Machines, RaR4Ca. Thus, Q1 and Q:! are driven from a source
Prague, Czechoslovakia
with a very low internal resistance and do not
saturate. Hence, the rise and fall times are less
are easily tested with a bipolar
Fast flip-flop circu its than 5 nanoseconds, and the delay between both
pulse generator whose pulse repetition frequency pulses is less than 0.5 nsec.
goes up to 50 megahertz. The high prf is achieved Isolating network, R:!C:!, receives the 1-volt pulse
with a gallium-arsenide tunnel diode that functions signal from D1 and applies it directly to output
as a relaxation oscillator. terminal ! where a signal for time-base synchroniza­
The pulse driver shown below is formed by the tion can be taken for an oscilloscope. A positive
tunnel diode, Dt, a developmental type, with a peak pulse can be taken for terminal 2 and a negative
current of 10 milliamperes, that is similar to the pulse for terminal 3.
RCA 40062. The frequency of oscillation is changed \Vith the given values of resistors R;; and R6
by varying inductance Lt. \Vhen L1 is 0.5 micro­ and a supply voltage of 2 volts the amplih1de of
henry, the prf is 25 Mhz. When L1 is increased, the output pulse is 1.8 volts and the output im­
the frequency goes up. pedance is 100 ohms. This impedance terminates
The ratio of the pulse width to the repetition a 100-ohm coaxial cable. The terminals are minia­
period can be adjusted continuously by varying ture coaxial connectors. Terminals 2 and 3 are
resistor R1• This essentially shifts the operating short-circuit proof.

Rs
270
0 . 01

+ G v I N PU T
0.01

Positive a nd negative
pu lses are obtai n ed in
seq uence at terminal 1 .
Positive o r negative
pulses, with a mag n itude
3 of 1 .8 volts, a ppear at
terminals 2 a nd 3. The
ratio of the pu lse width
to the repetition period is
adjusted by varyi ng R1.

115
 Ci rcu it d esign

Designer's casebook

Zener diode controls

- 28v
variable phase shifter

By Theodore T. Kalal
47k
I nstitute for Enzyme Research
U niversity of Wisconsin, Madison

f---
OUTPUT

-�---. t------+-t�-+---1
��----� c3
A zener diode in a phase-shifting circuit provides O.OI,uf
600hz
convenient control of the phase angle of low­
frequency signals. Shifts as large as 70° can be 22k
made without distorting the signal's waveshape.
Operating as a voltage variable resistor, the zener
diode gives the circuit a phase shift sensitivity of
15° per volt. The diode's resistance is varied by Collector signals are split into quadrature components by
changing the setting of potentiometer R� and the capacitor C1 and zener diode Dt. The phase of the output
output amplitude is kept constant over the range signal is determined by the relative magnitudes of the
of phase shift by varying Rt. two quadrature components, as adjusted by zener diode.
As a variable phase reference, the circuit can
control a large number of servomechanisms. In a
wideband military receiver, for example, the trou­
blesome mechanical linkages that gang-tune the � -16
intermediate-frequency strips could be replaced by g
z
positioning servos for each knob, referenced to a ;;; -12
single phase shifter. The receiver would then be cz
a;
hmed by varying the phase angle of the reference �
a:: -8
voltage. �
.....
The circuit's simplicity and low cost make it a::

attractive for such consumer applications as a-c -4

motor speed controls in mixers, blenders and drills.
Motor speed may be regulated by a lagging phase
shifter that would control the firing point of a 100 120
silicon controlled rectifier; the scr's cut-in point
determines motor speed by limiting the amplitude Resistance of zener diode Dt remains l inear during nearly
soo of phase shift. The slope of the linear portion
of the voltage that reaches the motor. indicates that phase-shift selectively is 1 5° per volt.
Because the phase shifter is voltage variable, it
may serve as the correction circuit in the feedback
loop of an automatic phase-control system. voltage at the collector into quadrature components.
The circuit operates like an ordinary phase shifter When the impedance of Dt equals that of C1, the
except that a transistor replaces the transformer. output signal phase leads that of the collector by
The transistor performs conventional transformer 45°. As the resistance of D1 gets smaller, a larger
functions, isolating the input from the output and portion of the output voltage appears across C1;
placing identical signals of opposite polarity at the this further increases the angle by which the
terminals of its secondary. In the schematic, tran­ output leads the collector signal phase. When the
sistor Q1 is Banked by matched !-kilohm resistors resistance of the zener approaches zero, the lead
so the signals across them are equal (within 2% ) , angle approaches 90° . The graph directly above
but are opposite in polarity. shows this effect-an increase in the reverse bias on
Capacitor C1 and zener diode D1 split the signal the zener increases the phase shift. The nonlinearity

1 16
above 70° or 75° of shift is caused by the residual tude a s the phase shift i s varied from minimum to
resistance in the zener; at this point the resistance maximum; this effect can be largely overcome by
cannot be further reduced by increasing the reverse adjusting potentiometer R1 to increase the resis­
bias voltage, thus proportional voltage division be­ tance between the emitter of Q1 and the wiper of
comes impossible. R1 . Properly adjusted, the output amplitude varia­
As the resistance of the zener becomes very large, tion is less than 1.2 to 1 over the entire phase-shift
however, capacitor C1's contribution to the output range.
voltage becomes negligible; hence the output volt­ Distortion of the output may be caused by a
age is virtually in phase with the collector voltage. signa] whose amplitude is so large that it drives
The capacitance of C2 is very large compared with the zener diode into its forward conducting region.
cl so its effect on the phase of the output voltage If the signal remains within the zener region, how­
may be neglected. Capacitor C:� couples. ever, distortion is more than 50 decibels below the
There is a five-to-one reduction in output ampli- signal level.

tional to the intensity of illumination falling on

Emitter follower enhances the light-sensitive resistor, R... For other applica­
tions, a potentiometer can replace R.. to produce a
oscillator's freq uency variation simple variable frequency source. With a current­
sensitive resistor as an external bias supply, the
circuit could operate as a remotely controlled
By Gordon Si lverman
oscillator.
Rockefel ler U n iversity, New York The network consisting of capacitors C1 to C3,
resistors R2 to Ru and the input impedance of tran­
An emitter follower, added to a phase-shift oscilla­ sistor Q1 produces the 180° phase shift necessary
tor to provide a low impedance for coupling to for oscillation. In a conventional phase-shift oscilla­
other circuits, produces an unexpected performance tor, Q2 is omitted and the feedback network is
bonus. \Vith the addition of the emitter follower, connected directly to Q1's collector. The unmodified
the oscillator's output frequency increases by a circuit, Q1 is a current source and the frequency
of oscillation is expressed as
factor of y/2 over that of an unmodified oscillator.
Thus, for a given output frequency, a smaller value
1 (1)
21rRCVif
f =
of capacitance may be applied. Furthermore, the
modified oscillator exhibits greater frequency sensi­
tivity with changes in R than the unmodified where R and C are the resistance and capacitance
circuit. in the phase shift network. The added emitter
One application for the oscillator is a psycho­ follower drives the phase shift network from a
logical testing device that measures the subject's voltage source instead of a current source. The
ability to foHow a moving target-in this case a frequency at which the base current into Q1 is 180°
light source. The oscillator's frequency is propor- out of phase with the emitter voltage of Q2 is

�------.--��-- - 24 ¥

Cz
R, 2N 404A
c3
56k

O.OO t pf

Rz Rs
t2k 12k

8,uf
30v

Variable frequency, phase-shift oscillator is controlled by light-sensitive resistor R11. Emitter follower Q 2 makes circuit
more sensitive to resistance changes than a conventional phase-shift oscillator.

117
 now given by
1
f (2)
2,...CV3R'�
EXPERIME NTA L --­

R' Ra + �
R4R5 THEORE T I C A L - - - - - -
;C Ct = G, Ca
+ R5
= = =

This equation assumes that Q1 has zero input im­

pedance and the emitter follower has zero source
impedance. Equation 2 is plotted in the graph to­
gether with experimental values; the wide diver­
gence between experimental and theoretical curves 2
at lower resistance values is caused by the assump­
tions that were made. If the input impedance of
Q1 is included in the calculations the frequency of
oscillation is given by Frequency variation i s plotted a s a functionof
1 R', the resistance of the shunt leg which is a

2,...CV[3R',R2 + ( R' , + 2&)hae

f =
combination of Ra, R, and R5. Discrepancy between
experimental and theoretical curves results from
where hte = Q1's input impedance. assuming zero input impedance for Q1.

�
Neon tube staircase generator S I GNALITE
AC82RIO
performs two jobs R, .---� �---.----�--
5k

By A . B . Cistola
I BM Space Gu idance Center, Owego, N.Y. Square-wave voltage, developed across LtCt, breaks
down neon tu be and provides current to resistor R�,
charging capacitor C2 until accu mulated charge breaks
The dual functions of frequency and voltage divi­ down the tube in the opposite direction.
sion can be performed by the circuit shown at
the right with much fewer components than are
normally required for either. In one mode, the voltages of the opposite polarity, producing break­
circuit acts as a staircase generator to divide the down.
input voltage into equal steps. In the second mode, If breakdown is assumed to occur on the positive
it performs as a frequency divider and separates pulses, then no current flows through the tube on
out odd-numbered pulses in an input train. This the negative pulses, as shown in the first scope
effectively eliminates the need for decoding logic recording. For every positive pulse an additional
usually associated with binary systems. charge accumulates on C2 until the voltage across
The mode of operation is determined by the C2 in series with the negative voltage across Lt
range of the input voltage, as shown in the chart. is enough to cause a discharge through the tube
By varying 10-turn potentiometer R1, a square­ in the opposite direction. When this takes place
wave input voltage with variable amplitude is all subsequent negative input pulses will reduce
supplied to the series resonant L1C1 combination. the accumulated positive charge on C2 to zero and
Inductor L1 should have a high Q since the voltage then begin to build up in the negative direction
that is developed across L1 must be high enough until c2 again discharges through the tube; and
to fire the neon tube. The combination of R2 and C2 the cycle begins again. This is shown by the center
forms an integrator. waveshapes.
With a square-wave voltage of about 54 volts The number of step levels in a staircase cycle is
applied to resonant circuit LtCh the voltage de­ adjusted with the potentiometer in small incre­
veloped across L1 is sufficient to cause current ments, as displayed on the chart. As the input
pulses to How through R2 due to the firing of the voltage is reduced, various staircases are generated
neon tube. Capacitor C2 then accumulates a charge with increasing step levels and peak-to-peak ampli­
that opposes input voltages of one polarity, pre­ tudes. A point is reached, however, where further
venting firing of the neon tube, but aids input reduction of input voltage does not cause htbe

1 18
 ��

No current flows th rough the tube when negative pu lses a re applied at the i n p ut, shown at the left.
When positive pu lses are a pplied, charge accum u lated on c� eventua l ly discharges th rough a zero level and
bu i lds u p in reverse polarity, center. The step levels are changed by reducing the i n put
voltage. However, beyond a certai n point, further reduction prevents tube cu rrent from flowing. At
this poi nt the circu it behaves as a frequency divider.

current to flow on every positive or negative going input-square wave is developed across C:!. Fre­
cycle. This is the voltage at which the circuit starts quency division by fives, sevens or nines can be
operating in the frequency-divider mode. obtained by reducing the input voltage to R, .
When the input voltage across L1 and C1 is about To insure proper operation a neon tube with a
40 volts, then the voltage across L1 requires several large difference between its breakdown and main­
cycles to build up to firing level. The LC circuit taining voltages is required. It should be checked
acts as a heavy load immediately upon application on a curve tracer for cleanliness of the breakdown
of the input signal and requires some time to build curve and should have as close a tolerance as
up, as shown in the third recording. After ap­ possible on breakdown and maintaining voltage
proximately 11/2 input cycles, the voltage across Lt levels in both directions, otherwise there will be a
is sufficient to fire the tube. A charge of about 1 volt slight unbalance bet\veen positive and negative step
then develops across c:! due to current flow through levels. A tube that meets these requirements is the
R:!. \Vhen the tube discharges, the voltage across Lt AC82R10, manufactured by Signalite, Inc. Break­
is reduced below the maintaining level of the tube. down voltage is 100 ±3 volts, and the maintaining
After the next 1 1h cycles the tube fires in the op­ voltage is 82 ± 1 volts. The tube has no negative
posite direction . Effectively a 3 to 1 division of the resistance from 0.5 to 10 milliamperes.

CIRCUIT FUNCT ION I N P U T VOLTS OUTPUT OUTPUT

(P- P ) WAV E S H A P E AMPLI TUDE
R E MA R K S
( P - P VOLT S )

1 .0 7 's C O U N T
32
r--

II
r--- t.O 5's C O U N T
36
FREQUENCY D I V I D E R
I I
I I
I I I
I I
I
3's C O U N T
40 rt__l_f
I - --
1 I
I
I
1 .0

I I I I

I N P U T SQUARE WAVE

44 13 t o STEPS @ 1 . 3 v EACH

STA I RC A S E G E N E RATOR
50
10 6 STEPS @) 1.6v EACH

54 6 3 S T E PS @ 2 v E A C H

Changing the range of the i n put voltage establishes funct ion as a frequency divider or a staircase·
voltage generator. Staircases with four, five, seven, eight and nine step levels can be generated
at intermediate i n put voltage settings.

1 19
 C i rcu it d esig n

Designer's casebook

+10v
Switch converts multivibrator
from astable to one-shot 1k

By Doug las Haggen

Burroughs Corp., Plainfield, N.J.

With a simple modification an astable multivibrator

can be made to function as a monostable multi­
vibrator so that tests on counter and logic circuits
can be performed both manually and at high
switching speeds. A simple two-pole double-throw
switch eliminates the necessity to build two test
generators--one for manual testing and one for
high-speed testing.
The circuit operates as an unsymmetrical astable
multivibrator when switch s2 is in the automatic
position. It generates 1.5-microsecond pulses at a
!50-kilohertz repetition rate. With S2 in the manual
position, the resistance-capacitance coupling to Q2
is disconnected and the circuit becomes a mono­
stable multivibrator with transistor Q2 held off.
Microswitch 81 turns on Q2 and produces a
pulse that triggers the monostable from its stable -10v
state. Transistor Q2 remains on until the capacitor Two-pole double-throw switch s . allows the circuit to
in the base circuit of Q1 has charged sufficiently operate as either an astable or monostable multivibrator.
to turn on Q1 and complete the cycle. Thus, manual and h igh-speed testing is performed.

If the capacitance control element of the circuit,

Feedback turns fixed capacitor potentiometer R1 is replaced hy a thermistor or
other voltage-controlled resistor, the circuit will act
into varia ble capacitance as a voltage-variable capacitor.
Capacitors far smaller than 100 p.f can be used.
By Joseph Gaon The lower capacitance limit depends on the junc­
tion capacitance of the transistors, usually less than
30 picofarads. If the capacitor approaches the junc­
JMR Electronics Corp., Bayside, N.Y.

tion capacitance, the circuit won't work.

Fixed capacitors as large as 100 microfarads can be The capacitor, C1, appears across the input ter­
employed as variable capacitors with a capacitance minals, XY, as a fixed capacitance. The capacitance
range of 1,000 to 1, by the circuit at top page 81. value is reduced by applying a feedback voltage to
Such large values, unattainable in conventional the bottom plate of C1• The feedback voltage is in
variable capacitors, are useful for capacitive tuning phase with the input, but its amplitude is lower.
of tank circuits. The complementary transistor pairs Potentiometer R1 controls the amount of feed­
of the circuit will accept complex waveforms and back. With R1 at point Y the emitters of Qs and Q4
positive or negative d-e voltages. are essentially grounded. This also grounds terminal

120
M and allows the full magnitude of Ct to appear + Vee= 3 5 v

across XY. When R1 is set to point A, the voltage

applied to terminals XY also appears between
terminals AY and MY. Since the voltages across XY
and MY are identical in amplitude and phase, no
potential difference exists across Ct. Since no cur­
rent flows through c�, the effects of this capaci­ I N PUT C1
tance across XY is the same as having no capacitor 0.1,u.f

in the circuit. y
\-Vith H1 set to its midpoint, half the voltage ap­
M
plied to XY appears across MY and half across MX.
This causes half the original current to flow through
C1 reducing C1 to half of its original value. Potentiometer R1, buffered on both sides by
complementary emitter followers, reduces the effective
Similarly, different settings of R1 will produce
capacitance value of fixed capacitor Ct. This reduction is
different fractions of C1' s capacitance, according to accomplished by applying a feedback signal to the
the relationship VxY VMY = VXli·
- bottom plate of the fixed capacitor, Ct.

0.5 and 1.5 volts while the input signal varies over
Age amplifier handles a 60-db range from 0.5 millivolt to 0.5 volt. Input
60-db range signal frequencies range from 20 hertz to 100 khz.
Designed as a low cost age amplifier for pleasure­
craft sonar, the circuit also has applications in
communication receivers and control systems.
By Murray F. Fel ler Basically the circuit operates by controlling the
M . F. Feller I ndustries, Santa Maria, Calif. negative feedback between the collector and base
of Q2. The amount of feedback depends on the
dynamic impedance of diode D1, which in turn
The automatic gain control circuit shown accepts depends on the collector current of Q1•
a larger range of input signal levels than conven­ A d-e voltage proportional to Q2's output is
tional circuits and produces a low-distortion out­ applied to the terminal. As the input signal level
put signal. The undistorted output remains between increases, Q2's output level tends to increase. Con­
+ 12 v

Rt
SIGNAL
INPUT
----
4.7 k
---�--�� �-------�� �--�----�
O.Oi p. f

LONG T I M E CONSTANT
AGC
INPUT
( D-C CURR ENT )

47 k 0.5J' f

47k

Automatic gain control circuit maintains a relatively consta nt output level

by varying Dt'S dynamic impedance, which controls the negative feedback around Q..

121
sequently, the proportional d-e voltage also tends resistor Rt and allows larger input s ignals.
to increase, forcing Q1 to conduct more heavily. In contrast, at low input signals there is only
Since Q1's collector current flows through D1 , this a small d-e current flowing through D�, so that Q2
current reduces the diode's dynamic impedance, operates as a high gain, common emitter stage.
thereby increasing the amount of feedback around At the same time, Q:/s input impedance is high
the region of transistor Q2 . so that the voltage drop across R1 is negligible.
As an example, when the input signal level is Therefore at low input levels, the circuit provides
1.5 volts, Dt's dynamic impedance is only about the maximum possible gain.
100 ohms so that almost 100% negative feedback For 60-db control, the input current ranges from
is applied between Q:/s collector and base. The 0 to 0. 1 milliampere. This corresponds to a voltage
increased feedback insures that output level is of approximately 0 to 2 volts at Q1 's base. The
relatively constant and has low distortion. At coupling capacitor must be selected for the de­
the same time the feedback reduces the input sired frequency of operation. Usually, the time
impedance to amplifier stage Q2• As a result, the constant of the RC circuit at Q1' s base is made
input signal produces a larger voltage drop across longer than the lowest period of interest.

To set up the test, the circuit shown below is ad­

Time will tell how justed by using a motor of known speed and the
Variac to establish the tachometer voltage output
fast a motor revs up that causes the unijunction transistor, Q1, to trigger
the silicon controlled rectifier, SCR1, and close relay
By Richa rd Traina Kt . Then, the standard motor is replaced by the
motor to be tested, the circuit is reset with switch
Airborne Accessories Corp., H i l lside, N .J.
S2 and the motor and the clock are turned on with
St . The clock runs until Kt trips. Then by dividing
Clocking the time a motor takes to reach a known the known motor speed by the elapsed time, the
speed is an easier way to find its average accelera­ average acceleration of the motor under test can
tion than poring over oscillograms. The motor being be calculated.
tested, such as one for an aircraft actuator, will Except for adjustment during setup, the circuit
clock itself with the help of an electric tachometer operation is essentially the same for clocking. The
generator and a unijunction transistor, such as a tachometer generator's a-c output goes through the
2N2646. Variac and a full-wave rectifier bridge, diodes D1

L I �
115v

�
28v o-c
d-e

�
CLOCK

s.
I
I
- -

�
I
52
+12
Kt I
Rt
.... . . p AND B I
KA5DY

�� o ,
VA R I AC 75 k
12v
�� 0 2
�

ry· .. l
620 ·� ��
1N676 1 N676 1 N 646
a,
.. 2 N 2646
TAC HO M E T E R
MOTOR
< �
GE N E R ATOR
� � � SCR1
I 2N 1 595
-t__ c,
�� 0 3 •r D
�· 4
... � 1 J.1 f R2
1 N 676 1 N 676 • 51

- "-

Clock runs until tachometer output increases beyond the peak point voltage of Q1,
firing SCR1 and tri pping the relay. Elapsed time is used to calculate motor acceleration.

122
through 04• The bridge output voltage is applied Vo is the forward voltage drop of the emitter base
across R1 and C1• As long as the peak voltage is one diode.
below the peak point voltage, Vp, of Q1, the uni­ When the motor speed starts to go above the pre­
junction transistor's emitter is reverse biased. The set speed, the peak output voltage of the generator
value of VP is obtained from the relationship, rises above Vv· The emitter of Q1 becomes forward
NV B B + Vo
biased and delivers a voltage pulse across R2. The
VP =
pulse turns on the silicon controlled rectifier, scr�,
where N is Q1's intrinsic standoff ratio, VBB is the which transfers and latches K�, stopping the clock.
voltage between base one and base two of Q1 and Both the motor and clock have power supplies.

capacitor's reactance shifts phase of VlA 90° for­

Scr triggered by capacitor ward with respect to line voltage and its time con­
stant determines the slope of V lA' s waveform. As
lowers cost of oven control cl and its time constant increase, it limits the
peak voltage charge of C1 during each half-cycle.
Larger values of C1 reduce the amplitude of VJ A.
By Dale E. LaPlante* As the waveform shows, small changes in the
Consolidated Electrodynamics Corp., Pasadena, Calif. level of Vm will bias VlA above or below the zero
voltage reference. This vertical displacement of
VtA changes the point in the interval at which V lA
Varying the charge on a capacitor, to control the crosses the 0.5-volt line, firing the scr. When the
firing angle of a silicon controlled rectifier regu­ d-e level ic; so low that VIA drops below zero, the
lates an oven by proportionally controlling the time scr never fires and the heater is fully off. When
current flows through the heating coil. The circuit, V IB increases so that all of V lA is biased above
shown below, is compact, easily packaged, and 0 volt, the scr is no longer controlled by V 1• The
costs less than circuits that trigger the scr with a positive half-cycle of line voltage turns the scr on
unijunction transistor and zener diode. and off and the heater gets full power.
The scr, in series with the heater, is forward The amplitude of VlA is fixed by the value of
biased only during positive half-cycles of line volt­ cl. The scr firing point in the interval is con­
age. It restricts heater current to the shaded area trolled by V IB, the slowly-changing d-e bias on
of the cycle shown under the V LINE curve. The point capacitor Ct. Imbalance in the charging current
at which the scr fires is controlled by voltage V �, produced by the positive and negative half-cycles
at capacitor C1. of line voltage determines Vm. In positive half­
V1 consists of a line frequency component Vu cycles, current flows through 02 , R2, R3 and C1 to
and a slowly-changing d-e bias level V lB· The ground, charging C1 plus on the top plate. In nega­
• Now with Datex Corp., Monrovia, Calif. tive half-cycles current flows up through c�, RT,

0 0
1 2

OVEN � 1 N4003 __...,

- -,
-
r-
1 I
I I
I
Rr
TA4 5 L l I
I I
t15v I I
60 hz I I
L - - - - - - -- - - - - - __ J

Rt Ct
5.1 k 10,uf

Scr1 is triggered by the voltage V1 across capacitor C1 when the voltage

reaches the 0.5-volt level indicated by the dotted line.

123
and D1 , charging Ct plus on the bottom plate. resulting positive charge on cl vertically displaces
Oven temperature is selected by adjusting poten­ Vu , causing it to fire the scr earlier in the positive
tiometer Ra so that the series resistance of R!.! and half-cycle. More current then flows in the heater.
Ra equals the resistance of thermistor R'l' at the If the oven gets too hot, the resistance of R.r
desired temperature. The oven temperature is sta­ becomes less than R2 plus R3• (RT is 50 kilohms at
bilized when the current through D!.! and Ct on 25°C and decreases as temperature rises.) The cur­
the positive half-cycle and through Ct and Dt on rent imbalance places a negative voltage on C1 ,
the negative half-cycle are the same; there is no dropping the level of Vu. This delays the firing
net charge on C1, and Vm is zero. of the scr and reduces the heater current.
When the oven is too cold, the resistance of R·.r After the scr fires, its gate voltage rises slightly,
exceeds that of R2 plus R3, so less current flows tending to charge Ct positively. This effect is
through C1 and D1 on the negative half-cycle. The minimized by Rt.

+48v
Forward feed stabilizes
d-e differential amplifier

By F .J . Sordel lo
Systems Development Division, Rt
I nternational Business Machines Corp., 2k
San Jose, Calif.
Q3

Common-mode noise and thermal drift are canceled LOW- LEVEL

DIFFERENTIAL OUT P U T
out in d-e differential amplifiers when the input D -C INPUT
signal is fed forward. This technique allows the R2 300
amplifier at the right to be operated in a stable 2k
manner at a gain of 2,000. The conventional ap­
- 3v
proach, feedback of the amplifier signal, causes in­
stabilities because distortions of the signal by con­
stant current generators are also fed back within
the circuit.
Designed as a high-gain d-e preamplifier, the ALL TRANSISTORS
feed-forward circuit amplifies differential d-e signals 2 N f 3f6

of low level from a velocity transducer and applies

+ 48v
them to a bridge power supply. The bridge circuit
delivers up to 2.5 amperes to a servomotor located Common-mode signals are combined with the
in an IBM 2310 disk storage drive. Unwanted sig­ thermally generated base-emitter voltage of
Q. and applied to the emitters of Q1 and Q.; the
nals that are picked up in the transducer leads combined signal balances out common-mode noise
combine with the drift in the base-emitter roltages and compensates for changes in temperature.
of Q1 and Qr-typically 2 millivolts per degree
centigrade--to produce a common-mode signal. The
undesired signals are amplified 2,000 times by each
transistor and are not canceled by the differencing nals and apply them to the base of Q3• The common­
action of the amplifier. mode signals are passed by Q8, which adds its
The large signal errors that result may cause base-emitter voltage drop and applies the sum to
serious problems . For example, when a degree the emitter of Q1 and Q2. Because Q3 is identical
change in temperature causes a 2-millivolt change to Q1 andQ2, it has essentially the same thermally
in the base-emitter voltage of either transistor, the generated base-emitter voltage drop, even though
change is amplified and appears as a 4-volt change its bias is much lower. Thus, the output signal from
at the collector; the 4-volt shift is enough to trigger Q" includes both the thermal-drift voltage and the
the bridge. These spurious triggering pulses can common-mode noise. The combined signal cancels
destroy the bridge by turning on both sides at those at the base of both transistors Q1 and Q2 and
once. provides a locked-in temperature compensation for
Resistors R1 and R2 pick off common-mode sig- the circuit.

124
 Ci rc u it design

Designer's casebook

be connected to the collectors of the flip-Bop

Modified flip-flop through a coupling resistor and would be biased
through a resistor divider connected between the
q uadruples fan-out supply voltages. The amplifier would tum off when
the Hip-Bop to which it is connected is turned on.
By D.J . Grover):� The problem is that the current available for back­
biasing the amplifier is partially shunted by the
Marconi I nstrument ltd. , St. Albans, England
divider network. When 10% tolerances on resistor
values and supply voltages are considered, the loss
in driving current can exceed 40% per stage. By
Fan-out to as many as 60 other logic circuits is connecting the amplifiers as shown in the sche­
achieved with the Hip-Bop shown below by driving matic, Q1 and Q3 or Q2 and Q4 tum on and off to­
the bases of amplifier stages Q1 and Q2 directly gether, and the only loss in driving current is the
from the emitters of Qs and Q4• The circuit is a small amount shunted off by the bleeder resistors,
worst-case design allowing for a transistor current Rt and R2. As a result, the fan-out may be in­
gain (/3) as low as 15 and permitting at least 10% creased by a large factor.
tolerance on component values and power supply Change-of-state occurs when a positive pulse
levels. The circuit improves the fan-out capabili­ is applied at the trigger input. The output has
ties of a conventional circuit designed on the basis a one-microsecond rise time, and will drive 60
of a worst case analysis by a factor of 4 to 1. gates-each with an input impedance of 24.000
In a conventional circuit, the amplifiers would ohms to -20 volts. If Q, and Q2 are replaced by
• Formerly with Standard Telephones a nd Cables, Ltd. transistors with betas greater than 50, the fan-out

�------�---.--��- + 20 V

Rt TRIGGER R2

6
6.8K 47K 47K 6.8K
SET RESET
Dt D2

33K 33K

n on

10K 330p F 330pF 10K

s\ K
R

�------+---��--�--�� -20V
DIODES - H G 5004
Directly coupled amplifiers, 01 and O:r i mprove current transfer efficiency when the tolerances on
components and power supply voltages are large. As a result, the flip-flop can pulse 60 other circuits.

125
of the circuit can be increased to about 200. the improvement in current transfer to the bases
If the emitter leads of Q3 and Q4 are opened of Q1 and Q2 which guarantees that the output
at points A and B and are then connected to stages will be saturated under worst case condi­
ground, the inner circuit becomes a conventional tions.
Hip-flop. The grounded emitter is simulated in The comparatively low values of R1 and R2 are
the complete circuit by holding the emitter of Q3 necessary for reducing the turn-off time of Q1 and
about 0.3 volt above ground, either by the diode Q2. Components D1h DG, D1, D8, R5 and R6 prevent
D1 (if Q1 and Qs are not conducting) or by the saturation of Qa and Q4. If timing and triggering
base-to-emitter voltage drop of Q1 (if Q1 and Q3 are sensitivity are not critical, these seven components
conducting). The slight variation in voltage at the may be removed if the values of Rs and R4 are
emitters of Q3 and Q4 reduces the efficiency of reduced to supply sufficient base current to Q1
the flip-Hop. This is compensated, however, by and Q2.

by the gain of a transistor in the circuit.

Novel sweep circuit The modified circuit shown below eliminates
the voltage pedestal by connecting the timing ca­
eliminates ramp pedestal pacitor C2 directly to ground. The slope is inde­
pendent of the gain of Q4, and may be varied
By Gilbert Ma rosi through a range of 100 to 1 by adjusting potenti­
ometer R4. In addition, the width of the gating
General Precision, I nc., Sunnyvale, Calif. signal pulse may be varied from 1 to 500 micro­
seconds. Furthermore, since the recovery time of
Phantastrans, transistorized versions of phantastron the circuit is very short, the duty cycle can be as
sweep-circuits, are used extensively to obtain linear high as 98% .
ramps and gating signals for timing circuitry. A In the stable state, Q4 and Q5 are o ff and all other
standard phantastran has two disadvantages. The transistors are conducting. Because Q1 is saturated,
ramp begins on a voltage pedestal instead of at the voltage across C2 is about 0.7 volt negative
ground because the timing capacitor is connected with respect to ground. The emitter of Q2 is almost
to ground through the base-emitter junction of a at ground potential. A positive trigger at the base
transistor. The second disadvantage is that the of Q1 forces Q1 to turn off and turns on Q4 and Q5•
slope of the ramp is limited to a range of 20 to 1 All other transistors continue to conduct.

Rr
1.5K

02
2 N 2635
GATE
OUT
GND
� ---+1 � 4 3. 5 � 5

c1

JL IN 100 pf

--1 ��---+-
+15V
-�-----+--�
R1 o Ru
,_
22K _
Z�
K r--- WI DTH CONTROL
RAMP ....�
.,_
__ _

GND OUT
--------�
0 TO +1 5 V

�-
Phantastran circuit provides a linear ramp and gating pulses. When repetitively
triggered, the gating pulses at the two output terminals are complementary.

126
 Because Qa is a high-gain transistor, its input where Vc2 is the voltage across capacitor C2.
impedance will be at least 10,000 ohms even if Since the base of Q4 may be considered to be at
potentiometer R4 is short-circuited. As a result, the ground potential, 111 is a constant whose value is
resistance divider consisting of R5 and RG is not determined by R11 and the voltage on the width­
loaded down by Qa, and the voltage at the base and control terminal. Therefore, from the equation, as
emitter of Q3 remains constant at about - 12 volts. Vc2 increases, IM decreases. When lb4 = 0, Q4 stops
Therefore the emitter current is constant, causing conducting and turns on Qt. c2 discharges very
c:.! to charge linearly, resulting in a ramp at the rapidly through Q1 and D2 and the circuit returns
emitter of Q". Its slope is inversely proportional to to its stable state.
(R:{ + R4)C2. Rt at the emitter of Qa is a boot­ Since the width-control voltage determines the
strap resistor needed to maintain linearity at slow­ magnitude of Itt it also determines the amplitude
sweep rates. of the ramp because of the relationship between
The manner in which the circuit returns to the lu and Vc2 expressed in the equation. With the
stable state is dependent on the currents 1('5 in width-control voltage fixed, varying R4 varies both
the emitter of Q5 , Ib4 in the base of Q4, and 1 11 the slope of the ramp and the width of the gate.
flowing through R11• Neglecting the voltage drop With R4 fixed, the slope is constant and varying
across the base-to-emitter junction of Qt and as­ the width control changes both the width of the
suming the emitter of Q2 is clamped at - 15 volts, gate and the amplitude of the ramp.
then For the gate and ramp shown in the schematic,
the value of R4 is 1,000 ohms and the width-control
voltage is 0.4 volts.

fully on or fully off at the same time. In a conven­

Gated m ultivi brator output tional circuit, the first few pulses will vary in width
because the charge on the capacitor during standby
provides constant pulse width is greater than the maximum charge that occurs
during operation. In this circuit, zener diodes D5
and D6 maintain a constant pulse width by forcing
By Reed Newmeyer the capacitor-charging cycle to start at 5 volts.
Sperry Utah Co., Salt Lake City, Utah Standoff diodes D2 and D3 are back biased when
Q2 and Qa, respectively, are not conducting. As a
result, the outputs are clamped to either the 6-volt
A train of pulses-all of constant width and free supply or to a few tenths of a volt above ground,
of transient spikes-are produced whenever a 6- depending whether the transistors are on or off.
volt gate is supplied to the base of Q1 in the multi­ Clamping diodes, Dt and D2, insure immunity to
vibrator shown below. The pulses may be used to noise spikes. Because of the clamping diodes, the
drive stepping switches, to test circuit response and output pulses are about 6 volts. Larger pulses may
to operate counting circuits. be obtained by raising the clamp voltage or by re­
When the gate is applied, Q2 and Qa are turned moving Dt and D2 from the circuit.
on and off as in a standard multivibrator. Since If the gate is removed, the circuit will stop sup­
Qt and Q2 are connected in series, they are either plying pulses when Qt and Q2 are turned off.

27K

o v�
GATE
6.8 K
tOK

Complementary pulse trains appear at outputs one and two whenever a 6-volt gate is a pplied to the base of Q1

127
Circuit design

Designer's casebook

The wiring change involves breaking the trigger

Mod ified decade counter input lines on stage 4 and connecting side A to the
2° output of stage 1, and side B to the 22 output
eli m inates com ponents of stage 3. Negative-going trigger pulses from stage
1 do not affect stage 4 until it has been flipped by
a negative-going pulse from stage 3.
By Ph i l Wa rd Stage 4 is flipped for the first time at the count
Texas Instruments, I nc., Dal las, Tex. of eight, and causes the counter to hold the binary
number 1000. In this count, stage 4 has the 1 out­
put. The ninth pulse forces the 2° output of stage
Because the binary-coded decimal counter shown 1 to go positive and makes the counter read 1001.
below has no capacitively coupled feedback cir­ Therefore the circuit operates as an ordinary binary
cuits, it increases the operating speed of the cir­ counter up to and including the count of nine.
cuit. By using a simple wiring change and adding While the circuit is holding the count of nine, the
a single diode, D5, the circuit returns to its initial 1 output of the fourth stage, through diode Da,
state at the count of 10 rather than 16. The modi­ reverse-biases the trigger gate of stage 2 so that
fications are shown by the heavy lines. it will reject the next pulse from stage 1. How-

3
/_ . 2'

23
22
en
....
:::1 22
Q.
21
24
....
:::1
0

20
�
.....
-t2V

T r
Rt • ��>..R
+t2 V
� �
rl-� � �
II ,..__ II
> : .. 2 . 2 K
�
Rt • .,. R t 82K�-��� 1

�0�
82K "'
. .. 2.2 K .
• 82K 2.2.< • :> 2 . 2 K : .,.82K STA G E 3 STAGE 4
� - � -

OK

� ��·r-·
� �
-
� R2 5 K :: � t 5K 15K:
�
.. .�
t5 K >t s K
.,. R 2 R2 � R2 �
00 10 100 100 "'t5K f
.,. tst<:> t 5 K, ,> . .,. .
. ..
'""'
.._,
..
._..
�
___...._
...
� o, � � � �
:: �270 a, 02 270; ';:: ;�270 21o; ;::: ::;::: 270 zro;:=:: ;�270 270;�
-
- -
f5K'� 45K 45K � 15K · �
> ,>
TRIGG E R > TRIGGER � B
I N PUT LINE I N PU T L I NE --
I NPUT � �

R F S FT

ALL TRANSISTORS 2 N t 304 ALL CAPA C I TORS IN PF

ALL DIODES f N 645 ALL R ESISTORS t / 2 W ± 5%
Decimal counter operates at the maxim u m repetition rate of the flip·flop stages. Heavy
l ines in the schematic indicate the changes that have been made in the basic circuit.

128
 ever, the tenth pulse still forces the output of stage its trigger circuit. Decade counters which use ca­
1 to reset to 0, and this negative pulse resets stage pacitively coupled feedback require time delays to
4. The outputs of stage 1 to 4 now read 0000 and allow the feedback pulses to advance the count
the binary-coded decimal cycle begins again. properly and to permit transient counter states to
This method of advancing the count reduces the subside. This circuit uses no feedback pulses so no
number of circuit components. It also permits the transient counter states occur. The only critical re­
binary-coded decimal counter to operate at the quirement is that the collector load resistors, R1 , be
maximum repetition rate of the basic flip-Hop and small compared to the trigger circuit resistors, ll2.

output at a full load of 3 amperes will be held to

Tunnel-diode sensor protects within 99.05% of 28 volts. With an input voltage
of 35 volts, and a load current varied from 0
regulator from short circuit through 3 amperes, the output voltage will be main­
tained within 99.85% of 28 volts. When switching
from half-load to full-load, the response time-the
time for the output voltage to return to within 10%
By Jack Takesuye of its initial value-will be less than 4 microsec­
Motorola Semiconductor Products, I nc., Phoenix, Ariz. onds.
The basic circuit, at the right in the schematic,
is subject to short-circuit overload. Under normal
Short-circuit protection, excellent regulation and conditions, output voltage is regulated by the series
fast response to changing load conditions are pro­ pass-transistor, Qt. The drive for Q1 is obtained by
vided by the series regulator shown below. With an sampling the output voltage of the regulator with
input voltage ranging from 30 to 40 volts d-e, the the voltage divider R1, R2 and R3• This sampled

r- - - - - - - - - - - -- -- - - - - ,
0.12

51 91
O.t

tK
Dt tOK
1N2767A r.

Oa Oz
r - - - - - - - ., Q4 Q5
2N697
2N2042
2N2800 2N2800
OUT

R3
330

tK 2.2K 2.2K

.!�!..� - �f:!!�! _ .J L � RCUIT

OVER LOAD DELAYING BASIC
L _ _ _ _ _ _ _PRO ______ J _ _ ___ _ _ _ _ _ _______ ....J
Regulator Includes an overload circuit-to protect the series pass-transistor, Q1,
against damage from short-circuited loads-and a delaying network to prevent oscilla·
tions when connected to a capacitive load. The network doe s not i ncrease the response
tim e u nder varying load conditions.

129
voltage is compared to the reference voltage pro­ applied slowly, minimizing the surge current. How­
vided by the zener diode D1. The difference between ever, a simple RC-delaying network would degrade
the two voltages is amplified and drives Q1 to mini­ the response time (full to half load) of the regulator.
mize the difference. If the output terminals are To slowly apply drive to the series pass-transistor
short-circuited, Q1 is driven fully on in an attempt and maintain good response time of the regulator,
to maintain constant output voltage. the delaying network is added to the circuit. The
Under these conditions, Qt will operate at maxi­ voltage to drive Ql builds up slowly because cl
mum collector-to-emitter voltage and collector cur­ must be charged through R4 and R.,. This results
rent, and can be damaged from excessive heating in a slow-rising voltage at the collector of Qa and
or secondary breakdown. If secondary breakdown minimizes the surge current when the regulator is
does occur, Q1 cannot be protected by fusing be­ turned on. Once the capacitor C1 is charged, diode
cause transistor failure may occur in a few micro­ D2 is back biased and decouples the delaying net­
seconds; the fuses will not open quickly enough. work from the regulator circuit; therefore, no loss in
To protect Q1 from damage, an ovPrload-sensing response time is noticed from full-load to half-load
circuit consisting of tunnel diode D4 and transistor steps.
Qs, is used to trigger a monostable multivibrator, Potentiometer R6 in the overload protection cir­
which removes the drive from Qt . This turns off cuit is adjusted to turn off the regulator when the
the regulator circuit until the multivibrator resets. load current exceeds 3.5 amperes. This keeps the
If the overload still exists, the regulator is again load line within the safe limit of the operating char­
turned off. This type of protection would be ade­ acteristics of the series pass-transistor, Q1 •
quate for resistive loads, but for large capacitive The overload problem in series-regulator voltage
loads, the surge current charging the capacitor also supplies can be solved by many unique circuits.
would cause the overload protective circuit to turn Various factors such as cost, reliability and per­
the regulator off. If the capacitor is discharged by formance determine the type of overload protection
a shunt load, the overload would trigger again after that should be used. The protective circuitry in this
the regulator turned on. This could result in a design increases the reliability of the series-reg­
low-frequency oscillation. To eliminate this prob­ ulator supply without degrading its performance
lem, the drive to the series pass-transistor can be capabilities.

Isolating transistor
i mproves one-shot OUT

By J ozek Ka l isz
Institute of Nuclear Research, Warsaw, Poland
IN

Several Improvements in one-shot multivibrator

performance are obtained by adding transistor Q1,
as in the circuit at the right. The triggering cir­
cuit is isolated from the timing circuit, allowing
the duration of the output pulse to be fully inde­
pendent of the input pulse amplitude. In the con­ ALL TRANSISTORS 2N404
ventional triggering method, shown by the com­ Trigger inputs at the base of � are isolated from
ponents in the dotted lines, a 50% change in pulse timing elements R:�Cs, reducing the pulse-width variations
duration may occur as trigger amplitude is varied and improving trigger sensitivity and recovery time.
from one through eight volts.
Another improvement is that the minimum trig­
gering voltage is reduced from 0.25 to 0.1 volts.
Furthermore, the circuit provides increased input reduces the variation in output pulse width caused
impedance while reducing recovery time. Fast re­ by temperature, because Ra and temperature-sensi­
covery is obtained by allowing C1 to discharge tive diode Dt no longer shunt R2.
through the low-impedance, base-to-emitter path Except for the addition of transistor Q1, the cir­
that appears when Q1 and Q2 conduct. Isolating cuit has the same number of components as a
the trigger input from the timing-circuit R2C2 also standard one-shot multivibrator.

130
 Reference sheet

• •

Sl es1
- -

Chart el i m i nates need for sepa rate calcu lations

for nonstandard data channels reducing design time

By J . K. Pu lfer and A.C. H udson

National Research Council, Ottawa, Canada

When nonstandard data channels are required for The relevant parts of a typical f-m/ f-m system
an f-m/f-m telemetry system, the nomograph on are shown by the block diagram on page 102. The
page 103 permits rapid calculation of the channel parameters that specify each channel are listed on
parameters, and indicates the tradeoffs that result page 103, and these are interrelated by the nomo­
in the best system design. graph. Quite often the carrier modulation index
In f-m/f-m telemetry, data is transmitted by fre­ and the subcarrier signal-to-noise ratio (SI N), are
quency modulation of an audio subcarrier oscilla­ unknown, but can be rapidly determined by the
tor, which in turn frequency modulates an r-f nomograph as shown by the examples in this ar­
earner. ticle. At other times, these two parameters must
•

The flexibility of this telemetry system makes be fixed; then with the help of the nomograph,
it attractive for many applications. A wide range the designer can determine other parameters, such
of data formats, bandwidths and accuracy require­ as the input and output bandwidths that will suit
ments may be met with a single f-m/ f-m system. the two fixed parameters.
However, data channels often require param­
Nomograph shows limitations
eters that do not conform to the standard format
specifications of IRIG (Interrange Instrumentation The cross-hatched region on the input S jN ratio
Group). For these, a separate design optimization scale indicates a limitation imposed by the dis­
must be made. criminator input threshold. The threshold may
occur at any SjN ratio below about +12 decibels,
depending on the design of the discriminator in
The authors use1 • If the input S/N ratio is below threshold, the
J . K. Pu lfer, a research officer
discrin1inator output noise will contain an impul­
with the Cou ncil's space electron ics sive noise component as well as the inevitable
section, is engaged in rocket Gaussian component. The user wanting to operate
' ' ,.$
. 'f:"::,
telemetry and data processi ng. He a system in this region must consider the effects of
.. ,..
·.

..

. }�j ··.
,

. .
.

was g raduated from the Un iversity impulsive noise on his particular signal format, and
of Man itoba i n 1953.
interpret the output SjN accordingly.
The large cross-hatched region, shown in the
center of the charts, represents a zone in which
a significant portion of the signal spectrum will
fall outside the discriminator input filter bandwidth.
A. C. H udson, who works on radar The dotted boundary is based on an ideal rec­
receivers and u ltrasonics at the
tangular filter. The solid boundary is based on a
Cou ncil's Laboratories, was formerly
e m ployed by Research Enterprises, filter having a simple 6 db/ octave roll-off. Most
ltd. He was g raduated from the filters fall between these two extremes.
University of Toronto in 1941. The complete nomograph is reproduced at the
bottom of page 102 to illustrate the use of the chart
in some practical examples. For each channel the
nomograph is used twice, once for the first dis-

131
 Step 3
I--- SECOND DEMODULATION �_I a
� Draw a third line from C2 to 40 db on the out­
...I
G. FIRST DEMODULATION ---l � put S I N scale, and read its intersection with the
2
c Q input SjN scale as 14.2 db.
.....
BAND -
P ASS FIRST BAN D -
PASS SECOND LOW - : Having established that the input S I N ratio for
I
.... DISC. ""T"-•
DISC. PASS
2
FILTER l FILTER F ILTER S the second discriminator must be at least 14.2 db,
0
a: I �
- the nomograph is used again with values relevant
.....

' r-, r -, ,- - , � to the first demodulator.

CHANNEL 2 -•Jio k.. ... .. f-.. J. _; Intermediate frequency band pass == 500 kc
: L - .J L - -1 L - .J First discriminator output bandpass == second
discriminator input bandpass == 10.5 kc
1 r - , r - , r- - , The desired output SIN calcu1ated above ==
CHANNEL 3 -•• �... .... ..... 1- ..
I L - .J L .J L - .J
ETC. 14.2 db
- A minimum input SIN == 12 db.
Step 4
Parts of the f-m/f-m system to which the no mogra ph
appl ies. The nomograph is used for calcu lations applyi ng
to the first discrimi nator a nd aga i n , for the Draw a line from 10.5 on the output bandpass
second discri minator. scale through 500 on the input filter scale to inter­
sect Ca.
criminator and once for the second discriminator.
If the lines drawn across the nomograph enter either Step 5
of the two cross-hatched regions, difficulties will Draw a line from the output S I N of 14.2 db
occur as described above. through the input S jN of 12 db to intersection C4.

Example 1. Consider a 70 kilocycle-per-second Step 6

subcarrier channel in a standard IRIG f-m/f-m Join C4 and C3 , intersecting the modulation in­
system. Conditions at the second discriminator are: dex scale at 0.27.
Second discriminator output low­ Thus, the necessary modulation index for the 70-
pass filter bandwidth == 1.05 kc kc subcarrier is 0.27. This means that the carrier
Second discriminator input filter peak deviation caused by the 70-kc subcarrier is
bandwidth == 10.5 kc 0.27 by 70, or 18.9 kc.
Deviation ratio == 5: 1 The line joining Ca to C4 is well above the cross­
Desired output S I N == 40 db hatched region, indicating that the i-f bandwidth
The first step is to consider the second demodu­ will not be fully used. There are two reasons for
lator stage. The SjN input to the second discrimi­ this: first, the remainder of the subcarriers and the
nator can be determined with the aid of the nomo­ resulting increased overall carrier deviation has
graph. not been taken into account; second, a small factor
of safety has been inserted in the standard IRIG
Step 1 format to allow for transmitter frequency drift.
Draw a line from 1.05 on the low-pass scale at
the left side of the nomograph through 10.5 on the Example 2. Consider a situation in which the
input-filter bandwidth scale to intersection cl . output bandwidth and S I N ratio, required by the
data to be telemetered, cannot be met by any of
Step 2 the standard IRIG channels :
Draw a second line from C1 through 5 on the Second discriminator output low-pass filter
deviation scale to intersection C2• This line inter­ bandwidth == 1.5 kc
sects the cross-hatched region, based on an ideal Required output SjN == 45 db
rectangular filter, but falls outside the area based This channel is to be interleaved with a standard
on a filter with a roll-off of 6 db per octave. Be­ system, so that all other parameters such as a
cause the discriminator input filter used with most subcarrier deviation of + 7.5% must remain un­
IRIG f-ml f-m telemetry systems has a skirt slope changed. If the data bandwidth is increased to 1.5
greater than 6 db per octave, the error introduced kc, while maintaining the deviation of +7.5%, then
by using the nomograph is small. the deviation ratio will be decreased to 5 by 1.051
1.5 == 3.5.
Proceeding as before, the required S/N ratio at
10. 5 READ c4 the output of the first discriminator this time is
500
24 db. Using this result, a second pass through the
READ
c3 nomograph shows that a carrier deviation of
5 c2
+ 57.4 kc is needed for this channel.
40 DB
c1

10. 5 14.2 DB

Reference
Reproduction of nomog ra ph i n dicates the steps out­
1. Kenneth M. Ug low, "Noise and Ba ndwidth I n F-m/F·m
li ned i n exa m ple 1 . The effect of entering either Radio Telemeterlng," IRE Transactions on Telemetry and
cross-hatched region i s described i n the text. Remote Control, May 1957, p 19.

132
Nomograph for design of f-m/f-m telemetry system

100 5000
30 4000
80 0· 1
-
3000
-
90 DB 90 D B
- 20 60 -
2000
-

U)
-

U) 50 U) 0· 2 80 DB
C( -
U) X
<( 80 DB
CL
CL 40 LLI
I 0· 3 0
I
1000 c -
-

c -
z 1- 70 DB
30 �
U) 800 - 0· 4
.....
-

z 10 <(
- 0
0·5 0:::
�
C( 600 -
...J
.....
z z 60 DB 70 DB
-
m 0· 6
8
�
-
500
-

- � 0 LLI
-
<(
.....
U)
20 LLI 400 0·8 - 0:::
�
U)
... .....
U) 6 <( 5 0 DB
.....
0
300 I ·0
r-
- ...J
- z LLI
I
<(
z 5 -
z
U)
� U)
-
60 0B
� 200 c
.....
� 0
40 DB 0
I
0
:i
-

2
>-
4 - >- -
z
z z I
.....
z ...J
10
C( <( 0::: <( 3 0 0B 0
50 0B
0
3 c 1 00
I
- 3 z t-
;t ...J
- - 8 ...

80 (!)
t- c
z -
,.
z .... 0
-
4 U) 2 0 DB
1- <(
z
c 60
<(
-

c 2 6 z 1- 5
.....
-

;t
-
50
3t
-

<( 40 D B
m a:
6 ::::>
(!)
-
5 c 40 I O DB U)
c n.
8
z z ..... 30 z z
4 <( 0 10
-
1-
::::>
C( � -

.....
m n. 0 DB
�
ID
<(
30 DB
3
20 n.
..... .....
z
.....
1 .0 -

::::> >
-

� - ::::>

�
- I O DB
-

0.8 CL 20 0
.....
CL LLI
.....
::::>
-

2
c
10
�
0 30 2 0 0B
0 0.6 8
r-
0.5 - 6 40
- 5 50
0.4 - 4 60 I 0 DB
I 3 80

Data channel parameters

In put filter bandwidth Subcarrier deviation ratio
Su bcarrier in put filter bandwidth Ca rrier signal-to-noise ratio
Data channel (low-pass) bandwidth Subcarrier signal-to-noise ratio
Carrier modu lation i ndex Data chan nel signal-to-noise ratio
 Refe rence sh eet

• •

w1n- I

I n two q u ick steps, an engi neer can eas i ly determine the va l ues of components
needed for a twi n -T fi lter that has a symmet rical responsive curve.

By Tom G. Pu rn hagen
Air Force Cam bridge Research Laboratories
L.G. Hanscom Field, Bedford, Mass.

A nomograph greatly simplifies the design of

twin-T notch filters that have symmetrical response �
(a)
curves. Such filters are frequently used to reject a • '

specific frequency, or may be included in a nega­ c, c,

tive feedback loop of a selective amplifier as a ' R9
••
�
tuning element. Although other combinations of
ei
2 Ct :• Rt eo
, ...
•
components may be used , the one shown in the
schematic at the right has the greatest possible r "
selectivity. '-�
\Vith this general configuration, any filter exhi­
bits infinite attenuation at notch frequency f0,
which is specified by the values of R1 and C1• If the
aim is only to reject fo, then the choice of one of Twi n·T notch filter, with com ponent values
these values is arbitrary. In most cases, however, related as shown, yields maxi m u m selectivity and

it is also desirable to design the filter with a sym­

symmetrical gai n·frequency response.

metrical response curve, so the d-e gain is equal

to that at high frequencies. These conditions are Two nomographs based on equations 1 and 2
accomplished when are shown. The usual design problem requires the
solution for values of R1 and C1 when fo, R, and
Rl = (�Rg RL) 1 '2 (1) RL are known. However, the charts can be used to
The notch frequency is determined by determine any of the equation parameters if two
are specified. Chart 2 can be used alone with R1
or C1 arbitrarily selected if symmetrical response
(2)
is not essential

The a uthor
Design example
Tom G. Pu rnhagen is a captai n A filter is required to have infinite attenuation
i n the U n ited States Air Force at a frequency of 800 cycles per second and it is
and is p resently assigned to the to be inserted between a source impedance of
Air Force Cambridge Research
. _.,
�, , '._._. - 2,000 ohms and a load resistance of 100,000 ohms
The steps in using the nomograph to solve this
.

Laboratories as a n electron ics

engineer. Previously, he served
as com m u n ications officer at various problem are indicated by the dotted lines. The re­
Air Defense Com mand rada r sulting values for the circuit elements are R1 =
stations i n the U .S. and Canada. 10,000 ohms from chart 1 and C 1 = 0.01 pi from
chart 2.

134
 S£1

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. ·

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 Reference sheet

To suppress trou blesome cu rrents on the su rface of coaxial cables,

a toroidal choke i s a n effective device. A cha rt helps design by
establ i sh i ng u sable choke bandwidth

By Ernest T. Ha rper
U .S. Army Electron ics Com mand
Fort Mon mouth, N .J .

Cable chokes, devices consisting of flexible minia­ cially if it is in a high-Q circuit.

ture coaxial cable wound on a ferrite core1 , furnish The new approach depends on operating the
a new approach to radio-frequency isolation be­ choke within a band centered at its self-resonant
tween points on a conductor. When measuring the frequency, the frequency at which the inductor
electrical characteristics of small antennas, par­ resonates with its own capacitance between turns
ticularly at high and very high frequencies, accu­ and any additional stray capacitance. To so operate
racy may be aHected by currents flowing on the a choke the absolute value of its admittance must
surface of the braided outer conductor of the co­ be below some specified value over the required
axial feed cable that usually connects the antenna frequency band.
to the measuring equipment. The currents are a Assuming the electrical length of the winding
source of additional losses and can produce extran­ is much shorter than a half wavelength at the
eous fields that contribute to the antenna's radi­ highest operating frequency, the equivalent circuit
ated field. of a coil consists, to a first approximation, of an
Cable chokes can suppress the currents by pro­ inductor L shunted by a capacitor C. This circuit
viding a high r-f impedance between opposite ends is true for most ferrite core inductors, particularly
of the outer conductor, as illustrated in the sketch for a toroidal inductor wound on a ferrite core,
at the top of the facing page. and designed for use in the h-f band.
This concept for providing broadband r-f isola­ The conductance, representing the conductor's
tion is new. Traditionally, a tuned circuit consisting ohmic losses and the magnetic losses in the ferrite
of an inductor shunted by a variable capacitor is material, is in parallel with both the susceptive
resonated. Although it works well, the approach is elements L and C. The susceptance of the coil is
frequency-dependent, necessitating a retuning of
1
the capacitor with every operating-frequency b = wC - (1)
change. Obviously, this can be inconvenient. Fur­ wL
thermore, the inductor may be easily detuned by If b,,, the maximum acceptable susceptance for
changes in environment such as temperature, espe- isolation purposes, is assumed to be much larger
than the conductance at resonance, then the fre­
The author quency limits for which b = ± bo is found by

ho
Ernest T. Harper is a captai n on active duty with the
::1::
Army Electron ics Com mand, cu rrently assigned to f1 ,2 = 4,.0 1 ::1:: ( 2)
antenna research at the I n stitute for Exploratory
Research . He received his master's degree from the
U niversity of Washi ngton in 1964, where he developed
The plus signs correspond to the upper frequency
novel microwave traveling-wave a ntennas in the limit f2, and the minus signs correspond to the
course of com pleting h is g raduate thesis. lower frequency limit f1 • The useful bandwidth is

136
expressed by MO NOP OL E'----... a BRAID ED OUTER CONDU CTOR
ANT ENN A I BONDED TO PLATE AND
COUN TERP OISE BY
f2 - rl = 2�c (3) METALLIC
COUNTERPOISE
CONN ECTOR ( NOT SHOWN)

Throughout this band, the susceptance, and there­

fore the absolute value of the admittance, will be I
•

't.--- I NSULATING
0

less than bo mhos.

A convenient method for determining the band­ ISOLATI ON PROVIDED CONTAI N ER
width is derived from a technique devised by W.P. BETWEEN THESE
TWO METALLIC ---- CABLE
•

1�
Czerwinski for obtaining the dynamic character­ PLATEs ---....._ • CHOKE
istics of parallel resonant circuits 2• An example is '

provided by considering a toroidal inductor formed

a'
from a core of Q-1 Ferramic, available from the BRAIDED OUTER CONDUCTOR
Electronics division of the Indiana General Corp., BONDED TO PLATE BY
wound with 16 turns of RG-196/ U miniature coaxial CONNECTOR ( NOT SHOWN)
COAX IAL FEED CAB L E --\---...\
cable. The chart at right, center, is a plot of capaci­
tance derived from measurements made with a
\Vayne Kerr model B801 admittance bridge, and
presented as a function of the inverse frequency
...- TO MEASURING
squared. EQUI PMENT
In the graph, the value of L is determined from
Isolator formed from m i n iatu re coaxial cable wound over
the slope of the straight line joining the experi­ a ferrite core provides h ig h r-f i m pedance between poi nts
mental data values. The value of capacitance C is a and a'. Spurious currents in the outer conductor of
read as the intercept of this line with the vertical the coax ial feed cable a re effectively suppressed.
axis. In the example, L == 59.2 11h and C == 1.9 pf.
Assuming a reasonable working value for bo of
0.2 millimho, and substituting in equation 2, the
limiting frequencies are found to be f1 == 8.8 Mhz, .- C = t. 9 p F

f2 == 25.6 Mhz. The admittance bandwidth of this .- C = 1. 24 pF; f2 • 25 M hz 1

L •4 2 =59.2ph (m=SLOPE)
inductor is therefore 16.8 Mhz. Throughout this 'F m
frequency band, the admittance will remain less
----- c = -3.6t pF ; t1 = 8.8 M hz
than 0.2 millimho.
The second chart illustrates the effect of addi­ f0 = t 4.9 Mhz
tional self-capacitance on the bandwidth and the
frequency limits of the toroid in the example. Such
an effect would result from placing the toroid
within a container that itself contributed stray .,___ FREQUENCY I N M hz
I I I I I I I I I
capacitance. The chart shows that the lower fre­ 25 1 5 tO 9 8 7 6 t 0 1 6f4f 2 .. 5
quency limit decreases slightly with increasing
0 10 20 30 40 50 60 70 80 90 1 00
capacitance, while the upper frequency limit de­
creases rapidly with additional capacitance, as does I nductance and capacitance va l ues a re determined from
the total bandwidth. measu red adm itta nce data plotted as a function of the
i n verse freq uency squared . Effective bandwidth of
To design a coil with a certain tolerance that the choke is easily calcu lated from the values.
allows for additional stray capacitance, the effective
bandwidth should be calculated by computing f2
with the stray capacitance omitted.
With the technique described, it is possible to
C = 1 .9 p F
design a minimum number of chokes to provide ' I
B W = 16.8 M e
a specified isolation over a wide frequency band.
C = 2 . 9 pF
The entire h-f band from 2 to 30 Mhz can be 1-----_...;-----1 Cc = 1 p F
BW • 1 1 Me
covered with only three chokes, providing 5,000 C II 3, 9 pf
ohms of r-f isolation. � ---
� --�� 3
B W • 8. M e
�--�l C c = 2 p F
The application of this technique need not be C = 4. 9 p F
I I Cc = 3 pF
confined to measurement, nor is it restricted to BW = 6.6 Me C c • CO NTA I N ER CAPACITY
antennas. The technique may be used wherever it _ c = s . 9 p_
...:.
F L a 591'h
1- ___ --II C c = 4 P F
is necessary to suppress radio-frequency energy BW = 5,4 Me
C • 6.7 p F
I BW = 4.8 M e 1 Cc = 4. 8 p F
over a wide frequency band.
� I I ' ' ' ' ' ' ' ' ' ' ' ' I I I
I I
tb I f5 20 25
References FREQUENCY I N M hz •

1 . E.T. Ha rper, "Ferrite Cable Chokes," Technical Report ECOM

Effect of stray capacitance on c hoke bandwidth is
2675, March, 1966.
2 . W.P. Czerwinski, "Obta i ni ng the equ ivalent circuits of inductors shown by chart. I n each instance the susceptance
graphically," Electronics, p. 70 Aug. 26, 1960. of the choke is less than 0.2 millimho.

137
 Refe rence sheet

1n s ou

Cha rt q u ickly eval uates performance of operational

a m p I ifiers from specified g a i n a nd offset pa ra meters

By Ed Sch uck
Rosemount Engineering Co., M i n neapolis, M inn.

The design and performance of op­ resent small, undesired signals gen­ (1 = C )
erational amplifiers can be con­ erated externally by the amplifier Eout -
- -

( 4)
veniently evaluated with the nomo­ and appear at its input. They can 1
- )
graph on the facing page. It relates never be perfectly biased away, (1 AB
vol tage gain, offset voltage and cur­ except at one moment in time,
rent and input impedance to output under one particular set of condi­ where,
error. Although based on a simple tions. Output error represents the C = the offset tcnn =
voltage amplifier, its application amount of deviation between ex­
can be extended to integrators, dif­ pected and actual output.
fcrentiators or other specific types By summing the currents that
of operational amplifiers by appro­ enter or leave node 1, using Kirch­
A = the voltage gain = Av
priate characterization of imped­ hoff's current law, an expression
ances Zt and Z2 , as shown in the for the output voltage can be found B = the feedback gain =
equivalent circuit below. in terms of the circuit parameters. 1
The standard parameters shown Thus:
in the equivalent circuit are the
input impedance Rtn, offset voltage
± Eorr, offset current Iorr and volt­
age gain Av. They are usually speci­ Therefore, the error equation may
fied by the manufacturer. be represented as:
:1:: lou = (1)
=
Offset voltage and current rep- Percent of reading error 100
But, (1 = C )
1 - (5 )
Eout =
EoAv ( 2) (1 - 1/AB)
And, when equation 2 is substi­ A nomograph based on equation
tuted into equation 1 an expression 5 evaluates the performance of an
'
for Eout is derived. Hence: operational amplifier quickly and
E
-

accurately.
=
t Eout Using the nomograph
- E our
For this example the impedances
+ r---+-+---'
(3 ) of Zt and Z2 were chosen as re­
-
-
-
- sistances Rt and R2 respectively.
The values were chosen so that
Equiva lent circuit for a n operational 1-
1 R2 == 10 Rt, thus, if no error were
a mplifier including internal Av present Eout would be 10 volts for
i m pedence R t n and offset voltage and an Etn of 1 volt. The manufactur­
cu rrent, Eou and lou, respectively. Equation 3 is in the form that re­ er's data provided the following
For a specific operational circuit,
lates Eout to the constants A, B and information regarding the internal
C and the external impedances Z1
such as a voltage a m plifier or
integrator, substitute the proper parameters of the operational am­
values for i m pedances Z1 and Za. and z2 . plifier:

138
 Ri n = 100,000 Nomograph relating gain, offset and percent of reading error
Eorr = + 1 millivolt c.o - 0. 1 0
Iorr = + 0.01 microampere
3
100 k -1 xto-
50k
Av = 50,000 20 k
- 0. 08
It is desired to design an opera­
10 k - e x t o - 4
tional amplifier that has a percent
error of 0.02. It is first necessary - 0 . 06
to evaluate the percent error for
the given parameter values. - 0. 0 4
Step 1: Calculate the values for
C and AB.
- 0. 02

Eo r rZ t
::t: IofrZt_
C = ::t:
m 3k 0
RinEin Ein <(
I
•

z
1 X 10-3 X 104 <(
- + 0.02
�
100 X 103 X 1
L LLI
�
<(
!:J
+
0.01 X 1Q-6 X 10 X 103
0 2k 0
1 >
0..
= 2 X 10-4 0
0
....1 u..

A = Av = 50,000 z
0

"" z
0
+ 0 . 08
0.. -
0 ..,_
B =
1 <(
�----- -
>
1.5k "" +0.10
0
4
+ 4 x 1 o-
a:
0
a: + 0. 1 2
a:
""
-
-
1
+ O. f4
100 X 1Q3 100 X 1Q3
1+ +
100 X 103 10 X 1Q3
+ O. f 6
= 1/1 2 r- +S x t o - 4
AB = 50,000 X 1/12 = 4.5 X 103 - 0. 1 8

Step 2: Locate the point 2 x 10-4

on the C scale of the nomograph. tk + 0 . 20

Step 3: Locate the point 4.15 x

1()3 on the AB scale.
Step 4: \Vith a straight edge con­ magnitude and sign of the offset
::i: Eou ::t:
nect the points selected in steps 2 term that would provide the re­ Ioff
quired accuracy of 0.02%, connect R. 1n
and 3.
Step 5: Read the percent error the point 4.15 x 1()3 on the AB Substitution of the C values
on the center scale. For this exam­ scale to the point +0.02% on the yields:
ple the percent output error is center scale by a line extending to
- 1 .4 � Eoff � - 5.4 millivolts
0.045% . Therefore, if E1n == 1 volt, the C scale and read the resulting
Ennt == 10.0045 volts. Note that this offset term, which is -0.4 x 10-4• Thus, if Eorr is compensated be­
percent error is not within the de­ This is the upper limit of the off­ tween these values while maintain­
sired range. set range. ing the same offset current as be­
Step 6: To determine the range, Step 7: To determine the lower fore, the required accuracy of
limit, connect the point 4. 15 x 103 0.02% can be achieved. Note that
on the AB scale to the point of the nomograph scales may be
- 0.02% on the center scale and changed if necessary by multiply­
-
read the resulting offset term on ing scale, AB, by a constant N and
the C scale, which is -4.4 x 10-4• dividing the other two scales by
Thus, the offset term C must be the same constant.
within the range Since the offset current and volt­
- E our
age are inherent in the manufac­
+ r- �C-
- 0.4 X 1Q-4 - � - 4.4 X 1Q-4
turer's design, the user has no con­
-
- The amount of offset correction trol over them. If he cannot find
- -
required is obtained by solving the another operational amplifier with
When impedances Z1 and Z2 a re following equation for Eou using the values desired, the designer
resistances of 10 and 100 kilohms,
respectively, this c i rcuit functions the limits of C found from the must adjust the values of Zt and
as a straightforward voltage a m plifier. nomograph: Z2 to achieve the required accuracy.

139
 Refe rence s heet

• •

u rves o I I a nee

The cha racteristic i m pedance of opti m u m reactance leads a nd the

correspond ing i n put i mpeda nce can be q u ickly calculated for u hf c i rcu its

By A. L. Rossoff
General I nstru ment Corp., H icksville, L. l . N .Y. ,

Parasitic lead impedances are a critical problem in �r·�------ 8 --------� 8 ( �2

ultrahigh-frequency circuits. In this frequency
range, circuits often require lumped reactive ele­
ments, but these elements cannot be wired into the Z o OR Yo X OR B
circuit without introducing additional distributed
lead reactance.
Leads connecting a lu m ped reactive element to a
In the microwave region, the dimensions of con­ uhf circu it are transmission l ines.
necting lines and impedance junctions are carefully
controlled. At lower radio frequencies, the problem
is usually solved with short and direct lead connec­
1 + (tan 8) /y
tions. This approach is not good enough for uhf Let Y = X/Z then X·/X
a, 1 =

circuits. The method described here for optimizing 1 - y tan 8

lead impedances makes use of design curves based Note that the ratio Xt/X is always greater than 1
on an analytical approach. It specifies the value of whenever 8 is less than 71'/2. To find the optimum
the optimum characteristic impedance for inter­ lead impedance, X1/X is minimized in the usual
connecting leads to a lumped reactive element. manner by taking dX1jdy, setting it equal to zero,
From this value, the conductor's diameter or width and solving for Ymtn which yields
can be calculated to realize the optimum impedance
for a lead of specified length and height. 1 - sin 8
Ymin = _
Assume that the leads of the uhf circuit are less --c-
o_
s8
than one-quarter wavelength long ( 8 < 71'/2) and
that attenuation can be neglected. Then, by stand­ Substituting back into the original expression for
ard transmission line theory, the expression for Xt/X gives
input impedance X, when X is a lumped reactive cos2 8
load is (X i /X) min = = F2 (8) ( 1)
( 1 - sin 8) 2
X/Zo
����
+ tan 8
= -- cos 8 1 (Zo)min
=
-- --

1- (X/Zo) tan 8 Then F (8) - -

(2)
1 - sin 8 X
- -

Ymi n
where Zo is the characteristics impedance of inter­
connecting line and 8 is its electrical length. Equations 1 and 2 are shown on the next page.
The curves also apply to a capacitive load.
2
Set the load susceptance equal to B, then F ( 8) =
The a uthor

��
. . . - .: . . - . • "'�
Bt/B, and F(fJ) = Yo/B where Yo is the characteris­
Arthur L. Rossoff is a vice president
.,. ' '
'

tic admittance of the line.

· ·

of the General I n stru ment Corp.

where he formerly was chief
Applying the curves
engineer of the Sem iconductor
d ivision. He has taught electrical The curves can now be used to minimize the
engi neering and i s the author of a parasitic effects of short interconnecting leads.
textbook, "Transistor Electronics."
Starting with a lead of fixed length 8 and a lumped
inductive load X, read the appropriate value of F( 8)
from the curve to determine {Zo)mtn, the value of Zo

140
 15

10

N
LL.

5
F2 ( 8 i

f2 ( 8 ;
�
I

10 10 20 30 40 50 60 10
8 ( DEGREES)
Design curves yield a ppropri ate va lues of F(o) and P(o) . Using these va lues, the characteristic i m peda n ce of fixed
length, opti m u m reacta nce leads and the m i n i m u m i n put i m peda nce of the c i rcuit can be ca lcu lated i n one step.

which yields the smallest possible value of Xt/X. the value of the minimized input impedance xi for
Leads with the required (Zo ) mtu can be selected any combination of lead-length fJ and load reac­
using the standard formulas for the characteristic tance X. If this value of Xt proves to be intolerable,
impedances of typical conductors: load reactance X or lead length (J may have to be
• For a round wire conductor, altered to get the desired input impedance.
A numerical example demonstrates the impor­
1 38
log10 (4h/d) tance of this analytical approach to optimizing lead
v E
impedances. If X == 100 ohms of inductive reac­
where d < < h, d is the wire diameter and h is the tance, the lead length is A./12 (fJ == 30° ), then, read­
parallel height of the conductor above the chassis. ing from the curves, F( 8) == 1. 73, and F2( 8) == 3.
(In a nonparallel conductor situation the average Using these parameters we calculate the optimum
height is probably a valid approximation for h.) characteristic impedance (Zo) mi n == XF( 8) == 173
• For a thin ribbon conductor of width d', the ohms, and the minimum input impedance xi ==
round wire equation above can be used to solve for XF2(8) == 300 ohms.
d and the approximation d' == 2d can be used to If, without any calculations, a wide ribbon lead
find the required ribbon width. is chosen for its low impedance, say Zo of 100
• For printed-circuit wiring with the underside ohms, the ribbon may add so much shunt capaci­
of the substrate metallized, the approximate for­ tance that xi increases to 373 ohms or 73 ohms
mula for the characteristic impedance of a micro­ higher than minimum Xi. A still lower value Zo,
strip applies, z == 377(h/w) t:r - ! , where h is the
.. say 50 ohms, carries the circuit beyond parallel
thickness of the dielectric, w is the strip width, resonance and Xi becomes capacitive.
and t:r is the relative dielectric constant of the sub­ On the other hand, if a fine wire lead is used to
strate. minimize shunt capacitance, Zo may well be larger
Usually h is fixed so that the diameter or width than 173 ohms. At 250 ohms, for instance, the input
of the conductor is uniquely determined by the impedance xi becomes 318 ohms or 18 ohms higher
above formulas. The F2(0) curve can be used to find than minimum xi.

1 1
 Reference sheet

s revea reaso n s
• •

cos m a 1 n e n a n ce

N omog ra ph reduces man-hou r ca lcu lations and provides an easy

way to p i n poi nt ma i ntenance procedu re problems

By G.W. Corley a n d Ha rold Faecher

Westi nghouse Defense a nd Space Center, Balti more, Md.

Maintenance stands out as one of the major factors In this case, the number of preventive mainte­
in the operational cost of avionics and airborne nance actions in a given time interval, Np, is cal­
weapons systems. About one-fourth of the annual culated by dividing the total operating time N of
Department of Defense budget is spent on it. 50,000 hours by the average time between pre­
To measure this factor the parameter "mainte­ ventive maintenance actions. Thus Np == 50,000/
nance man-hours per flight hour" (MMH/ FH) was 100 == 500.
set up. This parameter can be calculated in three The number of operating hours is 1.5, since for
ways: by using inputs based on performance pre­ every hour of flight, an additional 0.5 hour is de­
dictions, field data on similar equipment and en­ voted to ground checks, runway holding patterns
gineering data from pilot production. and other tests.
The nomograph on page 102 developed from a
need to cut down on the number of calculations
required. It presents all the factors contributing Glossary of maintenance terms
to maintenance man-hours per flight hour for any Mcto = mean active corrective maintenance time
system, and permits rapid analysis of the effects (arithmetic mean) at the organizational level
of changes in system maintenance procedures. (flight line).
The nomograph is based on the equation Mctr = mean active corrective maintenance time
(arithmetic mean) at the field shop level.
MMH (Mc to X Fc X Po + Mctr X Fc X Pi) K+ (Mp t X Fp X Pp) Mpt = mean active preventive maintenance time
------- = -------
(arithmetic mean).
F (' = number of expected corrective maintenance
FH N
tasks occurring during the representative op­
which is an expanded version of the maintain­ erating time period (N ) .
ability equation found in Military Standard 47!. F1) = number of expected preventive maintenance
tasks occurring during the representative op­
(Mil-Std 471 will supersede Mil-Maintenance erating time period (N ) .
26512). The equation is general enough to evalu­ Po = average number of personnel required to
ate other systems, including ground transportation perform organizational level corrective main­
systems and complex weapons systems. tenance.
The example illustrated on the nomograph is Pr = average number of personnel required to per­
form field shop level corrective maintenance.
an airborne high-frequency voice communications PP = average number of personnel required to per­
transceiver in need of repair. It is designed to be fonn preventive maintenance.
removed from the aircraft, replaced at the flight K = average operating hours per flight hour. This
line and repaired at the field shop. For this par­ is a constant nonnally greater than one since
ticular unit, the following factors are determined: the equipment is operated on the ground dur­
ing maintenance checks in addition to being
MTBF (mean time between failures) = 210 hours operated in Hight.
N = an arbitrary number of operating hours,
Mcto = 0 . 25 hours usually very large compared to equipment
Mctf = 4 hours failure rates.
Mpt = 7 . 5 hours

142
Examining cost and scheduling problems TOTA L MAI N T E N ANCE M A N
H OURS P F L 1 G H T HOUR
4.0 HRS M c t f X P f GRAPH
GRAPH 3 ( M e t X Fe x P0 ) t ( M ctf XFc X P t )
SHOP REPAIR TIME 3200 3 200
M c t t X Fc X P f
2BOO 2BOO
2400 2400
2000 2000

GRA P H 5
1 .0 H R
U SAGE FACTOR K
BOO ( M c t x Fc x P ) K
400

1000 BOO 600 400 200 200 400 600 BOO 1 0 0 0 3 2 0 0 4BOO 6400 8000

1 000 B OO 600 4 00 2 00 400 600 BOO t OOO 1 600 3200 4BOO 6400 8000 ,140 .tBO oiO"TV

M T BF SCH E D U L E D M M H / F H
MEAN T I ME
B E T W E E N FA I L U R E ®
t O.O H RS 1 0,000
G R APH 7 90
( M EAN I NSPECT I ON
BOOO
TIME)
7000
5.0 6000
HRS
G RA P H 6
Maintenance ma n-hours per flight hour nomog raph 2.5 ANCE MAN
provides maintainability engineers with a ready H RS HOURS PER FLIGHT
means of determ i n i ng cost factors and scheduling HOU� SCHEDULED
2 M pt X tp X P p
problems in systems maintena nce. M PT 1 000 N

1 000 BOO 600 4 00 20G .020 . 0 60 . 100 .1 40 . 1 80

N O OF I NS P ECT I O N S I N N ( F p )
.

®
 E F FECT OF Mp t AND INSPECTION I NTERVAL Additional analysis shows that Po = P1 = PP =
ON MAINTENANCE MANHOURS/FLIGHT HOUR 1 man .
.t60 r---.....,..,...,----
Procedure
.14 0
(MptXPpl The nomograph can now be used to determine
.120 the major contributors to the maintenance burden
of the airborne receiver.
.tOO • Enter graph 1 at point A (MTBF = 210 hours)
%
I.&. and proceed vertically to point B. Point B repre­
.....
x .080 •Mpt= MEAN sents the number of expected corrective mainte­
:E INSPECTION
2 TASK TIME nance actions (Fc) in a given time interval N (50,-
NUMBEROF MEN
'060 · P p : RE Q UIRED TO 000 hours was the time interval used in the prep­
PERFORM TASK ( • t )
040 N : INTERVAL OF INTEREST aration of this example).
( •50,000 HOURS
•

• From point B move horizontally on graph 2

•

MMH/FH (SCHEDULED) = to intersect the line representing 0.25 hours (Mcto

X p ) at point C.
.020 N
M pt•P p1 INSPECTION INTERVAL 0

N • Enter graph 1 at point D (MTBF = 210 hours)

10 20 30 4 0 50 60 70 80 90 tOO 110 120 130 and proceed horizontally to point E.

INSPECTION INTERVAL (HOURS) • From point E move vertically on graph 3 to

intersect the line representing 4 hours (Mctt x P1),

EFFECT OF Mc t t AND MTBF ON MMH/FH at point F.
• From points C and F move vertically and hori­
.t60
HOLDING Meto CONSTANT
zontally to sum the two quantities on graph 4 at
.140
MMH/FH (UNSCHEDULED) = point G.
[ Mcto•Po Fe + Mctt•Pt•Fc J 1.5
x • From the summing point (point G) move hori­

.120 N zontally on graph 5 to intersect the line represent­

• N = 50,000 HRS ing the usage factor (K) of 1.5 (operating hours per
.too •
F.
-
e MTBF
N Hight hour) at point H.
X • From point H move vertically to intersect the
Ll.
•
P0 = ����:������I GHT LINE
� .080 •
Pt NUMBER OF SHO P
=
line on graph 6 at point J; then move horizontally
:E TECHNICIANS = t
:E on graph 9 to determine the unscheduled mainte­
•
Mcto= 0. 25 nance man-hours per Hight hour (0.029) .
.060
• Enter graph 7 at point K ( Np = 500) and pro­

.040 ceed vertically to intersect the line representing

7.5 hours (Mpt x Pll) at point L.
• From point L move horizontally to point M on

graph 8 then vertically to point N in graph 9.

• Sum the scheduled and unscheduled mainte­
tOO 200 300 400 500 600
MTBF ( MEAN TI ME BETWEEN FAILURES) nance times on graph 9 as shown (0.104 MMH /
FH).
For this example, the nomograph clearly shows
EFF ECT OF M eto AND M TBF ON MMH/FH that the man-hours given to preventive mainte­
HOLDING Mc t t CONSTA N T nance (periodic inspections) far exceed time spent
.f60
on corrective maintenance. If th e predicted main­
J40
MMH/FH (UNSCHEDULED) • tenance man-hours per Hight hour of 0.104 must
( Mcto 1 Po • Fc + Mctt1 Pt• Fc] 1.5 be reduced to 0.09 to meet a contractual require­
N ment, a more detailed analysis is required. A study
• N 50,000 HRS
=
of the nomograph and the sensitivity curves at the
N
• Fe = MTBF left shows that this can be accomplished by any
X P0 ����������H GHTLINE
Ll.
=
•
one of the following:
� .080 P = � • Increase mean time between failures from 210
:E , �����rtNi��p
:::1
·

.060 • Mctt= 4.0 to 425.

• Decrease shop repair time (Mctt) from 4 hours

to 1.85 hours .
.o40
• Increase interval between periodic inspections

from 100 hours to 125 hours.

• Decrease mean inspection time (Mpt) from 7.5

hours to 6.1 hours.

1 00 200 300 4 00 500 600 Once each approach has been analyzed and its
MTBF ( MEAN TIME BETWEEN FAILURES cost factors and schedule impact determined, a
Sensitivity curves for use with nomograph.
trade-off study will show which approach or com­
Analysis shows the effect of changes bination of approaches will eventually be the most
in maintenance procedu res. economical.

144
Ci rcu it desig n

IC ro m

I nexpensive s i l icon transistors acting as control led switches

el i m i nate external power sou rces and resu lt i n si mpler
more efficient c i rcu its than those bu i lt with diodes

By Pau l Abra m son a nd Al bert X. Widmer

I nternational Business Machi nes Corp., Yorktown Heights, N .Y.

An input signal about one milliwatt supplies all an input signal at either gate to perform the OR
the power needed to operate a variety of new function. However, to perform more complex logic,
transistor logic and gate circuits. These designs diode circuits require a power supply.
eliminate the costly chore of providing external
Common-base circuit
power to circuits scattered through a plant or
along a traffic-control route. The fundamental building block of all the signal­
Signal-powered diode circuits are common, but powered transistor circuits is the common-base cir­
these new circuits, made up of inexpensive silicon cuit shown on page 134. A positive signal Ve applied
transistors acting as controlled switches, perform to the emitter appears across the load resistor RL.
many more functions. The input voltage must drive enough base current
And because of their simple configuration, they through resistor Rb so that most of the input cur­
can easily be built as integrated circuits. rent can pass through the collector to RL. In this
condition the transistor operates in the saturated
Familiar signal-powered circuit.
mode. That is, the collector-to-emitter resistance
Signal-powered diode circuits, like the OR gate is minimum, resulting in minimum signal attenu­
shown on the next page, require no power other than ation through the transistor. The relationship be­
tween collector current and base current for satu­
The a uthors ration is
Pa u l Abramson joined the I c � � Ib
I nternational Business Machi nes
Corp. in 1 960. He is a n advisory where p is the transistor's common-emitter forward
engi neer for the compa ny's current gain.
Advanced Systems Development This relationship can also be expressed in terms
division, in the field of data
of the circuit's voltages and resistances as follows:
transmission and acq u isition.
Abramson is a graduate of the
City College of New York.
Ve - Veb
Ve - Vee

Albert X. Widmer is a staff engineer

In a typical application, the emitter-collector
with I BM ' s Advanced Systems voltage Vec will not exceed several tenths of a volt;
Development Division. Since join i ng whereas the emitter-base voltage Veb may approach
the company i n 1 959, he has worked 1 volt. Therefore, the factor [(Ve - Veb)/(Ve -
, _. . -.. ,. .
on logic design for peripheral
computer equ i pment. Widmer is
Vec)] is always less than one.
a graduate of the Federa l I n stitute
For input voltages less than one volt, it may be
of Technology, Zurich, Switzerland. necessary to eliminate Rb, permitting sufficient
base current to saturate the transistor.
The basic transistor signal-powered circuit is

145
A --- *"�-� Conventiona l diode OR different from the diode signal-powered circuit in
gate needs only the the following respects :
B �-- *"---+--- A+ B power of in put signal.
• Signal transmission through a transistor de­
More complicated logic
fu nctions performed by pends on the flow of adequate base current, as well
diode circu its, however, as the polarity of the signal; conduction through a
-
- req u i re a power su pply. diode depends only on the polarity of the signal.
• A negative signal applied to the output ter­
r-- vec 1 minals of the basic transistor signal-powered cir­
�-- -----------+� r-�- -- �-�
cuit is not transmitted to the input terminals; on
- -

the other hand, a positive signal will be transmitted

in the reverse direction but with less efficiency •

than in the forward direction. In the diode circuit,

a positive voltage applied to the output terminals
Tra nsistor i n common base configuration is basic circuit
will not appear at the input terminals, but a nega­
used to perform many logic functions with no power tive voltage will.
supply. These circu its use only the signal power. • Offset voltage from input to output is less
A
for the transistor circuit than for the diode circuit
--------...., --. ,...-----+- A· B
-

because the saturated collector-emitter voltage drop

is less than a diode's forward voltage drop.
B
Because the signal-powered circuits use the com­
---- 11-------...
mon base configuration, in which there are little or
no stored charges in the base-emitter junction, they
yield very fast response. These circuits can switch
Signal-powered i nhibit gate req u i res that voltage level B in less than a microsecond.
be sl ightly larger tha n A. Diode isolates signal A from B .
Gating circuits
Because signal transmission depends on base
current, various kinds of gating circuits can be
designed. For example, in the third circuit from the
top, at the left, suppressing the base current also
..
suppresses the collector current, resulting in negli­
8 --- .....
gible voltage across the load. This circuit is called
______

an inhibit gate. Signal A is inhibited by signal B.

To inhibit, voltage B must be more positive than
Signal-powered AND gate needs sig nal B to take Q2 A. The diode is needed in this circuit to isolate
out of satu ration, which perm its Q1 to satu rate signal A from terminal B.
and al lows signal A to pass to output.
The same idea can be extended to form an AND
A•B gate, as shown in the fourth diagram at the left.
Again, signal B must exceed signal A. If signal B
is not present and A is positive, transistor Q2
saturates, maintaining the emitter-base voltage of
transistor Q1 at a low level and preventing Q1 from
conducting. This is because the sahuated emitter­
collector voltage of Q2 is less than the conduction
threshold voltage of Q1' s emitter-base junction.
But when input voltages A and B are applied,
AND gate with Q2 i n the base circuit of Q1 permits
a lower voltage at B than at A to function.
voltage B inhibits Q2 from conducting, in turn,
allowing Q1 to transmit A to the output terminal.
A ------.....- ...... A+B (A+ B ) • ( A•B) A ..f B
=
Another signal-powered AND gate is the second
from bottom. In this circuit, Qt' s collector current
e ....... -+-- .......
is pinched off to a low value by increasing the
- -

impedance in the base return path, Q2, to a very

high value. If the voltage between input B and the
common terminal is zero or negative, transistor Q2
is turned off and signal A cannot pass through Q1.
As might be expected, control signal B turns off
Q1 more slowly than in the previously shown AND
gate, because of the stored charges in the base­
emitter junction of Q2. If the base current of Q 1
cannot be suppressed completely due to leakage
current through the collector to emitter of Q 2, a
Exclusive OR gate is one of the many complex logic
c i rcu its that can be built with transistors
signal will appear at the output when there should
operating i n the com mon-base configuration. be none. Speed can be improved and false output

146
 signals lessened by connecting a resistance of about pulses. Of course, in this application, the positive
1,000 ohms between the emitter and base of Q1. and negative pulses should not occupy the same
The leakage current from collector to emitter in Q1 time slot since they could cause a large current to
is reduced roughly by a factor f3. How from the positive to negative sources through
For these circuits, as a transistor's reverse bias Q1 and Q:!, and the pulses would cancel at the
decreases, the junction capacitances increase. Thus, output.
inputs with fast rise times will be differentiated Spurious transients feeding through the collector
at the output, appearing as spikes. The amplitude to the emitter can be greatly reduced by adding
of these spikes is usually about 10% of the input diodes in parallel with the base resistors. The
step amplitude for an Rr. equal to 1,000 ohms. diodes shunt the reverse transient voltages to the
Another common feature of signal-powered tran­ common terminal without affecting normal oper­
sistor gates is the unequal source impedances at ation, since these transients are back-biased with
the two input terminals. This means that a high respect to forward input voltages.
current signal A can be controlled by a low current For either of these applications, a circuit couldn't
signal B. Moreover, for the AND gate shown at the be built with diodes because a diode, forward­
left, bottom, signal voltage B can be very low com­ biased for one polarity in one direction, is also
pared with A. In this respect the circuits compare forward-biased for the opposite polarity in the
with relays, which use low-power signals to con­ other direction.
trol high-power signals.
More complex logical functions can be performed Common-mode noise eliminator
by combinations of the circuits shown so far. For Another useful scheme that exploits the high­
example, the diagram at the bottom of page 134 reverse impedance properties of the basic signal­
shows an implementation of the exclusive-OR func­ powered circuit is shown on the next page. Thi�
tion. The circuit provides an outr:ut signal only if circuit solves the problem of coupling high-speed
either signal A or B is applied, but not if applied rulse data with a large d-e component through a
simutaneously. Again, signal B must exceed A for transformer. One application is the rejection of
proper operation. common-mode noise in a data collection system
OR circuit works for bipolar pulses
using telephone lines for signal transmission.
For inputs Vi consisting of bipolar data pulses,
A circuit that makes use of the high-reverse im­ positive and negative pulses are transmitted to the
pedance properties of the fundamental signal-pow­ output through separate and identical transformer
ered circuit is shown below. This simple circuit, circuits. For unipolar data pulses, only one trans­
which actually consists of a pair of complementary former circuit is needed.
circuits, provides an OR function for input signals The circuit separates the positive and negative
of opposite polarity this could not be done with components of the input and produces them as
diode logic circuits. Positive pulses are applied to two separate positive pulse trains, Vo1 and V o2,
the emitter of Q�, a p-n-p transistor, and negative referred to the common terminal. Output Vo1 is
pulses are applied to the emitter of Q2, an n-p-n derived from the positive portion of the input and
transistor. Either signal produces an output pulse. Vo!! from the negative portion.
Positive pulses do not feed back into the negative Since the positive and negative sections of the
pulse-generating circuit, nor negative pulses into circuit operate in the same way, operation will be
the positive pulse source. explained for one section, the positive section, com­
This circuit can also be used to provide a bipolar prising Qh T 1 , D1 and D2• The primary of trans­
output pulse train from oppositely polarized input former T 1 is fed by the basic signal-powered circuit
in which the base resistor has been replaced by a
diode, D1.
The circuit alternates between two states­
X\.. transmission and recovery. During transmission,
..J Q f
+ r- - ... Q1 and D:! conduct when a positive pulse exceed­
RL:>� ing about 1h volt is applied to the input. Assuming
- :�Rb
•

f
L.. -
•
a relatively low source impedance, the time con­
stant of the transformer is much longer than the
- - pulse duration and the pulse is therefore trans­
r
mitted with little droop. Resistor RD in the sec­
. .. R b
.�
+ - '
I
ondary circuit has a high value compared with the
L.. --
- impedance of Q1 and D2, when conducting, and
/ """' Q 2 it can be ignored for the transmission mode.
X .X When the input pulse disappears, the circuit
goes into the recovery state. Q1 and D2 are now
Signal-powered OR circuit provides a n output pu lse nonconducting so that the transformer time con­
for a positive voltage at A or a negative voltage
stant depends on RD, which is short enough to en­
at B. When either transistor is nonconducting,
its h igh reverse i m pedance prevents pulses of the able the transformer to recover completely between
opposite pola rity from reach i n g the sou rce. successive pulses.

147
 The back-voltage generated across the trans­ found by integration. Because the saturated collec­
former terminals by the collapsing magnetic field tor-emitter resistance and the primary winding
is prevented from entering the source by Q1 and resistance are low, the voltage applied at the cir­
from entering the load by D2, which are now back­ cu!t's input terminals V will be nearly equal to the
biased during recovery. voltage E induced in the transformer. Therefore, if
The most important feature of this circuit is that im is initially zero, it will reach the following peak
its transmission and recovery-time constants alter­ value at the end of a pulse
nate without the help of external sensing and con­
. Etp
trol circuits. ( peak) =
L
lm
Designing common-mode circuits
The peak flux density generated by im must not
For negligible pulse droop, the inductance of the exceed the peak flux density rating Bmax of the
transformer must be large compared with the im­ core material used. This can be assured for a given
pedance of the transistor and diodes when they core material and pulse voltage if the number of
are conducting. Droop, d, is the ratio of the de­ primary turns, Nv, is chosen so that:
crease in amplitude between a square wave's lead­
Etp
ing and trailing edges to the maximum amplitude Np - A Bmax
_

of the square wave.

The primary inductance L required for minimum
where A == core area in square meters and Bmax
droop can be derived from the following equation,
is the flux density in volt-seconds per square meter.
which can be easily verified by realizing that LjR
In the circuit shown, E cannot exceed about one
is the circuit's time constant:
volt because of the clipping effect due to the for­
L �
ward voltage drop of Dt.
-

To assure that the transformer always operates

on the linear portion of its B-H characteristics, the
where
magnetizing current im must be reduced to near
L is in henries,
zero between pulses. This is accomplished by de­
tv = pulse duration in seconds,
creasing the time constant LjR.
Rt � If the input voltage falls below the threshold
and R = R in ohms value required to forward bias the emitter-base
1+�
junction of Q1, the transistor goes into cutoff. The
Rt is the total resistance in the primary circuit rapidly collapsing flux in the transformer generates
of the transformer and R2 is the total resistance a reverse voltage that back-biases D2 However,
in the secondary circuit of the transformer referred when Q1 and D2 are nonconducting, it still may be
to the primary. necessary to insure that the circuit is overdamped,
The equation shows that when Q1 is conducting, a condition in which the circuit cannot oscillate.
the time constant LjR must be much larger than Damping factor k is given by
the pulse duration, tp.
When a voltage is impressed on a transformer 1
winding, the flux density in the core changes in k = 2R VL/C
proportion to the voltage. The concept of an
imaginary magnetizing current im is introduced to where C is the capacitance of the transformer wind­
account for the net flux, since not all of it is at­ ing and circuit wiring in farads.
tributable to winding currents. If E is the external If the calculated value of k is less than 1, the
primary voltage, the magnetizing current follows underdamped case, the circuit will oscillate. Resis­
the familiar form, tor R0 can be decreased in value to insure the
overdamped condition , k > 1. However, the value
E = -L �t of Ro must still be large enough so that the re­
covery time constant is much shorter than the
The value of im at the end of pulse duration can be interval between successive pulses.

148
 Circu it des i g n

s1n
•

They effectively employ the transistor's

current-voltage cha racteristics to
ra i se n u m bers exponentia l ly and extract roots

By George E. Platzer J r.
Chrysler Corp., Detroit

Because a pn semiconductor junction exhibits a Engineers at the Chrysler Corp. use the transis­
logarithmic relationship between current and volt­ torized computers for controlling the input energy
age, it can be exploited to perform calculations of a resistance welder, for calculating the average
such as multiplication, just as a slide rule does. of squared values and root mean square values, and
Since the junctions may be used to take antiloga­ for direct computation of efficiency and slip in
rithms as well as logarithms, it is possible to mul­ mechanical systems. In the welding application, a
tiply, divide and raise to exponents in the loga­ multiplier computes the instantaneous power de­
rithmic domain by simple addition and subtraction. livered to the weld area. The frequency response of
Thus, in instrumentation and control systems, tran­ the multiplier is high enough to respond to the
sistor circuits can perform the same function as a transients caused by the welder's phase controlled
slide rule, but with the advantage that the mathe­ transformer. Within limits, the circuit is able to
matical operation is performed continuously and compensate for line voltage variations, electrode
rapidly as the input quantities change. wear, and dimensional variations of the workpiece.
Although there are other electronic ways of per­
Log and anti log
forming analog operations, these transistor cir­
cuits 1 · 2 generally have advantages of simplicity, The basic principle of the electronic slide rule is
accuracy and faster response time. For example, that for low-level input signals, the current and
conventional servomultipliers, which use ganged voltage in an ideal diode junction are related by
potentiometers to perform multiplication, operate
-
qV
kT
-
qV
kT
more accurately but the frequency response is gen­ I = I R(E - 1) =I RE ( 1)
erally poor. Other devices require complex circuits.
Analog circuits most closely equivalent to transis­ where I = the diode current in amperes
tor circuits in performance utilize Hall effect de­ IR = the diode reverse-saturation current in
amperes
V = the voltage across the diode in volts
vices and magnetoresistors. Compared with these,
the transistor circuits are generally more accurate q = electron charge in coulombs
and less sensitive to temperature. k = Boltzmann's constant
T = temperature in degrees Kelvin
The author At the current levels used for logarithmic compu­
tations, the approximation in equation 1 is in error
George E. Platzer J r. heads the
physics grou p of Chrysler Corp.'s
by less than 1 part in 10 million.
physics-instru mentation research The diode's saturation reverse current, In, is tem­
laboratory, where he di rects perature sensitive and is given by3
the development of solid state
circuitry for automobiles. T
u Ea ( _.!._ _ 1 )
k 1'0 T (2)
_

H is background includes deg rees E

i n physics and in electrical To
and a utomotive engineeri ng.
where Ino is the reverse saturation current at tem­
perature T0 in amperes and EG is the energy gap

149
 of the material at 0° Kelvin in electron volts.
Taking the logarithm to the base e: of both sides
of equation 1, and rearranging terms results in

qV
= -?
kT
=- (3 )

From equation 3 are derived the two fundamental

statements expressing the characteristics of an ideal
I n si m pl e m u lti pl i er, the voltage across
diode junction:
" The voltage across the diode is proportional Dt a nd D� is proportional to log, ld�.
to the logarithm of the current through the diode. Col lector cu rrent lc is pro portional to l t b .
The corollary to this statement is: 10,000 �----;-:---...,...., ,....�
• The current through the diode is proportional e;ooo
6,000
GERMANIUM SILIC ON
to the antilogarithm of the voltage. For an ideal GRAD ED- -.... PLANAR
transistor, the foregoing is reworded to read: 4,000 BASE ALLOY DIFF USED
JUNCTION DIODE
The base-to-emitter voltage of a transistor is TRANSISTOR
2,000
Cl)
proportional to the logarithm of the emitter cur�
14.1
a::
� 1,000
rent. As a corollary statement:
The emitter current is proportional to the anti­ :II
800
� 600
PLANAR
logarithm of the base-to-emitter voltage. EPITAXIAL
a::
� 400 DIODE
Simple multiplier :II
I
� 200
REFERENCE
The multiplier circuit on this page won't work 14.1

well in practice, but it clearly shows the principle �

a 1oo
a::
of the slide rule. Input currents I1 and I!:! flow 80
through diodes D1 and D2• The voltage across e
(,)
6o LICON PLANAR
each diode is proportional to the logarithm of the � 40 TRANSISTOR
current. Because the diodes are in series, the volt­ 8
age at the emitter-to-base junction of the tran­ � 20
sistor Q1 is proportional to the sum of the logs or
equivalently to log.I1I2 • By the corollary statement �
Q
10
8
already given, the emitter current is proportional 6
to the antilogarithm of log.I1I2 or simply to I1I2. 4
If the junction characteristics are ideal and the
transistor has infinite current gain, the multiplica­ 2
tion is exact and the collector and emitter current
1 �...._-=-'"="_ ...."'="=___._�.__ 1..-.:"'=-
are proportional to the product of the diode cur­ _ : ....�
.. ....�
....L ��-...�
rents. 0.1 0.4 0.6
DIODE OR EMITTER-TO -BASE VOLTAGE-VOLTS
With a bit more complexity, the circuit can be
made practical with excellent accuracy. As a multi­ Diodes and tra nsistors exh i bit exponential character­
istics represented by l i near section of this semi log
plier operating over an output range of 500 micro­
plot. Transistor cu rves, i n color, have a slope equal
amperes to 5 p.a, maximum error is about 0.5% to qV / kT. Reference l i n e pa ra l lel to transistor cu rves is
full scale, while the maximum absolute error at com puted from equation I for an idea l junction at 298 ° K .
any point is about 2% of the reading. In other
words, accuracy is maintained even at the low end
of the current range. the range over which practical junction devices
will exhibit an exponential characteristic.
Transistors and diodes
The departure from ideal operation is illus­
Characteristics of transistors and diodes must trated above in the graph, which plots the voltage
be more closely examined to select devices that current characteristics measured in several com­
will function properly in practical circuits; diodes mercial diodes and transistors. In this semilog­
are not suitable in this application. arithmic plot, the exponential regions are repre­
In these computing circuits, the junction device sented by the linear segments of the curves. Since
must exhibit an exponential characteristic over the silicon planar epitaxial transistor is linear over
an extensive range of input voltages or currents. three decades of current, it is used in the output
Since equation 1 is for an ideal junction, it does of the multiplier circuits.
not indicate any bound on the exponential region. In a transistor, a linear semilogarithmic relation­
However, series resistance within the junction ship is possible only at relatively low-power levels.
modifies the exponent in equation 1, preventing This happens because a few milliwatts of collector
the device from operating ideally. In addition, dissipation are sufficient to increase the junction
the value of the exponent also varies with current temperature and to make the emitter-base voltage
density and temperature. All these factors limit a significantly strong function of collector dissipa-

150
 sistor. Although conventional diodes do not qual
ify, the emitter-base junction of the transistors
might qualify, but the exponential characteristics
are satisfactory only at extremely low-current
levels.
The solution is to operate a transistor as a
diode with the collector connected to the base, so
that VeE = VBE · Operated in this manner, the cur­
rent-voltage characteristics is substantially the same
/ -
as the amplifier connection. This occurs because
the collector-base barrier potential is still large
.
,.. --;_'
- -

enough to collect the charge carriers that diffuse

across the base to the collector. Although the
collector-to-emitter voltage is lower than usual,
currents and voltages at the terminals have the
same range of values found in normal amplifier
operation.
:? Transistors that have been tested and found
t satisfactory for this application include silicon
planar epitaxial types 2N3053, 2N1711, 2N2904 and
i
,: .
2N2905A. In the multiplier circuits, only the output
-
--
' ·- -
;

transistor must have high current gain. One multi­

plier has been constructed in the multichip tran­
sistor in the photograph at the left. Called the SC-
286 it is manufactured by Motorola Inc.
Multiplier theory
A more exact multiplier circuit at the top of page
112 is similar to the simple multiplier, except that
transistors are used in place of diodes. The output
current Ic, proportional to the product I 1 I2, is de­
termined using the basic equations.
-,_ · :._
From equation 2, the sum of the voltages across
:
-- -
_ _,_ the diode-connected input transistors
I I I2
_, ,-, ,

kT
VI + v2 = (4)
I RI I R2
logE
q
-

where IR1 and IR2 are the reverse saturation cur­

rents of Q1 and Q2
Taking the ahtilogarithm
Multichip transistor m u ltipl ier contains fou r q(VI+V2)
sil icon planar epitaxial, p n p transistors i n a T0-5 case. IIII = Ittt iR2E k T (5)
For the output transistor Q3,
qV B E
tion, as well as current. However, using a tran­ I E = IR EE kT (6)
sistor to take the antilogarithm of a voltage pre­
where IE is the emitter current and IRE is the re­
sents no problems as long as the base-to-emitter
verse saturation current of the output transistor Qa.
voltage is scaled to the capabilities of the tran­
From the diagram on page 112
sistor.
Though they may have a large exponential re­ v BE = vi + v2 (7)
gion, commercial diodes are not suitable for an Substituting equation 7 into equation 6, and the
application in these analog circuits. The primary subsequent result into equation 5
reason is that the value of the exponent in equation
IRE
III2
1 is smaller than the value for transistors. A differ­ (8)
ence in exponents is represented as a change in I RII R2
slope in the graph on page 110. In a multiplier
circuit, this would mean that the output would be
Because IE = Ic/ a (9)
proportional to some power of the input, rather
than to the product. (10)
Therefore it is necessary to find a device that
has an exponent that matches that of the tran- where a = common-base current gain

151
 Ot ,-----. \ Another difficulty indicated by equation 10'--­
is that the highly temperature-dependent reverse­
v,
saturation currents are unbalanced since they ap­
pear once in the numerator and twice in the de­
/ nominator. This will make the multiplier tempera­
ture sensitive, Using a transistor for the bucking
voltage source compensates for the temperature
dependence.
In the lower circuit, left, which incorporates
these improvements, current 1:� is maintained con­
+ stant. Following a procedure similar to that used
In improved mutliplier c i rcu it,
-

Q1 and Q� are to develop equations 4 to 10 results in

con n ected as diodes to match expon ential
cha racteristics of Qa.
{1 1 )

where Ina is the reverse saturation current in the

diode-connected compensating transistor Qa.
Now the saturation currents are balanced, and
Ic is reduced as compared to equation 10 for
given values of l1 and l.!·
This multiplier will be stable and accurate over a
+ --
... � wide range of currents and temperature.
Equation 11 indicates that if 11 or 1:! are constant,
I 3 = CONSTANT +
and 1:{ is a variable signal current, the multiplier
may operate as a ratio or dividing circuit, in which
_

Practical multiplier adds ci rcuit consisting of Qa the output current is given by

and its cu rrent su pply to permit i ncreased
i n put levels and to provide thermal com pensation. ai R rJ R:l .,
lc = J (12)
I RtiR2 �

As a divider, the output current, 1(', decreases as

For equation 10 to define a useful multiplier: sig­
the signal current, Ia, increases. As a result, both
nal currents I 1 and 1:! must be independent of the
output circuit. This occurs if the current gain, {3,
range and accuracy are reduced because the base
current may become a significant part of the input
of the output transistor, Qa, is high so that its
transistor current. However, good accuracy can still
base current is much smaller than the signal cur­
be maintained over a 20-to-1 range.
rents, l1 and 1:!. Ideally, In should be zero.
Another valuable operation is extracting roots.
Even this multiplier circuit may not be entirely
The circuit at the bottom of page 113 will pro­
satisfactory. First, all the transistors may not
duce the square root of an input signal, lx. Diode­
operate in the same current range. This occurs
connected transistor Q4 is placed in series with the
when the same type of transistor is used for gen­
emitter of Qa to make the output circuit perform
erating both the logarithm and the antilogarithm
the square root operation. Current 1:! is constant.
values. Secondly, to operate with reasonable cur­
Transistor Q:! provides thermal equalization and
rent levels in the logarithmic region of the tran­
balances the voltages in the input and output cir­
sistors requires input and output currents of the
cuit. The input circuit acts as a multiplier so that
same order of magnitude. This requirement can­
not be met with this configuration. For example, Vt + V2 a:
log� Ixl2 (13)
if 1 ma is set as the upper limit of output current, where V1 and V:! are the voltages across Q 1 and Q:!
the circuit at the top of the page would allow maxi­ and a: is the proportionality symbol. V1 + V:!
mum input currents of only 0.01 p.a in each of the equals the sum of the base-to-emitter voltage drops
input transistors. This is easily seen on the graph across Qa and Q4. The voltage drops across each
on page 1 10, which shows that Vm� must be ap­ of these transistors is proportional to the log of the
proximately 0.6 volt at 1 ma. collector current developed by Qa. Therefore
For equal voltage across each of the input tran­
sistors, Vm� would only be 0.3 volt. The current vl + v2 a: 2 logE Ic = loge (Ic)
2 (14)
at this voltage is about 0.01p.a. This is not only an Since I:! is constant, combining equations 13 and
unreasonably low signal current to work with, but 14 results in
it is also comparable to the base current of the
output transistor. This difficulty may be avoided (Ic)2 a: l x { 1 5)
by increasing V 1 and V:! and using a constant More exactly, the collector current is
series voltage in the circuit to subtract from vl + 1/2
I R E I R.tl2
V:! · If each of the input currents is 1 ma, V 1 and V:! Ic = a Vlx {16)
I RtiR2
each will be about 0.6 volt. For Vm� to be 0.6 volt, a
bucking voltage of 0.6 volts must be provided. where In4 is the reverse saturation current of Q.a .

152
Generalized logarithmic computer required for temperature stabilization will be equal
to n + r - m. If this sum is positive, the compen­
A valuable feature of this transistorized slide
sating transistors are connected as multipliers;
rule lies in its ability to perform combined opera­
if the sum is negative, they are connected as di­
tions of the basic functions. For example, the cir­
viders. The constant current through the compen­
cuit shown below will perform the computation
sators is made large enough to assure that all the
yXY /Z, which is useful in computing mass flmv transistors are working in their logarithmic range.
of a compressible fluid. In this circuit, Q1 and Q:!
form the log of the product Ixh; Qa subtracts the A four-quadrant multiplier.
term logt: Iz; and Q4 and Q:; perform the antilog All of the circuits shown so far have been one­
and square root operation. quadrant types in which only positive signals are
A generalized statement of the operations that accepted and only a positive output is available.
these circuits can perform is With the multiplier circuit on page 1 14, four-quad­
1/r
X X2 · · · """'Xm
rant operation can be obtained. The circuit consists
� 1
Z =
Y1Y2 . . . Yn
(17) of two basic multiplier units connected together.
A bias current Im must be supplied to each of the
If m is the number of multiplying factors, there input transistors and inverted signal currents to
must be m transistors connected in such a way as one side of the unit. Summing the individual output
to increase conduction in the output transistor when currents in the load resistor yields
the signal current increases. If n is the number of I L = ICl + lc2 = [2 (I n i)2 + 2 I1I2] K1
dividing factors, there must be n transistors con­
nected in such a way as to decrease conduction where K 1 is a function of the saturation currents
in the output transistor when the signal current that are assumed equal for both sides of the circuit
increases. If r is the order of the root to be taken, and Ir. is the load current. The product may, of
there must be (r-1) transistors in the emitter circuit course, be easily separated from the constant term
of the output transistor connected so that the 2(Im)2•
emitter current flows in the forward direction for Sources of error
that element.
The number of diode-connected transistors re- The capabilities and limitations of the circuits
depend on the simplifying assumptions that were
made. In the development of equations 4 to 10 it
was assumed that:
• Transistors are accurately described by equa­

tions 1 and 2;
• Transistors are all operating at the same tem­

perature;
• The base current of the output transistor is very

small compared with the input currents; and

• The current gain, {3, of the output transistor is

constant.
In addition to these assumptions, system capac­
itance and its effect on frequency response have
been ignored.
+ -
Silicon planar transistors, have been proved best
for these applications. Equation 1 is accurate in
�__, I=CONST the forward conduction region if a saturation cur­
L...- -1 1-+
- --� "".....----' rent is calculated from some point in the linear
semilog portion in the graph on page 110. At 27°C,
the slope of the exponential region is approximately
Functions of the form y xY1z are com puted by combi n i ng
59.5 millivolts per decade of current and is nearly
the mu lti plyi ng circuit Q1 and Q2, the divid i ng circuit the value predicted by equations 1 and 2. As the
Qa and the square root circuit, Q� and QG. temperature increases, the slope decreases, as indi­
cated by the graph on page 114.
There are also slight slope variations at a fixed
temperature and from one unit to another. For in­
stance, at 25°C, variations in excess of a millivolt
per decade of current have been observed among
several units. In addition, the change in slope with
Oz temperature is not always uniform.
+
At a fixed temperature, a difference in slope of
t-----'
-

1 millivolt per decade of current between a multi­

Square root of the i n put lx is produced by transistor Qa plier's input and output transistor causes an abso­
i n series with diode-co n nected transistor Q!. lute error of 4% over a decade of current. To

153
 Some temperature variation among transistors is
unavoidable because of the differences in power
dissipation. A low collector supply of 1.5 volts
with a 1,000-ohm load keeps the output transistor's
dissipation sufficiently low to avoid difficulty.
-

+
Base current
If it is not valid to assume that the base current
In of the output transistor is small, then an error,
+
-

Er, will be developed at the output even if all the

Four-quadrant multiplier performs m u ltipl ications

junctions are ideal. An expression for the error that
for any combination of negative and positive i n puts. can occur in a multiplier will be determined. For
Circu it consists of two multipl iers con nected i n analysis, the base current in the circuit on page 112
paral lel. In 1 is a bias cu rrent. is assumed to be small, but not negligible compared
with It, 12 and Ia.
With this new assumption, equation 11 becomes
to -------,

- aiREIRa
Ic - IR1IR� /\ (11 - Ic/m (12 - Ic /�) l (18)
(I�+ Ic/�) \
where lu == lc/ {3.
Because Ir/ f3 is small,
t.O
c
E
.!- r
z
�
u
I1I2 X
w
Ic -
a::
Ia
�
u O.t 0 I2
1- - 1 + ·- - 1 (19)
� Ia
where
O.OJ .____.._ "-..&....-.i..----J""--'---..__ 1.....-.....&..-...1.-----" o
= (a IREIRa) / (IRtiR2)
� � � � � �
DIODE VOLTAGE-VOlTS Assuming that the output collector current is at
some reference current lcf', determined by the input
I ncreasing temperature sh i fts the transistor's
exponentia l characteristics and a lso reduces the slope.
reference currents I11 , l22 and laa, then from ( 19)
I ul2
Icc � o 2 X
minimize this kind of error, it is necessary to care­ Iaa
fully match the transistor's slope. 0
1--
122 (20)
Furthermore, if the device is to work over an 1+ - 1
extended temperature range, matching will also be � 132
necessary at the lower temperatures, where slope Now the operating currents are written
variations are particularly accentuated. However,
from ooc to 100°C, slope variations in the absence
It = xin (21)
of any special matching results in a 0.02% change I2 = yl22 (22)
in the output current per °C. 13 = zl33 (23)
Reference shift In these equations, x, y, and z are the factors by
which It, 1!.! and 13 are related to In, l2�h and Iaa,
Another effect arises from the different transistor respectively. These factors may be either greater
temperatures in a given circuit. At a constant cur­ or less than unity.
rent, the diode voltage shifts approximately -2 Substihtting equations 21, 22 and 23 into 19
millivolts/ °C as indicated by the graph directly
above. If a one-degree difference exists between 0 xy lnl22 X
Ic =
an input and output transistor, the reference point z 133
will shift by about 8% resulting in an error in the
0 xlu
calibration of the readout. 1- 1+ (24)
To prevent a reference shift, all transistors are � zlaa
placed on an isothermal mounting pad. This pad The relative error of any point referred to the
is either an anodized aluminum-block, drilled to reference currents is defined as
accept individually packaged transistors, or it is an
alumina disk with the transistor dice mounted ou I cc
xy - Ic
z Ic
it and interconnected by multichip integrated cir­ Er = = 1 - (25)
cuit techniques. For individually packaged tran­ xy I cc
xy
z
I cc z
sistors the aluminum pad must be anodized for
electrical isolation. where the term Icc xy/z, represents the output

154
 current for the values x, y, and z when it is valid
to assume that the base current is negligible. h (p.A) l 2 (p.A) lc (p.A) lc (p.A) % Error % Error
Substituting equations 20 and 24 into 25 and Calcu lated M easu red Meas u red Calculated
ignoring second order terms
500 500 500 500.0
0 400 500 400 40 1 . 57 .39 . 14
E- '"'-'
+
-

500 400 400 40 1 .33 .3 3 . 14

{3
•

300 500 300 30 1 .9 1 .64 .27

l11 1 -
X
1 - y
(26)
500 300 300 302 .65 .88 .27
200 500 200 202.03 1.01 .40
-"'-----

Iaa z z
-­

1 00 500 1 00 1 0 1 .45 1 . 45 . 54

Circuit performance 50 500 50 5 1 .01 2.02 . 60

1 00 1 00 20 20.33 1 . 65 .87
The table on the right shows the results ob­ 50 50 5 5.06 1 .36 .95
tained from a multiplier constructed with Motor­
ola's SC-286 multichip integrated circuit. Input Calcu lated a nd measured errors i n a m u ltiplier
signals 11 and 12 both have full-scale values of circuit ind icate an error of a bout 2 %
500 p.a. 1:{ is adjusted to give 500 p.a of collector over a 1 00-to- 1 ra nge i n output c u rrent.

current in the output transistor. The output signal

varies over a 100-to-1 range in response to a 10-to-1
input variation. In this table, the calculated value of Ia (p.A) lc (p.A) lc (p.A) % E rror % Error
Ic is 1/500 of the product l1l2.
For this unit S was 1.1 and f3 was 275. The
Calcu lated M eas u red Meas u red Calculated

small discrepancy between the observed and cal­ I 1 500 60.0 59. 5 .8 -1- .8
+ .6 + .7
'

culated errors is attributable to variations in param­ 900 100.0 1 00.6

eters between the transistors, the approximation 600 1 50.0 151.1 + .7 + .6
previously discussed, and instrument errors. 300 300.0 300.0 0 0
Measurements were made at room temperature 200 450.0 443 .7 - 1 .4 - .7
1 50 600.0 582.4 - 2.9 - 1. 5
and at -50°C and at 100°C with equally good
1 00 900.0 843. 1 - 6.3 - 3.8
results. At the temperature extremes, the only ob­
+ .9
served variation was in the value of Ia required I I 1 500 6.66 6.50 - 2.4
to produce 500 p.a of output current with 11 and 12 800 1 2 . 50 1 2.40 - .8 + .9
at 500 p.a. At 0°C, the value of 13 was approximately 400 2 5 . 00 25.05 + .4 + .8
510 microamperes. It increased at a rate of 0. 19 200 50.00 50.30 + .6 + .6
p.a/ °C. The required 13 varies not only with tem­ 1 00 1 00.00 1 00.00 0 0
perature, but also from unit to unit because of the 50 200.0 195.8 -2.1 - 1 .6
difficulty in selecting perfectly matched devices. 25 400.0 370.3 -7.5 - 6. 7

Two calculations involving division are tabu­

lated on the right. In the first calculation, the ref­ Error i n a d ivider network is approxi mately
erence input current 133 was 300 p.a and 11 1 and l22 2 % over at l east a 10-to-1 range i n output cu rrent.
Va lues are for two experimental conditions.
were adjusted to 290 /J.a to give a reference output
current Icc of 300 p.a. 13 was then varied above and
below the reference current. In the second cal­
culation, Iaa was 100 p.a and 1 11 and 122 were adjust­ used in the multichip version is the best way to
able to 96.5 p.a for a reference output current of reduce external capacitance.
100 p.a. The frequency response of only one multiplier
If the data in the table were plotted, the abso­ was checked. The test was performed on a circuit
lute error of any point would be within 2% of that used individually packaged transistors
the correct value over nearly a 10-to-1 range for mounted on an anodized aluminum heat sink. Its
the first case and nearly a 20-to- 1 range for the response was essentially flat out to one megacycle,
second case. The improvement in the second case falling off 3 db at 20 megacycles. The response
occurs because the output transistor's base current of the multichip version should be considerably
is a small fraction of 13• While the second example better.
exhibits a greater range, it is achieved at the ex­
pense of output current.
Frequency response References
1 . G.E. Platzer Jr., "Circuitry, for the Extraction of Roots,
The frequency response of these circuits is lim­ Multipl ication and Division," U.S. Patent No. 3 , 1 52,250, Oct. 6,
ited by both junction and external capacitances. 1964, (Assigned to the Chrysler Corporation) .
2. G.E. Platzer J r., "Loaaritltmic Multipl ication a nd Division,"
In the case of medium-power, individually pack­ U .S. Patent No. 3,197,626, Oct. 27, 1965. (Assigned to the
Chrysler Corporation).
aged transistors that have their collectors bonded 3. A.B. Phillips, "Transistor Engi neering," McGraw-H ill Series i n
directly to the header, considerable external capaci­ Solid State Engineering, 1962, p. 1 3 1 .
4 . J.L. Moll, "The Evolution of the Theory for the Current-Voltage
tance is introduced by mounting these transistors Cha racteristics of PN J u nctions," Proceed ings of the I RE,
on an anodized aluminum heat sink. The mount:ing 1958, p. 1076.

155
 C i rcu it d esign

1n

U nderstandi ng a l l the possible types of feedback, and how

each affects ampl ifier performance, can help the c i rcu it
designer solve stabil ity problems with ease

By Nea l e A. Zel l mer

Advanced Development Dept., Lenkurt Electric Co., San Carlos, Calif.

Feedback circuits are usually designed by calcu­ plifier's input impedance, forward gain, p., output
lating component values on the basis of an ideal impedance and load impedance. Conventionally,
circuit. When the circuit fails to perform as desired, stabilized voltage gain is considered a function of
the designer juggles decade boxes until he finds the forward gain and percent feedback, and is written
correct values.
The problem is that most classical analyses of ( 1)
circuits with feedback assume the use of strictly
voltage-operated devices having infinite input im­ There are several well-known techniques for
pedance and zero output impedance. In reality, selecting some percentage of the output signal and
most amplifiers have finite input and output im­ feeding it back to the input. The most common one,
pedance and should be considered power ampli­ referred to as voltage feedback, derives the feed­
fiers. For example, amplifiers in telephone systems back signal by tapping off in parallel with the load.
are designed to match line impedances and furnish As implied by its name, the feedback signal is pro­
power gain rather than voltage. portional to output voltage. It is also possible to
For efficient transfer of power it is desirable to derive feedback by tapping off in series with the
design feedback circuits with capability of adjust­ load; the feedback voltage is proportional to the
ing and holding the impedance match. Other param­ output current and is thus commonly called cur­
eters affected by feedback include gain, noise and rent feedback. A third technique, a combination of
distortion. All of these must be considered in the the other two, will be considered later.
design of any practical amplifier.
Effects on gain and impedance
Types of feedback
With negative feedback, where the feedback
A practical analysis may begin with a simplified voltage is 180° out of phase with the input, gain
diagram of a typical realizable unstabilized ampli­ is reduced. How other parameters, such as input
fier as shown on page 67. Voltage etn is now a and output impedance, linearity, and stability are
function of the amplifier's input impedance. Effec­ affected is less obvious. Assuming ideal midband
tive unstabilized gain, A, is a function of the am- conditions, several relatively simple equations pro­
vide an intuitive basis for predicting amplifier char­
acteristics.
It is convenient to consider first the effects of
The a uthor
negative feedback upon gain and output impedance.
Neale Zellmer, a senior staff With voltage feedback as shown in the three-part
engineer for advanced develop· diagram on page 67, stabilized gain is
- p.
ment, heads Lenkurt's carrier
G
system and techniques section.
He currently is applying micro­
electronic techniques to com­
=
Ro � R L + p.{j (2 )

munication equipment and is

L
making pertinent system studies and output impedance is
into telephone transmission
equipment channel loading (3)
and its dynamic characteristics.

156
 Stabilized gain with current feedback, as illus­
trated, is
1in
R •· n
(4)

In typical unstabilized amplifier, gain,

in put and output im pedance a re su bject to
Solving for power out, differentiating with respect
vagaries of the parameters of the active devices.
to RL, equating to zero, and solving for output
impedance gives
( 5)
Since both {3 and Rm/RL represent the feedback lin ej

ratio and Rm is usually much smaller than (Ro +

Rr..), equations 2 and 4 show that equal amounts
of either voltage or current feedback will result in
approximately the same degree of stabilization.
Assuming Ro is much greater than Rm , equations
2 and 4 reduce to
•·
I Ro
(6) '
+ l'fl •o
• .

1 + •o
�
If A � - p, Rm
- l Ro
+
RL
the degree of gain stabilization may be determined
by taking partial derivatives of A and G with re­
spect to p. and Ro and then solving for incremental Ro
changes of stabilized gain in terms of the incre­
mental change in unstabilized gain, from which RL
f
to
'o '
•

1
=
�G AA
(7 )
(l+JJ.P/(l+Ro/RL)]2 Ro remaining Rm
and constant
With voltage feedback, top, where the feedback voltage i s
(8 ) proportional to the output voltage, output

p, remammg
• •
i m pedance is lowered . Cu rrent feedback, middle d iagra m ,
where feedback voltage i s proportional to output
constant
current, raises output i m pedance. A combination of
As p. {3 is usually much larger than (1 + Ro/RL), voltage and cu rrent feedback, lower d iagram, al lows the
output i m pedance to be sta bilized at a lmost any
.:1G is approximately equal to .:1A/ p.{3, showing that reasonable value. Feed back paths a re shown i n color.
the degree of gain stabilization is relatively inde­
pendent of the type of feedback. Furthermore, the
degree of stabilization is independent of active device parameter variation as long as the feedback
circuits are stable.
How to choose
Definition of symbols
A=effective unstabil ized gain
The selection of the type of feedback emerges as
B=percent of voltage feedback an impedance problem. It is noted that voltage
Ba=percent of series feedback
e tn=amplifier input voltage
feedback lowers the output impedance (Eq. 3),
en=undesired signal while current feedback raises the output impedance
eo=ampl ifier output voltage
eao=source voltage
(Eq. 5). Thus, the designer must determine if one
G=sta bil ized voltage gain type of feedback tends to stabilize the output im­
g ..=transfer conductance for shunt feedback
gm=equivalent transconductance of amplifier's forward gain
pedance more than the other.
k=tra nsmission loss in current feedback loop By partial differentiation of equations 3 and 5, it
k t =reci procal of forward-loop current gain
J£=unsta bilized forwa rd voltage gain can be shown that in percentages, neither voltage
Po=power out nor current feedback alone improves impedance
R t n=input impedance of amplifier with no feedback
Rm=feedback tra nsfer impedance for current feedback stability.
RL=Ioad impedance
Ro=output impedance of amplifier with gain 1£, and no feedback Combining voltage and current feedback
Ron=source impedance
Z t n=effective input impedance ot stabilized amplifier
Zo=effective output impedance of stabil ized amplifier
One way to stabilize output impedance is to 6.rst
reduce its value with voltage feedback and then add

157
 a resistor to obtain the final desired value. Alter­
natively, the output impedance can be made very
large with current feedback and the final value ob­
tained by shunting it with a resistor. Either of these
methods will tend to mask variations in forward
gain, p., or the original output impedance, Ro. How­
ever, both have the immediate disadvantage of
wasting half the output power.
A more sophisticated way to control impedance
is to combine the two methods. In the bottom dia­
gram on page 67, the stabilized voltage gain is
- p.R L
= + {g)
G Ro + Rm {1 + p.} R L ( 1 + p.{j}
and output power is Noise or distortion a ppearing at the i n put of an
a mplifier, top, can not be corrected with feed back.
(p.ein)2 R L
Po =
Ro + Rm ( 1 + JJ.) + R L ( 1 + JJ.f3)
{ 10} However, noise or distortion generated at an
intermediate stage, bottom diagram, can be reduced
with properly applied feedback.
Effective output impedance when p.Rm/RL and p.p
are much greater than 1 is
� Ro + Rm loss, k, is present, equations 11 and 13 must be
Z
JJ.f3
0 (11} modified. If k can be adjusted to approximate
{j
Ro/ p.Rr.) and fJ and Rm/ RL remain equal, the
-

(1 -

If Rm/ {J is greater than Ro/ p.{J, then the output im­ output impedance will still match RL but the gain
pedance will be controlled largely by the passive will be
feedback networks and be quite stable. If Rm/p
is much greater than Ro/ p.{J, then G = -=� ------
p.
-� ------
--
{ 14}
Ro
Rm ( 1 - [j) + 2 ( 1 + p.{j)
Zo = {12 ) RL
{j
Injecting feedback at amplifier input
Equation 9 may be rewritten
Just as there are two basic ways of providing
( 13 ) feedback from an amplifier's output, there are two
ways of injecting the feedback at the input. The
figure shown below is a functional diagram of an
amplifier with the two different methods of inject­
Note the similarity between equations 13 and 2. ing feedback at the input.
Effectively, the combined feedback is equal to the The top loop, �' injects a current proportional
sum of the two types of feedback. If equation 12 to the feedback voltage in parallel with the input
is rewritten in the form current. This type of injection is normally referred
to as parallel or shunt injection. Series injection,
Zo = is illustrated by the bottom loop, p, which injects
a voltage in series with the input voltage. Point
it is obvious that Zo can be made to match RL by D represents a current or voltage node, or a sum­
making the current feedback ratio equal to the mation point, for a combination of voltage and cur­
voltage feedback ratio. (That is, if {J = Rm/RL, then rent feedback.
Zo = RL . ) To analyze the effect of each type of feedback
This is true only if Ro/ (1 + p./3) is very small and injection upon gain and input impedance, it is only
the transmission network from the current feedback necessary to write and solve the nodal equations
point is lossless. In the more practical case, where for the input circuits.
Ro/(1 + p./3) may be appreciable and a transmission Solving for stabilized voltage gain
p.R,,.
G = {15)
R ( 1 + p.g. Ri,.) + Ri,. (1 + p.fJ.)
-

••

'• •o
••• o By inspection, geRm represents the degree of shunt
feedback, while p. represents the degree of series
I in feedback.
t0
Solving for Z1a
( 1 + p.fJ.) R,,.
Zi,. = {1 6)
1 + p.g. Ri,.
Combination of shunt and sea ies feedback stab i l izes input
impedance. I ncreasing shunt feedback lowters input Equation 16 shows that shunt injection lowers
i mpedance while increasing series feedback raises it. input impedance, while series injection raises input

158
impedance. If p.f3s > 1 and p.gPRtn > 1, equation 16 However, the feedback loop can be designed
reduces to Ztn = {38/ g(., pointing up the fact that such that p./3 sin cJ> > sin 8 and p.f3 cos cJ> > cos
the stabilized input impedance of an amplifier can 8, then a � cJ>; or if cJ> can be made equal to
-

be made relatively independent of the unstabilized 8, a = 8. -

input impedance and gain with a combination of In general, where resistive feedback networks
series and shunt injection. If the percentages of are used, feedback tends to reduce the inband
series and shunt feedback are made equal, the phase shift of an amplifier to very small values. The
innut impedance will equal the unstabilized ampli­ effectiveness of feedback in reducing phase shift
fier's nominal input impedance. points up the advantage of using local feedback
loops around each stage to shape the gain curves
Noise and distortion
of an amplifier before applying over-all loop feed­
Under certain conditions, negative feedback can back.
be used to reduce extraneously generated signals.
Bridge feedback
Two important sources of extraneous signals must
be considered: first, distortion or noise generated The balanced bridge configuration, (see sche­
at the input terminals; and second, noise that is matic below) is a convenient technique for balanc­
present only at the output terminals. ing two types of feedback at either the input or the
The uppermost diagram on the top of page 68 output. This circuit provides excellent isolation be­
shows an amplifier with a generator of an undesired tween output and input.
signal, en at the input. By inspection, Generally, conventional bridge feedback requires
both input and output transformers. It is possible
(17) to save components by using hybrid transformers
to furnish the bridge action as shown in the dia­
indicating that any noise or distortion generated at gram.
the input of the amplifier will not be reduced rela­ All the bridge and hybrid configurations have
tive to the desired signal by feedback.
The lower section of the diagram shows an am­
plifier with noise in the output, but none at the
input. Again by inspection,

eo = -

Gein +
1
�n p.{j (18 ) I N PUT

In typical circuits the amount of stabilized gain,

G, is independent of the amount of feedback ap­ •
Req
plied. Under these conditions the unstabilized for­
ward gain must be increased 1 decibel for each
adrlitional db of feedback applied and en /(1 + p.f3)
-

will be reduced by 1 db relative to the desired sig­

nal level for each additional db of feedback.
Effect of feedback on phase shift '' "
N1
Another important consideration in amplifier de­ N3 Rlnlt±6)
sign, especially near the corner frequencies (3 db
rolloff points), is the effect of negative feedback on
N
1 N2
N2
R ,J N

over-all phase shift. Assuming an amplifier with a a

forward voltage gain of p. L cJ> and a feedback loop
with transmission characteristics of {3 L cJ>, a stabi­
-

lized gain G/ a results. Mathematically,

1 {j
lin
p. L!!... Lt.
(1 9)
-

Converting to rectangular coordinates, equating

real and imaginary parts, and solving for a
p. {j sin cf>
1
_

sin 8
a = arctan tan 8 (20)
{j c/> bridge feedback
1 + p.
cos In with resistive bridges at
---­

cos (I both input and output, top, the input impedance, output
impedance and gain may be adjusted and stabil ized by a
Nomtally, the phase shift in the feedback loop factor (1 + p.fJ). At center, the input bridge has been
will be small; that is, � � 0. Then if p.fj > > cos 6, replaced with a hybrid transformer to simplify the circuit.
The penalty. however, is that it becomes more difficult to
obtain loop stability. The output bridge may also be
(21) replaced with a hybrid transformer, lower diagram,
but loop stability is a lso sacrificed.

159
 the same general advantage: they tend to control properly terminated hybrid transformer) and if
and stabilize not only gain and distortion, but also
N
input and output impedances. In general, they re­ pfJRc > r,6 Ro, then
duce any variation in these four parameters in an N
unstabilized amplifier by the factor (1 + p.f3). Zo � R L (27)
The degree of success attainable depends upon
the conditions that must be met. It should be re­ Practical design
membered that transformers in feedback loops The results of the foregoing analyses of various
tend to contribute both low- and high-frequency bridge feedback networks can now be applied to
phase shift and tend to aggravate the high- and the design of a practical amplifier. The amplifier to
low-frequency stability problem. be designed is based upon the configuration at the
The configuration represents the more conven­ top of p. 71, a basic bootstrap configuration. The
tional approach to bridge feedback. The input im­ load is to be a properly terminated 2-winding trans­
pedance can be shown to equal the series resistance former. This configuration can be reduced to an
of (Ra + Rb) in parallel with the series resistance of equivalent bridge circuit, in which the emitter
(R1n + Rc) plus a small increment that approxi­ resistor R2 has become the fourth and terminating
mately equals the change from its nominal value of leg of the output bridge.
R1n divided by (1 + p.f3). If (1 + p.f3) is large, this In a practical design it is a good idea to derive
increment is usually negligible. approximate design equations. The first step is to
If the equivalent resistance Req is defined as the establish the gain. In this case, by examination of
parallel resistance of (Ra + Rtn) and (Rh + Rc), then the bridge circuit e0 = e2 - e3 • When the bridge
Req is the fourth and terminating leg of the output is balanced, RtRa == R�L and e1 == e:�. Since e., is
bridge. If ReqRL == R1R3 , then R4 controls the independent of R4, eo also equals et - e1. Dividing
output impedance without affecting stabilized gain by e 1 == e2R2/ (R1 + R2), it follows that with
by adjusting the transmission loss k. proper impedance termination,
If, as is quite common, Ra == Rb == Rc = Rtn
and RL is large with respect to Ra, then {3 � � 1 Rt
= +
e1 R2

2 (Rt �"R,n) and But stabilized voltage gain G equals eo/ etn and by
inspection e1 ::::::: etn· Therefore G ::::::: eo/ e1 and since
R1 / R2 = Rd Ra, it follows that
Rt + R,n
G�2 {22)
{28)

(23) Adjusting output impedance

Similarly, the configuration in which the input If RL approaches infinity (output open-circuited)
bridge has been replaced with a hybrid transformer and since R4 is typically very small with respect to
may be analyzed to show that nominal stabilized R1, eo still approximately equals (e2 - e1), but e 1
•
gam will have changed. It can be shown that under
open-circuit conditions
{24)
e2 Rt (R2 + Ra + RJ
_

1 + (29)
e1 - R2 (Ra + R.)
and
With RL equal to infinity, open-circuit gain is
equal to R1 (R2 + Ra + �)/R2 (Ra + R.). If (R2 +
Zin = (25) R3 + �) = 2(R8 + R4), the open-circuit gain
would equal 2G, and heuristically the output im­
where R1n = nominal input impedance of the on­ pedance Zo would equal RL. That is if Zo = RL,
stabilized amplifier. R. � R2 - Ra (30)
Where the output bridge is replaced by a hybrid
transformer, Equations 29 and 30 can be confirmed by rigor­
ous analysis. If G is less than 100, the analysis
N,
G =
1
Ne • fJ '
- ·
if pfj z: > 1 , fJ = 1,
shows that equation 30 must be modified slightly to

R. �
G
� 1
(R2 - Ra) (3 1)
G� {26) In other words, equation 28 shows that the ratios
Rl RL
Nc
If R., =
or
RL, Rs Ra
N, + Ne
control gain, and B. controls output impedance.
(the usual value for the balancing resistor on a Using the corrected value for B. from equation

160
 31, it can be shown that Zo will be modified very r-------�--�- --- 8+
little by changes in gain in a practical two-stage
amplifier. Where transconductance gain would typ­
ically fall between the limits of 500 and 50,000,
output impedance will vary less than 2% due to
variations in the gain of transistors.
The equivalent circuit of the proposed amplifier
shown at right was based on assumptions that
introduced a small error in the calculation for the
value of R2• This effect can be shown by referring
to the schematic, at the right of the output bridge
alone with the impedance controlling resistor -
-

R4 removed. The factor k1 approximately equals

the reciprocal of the forward loop current gain
P1P2 (ern- •t ) Ra
following the first stage. The value of R2 required
R ; n2 R lnf R1n 2
to balance the bridge is Ra
r---� r--.r-
..,_.I!N --- �3; �--- .2
1
(32) -
-

Rt
1 + k, 1 +
RL

Thus, R2 will necessarily be somewhat smaller than

calculated by equation 28.
There exists a very useful modification of the
-
-

bootstrap circuit in which the input stage is a dif­

ferential amplifier. Basically, the second half of the om ( • , - •, , 1 A
n
differential amplifier acts as an impedance transfer t •2 eo
device in the feedback loop, thereby materially Rt RL
increasing the efficiency of both the feedback loop R4
and the total amplifier.
A differential bootstrap amplifier configuration •·
with bridge-type feedback is shown below. R2 be­
comes the parallel combination of R2' and R:/',
t
which raises the impedance level of the feedback
-
-

loop by an order of magnitude. This has at least Proposed amplifier, simplified schematic at the top, uses
bridge feedback at the output of a bootstrap amplifier.
two advantages: the input stage does not materially I n the equivalent circuit of the amplifier, the
load the feedback loop; and the feedback loop does transistors have been replaced with idealized constant­
not load the amplifier. current generators with discrete i m pedance defined by
R1n1 = rb1 + (Pt + l ) re� and R ••• = rbt + (p. + l ) ra�.
Experimental results It is also assumed that R. is larger than R , ...
By assuming that the drop across R • • is negligible,
An experimental thick-film audio amplifier was the circuit may be further simplified as shown at the
designed with a gain of 36 db with a 65-milliwatt bottom. I n this case, it is assumed that
breakpoint (point where sine wave distortion be­ J.flt + l)(ti,. - '•> is smaller than " - '•
gins) and 600-ohm input and output impedances. R,,.. Rt

flt R.
Practical limitations dictated that, if at all possible,
_jlt
R,,.t R,,., .
the power dissipated should be under one-half and g. is defined as
watt. As the application required transformer cou­
B-
pling to the load, the collector quiescent current
path was established through the external trans­
former.
The amplifier schematic shown at the top of p. 72
resulted from this approach. Equations 31 and 32
were confirmed by the fact that R4 had to be ad­
justed upward from 33 ohms to 36 ohms and R2
had to be adjusted to 47 ohms instead of 55 ohms.
The measured gain was 36 db from 200 cps to
100 kc. Low-frequency rolloff is due to the output
transformer, and the increase in output impedance
R'2
at high frequency is caused by parallel resonance
B+
of output transformer in this range. High-frequency
response is dependent upon both the output tran­ With additional grounded collector stage in the feedback
sistor and output transfonner. Both low- and high­ circuit, the input stage becomes a d ifferential
frequency characteristics could be improved by amplifier with improved efficiency.

161
 I .-------�--�--� r----- - 21 V
I
I 2N2102
I
( 2 N 2 2 1 9 ) t------�
I
I I
I I
M M999 7500 3000:600
I �----� �----_.----� �---------+----�� ��------�
± 5%

I I 36
I
I I �----� �----��--- ?-------�--�
e in ± 5%
I 47 22 I
I ± 5'- ± 5%
I
L - - - - - -..�..--- - - - - - - - - - _ J
-
-
-- --------.---�--�---.�
-21 v

� 2 N2219 0R
---- ----
t-- ------+- -4.
--+\. 2 N 2102
- 240
--:-----1) 1---t----H� MM999 TO 130
� •

oj �
oj '"
oj � E our
oj �
oj �
,2N
.... ... 8 34 1. 96 K oj
'

...�
rr-------.----------�--�· ..·.�---.---------J' m •�-----�­
I ' Ill ""
...

...._ 0.1
34 8 � .,.,... p.F .� 16. 2 K �� 1.78

-
-
Audio amplifier design, top, has the desired dynamic characteristics for a channel amplifier
i n telephone frequ ency m u ltiplex equipment. The differential bootstrap amplifier, lower diagram,
uses bridge feedback and is used as a broadband amplifier for handling a group of channels.

improving characteristics of the output transformer. amplifier suitable for baseband amplification. Ten­
Output impedance is essentially flat and independ­ tative design targets were 40-db gain; 0.5 watt
ent of transistor variations at midband. Distortion breakpoint; distortion more than 60 db down at
followed theoretical slopes below the breakpoint, nominal operating level of 25 milliwatts, over a
thus assuring reproducible units in production. frequency spectrum of 30 to 300 kc. The only major
A broadband differential bootstrap amplifier with adjustment to the original calculated design values
bridge feedback was evaluated by designing an was the requirement to raise the value of the im­
pedance control resistor from 1470 to 1960 ohms.
The dynamic operating characteristics were
measured with both a 2N2102 and a 2N2219 as the
output transistor. The 2N2219 transistor is recom­
mended since gain vs frequency is flatter, the
output impedance is under better control, and
distortion is 1 to 2 db lower than with the 2N2102.

Bibliography

-
-
Black, H.S., "Stabilized Feedback Ampl ifiers," Electrical

Millman, J. and Seely, S., Electronics, McGraw-Hill Book Co., Inc.,

Engineering, 1934.

If the emitter current of the first stage is 1941, pp. 606-618.

appreciable with respect to the output current, the Bode, H .W., Network Analysis and Feedback Amplifier Design,
effective value of Ra in the bridge is i ncreased D. Van Nostrand Company, Inc., 1945.
Applied Electronics, Members of Massachusetts I nstitute of
by a factor ( 1 + kt) where k. equals the ratio of
Wiley & Sons, Inc., 1947, pp. 525·539.
Technology Electrical Engineering Department Staff, John
the emitter current to the output current.

162
 Ci rcu it d esig n

• • • •

a 1 r1 n I r1 ers u ces
• •

ower s eres1s a n 1n

U n iq u e ci rc u it a r ra ngements prove that two Sch mitts

a re better than one for detecting low-l evel signal s

By Thomas Wei sz*

Phil ips laboratories, Bria rcliff Manor, N .Y.

Pairs of Schmitt trigger circuits, or combinations feedback arrangement like this means that the out­
of Schmitt triggers and differential amplifiers can put state of the circuit will always be just main­
form a unique family of circuits for detecting tained, even with the input voltage removed. How­
low-level signals at high frequencies. The sur­ ever, any small change in the input starts regen­
prising thing about these circuits is that they eration by virtue of the feedback, and the output
exhibit high switching and cycling speeds with ex­ switches to the alternate state.
tremely low hysteresis two characteristics that are At the top of page 76 is the equivalent circuit of
mutually exclusive in conventional Schmitt triggers. the trigger, represented as an amplifier with gain,
The new circuits are attractive as sense amplifiers G, in a positive feedback arrangement. The graph
in high-speed computer memory systems. is an idealized plot of output versus input for
In general, a Schmitt trigger operates with a the amplifier with the loop open. So long as the
finite difference between the set and reset levels at static loop gain (represented by the slope of the
which the input voltage will trigger the circuit line between points A and B) is unity, the cir­
to switch. This hysteresis characteristic limits cuit exhibits zero hysteresis. However, a circuit
the smallest signal the circuit can detect. Theo­ designed to operate with small hysteresis and fast
retically hysteresis may be reduced to zero if the switching cannot achieve fast cycling speed be­
circuit loop gain is made to equal unity. How­ cause of the presence of capacitor C. This capaci­
ever, one can only approach zero hysteresis at the tor is necessary to produce fast switching time by
sacrifice of high switching speed. increasing the loop gain dynamically. The capacitor
needs time to charge and discharge to new voltage
Feedback control regeneration
levels for each of the two circuit states.
In a conventional Schmitt trigger circuit such Without C, loop gain is unity and the circuit
as on page 76, unity loop gain can be achieved acts as an integrator; switching time depends on
by proper selection of the relative values of re­ the waveshapes of the input signals. If both
sistors Rt, R4 and R5• Unity loop gain in a positive C and R4 were omitted, switching and cycling
speed would be improved; but hysteresis would
* Now at the University of M ichigan, Ann Arbor be large because of static-loop gain increase.
Reducing hysteresis
The author
One way to reduce hysteresis in the conven­
Thomas Weisz, who was a senior tional circuit is to select a high ratio of R2/R3
engi neer at Ph i l i ps laboratories,
recently retu rned to the U n iversity
values. However, if R3 is too small, the loop
of M ichigan to seek a doctorate. He gain is reduced prohibitively; if R2 is too large,
-
- -::0_., '
received his master's deg ree in the switching time will increase because it forms
control engineering there in 1964. a large time constant with the output capacitance
of transistor Q2, limiting the output rise time.
What is needed, then, is a circuit that has unity
static loop gain for low hysteresis with very high

163
 dynamic loop gain during switching for high
speed, while also eliminating the delay intro­
duced by the coupling capacitor C. This is ac­
Rl R
2 complished by a circuit that essentially consists
R4 OUTPUT of two Schmitt trigger circuits connected in series
with a delay circuit between them, as shown in
02
-

the block diagram, left. Both Schmitt triggers

INPUT are direct coupled for maximum loop gain to
o,
c produce short switching time. As expected, this
introduces large hysteresis into the circuit. To
overcome this, the second Schmitt trigger is ar­
ranged so that directly after the first trigger
-
-
switches the voltage at the emitter of the first
INPUT + OUTPUT OUTPU T trigger's output stage is restored to a level at
+ which near-unity loop gain is established, result­
B ing in almost zero hysteresis. The delay is intro­
LIMITS
OF duced so that resetting the emitter voltage does
ACTIVE not interfere with the switching cycle itself. An
RANGE
A additional benefit of this arrangement is that
INPUT settings of the tripping point and the hysteresis
Standard Schmitt trigger circ u it can be represented
can be made independently.
by a m plifier with positive feedback. Open loop In the circuit at the left, transistor Q1 is part
cha racteristics a re shown for u n ity loop gai n . of the input d-e bias circuit and also provides
temperature compensation for Q2 to keep the
trigger level constant. Transistors Q2 and Qa form
INPUT SCHMITT DELAY SCHMITT OUTPUT the first Schmitt trigger, Q4 is an inverter and
TRIGGER 1 TRIGGER 2 Q!l and Q6 form the second Schmitt trigger. The
necessary delay is provided by the propagation
delay of the second Schmitt trigger. For maximum
switching speed, this delay should be never less
than the switching time of the first trigger, or
OUTPUT + v, very little more.
I
•

Theoretical cycling speeds

•

(i)_
•

•
At the lower left are waveshapes of voltages at
�o, points A and B, produced at maximum cycling
loa.
.... 05
•

""M-" speed. Here the rise and fall times of a stage are
•

� L. ..J �
�
•

._
assumed to be equal; t"1 and tM2 are the switching
03
�

04
•

�
�
•

times of the first and second stages, respectively.

0 The theoretical maximum cycling speed of the
� 2
O •
•

I
•

circuit is then
INPUT
- '- 1
D-C BIAS SCHMITT-TRIGGER 1 INVERTER SCHMITT-TRIGGER 2
fmax = (1)
-

2tsl + 2ts2
Two Schmitt circuits separated by a ppropriate delay When the circuit was actually implemented as
and with negative feed back reduce hysteresis to shown above, right, t"2 was measured and found
near zero, yet maintain high switch i ng speed. to be approximately half of t'��. This is because
the inputs to the second stage are of relatively
large magnitude, while the inputs to the first
area are in the millivolt range. Thus for these con­
ditions
1
fmax � 3 (2)
�r-��--+-r---+�--�---- t till
It can be shown that with a hysteresis of 1
mv for an ordinary Schmitt trigger, fmax = 1/50t".
Thus, the cycling speed represented by equation
2 is at least 10 times larger than that of the
ordinary Schmitt trigger operating at a 1-mv hys­
teresis.
In actuality, the highest attainable speed of
Idealized waveforms of voltages at points A a n d B of the circuit on page 77 was considerably below
circuit above show theoretical l i m its of cycle speed. the theoretical maximum. It was limited by the

164
 +3V

0.47 0.47 0.47

�
0.47
2.7 2.7 2.7 2 .7
0.001 0.001 0.00 1 0.001

-
- -
- -
- - -

� �
68 l k :� � 1 80
Os
�
�� 390
470 470
180 200
2N3010
F D.�o o
I' �
A

04
2 N 3010
liX \...
0.47
J
---f----t....._
2 N 74 4 � �
r li 05
I D 5 - 0 50A
\... �........
..__ �
.. ·t--
' -+� "0 ...
• ( Ge) � �
0.001 2 N 744
1.2k

- 2N3010
-

01
2N2894
INPUT I"X 02 ,
OUTPUT
\. 2 N 3010
03 " -

2 N 74 4
� 47

1.5 k :
;10 • : 1.5 k 150

-
-

4.7k

I
220 0.47 0.001

Actual circuit implementation of block diagram on page 76 falls short of maximum theoretical speed, but is at least
10 times faster than conventional Schmitt trigger. Oscil lograms show input and output waveforms.

stability of the clamping voltage applied to the compensates for somewhat poorer performance.
collector of transistor Q3 to prevent saturation. In this circuit a differential amplifier with one
This voltage decreased at higher frequencies, caus­ input grounded replaces the direct coupled Schmitt
ing the voltage across R3 to rise and resulting trigger previously described.
in the failure of small signals to trigger the cir­ The hysteresis of the circuit is approximately
cuit. Even with this limitation, the circuit per­
formed satisfactorily at 13 megahertz, with a I
H = o Rbe (3)
hysteresis of only 2 mv. Input and output wave­ 2
shapes are shown on the oscillograms above.
where Rbe is the base-emitter resistance of tran­
Second approach offers simplicity
sistor Q2 as seen from the emitter, and Io is the
A simpler single-input detector circuit results output current.
if a differential configuration like that on page 78 The switching speed is somewhat slower than
is used. The relative simplicity of this circuit that of the first single-input signal detector, pri-
 R2
R R
Rr Rt 0
t t
OUTPUT
a5
OUTPUT
INPUT

I N I-'liT a3
a, a3
Q2 a,
-
- -
-

-v
2 -v
2
Differential circuit with one in put grounded (left) is usefu l for detector applications where performance
is less critical. Whenever input 2 is smaller than input 1 then Qa will switch off.
In actual circuit, right, transistor Q. and external reference replace zener diode.

marily because more transistors are in the feed­ maximum permissible output resistance. A high r
back loop. in this case allows the output resistance, R2, to
One way to reduce hysteresis [top left, p. 79] is be kept low and limits its influence on the opera­
to return the output current to point A of the tion of the circuit. In effect, the circuit sees an
voltage divider formed by R3 and R4• The hyster­ output resistance rR2, and the effect of ouput
esis for the circuit is then current on hysteresis is reduced by the factor r,
while loss in loop gain due to this factor is restored
with transistor Q5•
In the implemented circuit the zener diode was
The loss in loop gain due to r is restored by replaced by transistor Q6 and an external voltage
adding a transistor Q1., as shown in the full cir­ reference Vrt>f 1 · When the circuit operates as a
cuit above, right. The upper limit of r corresponds, single-input signal detector, it can detect 8-mv
of course, to the point where the over-all loop pulses at a 14-Mhz repetition rate. Typical per­
gain is reduced to unity. formance is indicated by the oscillograms shown
The ability to reduce hysteresis in this way below.
is an important attribute of the circuit in addition
Differential detector
to its capability of detecting difference signals.
High values of r correspond to a high R2/ R3 ratio If the base of Q2 of the circuit above is discon­
in the circuit on page 76, axcept that in the pre­ nected from ground and connected instead to a
vious circuit, the value of R3 is limited by the second input, the circuit will detect the difference

Sensitivity of dlfferential detector, left, is somewhat less than that of direct coupled version at the rig ht.

166
 a,
VREF
Q4
Q7
R
z
R, Rt
R4 OUTPUT
D
Q
A
3

a, Q
2
Os
INPUT t
R ( INPUT
3 VI N 2
) l v2 t N l
-
-

When the output current is returned to point A of the

voltage divider formed by the two resistors, it reduces
the hysteresis in the differential detector circuit
shown at the top left of page 78.

between input 2 and input 1 that is , Qa will 05

switch off whenever input 2 is smaller than input 1. 820 2N3010 470
IN PUT 1
The magnitude of the smal1est resolvable difference 1k Q1
depends on the circuit hysteresis. A practical reali­ a, o2 2N30f0

zation of the circuit, called a differential input­

2N744
Q3 OUTPUT
signal detector, is shown at the lower right of this 47
10 47 1.5k 2N30 10
47
page. -

470
Q4
-
-

Transistor Q7 is an added grounded-emitter

-

2N916
output stage to provide low output impedance. 1.5 k -

Q6
150
-

The circuit is capable of detecting differences as 2 N289 4

small as 10 mv at 14 Mhz riding on a common­
mode input signal of 0.5 volt peak to peak.
- v2 • - 3 v
I mproved detectors
The differential input-signal detector can be Differential input detector at top is formed by removing
from ground the base of Q2 in circuit on the top left of
employed in the configuration shown in the diagram page 78 and providi ng a second i n put. Additional
at the top right. It is similar to the Schmitt trigger modification below converts circuit to a voltage band
configuration discussed on page 76. The hysteresis detector.
of the detector circuit can be reduced approximately
an order of magnitude by using this arrangement. DIFFERENTIAL INPUT ..
SCHMITT
DELAY TRIGGER
The block diagram shown below is another modi­ SIGNAL DETECTOR
fication of the basic differential detector circuit.
The modified circuit can detect the absolute value
of the difference between two input signals. Two
+3v
diodes are connected to the collectors of the tran­
sistors in the differential input stage. This circuit 2.7
0.4 7
detected an absolute difference value of 15 mv be­
tween the two inputs at a repetition rate of 14 Mhz. 390 470 1 k 0.001
The common-mode noise was 0.5 volt peak to peak. 2N3010
-
-

Band detector 2N3010

INPUT 1 2N3010 OUTP UT
In a useful modification of the circuit shown at
INPUT 2 47
right, center, transistor Q7 serves to reset Q3 when 2N744
input 2 reaches a certain value. The sequence of op­
eration is as follows : when input 2 is less than input 2N916 2N2894

1, then Qa is turned on. When input 2 rises above -

-

input 1 by some preset margin, �' then Q3 will 47 47 82

be turned off. When input 2 again exceeds input

1 by �' it will turn on Q7 and output transistor
470 IO 0.47

Qa will be switched on again. The circuit thus -

1
operates as a voltage band detector. It produces -

an output (Q3 switched off) when input 2 is within -

-

predetermined limits that are above the voltage at Detector's hysteresis is reduced by arrangement at top.
input I. Lower circuit detects absolute differences of inputs.

167
 Des i g n theory

• •

er1n es1
•

I uenc

At freq uencies above 100 Mhz scattering pa ra meters

a re easily measu red and provide i nformation d ifficult to obtai n
with conventiona l techn iques that use h , y or z pa ra meters

By Fritz Wei nert

Hewlett-Packard Co., Palo Alto, Calif.

Performance of transistors at high frequencies has Like other methods that use h, y or z parameters,
so improved that they are now found in all solid­ the scattering-parameter technique does not require
state microwave equipment. But operating transis­ a suitable equivalent circuit to represent the tran­
tors at high frequencies has meant design problems: sistor device. It is based on the assumption that the
• Manufacturers' high-frequency performance transistor is a two-port network and its terminal
data is frequently incomplete or not in proper form. behavior is defined in terms of four parameters, s 11,
• Values of h, y or z parameters, ordinarily used s12, s21 and s:.!2, called s or scattering parameters.
in circuit design at lower frequencies, can't be Since four independent parameters completely
measured accurately above 100 megahertz because define any two-port at any one frequency, it is pos­
establishing the required short and open circuit sible to convert from one known set of parameters
conditions is difficult. Also, a short circuit fre­ to another. At frequencies above 100 Mhz, however,
quently causes the transistor to oscillate under test. it becomes increasingly difficult to measure the h,
These problems are yielding to a technique that y or z parameters. At these frequencies it is difficult
uses scattering or s parameters to characterize the to obtain well defined short and open circuits and
high-frequency performance of transistors . Scatter­ short circuits frequently cause the device to oscil­
ing parameters can make the designer's job easier. late. However, s parameters may be measured di­
• They are derived from power ratios, and conse­ rectly up to a frequency of 1 gigahertz. Once ob­
quently provide a convenient method for measuring tained, it is easy to convert the s parameters into
circuit losses. any of the h, y or z terms by means of tables.
• They provide a physical basis for understand­
Suggested measuring
ing what is happening in the transistor, without
need for an understanding of device physics. To measure scattering parameters, the unknown
• They are easy to measure because they are transistor is terminated at both ports by pure re­
based on reflection characteristics rather than short­ sistances. Several measuring systems of this kind
or open-circuit parameters. have been proposed. They have these advantages:
• Parasitic oscillations are minimized because of
The author the broadband nature of the transistor terminations.
Fritz K. Weinert, who joined the • Transistor measurements can be taken remotely

techn ical staff of Hewlett-Packard whenever transmission lines connect the semicon­
in 1 964, is project leader in the ductor to the source and load especially when the
network analysis section of the
microwave laboratory. He holds
line has the same characteristic impedance as the
patents and has pu blished papers source and load respectively.
on pu lse circuits, tapered-line • Swept-frequency measurements are possible in­

transformers, digital-tuned circuits stead of point-by-point methods. Theoretical work

and shielding systems.
shows scattering parameters can simplify design.

168
Scattering-parameter definitions In matrix form the set of equations of 2 becomes
To measure and define scattering parameters the
two-port device, or transistor, is terminated at both -

(3)
ports by a pure resistance of value Zo, called the
-

B!ll 822
reference impedance. Then the scattering param­ where the matrix
eters are defined by su, s12, s21 and S22· Their phys­
ical meaning is derived from the two-port network Sn 81 2
shown in first figure below. [ s] = (4 )
Two sets of parameters, (at, b1) and (a2, b2), rep­ 821 Son
resent the incident and reflected waves for the two­ is called the scattering matrix of the two-port net­
port network at terminals 1-1' and 2-2' respectively. work. Therefore the scattering parameters of the
Equations 1a through 1d define them. two-port network can be expressed in terms of the
incident and reflected parameters as:
1
a1 = ( 1 a) ht ht
2 Sn = - 812 =
a1 a
2 = 0 a2 a1 = 0
1 (5)
bt = - - v' Zo I t ( 1b)
2 � �
&.!t = Son =
a. a = 0 a2 a1 = 0
1 2
&.t = (1c)
2 In equation 5, the parameter s11 is called the input
reflection coefficient; s21 is the forward transmission
1 coefficient; s12 is the reverse transmission coeffi­
-� = - (l d) cient; and s22 is the output reflection coefficient. All
2
four scattering parameters are expressed as ratios
The scattering parameters for the two-port network of reflected to incident parameters.
are given by equation 2.
Physical meaning of parameters
ht = su a1 + 81 2 a2
(2) The implications of setting the incident param­
eters a1 and a2 at zero help explain the physical

r, I2
t
+ +
2
a, 02
v, TWO - PORT v2
NETWORK
bt b2

I' - -

2'
Scattering parameters are defined by this representation of a two-port network. Two sets of incident and reflected
parameters (a1, th) and (a2, bt) appear at terminals 1 · 1 ' and 2·2' respectively.

Zo• Rot

t t �
'r0..1 2E Ot + Vt
TWO-PORT
NETWORK
+ V2 2o• Ro2

l l

r- - - - - - - - ,
By setti ng •• equal to zero the sn parameter
-

can be found. The Zo resistor is thought

I
I
I of as a one-port network. The condition
a. = 0 implies that the reference impedance
I
I I
I Roe is set equal to the load impedance Zo.
I I By connecting a voltage source, 2 Eot,
------.. b2 I with the source impedance, Zo, parameter
s11 can be found using equation 5.
I
L - -- - _ _ __ _ J
meaning of these scattering parameters. can be expressed as:
By setting a:! == 0, expressions for Stt and s22 can
E01
be found. The terminating section of the two-port at = ( 13)
network is at bottom of page 79 with the parameters VZo
a2 and b2 of the 2-2' port. If the load resistor Z0 is Since a2 = 0, then
thought of as a one-port network with a scattering
parameter 1
8.2 = 0 = -
2
(6)
from which
where Ro2 is the reference impedance of port 2,
then a2 and b2 are related by :Zo2 = - VZc; 12
8.2 = B2 b2 (7)
Consequently,
When the reference impedance R02 is set equal to
� =
the local impedance Z0, then s2 becomes 1
--
2
B-l -
Zo - Zo - 0 (8)
- Zo + Zo - Finally, the forward transmission coefficient is ex­
pressed as:
so that a2 == 0 under this condition. Similarly, when
at == 0, the reference impedance of port 1 is equal
to the terminating impedance; that is, Rot == Z0. ( 14)
The conditions at == 0 and a2 == 0 merely imply
that the reference impedances Ro1 and Ro2 are Similarly, when port 1 is terminated in Rot == Zo
chosen to be equal to the terminating resistors Z0. and when a voltage source 2 E02 with source im­
In the relationship between the driving-point im­ pedance Z0 is connected to port 2,
pedances at ports 1 and 2 and the reflection coeffi­
cients s11 and s22, the driving-point impedances can 8) 2 =
Vt
--=-- (1 5)
be denoted by: Eo2
Both St2 and S2t have the dimensions of a voltage­
(9) ratio transfer function. And if Ro1 == Ro2, then s 1 2
and s:n are simple voltage ratios. For a passive
From the relationship reciprocal network, s:n == S 1 2·
Scattering parameters s11 and s22 are reflection
b1
Su = - coefficients. They can be measured directly by
a1
a2 = 0 means of slotted lines, directional couplers, voltage­

Sn =
! [(Vt/ VZo) - vz;; l1l (10)
standing-wave ratios and impedance bridges. Scat­
tering parameters St2 and S2t are voltage
! [(Vt/ VZo) + v' Zo l1] transducer gains. All the parameters are frequency­
which reduces to dependent, dimensionless complex numbers. At
any one frequency all four parameters must be
( 1 1)
known to describe the two-port device completely.
There are several advantages for letting Rot ==
Ro2 = Zo.
Similarly, • The Stt and s 22 parameters are power reflection

Zout - Zo coefficients that are difficult to measure under

B22 = --=---=---=- ( 1 2) normal loading. However, if Rot = R02 == Zo, the
Zout + Zo
parameters become equal to voltage reflection
These expressions show that if the reference im­ coefficients and can be measured directly with
pedance at a given port is chosen to equal the ports available test equipment.
driving-point impedance, the reflection coefficient • The St2 and s2t are square roots of the trans­

will be zero, provided the other port is terminated ducer power gain, the ratio of power absorbed
in its reference impedance. in the load over the source power available. But
In the equation for Rot = Ro2 = Z0, they become a voltage ratio
and can be measured with a vector voltmeter.
� • The actual measurement can be taken at a dis­
B21 = - tance from the input or output ports. The meas­
a1 8.2 = 0
ured scattering parameter is the same as the param­
the condition a2 = 0 implies that the reference im­ eter existing at the actual location of the particular
pedance Ro2 is set equal to the load impedance R2, port. Measurement is achieved by connecting input
center figure page 79. If a voltage source 2 E01 is and output ports to source and load by means of
connected with a source impedance Rot = Zo, a1 transmission lines having the same impedance, Zo,

170
 . ¥

'

/
.•
.

J·,, .
::ch
.

25°C 100 Mhz 300 Mhz 100°C 100 Mhz 300 Mhz
Su 0.62 < - 44.0° 0.305 < - 8 1 .0° Su 0.690 < - 40° 0.372 < - 7 1°
s1 2 0.0 1 1 5 < +75 .0° 0.024 < +93.0° S1 2 0.0 1 2 5 < +76.0° 0.02 54 < + 89 .5°
S 21 9.0 < + 1 30° 3.85 < +9 1 .0° S21 8.30 < + 1 33.0° 3.82 < +9 4.0°
S22 0.955 < - 6.0° 0.860 < - 14.0° S22 0.955 < - 6. 0° 0.880 < - 1 5.0°

25°C 590 Mhz 1,000 Mhz 100°C 500 Mhz 1,000 M hz

Su 0.238 < - 1 19.0° 0.207 < + 1 75.0° Su 0.260 < - 96.0° 0. 196 < + 1 7 5.0°
s1 2 0. 0385 < + 1 1 0.0° 0. 1 78 < + 1 10.0° S1 2 0. 0435 < + 1 00.0° 0. 1 65 < + 1 03.0°
s2 1 2 . 19 < +66.0° 1 .30 < + 33 .0° S21 2.36 < +69.5° 1 .36 < +3 5.0°
s 22 0.830 < - 26.0° 0.838 < - 49. 5° S22 0.820 < - 28.0° 0.850 < - 53.0°

Scattering parameters can be measured directly using the Hewlett-Packard 8405A vector voltmeter. It covers the
frequency range of 1 to 1 ,000 megahertz and determines sa and Su by measuring ratios of voltages and phase
difference between the input and output ports. Operator at Texas Instruments Incorporated measures s·parameter
data for Tl's 2N3571 tra nsistor series. Values for Vca = 10 volts; lc = 5 milliamperes.

as the source and ]oad. In this way compensation on page 86 is convenient. The generator and the
can be made for added cable length. load are the only points accessible for measure­
• Transistors can be placed in reversible fixtures ment. Any suitable test equipment, such as a vector
to measure the reverse parameters s 22 and s12 with voltmeter, directional coupler or slotted line can
the equipment used to measure s 1 1 and S21 · be connected. In measuring the s21 parameter as
The Hewlett-Packard Co.'s 8405A vector volt­ shown in the schematic, the measured vector quan­
meter measures s parameters. It covers the fre­ tity V2/Eo is the voltage transducer gain or for­
quency range of 1 to 1,000 megahertz and deter­ ward gain scattering parameter of the two-port
mines s21 and s12 by measuring voltage ratios and and cables of length L1 and �. The scattering
phase differences between the input and output parameter s21 of the two-port itself is the same
ports directly on two meters, as shown above. A vector V2/Eo but turned by an angle of 360° (Lt +
dual-directional coupler samples incident and re­ L2)/ A in a counterclockwise direction.
flected voltages to measure the magnitude and Plotting s11 in the complex plane shows the
phase of the reflection coefficient. conditions for measuring s11• Measured vector r1
To perform measurements at a distance, the setup is the reflection coefficient of the two-port plus

171
 Amplifier design with unilateral s parameters
c

Step 1

. .

. .

: :
•

. '

Step 2
i80 20
-
en I� 1 ao -
I s 2. 1 :•• = t oo
5 1"' .
LLI
90 � �200 5 0 CD
A

LLI Q
-

� -

(!)
1000 0
10
000
LLI (!)
Q 0 �
1 200 1 Sztl!.1 4
- (!) 6 =

LLI
en
Sn 5 21 0
_,
Cl - 90 0
::J: -
0
Q.

- 1 80
0.1 1 to o.t 0. 5 to
M A G N ITUDE FREQUENCY ( G h z )
From the measured data transducer power gain is plotted as decibels versus frequency. From the plot a n
amplifier of constant gain is designed. Smith chart is used to plot the scattering parameters.

172
To design an amplifier stage, a equation 19 and the measured data signed according to the following:
source and load impedance com­ from step 1 . This detennines the • Plot su • on the Smith chart.

bination must be found that gives frequency response of the uncom­ The magnitude of su • is the linear
the gain desired. Synthesis can be pensated transistor network so that distance measured from the center
accomplished in three stages. a constant-gain amplifier can be of the Smith chart. Radius from
Step 1 designed. the center of the chart to any point
The vector voltmeter measures Step 3 on the locus of su represents a
the scattering parameters over the Source and load impedances must reflection coefficient r. The value of
frequency range desired. be selected to provide the proper r can therefore be detennined at
Step 2 compensation of a constant power any frequency by drawing a line
Transducer power gain is gain from 100 to 500 Mhz. Such from the origin of the chart to
plotted versus frequency using a constant-gain amplifier is de- a value of sn • at the frequency of

Step 3 CONSTANT
--- 100 M h z GA I N
- - - 500 M hz C I RCLES
64

..

20 16 pf
�'W\.r--tl �
''-
-- -,
v,.. -- J '

Zt
Source impedance is found by inspecting the input plane for realizable source loci that give proper gain. Phase
angle is read on the peripheral scale "angle of reflection coefficient in degrees."

1 73
interest. The value of r is scaled • The gain Go drops from 20 db At 500 Mhz,
proportionately with a maximum at 100 Mhz to 6 db at 500 Mhz, a GT(db) = 6 + 0 + 0 = +6 db
value of 1.0 at the periphery of the net reduction of 14 db. It is desir­ • A source impedance of 20
chart. The phase angle is read on able to find source and load imped­ ohms resistance in series with 16
the peripheral scale "angle of re­ ances that will Hatten this slope picofarads of capacitance is chosen.
flection coefficient in degrees." over this frequency range. For this Its value is equal to 50 (0.4 j2) -

Constant-gain circles are plotted case it is accomplished by choos­ ohms at 100 Mhz. This point
using equations 24 and 25 for G1. ing a value of r1 and r2 on the crosses the r1 locus at about the
These correspond to values of 0, constant-gain circle at 100 Mhz, - 7 db constant-gain circle of G1 as
- 1, -2, -4 and - 6 decibels for each corresponding to a loss of illustrated on page 83. At 500
s11 ° at 100 and 500 Mhz. Con­ - 7 db. If this value of r1 and r2 Mhz this impedance combination
struction procedure is shown falls on circles of 0-db gain at 500 equals 50 (0.4 - j0.4) ohms and
on page 83. Mhz, the over-all gain will be: is located at approximately the
• Constant-gain circles for s 22 ° At 100 lVIhz, + 0.5 db constant-gain circle. The
at 100 and 500 Mhz are con­ GT(db) = Go + G1 + G2 selection of source impedance is an
structed similarly to that below. = 20 - 7 - 7 = +6 db iterative process of inspection of

1 00 M hz
CON S TANT
---

GA I N
- - - 500 M hz C I RCL E S
' . . Gt

. .

.. .

5.0 pf 30 nH
�w. I< ''Yn
\ I
I J ·o
£1'0 v
z2
Load im peda nce is found by inspecting the output plane for loci that give proper gain.

174
the input r1 plane on the Smith G T(db) = Go + G 1 + G2 are only possible if either the input
chart. The impedance values at = 20 - 7 - 6 = + 7 db or the output port, or both, have
various frequencies between 100 At 500 Mhz, negative resistances. This occurs
and 500 Mhz are tried until an im­ 6 + 0.5 + 0. 35 = +6.85 db if sn or s22 are greater than unity.
pedance that corresponds to an However, even with negative re­
approximate constant gain circle Thus the 14-db variation from 100 sistances the amplifier might be
necessary for constant power gain to 500 Mhz is reduced to 0. 15 db stable. The condition for stability
across the band is found. by selecting the proper source and is that the locus of the sum of in­
load impedances.
• At the output port a G2 of put plus source impedance, or out­
-6 db at 100 Mhz and +0.35 db Stability criterion. Important in put plus load impedance, does not
at 500 Mhz is obtained by select­ the design of amplifiers is stability, include zero impedance from fre­
ing a load impedance of 60 ohms or resistance to oscillation. Stabil­ quencies zero to infinity [shown in
in series with 5 pf and 30 nano­ ity is determined for the unilateral figure below]. The technique is
henries. case from the measured s param­ similar to Nyquist's feedback sta­
• The gain is: eters and the synthesized source bility criterion and has been de­
At 100 Mhz, and load impedances. Oscillations rived directly from it.

"·

. '
e
..

' ' .
. "

. '

Amplifier stability is determi ned from scattering para meters and synthesized source and load Impedances.

175
input cable L1 (the length of the output cable has coordinates showing the magnitude and phase of
no influence). The scattering parameter s11 of the the impedance R in the complex reflection co­
two-port is the same vector r1 but turned at an efficient plane. Such a plot is termed the Charter
angle 720° L1 I ,\ in a counterclockwise direction. chart. Both charts are limited to impedances hav­
ing positive resistances, !rt l < 1. When measuring
Using the Smith chart transistor parameters, impedances with negative
Many circuit designs require that the impedance resistances are sometimes found. Then, extended
of the port characterized by s 1 1 or the reflection charts can be used.
coefficient r be known. Since the s parameters are Using a parameter in amplifier design
in units of reflection coefficient, they can be plotted
directly on a Smith chart and easily manipulated Measurement of a device's s parameters pro­
to establish optimum gain with matching networks. vides data on input and output impedance and
The relationship between reflection coefficient r forward and reverse gain. In measuring, a device
and the impedance R is is inserted between known impedances, usually 50
ohms. In practice it may be desirable to achieve
R - Zo higher gain by changing source or load impedances
r = (16)
R + Zo or both.
An amplifier stage may now be designed in two
The Smith chart plots rectangular impedance steps. First, source and load impedances must be
coordinates in the reflection coefficient plane. When found that give the desired gain. Then the imped­
the sn or s22 parameter is plotted on a Smith ances must be synthesized, usually as matching
chart, the real and imaginary part of the impedance networks between a fixed impedance source or
may be read directly. between the load and the device [see block dia­
It is also possible to chart equation 1 on polar gram top of p. 87] .

-J
Lt L2
•

L1+ L 2
°
360 ).
v
IN OUT
Zo Zo -2
Zo r " r 521 Eo
� - -- - - - - - - - �- -- -- - ---
� 1 \. 0

UNKNOWN
TWO-PORT
r'\..1� 2 E Zo v
2
•

-J
"' �
0

Zo

UNKNOWN
TWO-PORT 2 Tl2
Y2 e 1 >.
-j 2 T L2
E0 e >.

+j
2LI
360°
IN ___ ouT
.., ). ,,
.._ Zo
Zo r st t
+--- _.....,. t--,
\.
0
- - - - - - - - - - - - - - - -

UNKNOWN
-j
TWO-PORT

ZIN1 - Z o
'• = Z I + Z ;
IN 0

s parameters can be measured remotely. Top test setup is for measuring St:t; bottom. for Su. Measured vector Vs/Eo
is the voltage transducer gain of the two-port and cables Ls and La. The measured vector r1 is the reflection coefficient
of the two-port plus input cable Lt + Lt. Appropriate vectors for r1 and s parameters are plotted.

176
 Zo

INPUT TRANSISTOR OUTPUT

�"'r0
.I
MATCHING
NETWORK s," s22's2,. s ,2
MATCH ING
NETWO R K
Zo

To design an amplifier stage, source and load impedances are found to give the gain desired. Then impedances a re
synthesized, usually as matching networks between a fixed impedance sou rce or the load and the device. When
using s parameters to design a transistor a mplifier, it is advantageous to distinguish between a simplified or
unilateral design for times when sa can be neglected and when it must be used.

When designing a transistor amplifier with the In designing an amplifier stage the graphical
aid of s parameters, it is advantageous to dis­ procedure shown at the bottom is helpful. The
tinguish between a simplified or unilateral design measured values of parameter s11 and its complex
for instances where the reverse-transmission param­ conjugate s11 ° are plotted on the Smith chart to­
eter s12 can be neglected and the more general gether with radius distances. Center of the constant­
case in which s21 must be shown. The unilateral gain circles located on the line through s11 ° and the
design is much simpler and is, for many applica­ origin at a distance
tions, sufficient.
G1 I su i
rot = (24)
Unilateral-circuit definitions G1 m ax 1 - l sn l 2 (1 - Gt/Gt m ax)
Transducer power gain is defined as the ratio The radius of circles on which G1 is constant is
of amplifier output power to available source
power. V 1 - GtfGt m ax (1 - l sn l 2)
Pol - (25)
l - l sn l 2 (1 - GtfGt m u )
_

(17)
If the source reflection coefficient r1 is made equal

For the unilateral circuit Gr is expressed in terms

of the scattering parameters s1t, s21 and s12 with
S t2 = 0.
GT = Go . Gt . G2 ( 18)
where:
Go = I 821 1 2 = transducer power gain for
Rt = Zo = Rt (19)
The two-port i s terminated at the ports by
impedances containi ng resistance and reactance.
(20) Expressions for the transducer power gain can then be
derived i n terms of the scattering parameters.
= power gain contribution from change of
source impedance from Zo to Rt

rl =
Rt - Zo
(2 1)
Rt + Zo CIRCLES ON
WHICH G = CONSTANT
= reflection coefficient of source impedance 1
with respect to Zo
-t t
1 - I r2 1 2
Gt �-----+:c­
- r2 822 1 2 (22) t
G =1
II
-
-

= power gain contribution from change of

load impedan ce from Zo to Rt
Rt - Zo
lt = (23)
Rt + Zo
A graphical plot helps In design of a n a mplifier stage.
= reflection coefficient of load impedance Here the measured parameters Su and Su • are plotted
with respect to Zo o n a Smith chart. The upper point Is Su *.

177
to s 11 °, then the generator is matched to the load phase is read directly on the 8405A meter. When
and the gain becomes maximum (Gtmax). Constant­ switched to the alternate position, the s21 parameter
gain circles can be constructed, as shown, in 1- or is read directly from the same ratio.
2-decibel increments or whatever is practical using
Accuracy and limitations
equations 9 and 10.
If the source impedance R1 or its reflection coeffi­ When measuring small-signal scattering param­
cient is plotted, the gain contribution G1 is read eters, a-c levels beyond which the device is con­
directly from the gain circles. The same method is sidered linear must not be exceeded. In a grounded­
used to determine G2 by plotting s22, s22 °, constant­ emitter or grounded-base configuration, input volt­
gain circles and r2. age is limited to about 10 millivolts rms maximum
Examples for the design procedure are given in (when measuring su and s21). Much higher voltages
greater detail in Transistor Parameter Measure­ can be applied when measuring s22 and s12 param­
ments, Hewlett-Packard Application Note 77-1. The eters. In uncertain cases linearity is checked by
procedure is outlined in ccAmplifier design with uni­ taking the same measurements at a sampling of
lateral s parameters," beginning on page 82. several different levels.
The system shown is inherently broadband. Fre­
Measuring s parameters
quency is not necessarily limited by the published
S-parameter measurements of small-signal tran­ range of the dual directional couplers. The coupling
sistors require fairly sensitive measuring equip­ factor K falls off inversely with frequency below
ment. The input signal often cannot exceed 10 milli­ the low-frequency limit of a coupler. The factor K
volts root mean square. On the other hand, wide does not appear in the result as long as it is the
frequency ranges are required as well as fast and same for each auxiliary port. Since construction of
easy operation. Recent advantages in measuring couplers guarantees this to a high degree, measure­
equipment have provided a fast and accurate meas­ ments can be made at lower frequencies than are
uring system. It is based on the use of a newly de­ specified for the coupler.
veloped instrument, the H-P sampling vector volt­ The system's measurement accuracy depends on
meter 8405A [see photo p. 81], and couplers. the accuracy of the vector voltmeter and the cou­
The vector voltmeter covers a frequency range plers. Although it is possible to short circuit the
of 1 to 1,000 Mhz, a voltage measurement range of reference planes of the transistors at each fre­
100 microvolts full scale and a phase range of quency, it is not desirable for fast measurements.
± 180° with 0.1" resolution. It is tuned automat­ Hence, broadband tracking of all auxiliary arms of
ically by means of a phase-locked loop. the couplers and tracking of both channels of the
Directional couplers are used to measure reflec­ vector voltmeter are important. Tracking errors are
tion coefficients and impedances. A directional cou­ within about 0.5 db of magnitude and +3° of phase
pler consists of a pair of parallel transmission lines over wide frequency bands. Accuracy of measuring
that exhibit a magnetic and electric coupling be­ impedances expressed by s11 and s22 degrade for
tween them. One, called the main line, is connected resistances and impedances having a high reactive
to the generator and load to be measured. Measure­ component. This is because s1 1 or s22 are very close
ment is taken at the output of the other, called the to unity. These cases are usually confined to lower
auxiliary line. Both lines are built to have a well frequencies.
defined characteristic impedance; 50 ohms is usual.
The voltage coupled into the auxiliary line consists
of components proportional to the voltage and cur­
rent in the main line. The coupling is arranged so Bibliography
that both components are equal in magnitude when Charter, P.S., "Charts for Transmission-Line Measurements and
the load impedance equals the characteristic im­ Computations," Radio Corp. of America Review, Vol. I l l, No. 3, Jan­

�
uary, 1939, pp. 355·368.
pedance of the line. Smi h, P.H., "An Improved Transmission Line Calculator," Elec­
Directional couplers using two auxiliary lines in tron�cs, January, 1944, pp. 130-325.
Alsbert, D.A., "A Precise Sweep-Frequency Method of Vector l m·
reverse orientation are called dual-directional cou­ pedance Measurement," Proceedings of the I RE, November, 1951,
pp. 1393-1400.
plers. A feature of the unit is a movable reference Folli ngstad, H.G., "Complete Linear Characterization of Tra nsistors
plane; the point where the physical measurement from Low through Very High Frequencies," IRE Transactions on
I nstruments, March, 1957, pp. 49-63.
is taken can be moved along the line connecting the General Radio Experimenter, "Type 1607-A Tra nsfer-Function and
coupler with the unknown load. A line stretcher is lmmitance Bridge," May, 1959, pp. 3-1 1 . General Radio Experi·
menter, "Mounts for Transistor Measurements with the Transfer·
connected to the output of the first auxiliary line. Function Bridge," February-March, 1965, pp. 16·19.
The reference plane is set closer to the transistor Mathis, H . F., "Extended Tra nsmission-line Charts," Electronics,
Sept. 23, 1960, pp. 76-78.
package than the minimum lead length used with Leed, D., and 0. Kummer, "A Loss and Phase Set for Measuring
the transistor. Additional lead length is then con­ Tra nsistor Parameters and Two-Port Networks Between 5 and 250
Me," Bell System Technical Journal, May, 1961, pp. 841-884.
sidered part of the matching networks. The influ­ Kurokawa, K., " Power Waves and the Scattering Matrix," Institute
of Electronic and Electrical Engineers Transactions M icrowave
ence of lead length is also measured by changing Theory and Techniques, March, 1965, pp. 194·202.
the location of the reference plane. Leed, D., "An Insertion Loss, Phase and Delay Measuring Set for
Characterizing Transistors a nd Two-Port Networks between 0.25
Measurement of s11 parameter is made when the and 4.2 Gc," Bell System Technical Journal, March, 1966, pp. 340·
instrument is switched to one of two positions. The
Hewlett-Packard Journal, "The RF Vector Voltmeter," Vol. 17, No.
397.

quotient VB/VA equals the magnitude of s11• Its 9, May, 1966, pp. 2-12.

178
Des ig n th eory

z1n
•

WI

A new tec h n i q u e for solving the d i fferential equations that describe

the dyna m ic behavior of a l i nea r system a rranges them
i n a form eas i ly fed i nto an analog computer

By Lou i s dePian
George Washington University, Washington

For circuit analysis, most engineers still rely on the First-order equations give the state-variable tech­
conventional mesh and node techniques taught at nique its strongest advantages: they are ideally
engineering schools. These methods work even suited to solution by either analog or digital com­
though they sometimes produce complex nt11-order puter. In an analog computer only one integrating
differential equations that defy easy solution. To network is required for each equation. Furthermore,
analyze many new complex designs in a reasonable state techniques need not be restricted to systems
amount of time, the engineer wants an assurance that are described only by differential equations;
of simpler equations. For that there is a new mathe­ they may also be used to analyze and design se­
matical tool called the state variable. quential machines, switching networks and sam­
The state variable is a quantity that describes pled data systems. Indeed, the present trend in
the energy stored in a system, hence, the state of system theory is toward intensified study of time­
the system. \Vhen the system is an electrical net­ domain models through the notion of state.
work, the variables are usually the currents through The advantages of the state variable method are
the inductors and the voltages across the capacitors best seen by comparing the approach to analyzing
of the network. This choice allows the engineer to a circuit with that of conventional analysis.
Example 1: Conventional versus state variable
describe the dynamic behavior of a network with
n first-order differential equations rather than one
nth-order differential equation. Thus, if a network In the conventional method, Kirchhoff's voltage
is usually described by a second-order differential law, when applied to the loops of the network,
equation , the state-variable method describes this at top of page 64, yields the following equations:
network with two first-order differential equations.
dt - c
. 1
lt
These first-order equations are written in terms of i dt (1)
the chosen state variables and any input voltage or •

current sources.
di + 1
0 = Rol. + L
dt C
. dt - --
1
1
c
it d t ( 2)
The author
Since receiving his doctorate in
1 952 from the Carnegie Institute of The output is
Technology, Louis dePian has been Co = Roi (3)
teaching electrical engineering.
Presently he is at George The conventional method requires that i and it be
Washington Un iversity. His eliminated from equations 1 and 3 so that the out­
contributions to network theory put e0 becomes the only unknown in the equation.
include a textbook, "Active Linear To accomplish this, equations 1 and 2 have to be
Network Theory. " He is also a
consultant to private research differentiated to eliminate the integrals and the re­
companies near Washington, D.C. sult manipulated by substitution to remove i and it.

179
 R L tion. In the state-variable method two first-order
... 'II' 'II'
•
••
&

• differential equations, 7 and 8, are solved for i

,
I
•

i i+ I
•

i+ and v, and the output is given directly by equation

"""' +ei v
to
\.. � - I N PUT
c � �
OUT PUT
R0 10. \Vhen the equations have been brought into the
form of equations 7 and 8 or simply equation 9, they
-

� !- are said to be in the normal form.

Current i through the inductor, and voltage v across Establishing a general procedure
the capacitor a re chosen as the state variables.
Fi rst-order d ifferential equations are then The preceding example was a simple one, so the
written to express the dynamic behavior network equations written in the normal form are
of the network i n terms of i and v. relatively uncomplicated while, the equations for
state-variable analysis are rather complex.
In the general case, however, the opposite is true.
Hence, In fact, it is in the general form that the equations
of the state variable method lend themselves so
Ro 1 deo well to electronic computation. The network has k
+
L RC dt inductors, n-k capacitors (total number of induc-
tors and capacitors equals n, the order of the net­
+ Ro 1Ro
e1 work), and m inputs. The state variables are the
1 --
LC R (4)
R currents it, i!! , . . . , ik through the inductors and the
In the state-variable method, the selected state voltages vk + � , vk +!!, . . . , V n.
variables are the current i through inductor L and First step. Take the voltage VJ (j varies from 1
the voltage v across capacitor C since these terms to k) across each inductor, express it as LJ( diJ/ dt),
are directly related to the storage energy elements and equate it to the sum of the associated voltages
in the network. To write the state-variable equa­ according to Kirchhoff's voltage law. These voltages
tions, the voltage across the inductor, L(di/ dt), and are of three categories: (a) voltages across capac­
the current through the capacitor, C(dv/ dt), are itors expressed in terms of state variables vi; in
expressed in terms of the state variables and the general there are as many such terms as there are
input. Thus, capacitors, so these can be expressed as the sum
of all capacitor voltages,
di
= V - R·ol. n

�
L (5)
dt Eji Vt
i= k+l
dv 1 1 where EJ1 are dimensionless coefficients; (b) volt­
c dt = R C t - R V - 1 (6)
•

ages across resistors in terms of state-variable cur­

rents through inductors; in general there are as
or after rearranging, many such terms as there are inductors, so these
can be expressed as the sum of all resistor voltages,
di Ro 1
- i+ v + O e1 k
�
(7)
dt
-

L L
-

RH i i
i=l
dv 1 1 where RJ1 has dimensions of resistance and is ex­
V + -=-:::::- Ct (8)
dt Rc RC pressed in terms of the resistances of the circuit;
(c) input voltages and currents x1; in general there
Only the first derivatives of the state variables are as many such terms as there are inputs, so these
appear. In matrix notation these equations may be can be expressed as the sum of all inputs,
rewritten as

- Ro
di 1 1=1
0
• •

1
•

dt L L where FJ1 is dimensionless if the input x1 is a volt­

age or has dimensions of resistance if the input Xt
-
- + Ct (9) is a current. Thus, the total voltage across each
inductor is
dv -
1 1 1
-
v
dt c RC RC

The output may now be expressed directly in terms k m

of the state variable and the input. In this case, it + � Rji ii + 2; Fj i Xi (11)
i=l i=l
is simply
j =.k 1, 2, . .
Co = RJ (10) Second step. Take the current iJ (j varies from
In the conventional method the designer must k + I to k + n - k = n) through each capacitor,
solve equation 4, a second-order differential equa- express it as CJ(dvJ/ dt), and equate it to the sum

180
 of the associated currents according to Kirchhoff's lj
•

current law. These currents are also of three varie­ d i.

ties: (a) currents through inductors expressed in dt
•

terms of state variables i1• There are as many such •

terms as there are inductors, so these may be ex­

•

pressed as the sum of all inductor currents,

I
• •

k
RH I Eji
2;
dik FH
HH i i I lk Xi
•

i=l Lj Lj Lj •
I
dt
where HJ1 are dimensionless coefficients; (b) cur­ 1 + •
-
- - - - - - - - - - - - - -

I
- - -- -

- - -

rents through conductors in terms of state-variable dvk+t HH GH KH

•

voltages across capacitors. There are as many such I Vk+j Xm

cj cj cj
I
dt
terms as there are capacitors, so these may be ex­
pressed as the sum of all currents through con­ I
• •

ductors,
•

(14)
n
•

2; Gj i Vi dvn
i=k+l
•

dt
where GJl has dimensions of conductance and is Vn
expressed in terms of the resistances of the cir­ where
cuit; (c) input voltages and currents Xt. There are
as many such terms as there are inputs, so these Rji
is a k X k matrix,
may be expressed as the sum of all inputs, Lj

is a k X (n - k) matrix,
where KJ1 is dimensionless if the input x1 is a
current, or has dimensions of conductance if the
is a (k - n) X k matrix,
input x1 is a voltage. Thus,
. d v j k
j = Cj = 2; H H i i
l dt i-1 is a (n - k) X (n - k) matrix,
n m
+ 2; Gji Vi + 2; Kji Xi ( 1 2)
i=k+l is a k X m matrix,
i=l
j = k + 1 , k + 2, . . , n. .

The normal form is obtained by dividing equation

is a (n - k) X m matrix
11 by LJ, equation 12 by CJ and rearranging
dit Rt , k . Rt ,k . Et ,k+t
t
+• . .+ + A more compact form may be obtained with
- It L Ik Vk+l + · . .
_

dt Lt Lt the following definitions:

+ Ft ,t ij(t) j = 1 2, . k
•

• •

I.J)
•

Vn (15)
v (t) j = k + l, k+2, . . . , n
•

Qt(t) .
•

[q(t)] = •

•
(16)

Q n(t)
[q(t)] is called the state vector.
R ·· I E,i
-=-'J,_I _ I •
Lj I LJ
[A] = -

-I - - (1 7)
HH I
- - - ­

Gu
cj I cj
dvn Hn,i + + Hn k + Gn, k+l
l+. • Fu
•

i
•

dt - ---:
C:-'-
::- n - l . . e ' lk C n Vk+
n Lj
+ G n,n + Kn , i · · Kn,m [B] - ( 18 )
- -

Xt + + C Xm {1 3}
C.Jn
-

Vn
- -

Cn n Ku
with matrix notation, these equations condense to OJ

181
 R l circuit is large and when alternate designs of a
i
network must be considered. In simple cases,
like the previous example, either method is con­
venient and the choice depends on personal prefer­
-
ence.
Example 2 is offered to further illustrate the gen­
Single-loop RLC network is analyzed by the state­
eral procedure for setting up the state variable
variable technique with i, the current through equations (7,8).
Example 2: Series R LC network
the inductor and v, the voltage across the capacitor.

Problem: express the dynamic behavior of the

Xt(t)
• nehvork shown at left in terms of its state var­
[x (t ) ] =
·

( 1 9) iables.
•
First. Choose the state variables. As in example
Xm(t) 1 the current through the inductor, i, and the volt­
age across the capacitor, v, are chosen.
The normal form is then: Second. Form a first-order differential equation
for each state variable (dil dt and dvl dt) in terms of
d [q(t)] = v and the input voltage e1 •
[A] [q(t)] + [B] [x(t) ] (20)
dt
di R . 1
A direct polution can be obtained by integrating = - - v+
L 1
each dq ( t) I dt once, since every dq ( t) I dt term in
dt L
equation 20 represents the first derivative of each and,
state variable [q(t) ]. Sets of equations of this type
are ideally suited to analog computation and it is dv 1 .
=
the form that we want to obtain. The right-hand side dt c 1
of equation 20 represents the sum of a matrix
[A] multiplied by a matrix [q(t)] , which contains a Third. Write the normal form matrix equation.
column of state variables, and a matrix [B] multi­ Hence,
plied by [x(t)], which contains a column of input di -R 1 • 1
functions. In the previous example, the equivalent dt L L 1 J...,
of these matrices were
+
Qt (t) = i(t) , q2 (t) = v (t)
-

(21)
-

Qt(t) dv 1
[q(t)] = 0 v 0
(22) dt c

1 [A] [B]
-
L
Choosing the state variables
[A] -
-
(23)
1 1 So far only the inductor currents and capacitor
- voltages were chosen as the state variables. This
-

c RC
choice was arbitrary. Other voltages and currents
0 as well as their derivatives can also be designated
( B] -
-
(24) state variables. The reason for this initial choice
1 was that these particular variables directly de­
scribe the energy stored in the network. If iJ is
RC
the current through inductor LJ, then the energy
[x(t)] = et (t ) (25) stored in this inductor is lh LJii�. Similarly if VJ
is the voltage across capacitor Ch the energy
So far only the normal form equations are set stored in this inductor is lh LJii!. Similarly if
up. No attempt has been made to solve them. The VJ is the voltage across capacitor CJ, the energy
general form of the solution is described later. stored in this capacitor is lh CJvi�. In fact, the
Although the method may seem complicated at total stored energy in the general network de­
first, it is really a straightforward procedure de­ scribed by equations 11 and 12 is
veloped from routine steps. In fact, these steps
k n

w � Lj i j2 + �
can be easily programed into a digital computer.
= � ! cj vj2 (26)
And here lies one of the advantages of the state­ j=l j=k+l
variable method: its form is such that the digital
computer can readily set up the equations. Actu­ In example 1, the state variables were i, v and
ally, the computer becomes necessary only when the total stored energy was
the number of elements, loops and nodes of the W = ! Li2 + ! Cv2 ( 27)

182
 IS THE NETWORK COMPLEX ?

STATE- VA RIABLE I F SO I F NOT CON VEN T ION AL

T EC H N I Q UE TECH N I QU E

WRITE LOOP O R NODE EQUAT I O NS FROM

C HOOSE THE VAR I AB L E S T HAT R E FL ECT K I RC HHOFF'S VOLTA GE AND C U RRENT LAWS
THE STATE OF T H E E NERGY ELEME N TS, AND OHM'S LAW FOR E L E M E N TS
i n FOR EACH CURRENT TH ROUGH AN I NDUCTOR, -

Y n FOR E ACH VOLTAGE ACROSS A CAPACI TOR

..c.�.
•

L, L ..
c..

·-.--, ,......--·
-

J('}rr,n--- ,.
{,1

c_,
-
-
. . .•. . .••..• ... bROER. OIFFE.RENTIAL EQUATIONS
- -- - '

. ..
,
:•
0 ••

.
-
' -:: -
'>;-_'
•

- '

D E T E R M INE I N I T I A L CONDI T I ON S , F I N A L CONDI T I O N S A N D

. BOUNDARY - VALUE CON D I T I O N S O F T H E NETWORK

' :-
� -=<- -
- :=
-
: _-.:
' - ' '

_ =· _
-_: ·.:··._ .=-!'_ ·:· -_:__;-= .; _· ·:.- :: :__ ',:·-
, _
WRI TE T H E LAPLACE RELAT I O N S FOR E AC H
-
-

- --- - - -
-�

O F T H E D I F F E R E N T IA L E Q U ATIONS
-- ' - ' -
-
, - · _ ,._
'- - : =·.... :_ _·< .=. ·-· · =·-
· ,
--
-''· "
-" .
'- :
> : --
-

<

: _-_:.-· ' ' . · ::

I . - ' := /' : · -- -
•
-· - . · _ ' ._.--.-. - ·- -- = · __
·

.-::

. : --­
- _.-:-·; - -
S U BST I TU T E I N I T I AL C ON D I T I O N S
.._ .-__ ' :
' .-·-' -

._,-.

.
-- .;• -
,;,
: - - '- -
'
'
-'

I S O L AT E TH E K N O W N S AND U N K NOWNS
I N PAR T I AL F RAC T I ON FORM

F (r-> + ,..:. , f-c.,.;..# �" ..

F E ED EACH F I RST-ORDER D I FFERE NTIAL I{r') o:a. tl"' s-"' +-. a. ., _, s .,. _,+- • • • �0
E QUAT ION I N TO AN I N TEGRAT I NG ANALOG
COM P U TE R AND OBTA I N THE D E S I RED
RESULTS , i A N D v
(..
SOLVE E ACH F RAC T IO N FOR EACH VA R I ABLE D E S I R E D
c£:,
:a(�,., ) A "' A .,.
•

(4 · �, T Cs) ·t
�
cs.... .s-... )
. • .

c. �...-� . ·c r..,. r-1';

------
b;
r,
(/.�
TAK E T H E I N V E R S E L APLACE FOR E AC H VAR IAB L E ,
S U M A N D OB TA I N THE DESI R E D R E SU LT

The engineer first decides u pon the complexity of the network

as indicated in this comparison of the state-variable and con­
ventional techniques. Key difference between the two
techn iques is emphasized by the shaded areas.

183
 Another reason why these particular variables 1 1
are chosen as the state variables is that usually Qt =
LC LC
the initial conditions necessary to obtain a solution
of the differential equations are given in terms and, noting that d2eol dt2 == dq2/ dt yields
of inductor currents and capacitor voltage or
charge. However, the derivative of a state variable = -
1
1 +
Ro Qt
can also be defined as a new state variable. In LC R
example 1, we could have chosen as the state vari­
Ro 1 1
ables i, and di/ dt, rather than i and v, since v - + (35)
can be expressed as a function of these and the L RC LC
input. (compare with equation 33).
In terms of the state variables q 1 and q2 the
di
--
v = L + Roi (28) matrix normal form of equation 20 IS now ex-
•

dt pressed as,
In fact, the output and its derivatives (as many 0 1
derivatives as necessary to have the proper num­
ber of total variables) may be used as state var­ [A] = (36)
iables. In example one, we could have chosen e0
an deo/ dt as the state variables since the original 1 _B-� - Ro 1
-
1+ +
state variables can be expressed linearly in terms LC R L uc
of these. (Here we are not showing the general
0
(37 )
method by which these linear relationships can
[B] =
be found, but simply that they exist.) Let
Ho
Qt = eo, q2 = deo/dt (29) H LC

It is not difficult to show that This procedure connects the conventional form
of one differential equation to a normal form in­
1
i = q, (30) ; (3 1 ) volving the output and its derivatives as state
Ro variables. It is also possible to go from one set of
state variables to another. Although these opera­
Combining these equations with 7 and 8 (the
tions are rather simple, they become more com­
normal form in terms of state variables i, v) yields
plicated for more elaborate networks. There are,
the normal form in terms of the new state var­
however, direct techniques (amenable to digital
iables q1 , q2:
computer programing) for performing these opera­
tions in the normal form. The manual difficulties
= Oq1 + Q2 + Oe1 (32) involved in these operations are matrix manipula­
tions, such as matrix inversions. These are routine
calculations for digital computers.
dq2 1
1 +
Ho Another advantage of the state-variable approach
=
dt - -=-Lc-=-- R is that it adapts very easily to analog computer
Ro applications. The equations once in normal form
Ro + 1
(33)
RC RLC at
-

L dqt
= AnQt + + AtnQn
dt
• • •

+ BnXt + + BtmXm
(38)
• • •

Converting to normal form •

It is always possible, given an ntb_order

differential equation of the network in the con­
d n
d
i
= AntQl + + AnnQn• • •

+ ButXt + + BnmXm • • •

ventional form, to find a set of n equations in the may be written, after integration, as
normal form. To show this, consider differential
equation 4. Define as the state variables , the var­
Qt dt + • • · + Atn
iable of the differential equation q1 = e0 and its
derivative q2 = de0/ dt. This immediately results
•

•
m
•

• + Bn X tdt + · · • + Bt m
dql
•

(34) •

dt

Substituting these variables in equation 33 yields:

+ Bnl Xtdt + • • • + Bnm Xmdt (39)
d2e-=---
--=-·o - + Ho + 1
dt2 L RC These are in the exact form of the operations that

184
the analog computer performs: summation, inte­ from equation 20 and substitute it in equation 12
gration and multiplication by a constant. for the solution.
Here, the proof is not presented, only results
Solving the equations
are shown. The solution for q(t) in the time domain
So far only aspects of how the differential equa­ takes the form
tions are established in normal form have been
presented. Now it is possible to establish the (q(t)] = E ( Al t(q (o)] +
general procedure for their solution. The solution 0

can be performed either in the time domain or in where [q(o)] is the state vector defining the initial
the frequency domain, with Laplace or other oper­ conditions of [q(t)]; [A] and [B] are the constant
ational transforms. matrices in equation 20 and
The normal form is given by equation 20 where
q(t) is a vector (state vector) defining the n state
variables as in equation 16, and x(t) is the input
� 2
E ( A ) t = [I ] + [A]t + [A]2 ! +[A]3 �31 + • • •
(47)
vector defining the m inputs as in equation 19. The
matrix [A] is an n X n matrix and [B] an n X m usually written as
matrix containing element constants of the net­ [f!J (t)] = E ( A] t (48)
work. is known as the fundamental matrix. [I] is the
For p outputs, the solution includes Yt(t), y2(t), identity matrix whose elements are all unity. The
. . . , yp(t), defined as an output vector 2
matrix [A] = [A] [A], [A] 3 = [A] [A] [A] etc. In
YI (t) equation 46, [B] cannot be removed from the in­
tegral, even though it is a constant, since in matrix
Y2 (t) multiplication, the order cannot be changed.
[y(t) ] = •
(40) This solution now may be applied to example
•

1 with the following numerical values:

•

yp(t) 1 7
c = =
1
L= 2 R = l Ro
The outputs can be expressed linearly and di­ 2 2
rectly, without involving derivatives, in terms of
the state variables and the inputs: Ql = 1 •
Q2 = v
i(o) = 0 v ( o) = 1
Y1 (t) = Cuql(t) + + Cl nQ n (t)
+ Dux1 (t) + · · · DlmXm(t) e1 (t) = u (t) (uni t step) (49)
• • •

(4 1 ) Equations 23 and 24 yield:

•

yp(t) = Cpi Q t (t) + CpnQn(t) + -7 2

(50)
• • •

+ D p lXI (t) + + DpmXm(t)

• • •

or in a matrix notation as,

(y(t)] = [C ] [q (t)] + [ D] [x(t)] (42) (51)
where [C] is a p X n matrix and [D] a p X m
matrix containing constant elements. In example Therefore, by matrix algebra
1, there was one output eo {p = 1), one input e1
(m = 1) and two state variables i, v (n = 2). Note 45 - 18
from equation 10 that [A)2 = (52)
18 0
(C ] = [Ro O] [D] = 0 (43)
1 - 7t+ 18.5t2 - • 0 + 2t- 9t2+· . .

If, for example, the designer also desired to know

•

(53)
•

the current it and considered it as an output {thus 0 - 2t+9t2 - · . . 1 - 2t + Ot2 - · • •

eo and it are the outputs, p = 2), he could write Equation 53 is rewritten as,
et = Rit + v. With equation 10, this yields the
following output equations:
-
1 -3t 4 E--6t
- E
2 E-3t _ 2 E-tt
eo = Roi + Ov + Oe1 3
+
3 3 3
. . 1 v 1 E [A) t = (54)
11 = 01 - + e1 (44)
R R 2 2
- -E-3t + E--6t 4 t 1 t
E-3 _ E-t
3 3 3 3
and, therefore,
Ro 0 0 For calculations carried out by a digital computer,
the form of equation 53 rather than 54 is required.
[C] = (D] = (4 5 ) Substituting these results into the solution given
1 1 by equation 16 results in,
0 -
R t
R 2
3 E-l(t-r) - 3 E-t(t-t'}
2
d1"
The object of the general solution is to find q(t) 0

185
 t
4 3 4 -3 (t T) _ 1 - ( T) " 1 4 - 2
V = E- t V ( s) = 9 + I_ (61)
1 -
E-6t+2 E - E 6 t- d
3 3 3 3 s+ 3 s+6 s
_ _

and after the evaluation of the integrals,

which are indeed the Laplace transforms of equa­
i = � E-at - 2e-6t + 1
tion 55. The output is then expressed as,

7
Eo (s) = l (s)
v = 9
1
(55) 2
-
Finally, the output e0 is obtained from equation or
10,
7 1 - 2 1
E (s) = 9 + (62)
eo =
7 .
1 s+3 s+6 s
2
or Designer's decision
\ Because it is so new the state-variable technique
9
7
E-at - 2e-6t + 2 (56) has still not found its niche in engineering. Poten­
tial users are still comparing it to other methods
This solution is in the time domain. An analogous such as mesh, node, topology, Laplace, etc., that
solution may be obtained in the complex frequency have so far dominated the field. \Vhether or not
domain (Laplace transform). If a capital notation it is here to stay will depend on the applications
is adopted to denote Laplace transforms, then the designer finds for it, whether it can do things
equation 46 gives better and whether it provides a better insight
[Q( s) ] = [<ll ( s) ] [q( o) ] + [<ll ( s)] [B] [X ( s) ] (57) into the problems to be solved.
The state-variable approach has two main ad­
where [ ci>(s)] is the Laplace transform of [<P(t)] as vantages it blends nicely with analog computer
given in equation 48. It is equal to calculations and its successive steps are easily
[<l> (s)] = { s[I ] - [ A] } - 1 (58) programed for digital computers become really
where the - 1 denotes the inverse matrix, and is powerful when the network under investigation is
known as the characteristic frequency matrix of complex. For simple problems, like the ones dis­
the network. In terms of the numerical example, cussed here, it is much more convenient to apply
the conventional method. Nobody in his right mind
1 9
[ X ( s)] = of u(t) =
s
{5 ) would solve these problems with the state variable
method. The application of the state-variable tech­
nique is best suited for cases where computer
and
assistance, digital or analog, is available.
s 0 -7 2 -1 In the conventional method, the designer has to
{ s[I ] - [A] } -1 = - find the roots of an algebraic equation (the charac­
0 s -2 -2 teristic equation) of degree equal to the order of the
2 network. If this equation is higher than quadratic
-
-
a computer may be necessary. The argument then
may be that if a computer is put to this task, the
-
-

2 problem may as well be solved through the state­

or variable method. The argument is debatable. In
the last analysis it is the designer \vho, knowing
2
all methods and the computing assistance avail­
(s+3) (s+6) (s+3) (s+6) able to him, will decide the best method suited
[� (s)] = (60) for his needs. Even with conventional analysis,
2 s+7 it is sometimes advantageous to have the normal­
( s-+--::3-;:--
) ( s-
+--:-
6� ) (s+3) (s+6) form equations available, in terms of currents
-

-=- -=-

through inductors and voltages across capacitors.

Substituting these results in equation 58 results in This affords better insight of the problem than
2 with only the single differential equation of the
1 (s) =
--=-c--3=-=-)--,..(s-+,---.,6::-:-
s+ )
+
f
s (s + 3 (s + 6)
conventional method.

s+7 2 (s+7)
V(s) = Bibliography
(s+3) (s+6)
+
(s+3) (s+6)
L.A. Zadeh and C.A. Desoer, "Linear System Theory,"
or McGraw-Hill Book Co., 1 963.
R.J. Schwarz and B. Friedland, "Linear Systems," McGraw-Hill
2 1 2 1
=
Book Co., 1965.
l(s)
s+3 - s 6 + 8 F.F. Ku and J . F. Ka iser, "System Analysis by Digital Computer,"
9 + John Wiley and Sons, I nc., 1966.

186
Ci rcu it design

• •

1n 1n
•

-c conversion

Sel dom-used method of boosting d-e voltage, by a lternately storing and retrieving

energy from a magnetic fiel d , has important advantages over conventional tech n iq ues

By J . F. Howel l
General Electric Co., Milwau kee, Wis.

Conversion of direct current from one voltage level 0

_
+_ t
v.:.,_
__
o
to another usually requires at least two transistors
and a special transformer. But for low-power and 51
pulse-discharge types of applications, there is a L :;: c
simpler, more efficient and more reliable technique.
It takes advantage of the stored energy in a mag­ - -

netic field to change the voltage level. The prin­

- -

ciples of ringing choke conversion have been pre­ In a simplified ringing choke converter, with switch
81 closed, energy builds u p i n the i nd ucta nce.
viously reported in technical literature, but sur­ When switch is opened, energy i n the mag netic field
prisingly, application to date has been rather is transferred to capacitor C through the d iode.
limited. Repeated opening and closing of switch b u i lds u p
capacitor voltage to many ti mes the i n put voltage.
Basic principles

magnetic field will be transferred to capacitor C

If energy is stored in the magnetic field of an
inductance and if the field is allowed to collapse,
through diode D. Repeated opening and closing of
the voltage across the inductance will assume a
the switch gradually increases the voltage accu­
level necessary to dissipate the stored energy. This
mulating across the capacitor to many times the
well-known principle, used in auto ignition sys­
amplitude of the input voltage. Therefore, energy
tems and the basis of energy conversion in the
is converted from one potential level to another
ringing choke converter-regulator, is illustrated in
by storing it within and retrieving it from a mag­
the circuit shown at the right. When switch S1 is
netic field. Furthermore, regulation is achieved by
closed, current flows, and energy builds up in induc­
tance I..., according to the formula E == 1/2 Ll2• After
controlling the number and rate of switch opera­
tions.
the energy in the inductance has reached some
arbitrary level and sl is opened, energy in the
It is important to remember that when the switch
is closed, energy is transferred only to the mag­
netic field, not to the capacitor. Additionally, when
the stored energy of the switch is being transferred
to the capacitor, the voltage across the inductance
The author
is dependent on the potential already existing on
Joh n F. Howell has been a senior the capacitor; it is not dependent on the magnitude
engi neer with General Electric of the voltage V� , the initial source of stored energy
Company's X· ray department since
1950. A senior member of I EEE,
in the magnetic field.
he is cu rrently active i n solid
D-e to d-e conversion
state circuit desig n .
A simplified schematic diagram of a d-e to d-e
converter in which these principles are applied,
is on page 91. Transistor Q1, in a blocking oscil-

187
 D

•
-

l
-

•
- - -
- - - - -

- -

Converter-regulator c ircuit i ncludes variable Basic schematic of a d-e to d-e converter. Tran·
i m peda nce Q2 for controlling freq uency of osc i l la­ s ister Q1 serves as a fast-acti ng switch con nected
tion a nd a zener diode for automatic regulation. to blocking oscil lator circu it. R2 controls regu lation.

lator circuit, serves as a fast-acting switch. It the voltage V2 is dependent on the resistance of
transfers energy from the power source, Vt , to the load, Rr.. The voltage automatically results in
the magnetic field of the inductance, L. An ad­ constant power dissipation in the load.
vantage of the blocking oscillator circuit is that it
D-e to d-e converter-regulator
automatically opens the switch when the magnetic
core of the inductor saturates. In the converter diagram above, right, the fre­
Therefore, a wasteful How of current into the in­ quency of oscillation can be varied by adjusting
ductor after core saturation is prevented. The resistance R2• If this circuit is modified by an ar­
amount of energy stored in the magnetic field is rangement that senses the output voltage V2 and
identical for each blocking oscillator pulse , and controls the value of R2, then automatic voltage
the average energy transferred to the load Rr. is regulation results.
linearly related to the frequency of oscillation. Such a modification is shown in the circuit di­
Conversely, for a constant frequency of oscillation, rectly below. Transistor Q2 acts as a variable

1 N 4003
+ T1 COR£ - AZ2636 - ARNOLD ENG.
9-9 - 138-1,000 TURN RATIO
75 K

02
2N699 T,
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2N699 -
-
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+ 1K t N 3992
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04
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- -

1 N4104 t N 3285

------ -----
v2
18K 10K 330K +375V

-
-

Ringing choke d-e to d-e converter-reg u lator uses a blocki ng oscillator to chop the i n put signal. Extra
winding on i nductance p rovides a n isolated 2,400-volt d-e o utput. The Darlington pair, Ql Q2, provides
high i n put i m pedance. Qa is regulating tra nsistor, and Q, i s the blocking oscillator transistor.

188
 24-32 V
+ Vt AL-8 CORE-ARNOLD ENG.
100 K 2.2K 300 + V2
1 N3992 (2l
2,500 V
• tK
05 4.7 M
32T 2,500T O.tpF
2N3251
06 •
2N2905A
T,
t 30 -
-
-

tOO K 2.7K
-

ti2 W
25k
02
2N2222A t ,OOO p F
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03 04
Ot 2N2647 2N2222A
O.OtpF
2N2222A 220 07 t2K
tOK MHT4454

- - - - -
-
- - - - - -

ALL RESISTORS t/4 WATT UNLESS OTHERWISE MARKED -

-

Typical ringing choke converter-reg u lator with u n ijunction transistor i n the oscil lator circu it.
Regulation is achieved by sa mpling the output and feed i ng it back to a compa rison circ u it.

impedance controlling the frequency of oscilla­ plications. Shorting the output does not increase
tion. A zener diode, serves as a reference ele­ the primary current as would happen in a trans­
ment for automatic regulation of the frequency former type converter. Therefore, the components
of osci1lation; it maintains voltage V2 constant, are not damaged, and the only effect of the short
despite variations of input voltage V1 or load is an increase in the frequency of oscillation from
resistance RL. regulator action. This frequency of oscillation is
The frequency of oscillation, which controls the limited by the R2C2 time constant.
rate of energy transfer, is variable from zero to
Typical circuits
several thousand cycles per second. Transistor Q1
is always either off or saturated. Therefore, the Typical ringing choke converter-regulators like
heat dissipated in the transistor is a minimum. that shown above and on page 91 are designed to
The maximum voltage across Q1 equal to (V1 + convert an input ranging from 24 to 32 volts d-e
V2 ) occurs when the transistor is off. If the output to relatively high regulated potentials. The circuit
is taken off by an additional winding on the in­ on page 91 utilizes a blocking oscillator for pulse
ductance, then the maximum voltage across Q1 is generation, and provides two outputs, +365 volts
the input voltage V 1 plus the output voltage as and an isolated 2.400 volts. The isolated wind­
reflected to the primary by the inductance turns ing used to couple V3 has a common volts/tum re­
ratio. For a voltage step-up application, the max­ lationship with the other windings; therefore the
imum voltage across Q1 is therefore V1 + V2 load impedance across V3 is also regulated.
(N1/N 2). Another advantage: regulation is achieved The circuit above utilizes a unijunction tran­
by frequency control, rather than by using a series sistor for pulse generation. The oscillator circuit
voltage dropping element, so conversion efficiency consists of UJT Q3 and transistor Q4•
is high. Both converters operate with an energy storage
The ringing choke is relatively easy to construct pulse of fixed duration-50 to 100 microseconds:­
from a laminated, silicon-iron split core. The high and regulate by varying the pulse repetition rate.
effective frequency, resulting from the relatively Another version of the ringing choke power sup­
short transistor on-time (approximately 50 micro­ ply maintains the frequency of the input current
seconds), means only a few turns are required. An pulses constant, while the pulse duration is varied
air gap in the core of several mils must be pro­ to provide regulation of the output voltage. Both
vided to obtain low residual core magnetization methods work equally well.
between pulses. When input voltage V1 is applied With high-quality components, regulation of
to the circuit shown on page 91, the output voltage these supplies is approximately 0.02%, for com­
V2 responds linearly with time. Thus, its regulat­ bined input and temperature variations. With low­
ing action is faster than the more conventional cost commercial components, the regulation will be
converters, which respond exponentially. about 0.2%, adequate for many applications.
If the output is short-circuited, peak current The techniques described afford signi6cant ad­
through Q2 is not affected because the load is vantages in low average power applications and
disconnected during transistor conduction. This is particularly in pulse discharge systems where the
an important feature for pulse-discharge type ap- output supply is frequently shorted

189
 Des i g n theo ry

es1

G ra ph s , edges , ve rtices a nd trees a re some of the terms

of the n ew la ng uage of a topolog i ca l te ch n iq u e of network a na lysis
that el i m i nates ti me-con su m i ng mesh a nd n od e ca lcu lations

By S. P. C h a n
U n iversity of Santa Clara, Santa Clara, Ca lif.

I n theory, complex calculations for the analysis of

passive networks are fine, but what works in the
classroom often is impractical on the job-particu­
larly when more than three independent loops or
nodes are involved. As the circuit grows more com­ E Zs e

plex, calculations for the determinants and co­

factors in mesh or node analysis become tedious, v
time-consuming and more prone to human error.
Bridged-T network, N , with i m pedance L as a load
It makes sense to try something less cumbersome in represents a one-port configu ration d riven by a
the engineering department. Now the engineer can voltage sou rce, E. Replaci ng all im pedances
turn to topological or graphic techniques as a short­ with l i ne segments forms g raph of network N .
cut in analyzing networks.
With the graphic approach, the engineer does not
have to calculate the determinants and cofactors; ately apparent.
• Visual inspection conveniently provides values
instead he obtains them by inspection. He merely
replaces all impedance elements in a network by of transmittance and input and output impedance,
line segments and then obtains a complete analysis and quickly evaluates effects of disturbances and
of the network by following a simple sequence of variations of network parameters.
• The method adapts easily to computer-aided
steps.
Compared with conventional methods, the top­ analysis of simple or complex networks.
ological technique is faster, simpler and includes Defining topology terms
a simple check to tell the engineer if he is on the
right track. The results are the same but topological Before demonstrating an actual topological anal­
methods offer some bonuses : ysis, it is necessary to define the terms in the tech­
• The analysis results in a graphic display of the
nique, with the help of bridged-T network shown
admittances at various parts of the network. above. The network is loaded by impedance Zr;, and
• All existing feedback loops become immedi- has four nodes (V 1 , V2, V3, and V4) and five
branches (Zt , Z2, Z3, Z4 and Z5). The voltage E
The a uthor represents the source.
If each of the five branches is replaced by a line
Si nce receiving h is Ph . D from
segment while retaining the four nodes, a graph, G,
the U n iversity of I l l i nois i n
1 963, S. Park Chan has been of the network results as shown above. Such a
teach i n g at the U n iversity of representation is known as a graph of the network,
Santa Clara. Chan was the N, and each of the five line segments is called an
prin c i pa l investigator of a edge of the graph. Each edge corresponds to a
National Science Fou ndation
research p roject on the topological
branch in the network. For the graph shown, the
a ppl ications to switc h i ng edges are eh e2, e3, e4, and e5• Each of the nodes
networks. in the network, N, corresponds to a vertex in the

190
 • •
graph, C. Thus, Vh V2, V3 , and V4 are the vertices •
•
of the graph. The number of edges connected to a
•
given vertex is called the degree of the vertex. For +
•
example, vertex V3 has a degree of 3 since three Vz
edges connect to it. Likewise, vertex V1 has a •

degree of 2, V2 has a degree of 3 and V4 has a 1' ;.... _________ VN + ------e• • n

degree of 2. -

The graph can be divided into a number of sub­

-

Independent nodes, n in all, schematical ly represents

graphs, C1• If C1 does not contain all the edges of a general network N. Node 1 ' represents
the graph, C, it is called a proper subgraph of C. the reference or datum node.
In the diagram, edges e3 , e. and er; would be one
subgraph, in this case called a loop-set because it
forms a closed loop. Two other types of subgraphs
are the path-set and the tree. A path-set consists 1
of a group of edges that link one vertex to another
without repeating an edge; ea, e1 and e2 represents N ETWORK
one path-set because it connects vertex V4 to V2·
A tree is a connected subgraph that contains all
the vertices of C but does not form any closed
loops. One possible tree contains edges eh e2 and
Passive one-port network with zero-initial conditions
e4• Two other trees of C are e2, es and e4 and eh es and a current source driver helps derive the driving­
and e5. point impedance and admittance functions.
By subdividing the graph further it is possible to
form a 2-tree. A 2-tree of C consists of two uncon­
nected subgraphs that do not contain loops, but the one-port network he generally wants to know
when connected contain all the vertices of C. Such the input impedance, Zd(s) or input admittance
a 2-tree can be formed with edges e1 and e4 or e2 Yd(s). From the matrix of equation 1 expressions
and e5. Note that a 2-tree is obtained by removing for Zd(s) and Yd(s) result in
one of the edges from the tree. The tree-admittance
product for the tree eh e3 and e;, is Y1 YaYr. , and is (3)
obtained by multiplying the admittances of the
tree edges. The 2-tree admittance product of the and
2-tree e2 and ea is Y2Y5.
A
Network functions An
(4 )

Before the topological technique can be demon­ respectively.

strated a few basic network formulas must be Equations 3 and 4 show that both Zd( s) and
established. To explore the relationships, the engi­ Yd( s) can be expressed in terms of the determinant
neer should consider the representation of a net­ of Yn, �. and its (1,1) cofactor, � 11 • The engineer
work, N, with n independent nodes as shown at top. will recall that the cofactor �jk is obtained by
Node 1' is the reference or datum node. Voltages striking out the jth column and kth row of the
Vt, V2, . . . Vn (which are functions of the complex determinant, �. and solving for the remaining
frequency variable s) are the node voltages, V1, V2, determinant. Thus, � 1 1 is determined by striking
. . . Vn (which are functions of time, t) between the out column one and row one from � and solving
n nodes and the reference node 1' with the plus the remainder.
polarity at the n nodes. Nodal analysis yields the Next, consider a passive two-port network driven
n-independent current equations, written here in by two current generators lgt and lg2 at ports 1
matrix form: and 2 respectively [see top p. 114]. Here the engi­
neer is usually concerned with the Z open-circuit
or Y short-circuit parameters. These are defined
from a two-port analysis as follows:
( 1)
• • •
-
-
(5a)
Ynl Yn2 • • • Ynn Vn In
or, in abbreviated matrix notation, '
Vo A12 - A12
(5b)
=
-

I Yn I I vn I I In I
-

( 2) It IrO
A
where [Yn ] is the node admittance matrix, [Vn] the
vi A2r - A2'1
n-vector (defined as a column matrix of order n X 1) Z12 = (5c )
-
-

of the node voltage transforms, and Un l the n-vec­ 12 1 · =0 A

tor of the transforms of the known current sources.
The engineer usually is concerned with two -
-
(5d)
types of networks, the one-port and two-port. For

191
 f

+
+
v2 - V2• = V22' = Vo Vo

3 = 2"
-
-
)I

Passive two-port network, driven by two current generators

derives expressions for the Z and Y parameters.

Yn = (5e) (Sc)
-
-

Vt Vo=O
12
And, the short-circuit parameters for a passive
=
vi
Y21 -
-
(5f) two-port network without mutual inductances are:
Vo=O
It - Zt2 (8d)
Yt2 = (5g)
.1a
-
-

Vo V j=O I f
w f I
W12 ,1 2 - 12 ,1 2
12 Zu Y12 = Y2t = (Se)
Y22 = (5h) l:u
.1.
-

Vo Vj=O
-

where (Sf)
.1 . = Ztt Z22 - Z12 Z21
where,
The preceeding nodal equations can be related V(Y) == sum of all tree admittance products of
to the topological definitions by the following: all the trees of a network, N.
� == the sum of all the tree admittance products
\V1,1.(Y) == sum of the 2-tree admittance prod­
for a network, N, where a tree admittance product ucts of all the 2-trees with node 1 in one part and
is defined as the product of the admittances of node 1' in the other part. These 2-trees are the
all the branches of the tree. same as the set of all the trees of a modified net­
�jj == the sum of all the 2-tree admittance prod­
work obtained by shorting node 1 to node 1' of
ucts of a network, N, with each 2-tree term formed the original network.
from a two-part subgraph containing node j in one \V2,2.(Y) == sum of the 2-tree admittance prod­
subgraph and node 1' in the other. ucts of all the 2-trees with node 2 in one part
�lJ == the sum of all 2-tree admittance products
and node 2' in the other part. These 2-trees are
of a network N with each 2-tree term formed from the same as the set of all the trees of a modified
a two-part subgraph containing nodes i and j in network obtained by shorting node 2 to node 2'
one connected subgraph and the reference node of the original network.
1' in the other. W12,1• 2 .(Y) == sum of the 2-tree admittance prod­
For convenience, equations 3 and 4 can be re­ ucts of all the 2-trees of the network with each
written as: 2-tree having one part containing vertices 1 and 2,
Wt .t' (Y) and the other part containing vertices 1' and 2'.
(6)
V ( Y)
and,
V ( Y)
Yd (s) = (7)
Wt ,t' ( Y)
Similarly, equations Sa through 5g can be rewrit�en
3

to express the open-circuit parameters of a passiVe

two-port network without mutual inductances.
These are: 4
I' L �- - - - - - _J
Wt,t' (Y)
Zn = (Sa) Illustration of the topological technique shows pa�sive
V ( Y) one-port network with zero-initial conditions used m
example 1 . Graph of the one-port network is formed by
W12.t'21 ( Y) - W121,112 (Y)
Zt2 = Z21 = (Sb) replacing the i mpedance values with line segments a nd
V (Y) their appropriate admittance values.

192
 Table 1: Graph of network N in example 1

Wt2',l'2{Y) = sum of the 2-tree admittance prod­

ucts of all the 2-trees of the network, N, with each Y1 = j w Ct = s
2-tree having one part containing vertices 1 and 2',
3 Y2 = 2 s
and the other part containing vertices 1' and 2. 1
lU = sum of all 3-tree admittance products of Y3 = VR = 113
the network, N, for the following four combinations
of 3-trees: y4 = 1t j w l = t/4 s

• A subgraph with vertices 1 and 2' in one part,

Ys = ''s
vertex 2 in a second part and vertex 1' in a third. 1'
• A subgraph with vertices 1' and 2' in one part,
TREES OF NETWORK N TREE - ADMITTANCE PRODUCTS
vertex 1 in a second part and vertex 2 in a third.
• A subgraph with vertices 1 and 2 in one part,

vertex 2' in a second part and vertex 1' in a third. --� ----- 3
• A subgraph with vertices 1' and 2 in one part,

vertex 1 in a second part, and vertex 2' in a third.

A 3-tree of a graph G is a proper subgraph of G
consisting of three unconnected subgraphs without t'
loops that, when the subgraphs are connected, con­
tain all vertices of G. Y 2 v2
' 3
Analyzing networks by topology
With the basic relationships and definitions
established, the examples that follow will help ex­
plain how to analyze networks by topology:
Example 1. Obtain the driving-point impedance
Zd{ s) and its reciprocal Yd( s) for the passive one­
----- 2 3
port shown at bottom left of page 114. v,
In accordance with equations 3 and 4 or 6 and
7, the problem is to determine both A and A 11•
Step 1. To find A, draw the graph of the network
1'
by replacing each element with an appropriate line
segment that represents the admittance of that
3
1
branch as shown at bottom right of page 114.
Step 2. Form all tree admittance products for v,
the network by inspecting the trees of the graph.
These are shown in table 1.
Step 3. Form A by summing all the tree admit­ I

tance products. Thus, y

,
� = s/2 +2s2/5+ 1/12 +s/15+ 3
1/20+ 1/6+2s/15+ 1 /60s
= 2s2/5 +7s/10+ 3 /10+ 1/60s
Step 4. To find Au short vertex 1 to 1' and obtain 1'
a new graph of the networl(, called G1 1 ' as shown
in table 2 on page 116.
Step 5. Form all 2-tree admittance products of
' 3
N by obtaining the set of all tree admittance prod­ Yz
ucts of G11' as shown in table 2.
Step 6. Form Au by summing all the 2-tree
admittance products. Thus, 1'
�u = 2s2+s/ 3 +s/5 +2s/3 + 1/2+
2s/5+ 1/12s+ 1/20s 3
= 2s2+8s/5 + 1/2+2/15s t

Step 7. Form Yd(s) and Zd(s) as defined in equa­

tions 3 and 4. Hence,
,
�
y d (s)
(2s2/5 + 7s/ 1 0 + 3 / 1 0 + 1 /60s)
= =
�u (2s2+8s/5+ 1/2 +2/15s)
' 3
(24s3+42s2+ 18s+ 1)
�--�--�--��-
=
( 1 20s3+96s2+ 30s +8)
and �(s) = 1/Yd{s).
'
When the same example is done by the conven-

193
 Table 2: Gu· formed by shorting vertices 1 and 1'

tional mesh or node technique, a set of equations

J .,c,
must be formed for each loop or node. Then a
Y1 = =s
matrix is formed for the network and much mathe­
2 Y2 Y2 = 2 s matical calculation is required to obtain the result
3
Y3 = 113 for Zd(s) and Yd(s). As a comparison to the topo­
logical approach consider the same network anal­
v - -
'4 - ."L - ,.. .
I II
J yzed by node equations. Thus,
Ys = 1/s Step 1. Form the node equation for the network.
3s + 1 1
Va
2 - TREES OF NETWORK 2- TREE ADMITTANCE P RODUCTS 3 3

2
-----
Y2 0= 2s Va
3
v,
V3
30s+8
0=
15
1 ,1 '
Step 2. Form the matrix equation for the results
of step 1. Hence,
2
3s+ 1 -
1
-s
3 3

-s - 2s

1 30s+8
3 -- - 2s Va 0
3 15
Yt Yt Y5 = ( s ) ( 1/5) = 1/s
1 2 3
And, 3s+ 1 1
-s - 1'
a 3
3
12s2 + 1
2 Y2 d = -s - 2s 2'
4s
Y2 Y3 = ( 2 s ) ( 1f3 ) = 2 1/s
1
-
30s+8
- - 2s 3'
3 15
Step 3. Expanding and simplifying,
2 3
li ( 24s3 + 42s2 + 18s + 1 )
=
60s
Step 4. Evaluate the (1,1')cofactor of �n by
1 , 1'
expanding the � determinant with column 1 and
row 1' deleted. Thus,
2 12s2 + 1
- 2s
4s
du =
30s + 8
f, 1' - 2s
15

-
-
1 20s3 + 96s2 + 30s + 8
2 60s
Step 5. Form Zd(s) and Yd(s) from equations 3
and 4. Hence,
1 20s3 + 96s2 + 30s + 8
24s3 + 42s2 + 18s + 1
2
and
24s3 + 42s2 + 18s + 1
120s3 + 96s2 + 30s + 8
1 1''
which agrees with the result obtained previously.

194
 Table 3: G of the two-port network in example 2

For a network of more than three loops or nodes

expansion by minors would have been required �� -- -
1 - I
for the matrix. This would require an enormous v, 3 y3 4 Ys 2 R,
G-

1
amount of tedious calculation. Y2 = s C2
Example 2. Obtain the Z-impedance parameters � - 1 -G
3- ii i- 3
for the two-port ladder network shown below with y2 Ys
v.4 -
--1 -- 4
G
topological techniques. The Z-impedance para­ R4

meters are defined by equations 5a through 5d or y4 Y5= sc5

equations 8a through 8c. 1
Ys= fi6 = Gs
Step 1. Draw graph G for the two-port network
as shown below.
Step 2. Form all tree combinations for the graph TREES OF G TREE-ADMITTANC E PRODUCTS
as in table 3.
Step 3. Form V(Y) by summing all tree ad­ Yt 3 y3 Y& 2
1
4
mittance products of the graph G. Thus,
V(Y) = Y1Y2YaY4Ys + Y1Y2YaYr;Ys + y2 Y1 Y2 Y3 Y4 Y6 = s G1 G3G4 G6C2
Y1Y2Y4Yr;Ys + Y,YaY4YaYs
= s GtGaG4Gs (C2 + Cr;) +
2'
2
s GtGsC2C5 (Ga + G .. ) 1 y4

Step 4. Short vertex 1 to 1' to obtain the graph

Gu shown in table 4 on page 118.
Yt 3 y3 Ys 2
1
4
·

Step 5. Form \Vt,r (Y) by summing all the tree

admittance products for the trees of graph G11 •• y2 Ys 'J y2 Y3 Y5 y6 = 5261 G3 G6 C2 C 5
Thus,
=
1
W1,1' (Y) YtYaY4Ys + YtYaYr;Ys + YtY4Yr;Ys
+ Y2YaY4Ys + Y2Y4Y5Ys + YaY4YoYs
+ Y2YaYr,Ys
= GtGaG4Gs + s [Cr,Gs (G,Ga + G,G4 YJ 3 4 Y& 2
1
+ GaG.. ) + G:.G4GsC2]
+ s2 C2Cr;Gs (Ga + G4 ) 2
y2 lv5 y5 Ys s G1 G4 G6 C2 C5
'J Y2Y4 =
Step 6. Short vertex 2 to 2' of graph G to form
graph G22·, as shown in table 5 on page 118.
Step 7. Form W2,2· (Y) by summing all tree ad­ 1 y4 2
mittance products for the trees of graph G22•• Thus.
yl 3 y3 y6 2
= 1
4
W2.2'(Y) Y1Y2YaY4 + Y1Y2YaYr; + Y1 Y2YaYs
+ Y1Y2Y4Yr; + YtY2Y4Ys
s Gl G3G4 Gs Cs
+ YtYaY4Ya + YtYaY4Ys 5 y Y =
= 'J y3 4 y5 s
s [GtGa (G4C2 + GsC2 + G4Gr;)
+ (G,G4GsC2)]
+ s2 G,C2C5 (Ga + G4) t Y4 2
+ G,GaG4Gs
Step 8. To obtain W12, t ·2·(Y) form the set of all
2-trees of G that includes vertices 1 and 2 in one
subgraph, and 1' and 2' in another as shown at
top page 118. The only such set for the graph G For this example such a set does not exist. Thus,
contains edges e1 , e3 and e6 in one subgraph and Wt 2,t '2 ' == 0.
e"' in the other. Thus, Wt2,t'2'==YtYaY4Ys Step 10. Form the Z-impedance parameters as
Step 9. To obtain Wt2,t ·2(Y) form the set of all defined by equations Sa through 8c and substitute
2-trees of graph G that contain vertices 1 and 2' in their admittance value. Hence,
one subgraph and 1' and 2 in another subgraph. Zu = GtGaG4Gs + s [Cr;Gs (GtGa + GtG4 + GaG4)
+ GaG..GsC2] + 82 C2Cr;G& (Ga + G4 )

2 Zt2 = Z21 =

8 GtGaG4G& (C2+ Cr;) +82 GtG&C2Cr; (Ga+ G.)

Y. __._
�--- 2'
,.___.__,
I' 2' 8 [Gt Ga (G4C2+ G&C2+ G4Cr;) + (GtG4G&C2)]

+ 82 G1C2Cr; (Ga+G4) + GtGaG4G,

Passive two-port network and its graph aid examination Zti = ���� �� ����� 2 ����� �

of the ladder network. Graph is formed by replacing s GtGaG4G& (C2+Cr;) +8 GtG&C2Cu (Ga+ G4)
all impedance values with line segments and appropriate
admittance values. Example 3. For the two-port ladder network of

195
Table 4: New graph G1 1 • formed by shorting 1 to 1' Table 5: G22 · formed by shorting vertices 2 to 2'

VI = G1

3 y3 4 y6 2 Yt = Gt 1 v, 3 y3 4
Yz = sC2
Y2 = sC2
Y3 = G3
=
v,
Y3 G3
y2 y5 Yz Ys
Y4 = G4 Y4 = G4

v5
Ys = s Cs y4
sc5
'
=

y4 2
' 2,2'
t, 1' Y6 = Gs 1
Y6 = G 6

TREES OF G11 ' TREE- ADM I TTANCE PRODU C T S TREES OF G22' T R E E-ADM I T TA N C E PRODUCTS

2' 1 2,21
1,1'

3 4

1,1' 2' 1 2,2'

3 4 v8 2 4

1 ,1 ' 2' t' 2 , 21

I Yt 3 4

f ,l
I
2' 1 2,2'

1 y1 3 4

y2

1 '1' 2'

3 4 Ys 2

f '1 1
1'
2'

1
2 ,2
1,1
' 2'

196
example 2 calculate the Y short-circuit parameters. 3 4 Ys
Since the Y parameters are defined by equations t ----- �--- ---- 2
Bd through Sf, the only term remaining uncalcu­
lated is l U.
Step 1. To calculate l U the engineer must form
y4
( , 2'
the 3-tree admittance products of the network
·
· -..;...
...; _
.. _
by forming the following subgraph combinations :
-

• All three-part subgraphs with vertices 1 and 2'

The only 2-tree of the two-port network with one part
in one part, vertex 2 in a second part and vertex containing nodes 1 and 2, and the other nodes 1 ' and 2'.
1' in a third part. For this example there is only
one such subgraph. �U = Y1YaY4 + Y1YaYr; + Y1YaY& + Y1Y4Yr;
• All three-part subgraphs with vertices 1 and 2 + Y1Y4Y6 + Y2YaY4 + Y2YaYr;
in one part, vertex 2' in a second part and vertex 1' + Y2YaY& + Y2Y4Yr; + Y2Y4Ys
in the third part. For this example there is only + YaY4Y6 + YaY4Y&
one such subgraph. Step 3. Form the Y parameters using equations
• All three-part subgraphs with vertex 1 in one Bd through Sf which can easily be performed.
part, vertex 2' in a second part and vertices 1' and Example 4. For the network shown at top page
2 in a third part. For this example there is only one 120 find V(Y), Wu · (Y), Wt2,t '2' (Y), Wt2 ', t ' 2 (Y),
such subgraph. W2.2· (Y), and lU, with topological techniques.
• All three-part subgraphs with vertex 1 in one Step 1. Draw the graph of the network, by re­
part, vertex 2 in a second part and vertices 2' and placing each element with a line segment that rep­
1' in a third part. For this example there are nine resents the admittance of the element as shown
such subgraphs. at top page 120.
All four groups are illustrated in table 6. Step 2. To calculate V(Y), obtain the set of all
Step 2. Form lU by summing all 3-tree ad­ tree admittance products for the network by in­
mittance products. Thus, specting the trees of the graph. For this network

Table &: The 3-trees of the two-port ladder network of example 2

1 v, 3 y3 4 2 1 Yt 3 y3 4 YG 2 t 3 y 4 y 2
• • • • • •

l'ts Yz

• • • •
2' 1' ,
t• 2' ,. 2
(A) Y1 Y3Y5 = sG1 G3C s (8) Yt Y 3Y6 = G1 G3G 6 (C) Yz Ys Y4 = sG s G 4 C 2

1 v, 3 Y3 4 2 1 v, 3 4 z 1 Yt 3 4 Ys z
• • • • • • • • • • •

Ys

Y4 Y4 Y4
• • • •
.
1' 2' 1' 2' 1' 2
Yt Y3Y4= G t GsG4 Y1 Y4 Ys• sG1 G4 C s Yt Y4 Y6 = G t G4G 6

1 3 Y3 4 2 1 3 Y3 4 2 I 3 4 2
• • • • • •

Yz Yz Ys Yz Ys

Y4 Y4

1' 2' ,. 2' t' 2'

Yz Y3 Y4 = s G 3 G4C 2 Y2 v3 Y5 • s 2 G3 c2 c s Yz Y4Y5 = s 2 G4 C2 Cs

1 3 4 Ys 2 t 3 Y3 4 Ys 2 t 3 Y3 4 2
• • • • • • • • •

Yz Ys

Y4 Y4 y4
.,
1 2' 1 l- f 2'
(0) Y2Y4Y6 = sG4 Gs Cz Y3 Y4 Y6 = G 3 G4G6 Ys Y4 Ys = s Gs G4C s

197
 3 2 ' 3 Yz 2 Step 7. To obtain Wt2, t '2·(Y) form the set of all
2-trees of G that includes vertices 1 and 2 in one
subgraph, and 1' and 2' in another subgraph. Thus,
W1 2. 1 ·2 · (Y) ==
Yt Y2 Y4 Yr;
Step 8. To obtain Wt2·, 1 •2(Y) form the set of all
2-trees of G that includes vertices 1 and 2' in one
4 2.' t' 4 Ys 2.'
subgraph, and 1' and 2 in another subgraph. For
this example there is no such subgraph. Thus,
A passive two-port network and i ts g ra p h W12 . ·t · 2 (Y) == 0
u sed for exa m ple 4.
Step 9. To find lU, examine the 3-trees of G
for the combinations:
only one tree exists. It is formed with edges e1 , e2, • All three-part subgraphs with vertices 1 and 2'

ea, e4 and e5. Thus, the tree admittance product is in one part, vertex 2 in a second part and vertex 1'
the product of all admittances for these edges, in a third part. There is one such set for this ex­
V(Y) ==
YtY2Y:�Y4Ya ample.
Step 3. To find Wt, dY) short circuit vertex 1 to • All three-part subgraphs with vertices 1' and 2'

1' and obtain a new graph of the network, called in one part, vertex 1 in a second part and vertex 2
G1 1 as shown in table 7.
·
in the third part. There are two such sets for this
Step 4 . To evaluate Wt , 1 ·(Y) sum all of the tree example.
admittance products found in table 7. Thus, • All three-part subgraphs with vertex 1 and 2

\tVt,t·(Y) == Y1Y2YaY;, + Y1 Y2Y4Y5 + Y2YaY4Yr. in one part, vertex 2' in a second part and vertex 1'
Step 5. To find W2.2·(Y), short circuit vertex 2 in a third part. There are two such sets for this
to 2' and obtain a new graph G22· as shown in example.
table 8. • All three -part subgraphs with vertex 1' and 2

Step 6. To evaluate W2,2·(Y) sum all of the tree in one part, vertex 1 in a second part and vertex 2'
admittance products found in table 8. Thus, in a third part. There is one such set for this
W2.2· (Y) == Y1 Y2YaY4 + Y1Y2Y4Y5 + YtYaY4Yr. example.

Table 7: G raph G11• for the network of example 4 Table 8: Graph G22· for the network of example 4

3 2 1 3

Ys Y4 Ys
4 2,2'

TREES OF G1: TREE-ADMITTANCE PRODUCTS TREES OF Gz2 TREE-ADMITTANCE PRODUCTS

3 I Yt 3

Ys

t Yt 3

Ys
' 2.2.'

3 Vz 2 I V1 3

4 2,2.'

198
Table 9: All 3-tree combinations for the network of example 4

t v, 3 2 t 3 Y2 2
• •

y3 Y3

•
Ys Y4
•
t ' 4 2' t 4 2'
"A) (B) '

t. v, 3
•
2 t 3 y2 2
• •

Y4 Ys Y4 Ys
4 2' t' 4 2'
d,C l t '

Yt 3 Yz 2 t Yt 3 y2 2
� • •

• Ys Y4
(0) f I 4 2' f' 4 �·

These are shown in table 9. Thus, lU is formed and three vertices. There are 10 possible com-
by summing all 3-tree admittance products of G. binations of edges since
lU = Y1YaYa +YtY4Yr. + Y2Y4Yr. +
5!
Y1Y2Yr. + Y1Y2Y4 + Y2YaY4 (5 3 ) =
With the data thus obtained, both the Z and Y c , 3 ! (5 - 3 ) !
parameters can be formed. Listing the edge combinations systematically
Making sure you're right yields : 123, 124, 125, 134, 135, 145, 234, 235, 245
and 345. But, by inspection of the graph, the com­
Since each tree, or 2-tree, is obtained by inspec­ binations 123 and 245 form loops and therefore
tion, it is quite possible that a tree may be omitte� are not trees. Subtracting these two from the 10
simply because of an oversight. How can the engi­ possible combinations leaves eight trees of G.
neer be sure that all the trees, or 2-trees, have been The ability to check the topological analysis
included? The answer: by a systematic method of can be programed into a computer. Computers are
listing the trees and 2-trees when topological used in topological network analysis, but the future
formulas are applied. One such method follows: success of the technique depends on cutting the
Since the number of edges, e, in a tree of a time below that required by conventional tech­
connected graph with v vertices is v-1, the upper niques. This, in turn depends on having a simple
boundary of the total number of trees Tt, can be tree-finding algorithm. And many investigators
determined with C(e, v-1), where C(e, v- 1) is have, in recent years, conducted much success­
the combination of e objects taken v- 1 at a time. ful research in developing network algorithms for
Thus, Tt = C( e, v - 1) But, from algebra, the computer. Their contributions have been in
e !
C (e , v
finding topological formulas for active networks.
1 ) = (v
1 ) ! (e - v + 1 ) !
-

where, for any positive integer k, Bibliography

k ! = k (k -1) (k 2) . . . 2 . 1
- Percival, R.H., "Solution of Passive E lectrical Networks by
Means of Mathematical Trees," Journal of the I n stitute
Thus, if all the C(e, v- 1) terms are listed by of Electrical Engineers, London Vol. 1 00, Part I l l ,
forming all the possible combinations of e edges May 1 953, pp. 143-1 50.
Mayeda, W. and S. Sesh u , "Topological Form ulas for
taken v- 1 at a time and all loops of the graph Network Functions," U n iversity of I ll inois B u l letin, Vol. 55,
are subtracted from these C(e , v-1) terms, No. 23, Nov . 1957.
Seshu, s. and M . B . Reed, "Linear Graphs and Electrical
Tt=C(e, v-1) minus all loop combinations Networks" Addison & Wesley, 196 1 .
Chan, S. P. "I ntroductory Topological Analysis of
For example, consider the one-port network and Electrical Networks," to be pu blished by Holt, R i neha rt &
its graph on page 114. This graph has five edges Wi nston i n 1967.

199
 Ci rcu it design

s ca une
• • •

1n a IVe I

A voltage-tunable audio fi lter uses field effect transistors as the

tuning element instead of inductors; sma l l size and low cost make them
val uable i n space communi cations where narrow bandwidth is req u i red

By Ja mes M . Loe
Philco Corp., a subsidiary of the Ford Motor Co.

The National Aeronautics and Space Administra­ and bandpass filters can be used up to several
tion was searching for a way to reduce transmission hundred kilohertz. The filter frequency is linearly
power for voice communications from deep space, related to control voltages over a 20: 1 frequency
possibly as far out as the planet Mars. But that range; a portion of this range is shown in the curves
meant filters in the transmission equipment had to on page 101.
be small, response time fast and bandwidth narrow. The new filters respond quickly to changes in
Conventional current-controlled variable induc­ control voltages. The rate at which the resonant
tors used in filters for tuning were too costly and or corner frequency (frequency at which response
bulky for space communications. is three decibels down from the passband response)
A solution came from engineers at the Philco changes is a function of the rate at which the FET
Corp., a subsidiary of the Ford Motor Co. They source-drain resistance varies. This value exceeds
developed a voltage-tunable audio filter that uses 400 Mhz/ sec. This tuning rate, though not needed
field effect transistors (FET's) as the tuning ele­ in NASA's application, may be useful in doppler
ment in place of inductors. The result saved money radar systems, sonar systems and high-speed con­
and space. The conventional filter weighed two trol systems.
pounds and occupied 10 cubic inches. The new
Voltage tuning
filter measures only 1.5 cubic inches and weighs
1lh ounces. A field effect transistor can serve as a voltage­
Four of the filters were included in a speech variable resistor by keeping the voltage impressed
bandwidth compression system Philco delivered to between the source and the drain small. ( 1 ) For the
NASA under the terms of a $60,000 contract. The FET's used in this design the voltage between the
system permits transmission from space of a narrow source and the drain is typically 0.1 volt peak to
band of encoded information that can be converted peak at a 10: 1 tuning range.
into synthetic intelligible speech on earth. Under this condition, the variable sourre-drain
Designed for the audio frequency range, the resistance of the field effect transistor is closelv�

family of high-Q (up to 100) low-pass, high-pass approximated by

The author Ro
1 - Kt v..
R SD = ( 1)
James M. Loe is a project engineer at
the Communications and Electronics
division. He is presently assigned where Ro = the resistance at zero gate bias,
to the Advanced Communications Kt = a constant, dependent upon FET type,
laboratory where he is engaged and
i n the development of low bandwidth V18 = gate-to-source voltage.
voice encoding equ ipment.
The inverse relationship between the gate-to­
source voltage and the source-drain resistance is
compatible with active filter designs, which are

200
 electrically equivalent to the conventional inductor
capacitor (L-C) type of passive filters. Passive L-C Ot o2
, _� __ 2 __
,R l ,R l
filters can be designed to have a wide range of SIGN A L __ ---+-�
bandpass characteristics. Passive R-C filters are I NPUT

-
limited with respect to attainable bandpass shapes.
The active R-C filters designed with FET's over- CONTROL --
-

come this limitation. INPUT

Low-pass filter

The basic active low-pass filter can have a

peaked or unpeaked response, as indicated in the
diagram below. The response depends upon the Matched field effect transistors, substituted
damping factor chosen. In the figure above right for R1 and R"' in the basic low-pass filter, g ive
an active voltage-tuned filter.
field effect transistors were substituted for R 1 and
R2. In the filter design, attenuation at the required
comer frequency is initially specified. The re­ 1
quired damping factor is selected from the universal = damping factor (3)
two-pole filter characteristics of filter amplitude
response versus frequency to obtain the specified where Kt = voltage gain of Qa.
corner attenuation rate. By substituting equation 1 for equation 2, the
For the low-pass filter circuit, the design condi­ comer frequency becomes a linear function of the
tions to be met are: FET gate control voltage,
�N > 1 0XcJ
1 - K1 v..
RoUT < 0 . 1 Xm
n -
'-' (4)
_

R = R� + � Ro MCt
where R1" = input impedance of emitter follower
Qa, a function of emitter resistor RE High-pass filter
and
RoUT = output impedance of Qa. Similar principles may be applied to produce a
R1, � = source-drain resistance of Q1 and Q,. voltage-tunable high-pass filter. The circuit is
The design equations for the low-pass filter are shown below. After selecting the damping factor
at a required comer frequency to meet attenua­
1
'-'n = RMCt = resonant or corner frequency (2) tion and overshoot requirements, filter component
values are determined. In this case, the emitter·­
c
follower parameters are chosen so that
when M2 =
C
� R1N > 1 0� ; RouT < 0. 1R1.

+ Vee

-
p = O.t5
.a

- o t-----­
'a

z
-
-

r--�� OUTPUT
p = 0.7 I
-

-t2 db / OCTAVE
I

fain
F REQUENCY

Basic lo::·pass filter can have a peaked or unpeaked response depending u pon the damping factor.

+Vee

Ct C2 Ct C2
--tl t---..--u---.----1� SIGNAL __.
,__ _1 1_ _ ---
L
SIGNA.,_
I N PUT �
__
INPUT
_

-
-- -- O UTPUT
-

CONTROL -

INPUT
-

- VEE
FET's acting as resistors in the high-pass active filter operate at
the sa me controlling voltage and provide a damping factor of unity.

201
 SIGNAL INPUT + Ve e +V +V
ee ee

a,
Q2 Q3
G!!t.4 G� t.4
OUTPUT

c. Rf R2 c3
R3
- VEE -
- -VEE - VE E
-
- -
-

SIGNAL INPUT

-----. �---- OUTPUT

-V -VE -V
EE E EE R3

04 Os
- -
- -

C Rt ) R2l
CONTROL INPUT -
-

Active, voltage-tuned bandpass filter, derived from the basic bandpass filter, consists of two
cascaded amplifier stages, Q1 and Qll and emitter follower, Qa. Equalizing R1 C1 and Rs Cs
minimizes the required gain for a given damping factor.

�
_ .
,_ -
The design equations are '

- . :'�-

"'n2 1
= corner frequency (5)
Rt�C1C2
-

where cl = c2 -<=·
___!.·_
•

1+ M 2 +
p= ( 1 - K2) = damping factor (6)
2 X M 2 M

g: ,
'

where M2 =

and X2 = _R2 ' --' . ,.

R1 '
i
!.
!-
: __ _::
.

.
.
_,.<

�
' -�

. _'-,
'
·-·
- -

and K2 = gain of Qa. �

>

\,._�:(
The corner frequency is linearly related to the -'-
;.'-
--

control voltage. As a practical consideration, both

'

FET' s operate at the same control voltage, making

.
the source-drain resistances R1 = R2• Under these .
:
:-=: -
. . �$
'

- ,-

> � - _._, -

conditions the damping factor is always unity. In --': >

. �--==' :

-'- "'
'
:

' -'.-t.·· .
- •
'

certain designs this is not necessarily desirable. -�<> ' --

: --
, - _ /:': ·:., _·
-

.
- *>:-
:
.... -;,_t' v
.t
�- .:;- - .:
•-. .

The restraint can be loosened, though, by making .,x, ::;;;� '

�

cl ::F c2, but the filter design then becomes more

'

__

.
·.

-- :
-
,_ '

complex.
,,
'

Bandpass Experimental breadboard of voltage-tunable audio

bandpass filter can be easily compressed into 1.5
An active, voltage-tuned bandpass filter is basic­ cubic inches for space package. Philco delivered
ally quite different from the low and high-pass four such audio filters to NASA.

202
 SIGNAL
INPUT

Ot OPERATIONAL
2 N 3 390 AMPLIFIER
SUCH AS
+ FAIRCHILD }J709
c2
� Ct
0.056
0.056 02 -- .....---- - OUTPUT
I
-
-
2 N 3565

IOK
-
3. 3 K

+ VE E
SU 700 ( PAIR ) tOK
8. 2 K

-
25K -
CONTROL -
I N PU T -

-
-

An integrated operational amplifier is used i n the bandpass tunable filter to insure stability at h ig h va lues of filter Q .

configuration. A simplified fixed-tuned version 3 �-------�

---- CORNER FREQUENCY VS. CONTROL VOLTAGE
shown above, consists of two cascaded amplifier FOR LOW PASS CRITICALLY DAMPED FILTER
stages with an over-all gain of approximately two. 2.5 - RESONANT FREQUENCY VS. CONTROL VOLTAGE
The third stage, emitter follower Q3, provides a FOR BANDPASS FILTER WITH Q=26
low output. impedance. The frequency selective UJ 2
(.l)
networks are a low-pass filter made up of Rt and Cl:
.....
....
0
C1 and a high-pass filter formed by R2 and C2. The > 1. 5
products R1C1 and R2C2 are equal since this re­ ....
0
0::
....
sults in the minimum gain required for a given 1
z
figure of merit, Q. Capacitor Ca and resistor R3 pro­ 0
u
vide a-c coupling and a d-e return path to the base
0.5
of Qt .
When field effect transistors replace resistors
that determine frequency, component values may 500 t,OOO 1,500 2,000 2,500 3,000 3,500 4,000
be determined by these equations: CORNER FREQUENCY ( Hz )
Linear relationship exists between corner frequency
1
wn = = resonant frequency (7) and control voltage i n the low· pass critically
RC dam ped filter a n d between the resonant freq uency and
control voltage i n the bandpass fi lter.
1
Q = = fi gure of merit (8)
1 _ 0 .25012022
c. and G2 are the voltage gains of Q. and Q:.! diagram above is a useful substitute for the output
respectively. transistor and provides a high range of Q from 10
RrN (Qt) > RrN (Q2) < 10 Xc2
10 Xct, (9) to 100.
The field effect transistors in the active voltage·
Rt is chosen to equal R2 and C 1 == C2. In the design tuned filters are matched for operation over the
of bandpass filters, figure of merit, Q, a function of 20: 1 frequency range. The resistances at zero gate
the damping factor, is the basic parameter. It can voltage, R0, are matched within 5%, the resistances
be shown that here too, wn varies linearly in re­ at 4R0 are matched within 10% , and at 20Ro
sponse to the control voltages. matched within 20% .
Practical considerations The field effect transistors limit maximum peak­
to-peak output signal swing to about 0.1 volt. At
When a high Q bandpass filter is required it be­ greater signal amplitudes the output signal becomes
comes difficult to satisfy the requirement of high distorted.
amplifier input impedance and low output imped­
ance. In addition, when the Q is high, slight am­
plifier gain variations strongly affect the figure of Reference
merit. To overcome these problems, an integrated
1 . JamP.s S. Sherwin, "FET's as Voltage Controlled Resistors,"
operational amplifier, connected as shown in the Solid State Design, August 1965.

203
 Sol id state

rov1 n a nee
•

I 's wi

Feedback can be used i n i nteg rated c i rcu its to i ncrease ga i n and

ra ise freq uency in a large va riety of a ppl ications, and the c i rcu its
can be bu i lt from the same m u lt i pu rpose IC, thus lowering cost

By Vas i l Uzu nog l u

Ari n c Resea rch Corp., A n n apol is, Md.

Engineers working with integrated circuits are ap­ output and the emitter resistor is in series with
plying an old technique with new methods to in­ the input.
crease gain and raise frequency in a variety of A circuit with series-to-shunt feedback has two
circuits. The old technique: feedback. The new important advantages over one with shunt-to-series
method: using feedback between transistor pairs feedback. First, the series-to-shunt feedback circuit
on the same chip. The result: better circuits from does not need a separate biasing resistor because
amplifiers, to frequency modulators, to OR-gates­ the resistance, RF, supplies biasing current to the
with very little additional cost in building the IC. input. Second, the feedback lowers the input re­
In amplifiers, for example, feedback can increase sistance of the circuit and, therefore, decreases its
the gain at a particular frequency or raise the time constant. On the other hand, shunt-to-series
maximum frequency at which useful gain can be feedback increases the input resistance, thereby
obtained or do both. raising the time constant and reducing the high­
There are two main types of feedback at the frequency capability of the circuit. Further fre­
engineer's disposal series-to-shunt and shunt-to­ quency degradation is contributed by the separate
series and each has its advantages and disadvan­ biasing element, a distributed resistance-capaci­
tages, too. In series-to-shunt feedback, as illustrated tance element placed at the input.
at the top of page 71, an emitter resistor, RE, is Despite this, there are some cases where shunt­
in series with the output transistor, and the feed­ to-series feedback may be preferable. For example,
back path, shown in solid color, is in shunt with in low-frequency applications, high input imped­
the input. Additional feedback also may be ob­ ances are often desirable and the lower power
tained in this circuit by the use of the secondary dissipation of a circuit having shunt-to-series feed­
feedback paths indicated by the broken colored back may be desirable. In some cases, both types
Jines . of feedback may be used to achieve a compromise
In shunt-to-series feedback on page 71, the of properties.
feedback path, drawn in color, is in shunt with the
Multipurpose chip
A multipurpose, analog integrated circuit chip
The author will be used to illustrate the benefits obtained by
Vasil Uzunoglu is a senior scientist
the use of feedback in five different applications
at Arinc. His book, "Semiconductor and in each case series-to-shunt feedback will be
Network Analysis and Design," was used. Using the same integrated circuit in each
published in 1 964 by the case simplifies the discussion and since many dif­
McGraw-Hill Book Co. ferent circuits can be derived from the same basic
feedback circuit, it also illustrates the economies
possible with the feedback technique.
The five applications to be described are: a video
amplifier, an additive amplifier (also called a sum-

204
 +Y e
ming amplifier or a distributed amplifier}, a fre­ s
quency modulator, a voltage-controlled oscillator
and an exclusive OR-gate.
OUTPUT
The chip selected one of several multipurp ose
circui t1 VOLTAGE
chips now available is the Lava integrated eo
built by the Westinghouse Electric Corp. The Lava IN PUT I Oz
chip, an acronym for linear amplifier for various SIGNAL 'V t.ANv----
e 1 .. -
Rn
applications, contains three pairs of transistors, four
-

diodes and 16 separate resistors. Several of the - -

- -

resistors have taps, increasing the number of re­

sistors externally available to 46. Large metal bond­ Series-to-shunt feedback in circuit. The primary
ing islands on top of the chip make it possible for feedback path is through Rr1. Additional feedback
the designer to select any of the components or using secondary paths through R..----r-- 2
may be obtained byr---.-
and R... The feedback paths are shown in color.
tap off the desired amount of resistance by placing .

wire leads and jumpers on the bonding islands. The + Ye

Lava chip also has low parasitic capacitances re­ s
R
sulting from the use of the double-diffusion process 2
in building the chip. IC's built by triple-diffusion OUTPUT
or dou hie-diffu sion epitaxy use reverse biasing of VOLTAGE
eo
junctions to obtain isolation between components,
�
IN PU T
and this results in higher parasitics. In a double­ S IGNAL
diffused IC, isolation is provided by a intrinsic e la
(high resistivity) region between the collectors.
- - -
- - -

Video amplifier -

The performance of a video amplifier built with Shunt-to-series feedback in circuit. Unlike the series­
a transistor pair can be improved by externally to-shunt circuit, this circuit requi res a separate biasing
arrangement. The feedback path is shown in color.
adding a few feedback elements to the circuit. In
the video amplifier circuit at the right the com­
.-------.....- Yes
ponents on the chin are shown in black and the RL
1 R 2
L
external feedback elements are shown in color. Of 3.2K 900
course, when a number of chips are required, the
feedback elements probably will be diffused into Ro
02
the chip. 50 TO 100
The addition of resistor RK and capacitor CK to 0
1
RF

the circuit increases the feedback at low fre- 4. 2 K

-

quenc1es.
•

RE CE 1
At higher frequencies, the feedback increases, but 320 9 pF
RK
the rate of increase slows until a frequency is CK
7K
15pF
reached where the reactance of CK becomes negli­ -
-
-
-
-
-

gible compared with RK and the feedback levels Video amplifier. This circuit was built with components
off to a constant. A pole-zero is introduced in the on the multipurpose chip, in black and external
return ratio, and by choosing the proper values it discrete components, in color. The external components,
is possible to eliminate an open loop dominant added to provide the circuit with feedback, increased
the power gain from 24 to 32 db at 76 Mhz.
pole by the zero of the feedback network.
The bandwidth capability of the circuit is ex­ L e1 L ez Le a
tended by shunting the emitter resistor, RE, with OUT
the capacitor, CE, which reduces the a-c feedback Ro

X
at higher frequencies . Usually the value of CE is
o
c
-
-
less than 10 picofarads. -
-
-
-
-
-

The optimum value of Ro, typically from 50 to Oa

I
-

100 ohms for the circuit being discussed, can be

-

found by trial and error. Resistor Ro must be chosen

carefully so that the biasing conditions and amount -
-
-
- -
-

of feedback are the best for greatest gain-band­

width product.
Before the addition of the external feedback
components, the video amplifier circuit provided an
over-all gain of 24 decibels at 76 gigahertz. With
L at L at L as
the addition of RK, CK, CE and by adjusting Ro,
the value of the gain of the circuit at 76 Ghz is Discrete-component additive ampllfl•. Ro
increased to 32 db. This amplifier uses inductance­
The gain bandwidth product of IC transistors capacitance distributed delay elements.
 - fortunately, are not compatible with integrated cir­
DE LAY cuit techniques so another way must be found to
ELEMENT 2 design an IC equivalent of this circuit. One way
)
to overcome the handicap is to use semiconductor
delay elements arranged to simulate an additive
amplifier in place of discrete LC components. The
E ouT
c 2
external delay elements are placed in the forward
2
path, as illustrated in the circuit at the left. Equal
delays are introduced by each element.
The phase shift corresponding to the delays must
E niPUT
be ., radians so that the signal to input of Q2 and
-

at the output of Q1 must be the same. Thus, the

first signal following the path of Q1 and the delay
-
- element and the second signal after the delay
element and Q2 can be added arithmetically at the
output of Q2• The output at 150 Mhz is 13 db,
obtainable only with external components.
-
-

Hybrid additive a mplifier. Semiconductor delay elements Despite the elimination of the inductors, com­
are used i n place of inductance-capacitance distributed
plete integration of such a circuit is not practical
elements. This circuit provides a power gain of 13 db
at 1 50 Mhz. Discrete components are in color. although it can be done. The reason: the delay
elements must be biased so that their operating
characteristics are linear with respect to changes
r------r-- + Yes
in the frequency of the input signal, and the biasing
must be adjusted so that the same delay is sup­
,...-
.._ ....--
... OUTPUT plied to both input and output elements.
The ideal element for coupling two outputs in
an integrated additive amplifier would be a two­
terminal unidirectional amplifier. The device that
1.2 K
approaches the ideal most closely is a tunnel diode
-

-
connected between the two transistor collectors,
- although the principle of the unidirectionality is
not met. Unfortunately, biasing of a tunnel diode2
-

on the negative resistance portion of its operating

characteristic is very difficult. Thus far, a truly
practical IC additive amplifier has not been built.
Frequency-modu lator circuit. A transistor, Q.,
is used to control the amount of feedback in the
F -m modu lator
circuit. With a 120-millivolt sinusoidal in put, the The circuit with series-to-shunt feedback shown
frequency of oscillation varies from 3.5 to 10 Mhz.
on page 71 may easily be modified to perform many
other functions; this helps keep processing costs
also can be increased by reducing the size of the to a minimum. For example, with minor changes,
transistors, but a point is soon reached where the circuit can be converted to a frequency modu­
smaller transistors increase fabrication difficultiec; lator. The desired amount of positive feedback can
and suffer from impairment of other aspects of be set by adjusting resistors RF1 and RE, both of
electrical performance. Another factor which limits which will vary the bias on transistor Q1• The Lava
the gain bandwidth product of an IC amplifier is chip contributes two additional positive feedback
interstage coupling capacitance. The interstage paths, RF2 and RFa , and with proper bias adjust­
coupling capacitances shunt the input and output; ment, feedback through RF2 and RFa can be further
they are additive in direct-coupled stages.
Despite the limitations imposed by size and ,..----..-- + Vcs
interstage coupling capacitance, the gain band­
width product capability of IC transistors can be
improved by additive (summing) amplification.
Additive amplifier
In the concept of additive amplification, the same
input signal is fed to each of several stages from
a series-connected lossless line. Each of the output -
-
-
-

signals is added in series so that no shunting capaci­

tors are introduced during the process. + - -
-

The two-stage additive amplifier, shown on page Voltage controlled oscillator. In this
71, is built with discrete components and uses in­ circuit a semiconductor delay element is
ductance-capacitance delay elements which, un- employed to control the a mount of feedback.

206
improved. Additional positive feedback can be ob­ + Vc s
tained, if desired, by placing an external resistor
between the Q2 collector and the base of Q1 . Once
oscillation is achieved, the frequency of the oscilla­
tion can be changed by varying the amount of
feedback, which in turn changes the phase shift
in the feedback loop. If the circuit is biased so INPUT
A
that the frequency of oscillation varies linearly with
the input signal, it can be used in pulse-compres­
sion radar to increase transmitted power. -
-

INPUT B
An effective means of controlling feedback phase
is with an active element in the feedback loop as -
-

in the modulator circuit on page 72. A 120-milli­

volt sinusoidal voltage applied to the input of the
transistor Q3 varies the output capacitance of Q:l
sufficiently to vary the frequency of oscillation -
-

from 3.5 to 10 Mhz, but distortion occurs in the -

-

output waveform at higher frequencies.

The series-to-shunt circuit can also be used as
-
-

a voltage controlled oscillator. A variation of this Exclusive OR-gate. The circuit is a modification of the
circuit, shown on page 72, controls the frequency series-to-shunt feedback circuit shown on page 7 1 .
of oscillation with a delay element instead of a
transistor. Applications for this circuit include
phase-lock loop circuits and analog voltage-to-fre­
quency converters.
Exclusive OR-gate
The exclusive OR-gate circuit at the right further
demonstrates the economic aspects of deriving cir­
cuits from a basic feedback circuit. With only
slight modification, the circuit on page 71 can be
turned into the exclusive OR-gate as in the dia­
gram on the right. With both of the inputs off, only
Q2 conducts and the output voltage is low.
However, suppose an on signal is applied at input
A. This turns Q1 and Q2 off, and the output voltage
becomes high. If an on signal is applied at input
B, then Q2 is turned off so that the output voltage Operating characteristics for the exclusive OR-gate.
also is high. The operating point on the current­
voltage graph at the right is point M with an on
signal at either A or B. With on pulses at both A series positive-feedback amplifier as at the left.
and B, however, the load line shifts and the oper­ Increasing voltage at the input produces a large
ating point changes to N; and this turns on tran­ amount of positive feedback to Q�, which is
sistor Q3, bypasses both pulses to ground, and switched on rapidly and driven into saturation. The
maintains a low voltage output. feedback is actually a combination of positive feed­
Positive feedback also can convert a Lava IC back, through RF, and negative feedback through
transistor pair to a Schmitt trigger. The Schmitt RE, which can be varied to adjust the stability.
trigger is formed by connecting the emitters of a With the increasing use of multipurpose IC
chips, feedback techniques are particularly im­
portant because of the versatility they offer at
low cost in modifying the basic chip for variou s
applications. With feedback, the same chip can
be used as a foundation in designing a large variety
J1. of circuits. From an economic standpoint, this
.1\ --
means lower production costs; from the engineer's
viewpoint, this means more information on reli­
ability and performance.

References
-

1 . Jerome Eimbi nder. "General-purpose IC chips speed analog

-

Schmitt trigger circuit. Feedback from transistor design work," Electronics, March 2 1 , pp. 88-92.
2. H .C. Josephs, J .T. Maupin, and J.D. Zook, "Nonlinear coupling
Qe occurs through resistors R,. and RE and is adjusted with silicon tunnel junctions in integrated logic," IEEE
so that Q1 is driven rapidly into satu ration. Transactions on Electron Devices, May, 1965, p. 237.

207
Solid State

-
1n
•

accu r I

Monolith ic diode tra nsistor logic c i rcuit chosen to meet stringent

req u i rements for a irplane and spacecraft applications

By Alvin A. La mpell
Airborne Instruments Laboratory,
Division of Cutler-Hammer, I nc., Deer Park, N.Y.

As the availability of digital integrated circuits in­ transistor logic circuit, the SE124G, manufactured
creases, engineers rely less on custom-made cir­ by Signetics Corporation. The SE124G, a Hip-Hop
cuits. They are learning how to fit off-the-shelf IC's circuit, is packaged in a ten-lead Hat-pack, approxi­
to system requirements. As a result, they are saving mately ¥4-inch square and -fi-inch thick.
time and money. The timer circuit, comprising three SE124G in­
For example, the engineers at Airborne Instru­ tegrated circuits and 22 discrete components, is
ments Laboratory faced the problem of designing on page 71. As shown by the dotted lines, one or
an accurate and versatile spacecraft timer that met two of the integrated circuits can be eliminated if
stringent requirements. They chose IC' s and the a narrower range of time delays is acceptable. Ad­
timer met the requirements with high reliability. ditional IC's provide longer delays. For example,
The primary goal of the laboratory, a division of four IC's provide delays up to 20 minutes; five pro­
Cutler-Hammer, Inc., was to develop a prepro­ vide delays up to 40 minutes. Adding IC' s to the
gramed source of delays ranging from 2 seconds to basic 3-IC system also increases the time span over
10 minutes or more. But the specifications also which variations from temperature changes can be
called for a minimum accuracy of repeatability of held to 5%. With 4 IC's, the limit is 2 minutes; with
99% (the time delay obtained with a specific dial 5 IC's, it's doubled.
setting should be repeated within 1% if the setting In one application, the timer IC's, the signal­
is changed, then reset) and a maximum variation processing input circuitry and the signal-receiving
of 5% for delays up to 60 seconds for temperatures output circuit are housed in a single module shown
ranging from -20° through +70°C. With these on page 71. Most of the equipment's IC cases (each
requirements in mind, the engineers were required %-inch square by lfs-inch thick) are stacked and
to cull carefully the available commercial IC's. welded to form a cordwood assembly for com­
Signetics circuit used
pactness. The module is potted with an alumina­
filled epoxy to improve its ability to withstand
The unit finally selected was a monolithic diode shock, and to assure improved temperature distribu­
tion through the entire unit. Only about one-third of
The author
the space in the module is occupied by the timer
IC's and their associated discrete components. The
Alvin A. Lampell is i n the timer unit measures 1 %-inch square by l-inch
special projects section of
Airborne Instruments Laboratory's
high, but because of a l-inch potentiometer protru­
space systems department. He sion, the total depth is 2% inches. The photograph
joined Airborne in 1959. on page 71 shows a small module, within the
larger module, which contains timer IC's plus other
IC's not associated with timing. A second small
module, also within the larger module but not visi­
;;
'

ble in the photo, contains other non-timing IC's.

-�- :

- �

208
 ing rate decreases, and the delay increases.
After Ct has been sufficiently charged, Q8 is
OUTPUT C I R C U I T R Y triggered and C1 is rapidly discharged through Rs,
Re and the emitter-to-base-one junction of Q3• Tran­
C O N NECTIONS

sistor Q4 is turned on by the conducting unijunc­

tion transistor and supplies a pulse to IC.e, changing
its Hip-Hop seting from the zero to the one state.
As the discharge current from C1 flowing through
Qs decreases, Q3 drops out of conduction. Capacitor
-
- . .-. ,f. . ·-' - . C1 starts to charge again and the entire cycle is
- - •.5-_;::':':-::·. -
- \ ' -- - '
- '· ·=:==-�<:.,::;: -
- - _.--

_ -

.
' '<-�;;..:==
:
•

.-. repeated.
-
_- _
-

·. ' ·. .
,

:-:-:-·:-. '
- "<·>.

'

For a delay system with n IC�s in the feedback

network, 2n charging cycles are required to obtain
- ' -: : ' '- - : --- = = ' -
the desired delay interval. In this case, two inte­
-- : -
:: -- - - . . .. . ..
.- .
_-

-' --- -
- -

'
' ' ' .. grated circuits are being used, therefore C1 must be
_ -
.

-' . '
- -

- '-'- - - ·
- ._

-
-

' =-- �-=: : ' >- -

,

.·
y
I N T EG R ATED
_
-, ,

CIRC U I T PRECIS ION charged and discharged four times before Ct turns
/
MODULE POTE NTIOM ETER
T E FLON B A S E
! T I M E D E L AY on, ending the delay period.
VA R I E D B Y
TU R N I N G ) At the end of the second charging cycle, the
pulse supplied by Q4 changes the I� flip-Hop cir­
Timer package also includes components and integrated
cuit from one to the zero state and the IC3 Hip-Hop
circuit goes from the zero to the one state. At the
circuits not associated with the tim i ng function. The
timer circuitry occupies only one-third of the package.
end of the third cycle, IC2 changes from the zero to
Operation of the timing circuit shown below the one state. Finally, at the end of the fourth cycle,
starts with a negative-going pulse {pulse chang­ the pulse supplied by Q4 changes both I� and ICs
ing from +4 volts to slightly-above-ground voltage} f�on• the one to the zero state,_ causing ICt to
applied at the input designated "set." This sets all change from the zero to the one state, and thereby
three of the Hip-flop integrated-circuits to zero. The turning on (h. The conducting �' in tum, clamps
base of Qt, an n-p-n transistor, becomes more nega­ Ct to ground
tive, Q1 turns off and D4 is back biased. An expression for the cmrent supplied to charge
A constant charging current is supplied to C. capacitor C1 can be derived by examining the base
by the constant-current generator circuit consisting circuitry for Q2 which is in the diagram on page
of Q2, Rl'>, Ra, D:; {IN643) and R1 {resistor R1 is a 73. Once this current is known, the time re­
1,000-ohm potentiometer). As a result, the voltage quired to charge C1 can be determined The portion
across C1 increases linearly with time until the of the circu it to be replaced by a Thevenin equiva­
voltage at the emitter of Qa, the unijunction tran­ lent circuit is inside the box formed by the broken
sistor, is sufficient to turn it on. The rate at which lines. The same circuitry is shown in the center
Ct is positively charged is determined by the setting diagram where the Thevenin equivalent circuit is
of the potentiometer, R7• As the potentiometer ann represented by Ret,.
is moved toward the +24-volt-connection point, The Thevenin equivalent resistance, B.., is actu­
the voltage on the base of Q2 increases, the charg- ally three resistances, Bx, (Rp Rx), and Re in -

R7 + 4V
+4V +12V + 24V + 24V +12V +1 2V
1000

05
Rt R3 1 N643
2000 33,000
02
Rs
2N 2605

03
10,000
R4 04
- R1
10 0 F0300 -
1 00 2N2422A
643
Rto
1000
o,
2N910

R2
0&

Rg
1N643
33,000
100
-
-
- -
- -
- -

-2V -2V

Q Q
IC3 IC 2
Q Q
r - - -.
SE124G SE124G
I CP CP

I I I
__ J_ _j L _j
Tim i ng circuit provides delays u p to 1 0 m i n utes. If shorter delays are satisfactory, one
_ _ _ _ _ _ _ _ _ _ _ _
_ _ __ __ __ __

o r both of the i nteg rated ci rcu its (shown con nected with b r o ken lines) may be eliminated. 209
parallel. The expression for 1\eq is handle. The subscript P denotes that Vp is a func­
tion of the potentiometer setting.
R:�:(R, - R:�:)
(R6) The circuit is designed so when Q2 conducts,
R
.r�
=
-_
_
=--
.::.....:.._
�
R:�:(R-=P__ R:�:) +
R& ....::..:...
(1) capacitor C t charges until its top electrode reaches
a voltage which is sufficient to trigger Q3 , the
R, unijunction transistor. The charging current is the
where RP = total potentiometer resistance, and output of the constant-current generator, given in
Rx = resistance between potentiometer and the equation 8.
+ 12-volt supply.
Because Rx(Rp - Rx) I Rp is equal to or less than The charging circuit
500 ohms and R6 is much larger than Rx (in this A simplified representation of the charging cir­
case 10,000 ohms) equation 1 reduces to cuit is on page 73. The voltage across the ca­
R:�:(R, - R:�:) pacitor is given by the expression
Reg (2) Ec( t)
_

R,
irlt
-

1
Vc = -- (9)
Using nodal analysis, the Thevenin equivalent C Ec( O+)
voltage for the portion of the circuit contained Solving equation 9 yields
within the broken lines on page 73 is:
I ct/Ct = Ec(t) - Ec(O+) (10)
(24 - 12)R z + where Ec(t) is the voltage across C1 after a time t
12 - V F 10000
R, and Ec(O+ ) is the voltage initially across Ct.
v� = �----------��
< �--��)�--- (3 )
+
The initial voltage across C1 is
1 0000
R:�: R, - R:�: + +I
R, Ec(O+) = VD4 V CE(SAT) cR4 (11)
where VF is the forward voltage drop of diode D5. where VD4 is the voltage drop across D4 and
Using the same approximations that led to equa­ VcE ( SAT l is the saturation voltage for Q 1 .
tion 2, equation 3 reduces to Since the maximum value of Ic is only about
0.3 milliampere, the I('R4 product will be no more
., (24 - 1 2 )R z + than 0.03. This is small enough to permit dropping
V = 12 VF (4)
_

R, the IcR4 component from equation 11. Therefore,

the expression for Er(O+) is simplified to
+
The equivalent circuit on page 73 represents
the charging circuit for capacitor Ct. The current Ec(o+) = VD4 V C E (8AT) (12)
flowing in this circuit is the emitter current of Unijunction transistor
transistor Q2
The voltage required to tum on the unijunction
24 - v B E - v., transistor is given by
I - (5) +
V,, v BB71 vD
•
Ro + (R.,/P) = (13)
where VBE = Q2 base-to-emitter voltage and P = The following definitions apply to the equations
Q2 current gain. given above:
For the 2N2605, p is typically equal to or greater V ,, = peak-point (turn-on voltage)
than 50 at a temperature of 25°C and a collector VB B = total base supply voltage
current of 10 microamperes. ., = instrinsic standoff ratio (ratio is constant
Because R5 is much greater than Rec./ {J, equation with temperature and V BB variations)
5 can be rewritten as VD = forward voltage drop for uniju nction
diode.
24 - V B E - V,, The current that flows in the charging circuit
I•
_

(6)
Rr, of Ct must be greater than the peak-point current
-

From equations 4 and 6 (the current at which the unijunction transistor is

triggered). It must also be less than the sustaining
(24 - 1 2)R +
24 - v B E 12 - v F
z

R,
( 7) current so the unijunction transistor will turn off
I. = ----------�---=��------------�
-

after it is triggered. In this circuit, Ic should be

Ro greater than 20 microamperes the peak-point cur­
Since VBE and VF are approximately equal rent (the current at which the unijunction transistor
throughout the entire operating temperature range, is triggered). It must also be less than the sustain­
they effectively cancel. Eliminating VF and V n, and ing current so the unijunction transistor will tum
substituting R5 = 40,000 ohms, Ir = IJ a, and off after it is triggered. In this circuit, Ic should
Vr equal to (12 Rxi Rr) 12 in equation 7 yields -
be greater than 20 microamperes the peak-point
2 current for Q3 but less than 8 milliamperes, the
1 Rz - 12
R,
24 - sustaining current.
Ic = 24 - V P The unijunction-transistor portion of the timing
�
40, 000a
���-----=
_

40,000a
---- - ------

system is also depicted in the circuit on page 73.

where Ic is the collector current of Q2 and also the This is the arrangement to be used if one integrated
charging current for Ct, a is the Q2 current gain in circuit is employed. For longer delays, 06 and R9
a common-base circuit. VP is substituted in the are added to the circuit to provide a reliable refer­
equation solely to make the equation easier to ence voltage to which C1 discharges.

210
+ 24V + 24V +2 4V + 24V Base circuitry for Qs in the
timer circuit on page 7 1
R5 ,- - - - - - 1--. R5 is shown in diagram at
40,00 0
--

I Rp ­
I
40,000 R5 left. I n the center diagram

Q2 I Rx 40,000 the base circuitry has been

I R
I
replaced by a Thevenin
equivalence resistance and
VB£ FOR � voltage. The constant
I
I current supplied to charge
I Req
I R&
I to,ooo
C1 is generated by the
,..,I ' c, I I Req circuit shown at the right.
I I I fJ
...L
I
I -= I -
-
- L - - -- - - -- + 1 2V •
.:..J - Yeq

To provide an expression for delay time, equa­ 100 +12V

tion 10 can be rewritten

Ic ---
Ra
t = [Ec(t) - Ec((J+)) Ct
(1 4)
lc ,...., CONSTANT
Since the voltage across Ct is equal to VPP when CURRENT +
-
601'F
c,
100
Rg
'-""" GENERATOR
Qa fires, VPP = Ec(t). Therefore, from equation 13,
E('(t) = Vnn'l + VD. From equations 8 and 12
t ((V BB'l + Vo) - ( VDt+ V CB<SAT>)) Ct (40,()()()a) -
-
CHARGING C I R C U I T
=

24 - V p Unijunctlon-transistor stage: capacitor

(1 5) Ct is charged until the firing voltage for the
The unijunction diode voltage drop, VD, is ap­ unijunction transistor is reached.
proximately equal to the sum of VDt and VcEtBAT>·
Equation 15 reduces to
v BB'l
means of a zener diode. This would not affect the
t =
K 1a (16) timer accuracy.
Vs - Vp
There is a practical limit to the maximum time
where Kt = 40,000C t and V = supply voltage. 8 delay obtainable with the basic circuit (excluding
Using partial derivatives to account for the vari­ IC2 and IC3). Repeatability also decreases rapidly
ations due to changes in Vs, Vnn, a. and VP as the leakage currents of C1 and Dt approach the
level of the charging current lc.
- Components with low-leakage characteristics
Vso - VPo
should be selected for C1 and Dt. In this applica­
Vsso a tion, an RL series capacitor, made by International
(1 7)
(Vso - vPo)2 Telephone and Telegraph Corp., with a d-e leakage
current of 0.4 microamperes at 25°C and 1.2 micro­
where the subscript 0 indicates time to. amperes at l25°C was selected for Ct. For D4, a
A 60-microfarad capacitor was chosen for Ct; FD300 diode made by the Fairchild Semiconduc­
this value is adequate for the time delay range tor Division of the Fairchild Camera & Instrument
required. The capacitor exhibited a positive linear Corp. was selected. The FD300 has a leakage cur­
temperature coefficient between -55 to +85°C. A rent of only three microamperes at 150°C with a
slight improvement in the accuracy of the timer can reverse voltage of 125 volts. To further minimize the
be obtained if the 40,000-ohm resistor R15 has a effect of the leakage currents, the timing system
negative temperature coefficient to offset the effects should be designed for a minimum value of charg­
of temperature changes on Ct. ing current.
The value of a. for Q.l varies with temperature Resistors R4 and R8 protect transistors Q1 and
and is typically from 0.995 through 0.98. The value Q3, respectively, from current surges; Rto limits
of the standoff ratio 'I for Qa is typically between the base current of Q4 to a safe value. Variable
0.62 and 0.75. resistor, R7, is a ten-tum clock-face potentiometer,
If the +24-volt and + 12-volt power supplies model number 3600, manufactured by Bourns, Inc.
have !-percent variations and a. varies by 0.015, If the space requirement had been more critical,
t will vary by about ± 5 percent. the Bourns model 330, a microminiature potenti­
Separate +4-volt and -2-volt sources are re­ ometer, could have been used. In this case, some
quired to bias the integrated circuits. The circuits repeatability accuracy would be sacrificed.
could be operated with applied voltages of +4 The timer system has been employed in several
volts and ground, however the units would then airborne applications and has provided the 99%
be less immune to noise. If a slight increase in repeatability desired. In one application, it has been
package size is permissible, the +4-volt supply slightly modified to generate linear sweeps for
may be obtained from the +12-volt supply by display.

211
I n stru m entation

• •

IX c ues o nanovo Sl

M i n i m u m detectable signal analysis provides a tool for

design ing systems that measu re low-level signals

By Wayne A. R h i n ehart and Lou is Mou rlam J r.

I n stitute for Atomic Research, I owa State U niversity, Ames

The design of a low-level, low-frequency measuring ance, the short-circuited input noise of the ampli­
system poses many questions. fier, the input resistance of the amplifier, and the
• To achieve maximum sensitivity, should the turns ratio of the input transformer. This expression
greatest effort be put to designing an ultralow-noise enables the designer to quantitatively answer all the
amplifier? questions posed at the outset and to optimize the
• Should an input transformer be placed between system for his own requirements.
the amplifier and source? If so, what should be the Analyzing the problem
turns ratio for maximum sensitivity?
• Is it better to match impedances or operate Most low-level, low-frequency measuring systems
mismatched? can be represented by the simplified diagram on
• Should the input resistance of the amplifier be page 115. The voltage source can be either a bridge
1 megohm or 50 megohms, or does it matter? circuit or any type of low-level transducer. The
• Is the signal source resistance the sole limita­ detection amplifier is usually a high-gain, low-noise,
tion on system resolution? narrow-band device.
• And finally, can the answers to these questions For purposes of analysis, the diagram can be fur­
be found without resorting to intuitive reasoning? ther reduced to an equivalent circuit, where
The answer to the last question is yes. Low-level R. = internal resistance of the source
measuring systems can be analyzed quite rigorously e R8 = thermal noise of the source resistance at
to determine the effects of the described factors on the operating temperature and bandwidth
the minimum detectable signal (MDS). The result of the amplifier
of the following analysis is an equation for the e. = desired signal from the source
MDS as a function of the noise of the source resist- N = ratio of secondary to primary turns of
input transformer
Rtn = input resistance of the amplifier (includes
The a uthors
external resistors combined in parallel
Wayne A. Rinehart, head of the with tube or transistor input resistance )
instru mentation g roup at the e Rtn = thermal noise of Rin at the operating tem­
I nstitute at Iowa, is no stranger perature and bandwidth of the amplifier
to the problems of low-level RN A = equivalent noise resistance of the amplifier
measu rements. H e previously with the input short circuited
reported the design of a sensitive
e N A = thermal noise of RNA ; measured short­
n u l l detector based on field
circuited input noise of the amplifier
effect tra nsistors [Electron ics,
Sept. 20, 1965. p. 88] . The input capacitance of the detection amplifier
is assumed negligible. However, this assumption
restricts the results to low-frequency use. The re­
Lou i s Mourlam Jr. was coauthor
of the earl ier article on the
sistors in the equivalent circuit are noiseless and
n u ll detector. He is a the amplifier is a voltage-controlled device. The
n uclear i n stru mentation designer characteristics are typical of high-impedance field­
at the I owa I nstitute, where effect-transistor and vacuum-htbe amplifier circuits.
h e devotes much time to low­
For the analysis, it is assumed also that the trans­
level design techniques.
former is ideal, which is a reasonable approxima­
tion of a practical case. The primary resistance
is usually negligible when compared with the

212
source resistance; and the secondary resistance is SOURCE A M PLI FIER
I NPUT
R E S I STANCE
TRA N S FORMER
�------�
usually negligible compared with the reflected �------
source resistance. The circuit to be analyzed, at
O UTP UT
'V
right, is the equivalent circuit with the source pa­ SOURCE
VOLTAGE
rameters reflected into the transformer secondary.
The definition of the minimum detectable signal
is based on the signal-to-noise ratio at the input of
the amplifier. Disagreement often arises as to how r------. N
small this ratio can be made and still distinguish
the signal from the noise; here a signal-to-noise
ratio of unity is assumed to yield the smallest re­
trievable signal. OUTPUT
Equating the signal voltage to noise voltage at
the input to the amplifier gives
N e RII Rin
2
N ea Rin
+
N2 R.+ Rin N2 Rs + Ri n
- -
-

2 1/2 'V
eR in N2 Ra
+ ( N A) 2
N2 Rs + Rin
e N 2 Rs RIN 8 NA

The right hand terms of this equation represent the

OUTPUT
combined root mean square voltage appearing at
the amplifier's input because of the three uncor­
related noise sources, eR11, en i n and eNA ·
Simplifying, the expression for the minimum de­
tectable signal is System for measuring low-level signals can be represented
by the diagram at the top. For analysis purposes,

+
=
it is reduced to the equivalent circuit in the center.
MDS Reflecting the source parameters to the transformer
secondary yields the final form for analysis
2 1/2 of the minimum detectable signal.
(1 )
that will minimize the last two terms of equation 1,
I ncreasing the resolution resulting in the best possible MDS. If the optimum
Equation 1 shows that the minimum detectable turns ratio turns out to equal one, there is no need
signal is influenced by more than just the source for a transformer. Most of the time, an input trans­
resistance. The first term, the noise of the source, former is required.
represents the absolute low limit for the minimum A practical example would be where the value of
detectable signal. Where the choice of source re­ an unknown resistance must be determined with
sistance is possible, the smaller the value, the an a-c bridge. The problem is to choose the turns
better the resulting MDS. Since the last two terms ratio for the input transformer that will yield the
contain factors normally under the designer's con­ smallest MDS and the best bridge balance. The
trol, parameters are sought to cause these two terms bridge null detector is a narrow-band amplifier.
to vanish. In practice, however, this cannot be done From the amplifier specifications, Rtn = 15 X 1()6
completely, and the remaining parameters are ohms, the noise bandwidth is 2 hertz and the short­
chosen to minimize the last two terms. circuited input noise, eNA = I0- 1 volt. The bridge
Those terms in equation 1 which contain the output impedance is 10 ohms. The Johnson, or ther­
transformer turns ratio N provide insight into the mal, noise of the source er11 is calculated to be 5.6 X
effects of the transformer on the MDS. The last two 1010 volts and the noise of the amplifier input re­
terms of equation 1 give sistance en1 11 is calculated to be 75 X I0- 8 volt.
2 2 Substituting these values into equation 2 results in
N R. + eN A
+ e NA an optimum turns ratio of 445, and the minimum
R in N detectable signal, found from equation 1, is approxi­
mately 0.65 nanovolt.
A point-by-point plot of the minimum detectable
signal for different values of the turns ratio exhibits
1/'1. a relatively flat portion near the optimum value
Nopt =
eNA
R
of N. It is quite satisfactory, therefore, to use trans­
• (e2 R in + e2 N A) t/2 (2)
R in
- formers with turns ratios close to that value. If the
source resistance is changed to 3,000 ohms, Nopt
For specified amplifier input noise and resistance, becomes 25:'\.The same curve clearly shows the ef­
and the source resistance and corresponding ther­ fect of N on system sensitivity. With no input trans­
mal noise, equation 2 gives the exact turns ratio former (N = 1) there is achieved an MDS of lO-T

213
 U)
U)
!:::; ....
...J
N opr • 25
� 0
>
0 NopT a 4 4 5 CD
SOURCE \
0
10
0
1
-

ou R E
C 4 : 75 x 10- 8
eR s
e
-
-
[ RIN
..
R 5 : 3000
M
R t N = 1 5 X 10
- - - - - -- - Cl) 6
en
_ _ _ _ _ _ _ _ _

e R N = 75 x to- a 0
0 2
2 e N A = 1 X f0- 7
R s = IO I BANDWIDTH = 2 H z
.,
.,
6 BANDWIDTH • 2 Hz TEMPERAT U R E = 2 0 ° C
X
RIN = I5 x 10 10- S
eR = I
s
TEMPERATURE = 20°C
eR • 5.6 x 10-
10
1 eN A = t x 10 ·7
t O.t
fO 100 1,000 10,000 1 10 100 1,000
TURNS RATIO , N
I
TURNS RAT I O , N

Optimum transformer need not be exactly the calcu lated va lue of N . The flatness of the cu rve i n the reg ion of
Nopt a l lows some latitude i n this value without too g reat a n effect on the m i n i m u m detectable sig nal. The MDS
versus N sh ifts ma rkedly with respect to a change i n the value of the sou rce resi stance.

-
en

� Rs = t O
0
>
- eR = 5.6 x to- t o
CD 5 U)
0
-
)C
7 !3 -- - - - - -- -1
0
e NA = to-
en >
-

Q
(R5= 3,000)
• 0
2
BANDWI DTH 2 hz ..

1 -
Q)
TE M PERATURE a 2 0° C 0
-
2 )C
�
2 :g BANDWIDTH = 2 H z
:-
-
....
Q.
TEMPERATURE = 20° C
0 1 e R 5 ( R5 = 10)
0
tOO K 4M ===- - - - - - -==

t
10 M 400 M
0.001 0.01 0.1
R I N ( OH MS ) -&
ll 10 I
'NA VOLTS

The law of diminishing returns appl ies when i n put Amplifier noise affects system sensitivity. However, i n
resistan ce Rtn is m u ltiplied i n a n effort to i m prove one case, reducing noise below 100 n anovolts does
system sensitivity ( m i n i m u m detecta ble signal). not result i n a significant gain i n sensitivity.

volt, which is the noise of the detecting amplifier. for a large optimum turns ratio--often difficult to
If the turns ratio is arbitrarily made as large as obtain in practice.
possible, for example N = 1,000, the MDS is even When applying this optimizing technique to high­
worse. The equation for Nopt serves as an accurate input resistance amplifiers, the possible effect on
guide for selecting that input transformer which the amplifier input capacitance should be carefully
results in a system sensitivity as near the theo­ examined. The reactance of the input capacitance
retical limit as possible under the conditions given. at the frequency of operation must be large when
The equation for the optimum turns ratio indi­ compared with the input resistance of the amplifier.
cates that matched impedances do not produce the The figure above shows how the optimum MDS
lowest possible minimum detectable signal. Though varies with different values of Rtn• The value of Nopt
matched impedances provide the most efficient was calculated for each point on the curve.
transfer of the signal to the amplifier when using a How noise in the detecting amplifier affects sys­
transformer, a mismatch improves the signal-to­ tem sensitivity can be demonstrated by returning
noise ratio. With two diverging factors, some sort to the bridge-balancing problem described, but
of compromise is needed. Equation 2 exactly defines with two amplifiers available as the detector. Except
the degree of mismatch that exists between the for short-circuited input noise, they are identical.
reflected source resistance at the amplifier input The noise of one is assumed to be 100 nanovolts,
and Rtn when N = Nopt, and hence yields the best the other 10. It would appear that the amplifier
MDS. Because the optimum mismatch percentage with less noise would result in 10 times more sensi­
is not constant for all situations, the optimum turns tivity than the other. But, that is not so. If the
ratio must be recalculated whenever any param­ optimum transformer for each amplifier found from
eters in the equivalent circuit are changed. equation 2 is used, the resulting MDS values are
As shown in equation 1, the best value for the 0.65 and 0.57 nanovolt. Reducing the short-circuited
amplifier·s input resistance, R1n is one that mini­ noise by 10 improves the MDS by a factor of 1.14.
mizes the last two terms in the equation, resulting The figure above shows that reducing eNA below
in the lowest MDS. Theoretically, an infinite input 100 nanovolts does not result in a significant gain
resistance yields the best MDS. Actually, there is in sensitivity. But as eNA increases above 100 nano­
an upper limit to this resistance. A large R1n calls volts, the sensitivity deteriorates rapidly.

214
I nstru m entation

1e
• • •

I rea · SIS

From probing for a brain tumor to expl oring for oil ,

a utocorrel ation and crosscorrelation a re proving inva l uable
when noise must be filtered from very low level signals

By Bernard Lu Bow
Princeton Applied Research Corp., Princeton, N.J.

Correlation analysis the powerful but formerly equipment couldn't operate in real time and were
time-consuming technique for analyzing signals primarily limited to low-frequency applications.
and systems behavior in communications and The situation is changing, however. New efficient
radar is leaving the laboratory and is heading instruments can continuously sample even the most
to the field and operating room. Recently developed noisy signals and compute the correlation function
instruments and methods that permit autocorrela­ simultaneously permitting the function to be ob­
tion and crosscorrelation to be measured on-line served almost immediately and continuously.
and displayed in real time are opening new ave­
Different but alike
nues for the process and improving old ones. Cor­
relation is being extended into radio astronomy, Correlation analysis is a convenient technique for
fluid and solid-state physics , neurology, seismology determining the spectral characteristics of a signal
and other areas. or the similarity of two different signals.
The expansion of correlation analysis is the result One point of a correlation function is the long­
of increased exploration of phenomena that have term average of the product of two functions of
very low level signals brain waves and stellar time. The complete function is generated when a
radiation for example. Digging a signal out of noise delay between the two time functions is varied.
is the major function of analyzing data in both geo­ For example, if one voltage V1 (t) and another volt­
physical exploration and underwater detection. age V2(t-T), where T represents a finite and variable
These signals are often hidden beneath a blanket delay, are continuously multiplied together and
of similar signals and extraneous noise; to separate the product fed into a low-pass filter, then the
the signal from the noise, instruments of unprece­ filter's output closely approximates the true mathe­
dented accuracy and sensitivity are needed. Hence matical correlation function.
scientists often resort to correlation analysis to find If V2 is identical to V1 in every respect except
these obscure signals. But previously this meant for the delay T, the result is the autocorrelation
expensive, specially designed equipment for each function. If V1 and V2 are totally different func­
specific situation. Worse yet, old methods and tions, then the result is the crosscorrelation func­
tion. The outputs in both cases are functions of the
The author
delay time, T. Mathematically for autocorrelation:
Bernard Lu Bow received both T

iT
BSEE and MSEE degrees from
Drexel Institute of Technology,
CI ,I (T) = Lim
Philadelphia. For six years T- eo -T

prior to joi ning PAR, he did for crosscorrelation:

design and development work T
with radar receiver systems
at the Radio Corp. of America.
-T

An instrument, therefore, that does this integrating

215
 Subject 1 Subject 2

Correlation functions of EEG's of two subjects. Top traces were taken with subjects' eyes closed and clearly
define the alpha rhythm's basic frequency. Rhythm is d iffic u lt to measure with conventional EEG's since it
is masked by random signals. Bottom traces show how a l p ha rhythm d isappears when subjects open their eyes.

process will show whether correlation exists be­ rhvthm was blocked out a normal occurrence with
•

tween two signals and, if so, when maximum cor­ subjects having normally functioning brains.
relation takes place. [For a more detailed discus­ It has also been demonstrated that there are
sion of the correlation functions see "Mathematics significant changes in the correlation functions of
of correlation," p. 78.] EEG's from patients with brain tumors. 1 Since
EEG' s contain signals that are much like repetitive
Correlator reads brain waves
bursts of damped sine waves, a crosscorrelogram
Measuring the similarity of two supposedly iden­ of normal EEG's from corresponding areas on the
tical signals arising from a common physical phe­ left and right hemispheres of the patient's skull
nomenon is often an invaluable tool in medicine. would be similar to that shown in the figure on
For instance, the basic frequency of the brain's page 79. If the maximum value of the correlogram
alpha rhythm, the dominant rhythm from the adult is at zero delay (S = 0 in the figure), this indicates
cortex, can serve as an excellent indicator of the that the electrical activity at both electrode loca­
patient's health. A smooth alpha rhythm is normal; tions is synchronous. An asymmetrical crosscor­
the presence of spikes or other extraneous activity relogram indicates that the two hemispheres are
indicates a condition for further medical analysis. not producing comparable rhythmic electrical ac­
With a conventional electroencephalogram (EEG), tivity; this could mean the presence of a tumor.
it is sometimes impossible to measure this basic Correiators may also locate the area of a patient's
frequency. brain responsible for the uncontrollable twitching
With correlation, the alpha rhythm is extracted present in some diseases epilepsy, for instance.
from the EEG signals for easy interpretation. The The offending area can be identified by crosscor­
photographs above are the autocorrelation func­ relating EEG signals from various parts of the
tions of EEG's of two subjects; each taken from brain with signals from strain gauges applied at
between the left parietal and central occipital areas . the location of the twitch. The brain waves are
The parietal lobes above each ear control audio­ recorded with electrodes fastened to the head; it
language functions; the occipital area is in the back is not necessary to place probes in the brain sur­
of the brain and controls sight. The upper traces gically.
show how easily the basic frequency of the alpha
Turbulence measured ly
rhythm can be measured. These correlograms were
made when the subjects were relaxing with their One of the earliest applications of crosscorrela­
eyes closed. The lower correlograms were made tion was in fluid physics to study the irregularities
when the subjects opened their eyes and the alpha in the :Buid Bow of streams hydrodynamic tur-

21&
bulence. Turbulence studies are usually made by FLU I D
VELOC I T Y
repeatedly inserting a velocity-responding probe
PROBES (
into the turbulent stream of fluid at different points. CB A T }
Analysis of data from a single probe is of limited
/
....... ......
f (t )
A
value. By contrast, the crosscorrelation of signals
t 8( t } s T
from probes of variable separation gives more /'/",.. )
t/ I
,.;. ......
meaningful information about turbulence and dif­
fusion (the scattering of solid particles in fluids). //
t/ I
I
Crosscorrelating the a-c signals from two velocity TURBULE N T
/ ..../-'.
I
FLOW
sensors inserted into a stream produces results L/

similar to those at the right. The signals pro­ I

;. C B'A ( T )
,.-r "'
duced by two probes in the stream are correlated //
(.,
f '8 ( t l
as one of the probes is moved downstream relative I s t'
I
//\
to the other. Two things are immediately apparent.
First, the time delay for maximum correlation in­ (/
l
creases in proportion to the distance between the I
I
probes. This would be expected for the general /_?''\I
v
flow of the fluid in the pipe. Second, as the distance I
C B uA ( T }
I
between the probes increases, the amplitude of the "
t,- , t B (t }
correlation function decreases while its width in­ s T
I
creases. This yields information about both the I
amplitude of the turbulating eddies and their co­
c
/"'l
herence time. The coherence time is an important I
I
characteristic since it aids in defining the actual ,... --.!""'\
physical process. The two-probe technique for in­ L/ I 1
C 8111A ( T }
1 11
vestigating turbulence and diffusion is probably I f (t )
cr
B s t'
the most important single tool available to investi­
gators in hydrodynamics, rocket exhaust studies
Hydrodynamic turbulence studies are aided by determin­
and plasma physics.
ing the correlation function between the electrical outputs
Characterizing l inear systems of two velocity sensing probes. Amplitude and coherence
time give distinctive data about the turbulating eddies.
Many techniques have been developed for deter­ Similar information is difficult to obtai n with single
mining the behavior of linear systems. These in­ probe measurements that yield only the power density
spectrum. The correlation functions between probes as
clude such methods as Nyquist and Bode plots one is moved downstream show how the delay time
and the use of frequency analyzers. Y.W. Lee and i ncreases and the amplitude decreases as the
J .B. Weisner2 showed that it is possible to obtain probes separate.
the unit impulse response of a linear system by
driving it with broadband (white) noise and cross­ This technique has important practical implica­
correlating this input with the system output, as tions. Consider, for example, the effect of spurious
on page 81. The correlogram that results gives noise when trying to determine an impulse re­
the same information about the system as if it sponse or when the system is in constant use and
were excited with an approximation of a delta is being driven by external signals. Even under
function and its output recorded on an oscilloscope these circumstances it is possible to obtain the
or x-y recorder. In practice, however, the delta crosscorrelation function between the system out­
function is hard to achieve and, more often than put and a test white noise signal. Since there is
not, overloads active systems. Further, the complex no correlation between the test signal and the con­
frequency response function of the system can trol signal or extraneous noise, the control signal
be obtained as the Fourier transform of the im­ and noise will not affect the crosscorrelation func­
pulse response made with such a test signal. tion obtained which is the impulse response un-

LI NEAR EXTRANEOUS CONTROL

WHITE tlwl = K NOISE ,-----_,. S I G NAL
SYSTEM SOURCE
NOISE U N DE R OUTPUT
SOURCE TEST C O N T RO L fs( t l
SIGNAL
SOURCE - '0 ·.
' c .
.•.
" -;

LINEAR
ADD SYSTEM ;
....., "
f ( t ) · '• . •.
· · ·
E.
UNDER TEST
WHITE
A
·""- -,; · t· . .

Response of a linear system to a unit i mpulse can be NOISE

SOURCE · · A'r .
•·'· ;

r ir
obtained as shown above by crosscorrelating the signal
from a white noise source and the resulting system '--- -
t8 ( t l ·:<;;;,
tttw ) . K
--

output. This technique can be used while the system is

operating, right, despite extraneous noise sources.

217
Mathematics
of correlation
Correlation functions are to modem
analytical techniques what frequency
spectra are to the classical methods
of Fourier, Heaviside and LaPlace.
Unfortunately, for most engineers au­
tocorrelation and crosscorrelation func­
tions do not have the intuitive mean­
ing the frequency spectra have�­
probably because of lack of experience
in handling correlation analysis. Yet
correlation functions, an outgrowth
of modem information theory, are
basic to the analysis of random proc­
esses and the complex signals they S I N SO I DA L S IGNALS
produce. f ( t ) = A COS ( w t + 8 )
To better understand correlation
functions, assume that some physical
process produces the time functions
fA (t), fB (t), . . . , fn (t) simultaneously.
Assume further that the physical proc­
WI DEB N O NOISE A MPLITU D E E N
ess is not changing with time the
fA ( t ) P LU S
batteries are not running down, parts
are not wearing out in other words,
t
a stationary situation exists. Also, it
is assumed that the time functions COHERENT SIGNAL A M PL I T UDE G N
are not zero and they do not have a
d-e component. The signals may be fA { t )
simple or complex periodic waves or � + EM
they may vary in noise-like random
t
fashion.
Autocorrelation. Passing one of the - '-
-EM T
-

signals, f"(t), through an ideal delay R A N D O M WAVE Z E RO AX I S C ROSSI NG

line introduces a nondispersive vari­ RATE = k PER SECO N D , PO I S SON
able delay, T, as shown in the block D I STR I BUTED
diagram on this page. The output of
the line, signal fA(t - T), is identical
to f.<\ (t) except for the delay. If the
instantaneous values of f., (t) and f."'
t
(t - T) are multiplied and the prod­
uct averaged over a sufficiently long
time, the result has the following
WIDE B A N D N O I SE
properties: R M S VA LU E = E M , BANDWI DTH = B
• The product will be maximum at

'T = 0

• The value at T = 0 is related to

function fA(t). Mathematically the atomic clocks. For a signal arising
the total power of the signal. If fA(t) autocorrelation function is expressed: from a real process, CAA(T) approaches
is a voltage, then the average of the
T zero as T becomes sufficiently large.
product for T = 0 is simply fA(t)2, The value of T that causes a signifi­
or the power the signal will dissipate cant reduction in the function CAA(T)
-T
in a 1 ohm resistor. is a measure of the coherence time of
• The average value of the product Consider what information CAA(T) the original signal.
will be a function of T, the form of can give about the signal fA(t). First Noise characteristics. Consider, for
which will be characteristic of the compare fA(t) with fA(t-T) for very example, random noise. The autocor­
original signal, fA(t). large values of T. Any physical realiz­ relation function for very wideband,
• If the averaging time is long able process that produces a time uniform (white) noise with a root
compared with the reciprocal of the function like f"(t) will be such that mean square value of Em is an im­
lowest frequency in the original sig­ the value of the signal at time t pulse function at T = 0 with an am­
nal, then repeated measurements of becomes more independent of the plitude Em2• This means that one
the product for a given T will yield value at t - ., as T gets larger. Ther­ characteristic of wideband noise is
values very close to one another. mal noise, and even the quantum that the instantaneous value of the
• The average value of the product mechanics uncertainty principle, will signal is completely independent of
for negative values of T is identical eventuaUy introduce randomness that the value at any other instant and
to that for the same positive values. will cause a gradual loss of coherence that the coherence time of the process
What has been described is the au­ in the output signal. This is true even producing the noise is very short.
tocorrelation function for any time of the oscillators in the most stable A less obvious property of the auto-

218
 V A R I ABLE T of power density spectrum analysis,
fc !t l there is no classical analogy for cross­
P E R FECT DELAY LI NE correlation analysis. Crosscorrelation
fA ( t ) D E L AY T
AVERAG I N G
is concerned with the relationship be­
FO UR ­ C I RC UI T
tween two different signals that arise
fN ( t )
PHYSICAL QUAD R A N T A V ERAG I NG in some common process. The cross­
r �L :; �NEHERE ,
PROC ESS MULT I PLIER
fa (f)
TI ME T
correlation function is obtained by
F2! .!,E�� E_! .J averaging the product of one time
L
-

t0!tl -
- function with a delayed replica of the
second time function as shown in the
block diagram on this page. Expressed
T
mathematically, the crossrelation func­
t tion is:
k I S I NTEGER
S I N U SOIDAL S I GN AL , FR EQUENCY "'N T
ta ( t l
CA a ( T )
CAa ( T ) :1= 0 I F "' N = kwM fA (t)fB (t - T) dT
-T
---+--�----r---� t T

k "'M •
HAR M O N I C OF FUNDAM ENTAL
The properties of CAB(T) are, in gen­
ANY PERIODIC S I G N A L , FREQ UENCY "'M I S PRESENT I N S I G NAL eral, quite different from those of
the autocorrelation function. For ex­
ample, CAn(T) is not equal to CAn( -T).
However, CAn( -T) does equal CnA(T),
a relationship that has practical im­
portance in obtaining CAn(T) for nega­
fA = W H I TE NOI S E tive delays. In practice, the averaging
1" process indicated in the above equa­
fa ( f )
t
j
I M PULSE RESPO NSE OF F I LTER
tion is perfonned only for a time
longer than the longest period in sig­
nals fA(t) and fn(t). Also, for signals
fa = fA AFTER PASS I N G THROUGH FILTER that arise from real physical processes,
noise and the uncertainty principle
assure that CAn(T) approaches zero as
T approaches infinity. A few examples
of crosscorrelation between various
t
typical waveforms are shown at the
fA = R E PETI TIVE BU RSTS O F DAMPED left on this page.
S I N E WAVES The crossrelation function can be
1"
fa ( t ) described as representing the degree
of conformity between two signals as
1 s b, t
�- S ------t
a function of their mutual delay.
Hence if fA (t) and fn (t) arise from two
fa = fA D ELAYED BY AMOUNT S
completely separate, unrelated proc­
esses, then CAn(T) = 0. As in the case
CAa(T) = ct 3 ! Tl + �3( T)
of autocorrelation, a reciprocal Fourier
fA ( f ) = ff ( f ) t t2(t)
pair exists for crosscorrelation. They
+ ci 4 ( T) + c24(T)
fa (t) = t 3 ( t l + t4 ( t ) are described mathematically by the
following:
...

correlation function is given by the ment of the power density spectrum 1

4> A B (w) =

fol1owing pair of reciprocal relations: of a complex signal has been the tra­ 21r _
..,

ClO
ditional way of obtaining information ...

to characterize the signal for two rea­

sons. First, construction of a wave
- oo
- CD

...
analyzer is relatively straightforward
and, second, spectral data are of In this case, however, the physical
4>A A (w) COS wTdw paramount importance in specifying meaning of �An(Cd) is not so clear. It
_
..,
the frequency response of equipment can be called the spectrum of cross­
These expressions are called the needed to handle the signal. However, correlation of the time functions fA(t)
cosine Fourier transform pair. It can in searching for an unknown coherent and fn(t).2
be shown that �AA(Cd), the cosine signal buried in random noise, the Crosscorrelation analysis provides
Fourier transform of the autocorrela­ autocorrelation method would detect a powerful analytical tool. The ability
tion function, is identical to the power the presence of the signal sooner than to measure the degree to which two
density spectrum of fA(t). Hence measuring the power density spec­ signals that arise from a common
measuring the autocorrelation func­ trum. The autocorrelation functions physical phenomenon resemble each
tion or the Fourier density spectrum for a few representative time func­ other as a function of the delay time
yields equivalent information about a tions are given on the preceding page. between them can provide a much
signal and the above equations can Crosscorrelation. While the auto­ deeper insight into the phenomenon
convert one to the other. correlation function of a signal is being studied than a separate analysis
In experimental work, the measure- equivalent to the traditional technique of the properties of either signal alone.

219
 OVERFLOW CLOCK
or - RANGE ...
...,_ __,
INDICATOR
-

OSC
_

NOI SE

..,..

1 00
- - - - - - - - - -
_ _ _ _ _ _ _ _ _

--
ELEMENT

......., ...,_,
A TO D SHIFT
- -- - - - -
- - - - - - - - - - -

REGISTERS
-
-

- - - - - - - - -

' '
00
--- -------

I
OVERLOAD INDICATOR
6 HOLD
SAM P L E

X X .,_ __-I X - - - - -- ------

}1HYBRID
"B" SIGNAL BUS M U LT I ­
P L IERS
-
-

GATE R R R R R
I N PUT SUSPEND
ot---"'1 T IM E
GATE

I
T RAMP
OUT
- - - -
- -

01
0
READOUT RING RING
Of tO
_
BUFFER
RATE OSC OF AMPL

0 0 0 I 2
- -

N M

READOUT BUS
0 1 2 34 5 6 7 8 9 , 0 1 2 3456 789
- -
/
I
- - - - -- - -

N M

Basic to the operation of rea l-time correlator is the digital delay l i n e made u p of a series of fl i p-flops.
The tota l delay ra nge, from 100 microseconds to 1 second, is dete rm i n ed by the clock oscil lator' s freq uency.
Overload i ndicators i n each c h a n n el i n di cate when the i n p ut signals a re a m plified sufficiently. The p roduct
of the delayed and referen ce signals is stored o n the mem ory capacitors, C. The fu nction is appl ied to the
readout terminal as the ring cou nters seq uentially turn o n the transistor switches, Q.,
perm itting the voltage stored on each capacitor to be sa m pled .

disturbed by the extraneous signals. Since noise imposes the basic limit on the mini­
This immunity to internal system noise also mum signal that can be obtained in a given ex­
allows the response to be obtained with very small periment, if, as is often possible, enough is known
exciting noise signals which do not interfere with about the frequency of the signal being sought; it
the signals that the system normally handles. Thus can be correlated with a reference signal of the
the response function can be determined while the same frequency. The noisy signal crosscorrelated
system is in operation. with the reference signal yields a function that
With the new real-time methods of correlation indicates the relative phase relationship between
it is now possible to keep the response of critical the noisy signal and the reference. Also, the ampli­
systems under constant surveillance and to make tude of the crosscorrelogram is the product of the
optimizinc adjustments. Self-optimizing systems reference and signal amplitudes, the noise having
can he constructed by introducing feedback from been rejected. A special case of crosscorrelation has
a subsystem that evaluates the impulse response. been applied to the design of lock-in amplifiers.3

I
I
' -

t-;
-

1:
'

, I: n· nn n nn n n
•

- II II
.

..--h i- :I
1:
1: :I
l 1:
c�
-

I -- il
1: il
!
-

1: :I
'
-

··
r , 1: ::1
n 11'1

I
' • ' ' '

il
1: :I
1: :I
li ..
li :II
I 1: :I

Crosscorrelatlon of input and output signals from a lumped-parameter delay line driven by a white noise source
yields the unit i mpulse response of the line. Output smoothing converts the point-by-point plot to a continuous curve.

220
 Actual equipment for obtaining correlation func­
tions can take many forms. A technique used ex­
tensively couples the input signals to a digital
computer by means of a high-speed analog-to­
digital converter. The computer is programed to
crosscorrelate, point by point, two signals and
to extract them from noisy backgrounds. But, this
requires a sizable computer memory and a rela­
tively large amount of computer time. Also, it is
difficult to make high-speed analog-to-digital con­
versions. Other correlators record the signals on
magnetic tape for replaying at a later time. Variable
delay between the signals may be introduced by
two playback heads on the recorder one movable
BANDPASS !"''
-� + * �---- ,..._
and the other fixed and varying the separation ---- _
F I LTER l,.;
_

between them. This technique requires point-by­

point sampling of the input signal, which is time SPEAKE 'R' MICROPHONE

consuming and cannot be done on-line.

The advantage of being able to read correlation PREAMPLIFIER
functions in real time can be seen in a typical ex­
ample of how correlation analysis is used. In sleep A B
research, for instance, the correlator has the ability NOISE GEN
to sense the onset of alpha rhythms with extreme
sensitivity as it is occurring without the ambiguity Acoustical system driven by a white noise sou rce.
and delay that occurs when isolating the rhythm Crosscorrelating the microphone output with the
from normal EEG records. Researchers thus can original sou rce yields the system's i m pulse response in
!ower tr� ce. The C? mplete transfer function of the system
determine more precisely the time relation between IS descnbed by th1s single trace.
the onset of the alpha rhythm and other experi­
mental factors.
the point of overload.
No extras needed The output of each multiplier is gated by a tran­
The Princeton Applied Research Corp.'s instru­ sistor switch Qo so that, in effect, time may be
ment is a 100-point time delay correlator designed suspended. This feature is useful where correla­
primarily for on-line use. It requires no extra tions are desired on pulsed signals with low duty
equipment other than a general laboratory oscillo­ factors. The correlator is dormant during the gated­
scope to display the final function and it can work off period. After gating, the signal, A(t-nT)B(t), is
with signals as high as 250 kilohertz. PAR's cor­ averaged in a simple resistor and capacitor circuit
relator combines analog and digital techniques to with a sufficient time constant to obtain good
display a continuous picture of the correlation integration.
functions of the input signals. Since the function To read out the results, the charge on each of
the 100 memory capacitors, C, is nondestniCtively
sampled by semiconductor switches, Q!il, that are
is computed for 100 delay times simultaneously,
turned on in sequence along the memory line. The
a continuous presentation of a slowly varying cor­
relation function can be displayed even with inputs
that are not quite stationary with respect to time. sequencing _is controlled by a pair of decade ring
The two signals to be correlated are fed into counters dnven by a readout rate oscillator. The
inputs A and B, see diagram at top left. Channel readout rate has no bearing on the operation of
A is amplified to a level just below the point of the instrument and can be adjusted to be com­
patible with the readout instrument; slow for an
overload. It is then mixed with noise and digitized
x_-y recorder and fast for an oscilloscope presenta­
in a relatively coarse, high-speed analog-to-digital
tion. Output smoothing is available so the 100 dis­
converter. Outputs from the converter are sampled
crete output points can be made into a continuous
and applied to an 100-element shift register. The
curve. This is useful when complicated functions
shift register acts as a digital delay line and has
are to be observed, as demonstrated by the cor­
a total delay equal to 100 periods of the clock
relation function between the input and output of
oscillator. The speed of the analog-to-digital con­
a lumped-parameter delay line on page 80. Con­
verter limits the clock frequency to 1 megahertz
necting the discrete points with a smooth line
producing a minimum total delay of 100 micro­
makes it easier to interpret the function.
seconds and a maximum of 1 second.
The output of each flip-flop in the 100-element
References
delay line is tapped, and the binary number repre­
sented by the state of each stage in the register is 1 . W.A. Rosenbllth, Processing Neuroelectric Data ' M IT Press'
Cam bridge, Mass., 1962.
connected as one input to a hybrid multiplier. The 2. Y.W. Lee, Statistical Theory of Communication, John Wiley &
s �cond input to the multipliers is the analog input Sons, N .Y., 1960.
3. R.D. Moore, "Lock-in ampt ifiers for signals buried i n noise' "
stgnal on channel B, also amplified to approach Electronics, June 8, 1962, p. 40.

221
 I nstru mentation

uenc nOISe
• • •

en a ran s1 I a1

I mproved rel iabil ity studies may result from the use
of noise measu rements instead of statistica l values
to forecast the l ifet i me of the device

By Al bert va n der Ziel and H u Tong

U n ive rsity of Min nesota, M i n neapolis

A new method for predicting the life expectancy of electrons in the semiconductor.] Although these
a transistor based on measuring the device's noise sources change with age during a transistor's
noise at 1,000 hertz could make transistor reliabil­ operating life, they do so in the same manner as the
ity studies simple and more accurate. Our prelimi­ currents and h-parameters, therefore limiting their
nary work for the U.S. Army Electronics Command usefulness as an independent indicator of the im­
shows that transistor noise serves as an indicator of pending failure of the transistor.
when the device will fail because this parameter Low-frequency noise, on the other hand, is known
changes drastically toward the end of the transis­ to be very sensitive to changes in a transistor's
tor's life. surface conditions and the gas ambient atmosphere
Transistor noise at frequencies higher than 1,000 within the transistor package. Therefore, noise at
hz are not good indicators of the transistor's condi­ 1,000 hz could be expected to give a better indica­
tion. This noise is produced by shot noise currents tion of the life expectancy of the device than any
flowing across the transistor junctions and by ther­ other parameter.
mal noise of the series resistances, mostly of the
Of two methods, one is direct
base resistance. 1 [Shot noise is caused by random
variations in the number and velocity of electrons Low-frequency (II f) noise values are usually de­
and thermal noise by the thermal agitation of the rived from measurements of the spot noise figure,
F, of the device. The measurement is most often
made in a common emitter connection with an emit­
The authors
ter current of 1 milliampere at 1 khz and 1,000-ohm
Al bert van der Ziel has written many source impedance. Because commercial equipment
books and pa pers on noise
is readily available, this is the handiest way of
phenomena and is considered a n
authority on the su bject. He has measuring noise figure at 1 khz, and for studying
been professor of electrical a large number of devices. [1/f noise is so named
engi neeri ng at the U niversity of because of its inverse relationship with frequency].
M i n nesota si nce 1950.
We chose a different approach because the rela­
tionship between noise figure and II f noise is quite
complex, and a more direct measurement of 1/f
H u Tong received a bachelor of noise was desirable. The equivalent saturated diode
science degree from National current, leq, measured at the output of the transistor
Taiwan Un iversity i n 1961. H e in a common emitter connection is an effective, di­
contin ued his studies at the
Y- . ,-

rect indicator of 1/f noise. Measurements are made

,

U n iversity of Minnesota and

received a master of science degree
at 1 khz and an emitter current of 1 rna, with a very
in 1965. H e is now working for h i s high source resistance Ra in the base lead.
Ph D in electrical engineering at As shown in the upper figure on next page, the
the u n iversity. II f noise of a transistor can be represented by a
current, (the square root of the average value of i1
 For example, let ic be the known signal from the
+ current generator, then
i02 =
2qleq Beff
where Bett is the effective bandwidth of the measur­
-�
v 't - gmV = gm R b ei f =�oi f ing system. The current leq can be determined from
•

• Rbe
lr this relationship.
The factor Beu is defined in the following way.
The function g(f) is the voltage gain versus fre­
quency characteristic of the tuned amplifier used in
-

Equivalent noise circuit of a tra nsistor. The

the experiment. If the amplifier is tuned for a maxi­
output cu rrent, {Jo i r is the a m pl ified noise sou rce mum gain, go, at 1,000 cycles, then:
cu rrent. A measure of the device's equ ivalent 00

satu rated diode cu rrent at the output terminals is related

g2 (f) df
to the amount of noise generated.
0

cb This is a constant value for the particular amplifier

c OUTPUT
cb _,.... .---�----� 1 used and need only be calculated once. 3
�IN�PU�T��� �-�--�b� e
It is often assumed that Bett should be small
compared to the center frequency of 1,000 hz. How­
ever, it is inconvenient to choose a Bert that is too
tOO k

c
small since the rectified noise will then cause
c
fluctuations in the output meter, reducing the ac­
curacy of the measurement.
The relative accuracy of a single measurement is
given by
100% -

-
V 2Beff T
where r is the time constant of the indicating in­
-

Test circuit for performing noise measu rements is

strument. 3 A reasonable compromise is obtained
with Bett � 500 hz and r = 2 seconds.
a common e mitter amplfier, tu ned for a maxi m u m
gain at 1 ,000 hertz. The ci rcuit's effective cu rrent
amplification factor and the time constant of the
Artificial aging
indicating instrument determ ine the relative accuracy
of the noise meas u rement readi ngs. The transistors are aged at an elevated tempera­
squared) ...J �' in parallel with the emitter junction/� ture for 10 hours and then allowed to cool and
If a large wirewound resistor Rs is connected in
series with the base, the transistor's output current is
�0 I
600
v'�
L I F E T I M E VS. Ieq ( MEASURED
where Po is the current gain of the transistor. AT ROOM TEMPERATU R E )
o7
To measure the value of the noise current, a 500 o 2 N697
noise diode is connected in parallel with the tran­ f( o 8 X
0 2N914
•
sistor output and the diode current increased until 11 9 2 N1 565
the current generated by the transistor doubles.
Therefore:
0::
-

�
v' �o2 ir2 = 0
2q leq �f :c
-

where q is the charge of an electron and �f is an LU 300

2
incremental frequency range over which the meas­ �
-

LU
urement is made. The current leq is the equivalent L&..
•
17 16 15
X X
..J
-

current of the diode noise source. Therefore leq is a 200

9
direct measure of the ljf frequency noise current
X
generator.
!I! X
The test circuit for measuring 1/f noise in tran­ 100
1t
sistors is shown above. Other amplifying stages
follow in the actual test setup. Usually the equiva­
lent saturated diode current 1('(1 is so large that it
is inconvenient to use a noise diode as a standard 20 40 60 80 100
for its measurement. Any other calibrated current Ieq. ( mA ) •

generator can serve as well. If enough signal current Comparison of the operating life of d ifferent
is added so the amplified power output of the device transistor types indicates that those with
is doubled, then it is a simple matter to calculate leq. i n itial low noise achieve longer l ife spans.

223
 25 .----,---.---r---�--� 104 �--r---r---�--T---- ----�
Ib VS. TIME AT 35o•c 7
Ic 1.0 mA =

t- Si, 2N91 4 •a -+---� leq VS. TIME AT 35Q-C

20 ._ --. --+- --t-
5

Si, 2N914 "a

Ic • I.O mA
• 3
•
•
15 • :;.;----t---t---+---1

3
-

1. t0 t---t---t---+---- ---�
.A
-

M to 1------+- 7
Ib AT TEMPERATURE
( 14.a I' A)
c 3
-

E
-

50 to2 t---�t----4---4---+-- -+----1

HOURS •

Plot of results demonstrates 3 • •

how the equivalent saturated
diode current, 1.41 measured
at the output of the test circuit
changes drastically just before 10 r--��-�---;�--+---
7 NOISE AT ROOM MPERATURE
(19.3 mA)
a typical device fails. A
measure of the base current, above,
of the same transistor does not 50
supply any such warning. HOURS •

remain at room temperature for another 10 hours. base current as a function of the aging time for
This stress was employed to accelerate failure the same transistor does not warn of the impending
mechanisms in the devices . The II f noise was then failure even after hundreds of operating hours.
measured and the cycle repeated. These measurements were repeated many times
It was found that the choice of aging tempera­ for a variety of types of silicon transistors with the
ture and the duration of the rest period at room same results the base current hardly changed but
temperature are critical. For instance, if the aging the low-frequency noise increased very rapidly
temperature is too low, the lifetime of the transistor when the transistors were about to expire.
would be so great that the time required to com­
Low noise, long l ife
plete the study would be prohibitive.
On the other hand, if the temperature is too high, The graph at the left is a plot of lifetime as
the transistor's lifetime is foreshortened and the a function of the initial value of leq for transistor
device would fail before a sufficient number of data types 2N697, 2N914 and 2N1565 aged at 350°C,
points could be taken. An aging temperature of and indicates that transistors initially exhibiting
350° C is a good compromise for most silicon tran­ low noise have longer life spans than high-noise
sistors; at that temperature, the device lifetime is units. Therefore, by measuring the low-frequency
a few hundred hours and a reasonable determina­ noise of new transistors, it is possible to make a
tion of the lifetime can be obtained with measure­ reasonable prediction about life expectancy of the
ments made every 10 hours. devices.
A suitable rest period between aging cycles is Obviously this method needs much more testing
important, since it takes about 10 hours before before it can be generally accepted. It is hoped
complete equilibrium is reestablished within the that the results presented might stimulate such a
transistor after it has been exposed to elevated tem­ large-scale test to discover how reliable low-fre­
peratures. quency noise measurements are in predicting the
life expectancy of new transistors.
What has been found
The figure above shows a typical plot of the
measured noise for a 2N914 silicon transistor as a References
function of time. Even though leq remains prac­ 1 . A. van der Ziel, Fluctuation Phenomenon In Semiconductors,
Butterworths, London, 1959.
tically constant until the end of the transistor's life, 2. J.L. Plumb et al, "Flicker Noise in Transistors," I EEE
Transactions ED10, Sept. 1963, p. 304·308.
it does increase by two to three orders of magni­ 3. A. van der Ziel, Noise, Prentice Hall, Englewood Cliffs,
tude just before the transistor fails. A plot of the N.J., 1954.

224