Solution: Answer All Questions in The Provided Space. All Questions Are Based On AVR Architecture. 18 November 2020
Solution: Answer All Questions in The Provided Space. All Questions Are Based On AVR Architecture. 18 November 2020
Q.1 Complete Table Q.1 with the correct AVR component names.
(4 marks – PLO1)
Table Q.1
(4 marks – PLO1)
Table Q.2
Q.3 The memory size of a byte-addressable microcontroller is determined by the size of its address bus.
Using this information, find the following.
(6 marks – PLO3)
a) The memory size accessible by 16-bit address bus.
b) The size of the address bus to access 16MB memory.
Answers:
𝑎)216 = 210 ∙ 26 = 64𝐾𝐵. The accessible memory size is 64KB. (3m)
𝑏)16𝑀𝐵 = 24 ∙ 220 = 224 . Thus, the size of address bus is 24 (3m)
1
Q.4 Fill up the following Table Q.4 with the correct byte of register R16 and status register SREG in
hexadecimal. The representation of the 8-bit SREG is as Figure Q.4.
(16 marks – PLO3)
Table Q.4
Instruction R16(hex) Status Register(hex)
LDI R16, 0x80 0x00 0x1B
a) LDI R17, 0x80 (2m) (2m)
ADD R16, R17
LDI R16, 0x28 0x33 0x20
b) LDI R17, 0x0B (2m) (2m)
ADD R16, R17
LDI R16, 50 0x41 0x20
c) LDI R17, 0x0F (2m) (2m)
ADD R16, R17
LDI R16, -3 0xF9 0x35
d) LDI R17, -4 (2m) (2m)
ADD R16, R17
Figure Q.4
Q.5 In Table Q.5, indicate if the following instructions are valid or invalid. If invalid, give reason(s).
(10 marks – PLO3)
Table Q.5
Instruction Valid or invalid Reason if invalid
Invalid Cannot write to Register PIND.
a) IN PIND, R16
(1m) (1m)
Invalid Pointer register X cannot be
b) ST X+5, 30 (1m) used displacement indirect
addressing mode.(1m)
Invalid ● Immediate
( 1m) addressing mode
cannot be used for
R10. (1m)
c) LDI R10, 300
● The immediate value
exceeds the largest
decimal value of an 8-
bit binary. (1m)
Invalid Invalid source register. Constant or
d) CP R10, 0x023A
(1m) address not allowed. (1m)
Valid
e) INC R16
(1m)
2
Q.6 Analyse the following program. Determine the result after execution for GPR and memory addresses
by filling in all empty boxes in Table Q.6.2. Initial values of GPR and memory contents are given in
Table Q.6.1. These instructions are executed sequentially.
(10 marks – PLO3)
Table Q.6.1
Register Content Memory
(hex) Address Content (hex)
R24 D5 $100 FF
R25 43 $101 00
R26 BB $102 A0
R27 AC $103 D7
R28 64 $104 7D
R29 FE $105 7A
R30 71 $106 EF
R31 DD $107 34
.CSEG
.ORG 0x100
.DEF OP1=R24
.DEF OP2=R25
.DSEG
.ORG $100
TEMP1: .BYTE 1
TEMP2: .BYTE 1
DATA: .BYTE 4
SAVE: .BYTE 1
3
Table Q.6.2
Register Content Memory
(hex) Address Content (hex)
R24 34 (1m) $100 C7 (1m)
R25 2C (1m) $101 2C (1m)
R26 $102
R27 $103
R28 05 (1m) $104
R29 01 (1m) $105 43 (1m)
R30 05 (1m) $106 D5 (1m)
R31 01 (1m) $107