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ECE485/585: Programmable Logic Controllers Exam #1 (Sample Style Questions) Instructor: Dr. D. J. Jackson

This document contains a sample exam for a course on programmable logic controllers (PLCs). The exam includes multiple choice and true/false questions about PLC programming concepts as well as practical programming problems to solve using ladder logic. One question asks the student to design a PLC program to control the operation of three machines with start/stop buttons and interlocking. Another asks the student to create a timing circuit that outputs pulses every 2 seconds based on the state of an input switch.

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368 views4 pages

ECE485/585: Programmable Logic Controllers Exam #1 (Sample Style Questions) Instructor: Dr. D. J. Jackson

This document contains a sample exam for a course on programmable logic controllers (PLCs). The exam includes multiple choice and true/false questions about PLC programming concepts as well as practical programming problems to solve using ladder logic. One question asks the student to design a PLC program to control the operation of three machines with start/stop buttons and interlocking. Another asks the student to create a timing circuit that outputs pulses every 2 seconds based on the state of an input switch.

Uploaded by

nida haq
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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ECE485/585: Programmable Logic Controllers

Exam #1 (sample style questions)


Instructor: Dr. D. J. Jackson

1. There are three machines, each with its own start and stop buttons. Any two machines may
run at one time (also, any one may run by itself). Each start button is to have a sealing circuit.
Construct a PLC circuit with appropriate interlocking for this problem.
2. Construct a PLC timing circuit that will output (using output O:2/0) a 0.5 second pulse every
two seconds (i.e. on for 0.5s then off for 2s) if a switch (using I:1/0) is closed and a 1 second
pulse every two seconds if the switch is open.
3. Label the following statements as TRUE or FALSE.

Most PLCs have a fixed number of timers FALSE

Normally closed contacts “invert” the state of the signal they reference TRUE

PLCs are advantageous for use in fixed-circuit or fixed program operations FALSE

4. Complete the following statements.

a) PLC process scanning consists of the INPUT scan, PROGRAM scan and OUTPUT scan.

b) RUNG scanning and COLUMN scanning are the two methods (orders) in which PLCs
solve ladder logic programs.

5. Describe the differences between an [XIC] and an [OSR] instruction.

An [XIC] (examine if closed) instruction is used in a ladder logic program to determine if a bit
is on (1). When the instruction is executed, if the bit addressed is on (1), then the instruction
is evaluated as TRUE. When the instruction is executed, if the bit addressed is off (0), then
the instruction is evaluated as FALSE. The [OSR] (one shot rising) instruction is true for one
PLC scan when the rung conditions preceding the OSR go from false-to-true.
6. A certain switch (I:1/0) is to start a process. The process is to run for 30 seconds, stop for 10
seconds and then repeat as long switch I:1/0 remains closed. Opening I:1/0 at any time is to
reset all timers and de-energize all outputs. Output O:2/0 is to be energized during the 30s
run period and output O:2/1 is to be energized during the 10s stop period. During the run
period, a single output O:2/2 is controlled by input I:1/1. If I:1/1 is open (at the beginning of
the run period) O:2/2 is to be off for the first 5 seconds then on for 10 seconds. If I:1/1 is
closed (at the beginning of the run period) O:2/2 is to be off for the first 10 seconds then on
for 15 seconds. Changing I:1/1 after the run period has begun should not change the above
sequence. Output O:2/2 is always to be off during the stop period.

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