I8080 8228 Bit72
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DeadMikeI8080 8228 Bit72
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DeadMikeThe 8080's support chips (the 8224 and the 8228):
The 8080 CPU, one of the first CPUs to be commonly used in microcomputers (it
was the heart of the famous Altair 8800, considered the "first personal
computer"), requires two support chips in order to work as designed. These
chips are the 8224 clock generator/driver, and the 8228 bus controller.
The primary function of the 8224 is to generate the two clock signals needed
by the 8080. The 8080 requires a two-phase, non-overlapping clock input,
which basically means that first one clock pin goes high, then the other one
does, and one is supposed to go low when the other goes high, in a see-saw
kind of motion. Besides this somewhat bizarre waveform, the voltage levels of
these clock inputs are non-standard: They are about 10 volts.
Why does the 8080 require such a clock input? Simply because it was designed
that way. Whereas the other two classic CPUs of the early micro age (the 6502
and the Z80) require only a single input signal, the 8080 requires two. So
there. It's an early example of market share showing its effect: A big
company (in this case, Intel) can get away with weird designs.
The pinout for the 8224 is as follows:
1: RES (Reset) (Output to pin 12 of the 8080)
2: /RES or /RESIN (Reset in) (Input from reset button)
3: RDYI (Ready In) (Input)
4: RDYO or READY (Ready Out) (Output to pin 23 of the 8080)
5: SYNC (Indicates beginning of new machine cycle) (Input from pin 19 of the
8080)
6: PH2T (Phi2 TTL clock) (Output; Can be used for external timing purposes,
but is not essential to the chip's functionality)
7: /ST or /STSTB (Status Strobe) (Output to pin 1 of 8228)
8: GND (Ground)
9: Vdd (+12V)
10: PH2 or PHI2 (Clock 2; Goes directly to 8080) (Output)
11: PH1 or PHI1 (Clock 1; Goes directly to 8080) (Output)
12: OSC (Oscillator; Separate oscillator that can be used for other timing
purposes; Like PH2T, is not essential for the chip to work) (Output)
13: TNK (Tank circuit; Used only for overtone crystals)
14: XT2 or XTAL2 (One end of crystal oscillator)
15: XT1 or XTAL1 (Other end of crystal oscillator)
16: Vcc (+5V)
In essence, a normal two-pin crystal is connected between pins 14 and 15 of
the 8224. The 8080 normally runs at 2 MHz, and the frequency of the crystal
is divided by nine before it is fed to the CPU, so to achieve 2 MHz, a
crystal of 18 MHz is normally hooked up to the 8224, which gives a clock
output of 2 MHz to the 8080 CPU. Pins 10 and 11 provide the actual two-phase,
non-overlapping clock signal that the 8080 needs, and so those pins are
joined directly to the CPU's clock inputs.
Pin 1 is the reset output signal; it resets the CPU. (No, the reset button
does not go directly to the 8080, as it does in most other CPUs; The reset
signal to the CPU is actually provided by the 8224.)
Pin 2 is the active-low reset input. It is normally kept high through a
pull-up resistor, and brought low by connecting it to ground through a
momentary push-button switch, which becomes the reset button.
Pins 6 and 12 are external, auxiliary outputs which are not essential to the
function of the 8224 or the 8080, but which can be used for some other
creative stuff if you happen to have a need for such signals. Pin 6 is
basically the same as pin 10, and the two will go high at the same time; The
only real difference is that pin 6 is TTL compatible (in other words, 5
volts), instead of the non-standard voltage used by the main clock pins. Pin
12, on the other hand, will run at the speed of the actual oscillating
crystal. Thus, if you are using the normal 18 MHz crystal, pin 12 (OSC) will
pulse at 18 MHz, and pin 6 will pulse at 2 MHz.
Pin 13 is only used for overtone crystals. Normally a fundamental mode
crystal is used with the 8224, but overtone crystals can be used as well as
long as you rig pin 13. To simplify things for yourself, just use a
fundamental-resonance crystal and ignore pin 13.
The 8228 is the 8080's bus controller, handling the data bus. The pinout for
the 8228 is as follows:
1: /STSTB (Status strobe) (Input from pin 7 of 8224)
2: HLDA (Hold acknowledge) (Input from pin 21 of 8080)
3: /WR (Write) (Input from pin 18 of 8080)
4: DBIN (Data bus in) (Input from pin 17 of 8080)
5: DB4
6: D4
7: DB7
8: D7
9: DB3
10: D3
11: DB2
12: D2
13: DB0
14: GND (Ground)
15: D0
16: DB1
17: D1
18: DB5
19: D5
20: DB6
21: D6
22: /BUSEN (Bus enable) (Input)
23: /INTA (Interrupt acknowledge) (Output to pin 16 of 8080)
24: /MEMR (Memory read) (Output to memory chips)
25: /IOR (I/O read) (Output to peripherals or I/O chip)
26: /MEMW (Memory write) (Output to memory chips)
27: /IOW (I/O write) (Output to peripherals or I/O chip)
28: Vcc (+5V)
The D pins are the CPU data bus. They connect the 8228 to the 8080 CPU.
The DB pins are the system data bus. They go from the 8228 to the memory (RAM
and ROM) and the I/O bus (peripherals).