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Curriculum Vitae: Mrs. Shilpa Shirish Bali

This curriculum vitae summarizes the qualifications and experience of Mrs. Shilpa Shirish Bali. She has over 1 year of teaching experience in electronics and communication engineering. She holds a Master of Technology degree in VLSI Design & Embedded Systems from the Shri Jagadguru Balagangadhara Institute of Technology in Bangalore, India, where she completed a thesis on a low power digital upconverter for power line communication systems. She also holds a Bachelor of Engineering degree in electronics and communication engineering from Rural Engineering College in Bhalki, India, where she completed a thesis on a CMOS serial controller interface. Her technical skills include assembly languages for 8085 and 8086 microprocessors and hardware description languages V

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Vishrut Shirish Bali
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68 views3 pages

Curriculum Vitae: Mrs. Shilpa Shirish Bali

This curriculum vitae summarizes the qualifications and experience of Mrs. Shilpa Shirish Bali. She has over 1 year of teaching experience in electronics and communication engineering. She holds a Master of Technology degree in VLSI Design & Embedded Systems from the Shri Jagadguru Balagangadhara Institute of Technology in Bangalore, India, where she completed a thesis on a low power digital upconverter for power line communication systems. She also holds a Bachelor of Engineering degree in electronics and communication engineering from Rural Engineering College in Bhalki, India, where she completed a thesis on a CMOS serial controller interface. Her technical skills include assembly languages for 8085 and 8086 microprocessors and hardware description languages V

Uploaded by

Vishrut Shirish Bali
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Curriculum Vitae

Mrs. Shilpa Shirish Bali

VIIT Staff Quarters no 13. Vidya Prathisthan,


Vidya Nagari,MIDC. Pin code 413133.

Maharashtra, India
Cell No: +91-7218956121
E-mail:vanishil90@gmailcom

Work Experience:

Teaching experience (1 year 9 months)


Organization: Rural Engineering College, Bhalki
Department: Electronics & Communication Engineering
Bhalki, Bidar, Karnataka,India

Period: 4-9-2010 to 1-2-2011 as Lecturer


1-2-2012 to 30-5-2012 as Assistant Professor

Subjects Taught: Basic Electronics, Digital Communication,


Analog communication, VHDL, Verilog

EDUCATION:

Master of Technology (M.Tech) in VLSI Design & Embedded system,

Institute : Shri Jagadguru Balagangadhara Institute of Technology Bangalore,


INDIA
Class : First class with Distinction
Graduation : Dec 2010

Bachelor of Engineering (BE) in Electronics & Communication Engineering

Institute : Rural Engineering College Bhalki, INDIA


Class : First class
Graduation : July 2008

PROJECTS UNDERTAKEN

Master of Technology (M.Tech):

Title of thesis: “Design and Implementation of Low power DUC for Power Line
Communication System”
Scope of project:

The Digital up Converter is a digital circuit which implements the conversion of a complex
digital base band signal to a real pass band signal. The input complex base band signal is
sampled at a relatively low sampling rate, typically the digital modulation symbol rate. The
base band signal is filtered and converted to a higher sampling rate before being modulated
onto a direct digitally synthesized (DDS) carrier frequency. The DUC typically performs
pulse shaping and modulation of an intermediate carrier frequency appropriate for driving a
final analog up converter and is used extensively in wireless and wire line communication
systems.

Bachelor of Engineering (BE):

Title of thesis: “CMOS Serial Controller Interface”


Journals:

 Shilpa P. Biradar, Ranirashmini Vasmatker, Shivshanker Biradar “Design and


Implementation of Low power DUC for power line communication system”, World
Journal of Science and Technology (WJST), Vol. 2, Issue 5, (2012), p.94.

 Ranirashmini Vasmatker, Shilpa P. Biradar, Shivshanker P.Biradar, S. M Kulkarni


“Wavelet networks” World Journal of Science and Technology (WJST), Vol. 1,
Issue 12, (2011), p.42.

International Conference Proceedings:

 Ranirashmini Vasmatker, Shilpa P. Biradar, Shivshanker P.Biradar “Image


compression using DWT and artificial neural networks” presented in Innovations and
Trends in computer and communication engineering (ITCCE-2011) organised by
MET Nashik.

Technical skills
Assembly level language: 8085, 8086,
Microcontrollers: 8051
Hardware language: VHDL, Verilog

PERSONAL DETAILS
Name : Mrs. Shilpa Shirish Bali
Date of Birth : 4th July 1987
Languages known : Kannada, English, Hindi, Marathi
Hobbies : Drawing, Art and craft
Cooking, Watching movies.
Contact Details : +91-7218956121
Permanent Address : VIIT Staff Quarters no 13. Vidyaprathisthan,Vidya nagari,MIDC.
Baramati. Pin Code:413133.

I hereby declare that all the statements above are true and complete to the best of my
knowledge.

Place: Baramati
Date: 28 march 2019 Mrs. Shilpa Shirish Bali

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