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Things To Know : Instruction Format Instructions Can Have 1, 2 or No Operands

The document discusses different addressing modes of the 8086 microprocessor. It describes 7 categories of addressing data, including immediate, direct, register, register indirect, base-plus-index, register relative, and base-relative-plus-index addressing. It also discusses 3 ways of addressing program codes in memory - direct, indirect, and relative. Addressing stack in memory uses PUSH and POP instructions. Input/output ports can be addressed directly or indirectly using IN and OUT instructions. Implied addressing has no explicit address given in the instruction.
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0% found this document useful (0 votes)
69 views9 pages

Things To Know : Instruction Format Instructions Can Have 1, 2 or No Operands

The document discusses different addressing modes of the 8086 microprocessor. It describes 7 categories of addressing data, including immediate, direct, register, register indirect, base-plus-index, register relative, and base-relative-plus-index addressing. It also discusses 3 ways of addressing program codes in memory - direct, indirect, and relative. Addressing stack in memory uses PUSH and POP instructions. Input/output ports can be addressed directly or indirectly using IN and OUT instructions. Implied addressing has no explicit address given in the instruction.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
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You are on page 1/ 9

7/9/2021

Things to know…
 Instruction format opcode Operand(s)

 Instructions can have 1, 2 or no operands


 INC AX ; 1 operand

 ADD CX, DX ; 2 operands CX = CX + DX


Destination source

 HLT ; no operand
8086 Addressing Modes cse341  Instruction cannot have:
Dept. of Computer Science and Engineering  SUB [DI], [1234h] ; memory locations as both operands
BRAC University
CSE 341 Team  MOV 1234, AX ; immediate data as destination operand

CSE – 341: Microprocessors


BRAC University

Addressing Mode and Categories 1. Addressing Data


 The different ways in which a microprocessor can access I. Immediate addressing
data are referred to as its addressing modes. II. Direct addressing

 Addressing modes of 8086 Microprocessor are categorized III. Register [direct] addressing
as: IV. Register indirect addressing
 Addressing Data V. Base-plus-index addressing
 Addressing Program codes in memory VI. Register relative addressing
 Addressing Stack in memory VII. Base-relative-plus-index addressing
 Addressing I/O
 Implied addressing
CSE – 341: Microprocessors CSE – 341: Microprocessors
BRAC University BRAC University
7/9/2021

1. Addressing Data 1. Addressing Data


I. Immediate addressing V. Base-plus-index addressing
 Data is immediately given in the instruction  Base register is either BX or BP
 Index register is either DI or SI
MOV BL, 11 dbh
MOV DX, [BX+DI]

II. Direct addressing VI. Register relative addressing


 Data address is directly given in the instruction  Register can be a base (BX, BP) or an index register (DI,
SI)
MOV BX, [437AH]  Mainly suitable to address array data

MOV AX, [BX+1000]


CSE – 341: Microprocessors CSE – 341: Microprocessors
BRAC University BRAC University

1. Addressing Data 1. Addressing Data


III. Register [direct] addressing VII. Base-relative-plus-index addressing
 Data is in a register (here BX register contains the  Suitable for array addressing
data) MOV AX, [BX+DI+10]
MOV AX, BX
MOV AL, BX
2. Addressing Program Codes in Memory
Used with JMP and CALL instructions
IV. Register [indirect] addressing
3 distinct forms:
 Register supplies the address of the required data
I. Direct

MOV CX, [BX] II. Indirect


III. Relative
CSE – 341: Microprocessors CSE – 341: Microprocessors
BRAC University BRAC University
7/9/2021

2. Addressing Program Codes in Memory 3. Addressing Stack in Memory


 Address is directly given in the instruction • PUSH and POP instructions are used to move
CS IP

JMP 1000: 0000 data to and from stack (in particular from stack
JMP doagain ; doagain is a label in code segment).
PUSH AX
CALL 1000:0000 POP CX
CALL doagain ; doagain is a procedure in code
• CALL also uses the stack to hold the return
 Often known as far jump or far call address for procedure.
CALL SUM ; SUM is a procedure name

CSE – 341: Microprocessors CSE – 341: Microprocessors


BRAC University BRAC University

2. Addressing Program Codes in Memory 4. Addressing Input and Output Port


 Address can be obtained from  IN and OUT instructions are used to address I/O ports

 a) any GP registers (AX,BX,CX,DX,SP,BP,DI,SI)  Could be direct addressing


JMP AX IP = AX ; then CS : IP

IN AL, 05h ; Here 05h is a input port number


 b) any relative registers ([BP],[BX],[DI],[SI])
JMP [BX] IP = what is inside the physical address of DS : BX ; then CS : IP
 or indirect addressing
OUT DX, AL ; DX contains the address of I/O port
 c) any relative register with displacement
JMP [BX + 100h] IP = what is inside the physical address of DS : BX +100h ; then CS : IP
 Only DX register can be used to point a I/O port

CSE – 341: Microprocessors CSE – 341: Microprocessors


BRAC University BRAC University
7/9/2021

5. Implied Addressing Instruction template (6 bytes)


 No explicit address is given with the instruction BYTE 1 BYTE 2

 implied within the instruction itself OPCODE D W MOD REG R/M

 Examples: BYTE 3 BYTE 4

CLC ; clear carry flag LOW BYTE DISPLACEMENT / DATA HIGH BYTE DISPLACEMENT / DATA

HLT ; halts the program BYTE 5 BYTE 6

RET ; return to DOS LOW BYTE of IMMEDIATE DATA HIGH BYTE of IMMEDIATE DATA

An instruction after conversion can have 1 to 6 bytes long of machine code

CSE – 341: Microprocessors CSE – 341: Microprocessors


BRAC University BRAC University

8086 Machine Codes


Instruction template Constructing Machine Codes for 8086
 For 8085: Just look up the hex code for each instruction.  Each instruction in 8086 is associated with the binary
 For 8086 it is not simple. code.

 E.g 32 ways to specify the source in MOV CX, source.  You need to locate the codes appropriately.
 MOV CX, source  Most of the time this work will be done by assembler
a 16-bit register (8 in number)

a memory location (24 possible memory addressing modes)


 The things needed to keep in mind is:
 Each of these 32 instructions require different binary code.  Instruction templates and coding formats
 Impractical to list them all in a table.  MOD and R/M Bit patterns for particular instruction

 Instruction templates help code the instruction properly.

CSE – 341: Microprocessors CSE – 341: Microprocessors


BRAC University BRAC University
7/9/2021

MOV Instruction Coding MOD and R/M Field


 MOV data from a register to a register/to a memory location  If the other operand in the instruction is also one of the eight register then put
in 11 for MOD bits in the instruction code.
or from a memory location to a register.
(Operation Code of MOV: 100010)  If the other operand is memory location, there are 24 ways of specifying how
the execution unit should compute the effective address of the operand in the
main memory.

 If the effective address specified in the instruction contains displacement less


than 256 along with the reference to the contents of the register then put in 01
as the MOD bits.

 If the expression for the effective address contains a displacement which is too
large to fit in 8 bits then out in 10 in MOD bits.

CSE – 341: Microprocessors CSE – 341: Microprocessors


BRAC University BRAC University

MOD and R/M Field REG Field


 2-bit Mode (MOD) and 3-bit Register/Memory (R/M)  REG field is used to identify the register of the one operand

fields specify the other operand.

 Also specify the addressing mode.

CSE – 341: Microprocessors CSE – 341: Microprocessors


BRAC University BRAC University
7/9/2021

Instruction template Example 1


BYTE 1 BYTE 2

6 bits of
MOV, ADD etc
 MOV 8B43H [SI], DH: Copy a byte from DH to memory with
OPCODE D W MOD REG R/M
16 bit displacement given the opcode for MOV=100010
D - direction BYTE 1 BYTE 2
If D=0, then direction is from a register (source)
If D=1, then direction is to a register (destination) 1 0 0 0 1 0 0 0 1 0
OPCODE D W MOD REG R/M
W - word
If W=0, then only a byte is being transferred (8 bits) Therefore D=0
If W=1, them a whole word is being transferred (16 bits) MODE OPERAND NATURE
source -- 8 bits (not a word size)
00 Memory with no displacement
MOV [SI + 8B43H] , DH Therefore W=0
MODE OPERAND NATURE 01 Memory with 8-bit displacement
• 34h here is an 8-bit displacement
00 Memory with no displacement MOV AX, [BX] 10 Memory with 16-bit displacement
• [BX+34h] is a memory/offset address
01 Memory with 8-bit displacement MOV AX, [BX + 12h] 11 Both are registers
10 Memory with 16-bit displacement MOV AX, [BX + 1234h]
MOV [BX + 34h ], AL
11 Both are registers MOV AX, BX BYTE 3 BYTE 4

MOV AX, 1234 h


• 1234h here is a 16-bit immediate data value LOW BYTE DISPLACEMENT / DATA HIGH BYTE DISPLACEMENT / DATA

CSE – 341: Microprocessors CSE – 341: Microprocessors


BRAC University BRAC University

Instruction template Example 1


BYTE 1 BYTE 2
 MOV 8B43H [SI], DH: Copy a byte from DH to memory with
16 bit displacement given the opcode for MOV=100010
OPCODE D W MOD REG R/M
BYTE 1 BYTE 2

1 0 0 0 1 0 0 0 1 0 1 1 0
• Value for R/M with corresponding MOD
value OPCODE D W MOD REG R/M
• Value for REG with corresponding W Check column that matches with MOD
value and the register considered in D value
MOV [SI + 8B43H] , DH

CSE – 341: Microprocessors CSE – 341: Microprocessors


BRAC University BRAC University
7/9/2021

Example 1 Example 2
 MOV 8B43H [SI], DH: Copy a byte from DH to memory with  MOV AX, BX: given the opcode for MOV=100010
16 bit displacement given the opcode for MOV=100010
BYTE 1 BYTE 2
BYTE 1 BYTE 2
1 0 0 0 1 0 0 0 1 0 1 1 0 1 0 0
1 0 0 0 1 0 1 1 1 1
OPCODE D W MOD REG R/M
OPCODE D W MOD REG R/M

MOV [SI + 8B43H] , DH AX considered which is a


destination operand,
therefore D = 0

destination -- 16 bits (a word size)


MODE OPERAND NATURE
AX is 16-bit long,
00 Memory with no displacement
MOV AX, BX therefore W = 1
01 Memory with 8-bit displacement
10 Memory with 16-bit displacement
11 Both are registers

CSE – 341: Microprocessors CSE – 341: Microprocessors


BRAC University BRAC University

Example 1 Example 2
 MOV 8B43H [SI], DH: Copy a byte from DH to memory with  MOV AX, BX: given the opcode for MOV=100010
16 bit displacement given the opcode for MOV=100010
BYTE 1 BYTE 2
BYTE 1 BYTE 2 1 0 0 0 1 0 1 1 1 1 0 0 0
1 0 0 0 1 0 0 0 1 0 1 1 0 1 0 0 OPCODE D W MOD REG R/M
OPCODE D W MOD REG R/M

MOV [SI + H] , DH

BYTE 3 BYTE 4

0 1 0 0 0 0 1 1 1 0 0 0 1 0 1 1
LOW BYTE DISPLACEMENT HIGH BYTE DISPLACEMENT

Machine Code: 1000 1000 1011 0100 0100 0011 1000 10112 or 88 B4 43 8B16
CSE – 341: Microprocessors CSE – 341: Microprocessors
BRAC University BRAC University
7/9/2021

Example 2 Machine Code: 1000 1011 1100 00112 or 8B C316 Instruction Template
 MOV AX, BX: given the opcode for MOV=100010  The Intel literature shows two different formats for coding
8086 instructions.
BYTE 1 BYTE 2
 Instruction templates helps you to code the instruction
1 0 0 0 1 0 1 1 1 1 0 0 0 0 1 1
properly.
OPCODE D W MOD REG R/M

 Example:
IN AL, 05H

CSE – 341: Microprocessors CSE – 341: Microprocessors


BRAC University BRAC University

QUIZ Example
Compute the machine code for the following using the table below
and the opcode for MOV as100010

a) MOV AX, 5E9Ch b) MOV DH, [BP+SI+7Dh]

CSE – 341: Microprocessors CSE – 341: Microprocessors


BRAC University BRAC University
7/9/2021

Example QUIZ
 MOV 43H [SI], DH: Copy a byte from DH register to Compute the machine code for the following using the table below
memory location. and the opcode for MOV as100010

a) MOV AX, 5E9Ch b) MOV DH, [BP+SI+7Dh]

CSE – 341: Microprocessors CSE – 341: Microprocessors


BRAC University BRAC University

Example 3
 MOV CX, [437AH]: Copy the contents of the two memory
locations to the register CX.

CSE – 341: Microprocessors


BRAC University

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