5 4 3 2 1

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D D

Iris 14"/15" Schematics

C C

Braswell - M
2015-06-05
REV : A00
B B

DY : None Installed
DEBUG XDP: For CPU XDP Debug Port installed
Share/nonS: Share ROM or Non Share ROM

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A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Cover Page
Size Document Number Rev
A3
Iris BSW A00
Date: Thursday, June 04, 2015 Sheet 1 of 109
5 4 3 2 1
 5 4 3 2 1

CHARGER
Project code: BQ24727RGRR-1-GP 44
INPUTS OUTPUTS
4PD03V010001 AD+
PCB P/N: 896X3 A00_0528 DCBATOUT

PCB Number:14279
Revision:A00
Iris Braswell-M Block Diagram BT+
SYSTEM DC/DC
RT6576DGQW-GP
INPUTS OUTPUTS
45

A00_0527 Vinafix.com 3D3V_AUX_S5

5V_AUX_S5
D DCBATOUT 5V_S5
D

3D3V_S5

CPU Core Power

RT8171BGQW-GP 46,47
33

VGA Conn. VGA DP/VGA Converter INPUTS OUTPUTS

DDR3L
Reserve for Vostro 57 REALTEK RTD2168-CGT 58 1600 DCBATOUT VCC_CORE
DDR3L 1600MHz Channel A GFX Core Power
Co-lay SODIMM A RT8171BGQW-GP 33
48
12 INPUTS OUTPUTS
HDMI V1.4a HDMI
57
Intel CPU DCBATOUT GFX_CORE
DDR3L SUS
Braswell-M Left side TPS51716RUKR-GP 51
14"/15" LCD eDP USB2.0 x 1
BGA1170 INPUTS OUTPUTS
55 USB port 0
Package USB1(USB3.0) DCBATOUT
1D35V_S3
0D675V_S0
25*27*1.4
USB3.0 x 1 CPU 1.05V
Touch Panel USB2.0 x 1 34
SY8206DQNC-GP-U 50
55 USB port 2 INPUTS OUTPUTS
DCBATOUT 1D05V_S0
C
CPU 1.15V C

SYW232DFC-GP 50

Camera USB2.0 x 1 PCIE x 1 INPUTS OUTPUTS

55 USB port 3 PCIE port 0 WLAN(NGFF) 3D3V_S5 1D15V_S5
System LDO 1.8V
802.11 b/g/n SYW232DFC-GP 52
USB2.0 x 1
Digital MIC 61 INPUTS OUTPUTS
55 3D3V_S5 1D8V_S5
Right side System LDO 1.5V
USB 2.0 HUB S-1339D15-M5001-GP 53
USB2.0 x 1 USB2.0 x 1 USB2 (USB2.0) INPUTS OUTPUTS
USB port 1 2.0 ports(4) 34 3D3V_S5 1D5V_S0

Right side System LDO 1.24V

APL5930KAI 54
MIC_IN/GND
HDA USB2.0 x 1 I/O Board INPUTS OUTPUTS
CODEC USB 3.0 (4)/2.0 ports (5) USB3 (USB2.0) A00_0528
HDA PCB No:14856 1D8V_S5 1D24V_S5
ETHERNET (10/100/1000Mb) GENESYS 34
HP_R/L 66
Realtek High Definition Audio GL850G-OHY31 System switchs
Universal Jack ALC3234 INPUTS OUTPUTS
27 SATA ports (2)
I/O Board 66
PCIe ports (4) CardReader 5V_S5 5V_S0
USB2.0 x 1 SD Card Slot 3D3V_S5 3D3V_S0
B
2CH SPEAKER LPC I/F RealTek B
34
(2CH 2W/4ohm) RTS5170 33 32 1D8V_S5 1D8V_S0
3D3V_S5 3D3V_S5_PRIME

29 eMMC BUS eMMC PCB LAYER

63 L1:Top
L2:VCC
L3:Signal
L4:Signal
LPC BUS SATA(Gen3) x 1 L5:GND
LPC debug port HDD L6:Bottom
X02_0205 68 SATA port 0 60
X02_0205
Reserve
Thermal ODD
SMBUS SATA(Gen2) x 1
NUVOTON
NCT7718W 26
KBC SATA port 1 Reserve
CLK&CS 60

NUVOTON SPI

Fan Control NPCE985PB1 CLK&CS

24 MUX Flash ROM
ANPEC CLK&CS
A APL5606AKI 26 25 A
8MB 25
Wistron Confidential document, Anyone can not
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SPI PS2 A00_0601 application without get Wistron permission
A00_0528
SPI
FAN Wistron Corporation
26 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Reserve Touch PAD Taipei Hsien 221, Taiwan, R.O.C.
Int. KB I2C
SPI ROM 25 Image sensor 65 Title
65
PM25LD010C Block Diagram
Size Document Number Rev
128KB Custom
A00
Iris BSW
Monday, June 01, 2015
Date: Sheet 2 of 109
5 4 3 2 1
 5 4 3 2 1

SSID = CPU

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<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

(Reserved)
Size Document Number Rev
A4 A00
Iris BSW
Date: Thursday, May 28, 2015 Sheet 3 of 109
5 4 3 2 1
 5 4 3 2 1

SSID = CPU

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<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

(Reserved)
Size Document Number Rev
A4 A00
Iris BSW
Date: Thursday, May 28, 2015 Sheet 4 of 109
5 4 3 2 1
 5 4 3 2 1

SSID = CPU

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CPU1A 1 OF 13
CPU1B 2 OF 13
[12] M_A_A[15:0] M_A_A15 BD49 BRASWELL
M_A_A14 DDR3_M0_MA_15 DDR1
BD47 BG33 M_A_DQ63 [12] BD5
M_A_A13 DDR3_M0_MA_14 DDR3_M0_DQ_63 DDR3_M1_MA_15 BRASWELL
BF44 DDR0 BH28 M_A_DQ62 [12] BD7 BG21
M_A_A12 DDR3_M0_MA_13 DDR3_M0_DQ_62 DDR3_M1_MA_14 DDR3_M1_DQ_63
BF48 BJ29 M_A_DQ61 [12] BF10 BH26
M_A_A11 DDR3_M0_MA_12 DDR3_M0_DQ_61 DDR3_M1_MA_13 DDR3_M1_DQ_62
BB49 BG28 M_A_DQ60 [12] BF6 BJ25
M_A_A10 DDR3_M0_MA_11 DDR3_M0_DQ_60 DDR3_M1_MA_12 DDR3_M1_DQ_61
BJ45 BG32 M_A_DQ59 [12] BB5 BG26
M_A_A9 DDR3_M0_MA_10 DDR3_M0_DQ_59 DDR3_M1_MA_11 DDR3_M1_DQ_60
BE52 BH34 M_A_DQ58 [12] BJ9 BG22
M_A_A8 DDR3_M0_MA_9 DDR3_M0_DQ_58 DDR3_M1_MA_10 DDR3_M1_DQ_59
BD44 BG29 M_A_DQ57 [12] BE2 BH20
M_A_A7 DDR3_M0_MA_8 DDR3_M0_DQ_57 DDR3_M1_MA_9 DDR3_M1_DQ_58
BE46 BJ33 M_A_DQ56 [12] BD10 BG25
M_A_A6 DDR3_M0_MA_7 DDR3_M0_DQ_56 DDR3_M1_MA_8 DDR3_M1_DQ_57
BB46 BE8 BJ21
M_A_A5 DDR3_M0_MA_6 DDR3_M1_MA_7 DDR3_M1_DQ_56
BH48 BD28 M_A_DQ55 [12] BB8
M_A_A4 DDR3_M0_MA_5 DDR3_M0_DQ_55 DDR3_M1_MA_6
BD42 BF30 M_A_DQ54 [12] BH6 BD26
M_A_A3 DDR3_M0_MA_4 DDR3_M0_DQ_54 DDR3_M1_MA_5 DDR3_M1_DQ_55
BH47 BA34 M_A_DQ53 [12] BD12 BF24
M_A_A2 DDR3_M0_MA_3 DDR3_M0_DQ_53 DDR3_M1_MA_4 DDR3_M1_DQ_54
BJ48 BD34 M_A_DQ52 [12] BH7 BA20
M_A_A1 DDR3_M0_MA_2 DDR3_M0_DQ_52 DDR3_M1_MA_3 DDR3_M1_DQ_53
BC42 BD30 M_A_DQ51 [12] BJ6 BD20
M_A_A0 DDR3_M0_MA_1 DDR3_M0_DQ_51 DDR3_M1_MA_2 DDR3_M1_DQ_52
BB47 BA32 M_A_DQ50 [12] BC12 BD24
DDR3_M0_MA_0 DDR3_M0_DQ_50 DDR3_M1_MA_1 DDR3_M1_DQ_51
BC34 M_A_DQ49 [12] BB7 BA22
DDR3_M0_DQ_49 DDR3_M1_MA_0 DDR3_M1_DQ_50
BF52 BF34 M_A_DQ48 [12] BC20
[12] M_A_BS2 DDR3_M0_BS_2 DDR3_M0_DQ_48 DDR3_M1_DQ_49
AY40 BF2 BF20
[12] M_A_BS1 DDR3_M0_BS_1 DDR3_M1_BS_2 DDR3_M1_DQ_48
BH46 AV32 M_A_DQ47 [12] AY14
[12] M_A_BS0 DDR3_M0_BS_0 DDR3_M0_DQ_47 DDR3_M1_BS_1
AV34 M_A_DQ46 [12] BH8 AV22
DDR3_M0_DQ_46 DDR3_M1_BS_0 DDR3_M1_DQ_47
[12] M_A_CAS# BG45 BD36 M_A_DQ45 [12] AV20
DDR3_M0_CAS# DDR3_M0_DQ_45 DDR3_M1_DQ_46
[12] M_A_RAS# BA40 BF36 M_A_DQ44 [12] BG9 BD18
DDR3_M0_RAS# DDR3_M0_DQ_44 DDR3_M1_CAS# DDR3_M1_DQ_45
[12] M_A_WE# BH44 AU32 M_A_DQ43 [12] BA14 BF18
DDR3_M0_WE# DDR3_M0_DQ_43 DDR3_M1_RAS# DDR3_M1_DQ_44
[12] M_A_CS#1 AU38 AU34 M_A_DQ42 [12] BH10 AU22
DDR3_M0_CS1# DDR3_M0_DQ_42 DDR3_M1_WE# DDR3_M1_DQ_43
[12] M_A_CS#0 AY38 BA36 M_A_DQ41 [12] AU16 AU20
DDR3_M0_CS0# DDR3_M0_DQ_41 DDR3_M1_CS1# DDR3_M1_DQ_42
BC36 M_A_DQ40 [12] AY16 BA18
DDR3_M0_DQ_40 DDR3_M1_CS0# DDR3_M1_DQ_41
[12] M_A_CLK1 BD38 BC18
DDR3_M0_CK_1 DDR3_M1_DQ_40
[12] M_A_CLK#1 BF38 BH38 M_A_DQ39 [12] BD16
DDR3_M0_CK_1# DDR3_M0_DQ_39 DDR3_M1_CK_1
[12] M_A_CKE1 AY42 BH36 M_A_DQ38 [12] BF16 BH16
DDR3_M0_CKE_1 DDR3_M0_DQ_38 DDR3_M1_CK_1# DDR3_M1_DQ_39
BJ41 M_A_DQ37 [12] AY12 BH18
DDR3_M0_DQ_37 DDR3_M1_CKE_1 DDR3_M1_DQ_38
[12] M_A_CLK0 BD40 BH42 M_A_DQ36 [12] BJ13
DDR3_M0_CK_0 DDR3_M0_DQ_36 DDR3_M1_DQ_37
[12] M_A_CLK#0 BF40 BJ37 M_A_DQ35 [12] BD14 BH12
DDR3_M0_CK_0# DDR3_M0_DQ_35 DDR3_M1_CK_0 DDR3_M1_DQ_36
[12] M_A_CKE0 BB44 BG37 M_A_DQ34 [12] BF14 BJ17
DDR3_M0_CKE_0 DDR3_M0_DQ_34 DDR3_M1_CK_0# DDR3_M1_DQ_35
BG43 M_A_DQ33 [12] BB10 BG17
9/1 Remove DDR3_M0_DQ_33 DDR3_M1_CKE_0 DDR3_M1_DQ_34
AT30 BG42 M_A_DQ32 [12] BG11
RSVD#AT30 DDR3_M0_DQ_32 9/1 Remove DDR3_M1_DQ_33
AU30 AT24 BG12
RSVD#AU30 RSVD#AT24 DDR3_M1_DQ_32
C BB51 M_A_DQ31 [12] AU24 C
DDR3_M0_DQ_31 RSVD#AU24
[12] M_A_DIM0_ODT0 AV36 AW53 M_A_DQ30 [12] BB3
DDR3_M0_ODT_0 DDR3_M0_DQ_30 DDR3_M1_DQ_31
[12] M_A_DIM0_ODT1 BA38 BC52 M_A_DQ29 [12] AV18 AW1
DDR3_M0_ODT_1 DDR3_M0_DQ_29 DDR3_M1_ODT_0 DDR3_M1_DQ_30
AW51 M_A_DQ28 [12] BA16 BC2
V_SM_VREF_CNT DDR3_M0_DQ_28 DDR3_M1_ODT_1 DDR3_M1_DQ_29
AT28 AV51 M_A_DQ27 [12] AW3
M_VREF_DQ_DIM0 DDR3_M0_OCAVREF DDR3_M0_DQ_27 DDR3_M1_DQ_28
AU28 BC53 M_A_DQ26 [12] AT26 AV3
DDR3_M0_ODQVREF DDR3_M0_DQ_26 DDR3_M1_OCAVREF DDR3_M1_DQ_27
AV52 M_A_DQ25 [12] AU26 BC1
DDR3_M0_DQ_25 DDR3_M1_ODQVREF DDR3_M1_DQ_26
[12] SM_DRAMRST# BA42 BD52 M_A_DQ24 [12] AV2
DDR3_M0_DRAMRST# DDR3_M0_DQ_24 DDR3_M1_DQ_25
AV28 BA12 BD2
[40] DDR3_DRAM_PWROK DDR3_DRAM_PWROK DDR3_M1_DRAMRST# DDR3_M1_DQ_24
AV42 M_A_DQ23 [12] AV26
close CPU SM_RCOMP_0 DDR3_M0_DQ_23 [40] DDR3_VCCA_PWRGD DDR3_VCCA_PWROK
BA28 AP41 M_A_DQ22 [12] AV12
DDR3_M0_RCOMPPD DDR3_M0_DQ_22 DRAM_RCOMP_1 DDR3_M1_DQ_23
AV41 M_A_DQ21 [12] BA26 AP13
SM_RCOMP_0 DDR3_M0_DQ_21 DDR3_M1_RCOMPPD DDR3_M1_DQ_22
[12] M_A_DM7 BH30 AT44 M_A_DQ20 [12] AV13

1
DDR3_M0_DM_7 DDR3_M0_DQ_20 DDR3_M1_DQ_21
[12] M_A_DM6 BD32 AP40 M_A_DQ19 [12] BH24 AT10
1

DDR3_M0_DM_6 DDR3_M0_DQ_19 R508 DDR3_M1_DM_7 DDR3_M1_DQ_20

[12] M_A_DM5 AY36 AT38 M_A_DQ18 [12] BD22 AP14
R504 DDR3_M0_DM_5 DDR3_M0_DQ_18 182R2F-GP DDR3_M1_DM_6 DDR3_M1_DQ_19
[12] M_A_DM4 BG41 AP42 M_A_DQ17 [12] AY18 AT16
182R2F-GP DDR3_M0_DM_4 DDR3_M0_DQ_17 DDR3_M1_DM_5 DDR3_M1_DQ_18
[12] M_A_DM3 BA53 AT40 M_A_DQ16 [12] BG13 AP12
DDR3_M0_DM_3 DDR3_M0_DQ_16 DDR3_M1_DM_4 DDR3_M1_DQ_17
[12] M_A_DM2 AP44 BA1 AT14

2
DDR3_M0_DM_2 DDR3_M1_DM_3 DDR3_M1_DQ_16
[12] M_A_DM1 AT48 AV45 M_A_DQ15 [12] AP10
2

DDR3_M0_DM_1 DDR3_M0_DQ_15 DDR3_M1_DM_2

[12] M_A_DM0 AP52 AY50 M_A_DQ14 [12] AT6 AV9
DDR3_M0_DM_0 DDR3_M0_DQ_14 DDR3_M1_DM_1 DDR3_M1_DQ_15
AT50 M_A_DQ13 [12] AP2 AY4
DDR3_M0_DQ_13 DDR3_M1_DM_0 DDR3_M1_DQ_14
[12] M_A_DQS_DP7 BH32 AP47 M_A_DQ12 [12] AT4
DDR3_M0_DQS_7 DDR3_M0_DQ_12 DDR3_M1_DQ_13
[12] M_A_DQS_DN7 BG31 AV50 M_A_DQ11 [12] BH22 AP7
DDR3_M0_DQSB_7 DDR3_M0_DQ_11 DDR3_M1_DQS_7 DDR3_M1_DQ_12
[12] M_A_DQS_DP6 BC30 AY48 M_A_DQ10 [12] BG23 AV4
DDR3_M0_DQS_6 DDR3_M0_DQ_10 DDR3_M1_DQSB_7 DDR3_M1_DQ_11
[12] M_A_DQS_DN6 BC32 AT47 M_A_DQ9 [12] BC24 AY6
DDR3_M0_DQSB_6 DDR3_M0_DQ_9 DDR3_M1_DQS_6 DDR3_M1_DQ_10
[12] M_A_DQS_DP5 AT32 AP48 M_A_DQ8 [12] BC22 AT7
DDR3_M0_DQS_5 DDR3_M0_DQ_8 DDR3_M1_DQSB_6 DDR3_M1_DQ_9
[12] M_A_DQS_DN5 AT34 AT22 AP6
DDR3_M0_DQSB_5 DDR3_M1_DQS_5 DDR3_M1_DQ_8
[12] M_A_DQS_DP4 BH40 AP51 M_A_DQ7 [12] AT20
DDR3_M0_DQS_4 DDR3_M0_DQ_7 DDR3_M1_DQSB_5
[12] M_A_DQS_DN4 BG39 AR53 M_A_DQ6 [12] BH14 AP3
DDR3_M0_DQSB_4 DDR3_M0_DQ_6 DDR3_M1_DQS_4 DDR3_M1_DQ_7
[12] M_A_DQS_DP3 AY52 AK52 M_A_DQ5 [12] BG15 AR1
DDR3_M0_DQS_3 DDR3_M0_DQ_5 DDR3_M1_DQSB_4 DDR3_M1_DQ_6
[12] M_A_DQS_DN3 BA51 AL53 M_A_DQ4 [12] AY2 AK2
DDR3_M0_DQSB_3 DDR3_M0_DQ_4 DDR3_M1_DQS_3 DDR3_M1_DQ_5
[12] M_A_DQS_DP2 AT42 AR51 M_A_DQ3 [12] BA3 AL1
DDR3_M0_DQS_2 DDR3_M0_DQ_3 DDR3_M1_DQSB_3 DDR3_M1_DQ_4
[12] M_A_DQS_DN2 AT41 AT52 M_A_DQ2 [12] AT12 AR3
DDR3_M0_DQSB_2 DDR3_M0_DQ_2 DDR3_M1_DQS_2 DDR3_M1_DQ_3
[12] M_A_DQS_DP1 AV47 AL51 M_A_DQ1 [12] AT13 AT2
DDR3_M0_DQS_1 DDR3_M0_DQ_1 DDR3_M1_DQSB_2 DDR3_M1_DQ_2
[12] M_A_DQS_DN1 AV48 AK51 M_A_DQ0 [12] AV7 AL3
DDR3_M0_DQSB_1 DDR3_M0_DQ_0 DDR3_M1_DQS_1 DDR3_M1_DQ_1
[12] M_A_DQS_DP0 AM52 AV6 AK3
DDR3_M0_DQS_0 DDR3_M1_DQSB_1 DDR3_M1_DQ_0
[12] M_A_DQS_DN0 AM51 AM2
DDR3_M0_DQSB_0 DDR3_M1_DQS_0
AM3
BRASWELL-GP DDR3_M1_DQSB_0
071.BRASW.000U
BRASWELL-GP
B reserve for verification B
reserve for verification

DDR_VREF_S3 1D35V_S3 DDR_VREF_S3 1D35V_S3

1

R510
0R2J-2-GPDYR501
4K7R2F-GP DY 0R2J-2-GPDY R503
4K7R2F-GP
DY R509
R506
2

DRAM_OCAVREF_R 2 1 V_SM_VREF_CNT DRAM_ODQVREF_R 2 R507

1 M_VREF_DQ_DIM0
DY DY 0R2J-2-GP
0R2J-2-GP
1

1
1

DYR502
4K7R2F-GP C501 DY R505
4K7R2F-GP DY C502
DY SCD1U16V2KX-3GP SCD1U16V2KX-3GP
2

2
2

NOTE: NOTE:
PLACE 0.1U CAP CLOSE TO CPU PLACE 0.1U CAP CLOSE TO CPU SM_DRAMRST# DY 1 2 EC502
SCD1U25V2KX-GP

DDR3_DRAM_PWROK DY 1 2 EC503
SCD1U25V2KX-GP

PLACE TWO 4.7K RESISTORS CLOSE TO CPU TO PLACE TWO 4.7K RESISTORS CLOSE TO CPU TO
CPU PINS ON M_VREF ROUTE THE VREF POWER CPU PINS ON M_VREF ROUTE THE VREF POWER DDR3_VCCA_PWRGD DY 1 2 EC504
SCD1U25V2KX-GP
SIGNALS WITH THICK TRACES SIGNALS WITH THICK TRACES

A A

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (DDR)
Size Document Number Rev
A2
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 5 of 109
5 4 3 2 1
 5 4 3 2 1

SSID = CPU

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Wistron Confidential document, Anyone can not

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application without get Wistron permission
<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CPU (CFG)
Size Document Number Rev
A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 6 of 109
5 4 3 2 1
 5 4 3 2 1

SSID = CPU
X04_0513
Vinafix.com CPU1H 8 OF 13 +VCCSOCVID_1P05 1D05V_S5
Imax=6.4A (merged VCC0+VCC1)
D BRASWELL R702 D
1V_CPU_CORE AA18 1 2
UNCORE_VNN_S41
AF36 CORE_VCC1_S0IX3 UNCORE_VNN_S42 AA19
AG33 AA21 0R0805-PAD-2-GP-U
CORE_VCC1_S0IX7 UNCORE_VNN_S43
AG35 CORE_VCC1_S0IX8 UNCORE_VNN_S44 AA22
AG36 CORE_VCC1_S0IX9 UNCORE_VNN_S45 AA24
AG38 AA25 Imax=1.9A (1D05V_S5)
CORE_VCC1_S0IX10 UNCORE_VNN_S46
AJ33 CORE_VCC1_S0IX14 UNCORE_VNN_S47 AC18
AJ36 CORE_VCC1_S0IX15 UNCORE_VNN_S48 AC19
AJ38 CORE_VCC1_S0IX16 UNCORE_VNN_S49 AC21
1V_CPU_CORE AC22
UNCORE_VNN_S410
AF30 CORE_VCC1_S0IX2 UNCORE_VNN_S411 AC24
AG27 CORE_VCC1_S0IX4 UNCORE_VNN_S412 AC25
AG29 CORE_VCC1_S0IX5 UNCORE_VNN_S413 AD25
AG30 CORE_VCC1_S0IX6 UNCORE_VNN_S414 AD27
AJ27 CORE_VCC1_S0IX11
AJ29 CORE_VCC1_S0IX12 RSVD#AA30 AA30 10/9 modified
AJ30 V33 1D05V_S5
CORE_VCC1_S0IX13 UNCORE_V1P15_S0IX6 +VCCSRAMSOCIUN_1P05
AF29 CORE_VCC1_S0IX1 UNCORE_V1P15_S0IX1 AA32
UNCORE_V1P15_S0IX2 AA33
C GFX_CORE AA35 R704 1 2 0R6J-3-GP C
Imax=11A UNCORE_V1P15_S0IX3
AD16 DDI_VGG_S0IX1 UNCORE_V1P15_S0IX4 AA36
AD18 DDI_VGG_S0IX2 UNCORE_V1P15_S0IX5 AC32
AD19 DDI_VGG_S0IX3 UNCORE_V1P15_S0IX7 Y30
AF16 Y32 1D05V_S5
DDI_VGG_S0IX4 UNCORE_V1P15_S0IX8
AF18 DDI_VGG_S0IX5 UNCORE_V1P15_S0IX9 Y33
AF19 DDI_VGG_S0IX6 UNCORE_V1P15_S0IX10 Y35
AF21 DDI_VGG_S0IX7
AF22 V19 1D05V_S5

iCLK
DDI_VGG_S0IX8 ICLK_GND_OFF2
AJ19 DDI_VGG_S0IX15 ICLK_GND_OFF1 V18
AG16 DDI_VGG_S0IX9
AG18 DDI_VGG_S0IX10 DDR_V1P05A_G31 AM21
AG19 DDI_VGG_S0IX11 DDR_V1P05A_G34 AM33
AG21 DDI_VGG_S0IX12 DDR_V1P05A_G32 AM22
AG22 DDI_VGG_S0IX13 DDR_V1P05A_G35 AN22
AG24 AN32

DDR
DDI_VGG_S0IX14 DDR_V1P05A_G36 1D05V_S5
X04_0513 AJ21
AJ22
DDI_VGG_S0IX16
DDI_VGG_S0IX17
DDR_V1P05A_G33 AM32

AJ24 DDI_VGG_S0IX18 PCIE_V1P05A_G31#V22 V22

1D15V_S5 +VCCRAM0CPU0SI1_1P15 AK24 V24
DDI_VGG_S0IX19 PCIE_V1P05A_G32
B B

SATA PCIe
1 R706 2 AK30 CORE_V1P15_S0IX1
Imax=0.7A (1D15V_S5) AK35
0R0805-PAD-2-GP-U CORE_V1P15_S0IX2 U24
AK36 SATA_V1P05A_G32
CORE_V1P15_S0IX3 U22
1D15V_S5 AM29 SATA_V1P05A_G31
+VCCFHVCPU0SI0_1P15 CORE_V1P15_S0IX4
1D05V_S5

1D15V_S5 1 R708 2 0R0603-PAD X04_0513AK33 FUSE_V1P15_S0IX2

USB3_V1P05A_G32
USB3_V1P05A_G31
V27
U27 1D05V_S5
AJ35 V29
USB

+VCCSRAMGEN_1P15 FUSE_V1P15_S0IX1 USBSSIC_V1P05A_G3 1D05V_S5

1 R709 2 0R0603-PAD AM19 DDI_V1P15_S0IX2 FUSE3_V1P05A_G5 N18
AK21 DDI_V1P15_S0IX1 FUSE_V1P05A_G3 U19
FUSE

X01
BRASWELL-GP
X04_0513 <Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (VCC_CORE)
Size Document Number Rev
A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 7 of 109
5 4 3 2 1
 5 4 3 2 1

SSID = CPU

Vinafix.com
CPU1C 3 OF 13
D D

BRASWELL

M44
RSVD#M44
K44
RSVD#K44
K48
HDMI [57,58] HDMI_CRT_P0 D50
DDI0_TXP_0
RSVD#K48
RSVD#K47
K47
C51 1.0V
[57,58] HDMI_CRT_N0 DDI0_TXN_0
T44
MCSI_1_CLKP
[57,58] HDMI_CRT_P1 H49 T45
DDI0_TXP_1 MCSI_1_CLKN
1D8V_S5 [57,58] HDMI_CRT_N1 H50
DDI0_TXN_1
Y47
HDMI F53
DDI0 MCSI_1_DP_0
Y48

MCSI and Camera interface

[57] HDMI_DATA0 DDI0_TXP_2 MCSI_1_DN_0
[57] HDMI_DATA0# F52 V45
DDI0_TXN_2 MCSI_1_DP_1
V47
MCSI_1_DN_1
[57] HDMI_CLK G53 V50
DDI0_TXP_3 MCSI_1_DP_2

3
4
[57] HDMI_CLK# G52 V48
DDI0_TXN_3 MCSI_1_DN_2
RN803 T41
MCSI_1_DP_3
[58] HDMI_AUXP_CPU H47 T42
SRN2K2J-1-GP DDI0_AUXP MCSI_1_DN_3
CRB 2.2k [58] HDMI_AUXN_CPU H46
DDI0_AUXN
P50
MCSI_2_CLKP
[57,58] HDMI_CRT_DET W51 P48
HV_DDI0_HPD MCSI_2_CLKN

2
1
[57] HDMI_CLK_CPU Y51 P47
HV_DDI0_DDC_SCL 1.8V MCSI_2_DP_0
[57] HDMI_DATA_CPU Y52 P45
HV_DDI0_DDC_SDA MCSI_2_DN_0
M48
MCSI_2_DP_1
V52 M47
R802 PANEL0_BKLTEN MCSI_2_DN_1
V51
402R2F-GP PANEL0_BKLTCTL
W53 T50
DDI0_PLLOBS_P PANEL0_VDDEN RSVD#T50
1 2 F38 T48
DDI0_PLLOBS_N DDI0_PLLOBS_P RSVD#T48
G38 R817
DDI0_PLLOBS_N MCSI_COMP
P44 1 2
MCSI_COMP
[55] DP_TXP0_CPU J51 150R2F-1-GP
DDI1_TXP_0 GP_CAMERASB00 TP808 TPAD14-OP-GP
[55] DP_TXN0_CPU H51 AB41 1
DDI1_TXN_0 1.0V GP_CAMERASB00 GP_CAMERASB01 TP809 TPAD14-OP-GP
AB45 1
GP_CAMERASB01 GP_CAMERASB02 TP810 TPAD14-OP-GP
[55] DP_TXP1_CPU K51 AB44 1
DDI1_TXP_1 GP_CAMERASB02 GP_CAMERASB03 TP811 TPAD14-OP-GP
[55] DP_TXN1_CPU K52 AC53 1
DDI1_TXN_1 GP_CAMERASB03 GP_CAMERASB04 TP812 TPAD14-OP-GP
DDI1 AB51 1
GP_CAMERASB04 GP_CAMERASB05 TP813 TPAD14-OP-GP
C L53 AB52 1 C
DDI1_TXP_2 GP_CAMERASB05 GP_CAMERASB06 TP814 TPAD14-OP-GP
L51 AA51 1
DDI1_TXN_2 GP_CAMERASB06 GP_CAMERASB07 TP815 TPAD14-OP-GP
M52
DDI1_TXP_3
GP_CAMERASB07
GP_CAMERASB08
AB40
Y44
1
GP_CAMERASB08 [15]
To XDP
M51
DDI1_TXN_3
Y42 GP_CAMERASB09 [15]
GP_CAMERASB09
M42 Y41
EDP [55] DP_AUXP_CPU
[55] DP_AUXN_CPU K42
DDI1_AUXP
DDI1_AUXN
GP_CAMERASB10
GP_CAMERASB11
V40 GP_CAMERASB11 [15]
9/30 reserved
1D8V_S5 R51
[55] DP_HPD HV_DDI1_HPD 1.8V
L_BKLT_EN_CPU P51 M7
[24] L_BKLT_EN_CPU PANEL1_BKLTEN SDMMC1_CLK EMMC_CLK [63]
R803 1 DY 2 100KR2J-1-GP L_BKLT_EN_CPU P52
[55] L_BKLT_CTRL_CPU PANEL1_BKLTCTL
LVDS_VDD_EN_CPU R53 P6
[24,55] LVDS_VDD_EN_CPU PANEL1_VDDEN SDMMC1_CMD EMMC_CMD [63]
R804 1 DY 2100KR2J-1-GP L_BKLT_CTRL_CPU 1 2 DDI1_PLLOBS_P F47
DDI1_PLLOBS_N DDI1_PLLOBS_P
F49 M6 EMMC_DATA_0 [63]
DDI1_PLLOBS_N SDMMC1_D0
M4 EMMC_DATA_1 [63]
R801 1D8V_S5 SDMMC1_D1
F40 P9 EMMC_DATA_2 [63]
402R2F-GP DDI2_TXP_0 SDMMC1_D2
G40 SDMMC1 P7 EMMC_DATA_3 [63]
DDI2_TXN_0 SDMMC1_D3_CD# 1D8V_S5
T6 EMMC_DATA_4 [63]
MMC1_D4_SD_WE
R813 J40 T7 EMMC_DATA_5 [63]
DDI2_TXP_1 DDI2 MMC1_D5
K40 T10 EMMC_DATA_6 [63]
L_BKLT_EN_CPU DDI2_TXN_1 MMC1_D6
1 2 DDI2 do not support eDP T12 EMMC_DATA_7 [63]
MMC1_D7
F42 T13
DDI2_TXP_2 MMC1_RCLK SDMMC1_RCOMP EMMC_RCLK [63]
G42 P13 1 2
1MR2J-1-GP DDI2_TXN_2 SDMMC1_RCOMP
D44 R814 100R2F-L1-GP-U EC_SWI# 2 1
DDI2_TXP_3 10KR2J-3-GP R1617
F44 K10
DDI2_TXN_3 SDMMC2_CLK follow check list
K9
SDMMC2_CMD
D48
DDI2_AUXP 1D8V_S5
C49 M12
9/2 modified DDI2_AUXN SDMMC2_D0 EC_SWI# [24]
M10
TPAD14-OP-GP TP803 HV_DDI2_HPD SDMMC2_D1
1 U51 K7
HV_DDI2_HPD SDMMC2_D2
SDMMC2 K6
SDMMC2_D3_CD#
[16] UART1_TX T51
HV_DDI2_DDC_SCL 1.8V DBC_EN_C
[16] UART1_RX T52 F2
HV_DDI2_DDC_SDA 3.3V SDMMC3_CLK
D2
1.8V SDMMC3_CMD TP_SDMMC3_CD# 3D3V_S5 3D3V_S0 3D3V_S0
CRB:UART TO USB PORT
B53
A52
RSVD#B53
RSVD#A52 NC's
SDMMC3_CD#
K3 1
TP802 TPAD14-OP-GP X04_0506
E52 J1
RSVD#E52 SDMMC3_D0

1
D52 3.3V J3
B RSVD#D52 SDMMC3_D1 INT_TP# [65] R1605 B
B50 H3 R1604
RSVD#B50 SDMMC3_D2 10KR2J-3-GP
B49 G2 2K2R2J-2-GP
RSVD#B49 SDMMC3_D3 Q1601
E53
RSVD#E53
C53 SDMMC3 K2 G

2
RSVD#C53 1.8V SDMMC3_1P8_EN
A51 L3 R815
RSVD#A51 SDMMC3_PWR_EN# SDMMC3_RCOMP DBC_EN_C
A49 P12 1 2 D
RSVD#A49 SDMMC3_RCOMP
G44 80D6R2F-L-GP
RSVD#G44
S DBC_EN [55]
2N7002K-2-GP
84.2N702.J31
2ND = 084.27002.0A31
BRASWELL-GP
3rd = 84.07002.I31

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (DDI/EDP/GPIO)
Size Document Number Rev
A2
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 8 of 109
5 4 3 2 1
 5 4 3 2 1

SSID = CPU

Vinafix.com
D D

CPU1L 12 OF 13
CPU1K 11 OF 13 Power-VSS
CPU1J 10 OF 13 Power-VSS
Power-VSS AN33 BRASWELL Y24
BRASWELL VSS2 VSS102
AN21 VSS5 VSS61 AY9 P32 VSS99 VSS53 G30
AN3 BRASWELL AF38 BG30 AY28 P27 G28
VSS98 VSS51 VSS101 VSS52 VSS98 VSS52
AN29 VSS97 VSS50 AF32 BG27 VSS100 VSS51 AY26 P22 VSS97 VSS51 G26
AN25 VSS96 VSS49 AF25 BG24 VSS99 VSS50 AY24 P19 VSS96 VSS50 G22
AN24 VSS95 VSS48 AF10 BG20 VSS98 VSS49 AY22 AF24 VSS1 VSS49 G14
AN16 VSS94 VSS47 AE9 BG19 VSS97 VSS48 AY20 N53 VSS95 VSS48 G12
AN14 VSS93 VSS46 AE8 BG18 VSS96 VSS47 AW35 N51 VSS94 VSS47 F5
AN12 VSS92 VSS45 AE6 BG16 VSS95 VSS46 AW27 N32 VSS93 VSS46 F35
AN11 AE53 BG14 AW19 N24 F32 CPU1M 13 OF 13
VSS91 VSS44 VSS94 VSS45 VSS92 VSS45
AN1 VSS90 VSS43 AE50 BF42 VSS93 VSS4 AM13 N22 VSS91 VSS44 F27 2014/04/25 Power-VSS
AM50 AE48 BF32 AK29 M9 F24 Intel suggest F1 BRASWELL W1
VSS89 VSS42 VSS92 VSS3 VSS90 VSS43 VSS18 VSS57
AM42 VSS88 VSS41 AE46 BF28 VSS91 VSS2 AK22 VSS42 F19 C1 VSS17 VSS56 V44
AM4 AE45 BF27 AV40 K45 E51 TP901 1 CPU_VSS16 BH53 V42
VSS87 VSS40 VSS90 VSS44 VSS77 VSS41 TPAD14-OP-GP VSS16 VSS55
AM38 VSS86 VSS39 AE43 BF26 VSS89 VSS43 AV35 M40 VSS87 VSS39 E35 BH52 VSS15 VSS54 V41
AM35 VSS85 VSS38 AE42 BF22 VSS88 VSS42 AV30 M35 VSS86 VSS38 E19 BH2 VSS14 VSS53 V38
AH44 VSS60 VSS37 AE40 BF12 VSS87 VSS41 AV27 M27 VSS85 VSS37 D42 BH1 VSS13
AM30 AE14 BE35 AV24 AW13 D40 B52 MAY NOT BE ABLE TO BREAK OUT IN ROUTING BG53 V32
VSS84 VSS36 VSS86 VSS40 VSS3 VSS36 VSS12 VSS52
AM27 VSS83 VSS35 AE12 BE19 VSS85 VSS39 AV19 M19 VSS84 VSS35 D38 BG1 VSS10 VSS51 V21
U25 AE11 C20 AV14 M14 D32 2014.10.13 NC B52 V16
VSS100 VSS34 VSS103 VSS38 VSS83 VSS34 VSS5 VSS50
P10 VSS99 VSS33 AE1 BD53 VSS84 VSS1 AJ18 L35 VSS82 VSS33 D27 B2 VSS4 VSS49 U9
AM16 VSS81 VSS32 AD44 BG7 VSS102 VSS37 AU53 L27 VSS81 VSS32 D24 VSS48 U8
C AD4 AD36 BD35 AU51 L19 D16 1 CPU_VSS2 A6 U6 C
VSS31 VSS30 VSS83 VSS36 VSS80 VSS31 TP902 VSS2 VSS47
AK7 VSS80 VSS23 AC29 BD27 VSS82 VSS35 AU3 L1 VSS79 VSS30 D10 A5 VSS1 VSS46 U53
AK50 VSS79 VSS29 AD32 BD19 VSS81 VSS34 AU1 K50 VSS78 VSS65 J42 VSS45 U5
AK47 AD30 BD1 AT9 T47 C47 2014/04/25 TPAD14-OP-GP M24 U49
VSS78 VSS28 VSS80 VSS33 VSS100 VSS29 Intel suggest VSSA VSS44
AK45 VSS77 VSS27 AD21 BC44 VSS79 VSS32 AT51 K4 VSS76 VSS28 C39 A7 VSS3 VSS43 U48
AK44 VSS76 VSS26 AC38 BC40 VSS78 VSS31 AT45 K36 VSS75 VSS27 C36 BF50 VSS9 VSS42 U46
AK40 VSS75 VSS25 AC35 BC38 VSS77 VSS30 AT36 K34 VSS74 VSS26 C30 BF4 VSS8 VSS41 U45
AK4 VSS74 VSS24 AC33 BC28 VSS76 VSS29 AT35 K32 VSS73 VSS25 C3 BB50 VSS7 VSS40 U43
AK38 VSS73 VSS22 AC16 BC26 VSS75 VSS28 AT3 K30 VSS72 VSS24 C28 VSS39 U42
AK32 VSS72 VSS21 AB6 BC16 VSS74 VSS27 AT27 K24 VSS71 VSS23 C22 BB4 VSS6 VSS38 U40
AK27 VSS71 VSS20 AB50 BC14 VSS73 VSS26 AT19 K22 VSS70 VSS4 AW41 VSS37 U38
AK25 VSS70 VSS19 AB47 BC10 VSS72 VSS25 AT18 K16 VSS69 VSS22 BJ7 BG47 VSS11
AM24 VSS82 VSS18 AB42 BB35 VSS71 VSS24 AP9 K14 VSS68 VSS21 BJ47 Y9 VSS70 VSS35 U33
AK16 VSS69 VSS17 AB4 BB27 VSS70 VSS23 AP50 K12 VSS67 VSS20 BJ43 Y50 VSS69 VSS34 U32
AJ53 VSS68 VSS16 AB14 BB19 VSS69 VSS22 AP45 J53 VSS66 VSS19 BJ39 Y45 VSS68 VSS33 U30
AJ51 VSS67 VSS15 AB13 BA35 VSS68 VSS21 AP4 M45 VSS88 VSS18 BJ35 Y40 VSS67 VSS32 U29
AJ3 VSS66 VSS14 AB12 BA30 VSS67 VSS20 AN9 J38 VSS64 VSS17 BJ31 Y4 VSS66
AJ25 VSS65 VSS13 AB10 BA27 VSS66 VSS19 AN8 J35 VSS63 VSS16 BJ27 Y38 VSS65 VSS31 U21
AJ16 VSS64 VSS12 AA53 BA24 VSS65 VSS18 AN6 J30 VSS62 VSS15 BJ23 Y29 VSS64 VSS30 U18
AJ1 VSS63 VSS11 AA38 BA19 VSS64 VSS17 AN53 J27 VSS61 VSS14 BJ19 Y22 VSS63 VSS36 U36
AH9 VSS62 VSS10 AA27 B36 VSS63 VSS16 AN51 J22 VSS60 VSS13 BJ15 Y21 VSS62 VSS29 U14
AH47 VSS61 VSS9 AA16 B28 VSS62 VSS15 AN5 J19 VSS59 VSS12 BJ11 Y19 VSS61 VSS28 U12
AH42 VSS59 VSS8 A47 AY7 VSS60 VSS14 AN49 J18 VSS58 VSS11 BG5 Y16 VSS60 VSS27 U11
AH41 VSS58 VSS7 A43 AY51 VSS59 VSS13 AN48 H8 VSS57 VSS10 BG49 Y14 VSS59 VSS26 T9
AH14 VSS57 VSS6 A39 AY47 VSS58 VSS12 AN46 E46 VSS40 VSS9 BG40 Y10 VSS58 VSS23 P42
AH13 VSS56 VSS5 A31 AY34 VSS56 VSS11 AN45 H35 VSS56 VSS8 BG38 VSS25 T14
AH12 VSS55 VSS4 A23 AY32 VSS55 VSS10 AN43 H27 VSS55 VSS7 BG36 P4 VSS22 VSS24 R1
AH10 VSS54 VSS3 A19 AY30 VSS54 VSS9 AN42 H19 VSS54 VSS6 BG35 L41 VSS19
AG25 VSS53 VSS2 A15 AY3 VSS53 VSS8 AN40 M50 VSS89 VSS5 BG34 P36 VSS21 VSS20 P35
B B
AF47 VSS52 VSS1 A11 AN30 VSS6 VSS7 AN38 V25 VSS101
AY45 BRASWELL-GP
VSS57
BRASWELL-GP
BRASWELL-GP
BRASWELL-GP

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (VSS)
Size Document Number Rev
A3
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 9 of 109
5 4 3 2 1
 D

A00
Wistron Corporation

Rev

109
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

of
Duplicate, Modify, Forward or any other purpose
Wistron Confidential document, Anyone can not

10
application without get Wistron permission

CPU (Power CAP1)

Sheet
1

1
Iris BSW

PC1016
SC10U6D3V2MX-GP-U
Thursday, May 28, 2015

1 2
Document Number

PC1014
SC10U6D3V2MX-GP-U
1 2
<Core Design>

PC1012
SC10U6D3V2MX-GP-U
Date:

1 2
Size
Title

A3

PC1011
SC10U6D3V2MX-GP-U
1 2
PC1009
SC10U6D3V2MX-GP-U
1 2
PC1008
SC10U6D3V2MX-GP-U
2

2
1 2
SC22U6D3V3MX-1-GP
PC1007 PC1068
SC10U6D3V2MX-GP-U 1 2
1 2
SC22U6D3V3MX-1-GP
PC1010 PC1090
GFX_CORE

SC10U6D3V2MX-GP-U
DY

1 2
1 2
SC22U6D3V3MX-1-GP
PC1091
DY

1 2
SC22U6D3V3MX-1-GP
PC1088
UNDER THE PKG SHADOW

DY

1 2
PLACE ALL THE CAPS

SC22U6D3V3MX-1-GP SC22U6D3V3MX-1-GP SC22U6D3V3MX-1-GP

PC1058 PC1059 PC1089 SC22U6D3V3MX-1-GP
PC1078
DY

1 2 1 2 1 2
DY

1 2
SC22U6D3V3MX-1-GP SC22U6D3V3MX-1-GP SC22U6D3V3MX-1-GP
PC1048 PC1084 PC1066 SC22U6D3V3MX-1-GP
PC1076
DY
DY

1 2 1 2 1 2 DY
1 2
3

3
SC22U6D3V3MX-1-GP SC22U6D3V3MX-1-GP SC22U6D3V3MX-1-GP
PC1047 PC1085 PC1065 SC22U6D3V3MX-1-GP
PC1075
DY

1 2 1 2 1 2

DY
1 2
SC22U6D3V3MX-1-GP SC22U6D3V3MX-1-GP SC22U6D3V3MX-1-GP
PC1046 PC1086 PC1064 SC22U6D3V3MX-1-GP
PC1074
DY

1 2 1 2 1 2

DY
1 2
SC22U6D3V3MX-1-GP SC22U6D3V3MX-1-GP SC22U6D3V3MX-1-GP
PC1045 PC1087 PC1063 SC22U6D3V3MX-1-GP
DY PC1073
1 2 1 2 1 2

DY
1 2
X02_0205 X02_0205

SC22U6D3V3MX-1-GP SC22U6D3V3MX-1-GP SC22U6D3V3MX-1-GP

PC1044 PC1051 PC1062 SC22U6D3V3MX-1-GP
PC1015 PC1071
DY

1 2 1 2 1 2
SC10U6D3V2MX-GP-U 1 2
1 2
SC22U6D3V3MX-1-GP SC22U6D3V3MX-1-GP SC22U6D3V3MX-1-GP
PC1043 PC1050 PC1061 SC22U6D3V3MX-1-GP
PC1013 PC1072
DY

DY
1 2 1 2 1 2

DY
SC10U6D3V2MX-GP-U 1 2
1 2
SC22U6D3V3MX-1-GP SC22U6D3V3MX-1-GP SC22U6D3V3MX-1-GP
PC1041 PC1049 PC1060 SC22U6D3V3MX-1-GP
PC1006 PC1070

DY
1 2 1 2 1 2
SC10U6D3V2MX-GP-U 1 2
1 2
SC22U6D3V3MX-1-GP SC22U6D3V3MX-1-GP SC22U6D3V3MX-1-GP
Vinafix.com

PC1042 PC1057 PC1069 SC22U6D3V3MX-1-GP

PC1005 PC1079

DY
4

4
1 2 1 2 1 2

DY
SC10U6D3V2MX-GP-U 1 2
1V_CPU_CORE

1V_CPU_CORE
1 2
SC22U6D3V3MX-1-GP SC22U6D3V3MX-1-GP SC22U6D3V3MX-1-GP

GFX_CORE
PC1040 PC1056 PC1067 SC22U6D3V3MX-1-GP

GFX_CORE
PC1004 PC1077

DY
DY
1 2 1 2 1 2
SC10U6D3V2MX-GP-U 1 2
1 2
PC1003
SC10U6D3V2MX-GP-U
1 2
PLACE ALL THE CAPS

PLACE ALL THE CAPS

PC1002
SC10U6D3V2MX-GP-U
1 2

NEAR BY PKG

NEAR BY PKG
1V_CPU_CORE

PC1001
SC10U6D3V2MX-GP-U
1 2
UNDER THE PKG SHADOW
PLACE ALL THE CAPS
5

5
SSID = CPU

A
 5 4 3 2 1

SSID = CPU 1D35V_S3

Place close to CPU
+VCCSRAMSOCIUN_1P05 +VCCCLKDDR_1P24_1P35
V33, AA32, AA33, AA35, AA36, AC32, Y30, Y32, Y33, Y35

C1174
SC22U6D3V3MX-1-GP

C1175
SC22U6D3V3MX-1-GP

C1176
SC22U6D3V3MX-1-GP

C1177
SC22U6D3V3MX-1-GP
1

1
+VCCRAM0CPU0SI1_1P15

Vinafix.com

C1165
SC1U10V2KX-1GP

C1166
SC1U10V2KX-1GP

C1162
SC1U10V2KX-1GP

C1163
SC1U10V2KX-1GP

C1164
SC1U10V2KX-1GP

C1136
SC1U10V2KX-1GP

C1173
SC22U6D3V3MX-1-GP
2

2
1

1
C1119
SC1U10V2KX-1GP

C1121
SC1U10V2KX-1GP

C1122
SC1U10V2KX-1GP

C1124
SC1U10V2KX-1GP
1

1
D D

2
Close to CPU
2

2
1D24V_S5
+VCCSRAMSOCIUN_1P05
V36, Y36 X01
+VCCSRAMGEN_1P15

C1168
SC1U10V2KX-1GP

C1167
SC1U10V2KX-1GP

C1149
SC1U10V2KX-1GP
1

1
C1123
SC1U10V2KX-1GP

C1117
SC1U10V2KX-1GP

2
1

1
2

1D24V_S5 1D24V_S5 1D24V_S5 1D24V_S5

+VCCSOCVID_1P05
M41 U35, V35 Y27, Y25 P38, V30, AC30
AA18, AA19, AA21, AA22, AA24, AA25, AC18, AC19, AC21, AC22, AC24, AC25, AD25, AD27

C1146
SC1U10V2KX-1GP
1
+VCCSFRPLLDDR_1P24_1P35

C1154
SC1U10V2KX-1GP

C1152
SC1U10V2KX-1GP

C1140
SC1U10V2KX-1GP
C C

1
C1114
SC1U10V2KX-1GP

C1115
SC1U10V2KX-1GP

C1101
SC22U6D3V3MX-1-GP

Close to DDR
1

2
2

C1170
SC1U10V2KX-1GP

C1178
SC22U6D3V3MX-1-GP
1

1
X01

2
Close to CPU
X01 X01 3D3V_S5_PRIME
3D3V_S5_PRIME
D4, E3

1D05V_S5
X01

C1127
SC1U10V2KX-1GP

C1157
SCD1U16V2KX-3GP
1D05V_S5 1D05V_S5

C1139
SC1U10V2KX-1GP
1

1
AM21, AM33, AM22, AN22, AN32, AM32

1
V18, V19 N18

2
C1104
SC1U10V2KX-1GP

C1116
SC22U6D3V3MX-1-GP

C1118
SC22U6D3V3MX-1-GP
1

C1108
SC1U10V2KX-1GP

C1125
SC1U10V2KX-1GP

C1105
SC1U10V2KX-1GP
1

DY X01
2

RTC_AUX_S5
1D8V_S5 +VCCCFIOAZA_1P80 1D8V_S5
B +VCCPADCF1SI0_1P8_3P3 C5, B6 B

C1150
SC1U10V2KX-1GP

C1156
SCD1U16V2KX-3GP
1D05V_S5 1D05V_S5
C1137
SC1U10V2KX-1GP

C1142
SC1U10V2KX-1GP

C1148
SC1U10V2KX-1GP

C1126
SC1U10V2KX-1GP

C1129
SC1U10V2KX-1GP
1

1
1

1
C1151
SC1U10V2KX-1GP
V29 V22, V24, U24, U22, V27, U27

2
2

2
2
C1106
SC1U10V2KX-1GP

C1110
SC1U10V2KX-1GP
1

1
2

1D8V_S5 +VCCPADCF3SI0_1P8_3P3
C1134
SC1U10V2KX-1GP

C1144
SC1U10V2KX-1GP

C1145
SC1U10V2KX-1GP
1

1
1D05V_S5 1D05V_S5
1D05V_S5
H10, G10
2

2
Wistron Confidential document, Anyone can not
C1143
SC1U10V2KX-1GP

Duplicate, Modify, Forward or any other purpose

1

application without get Wistron permission

C1128
SC22U6D3V3MX-1-GP

C1171
SC22U6D3V3MX-1-GP

C1172
SC22U6D3V3MX-1-GP
1

A <Core Design> A
2
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (Power CAP2)

PLACE CLOSE TO PIN 1 OF RA PLACE CLOSE TO PIN 1 OF RB Size Document Number Rev
A3
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 11 of 109
5 4 3 2 1
 5 4 3 2 1

SSID = MEMORY

DM1 P30
Vinafix.com
D D
M_A_A0 98 NP1
M_A_A1 A0 NP1
97 NP2
M_A_A2 A1 NP2
M_A_A[15:0] [5] 96
M_A_A3 A2
95 110 M_A_RAS# [5]
M_A_A4 A3 RAS#
92 113 M_A_WE# [5]
M_A_A5 A4 WE#
91 115 M_A_CAS# [5]
M_A_A6 A5 CAS#
90
M_A_A7 A6
86 114 M_A_CS#0 [5]
M_A_A8 A7 CS0#
89 121 M_A_CS#1 [5]
M_A_A9 A8 CS1#
85
M_A_A10 A9
107 73 M_A_CKE0 [5]
M_A_A11 A10/AP CKE0
M_A_A12
84
A11 CKE1
74 M_A_CKE1 [5] Note:
83
M_A_A13 A12 If SA0 DIM0 = 0, SA1_DIM0 = 0
119 101 M_A_CLK0 [5]
M_A_A14 A13 CK0
80 103 M_A_CLK#0 [5] SO-DIMMA SPD Address is 0xA0
M_A_A15 A14 CK0#
78
A15
[5] M_A_BS2
79
A16/BA2 CK1
102 M_A_CLK1 [5] SO-DIMMA TS Address is 0x30
104 M_A_CLK#1 [5]
CK1#
109
[5] M_A_BS0 BA0
[5] M_A_BS1
108
BA1 DM0
11 M_A_DM0 [5] If SA0 DIM0 = 1, SA1_DIM0 = 0
28
5
DM1
46
M_A_DM1 [5] SO-DIMMA SPD Address is 0xA2 9/10 Remove R1201 [Thermal Event]
[5] M_A_DQ1 DQ0 DM2 M_A_DM2 [5]
[5] M_A_DQ4 7
DQ1 DM3
63 M_A_DM3 [5] SO-DIMMA TS Address is 0x32
[5] M_A_DQ2 15 136 M_A_DM4 [5]
DQ2 DM4
[5] M_A_DQ3 17 153 M_A_DM5 [5]
DQ3 DM5
[5] M_A_DQ0 4 170 M_A_DM6 [5]
DQ4 DM6 9/10 Remove R1208~1211
[5] M_A_DQ5 6 187 M_A_DM7 [5]
DQ5 DM7
[5] M_A_DQ6 16
DQ6
[5] M_A_DQ7 18 200 PCU_SMB_DATA [16,58,65]
DQ7 SDA
[5] M_A_DQ13 21 202 PCU_SMB_CLK [16,58,65]
DQ8 SCL
[5] M_A_DQ9 23
DQ9 TS#_DIMM0_1 TP1201 3D3V_S0
[5] M_A_DQ10 33 198 1
DQ10 EVENT# TPAD14-OP-GP
[5] M_A_DQ14 35
DQ11
[5] M_A_DQ8 22 199
DQ12 VDDSPD
[5] M_A_DQ12 24
DQ13
[5] M_A_DQ11 34 197

1
DQ14 SA0 SA0 DIM0 = 0
[5] M_A_DQ15 36 201 C1208 C1202
DQ15 SA1 SA1 DIM0 = 0
[5] M_A_DQ22 39
DQ16

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP
[5] M_A_DQ17 41 77

2
DQ17 NC#1
[5] M_A_DQ18 51 122
DQ18 NC#2 1D35V_S3
C
[5] M_A_DQ23 53 125 C
DQ19 NC#/TEST
[5] M_A_DQ19 40
DQ20
[5]
[5]
M_A_DQ16
M_A_DQ20
42
50
DQ21
DQ22
VDD1
VDD2
75
76
For Intel Recommend Close to DIMM(Braswell)
[5] M_A_DQ21 52 81
DQ23 VDD3
[5] M_A_DQ28 57 82
DQ24 VDD4
[5] M_A_DQ30 59 87
DQ25 VDD5
[5] M_A_DQ24 67 88
DQ26 VDD6 DDR_VREF_S3 1D35V_S3
[5] M_A_DQ26 69 93
DQ27 VDD7
[5] M_A_DQ27 56 94
DQ28 VDD8
[5] M_A_DQ25 58 99
DQ29 VDD9
[5] M_A_DQ31 68 100
DQ30 VDD10

1
[5] M_A_DQ29 70
DQ31 VDD11
105 DY
R1202
[5]
[5]
M_A_DQ32
M_A_DQ37
129
131
DQ32
DQ33
VDD12
VDD13
106
111
0R2J-2-GP X04_0513 4K7R2F-GP
141 112 R1213
[5] M_A_DQ34 DQ34 VDD14
[5] M_A_DQ38 143 117

2
DQ35 VDD15 R1203
[5] M_A_DQ36 130 118
DQ36 VDD16 VREF_DQ VREF_DQ_R1203
[5] M_A_DQ33 132 123 1 2
DQ37 VDD17
[5] M_A_DQ35 140 124
DQ38 VDD18 0R0402-PAD
[5] M_A_DQ39 142 Layout Note:

1
DQ39
[5] M_A_DQ40 147 2
DQ40 VSS
[5] M_A_DQ41 149 3 Place these Caps near R1204

1
DQ41 VSS 4K7R2F-GP
[5]
[5]
M_A_DQ42
M_A_DQ46
157
159
DQ42
DQ43
VSS
VSS
8
9 SO-DIMMA. To EMC C1213

SCD1U16V2KX-3GP
146 13 1D35V_S3
[5] M_A_DQ44

2
DQ44 VSS
[5]
[5]
M_A_DQ45
M_A_DQ43
148
158
DQ45
DQ46
VSS
VSS
14
19
SODIMM A DECOUPLING X02_0212
[5] M_A_DQ47 160 20
DQ47 VSS
[5] M_A_DQ48 163 25
DQ48 VSS
[5] M_A_DQ52 165 26
DQ49 VSS
[5] M_A_DQ55 175 31
DQ50 VSS
1

1
177 32 C1203 C1204 C1205 C1206 C1207 C1221 C1222 C1223 TC1201
[5] M_A_DQ51 DQ51 VSS
SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC22U6D3V3MX-1-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
SCD1U50V3KX-GP
[5] M_A_DQ53 164
DQ52 VSS
37 DY ST330U2VDM-4-GP-U
[5] M_A_DQ49 166 38 reserve for verification
2

2
DQ53 VSS 79.33719.20L
[5] M_A_DQ54 174 43
DQ54 VSS
[5] M_A_DQ50 176 44
DQ55 VSS
[5] M_A_DQ56 181 48
DQ56 VSS
[5] M_A_DQ59 183 49
DQ57 VSS
[5] M_A_DQ62 191 54
DQ58 VSS
[5] M_A_DQ60 193 55
B DQ59 VSS B
[5]
[5]
M_A_DQ58
M_A_DQ63
180
182
DQ60
DQ61
VSS
VSS
60
61
For Intel Recommend Close to DIMM(Braswell)
[5] M_A_DQ61 192 65
DQ62 VSS
[5] M_A_DQ57 194 66
DQ63 VSS
1

71 C1209 C1210 C1211 C1212 DDR_VREF_S3 1D35V_S3

VSS
SC1U10V2KX-1GP

SC1U10V2KX-1GP

[5] M_A_DQS_DN0 10
DQS0# VSS
72 DY
SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

[5] M_A_DQS_DN1 27 127

2

DQS1# VSS
[5] M_A_DQS_DN2 45 128

1
DQS2# VSS
[5] M_A_DQS_DN3 62
DQS3# VSS
133 DY R1205
[5]
[5]
M_A_DQS_DN4
M_A_DQS_DN5
135
152
DQS4#
DQS5#
VSS
VSS
134
138
0R2J-2-GP X04_0513 4K7R2F-GP
169 139 R1212
[5] M_A_DQS_DN6 DQS6# VSS
[5] M_A_DQS_DN7 186 144

2
DQS7# VSS R1207
145
VSS VREF_CA VREF_CA_R1207
[5] M_A_DQS_DP0 12 150 1 2
DQS0 VSS
[5]
[5]
M_A_DQS_DP1
M_A_DQS_DP2
29
47
DQS1 VSS
151
155
X02_0212 0R0402-PAD

1
DQS2 VSS
[5] M_A_DQS_DP3 64 156

1
DQS3 VSS R1206
[5] M_A_DQS_DP4 137 161 C1201
DQS4 VSS Place these caps 4K7R2F-GP
[5] M_A_DQS_DP5 154 162 0D675V_S0
DQS5 VSS

SCD1U16V2KX-3GP
171 167
[5] M_A_DQS_DP6 close to VTT1 and

2
DQS6 VSS
[5] M_A_DQS_DP7 188 168

2
DQS7 VSS
VSS
172 VTT2.
M_A_DIM0_ODT0 116 173
[5] M_A_DIM0_ODT0 M_A_DIM0_ODT1 ODT0 VSS
120 178
[5] M_A_DIM0_ODT1 ODT1 VSS
1

179 C1214 C1215 C1216 C1217 C1219 C1220

VREF_CA VSS
126 184
SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

VREF_DQ VREF_CA VSS

1 185
VREF_DQ VSS
2

189
VSS
30 190
[5] SM_DRAMRST# RESET# VSS
195 reserve for verification
VSS
196
VSS
0D675V_S0 203 205
VTT1 VSS
204 206
VTT2 VSS

DDR3-204P-108-GP-U
62.10017.X41

A A

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DDR3-SODIMM1
Size Document Number Rev
A2
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 12 of 109
5 4 3 2 1
 5 4 3 2 1

SSID = MEMORY

Vinafix.com
D D

C C

Blanking

B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
(Reserved)
Size Document Number Rev
A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 13 of 109
5 4 3 2 1
 5 4 3 2 1

SSID = CPU

Vinafix.com
D D

C C

Blanking
B B

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
(Reserved)
Size Document Number Rev
A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 14 of 109
5 4 3 2 1
 5 4 3 2 1

SSID = STRAP STRAP RESISTORS SHOULD BE PLACED CLOSE TO SOC

SHOULD BE PLACED OUTSIDE KOZ AREA
All the straps are sampled on the rising edge of the
PMC_RSMRST_N signal (check list)

A16 Swap Flash Descriptor DFX Boot Halt Strap ICLK, USB2, DDI SFR ICLK SFR ICLK Xtal OSC CCU SUS RO RTC OSC
Description DDI0_Detected DDI1_Detected DSI Display Detected Boot BIOS Strap BBS DFX Sus Debug Strap Supply Select Bypass POSM Select
Override Security Override & VISA Early POSM Debug Enable Bypass Bypass Bypass

GPIO GPIO_SUS0 GPIO_SUS1 GPIO_SUS2 GPIO_SUS3 GPIO_SUS4 GPIO_SUS5 GPIO_SUS6 GPIO_SUS7 SEC_GPIO_SUS8 SEC_GPIO_SUS9 SEC_GPIO_SUS10 GP_CAMERASB08 GP_CAMERASB09 GP_CAMERASB11

Stuff for production 1D8V_S5 1D8V_S5 1D8V_S5

Vinafix.com
1D8V_S5 1D8V_S5 1D8V_S5 1D8V_S5 1D8V_S5 1D8V_S5 1D8V_S5 1D8V_S5
1D8V_S5 1D8V_S5
1D8V_S5 9/9 stuff

1
1

1
R1518 DY R1506 R1527 R1529

1
DY

1
10KR2F-2-GP
R1517 R1520 R1532 R1514 DY 10KR2F-2-GP DY 10KR2F-2-GP R1535 R1537

1
R1521 10KR2F-2-GP 10KR2F-2-GP 100KR2J-1-GP 10KR2F-2-GP 10KR2F-2-GP
4K7R2F-GP DY 100KR2J-1-GP
R1531
10KR2F-2-GP R1525 DY DY 10KR2F-2-GP
4K7R2F-GP R1523 DY 10KR2F-2-GP

2
D D
Schematic SEC_GPIO_SUS10 [16]

2
2
GPIO_SUS1 [16] GPIO_SUS2 [16] GPIO_SUS3 [16] GPIO_SUS4 [16] ME_FWP_SOC [16] SOC_RUNTIME_SCI# [16,24] SOC_EXTSMI_N [16,24] GP_CAMERASB08 [8]

1 2
1

1
SEC_GPIO_SUS8 [16] SEC_GPIO_SUS9 [16] GP_CAMERASB09 [8] GP_CAMERASB11 [8]

1
GPIO_SUS0 [16] R1519 R1513 R1526

1
R1522

1
R1512 R1508 R1504 R1503
DY 4K7R2F-GP DY 10KR2F-2-GP R1515 R1524 DY 10KR2F-2-GP R1534 R1536

1
R1516
DY 10KR2F-2-GP DY 10KR2F-2-GP DY 10KR2F-2-GP DY 10KR2F-2-GP DY 10KR2F-2-GP 4K7R2F-GP DY 10KR2F-2-GP R1533
100KR2J-1-GP
100KR2J-1-GP 100KR2J-1-GP

2
DY 10KR2F-2-GP

2
2

2
2
2

Weak internal pull-up Weak internal pull-up Weak internal pull-up

Normal Operation Normal 1.35V Bypass PMC
High DDI0 Detect DDI1 Detect DSI Detect Boot from SPI Normal Operation Normal Bypass Bypass Bypass
with 1.05V

Change Boot Sus Debug enable 1.25V No bypass No bypass

Low Disable Disable Disable Boot from LPC Override Halt boot enable No bypass Fuse controller No bypass
Loader address
(A16 Override) Weak internal pull-down Weak internal pull-down

C C

B B

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU(STRAP)
Size Document Number Rev
A1
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 15 of 109
5 4 3 2 1
 5 4 3 2 1

SSID = PCH
CPU1F

BRASWELL
6 OF 13
R1611
0R2J-2-GP
Level shift
1.05V B48 USB_OTG_ID 1 DY 2
USB_OTG_ID
[34] USB30_TX_CPU_P0 B32
USB3_TXP0 1.8V USB_DP0
C42 USB_CPU_PP0 [34] USB 3.0 Port1
C32 B42 9/1 modified
[34] USB30_TX_CPU_N0 USB3_TXN0 USB_DN0 USB_CPU_PN0 [34]
F28 1D8V_S5 1D8V_S5
[34] USB30_RX_CPU_P0 USB3_RXP0
D28 C43
X01
[34] USB30_RX_CPU_N0 USB3_RXN0 USB_DP1
B44
USB_CPU_PP1
USB_CPU_PN1
[34]
[34]
USB HUB 3D3V_S5

1
USB_DN1 CPU has internall weak pull high

1
A33
USB3_TXP1 USB_CPU_PP2 TP1615 TPAD14-OP-GP R1651
C33 C41 1 R1613
USB3_TXN1 USB_DP2 USB_CPU_PN2 TP1616 TPAD14-OP-GP 2K2R2J-2-GPDY
X01 F30
USB3_RXP1 USB_DN2
A41 1 DY

1
C1601 20KR2J-L2-GP
D30
XTL_19D2M_X1_CPU USB3_RXN1 R1614
2 1 C45 USB_CPU_PP3 [55] TOUCH PANEL ME_FWP_B R1650

2
USB_DP3 0R2J-2-GP

2
Vinafix.com DY 2K2R2J-2-GP
X1601 C34 A45 USB_CPU_PN3 [55]
SC4D7P50V2BN-GP USB3_TXP2 USB_DN3 USB_VBUSSNS USB_VBUSSNS_R
B34 1 DY 2

B
USB3_TXN2
G32 B40 USB_CPU_PP4 [55] Camera

2
USB3_RXP2 USB_DP4
SPEC CL=7pF

1
4 1 J32 C40

USB3.0

USB2.0
USB_CPU_PN4 [55]
C DY
USB3_RXN2 USB_DN4 ME_FWP_SOC
R1618 E ME_UNLOCK# [24]

2
D C35 P16 Q1612 D
USB3_TXP3 USB_OC1# USB_OC#1 [36] 0R0402-PAD 9/2 modified
R1603 A35 P14 LMBT3904LT1G-GP
USB3_TXN3 USB_OC0# USB_OC#0 [36]
3 2 200KR2F-L-GP G34
USB3_RXP3 X00: C1609(0R Resis.) 84.T3904.H11
R1642 B46 RSVD_B46

2
J34
USB3_RXN3 RSVD#B46
2 DY 1 2nd = 84.T3904.K11
402R2F-GP B47 USB_VBUSSNS 10/30 Intel suggest R1638
3rd = 84.T3904.C11

1
USB3_OBSP USB_VBUSSNS
1 2 D34 A48 USB_RCOMP R1638
C1602 XTAL-19D2MHZ-21-GP USB3_OBSN F34
USB3_OBSP
USB3_OBSN
USB_RCOMP 49D9R2F-GP A00_0528 R1615
2 1 XTL_19D2M_X2_CPU M36
USB_HSIC_0_STROBE
C37 N36 1 2
RSVD#C37 USB_HSIC_0_DATA 1D8V_S5 0R0402-PAD
A37
SC4D7P50V2BN-GP RSVD#A37
082.30001.0061 F36
RSVD#F36 USB_HSIC_1_STROBE
K38
RN1607

HSIC
D36 M38
RSVD#D36 USB_HSIC_1_DATA
2ND = 82.30071.131 N38 USB_HSIC_RCOMP USB_OC#1
M34
M32
RSVD#M34 USB_HSIC_RCOMP
1
2
4
3 USB_OC#0 A00_0527

RESERVED
RSVD#M32
AD10 UART1_TXD 1 TP1608 TPAD14-OP-GP
UART1_TXD
C38 AD12 UART1_RXD 1 TP1609 TPAD14-OP-GP SRN10KJ-5-GP
RSVD#C38 UART1_RXD TP1610 TPAD14-OP-GP
B38 AD13 UART1_CTS 1
RSVD#B38 UART1_CTS#

UART
G36 AD14 UART1_RTS 1 TP1611 TPAD14-OP-GP
RSVD#G36 UART1_RTS#
J36 1D8V_S5 3D3V_S5
RSVD#J36
Y6
UART2_TXD
N34 Y7 3D3V_S0 3D3V_S0
RSVD#N34 UART2_RXD
P34 V9

1
RSVD#P34 UART2_CTS#
1.8V UART2_RTS#
V10 R1625

1
10KR2J-3-GP

G
Q1618 R1627
BRASWELL-GP G

2
4K7R2J-2-GP
SMB_CLK S D SML1_SMBCLK D Vth(max)=2.5V

2
Vth(max)=1.0V
CPU1E 5 OF 13 S
84.05067.031 PCU_SMB_CLK [12,58,65]
Q1614
84.2N702.J31
BRASWELL 2N7002K-2-GP 2ND = 084.27002.0A31
XTL_19D2M_X1_CPU P24 DMN5L06K-7-GP 3rd = 84.07002.I31
XTL_19D2M_X2_CPU OSCIN
M22 C11
OSCOUT RSVD#C11 1D8V_S5
B10
1D8V_S5 RSVD#B10
J26 F12
RSVD#J26 RSVD#F12
N26 F10 1D8V_S5 3D3V_S5
R1601 1 ICLKICOMP RSVD#N26 RSVD#F10
2 2K49R2F-GP P20
ICLKICOMP
1 DY 2 PCU_SMB_ALERT# 1 2 ICLKRCOMP N20 iCLK RESERVED D12 SMB_DATA 4 1 3D3V_S0 3D3V_S0
R1612 1KR2J-1-GP R1636 49D9R2F-GP ICLKRCOMP RSVD#D12 SMB_CLK
P26 E8 3 2
RSVD#P26 RSVD#E8

1
C K26 C7 R1644
C
9/9 remove R1609 RSVD#K26 RSVD#C7
M26 D6 RN1601
RSVD#M26 RSVD#D6

1
AH45 10KR2J-3-GP

G
RSVD#AH45 SRN2K2J-1-GP R1647
J12 Q1619
RSVD#J12
A9 F7 G

2
MF_PLT_CLK0 RSVD#F7 4K7R2J-2-GP
C9 J14
XDP TP B8
MF_PLT_CLK1 RSVD#J14
L13 SMB_DATA S D SML1_SMBDATA D Vth(max)=2.5V

2
MF_PLT_CLK2 RSVD#L13 TP_VDD_1D8V Vth(max)=1.0V
B7
MF_PLT_CLK3
B5 AK6 S

PLTFM CLK's
MF_PLT_CLK4 I2C0_SCL PCU_SMB_DATA [12,58,65]
B4
MF_PLT_CLK5 I2C0_SDA
AH7 SIO_I2C5_DATA 1 R1623 24K7R2J-2-GP Q1615
84.2N702.J31
R1624 24K7R2J-2-GP 2N7002K-2-GP 2ND = 084.27002.0A31
SIO_I2C5_CLK 1 DMN5L06K-7-GP
I2C1_SCL
AF6 3rd = 84.07002.I31
TPAD14-OP-GP TP1617 1CFG0 AM40 AH6 84.05067.031
GPIO_DFX0 I2C1_SDA
TPAD14-OP-GP TP1618 1CFG1 AM41
GPIO_DFX1
TPAD14-OP-GP TP1619 1CFG2 AM44 AF9
TPAD14-OP-GP TP1620 GPIO_DFX2 I2C2_SCL
1CFG3
TPAD14-OP-GP TP1621 1CFG4
AM45
AM47
GPIO_DFX3
GPIO_DFX4
GPIO_DFX I2C I2C2_SDA
AF7
A00_0605
1 2 USB_HSIC_RCOMP TPAD14-OP-GP TP1622 1CFG5 AK48 AE4
TPAD14-OP-GP TP1623 GPIO_DFX5 I2C3_SCL
R1637 45D3R2F-L-GP 1CFG6 AM48 AD2
TPAD14-OP-GP TP1624 GPIO_DFX6 I2C3_SDA 1D8V_S5 TP_VDD 3D3V_S5
1CFG7
1 2 USB_RCOMP TPAD14-OP-GP TP1625 1CFG8
AK41
AK42
GPIO_DFX7
AC1
A00_0605 A00_0606
A00_0605
R1641 113R2F-GP GPIO_DFX8 I2C4_SCL TP_VDD
AD3
already confirm AD51 1.8V I2C4_SDA TP_VDD

1
[15] GPIO_SUS0 GPIO_SUS0 SIO_I2C5_CLK
AD52 AB2
[15] GPIO_SUS1 GPIO_SUS1 I2C5_SCL SIO_I2C5_DATA R1621
AH50
GPIO_SUS2 1.8V I2C5_SDA
AC3 DY R1610

1
[15] GPIO_SUS2 10KR2J-3-GP
AH48

G
[15] GPIO_SUS3 GPIO_SUS3 2K2R2J-2-GP
AH51 AA1 Q1620 R1619
[15] GPIO_SUS4 GPIO_SUS4 I2C6_SCL 10KR2J-3-GP
GPIO_SUS

AH52 AB3 G

2
[15] ME_FWP_SOC GPIO_SUS5 I2C6_SDA
[15,24] SOC_RUNTIME_SCI# AG51
GPIO_SUS6 SIO_NFC_CLK TP1613 TPAD14-OP-GP SIO_I2C5_DATA TP_I2C_DATA_D D
[15,24] SOC_EXTSMI_N AG53 AA3 1 S D Vth(max)=2.5V

2
GPIO_SUS7 I2C_NFC_SCL SIO_NFC_SDA Vth(max)=1.0V
AF52 Y2 1 TP1614 TPAD14-OP-GP
[15] SEC_GPIO_SUS9 SEC_GPIO_SUS9 I2C_NFC_SDA
AF51 S TP_I2C_DATA [65]
[15] SEC_GPIO_SUS8 SEC_GPIO_SUS8 SMB_CLK
[15] SEC_GPIO_SUS10
AE51
SEC_GPIO_SUS10 MF_SMB_CLK
AM6
Q1604 84.2N702.J31
AC51 SMBUS AM7 SMB_DATA 2N7002K-2-GP 2ND = 084.27002.0A31
R1639 GPIO_RCOMP18 AH40 SEC_GPIO_SUS11 MF_SMB_DATA PCU_SMB_ALERT# 9/10 Remove TP1603 DMN5L06K-7-GP
1 2
GPIO0_RCOMP MF_SMB_ALERT#
AM9 3rd = 84.07002.I31
1 GPIO_ALERT Y3 84.05067.031 R6223
100R2F-L1-GP-U GPIO_ALERT 0R2J-2-GP
TP1612 1 DY 2
TPAD14-OP-GP
BRASWELL-GP 1D8V_S5 TP_VDD 3D3V_S5
A00_0605
B A00_0605 TP_VDD B
TP_VDD

1
R1622
R1616

1
DY 2K2R2J-2-GP 10KR2J-3-GP

G
Q1621 R1620
G 10KR2J-3-GP

2
SIO_I2C5_CLK S D TP_I2C_CLK_D D Vth(max)=2.5V

2
Vth(max)=1.0V
S TP_I2C_CLK [65]
Q1605
84.2N702.J31
2N7002K-2-GP 2ND = 084.27002.0A31
DMN5L06K-7-GP 3rd = 84.07002.I31
84.05067.031

1 DY 2

R6224
0R2J-2-GP
X02_0203

UART DEBUG PORT

5V_S5

5
DB2

1
A UART1_TX A
[8] UART1_TX UART1_RX
2 DY
[8] UART1_RX 3
4
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

6
ACES-CON4-37-GP <Core Design>
20.F1897.004
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (USB/LPC/GPIO)
Size Document Number Rev
A2
Iris BSW A00
Date: Friday, June 05, 2015 Sheet 16 of 109
5 4 3 2 1
 5 4 3 2 1

SSID = CPU

Vinafix.com
D D

C C

Blanking
B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
(Reserved)
Size Document Number Rev
A4 Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 17 of 109
5 4 3 2 1
 5 4 3 2 1

SSID = PCH 3D3V_S5 3D3V_S0 1V_CPU_CORE

1D8V_S5
R1848 R1849 20KR2J-L2-GP
3D3V_AUX_S5 PMC_BATLOW# 2 R1839 1
VCC_VCORE1_SENSE VSS_VCORE1_SENSE

2
2 1 2 1

1
R1843
1 2 10KR2J-3-GP R1864 100R2F-L1-GP-U 100R2F-L1-GP-U
1D8V_S5 1KR2J-1-GP 1D05V_S5
R1826 9/4 modified (Follow check list)
X04_0513

1
2
100KR2J-1-GP 1V_CPU_CORE

2
R1820 R1810

1
10KR2J-3-GP Q1801 PLT_RST#_D PLTRST# 1 2 VCC_SENSE 100R2F-L1-GP-U 2 R1851 1
PLT_RST# [24,55,61,68]
4 3 PM_RSMRST# 1 R1841 2 R1842 VIDALERT#_CPU_R 1 R1824 2
RSMRST#_KBC [24,25,99]
0R0402-PAD 2K2R2J-2-GP DY 0R0402-PAD VSS_SENSE 200R2F-L-GP

Vinafix.com
2 1

1
RSMRST#_KBC_G 1D05V_VNN_PG_G R1845 1 2 0R2J-2-GP R1852
5 2 DY 1D05V_VNN_PWRGD [50] X04_0513

D
2
100R2F-L1-GP-U
6 1 R1844 Q1809 Close to SOC

1
C1801 1 2 3V_5V_POK [40,45] R1827 2N7002K-2-GP
GFX_CORE

SC22P50V2GN-GP
PLTRST#_CPU 2PLT_RST#_CPU_G Q1812
D
3rd = 84.2N702.F3F DY 0R0402-PAD
1 G
DMN5L06K-7-GP 84.2N702.J31 R1874
D

2
2nd = 75.00601.07C 0R0402-PAD 2ND = 84.2N702.031 100R2F-L1-GP-U
84.2N702.A3F X04_0513 84.05067.031 VCC_AXG_SENSE 2 1

S
RTC_AUX_S5 2N7002KDW-GP R1873
VSS_AXG_SENSE

S
1 2
X04_0513 100R2F-L1-GP-U
R1861
PM_RSMRST# 1 2 100KR2J-1-GP
1
1

1D05V_S5
20KR2J-L2-GP
R1862

R1863

C1810
20KR2J-L2-GP

R1875
BVCCRTC_EXTPAD 2 1
VSS_VNN_SENSE 1 2
2
2

Sorting CAP SCD1U16V2KX-3GP

XTL_32D768K_X1_CPU 100R2F-L1-GP-U 1D8V_S5
R1816
PMC_RSTBTN# 2 R1825 1
XTL_32D768K_X2_CPU 2
1

1 2K7R2J-GP
CPU1G 7 OF 13 10MR2J-L-GP
C1802

1
SC1U10V2KX-1GP X1802 DY C1811
2

BRASWELL XTAL-32D768KHZ-6-GP SCD1U16V2KX-3GP

XTL_32D768K_X1_CPU 2nd = 82.30001.661

2
AF42 M18

JTAG/ITP
RTC_RST# [99] XDP_TCK TCK 1.8V BRTCX1_PAD XTL_32D768K_X2_CPU
[99] XDP_TDI AD47
TDI 1.8V BRTCX2_PAD
K18 82.30001.B21
9/10 Rename
[99] XDP_TDO AF40 F16 BVCCRTC_EXTPAD
RTC_TEST# TDO BVCCRTC_EXTPAD
[99] XDP_TMS AD48
Sorting CAP 9/10 Rename TMS RTC_RST# 9/10 Rename 4 1
A00_0529 A00_0529

RTC
[99] XDP_TRST# AB48 D18
2

TRST# SRTCRST#
G16 COREPWROK [40,99]
COREPWROK
1

C1803 G1801 PM_RSMRST#

1
Layout Note: 3.3V RSMRST#
F18
SC1U10V2KX-1GP

AD45 J16 RTC_TEST# 9/10 Rename C1806 C1807

[99] XDP_PRDY# CX_PRDY# RTEST# RTC_TEST# [99] 3 2
GAP-OPEN place on bottom side AF41 G18 RTC_G181 210KR2J-3-GP

SC4D7P50V2BN-GP

SC4D7P50V2BN-GP
[99] XDP_PREQ#
2

EDM_SOC CX_PREQ# RSVD_VSS#G18 R1836

X04_0506

2
M13
1

RSVD#M13 SUS_PWRDN_ACK_CPU
AE3
X01R1803 1DY_DEBUG
2 0R2J-2-GP LPC_CLK_CPU_P0 P2
SUSPWRDNACK
D14 PM_SUS_STAT#_CPU
[68] LPC_CLK_LPC MF_LPC_CLKOUT0 SUS_STAT#
[24] LPC_CLK_KBC
R1802 1 2 0R2J-2-GP LPC_CLK_CPU_P1 R3 1.8V C15 PCH_SUSCLK
PCH_SUSCLK [24]
MF_LPC_CLKOUT1 PMU_SUSCLK PM_SLP_S4#_CPU
[24] LPC_CLKRUN#_CPU T3
LPC_CLKRUN# PMU_SLP_S4#
C12 Spec CL=7pF
R1807 1 20R0402-PAD LPC_FRAME#_CPU PM_SLP_S3#_CPU
[24,68] LPC_FRAME#_CPU_R X04_0513 P3
LPC_FRAME# PMU_SLP_S3#
B14
AF2 PMC_RSTBTN#

LPC
1D8V_S5 PMU_RESETBUTTON#
[24,68] LPC_AD_CPU_R_P0
R1801 1 20R0402-PAD LPC_AD_CPU_P0 M3 F14 PLTRST#_CPU [63,99]
MF_LPC_AD0 PMU_PLTRST#
20R0402-PAD LPC_AD_CPU_P1 PMC_BATLOW#

PMU
MF_LPC_AD13.3V
R1804 1 M2 C14
[24,68] LPC_AD_CPU_R_P1 PMU_BATLOW#
1 2 PROCHOT#_CPU R1805 1 20R0402-PAD LPC_AD_CPU_P2 N3 C13 AC_PRESENT_CPU
[24,68] LPC_AD_CPU_R_P2 MF_LPC_AD2 PMU_AC_PRESENT AC_PRESENT_CPU [24]
C R1860 20KR2J-L2-GP
[24,68] LPC_AD_CPU_R_P3
R1806 1 20R0402-PAD LPC_AD_CPU_P3 N1 A13 PM_SLP_S0IX# C
MF_LPC_AD3 PMU_SLP_S0IX#
B12
1 2 XDP_TMS X04_0513 RCOMP_LPC_HVT T4
LPC_HVT_RCOMP
PMU_SLP_LAN#
PMU_WAKE#
N16 PM_PCIE_WAKE# 1D8V_S5
R1818 51R2J-2-GP T2 M16 PM_PWRBTN#_CPU
[24] LPC_SERIRQ_CPU ILB_SERIRQ 1.8V PMU_PWRBTN# PM_PWRBTN#_CPU [24]
XDP_TDI PMU_WAKE_LAN#
P18
X04_0513

PWM
1 2 H5 R1833
PWM0
R1819 51R2J-2-GP H7 AD42 VIDSCK_CPU 1 20R0402-PAD VIDSCK_CPU_R [46,48]
R1808

SVID
PWM1 SVID0_CLK
AD41 VIDSOUT_CPU 1 R1821 20R0402-PAD VIDSOUT_CPU_R [46,48]
PM_SUS_STAT#_CPU 1 2
SVID0_DATA
1 2 XDP_TDO AD40 VIDALERT#_CPU 1 R1835 20R0402-PAD VIDALERT#_CPU_R [46,48] 10KR2J-3-GP
R1822 51R2J-2-GP SVID0_ALERT# R1814
P28
RSVD#P28 PM_PCIE_WAKE#
P30 1 2
XDP_PREQ# RSVD#P30 10KR2J-3-GP
1 2 AF50 AG32 VCC_SENSE [46]
RSVD#AF50 CORE_VCC0_SENSE

Reserved
R1831 51R2J-2-GP AF48 AJ32 R1813
VSS_SENSE [46]

Voltage sense
9/4 modified RSVD#AF48 CORE_VSS0_SENSE AC_PRESENT_CPU
AF44 AD29 VCC_VCORE1_SENSE [46] 1 2
R1809 RSVD#AF44 CORE_VCC1_SENSE 2K2R2J-2-GP
AF45 AF27 VSS_VCORE1_SENSE [46]
PROCHOT#_CPU RSVD#AF45 CORE_VSS1_SENSE R1812
[24,44,46,48] H_PROCHOT# 1 2 AD50 AD24 VCC_AXG_SENSE [48]
PROCHOT# DDI_VGG_SENSE PM_PWRBTN#_CPU
AD22 1 2
0R0402-PAD
1.8V UNCORE_VSS_SENSE2
AC27
VSS_AXG_SENSE [48]
10KR2J-3-GP
100R2F-L1-GP-U UNCORE_VSS_SENSE1 VSS_VNN_SENSE [50]
1
R1859
2RCOMP_LPC_HVT X04_0513 R1832
PM_SLP_S0IX# 1 2
BRASWELL-GP
071.BRASW.000U
DY
1 R1846 2 EDM_SOC
DY 10KR2J-3-GP
10KR2J-3-GP R1834
1 2 XDP_TCK 1 DY 2 LPC_CLK_CPU_P0
[58] CLK_DP2VGA
R1815 51R2J-2-GP
0R2J-2-GP
1 2 XDP_TRST#
R1817 51R2J-2-GP
PDG:
check 2 LPC device / R1803&R1834 need 20ohm

B B
RTC Reset
DY? 1D8V_S5 1D8V_S5 3D3V_S5

2
Q1802
R1850 R1858
G 10KR2J-3-GP DY DY 10KR2J-3-GP

G
[24] RTCRST_ON
D RTC_RST#

1
S SUS_PWRDN_ACK_CPU S DY D
Vth(max)=1.0V SUS_PWRDN_ACK [24]

2N7002K-2-GP
1

Q1811
R1828 84.2N702.J31 DMN5L06K-7-GP
100KR2J-1-GP 2ND = 84.2N702.031 84.05067.031
2

1 DY 2
3D3V_AUX_S5 R1811 0R2J-2-GP
3D3V_S5

Q1810
reserve the 0402 0.1u caps on reset for EMI.

2
2N7002KDW-GP

2
84.2N702.A3F R1829
R1830
2nd = 75.00601.07C 10KR2J-3-GP
10KR2J-3-GP
VCC_SENSE 1 DY 2 EC1811
3rd = 84.2N702.F3F
SCD1U25V2KX-GP

1
1
VSS_SENSE 1 6
1 DY 2 EC1812 PM_SLP_S4# [24,51]
SCD1U25V2KX-GP
PM_SLP_S4#_CPU_D 2 5
VSS_AXG_SENSE 1 DY 2 EC1813 [40] PM_SLP_S4#_CPU_D
SCD1U25V2KX-GP 3D3V_AUX_S5
VCC_AXG_SENSE 84.05067.031 3 4
1 DY 2 EC1814
SCD1U25V2KX-GP DMN5L06K-7-GP
D

Q1808

2
Vth(Max)=1.0V
R1855
A PM_SLP_S4#_CPU G 10KR2J-3-GP A

1
PM_SLP_S3#_CPU_D
reserve the 0402 0.1u caps on reset for EMI
S

PM_SLP_S3#_CPU_D [40]
9/19 Removed EC1818 3D3V_S5
<Core Design>

D
Vth(Max)=1.0V
2

PM_RSMRST# 1 DY 2 EC1817

RTC_RST# 9/10 Rename

SCD1U25V2KX-GP
Q1816 G PM_SLP_S3#_CPU Wistron Corporation
1 DY 2 EC1815 R1856
DMN5L06K-7-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SCD1U25V2KX-GP 10KR2J-3-GP
84.05067.031 Taipei Hsien 221, Taiwan, R.O.C.
PLTRST#_CPU 1 DY 2 EC1808
1

SCD1U25V2KX-GP

S
Title
VIDALERT#_CPU_R 1 DY 2 EC1809

COREPWROK
SCD1U25V2KX-GP
1 DY 2 EC1810
[24,40,48,51,53] PM_SLP_S3# CPU (CLK/SPI/SIDEBAND/JTAG)
Size Document Number Rev
SCD1U25V2KX-GP A2
Iris BSW A00
Date: Friday, May 29, 2015 Sheet 18 of 109
5 4 3 2 1
 5 4 3 2 1

SSID = PCH 1D8V_S0

1
CPU1D 4 OF 13 R1906
10KR2J-3-GP
BRASWELL
C1915 2 1 SCD1U16V2KX-3GP PCIE_TX_CPU_P0 C24 C31
[61] PCIE_TX_CON_P0 SATA_TX_CPU_P0 [60]

2
PCIE_TXP0 SATA_TXP0
C19162 1 SCD1U16V2KX-3GP PCIE_TX_CPU_N0 B24 1.0V B30
WLAN [61] PCIE_TX_CON_N0
[61] PCIE_RX_CPU_P0
[61] PCIE_RX_CPU_N0
Vinafix.com G20
J20
PCIE_TXN0
PCIE_RXP0
PCIE_RXN0
SATA_TXN0
SATA_RXP0
SATA_RXN0
N28
M28
SATA_TX_CPU_N0 [60]
SATA_RX_CPU_P0 [60]
SATA_RX_CPU_N0 [60]
HDD SATA_LED#

SATA_TXP1 C29 SATA_TX_CPU_P1 [60]

D A25 A29 D
C25
PCIE_TXP1
PCIE_TXN1
SATA_TXN1
SATA_RXP1 J28
SATA_TX_CPU_N1 [60]
SATA_RX_CPU_P1 [60]
ODD
D20 PCIE_RXP1 SATA_RXN1 K28 SATA_RX_CPU_N1 [60]
F20 PCIE_RXN1
SATA_LED# AH3 SATA_LED# [24,64]
B26 PCIE_TXP2 1.8V SATA_GP0 AH2 TP_SATA_GP0 1
C26 SATA AG3 TP1903 TPAD14-OP-GP
PCIE_TXN2 PCIe SATA_GP1 Layout Note:
D22 PCIE_RXP2 SATA_GP2 AG1 SATA_DEVSLP_0
F22 PCIE_RXN2 SATA_GP3 AF3 R1931 R1916&R1917 Place close to CPU.
402R2F-GP
A27 N30 SATA_OBSP 2 1
PCIE_TXP3 SATA_OBSP SATA_OBSN
C27 PCIE_TXN3 SATA_OBSN M30
R1917
DY_985PC110R2J-2-GP
G24 PCIE_RXP3 1 2 SPI_CLK_ROM_KBC [24]
J24 PCIE_RXN3 1.8V FST_SPI_CLK W3 SPI_CLK_CPU R1911 1 2 10R2J-2-GP SPI_CLK_ROM [25]
PEG_CLKREQ0_CPU# AM10 V4 SPI_CS_CPU_N0 R1909 1 2 33R2J-2-GP
PCIE_CLKREQ0# FST_SPI_CS0# SPI_CS_ROM_N0 [25]
PEG_CLKREQ1_CPU# AM12 V6
PEG_CLKREQ2_CPU# AK14
PCIE_CLKREQ1# 1.8V FST_SPI_CS1#
V7 R1916 1 2 33R2J-2-GP
DY_985PC1
PCIE_CLKREQ2# FST_SPI_CS2# SPI_CS_ROM_N0_KBC [24]
PEG_CLKREQ3_CPU# AM14 PCIE_CLKREQ3# SPI_SI_CPU R1910
FST_SPI_D0 V2 1 2 10R2J-2-GP SPI_SI_ROM [25]
A21 V3
WLAN [61] PEG_CLK0_CPU
[61] PEG_CLK0_CPU# C21
CLK_DIFF_P_0 FAST SPI FST_SPI_D1
U1 SPI_W P_CPU [25]
SPI_SO_CPU [25]
CLK_DIFF_N_0 FST_SPI_D2
C19 CLK_DIFF_P_1 FST_SPI_D3 U3 SPI_HOLD_CPU [25]
B20 CLK_DIFF_N_1
C18 AF13 HDA_RST#_CPU
CLK_DIFF_P_2 MF_HDA_RST#
B18 CLK_DIFF_N_2 1.5V MF_HDA_SDI1 AD6
C17 AD9 HDA_BITCLK_CPU
CLK_DIFF_P_3 MF_HDA_CLK HDA_SDIN0_CPU
A17 CLK_DIFF_N_3 MF_HDA_SDI0 AD7 HDA_SDIN0_CPU [27]
C16 AF12 HDA_SYNC_CPU
C R1930 CLK_DIFF_P_4 MF_HDA_SYNC HDA_SDOUT_CPU C
B16 CLK_DIFF_N_4 MF_HDA_SDO AF14
402R2F-GP AB9
PCIE_OBSP_CPU MF_HDA_DOCKEN#
1 2
PCIE_OBSN_CPU
D26
F26
PCIE_OBSP
PCIE_OBSN
MF_HDA_DOCKRST# AB7
X03_0310
AUDIO SPKR H4 HDA_SPKR [27]
V14 1.8V 3D3V_S5
SPI1_CLK 1D8V_S0 1D8V_S0
Y13
Y12
SPI1_CS0# SPI
GP_SSP_2_CLK AK9
AK10 X03_0310
V13
SPI1_CS1# 1.8V GP_SSP_2_FS
AK12 3D3V_S0
SPI1_MISO GP_SSP_2_TXD

1
V12 SPI1_MOSI GP_SSP_2_RXD AK13
X03_0326 X03_0326

1
R1915 R1914
100KR2J-1-GP 2K2R2J-2-GP 3D3V_S0
DY

1
1D8V_S5 R1912
BRASWELL-GP
DEVSLP 4K7R2J-2-GP

2
DEVSLP Q1902 DEVSLP

2
X03_0318 HDA_RST#_CPU
R1928 75R2F-2-GP
G

2
1 2 HDA_RST#_CODEC [27,29] SATA_DEVSLP_0 SATA_DEVSLP_D
S D D DY
10KR2J-3-GP
1 R1907
1 R1908
2
2
PEG_CLKREQ2_CPU#
PEG_CLKREQ1_CPU#
X03_0318 HDA_BITCLK_CPU 1
R1927
2
75R2F-2-GP
Q1901 S
HDA_BITCLK_CODEC [27] HDD_DEVSLP_R [60]
10KR2J-3-GP DMN5L06K-7-GP
X03_0318 HDA_SYNC_CPU 1
R1926
2
75R2F-2-GP 84.05067.031 2N7002K-2-GP
HDA_SYNC_CODEC [27]
1 R1901 2
10KR2J-3-GP
PEG_CLKREQ0_CPU#
X03_0318 HDA_SDOUT_CPU 1
R1929
2
75R2F-2-GP
HDA_SDOUT_CODEC [27]
84.2N702.J31
2ND = 084.27002.0A31
1 R1903 2 PEG_CLKREQ3_CPU# 3rd = 84.07002.I31
10KR2J-3-GP
B B
R1913
HDA_RST#_CPU
1 2
1D8V_S0
0R0402-PAD
X04_0513
1
1

R1905 DY C1910
10KR2J-3-GP SC22P50V2JN-4GP
2

DY
2

PEG_CLKREQ0_CPU# 0R2J-2-GP 2 DY 1 R1904

PEG_CLKREQ0_W LAN# [61]

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (SATA/PCIE/IHDA)
Size Document Number Rev
A3
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 19 of 109
5 4 3 2 1
 5 4 3 2 1

SSID = PCH

Vinafix.com
D D

C C

Blanking
B B

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
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<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

(Reserved)
Size Document Number Rev
A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 20 of 109
5 4 3 2 1
 5 4 3 2 1

SSID = CPU
X04_0513
1D35V_S3 +VCCSFRPLLDDR_1P24_1P35

R2111
2 1
0R0402-PAD

X04_0513 Vinafix.com
D 1D35V_S3 +VCCCLKDDR_1P24_1P35 D

R2112
2 1
0R0402-PAD

X01

+VCCCLKDDR_1P24_1P35 +VCCSFRPLLDDR_1P24_1P35
P21 X04_0513 1D24V_S5
CPU1I 9 OF 13
X04_0513 +VCCPADCF3SI0_1P8_3P3
1D24V_S5
3D3V_S5_PRIME BRASWELL Removal of 1.24V VR 1 R2104 2
R2113 1D35V_S3 AN27 Imax=0.55A (1.24V) V36 0R0603-PAD
DDRSFR_VDDQ_G_S4 DDI_VDDQ_G31
1 2 AM25 DDR_VDDQ_G_S42 DDI_VDDQ_G32 Y36
Imax=141mA (VSDIO 3.3V) SD IO SUPPLY
3D3V_S0 0R0603-PAD BE1 T40 MIPI_V1P2A
DDR_VDDQ_G_S416 MIPI_V1P2A_G32 1D24V_S5
R2114 1 2 0R3J-L-GP Imax=1.9A (VDDQ)
BE53
BJ2
DDR_VDDQ_G_S419 MIPI_V1P2A_G31 P40 X01
DY DDR_VDDQ_G_S426
BJ3 DDR_VDDQ_G_S427 ICLK_VSFR_G32 Y27
BJ49 Y25 1D24V_S5
DDR_VDDQ_G_S428 ICLK_VSFR_G31
BJ5 DDR_VDDQ_G_S429
BH50 DDR_VDDQ_G_S425 CORE_VSFR_G35 P38
X04_0513 BH5 DDR_VDDQ_G_S424 CORE_VSFR_G36 V30
X04_0513

DDR
BH49 DDR_VDDQ_G_S423 PCIE_V1P05A_G31#AC30 AC30
C 3D3V_S5_PRIME +VCCPADCF1SI0_1P8_3P3 BH4 1D24V_S5 C
DDR_VDDQ_G_S422 CORE_VSFR_G3 1D24V_S5
R2115 BE3 DDR_VDDQ_G_S417
1 2 LPC IO SUPPLY BG51 DDR_VDDQ_G_S421 CORE_VSFR_G34 AF35
Imax=147.59mA BG3 AD35 1 R2116 2
0R0603-PAD DDR_VDDQ_G_S420 CORE_VSFR_G32 0R0603-PAD
BJ51 DDR_VDDQ_G_S430 CORE_VSFR_G33 AD38
BJ52
AY10
DDR_VDDQ_G_S431
DDR_VDDQ_G_S414
CORE_VSFR_G31 AC36
X04_0513
AY44 1D24V_S5
DDR_VDDQ_G_S415 1D24V_S5
AV44 DDR_VDDQ_G_S413 USBHSIC_V1P2A_G3 M41 USBHSIC_V1P2A X01
AV10 U35 1D24V_S5
DDR_VDDQ_G_S410 USB_VDDQ_G32
BE51 V35 1 R2117 2

USB
DDR_VDDQ_G_S418 USB_VDDQ_G33 0R0603-PAD
AV38 DDR_VDDQ_G_S412 USB_VDDQ_G31 H44
AV16 P41 USBSSIC_V1P2A 1D8V_S5
DDR_VDDQ_G_S411 USBSSIC_V1P2A_G3
1D5V_S0 X04_0513 +VCCCFIOAZA_1P80
AU36
AU18
DDR_VDDQ_G_S49
DDR_VDDQ_G_S48 USB_V1P8A_G3 AA29 Imax=550mA 3D3V_S5_PRIME

R2105
AN36
AN35
DDR_VDDQ_G_S47
C23 Imax=200mA (3.3V_PRIME) X01
DDR_VDDQ_G_S46 USB_V3P3A_G32
1 2 AN19 DDR_VDDQ_G_S45 USB_V3P3A_G31 B22
Imax=16.53mA AUDIO IO SUPPLY AN18 RTC_AUX_S5
0R0603-PAD DDR_VDDQ_G_S44
AM36 DDR_VDDQ_G_S43
1D8V_S5 AM18 C5 3D3V_S5_PRIME
+VCCPADCF1SI0_1P8_3P3 +VCCPADCF3SI0_1P8_3P3 DDR_VDDQ_G_S41 RTC_V3P3RTC_G52

RTC
RTC_V3P3RTC_G51 B6
RTC_V3P3A_G51 D4
R2106 1 2 0R3J-6-GP +VCCCFIOAZA_1P80
DY E1 SDIO_V3P3A_V1P8A_G31 RTC_V3P3A_G52 E3 1D8V_S5
E2 SDIO_V3P3A_V1P8A_G32
G1 U16 Imax=550mA 1D05V_S5
1D8V_S5 SDIO_V3P3A_V1P8A_G33 FUSE_V1P8A_G3
AH4 UNCORE_V1P8A_G32
Imax=550mA

FUSE
AF4 UNCORE_V1P8A_G31 FUSE1_V1P05A_G4 H10
Y18 GPIO_V1P8A_G35 FUSE0_V1P05A_G3 G10
B RSVD_VSS#A3 B
AD33 GPIO_V1P8A_G31 RSVD_VSS#A3 A3 1
AK18 GPIO_V1P8A_G33 RSVD#K20 K20
Imax=550mA 1D8V_S5 AF33 M20
GPIO_V1P8A_G32 RSVD#M20 TP2101
AK19 GPIO_V1P8A_G34 TPAD14-OP-GP

BRASWELL-GP

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (POWER1)
Size Document Number Rev
A3
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 21 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = PCH

Vinafix.com
D D

C C

Blanking
B B

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

(Reserved)
Size Document Number Rev
A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 22 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = PCH

Vinafix.com
D D

C C

Blanking
B B

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

(Reserved)
Size Document Number Rev
A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 23 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = KBC

X04_0513
EC_AVCC 3D3V_AUX_KBC
R2405
1 2
R2473 3D3V_S0
10KR2J-3-GP
0R0603-PAD

2
LPC_CLKRUN#_CPU 2 DY 1
R2404

Vinafix.com

1
C2425 C2412 2D2R3-1-U-GP

SCD1U16V2KX-3GP

SC2D2U10V3KX-1GP
H_RCIN# 2 1

1
3D3V_AUX_KBC
KBC_VCC R2469
10KR2J-3-GP
1 2 RTC_DET# X04_0514
D D

1
R2401 C2426 C2427 C2428 C2429 C2430
10KR2J-3-GP C2411 LPC_CLK_KBC

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP
3D3V_S0

SC2D2U10V3KX-1GP
EC_AGND

2
If project does not use PECI (Test point only),
1

1
VTT can connect to GND directly
R2414 1D8V_S5 X04_0513 EC_VCC1V8
C2436

10KR2F-2-GP
DY SC22P50V2JN-4GP X04_0513
DY

2
2

EC_VTT 1 R2465 20R0402-PAD

1

1
R2462 DY C2437 C2439
0R0402-PAD R2434 R2441
SCD1U16V2KX-3GP SCD1U16V2KX-3GP
2

2
KBC24 ECSWI#_KBC 1 2 PM_PWRBTN# 1 2
EC_SWI# [8] PM_PWRBTN#_CPU [18]
2

19 54 KROW0 Set as 1.8V pull-high at p.18 1.8V only pull-high at p.18

X04_0513 EC_AVCC EC_VCC1V8 46
VCC KBSIN0/GPIOA0/N2TCK
55 KROW1
KROW[0..7] [65] 0R0402-PAD 0R0402-PAD
76
VCC KBSIN1/GPIOA1/N2TMS
56 KROW2 (1D8V_S5) (1D8V_S5)
VCC KBSIN2/GPIOA2 KROW3
57
KBSIN3/GPIOA3 KROW4
115 58 R2460 R2453
3D3V_AUX_KBC 1D8V_S0 VCC KBSIN4/GPIOA4 KROW5
88 59
VCC1D8 !!Notice: KBSIN5/GPIOA5 KROW6 SOC_RUNTIME_SCI#_KBC AC_PRESENT_KBC
102 60 1 2 SOC_RUNTIME_SCI# [15,16] 1 2 AC_PRESENT_CPU [18]
AVCC VCC1D8 KBSIN6/GPIOA6 KROW7
61
BAT_IN# KBSIN7/GPIOA7
1 2 4
VDD1D8 Set as 1.8V 0R0402-PAD pull-high at p.15 Set as 1.8V 0R0402-PAD pull-high at p.18
R2442 10KR2J-3-GP
EC_VTT 12 53 KCOL0 KCOL[0..16] [65]
(1D8V_S5) (1D8V_S5)
VTT KBSOUT0/GPOB0/SOUT_CR/JENK#

1
1 2 ECRST# 52 KCOL1
R2418 10KR2J-3-GP DY C2433
[44] AD_IA KBSOUT1/GPIOB1/TCK
KBSOUT2/GPIOB2/TMS
51 KCOL2
R2461 R2430
A00_0528

SC2D2U10V3KX-1GP
EC_AGND C2438 1 2 SCD1U16V2KX-3GP 97 50 KCOL3
2 PCB_VER_AD GPIO90/AD0 KBSOUT3/GPIOB3/TDI KCOL4 ECSMI#_KBC L_BKLT_EN
98 49 1 2 1 2
X03_0319 [43] PSID_EC
X03_0319 99
GPIO91/AD1
GPIO92/AD2
KBSOUT4/GPOB4/JEN0#
KBSOUT5/GPIOB5/TDO
48 KCOL5
SOC_EXTSMI_N [15,16] L_BKLT_EN_CPU [8]
R2458 2 USB_HUB_EN#_KBC KCOL6
3D3V_S0 [34] USB_HUB_EN# 1 100
GPIO93/AD3 KBSOUT6/GPIOB6/RDY#
47 Set as 1.8V 0R0402-PAD pull-high at p.18 0R0402-PAD
1 DY 2 AC_IN# 0R0402-PAD 108 43 KCOL7
R2464 10KR2J-3-GP
[36] USB_PWR_EN#
96
GPIO5/AD4 KBSOUT7/GPIOB7
42 KCOL8 3D3V_AUX_KBC (1D8V_S5)
[26,40] SYS_PWROK
VD_IN1 95
GPIO4/AD5 KBSOUT8/GPIOC0
41 KCOL9 Touchpad ON#
GPIO3/EXT_PURST#/AD6 KBSOUT9/GPOC1/SDP_VIS#
2

MODEL_ID_AD 94 40 KCOL10
X04_0513 GPIO7/AD7/VD_IN2 KBSOUT10/P80_CLK/GPIOC2

1
DY R2466 39 KCOL11
100KR2J-1-GP X02_0212 KBSOUT11/P80_DAT/GPIOC3
KBSOUT12/GPO64/TEST#
38 KCOL12 R2409
101 37 KCOL13 1KR2J-1-GP
[26] FAN1_DAC_1 GPIO94/DA0 KBSOUT13/GPIO63/TRIST#
3D3V_S5 105 36 KCOL14
X03_0324 [44] AD_IA_HW
1

GPIO95/DA1 KBSOUT14/GPIO62/XORTR# KCOL15

[34] KBC_HUB_RESET# 106 35

2
KB_DET# [65] GPIO96/DA2 KBSOUT15/GPIO61/XOR_OUT KCOL16
[64] LID_CLOSE# 107 34
GPIO97/DA3 GPIO60/KBSOUT16
RN2401 33 TP_ON# [65]
SML1_CLK GPIO57/KBSOUT17
1 4
2 3 SML1_DATA 70
[43,44] BAT_SCL GPIO17/SCL1/N2TCK
SRN1KJ-7-GP
BATTERY / CHARGER ------> [43,44] BAT_SDA 69
67
GPIO22/SDA1/N2TMS LAD0/GPIOF1
126
127
LPC_AD_CPU_R_P0 [18,68]
[26,34] SML1_CLK GPIO73/SCL2/N2TCK LAD1/GPIOF2 LPC_AD_CPU_R_P1 [18,68]
Thermal ------> [26,34] SML1_DATA
ECSMI#_KBC
68
119
GPIO74/SDA2/N2TMS LAD2/GPIOF3
128
1
LPC_AD_CPU_R_P2 [18,68]
3D3V_S0 GPIO23/SCL3/N2TCK LAD3/GPIOF4 LPC_AD_CPU_R_P3 [18,68]
[18] RTCRST_ON 120 2 LPC_CLK_KBC [18]
PROCHOT_EC GPIO31/SDA3/N2TMS LCLK/GPIOF5
24 3 LPC_FRAME#_CPU_R [18,68]
GPIO47/SCL4/N2TCK LFRAME#/GPIOF6
[55] LCD_VDD_EN 28 7 PLT_RST# [18,55,61,68]
FAN_TACH1 R2413 1 GPIO53/SDA4/N2TMS LRESET#/GPIOF7
1 2 DY 2 0R2J-2-GP ECSWI#_KBC 26 R2443 1 Share 2 33R2J-2-GP EC_SPI_CS0#_FLASH
EC_SPI_CS0#_FLASH [25]
R2417 10KR2J-3-GP KBC_LCD_TST GPIO51/TA3/N2TCK R2439 33R2J-2-GP EC_SPI_CLK_FLASH
C
[55] LCD_TST 1
R2410
2 123
GPIO67/N2TMS EC_SPI_CS#1 R2412
1 Share 2 33R2J-2-GP
EC_SPI_CLK_FLASH [25] C
F_CS0#
90 1 DY 2 SPI_CS_KBC_R_N0 [25]
R2420
1 2 H_A20GATE
8K2R2J-3-GP
0R0402-PAD A00_0528 72
F_SCK
92
109
EC_SPI_CLK R2407 1 DY 2 33R2J-2-GP
SPI_CLK_KBC_R [25]
[65] TPCLK GPIO37/PSCLK1 GPIO30/F_WP# CAP_LED# [65]
[65] TPDATA 71 80 BAT_IN# [43,44]
TOUCH_PANEL_INTR# GPIO35/PSDAT1 GPIO41/F_WP# SPI_SI_KBC R2402
1 DY 2 [40] ALL_SYS_PWRGD 10 87 1 2 33R2J-2-GP
Share SPI_SI_KBC_R [25]
R2428 8K2R2J-3-GP GPIO26/PSCLK2 F_SDO
[43] PWR_CHG_AD_OFF 11 86 X01 SPI_SO_KBC [25]
R2411 1 GPIO27/PSDAT2 F_SDI
[18] SUS_PWRDN_ACK DY 2 0R2J-2-GP RUNPWROK 25 1.8V only 91 PM_PWRBTN#
BLUETOOTH_EN GPIO50/PSCLK3/TDO GPIO81/F_WP# PCH_SUSCLK_KBC R2444
1 2 [55] BLON_OUT 27 77 1nonS 2 33R2J-2-GP EC_SPI_SI_FLASH
EC_SPI_SI_FLASH [25]
R2452 10KR2J-3-GP GPIO52/PSDAT3/RDY# GPIO0/EXTCLK

31 73 PSL_IN1# RTC_AUX_S5 3D3V_S5

[26] FAN_TACH1
[65] TP_LID_CLOSE#
[61] BLUETOOTH_EN
R2408 1 DY 2 0R2J-2-GP TP_LID_CLOSE#_KBC 117
63
GPIO56/TA1 PSL_IN1#/GPI70
GPIO20/TA2/IOX_DIN_DIOPSL_IN2#/GPI6/EXT_PURST#
GPIO14/TB1 PSL_OUT#/GPIO71
93
74
PSL_IN2#
PSL_OUT#
Level shift

1
3D3V_S5
[18,40,48,51,53] PM_SLP_S3# X01 64
GPIO1/TB2 X04_0513

2
3D3V_S5 R2450
3D3V_AUX_S5 R2416
ECSCI#/GPIO54
29
ECRST# 3D3V_S5_PRIME_PG [40] 4K7R2J-2-GP
DY
[27] KBC_BEEP 32 85 0R0402-PAD
GPIO15/A_PWM EXT_RST#

1
1 2 LID_CLOSE# 118 122 H_RCIN#
[64] BATT_WHITE_LED#

2
R2423 10KR2J-3-GP GPIO21/B_PWM KBRST#/GPIO86 Q2409 R2447
[55] EC_BRIGHTNESS 62

1
AC_IN_KBC# GPIO13/C_PWM PCH_SUSCLK_KBC
USB_PWR_EN# L_BKLT_EN
65
GPIO32/D_PWM VSBY
75
KBC_VBKUP
3 D1 S1 4 DY 10KR2J-3-GP
R2454
1 DY 2
10KR2J-3-GP
22
GPIO45/E_PWM VBKUP
114
KBC_VCORF C2431
[64] CHG_AMBER_LED# 16 44 1 2 SC1U10V2KX-1GP [18] PCH_SUSCLK 2 G2
5

2
GPIO40/F_PWM/1_WIRE VCORF KBC_PECI
G1

[65] KB_BL_CTRL
VD1_EN#
81
GPIO66/G_PWM PECI
13
INT_SERIRQ
1 DY PCH_SUSCLK_D
X03_0319 66
GPO33/H_PWM/VD1_EN# SERIRQ/GPIOF0
125 pull-high at p.18 1 S2 D2 6
1 DY 2 USB_HUB_EN# 6
R2463 10KR2J-3-GP 104
GPIO24
15
RTC_DET# [25] TP2407 (1D8V_S5) DMN2004DWK-7-GP
[26] VD_IN1 GPIO80/VD_IN1 GPIO36/TB3 RSMRST#_KBC [18,25,99] TPAD14-OP-GP A00_0528 84.02004.03F
3D3V_AUX_KBC 110 21 R2429 0R0402-PAD
[26] VD_OUT1# GPIO82/IOX_LDSH/VD_OUT1 GPIO44/TDI PM_SLP_S4# [18,51]
112 20 LVDS_VDD_EN_KBC 1 2 LVDS_VDD_EN_CPU [8,55]
[40] SUSPWRDNACK_SOC_EC GPIO84/IOX_SCLK/VD_OUT2 GPIO43/TMS SOC_RUNTIME_SCI#_KBC
17
GPIO42/TCK SATA_LED#_KBC R2438 1
23 DY 2 0R2J-2-GP SATA_LED# [19,64]
AC_IN_KBC# GPIO46/CIRRXM/TRST#
R2459
1 DY 2
10KR2J-3-GP
[19] SPI_CLK_ROM_KBC 84
GPIO77/SPI_MISO AC_PRESENT_KBC
[19] SPI_CS_ROM_N0_KBC 83 113
GPIO76/SPI_MOSI GPIO87/CIRRXM/SIN_CR
X01 [61] WIFI_RF_EN 82
79
GPIO75/SPI_SCK GPIO34/CIRRXL
14 S5_ENABLE [40]

R2468
1KR2J-1-GP
[16] ME_UNLOCK#
X01
GPIO2/SPI_CS#
KBC NO Setting GND
5
Level shift
2 1 VD1_EN# R2427 1 2 0R2J-2-GP
DY_TPNL TOUCH_PANEL_INTR_KBC# 124 18
T8_KBC
[55] TOUCH_PANEL_INTR#
H_A20GATE 121
GPIO10/LPCPD# X03_0312 GND
45
[61] E51_TXD
X02_0210 111
GPIO85/GA20
GPIO83/SOUT_CR
GND
GND
78 3D3V_S5 1D8V_S5
9 89 1D8V_S0
[44] AD_IA_HW2 GPIO65/SMI# GND
116
GND
[18] LPC_CLKRUN#_CPU 8
GPIO11/CLKRUN#
[27] AMP_MUTE# 30 103
GPIO55/CLKOUT/IOX_DIN_DIO AGND

1
C2435 C2434

2
1D8V_S5 1D8V_S5 1D8V_S0
1KR2J-1-GP 3D3V_S5 DY DY

SCD1U16V2KX-3GP
1 DY2 AD_IA NPCE985PB1DX-GP-U SCD1U16V2KX-3GP

2
C2418 SCD1U16V2KX-3GP 0R0402-PAD R2471

1
R2415

1
071.00985.000G

2
R2474 R2477 R2456
R2455

1
SATA_LED#_KBC DY DY U2402 DY 10KR2J-3-GP 10KR2J-3-GP
10KR2J-3-GP 10KR2J-3-GP
A00_0528 6 1

2
INT_SERIRQ_OE VCCB VCCA

2
5 2

G
INT_SERIRQ OE GND
4
B DY A
3 LPC_SERIRQ_CPU [18]

1
EC_AGND BATT_WHITE_LED# D S G2129TL1U-GP
B
LID CLOSE# X01 X03_0409 SATA_LED# [19,64]
R2475 VCCA should not exceed VCCB B

1KR2J-1-GP
Q2405 73.02129.02J
D2401 DMN5L06K-7-GP DY OE logical level reference VCCA

2
TOUCH_PANEL_INTR# LID_CLOSE# 3D3V_AUX_S5
84.05067.031
A TPNL K A00_0528
Start up C2419
SCD1U16V2KX-3GP
3D3V_AUX_S5
R2449
2

RB751V-40H-GP 1 2
83.R2004.G8F R2433 1 2
0R0402-PAD
D2402 330KR2J-L1-GP
DY
1

TP_LID_CLOSE# A K R2440 R2435

PSL_OUT# 1 2 KBC_ON#_GATE_L 1 2 KBC_ON#_GATE G G
KBC RESET
RB751V-40-H-GP 1KR2J-1-GP 20KR2J-L2-GP
Q2404 D
83.R2004.H8F DMP2130L-7-GP
D

84.02130.031 3D3V_AUX_S5
2ND = 84.03413.A31
3D3V_AUX_KBC 3D3V_AUX_KBC
3D3V_AUX_S5

1
R2403 1 DY 2 0R2J-2-GP ECRST#
High Active
1

R2421
2

R2437
X04_0513 R2425 10KR2J-3-GP
Q2402 Q2403 10KR2J-3-GP

1
PROCHOT_EC G 330KR2J-L1-GP G C2415
2

E
DY
1

SC1U10V2KX-1GP
D 1 R2422 2 PSL_IN2# D S5_ENABLE B Q2401
H_PROCHOT# [18,44,46,48] [64] KBC_PWRBTN# [26,40] PURE_HW_SHUTDOWN#

2
1

R2432 S 0R0402-PAD S LMBT3906LT1G-1-GP

C
DY 100KR2J-1-GP 2N7002K-2-GP 2N7002K-2-GP
84.T3906.E11
84.2N702.J31 X04_0513 84.2N702.J31
2

2ND = 84.2N702.031 2ND = 84.2N702.031

1 R2419 2 PSL_IN1# 3rd = 84.07002.I31
[44] AC_IN#
4th = 84.2N702.W31
0R0402-PAD

X03_0513
R2431
EMI Request PCB Version A00_0601
Reserved for SKU control
3D3V_AUX_KBC 3D3V_AUX_KBC
SYS_PWROK 2 EC2440
DY1 SCD1U25V2KX-GP
X01
1

1
A A00_0528 R2424 R2431 A
BLUETOOTH_EN 2 EC2436 64K9R2F-1-GP 10KR2J-3-GP
DY1 SCD1U25V2KX-GP
-1
2

2
PCB_VER_AD MODEL_ID_AD
WIFI_RF_EN DY1 2 EC2437
SCD1U25V2KX-GP
1

1
MODEL_ID_AD
1

C2417 R2426 C2420 R2436

Wistron Confidential document, Anyone can not
DY DY DY 100KR2J-1-GP
SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

ALL_SYS_PWRGD 2 EC2438 100KR2F-L1-GP 1 UMA Duplicate, Modify, Forward or any other purpose
DY1
2

SCD1U25V2KX-GP application without get Wistron permission

2

2
0 DIS
S5_ENABLE DY1 2 EC2439
SCD1U25V2KX-GP
EC_AGND EC_AGND Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

KBC_NPCE985PB1
Size Document Number Rev
A1
Iris BSW A00
Date: Monday, June 01, 2015 Sheet 24 of 109
5 4 3 2 1
 5 4 3 2 1

SSID = Flash.ROM

SPI FLASH ROM (8M byte) for CPU X04_0513

X01 1D8V_S5 1D8V_SPI
1D8V_SPI
U2501 X01

[19] SPI_HOLD_CPU
R2525
R2536 1 2 10R2J-2-GP
2 0R2J-2-GP
SPI_HOLD_ROM
SPI_CLK_ROM_R
8
7
Vinafix.com
VCC CS#
HOLD#/RESET#/IO3 DO/IO1
1
2
SPI_CS_ROM_N0_R
SPI_SO_ROM
SPI_WP_ROM
R2524
R2529
R2531
1
1
DY 2 0R2J-2-GP
2 10R2J-2-GP
2 10R2J-2-GP
SPI_CS_ROM_N0 [19]
SPI_SO_CPU [19]
1 R2512 20R0402-PAD

[19] SPI_CLK_ROM 1 DY 6
CLK WP#/IO2
3 1
SPI_WP_CPU [19]
D [19] SPI_SI_ROM 5 4 D
DI/IO0 GND
1D8V_SPI
X01 W25Q64FWSSIG-GP Layout Note:
72.25Q64.S01 Place close to SPI Flash ROM.

1
2ND = 072.25647.0001
DY EC2502 DY EC2501 DY

C2502
SC10U6D3V3MX-GP
SC4D7P50V2BN-GP EC2503 SC4D7P50V2BN-GP

1
2

2
SC4D7P50V2BN-GP
DY C2501
1D8V_SPI X03_0315 SCD1U16V2KX-3GP

2
SPI ROM socket 1D8V_SPI
Co-Layout with U2501
1

1D8V_SPI
C2441 nonSC2440 X01 RN2501
Layout Note: Close to U2501 Pin 8
SC10U6D3V3MX-GP DY SCD1U16V2KX-3GP SSKT1 4 5
2

8 1 SPI_CS_ROM_N0_R SPI_HOLD_ROM 3 6
SPI_HOLD_ROM SPI_SO_ROM SPI_WP_ROM
SPI_CLK_ROM_R
7 DY 2
SPI_WP_ROM SPI_CS_ROM_N0_R
2 7
6 3 1 8
128Kbyte SPI ROM link to KBC SPI_SI_ROM 5 4
1D8V_SPI SKT-G6179HT0321-001-GP SRN4K7J-10-GP

Layout Note: Close to U2401 Pin 8 62.10089.011

SPI ROM link to KBC
1

1
R2446
R2445 R2448
X01
nonS nonS 3K3R2F-2-GP
nonS SPI_CS_ROM_N0
3K3R2F-2-GP 10KR2J-3-GP R2515 1 2 0R2J-2-GP
[24] SPI_CS_KBC_R_N0
DY
2

2
U2401 1D8V_SPI R2517 33R2J-2-GP SPI_SO_ROM
[24] SPI_SO_KBC 1 Share 2
[24] EC_SPI_CS0#_FLASH
EC_SPI_CS0#_FLASH 1
CS# VCC
8
X04_0513 R2511
SPI_SO_KBC 1 nonS 2EC_SPI_SO_FLASH 2 7 EC_SPI0_HOLD_0 1 20R0402-PAD SPI_SI_ROM
[24] SPI_SO_KBC EC_SPI0_WP_0 SO/SIO1 HOLD#/SIO3 EC_SPI_CLK_FLASH [24] SPI_SI_KBC_R
3 6 EC_SPI_CLK_FLASH [24]
R2451 WP#/SIO2 SCLK EC_SPI_SI_FLASH
33R2J-2-GP
4
GND nonS SI/SIO0 5 EC_SPI_SI_FLASH [24]
R2510 SPI_CLK_ROM
C
[24] SPI_CLK_KBC_R 1 2 0R2J-2-GP C

MX25U1001EMI-14G-GP
DY
072.25101.0001 Close to U2501

3D3V_S5
X04_0513
1

C2442
X01 R2457
X01
Share SCD1U16V2KX-3GP 0R0402-PAD
2

U2403
X01
1

3D3V_AUX_S5_MUX 10 6 NCT3956_OE#_MUX 2 R2523 10R0402-PAD

VCC OE#
9 RSMRST#_KBC_MUX 1 R2522 2
S RSMRST#_KBC [18,24,99]
SPI_CS_ROM_N0_R R2514 0R0402-PAD SPI_CS_ROM_N0_R_MUX 8 0R0402-PAD
BIOS Flash Input SPI_CLK_ROM_R
1
1 R2516
2
2 0R0402-PAD SPI_CLK_ROM_R_MUX 7
D+
R2518 0R0402-PAD SPI_CS_ROM_N0_MUX D-
[24] EC_SPI_CS0#_FLASH 1
R2519
2
0R0402-PAD SPI_CLK_ROM_MUX
1
1D+Share X01 X04_0513
Default(Out-KBC) [24] EC_SPI_CLK_FLASH 1
1 R2520
2
2
2
0R0402-PAD EC_SPI_CS0#_FLASH_MUX 3 1D-
5
[19] SPI_CS_ROM_N0 2D+ GND
R2521 0R0402-PAD EC_SPI_CLK_FLASH_MUX 4
After Programming(Out-PCH) [19] SPI_CLK_ROM 1 2
2D- GND
11

NCT3956Y-GP
X04_0513 73.03956.003
B B

5240626:SPI Signals do not get tri-stated / MUX Sol. 2ND = 73.3U221.003

Default(KBC)
Output
Programming

SSID = RTC RTC coin cell

23.20068.001
0R2J-2-GP
R2513
3D3V_AUX_S5 +RTC_VCC
1 DY 2

RTC_AUX_S5 Q2501 1 AFTP2502

2

3 RTC1
R2508
Width=20mils
1uF CAP 1 RTC_DET#_Q 1 2 1
PWR
2
GND
CH715FPT-GP NP1
1KR2J-1-GP NP1
A
83.R0304.B81 NP2
NP2 A
2nd = 83.00040.E81 Width=20mils AFTP2501 1
3rd = 83.R2004.C81
BAT-060003HA002M213ZL-GP-U1 Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
62.70014.001 application without get Wistron permission
Q2502 <Core Design>
G

D RTC_DET# [24] Wistron Corporation

1

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

R2505 S Taipei Hsien 221, Taiwan, R.O.C.
10MR2J-L-GP 2N7002K-2-GP Title
84.2N702.J31
2

2ND = 84.2N702.031 Flash/RTC

3rd = 84.07002.I31 Size Document Number Rev
4th = 84.2N702.W31 A2
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 25 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = Thermal Sensor 3D3V_S0

Fan controller1
5V_S0

2
1
R2611 FAN261
RN2601 0R2J-2-GP
Vinafix.com SRN2K2J-1-GP T8 5V_S0
1
DY 2 FON# 1
2
FSM#
VIN
GND
GND
8
7
EE Note: FAN_VCC1 3 6
VOUT GND

1
D [24] FAN1_DAC_1 4 5 C2607 C2611 D
1. PURE_KBCT8: PURE_HW_SHUTDOWN# w/o through Q2603.

3
4
Q2604 VSET GND

SCD1U16V2KX-3GP
2. T8: PURE_HW_SHUTDOWN# through Q2603.

SC4D7U6D3V3KX-GP
NCT_CLK 1 6 SML1_CLK [24,34]

2
APL5606AKI-TRG-GP
3. THM_SENSOR: Thermal sensor NCT7718W solution.
2 5 74.05606.A71
(Need to stuff R2601 and DY R2602 for THERM_SYS_SHDN#) 2nd = 74.02113.0E1
T8 pull-high at p.24
3 4
Layout Note:
2N7002KDW -GP (3D3V_S5) Need 10 mil trace width.
NCT_DATA
84.2N702.A3F

3D3V_S0 SML1_DATA [24,34] X04_0513

FAN1
0R0402-PAD 5
[24] FAN_TACH1 1 R2610 2 FAN_TACH1_C 3
2

FAN_VCC1 1

1
C2601 C2602 4
Layout notice : D2601
T8 T8

K
SCD1U16V2KX-3GP

SC10U6D3V3MX-GP
Both DXN and DXP routing 10 mil ETY-CON3-8-GP

RB551V30-GP
2

1
C2608 C2603 20.F1841.003
trace width and 10 mil spacing. Layout Note: SC4D7U6D3V3KX-GP
Signal Routing Guideline: DY DY SC2200P50V2KX-2GP
DY

2
84.T3904.H11 1.H/W T8 Shutdown Trace width = 15mil

A
P2800_DXP AFTP2803
C U2601 X02_0306 1
C
1

C2604
SC470P50V2KX-3GP

83.R5003.H8H
C

R2604 C2605 1 8 NCT_CLK

Q2601 B 2
VDD T8 SCL
7 NCT_DATA
DY T8 DY T8 D+ SDA

1
NTC-100K-8-GP

SC2200P50V2KX-2GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP
LMBT3904LT1G-GP 3 6 ALERT# C2609 C2610
2

T_CRIT# D- ALERT# FAN_TACH1

4 5
DY DY
2

T_CRIT# GND

2
P2800_DXN
X02_0306

1
NCT7718W -GP EC2601 FAN_TACH1_C AFTP2802
2.System Sensor, Put on palm rest
X01 74.07718.0B9 FAN_VCC1
1
1 AFTP2801
DY SCD1U16V2KX-3GP
1

2
R2601
T8 0R2J-2-GP Thermal sensor NCT 7718W
2

Q2603
3D3V_S0 THERM_SYS_SHDN# S
DY_T8
R2605 D PURE_HW _SHUTDOW N# [24,40]
ALERT# R5 2
T8 1 3D3V_S0 0R2J-2-GP 2
DY 1 R2607 SYS_PW ROK_G G

1
C2606
2N7002K-2-GP
18K7R2F-GP
R2609 84.2N702.J31 DY SCD1U16V2KX-3GP

2
R2606 2ND = 84.2N702.031
2
T8 1 3rd = 84.2N702.W31
T_CRIT# R7 2
T8 1
[24,40] SYS_PW ROK

0R2J-2-GP
B 2KR2F-3-GP X01 B

X04_0513KBC T8

1
3D3V_AUX_KBC
R2603
0R0402-PAD
R2615 1 2 2KR2J-1-GP
DY

2
THERM_SYS_SHDN# R2602 1 2 0R2J-2-GP
DY VD_OUT1# [24]

Close to Thermal sensor

EE Note:
R2608 need to fine tune base on thermal test.
3D3V_AUX_S5 3D3V_AUX_KBC

Close to KBC
1

R2614 R2608
VD_IN1 for system thermal sensor
DY 24K9R2F-L-GPT8_KBC
24K9R2F-L-GP Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
2

application without get Wistron permission

A VD_IN1 [24] A
1

Wistron Corporation
1

R2612 C2612 C2613

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
NTC-100K-8-GP T8_KBC T8_KBCSCD1U16V2KX-3GP T8_KBC
SC100P50V2JN-3GP Taipei Hsien 221, Taiwan, R.O.C.
X04_0513
2

69.60035.041
2

Title
VD_IN1_C 1 R2613 2
0R0402-PAD Thermal/Fan control
Size Document Number Rev
A3
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 26 of 109
5 4 3 2 1
 5 4 3 2 1

SSID = AUDIO

Vinafix.com
D D

moat
EC2710 1 DY2 SCD1U50V2KX-1-GP

X04_0513 EC2707 1 DY2 SCD1U50V2KX-1-GP

1D5V_S0 DVDD_1D5V
EC2706 1 DY2 SCD1U50V2KX-1-GP
R2701
[29] LINE1_VREFO_R Sorting CAP MIC2_VREFO [29]
10R0402-PAD2
AUD_AGND EC2705 1 DY2 SCD1U50V2KX-1-GP
[29] LINE1_VREFO_L
Close pin9

SC10U6D3V3MX-GP
SC2D2U10V3KX-1GP
EC2704 1 DY2 SCD1U50V2KX-1-GP
[29] AUD_HP1_JACK_L
2

2
C2714 C2721
+5V_AVDD 5V_S0

1
[29] AUD_HP1_JACK_R

SCD1U16V2KX-3GP

1 C2705

1 C2702
EC2703 1 SCD1U50V2KX-1-GP
SC10U6D3V3MX-GP

DY2
1

1
C2704 R2704
SC1U10V2KX-1GP 100KR2J-1-GP 1 R2703 2

0R0603-PAD AUD_AGND
1 2
X04_0513

1
C2710 C2711

SCD1U16V2KX-3GP

SC4D7U6D3V3KX-GP
Layout Note:

2
Place close to Pin 26

1
Sorting CAP C2703 +3V_AVDD

AUD_VREF

LDO1_CAP
+5V_AVDD

CPVEE
SC1U10V2KX-1GP
X04_0513

CBN
AUD_AGND

2
3D3V_S0 +3V_AVDD
R2713
AUD_AGND X04_0513
Sorting CAP
moat

36

35

34

33

32

31

30

29

28

27

26

25
10R0402-PAD2 U2701

CPVEE

HPOUT-L/PORT-I-L

LINE1-VREFO-L

MIC2-VREFO

LDO1-CAP

AVDD1

AVSS1
CPVDD

CBN

HPOUT-R/PORT-I-R

LINE1-VREFO-R

VREF
25mA for CPVDD & DVDD 1 R2706 2
1

0R0603-PAD
C C2701 CBP 37
CBP LINE2_L/PORT-E-L
24 X04_0513 C
SC4D7U6D3V3KX-GP
2

Close pin36 AUD_AGND 38

AVSS2 LINE2_R/PORT-E-R
23

1 2 LDO2_CAP 39 22
moat
AUD_AGND LDO2-CAP LINE1_L/PORT-C-L LINE1_L [29] 3D3V_S5
C2712 SC10U6D3V3MX-GP
+3V_1D5V_AVDD 40 21 AUD_AGND Layout Note:
AVDD2 LINE1_R/PORT-C-R LINE1_R [29] R2711
Tied at point only under
5V_S0 41 20 CPVREF 10R0402-PAD2
5V_S0 PVDD1 NC#20 Codec or near the Codec
1.5A [29] AUD_SPK_L+
AUD_SPK_L+ 42
SPK-OUT-L+ MIC-CAP
19 MIC_CAP 1 2 AUD_AGND
Sorting CAP 10/1 add C2713 SC10U6D3V3MX-GP
AUD_SPK_L-
71.03234.003
3D3V_S0 [29] AUD_SPK_L-
43
SPK-OUT-L- MIC2_R/PORT-F-R/SLEEVE
18
SLEEVE [29] Layout Note:
C2706 C2707 C2708 C2709 AUD_SPK_R- 44 17 Width>40mil, to improve
SPK-OUT-R- MIC2_L/PORT-F-L/RING
1

[29] AUD_SPK_R- RING2 [29]

SC4D7U6D3V3KX-GP

SCD1U16V2KX-3GP

SC4D7U6D3V3KX-GP

SCD1U16V2KX-3GP

R2719 AUD_SPK_R+
Headpohone Crosstalk noise
45 16
1KR2J-1-GP [29] AUD_SPK_R+ SPK-OUT-R+ MONO-OUT
DY
2

EC side have two EC_MUTE# JDREF R2707 1 2 20KR2F-L-GP

R2708
5V_S0 46
PVDD2 SPDIFO/FRONT_JD/JD3/GPIO3
15 DY AUD_AGND

GPIO0/DMIC-DATA
2

GPIO1/DMIC-CLK
1 2 EAPD# 47 14
[24] AMP_MUTE# PDB 1.5V 1.5V MIC2/LINE2_JD/JD2

SDATA-OUT
0R0402-PAD COMBO-GPI 48 13 AUD_SENSE_A 1 2 AUD_SENSE
SPDIF-OUT/GPIO2 HP/LINE1_JD/JD1 AUD_SENSE [29]

LDO3-CAP

SDATA-IN
X04_0513

DVDD-IO
1

PCBEEP
RESET#
49 R2709
R2712 GND

DVDD

SYNC
DVSS

BCLK
200KR2J-L1-GP
Layout Note: Layout Note: DY10KR2J-3-GP 3D3V_S0
Close pin41 Close pin46 remove D2702 R2710 R2711 Add R2708_0R(PDB pin)
1 ALC3234-CG-GP
Layout Note:
2

10

11

12
TP2702 3D3V_S0 Place close to Pin 13

1
TPAD14-OP-GP AUD_PC_BEEP

LDO3_CAP
DVDD_1D5V R2702
100KR2J-1-GP
moat
moat X04_0513

C2718
C2717

SCD1U16V2KX-3GP
C2716

2
3D3V_S0 1D5V_S0 +3V_1D5V_AVDD

C2719
SC4D7U6D3V3KX-GP
R2705

1
2

2
10R0402-PAD2
AUD_SENSE_A

2
1

R2710 1 DY 2 0R2J-2-GP

SC4D7U6D3V3KX-GP
B C2715 Sorting CAP B
X04_0513

SCD1U16V2KX-3GP
Add R2710 DY(3D3V_S0) SC4D7U6D3V3KX-GP
2

Close pin40
AUD_AGND 1 2 DMIC_DATA_R
[55] DMIC_DATA R2714 0R0402-PAD
1 2 DMIC_CLK_R
[55] DMIC_CLK R2716 0R0402-PAD
2

[19] HDA_SDOUT_CODEC
C2723 Sorting CAP
DY [19] HDA_BITCLK_CODEC
SC22P50V2JN-4GP R2718
1

1 2 HDA_SDIN0_CODEC
[19] HDA_SDIN0_CPU 75R2F-2-GP
Close pin3 [19] HDA_SYNC_CODEC
X03_0318 HDA_SYNC_CODEC

Azalia I/F EMI [19,29] HDA_RST#_CODEC

HDA_RST#_CODEC

D2701
RN2701 HDA_SPKR_R 1
HDA_SDOUT_CODEC 2 3
[19] HDA_SPKR
1 4 3 AUD_PC_BEEP_C 1 2 AUD_PC_BEEP
[24] KBC_BEEP
HDA_BITCLK_CODEC C2720 SCD1U16V2KX-3GP
SRN0J-6-GP KBC_BEEP_R 2
EC2708 EC2709 Sorting CAP
1

1
BAT54C-7-F-3-GP
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

DY DY 75.00054.E7D R2717
1KR2J-1-GP
2

2nd = 075.00054.0C7D

2
3rd = 75.00054.A7D

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Audio Codec ALC3234

Size Document Number Rev
A2 A00
Iris BSW
Date: Thursday, May 28, 2015 Sheet 27 of 109
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

Blanking
B B

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

(Reserved)
Size Document Number Rev
A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 28 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = Audio

Speaker
Layout Note:
Speaker trace width >40mil @ 2W4ohm speaker power
Vinafix.com SPK1
5
R2904 1 20R3J-0-U-GP AUD_SPK_R+_C 1
[27] AUD_SPK_R+
D D
R2903 1 20R3J-0-U-GP AUD_SPK_R-_C 2
[27] AUD_SPK_R- R2902 1
[27] AUD_SPK_L+ 20R3J-0-U-GP AUD_SPK_L+_C 3
R2901 1 20R3J-0-U-GP AUD_SPK_L-_C 4 CONN Pin Net name
[27] AUD_SPK_L-
6
Pin1 SPK_R+
ACES-CON4-29-GP
20.F1639.004 Pin2 SPK_R-
A00_0604 Pin3 SPK_L+

EC2901

EC2902

EC2903

EC2904
SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP
1

1
Pin4 SPK_L-

2
AUD_SPK_L-_C 1 AFTP2901
AUD_SPK_L+_C 1 AFTP2902
AUD_SPK_R-_C 1 AFTP2903
AUD_SPK_R+_C 1 AFTP2904

X01

C
Main Func = Audio C
Universal Jack
RN2901
1 4
(Global Headset Jack + mic phone in + line in support)
[27] MIC2_VREFO
2 3

SRN2K2J-1-GP Audio jack on I/O Board.

[27] RING2 0R0603-PAD2 1 R2906 RING2_R
R2908 1 RING2_R [66]
[27] AUD_HP1_JACK_L 2 10R2F-L-GP AUD_HP1_JACK_L1 0R0603-PAD2 1 R2907 AUD_PORTA_L_R_B AUD_PORTA_L_R_B [66]
[27] LINE1_L C2907 1 2 LINE1-L_C R2922 1 2 1KR2J-1-GP
SC4D7U6D3V3KX-GP R2912 1 2 4K7R2J-2-GP JACK_PLUG
[27] LINE1_VREFO_L JACK_PLUG [66]
R2910 1 2 10R2F-L-GP AUD_HP1_JACK_R1 0R0603-PAD2 1 R2909 AUD_PORTA_R_R_B AUD_PORTA_R_R_B [66]
[27] AUD_HP1_JACK_R C2908 1
[27] LINE1_R 2 LINE1-L_R R2921 1 2 1KR2J-1-GP 0R0603-PAD2 1 R2911 SLEEVE_R
SLEEVE_R [66]
SC4D7U6D3V3KX-GP
R2913 1 2 4K7R2J-2-GP
[27] LINE1_VREFO_R
SC100P50V2JN-3GP
EC2907

SC100P50V2JN-3GP
EC2906

SC100P50V2JN-3GP
EC2905
1

1
SC100P50V2JN-3GP
EC2908

10KR2J-3-GP
X04_0513
1

1
10KR2J-3-GP

R2919
[27] SLEEVE
R2920

DY DY DY DY DY DY
Delay circuit
2

2
2

2
JACK_PLUG R2914 1 2 0R0603-PAD AUD_SENSE [27]
B B

AUD_AGND AUD_AGND

1
AUD_PORTA_R_R_B X04_0513 DY C2902

SC10U6D3V3MX-GP
2
AUD_PORTA_L_R_B

RING2_R

JACK_PLUG 5V_PW R_2 3D3V_S0 AUD_AGND

SLEEVE_R
1

R2915 R2918
DY 470KR2J-2-GP DY 100KR2J-1-GP
1

1
ED2901
AZ2025-01H-R7G-GP

ED2902
AZ2025-01H-R7G-GP

ED2903
AZ2025-01H-R7G-GP

ED2904
AZ2025-01H-R7G-GP

ED2905
AZ2025-01H-R7G-GP

R2917 2 0R2J-2-GP
DY DY DY DY DY moat Q2902
1 DY HDA_RST#_CODEC [19,27]
S D SLEEVE_CTRL_D R2916
AUD_AGND 4 3 1 DY 2 0R2J-2-GP SLEEVE [27] Wistron Confidential document, Anyone can not
SLEEVE_CTRL
G G MUTE_CTRL Duplicate, Modify, Forward or any other purpose
5 DY 2
application without get Wistron permission
D S
2

A 6 1 A
1

C2901
2N7002KDW -GP DY
84.2N702.A3F SC1U10V2KX-1GP
Wistron Corporation
2

2nd = 84.DM601.03F 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

3rd = 84.2N702.E3F Taipei Hsien 221, Taiwan, R.O.C.
4th = 84.2N702.F3F
Title

MIC/SPEAKER/AUDIOJACK
Size Document Number Rev
Custom
Iris BSW A00
Date: Thursday, June 04, 2015 Sheet 29 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = LAN

Vinafix.com
D D

C C

Blanking

B B

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

(Reserved)
Size Document Number Rev
A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 30 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = LAN

Vinafix.com
D D

Blanking C

B B

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

(Reserved)
Size Document Number Rev
A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 31 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = Card Reader

3D3V_S0
Vinafix.com 3D3V_CARD_S0

D D

C3201

1
C3202 C3203 SDREFG 1 2

SC4D7U6D3V3KX-GP

SCD1U16V2KX-3GP
C3206 SC1U10V2KX-1GP

2
1 2 V18

SC1U10V2KX-1GP

24

23
4

7
U3201
For EMI
X04_0513

V18

3V3_IN

CARD_3V3

SDREG

XD_D7
XD_CD#
R3205 R3203
[33] SD_WP 1 2 SD_WP_5170 8 15 SD_CLK_5170 1 2 SD_CLK [33]
SP1 SP8
9 SP2 SP9 16
[33] SD_D1 0R0402-PAD 10 18 SD_CMD [33] 0R2J-2-GP
SP3 SP10
[33] SD_D0 11 SP4 SP11 19
C 12 SP5 71.05170.003 SP12 20 SD_D3 [33] C

1
[33] SD_CD# 13 21 SD_D2 [33] EC3201
SP6 SP13
14 SP7 SP14 22 DY SC10P50V2JN-4GP

2
GPIO0
RREF

GND
DM
Layout: close to U3201.

DP
RTS5170-GR-GP

2
3

17

25
USB_HUB_PN4_C 3D3V_CARD_S0

RREF
USB_HUB_PP4_C CR_GPIO0 1 TP3201

1
R3204 C3204 C3205
DY

SCD1U16V2KX-3GP

SCD01U50V2KX-1GP
B 6K2R2F-GP B

2
2

X04_0513
USB_HUB_PN4_C R3201 1 20R0603-PAD USB_HUB_PN4 [34]

A00_0528 Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

A
Wistron Corporation A
USB_HUB_PP4_C R3202 1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
20R0603-PAD USB_HUB_PP4 [34] Taipei Hsien 221, Taiwan, R.O.C.

Title
X04_0513 CardReader RTL5170
Size Document Number Rev
A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 32 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = Card Reader

X01
Vinafix.com 3D3V_CARD_S0
CARD1

D
400mA D
4 VDD NP1 NP1
3D3V_CARD_S0 NP2
NP2
[32] SD_CMD R3306 1 2 0R0402-PAD SD_CMD_R 2 CMD
[32] SD_CLK 5 12 1 AFTP3301
CLK 12
[32] SD_CD# R3301 1 2 0R0402-PAD SD_CD#_R 10 CD 13 13
[32] SD_WP 11 WP 14 14
1

1
C3301 C3302 C3303 15
R3302 1 0R0402-PAD SD_D0_R 15
2 7
DY [32] SD_D0 DAT0

SC10U10V5KX-2GP
SCD1U16V2KX-3GP

SC4D7U6D3V3KX-GP

[32] SD_D1 R3303 1 2 0R0402-PAD SD_D1_R 8

2

2 DAT1
[32] SD_D2 R3304 1 2 0R0402-PAD SD_D2_R 9 3
R3305 1 0R0402-PAD SD_D3_R DAT2 VSS
[32] SD_D3 2 1 CD/DAT3 VSS 6

CARDBUS11P-SKT-8-GP
X04_0513
MAIN = 020.I0002.0001
2ND = 062.10002.0251
C C
SD_CMD_R 1 AFTP3302
SD_CLK 1 AFTP3303
SD_CD#_R AFTP3304
For EMI Reserved SD_WP
1
1 AFTP3305
SD_D0_R 1 AFTP3306
SD_D1_R 1 AFTP3307
SD_WP SD_D2_R 1 AFTP3308
SD_D3_R 1 AFTP3309

SD_D0_R

SD_CD#_R

SD_CMD_R

SD_D3_R
B B

SD_D2_R

SD_D1_R
EC3304

EC3305

EC3306

EC3307

EC3303

EC3301

EC3302
SC4D7P50V2BN-GP

SC4D7P50V2BN-GP

SC4D7P50V2BN-GP

SC4D7P50V2BN-GP

SC4D7P50V2BN-GP

SC4D7P50V2BN-GP

SC4D7P50V2BN-GP
1

DY DY DY DY DY DY DY
2

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Card Reader CONN

Size Document Number Rev
A4
Iris BSW A00
Date: Monday, June 01, 2015 Sheet 33 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = USB3.0 Port1 Main Func = USB2.0 Port2

A00_0528
USB20_DP0_C
[16] USB_CPU_PP0

5V_USB30

1
TR3404
2
Vinafix.com
USB20_DP0_C 1
EU3401

I/O1 I/O4
6 USB20_DN0_C USB30_RXDN0_C
USB30_RXDP0_C
1
2
EU3402

IN1 NC#10
10
9
USB30_RXDN0_C
USB30_RXDP0_C
USB connector on I/O Board.
IN2 NC#9
D 2 5 3 8 D
4 3 068.02012.2011 GND VDD USB30_TXDN0_C 4
GND GND
7 USB30_TXDN0_C
USB30_TXDP0_C IN3 NC#7 USB30_TXDP0_C
3 4 5 6
I/O2 I/O3 IN4 NC#6

1
FILTER-4P-183-GP C3418

AZC099-04S-2-GP SCD1U16V2KX-3GP TVWDF1004AD0-1-GP

2
75.01004.073
USB20_DN0_C 075.09904.0A7C
[16] USB_CPU_PN0
2nd = 075.00005.0B7C X02_0212
A00_0528 X04_0513
X03_0409
X04_0513
R3403 R3405
1 2 USB30_TXDN0_R 1 2 USB30_TXDN0_C 1 2 USB30_RXDN0_C
[16] USB30_TX_CPU_N0 [16] USB30_RX_CPU_N0
C3401
SCD1U16V2KX-3GP 0R0402-PAD 0R0402-PAD

Main Func = USB2.0 Port3

A00_0528
A00_0528

R3404 R3406
1 2 USB30_TXDP0_R 1 2 USB30_TXDP0_C 1 2 USB30_RXDP0_C
[16] USB30_TX_CPU_P0 [16] USB30_RX_CPU_P0
C3402
SCD1U16V2KX-3GP 0R0402-PAD 0R0402-PAD
X04_0513 X04_0513
C
5V_USB30 1 AFTP6210
USB 3.0 Connector
USB connector on I/O Board. C

5V_USB30
USB1 (USB 3.0) USB20_DN0_C
USB20_DP0_C
1
1
AFTP6211
AFTP6212 Pin definition
USB1 USB30_TXDP0_C 1 POWER
USB30_TXDN0_C
1 2 USB20_DN0_C 2 USB 2.0 D-
VBUS D- USB20_DP0_C
3
D+
3 USB 2.0 D+
USB30_RXDN0_C 5
USB30_RXDP0_C STDA_SSRX-
6 7 1 4 GND

1
STDA_SSRX+ GND_DRAIN C3421 C3420
USB30_TXDN0_C 8 DY DY 5 StdA_SSRX- SuperSpeed RX
STDA_SSTX- SC4D7P50V2BN-GP

SC4D7P50V2BN-GP
USB30_TXDP0_C 9 10
2

2
STDA_SSTX+ GND
GND
11 6 StdA_SSRX+
12 4 1 AFTP6217
CHASSIS#12 GND
13
CHASSIS#13 7 GND
8 StdA_SSTX- SuperSpeed TX
SKT-USB13-111-GP-U
9 StdA_SSTX+
22.10339.S21

3D3V_HUB 3D3V_S5
Main Func = USB Hub
R3410 1 2 0R2J-2-GP
DY X03_0319 X04_0513
3D3V_HUB 3D3V_HUB
R3420
X04_0513
R3415
5V_S5 U3405 AVDD5V USB_HUB_PN_CPU 1 2 1 2 DVDD1_HUB
AVDD5V 3D3V_S0 USB_CPU_PN1 [16]
X03_0319 USB20_VCCA 0R0603-PAD
0R0402-PAD
B 5 1 B
IN OUT

1
2 C3406 C3407 C3408 C3409 C3410 C3411 C3412
R3424
1

GND
4 3
1

EN# OC#

SC10U6D3V3MX-GP
R3407 R3425 C3419

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP
1 DY 2

2
10KR2J-3-GP
DY 10KR2J-3-GP
SC1U10V2KX-1GP X040_0512 From CPU
2

SY6288DAAC-GP AVDD5V 0R2J-2-GP 5V_S5

A00_0528
2

074.06288.009B
[24] USB_HUB_EN# R3411 1
2nd = 074.22802.0A9F DY 2 0R2J-2-GP
R3423
R3414
1

HUB_RESET# C3414 USB_HUB_PP_CPU

1 2
KBC_HUB_RESET# [24] X03_0409 1 2 USB_CPU_PP1 [16]
Close to IC
SC2D2U10V3KX-1GP 0R0603-PAD
2
1

0R0402-PAD
1

C3403 R3419 R3426 2 1K6R2F-GP HUB_XSCO_1

X04_0513 1
SC1U10V2KX-1GP

47KR2J-2-GP
2

X04_0513
2

X3401
C3415
AVDD5V 3D3V_HUB 1 2 HUB_XSCO 1 4
U3401 3D3V_HUB
SC22P50V2JN-4GP
USB_HUB_PP_CPU
5
9
AVDD
AVDD
DP0
DM0
2
1 USB_HUB_PN_CPU X03_0323 2 3
14 4
DVDD1_HUB 21
AVDD
DVDD
DP1
DM1
3
USB_HUB_PP1
USB_HUB_PN1
[61]
[61] WLAN
7 XTAL-12MHZ-67-GP
USB_HUB_PP4 [32] Card Reader

1
AVDD5V DP2
27
V5 DM2
6 USB_HUB_PN4 [32] 82.30006.641
1

C3405 R3413 R3416 R3417 R3418

1 : self power 3D3V_HUB DP3
13 USB_HUB_PP3 [66] USB 2.0 Port3 C3416
1 : Gang Mode 28
V33 DM3
12 USB_HUB_PN3 [66] DY DY

30KR2F-GP

30KR2F-GP

30KR2F-GP

30KR2F-GP
HUB_XSCI
0 : bus power SCD1U16V2KX-3GP 16 USB_HUB_PP2 [66] USB 2.0 Port2
1 2
2

DP4
0 : Individual Mode 15 USB_HUB_PN2 [66]

2
3D3V_HUB HUB_XSCI DM4 SC22P50V2JN-4GP
10
HUB_XSCO_1 X1 OVCUR1# R3421 1 OVCUR1#
11 25 20R0402-PAD SML1_CLK [24,26]
X2 OVCUR1#/SMC OVCUR2# R3422 1
24 20R0402-PAD SML1_DATA [24,26]
1

HUB_PGANG HUB_RREF OVCUR2#/SMD OVCUR3# OVCUR2#

8 20
R3408 HUB_RESET# RREF OVCUR3# OVCUR4#
17 19
HUB_PSELF RESET# OVCUR4# OVCUR3#
22
PSELF
1

A 10KR2J-3-GP HUB_PGANG A
23
R3412 R3409 PGANG OVCUR4#
X04_0513
2

1 HUB_TEST/SCL 18
TP3401 TEST/SCL
HUB_PSELF 100KR2J-1-GP 619R2F-L1-GP 1 HUB_SDA 26 29 Wistron Confidential document, Anyone can not
TP3402 SDA GND Duplicate, Modify, Forward or any other purpose
If the pin is floating, the corresponding
2

application without get Wistron permission

GL850G-OHY31-GP port will be set as non-removable
X02_0205
Wistron Corporation
Main source:GL850G-50 (071.0850G.0003) 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

USB2.0/3.0 CONN/USB Hub

Size Document Number Rev
A2
Iris BSW A00
Date: Friday, June 05, 2015 Sheet 34 of 109
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C
Blanking C

B B

Wistron Confidential document, Anyone can not

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application without get Wistron permission
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

USB3.0 CONN (Reserved)

Size Document Number Rev
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 35 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = USB3.0Vinafix.com

D D
5V_USB30 USB3.0 Port1

1 R3501
1

1
C3510 DY C3506 C3507 C3508 C3509 TC3502
100KR2J-1-GP DY

SCD1U16V2KX-3GP
SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC100U6D3V6MX-GP
2

2
78.10710.52L

X02_0212
X02_0212
C C
5V_S5 U3504 5V_USB30

5 IN OUT 1
GND 2
4 EN# OC# 3 USB_OC#0 [16]
1

C3517

SC1U10V2KX-1GP
2

SY6288DAAC-GP
074.06288.009B X04_0512
2nd = 074.22802.0A9F X03_0409
[24] USB_PWR_EN#

B B

Main Func = USB2.0

5V_S5 U3503 USB20_VCCA USB20_VCCA

USB2.0 Port2
5 IN OUT 1
GND 2
1

4 EN# OC# 3 USB_OC#1 [16]

1

1
C3516 R3503 C3504 C3505
DY DY
SCD1U16V2KX-3GP

SC1U10V2KX-1GP
100KR2J-1-GP

SC1U10V2KX-1GP
X04_0512
2

2
SY6288DAAC-GP
2

A
074.06288.009B Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2nd = 074.22802.0A9F X03_0409 Taipei Hsien 221, Taiwan, R.O.C.
[24] USB_PWR_EN#
Title

USBPowerSW
Size Document Number Rev
A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 36 of 109
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

Blanking
C C

B B

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

USB2.0 HUB(Reserved)
Size Document Number Rev
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 37 of 109
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

Blanking
B B

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

(Reserved)
Size Document Number Rev
A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 38 of 109
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

Blanking
B B

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

(Reserved)
Size Document Number Rev
A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 39 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = Power Plane & Sequence 3D3V_S5

2014/10/09
PH at page 40.

1
A00_0528 PR5218
10KR2J-3-GP

2
1 R3703 2 3D3V_S5_PRIME_EN

Power Good
3D3V_S5 5V_S5 [52] 1D8V_S5_PG

5V_S0 0R0402-PAD

1
3D3V_S5
[54] PWR_1D24V_POK
1 DY 2 DY SCD1U16V2KX-3GP
C3716
1D8V_S0

2
3D3V_S0 R3706 0R2J-2-GP

Vinafix.com
1

1
C3633 C3606 C3632 C3607

1
DY DY
3D3V_S5_PRIME
SC1U10V2KX-1GP

SC22U6D3V5MX-2GP

SC1U10V2KX-1GP

SC22U6D3V5MX-2GP
R3601 PU 3D3V_S5 in VR side
2

2
1D8V_S5
A00_0527 DY 1KR2J-1-GP 1D8V_S0 A00_0528 1D5V_S0

2
D 1D8V_S0 R3704 1 2 0R0603-PAD D
1 R3611 2 3D3V_S0
[46] IMVP_PWRGD ALL_SYS_PWRGD [24]
1D8V_S0

1
5V_S5 5V_S5 C3701 C3702
U3601 0R0402-PAD R3705 DY

SC1U10V2KX-1GP

SC22U6D3V5MX-2GP
5V_S0

SC10U6D3V3MX-GP
5V_S0 Comsumption 2 1

1
15 C4001
1
GND
14 Peak current 6A D3602 10KR2J-3-GP
R3612 2
VIN1#1 VOUT1#14
13 BAS16-6-GP X02_0205

2
VIN1#2 VOUT1#13

C3603
SC10U6D3V3MX-GP
1 2 RUN_ON_R 3 12 3V5V_CT1 3D3V_S0 Comsumption 2 U3701
[18,24,48,51,53] PM_SLP_S3# ON1 CT1

1
4 11 3D3V_S0
0R0402-PAD 5
VBIAS GND
10 3V5V_CT2 Peak current 2.5A 3 PURE_HW_SHUTDOWN# [24,26]
1D5V_S0 15
ON2 CT2 GND
3D3V_S5 6 9 1 14

2
VIN2#6 VOUT2#9 VIN1#1 VOUT1#14
1

C3604 7 8 [45] 3V_5V_EN 1 R3701 2 13

VIN2#7 VOUT2#8 VIN1#2 VOUT1#13

C3601
SC470P50V2KX-3GP

C3602
SC470P50V2KX-3GP

C3605
SC10U6D3V3MX-GP
DY 83.00016.K11 2 DY 1 1D8V_S0_EN 3 12 VTT_CT_1D8VC
ON1 CT1

1
SC22P50V2JN-4GP

2ND = 83.00016.F11 4 11
A00_0528 5V_S5
2

VBIAS GND

1
TPS22966DPUR-GP 1 2 S5_ENABLE [24] 10KR2J-3-GP 3D3V_S5_PRIME_EN 5 10 VTT_CT_3D3V_S5_PRIME
R3602 ON2 CT2
6 9
74.22966.093 3D3V_S5

2
R3603 VIN2#6 VOUT2#9
DY 7
VIN2#7 VOUT2#8
8

1
200KR2J-L1-GP 1KR2J-1-GP C3715 3D3V_S5_PRIME C3703 C3704
Hi:1.05V X02_0210 DY DY DY

SC330P50V2KX-3GP

SC330P50V2KX-3GP
Lo:0.6V SC22P50V2JN-4GP C3705 C3706 TPS22966DPUR-GP

2
DY 74.22966.093

SC1U10V2KX-1GP

SC22U6D3V5MX-2GP
Hi:1.05V

1
Lo:0.6V C4002

SC10U6D3V3MX-GP
3D3V_S5_PRIME

2
DDR3_VCCA_PWRGD X04_0513 Discharge circuit
1
R3627
2
COREPWROK
From EC [24,26] SYS_PWROK COREPWROK [18,99] 1D5V_S0
0R0402-PAD

1
1D35V_S3 R3605
Q3610 DY 220R3J-1-GP
[18] PM_SLP_S3#_CPU_D G

2
D 1D5V_DIS_Q

1
S
C R3621
DY C
2N7002K-2-GP
10KR2J-3-GP 3D3V_S5
84.2N702.J31
2ND = 084.27002.0A31
2 DDR3_VCCA_PWRGD 3rd = 84.2N702.W31

1
DDR3_VCCA_PWRGD [5]
R3620
10KR2J-3-GP
Q3612

2
3 4

2 5 DDR3_VCCA_PWRGD_G

1 6
2

R3608
100KR2J-1-GP 2N7002KDW-GP
84.2N702.A3F
1

2nd = 084.27002.003F
3rd = 84.2N702.E3F

DDR3_DRAM_PWROK 1D35V_S3

1D35V_S3

Discharge circuit

1
R4048
X04_0513 1KR2J-1-GP
1

B R3614 B
R3623 3D3V_S5_PRIME PM_SLP_S3#_CPU_D [18]
1 2 1D35V_S3_PWRGD [51]

1D35V_S3_DISCHG 2
10KR2J-3-GP 0R0402-PAD 0D675V_S0
2

2
2014/10/09 Fine tune 3D3V_S5_PRIME_PG
R3632 DY
DDR3_DRAM_PWROK [5]

1
4K7R2J-2-GP R3633
R3631 1KR2J-1-GP

1
3D3V_S5_PRIME_PG_1 1 DY 2
A00_0527 3D3V_S5_PRIME_PG [24]
1

0D675V_S0_DISCHG 2
R3619 0R2J-2-GP

4
0R0402-PAD Q3618
2N7002KDW-GP
Q3613 84.2N702.A3F
2

1
S 2nd = 084.27002.003F
C3638 DY 3rd = 84.2N702.E3F

3
DDR3_DRAM_PWROK_D D

2
SCD1U16V2KX-3GP
G PM_SLP_S4#_CPU_D [18]
2N7002K-2-GP
84.2N702.J31 PM_SLP_S4#_CPU_D [18]
2ND = 84.2N702.031

Need verify EC code on EVT first build

From 3V 5V VR R3615
[18,45] 3V_5V_POK 1 2

0R0402-PAD A00_0528

R3616 1 DY 2 0R2J-2-GP
From EC
Q3617
[24] SUSPWRDNACK_SOC_EC SUSPWRDNACK_SOC_EC G
DY
D
2

1D05V_VNN_EN [50,52]
R3617
100KR2J-1-GP S
A DY A

2N7002K-2-GP
1

84.2N702.J31
2ND = 084.27002.0A31
3rd = 84.07002.I31

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21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

PWR Plane Enable & Sequence

Size Document Number Rev
A1
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 40 of 109
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

Blanking
B B

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A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

(Reserved)
Size Document Number Rev
A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 41 of 109
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

Blanking
B B

Wistron Confidential document, Anyone can not

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application without get Wistron permission

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

(Reserved)
Size Document Number Rev
A
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 42 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = M-BAT Input

Placement: Close to Batt Connector Vinafix.com BT+

D D

K
1

1
PBAT_SMBCLK1
EC4304 EC4303 EC4306 EC4307 EC4308

PBAT_PRES1#

PBAT_SMBDAT1
DY PD4302

SCD1U25V2KX-GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP
SCD1U50V3KX-GP DY SMF18AT1G-GP
Battery Connecter

A
SYS_PRES1# 1 AFTP3901
BATT1 PBAT_PRES1# 1 AFTP3902

3
9 PBAT_SMBDAT1 1 AFTP3903
D4302 D4303 D4301 pull-high at p.44 1 PBAT_SMBCLK1 1 AFTP3904
LBAV99LT1G-1-GP LBAV99LT1G-1-GP LBAV99LT1G-1-GP RN4301
(3D3V_AUX_KBC) 4 5 2
3 6 PBAT_SMBCLK1 3 BT+ 1 AFTP3905
[24,44] BAT_SCL
2 7 PBAT_SMBDAT1 4 BT+ 1 AFTP3907
[24,44] BAT_SDA

2
1 8 PBAT_PRES1# 5 BT+ 1 AFTP3908
[24,44] BAT_IN#
SYS_PRES1# 6
3D3V_AUX_KBC SRN100J-4-GP 7
R4301 8

1
EC4301 EC4302 EC4305 10

1
SC10P50V2JN-4GP

SC10P50V2JN-4GP

SC10P50V2JN-4GP
DY DY DY 0R0402-PAD SYN-CON8-9-GP-U
75.00099.O7D 75.00099.O7D 75.00099.O7D 20.81153.008

2
2nd = 75.00099.K7D 2nd = 75.00099.K7D 2nd = 75.00099.K7D
1 AFTP3906
3rd = 75.00099.Q7D 3rd = 75.00099.Q7D 3rd = 75.00099.Q7D 1 AFTP3909
1 AFTP3910
4th = 75.00099.D7D 4th = 75.00099.D7D 4th = 75.00099.D7D
X04_0513

C C

Main Func = ADT Input

5V_S5

1
PR4202 84.T3904.H11 PR4203
3D3V_S5
15KR2F-GP 10KR2J-3-GP

E
3D3V_S5

2
PQ3802_1 B PQ4202

1
LMBT3904LT1G-GP

2
PD4203

1
PR4209 PSID_DISABLE#_R_C LBAV99LT1G-1-GP
PR4204
100KR2J-1-GP 75.00099.O7D
Layout Note: 4th = 75.00099.D7D 2K2R2J-2-GP

G
1

3
PSID Layout width > 25mil

2
PQ4201 84.05067.031 2nd = 75.00099.K7D
PR4217 PR4205
PS_ID_R 1 2 PS_ID_R2 D S PS_ID 1 2
3rd = 75.00099.Q7D
PSID_EC [24]
JGND 0R0805-PAD-2-GP-U 0R0603-PAD 33R2J-2-GP
DMN5L06K-7-GP
2

1
EL4203 A00_0527 DY PD4204
1 2 PR4206
PESD24VS2UT-GP 1 DY 2
EL4204
1 2 33R2J-2-GP
3

0R0805-PAD-2-GP-U

B DCIN1 B
8 1 AFTP3804
6 1 AFTP3806
AFTP3803
5
4
1
+DC_IN_C 60ohm@100MHz
3 DCR=0.02 ohm +DC_IN AD+
2
Max current = 6000mA PU4201
1 1 S D 8
7 2 S D 7
S D

PC4205

PC4203

PC4204
X01 3 6

SCD01U50V2KX-1GP

SCD01U50V2KX-1GP

SCD01U50V2KX-1GP
K
1

ACES-CON6-63-GP 4 G D 5
1

1
EC4201 EC4202 PR4214 PD4201 PC4202 PC4206

1
20.F2132.006 DY PR4207 SI7121DN-T1-GE3-GP
SCD1U25V2KX-GP
SC10U25V5KX-GP

3K3R6J-GP P6SBMJ27APT-GP SCD1U50V3KX-GP PC4201 SC10U25V5KX-GP

ZZ.00PAD.V91
2

2
83.P6SBM.DAG 240KR3-GP
2

2
SC1U50V5ZY-1-GP-U
EL4201 Id=-9.6A

2
PAD-2P-4516-GP-U PQ3809_D 2ND = 83.22R03.03G Qg=-25nC
JGND JGND JGND Rdson=18~30mohm

PQ4206
S
1

1
D PR4208
ZZ.00PAD.V91 PQ4205 R2
G PQ4204 E 47KR3J-L-GP
EL4202 C AD_OFF_L B

2
R1
PAD-2P-4516-GP-U 2N7002K-2-GP B R1 C AD_OFF_R
84.2N702.J31 E
PWR_CHG_AD_OFF_R

2ND = 84.2N702.031 R2 PDTA124EU-1-GP

PDTC124EU-1-GP 84.00124.K1K
84.00124.H1K 2nd = 84.00024.01K
2nd = 84.00024.A1K

X03_0409
[24] PWR_CHG_AD_OFF
1 2
X03_0409
PR4210
A 1KR2J-1-GP A

Wistron Confidential document, Anyone can not

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application without get Wistron permission

AFTP3801
AFTP3805
1 +DC_IN_C
+DC_IN_C
Wistron Corporation
1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
AFTP3807 1 +DC_IN_C Taipei Hsien 221, Taiwan, R.O.C.
AFTP3802 1 PS_ID_R Title

DC JACK & BATT CONN

Size Document Number Rev
A2
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 43 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = Charger

PWR_CHG_CMPIN

1
PR4429
309KR2F-GP

PWR_CHG_CMPIN_R 2
AD+_TO_SYS DCBATOUT BT+
PU4403
1 S D 8
PU4402 PR4402 2 S D 7

2N7002KDW-GP
AD+ 8 D
7 D
6 D
5 D
S
S
S
G
1
2
3
4
Vinafix.com 1 2
D01R3721F-GP-U AD+
3
4
S
G
D
D
6
5
Id= -10A
3 4
Qg= -22nC

1
CHG_AGND SI7121DN-T1-GE3-GP
D Rdson=15~18mohm D

1
PR4405
[24] AD_IA_HW2 2 5 AD_IA_HW [24] SI7121DN-T1-GE3-GP PR4403
84.07121.037
470KR2J-2-GP

GAP-CLOSE-PWR-3-GP
1 6
84.07121.037 100KR2J-1-GP 2nd = 84.03605.037

1
PWR_CHG_CMPIN_RR 2nd = 84.03605.037

2
PR4404 AD+_G_2

1
2 2
PQ4407

PG4402
3KR5J-GP Id= -10A PG4403
CHG_AGND 4th = 84.DMN66.03F GAP-CLOSE-PWR-3-GP
3rd = 75.00601.07C Qg= -22nC PR4406
10KR2F-2-GP

2
2nd = 84.2N702.E3F Rdson=15~18mohm PR4401 0R2J-2-GP

DC_IN_D
84.2N702.A3F 2 DY 1

1
2N7002KDW-GP

AD+_G_1
1 2
3 4
1

SC1U25V3KX-1-GP
PC4402
PR4427
78K7R2F-GP PWR_CHG_ACOK 2 5 SCD1U25V2KX-GP DCBATOUT

PC4404
1 6

SC4D7U25V5KX-GP
1
AD+

SC1U25V3KX-1-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

SCD1U50V3KX-GP
2

83.1R504.A8F

SC2200P50V2KX-2GP

SCD1U25V2KX-GP
PWR_CHG_CMPIN PQ4402 2nd = 83.1R004.H8F

PC4403

PC4408

PC4406

PC4426

PC4409

EC4402
2

PWR_CHG_ACN
PWR_CHG_ACP

EC4401
3rd = 83.1R504.B8F
4th = 84.DMN66.03F

1
3rd = 75.00601.07C 4th = 83.2R004.08F

1
SCD47U25V3KX-1GP
2nd = 84.2N702.E3F
1

PWR_CHG_REGN
PR4408 CHG_AGND

2
PR4407 84.2N702.A3F A00_0527 PD4401 84.00412.037 DY DY DY

PWR_CHG_BTST_R

2
5
6
7
8
309KR2F-GP 1 2 PWR_CHG_VCC SD103AWS-1-GP

D
D
D
D
CHG_AGND
10R5J-GP PR4409
1 2 K A 1 2 PU4405
X03_0318
2

PC4410
PC4407 SIS412DN-T1-GE3-GP
0R0603-PAD

1
PU4404 SC1U25V3KX-1-GP

ACN
ACP
2
3D3V_AUX_S5 PWR_CHG_REGN

G
S
S
S
PWR_CHG_IOUT 20

SCD047U25V2KX-GP
VCC
1

CHG_AGND

1
2
3D3V_AUX_KBC

PC4411

4
3
2
1
PC4412

PR4411
SCD01U50V2KX-1GP

PR4430
1

1
102KR2F-GP PWR_CHG_ACDET 6 17 PWR_CHG_BTST
DY 100KR2J-1-GP ACDET BTST
1

PR4431
47KR2F-GP
PR4438 100KR2J-1-GP Charger Current=1.4~3.6A
2

2
1

PR4415 PWR_CHG_CMPOUT 16

2
1
REGN
2

PR4412
3K3R2F-2-GP
2

1
PR4413 PR4414 3
3K3R2F-2-GP CMPOUT PWR_CHG_HIDRV
18
HIDRV BT+
169KR2F-L-GP PR4432 3D3MR2J-GP
PC4413 PL4401
2

4 1 2 PR4416
CMPIN PWR_CHG_PHASE SC3300P50V3KX-1GP DY
120KR2F-L-GP PHASE
19 1 2 BT+_R 1 2
2

GAP-CLOSE-PWR-3-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP
CHG_AGND PWR_CHG_CMPIN D01R3721F-GP-U

SCD1U50V3KX-GP
GAP-CLOSE-PWR-3-GP
C IND-5D6UH-45-GP-U C

PC4415

PC4416

PC4417

PC4418

PC4419
CHG_AGND 2 1 PWR_CHG_BAT_SCL 9 15 PWR_CHG_LODRV 68.5R610.10U

2
[24,43] BAT_SCL SCL LODRV

2
PG4407 GAP-CLOSE-PWR-3-GP PU4406

PG4410

1
PG4409
SIS412DN-T1-GE3-GP
DY DY

5
6
7
8
2 1 PWR_CHG_BAT_SDA 8
[24,43] BAT_SDA SDA

D
D
D
D
3D3V_AUX_S5 PG4408 GAP-CLOSE-PWR-3-GP

1
PC4420

2
SCD1U25V2KX-GP
13 PWR_CHG_SRP 1 PR4421 2
PWR_CHG_ILIM SRP
10 10R2F-L-GP
1

ILIM

1
12 PWR_CHG_SRN 1 PR4420 2
PR4417 SRN

G
S
S
S
100KR2J-1-GP 7D5R2F-GP DY
BOOST_MODE# 1 2 PWR_CHG_IFAULT 11
NC#11

4
3
2
1
DY
PR4418
0R2J-2-GP A00_0527 CHG_AGND
2

84.00412.037
1

PR4422
PR4423 5 7 PWR_CHG_IOUT

SCD1U25V2KX-GP
ACOK# IOUT 1 2 AD_IA [24]
59KR2F-GP PWR_CHG_CSOP_1
DY

GND

GND
3D3V_S5 10KR2F-2-GP 0R0402-PAD
DY

SC220P50V2JN-3GP
3D3V_AUX_S5 PR4435

PC4421
1
2

8K45R2F-2-GP
1

21

14

1 PR4424
PR4472 BQ24727RGRR-1-GP
DY 100KR2F-L1-GP GAP-CLOSE-PWR-3-GP

1
1PC4422
CHG_AGND 2 1
2

2
CHG_AGND PG4411 PWR_CHG_CSON_1

SCD1U25V2KX-GP
BAT_IN# [24,43] DY
CHG_AGND

PC4423
2

1
1

CHECK EE DY PC4433 EE need check pull high

2
SCD47U6D3V2KX-GP
2

PWR_CHG_REGN
CHG_AGND
PQ4406_G 3D3V_AUX_S5 CHG_AGND
1

1
1

PQ4414 DY PR4474 PR4434

[18,24,46,48] H_PROCHOT#
DY G 100KR2J-1-GP PR4425
100KR2J-1-GP 100KR2J-1-GP EE need pull high and net name
DY DY
2

1 2 PQ4406_D D
3D3V_AUX_S5 PWR_CHG_REGN
2
2

PR4465 S
Close PR4416

1
0R2J-2-GP

1
[24] AC_IN#
Customer Request
PC4401
SCD1U50V3KX-GP

2N7002K-2-GP PR4419 PR4428

1

B B
100KR2J-1-GP 100KR2J-1-GP
84.2N702.J31
1

PR4433
AD+ DY DY120KR2F-L-GP DY 2N7002KDW-GP

2
PWR_CHG_ACOK
2

3 4
PR4437 A00_0527
2

BT+_R
100KR2J-1-GP

PWR_CHG_CMPOUT1 2PQ4008_2 2 5 AC_IN#

160KR2F-GP

BT+
PR4426
1
PR4469

1 6 PQ4008_6 1 2

1
H_PROCHOT# [18,24,46,48]

GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP
PC4425
0R0402-PAD
DY DY PR4436 PQ4408

SCD01U50V2KX-1GP
2

2
120KR2F-L-GP

2
PG4404

PG4405
4th = 84.DMN66.03F
2

3rd = 75.00601.07C

2
2nd = 84.2N702.E3F

1DCBATOUT_R 1

1
84.2N702.A3F
1

1+VCHGR_R
PR4467
PQ4408_E

1MR2J-1-GP
DY
H_PROCHOT# [18,24,46,48]
2

PD4404
PD4403_K

1N4148WS-7-F-GP PR4466 PR4448 PR4454

APD4403_A B LMBT3906LT1G-1-GP 10R2F-L-GP
K DY
PQ4409 DY 0R2J-2-GP DY 0R2J-2-GP
DY DY
2N7002KDW-GP
C

2
84.T3906.E11 PQ4408_C
2

PR4475 PQ4405_3 3 4 1 DY 2
PR4468 0R2J-2-GP PR4410
PU4401_5

0R2J-2-GP 1 2 PQ4405_2 2 5 PQ4405_5 6D8R2F-GP

DY
DY DY
1
PC4434
SC1U25V3KX-1-GP

1 6
BATTERY MON 1 DY2
1

DY SCD1U25V2KX-GP
PR4464 PQ4410 PR4446 PC4424
2

DY 680KR2J-GP DY PR4476 BOOST_MON_1 1 DY 2PU4401_6

DCBATOUT 0R2J-2-GP 4th = 84.DMN66.03F PU4401_4
1
PC4427
SC1U25V3KX-1-GP

3rd = 75.00601.07C 20KR2F-L-GP

PQ4405_6
2

2nd = 84.2N702.E3F DY
6
5
4

84.2N702.A3F
2
2

PU4407
-
+

PWR_CHG_ACOK DY INA199A1-GP
DY 100KR2F-L1-GP
1

PR4470
1
2
3

PR4473
1

10KR2F-2-GP
CHECK EE DY
DCBATOUT
A A
follow customer circuits.
2

PC4431
SC1U25V3KX-1-GP
1

3D3V_S5
DY
2

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
BQ24727RGRR CHARGER
Size Document Number Rev
Custom
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 44 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = 3D3V_5V

3D3V_AUX_S5

1
PR4501

Vinafix.com 0R2J-2-GP DY

X04_0513

2
PR4530
PR4504 DCBATOUT
D PWR_5V_EN1_R PWR_5V_EN1 PWR_DCBATOUT_5V D
2 DY 1 1 2
DCBATOUT PWR_DCBATOUT_3D3V PG4520
0R2J-2-GP 0R0402-PAD

2
2 1
PG4525 PR4515
GAP-CLOSE-PWR-3-GP
2 1
GAP-CLOSE-PWR-3-GP 0R0402-PAD X04_0513 PG4536

PG4521
X04_0513 2 1

1
PR4506
2 1 GAP-CLOSE-PWR-3-GP
1 2 PWR_3D3V_EN2 PG4518
[40] 3V_5V_EN
GAP-CLOSE-PWR-3-GP 2 1
0R0402-PAD
PG4524
2 1 GAP-CLOSE-PWR-3-GP
PG4534
GAP-CLOSE-PWR-3-GP 2 1
PG4531
2 1 GAP-CLOSE-PWR-3-GP
PG4542
GAP-CLOSE-PWR-3-GP 2 1

GAP-CLOSE-PWR-3-GP
DCBATOUT PG4543
2 1
PWR_DCBATOUT_3D3V GAP-CLOSE-PWR-3-GP

PC4525 PC4528 PC4509 PC4519 PC4531 PWR_DCBATOUT_5V

SCD1U50V3KX-GP

SC10U25V5KX-GP
SC4D7U25V5KX-GP
1

1
SC10U25V5KX-GP

SCD01U50V2KX-1GP
DY DY
Design Current=5.1A
2

2
PC4530 PC4529 PC4527
5.25A<OCP>6A

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP
8
7
6
5

5
6
7
8

1
SIS412DN-T1-GE3-GP

SIS412DN-T1-GE3-GP

SCD1U50V3KX-GP
5V_PWR 5V_S5

D
D
D
D
D
D
D
D
PU4504 PU4501 PG4527

12
2 1

2
PU4503
PC4535 GAP-CLOSE-PWR-3-GP

VIN
PR4528
C SCD1U50V3KX-GP PC4516 Design Current=6.8A PG4519 C

G
S
S
S
2 1PWR_3D3V_BOOT2_1
1 2 PWR_3D3V_BOOT2 SCD1U50V3KX-GP 2 1
S
S
S
G

3D3V_S5 3D3V_PWR 1D5R3-GP PR4524 10A<OCP>11.3A

1
2
3
4

4
3
2
1
PG4526 9 17 PWR_5V_BOOT1 1 2 PWR_5V_BOOT1_1 1 2 GAP-CLOSE-PWR-3-GP
BOOT2 BOOT1 PG4538
2 1 1D5R3-GP
3D3V_PWR 68.3R310.20A PWR_3D3V_UGATE2 10 16 PWR_5V_UGATE1 5V_PWR 2 1
GAP-CLOSE-PWR-3-GP PL4503 UGATE2 UGATE1 PL4501
PG4517 1 2 PWR_3D3V_PHASE2 8 18 PWR_5V_PHASE1 1 2 GAP-CLOSE-PWR-3-GP
IND-3D3UH-57GP PHASE2 PHASE1 IND-2D2UH-46-GP-U PG4537
2 1
1

PWR_3D3V_LGATE2 11 15 PWR_5V_LGATE1 68.2R210.20B 2 1

LGATE2 LGATE1

1
GAP-CLOSE-PWR-3-GP

5
6
7
8
PG4528 PR4533 DY PU4502 PR4529 GAP-CLOSE-PWR-3-GP
8
7
6
5

D
D
D
D
SIS412DN-T1-GE3-GP

SIS780DN-T1-GE3-GP
2 1 PT4502 2D2R5F-2-GP 14 PWR_5V_BYP1 DY 2D2R5F-2-GP PG4533
1

1
BYP1
D
D
D
D

GAP-CLOSE-PWR-3-GP PU4505 PG4532 PC4518 PT4501 2 1

2
1

SE220U6D3VM-38-GP

PC4517 PG4535 PWR_3D3V_FB2 4 2 PWR_5V_FB1 DY

2
FB2 FB1

SCD1U16V2KX-3GP

SE220U6D3VM-38-GP
PG4522 DY GAP-CLOSE-PWR-3-GP
1PWR_3D3V_SNUB
2

2
GAP-CLOSE-PWR-3-GP
SCD1U16V2KX-3GP

PG4523

G
2 1 4 GAP-CLOSE-PWR-3-GP 79.22710.3KL
2

2
S
S
S
2 1

1PWR_5V_SNUB
GAP-CLOSE-PWR-3-GP PWR_3D3V_EN2 6 20 PWR_5V_EN1
S
S
S
G

3
2
1
PG4529 EN2 EN1 GAP-CLOSE-PWR-3-GP
1
2
3
4

2 1 PG4541
3V_FEEDBACK

PWR_3D3V_CS2 5 1 PWR_5V_CS1 2 1
GAP-CLOSE-PWR-3-GP CS2 CS1
R2 R1
1

1
TPAD14-OP-GP GAP-CLOSE-PWR-3-GP
PR4517 PWR_5V_VCLK PR4531 PG4540
79.22710.3KL PC4520
DY 187KR2F-GP VCLK
19 1
TP4501 140KR2F-1-GP PC4536
DY 2 1
2

SC330P50V3KX-GP SC560P50V-GP

2
7 21 GAP-CLOSE-PWR-3-GP
2

2
PGOOD GND

LDO3

LDO5
1

1
RT6576DGQW-GP
R3

13
PR4535 3D3V_S5 PR4525

1
PR4512 3D3V_PWR_2
6K65R2F-GP
DY0R2J-2-GP 5V_PWR_2 DY PR4502
200R2J-L1-GP
0R2J-2-GP DY PR4527
1

15KR2F-GP
2

1 2

1 2
PWR_3D3V_FB2_R PR4534 PWR_5V_FB1_R
PC4523 100KR2J-1-GP
DY

2
1

1
DYSC18P50V2JN-1-GP PC4526
PC4524
SC4D7U6D3V3KX-GP
PC4522
SC18P50V2JN-1-GP
DY
2

2
B SC4D7U6D3V3KX-GP B
2

2
1

1
PR4523 [18,40] 3V_5V_POK PR4526
10KR2F-2-GP 9K76R2F-1-GP

Close to VFB Pin (pin2)

2

2
3D3V_PWR_2 3D3V_AUX_S5
PR4532
2 1
Close to VFB Pin (pin5)
0R0402-PAD X04_0513

I/P cap: CHIP CAP C 10U 25V K0805 X5R/ 78.10622.51L I/P cap: CHIP CAP C 10U 25V K0805 X5R/ 78.10622.51L
Inductor: CHIP IND 3.3UH PCMC063T-3R3MN Cyntec 28mohm/30mohm Isat =13.5Arms 68.3R310.20A Inductor: CHIP CHOKE 2.2U PCMC063T-2R2MN 18mohm/20mohm Isat =14Arms 68.2R210.20B
O/P cap: CHIP CAP EL 220U 6.3V M6.3*4.4 /Chemi-con / 18mOhm / 79.22710.3KL O/P cap: CHIP CAP EL 220U 6.3V M6.3*4.4 /Chemi-con / 18mOhm / 79.22710.3KL
H/S:SIS412 / 24mOhm/30mOhm@4.5Vgs / 84.00412.037 H/S:SIS412 / 24mOhm/30mOhm@4.5Vgs / 84.00412.037
L/S:SIS412 / 24mOhm/30mOhm@4.5Vgs / 84.00412.037 L/S:SIS780 / 14.5mOhm/17.5mOhm@4.5Vgs / 84.00780.037

A A

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

RT6576 5V/3D3V
Size Document Number Rev
A2
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 45 of 109
5 4 3 2 1
 5 4 3 2 1

SSID = CPU Regulator

Vinafix.com
PWR_VCORE_REF

IMON Compesatiom

12K4R2F-GP

2
1
D PR4648 D

NTC-100K-1-GP-U

PR4675
2

1
PWR_VCORE_NTC1P

100KR2F-L1-GP
1

SCD47U25V3KX-1GP
PR4605
2014.03.15 EE modify
18K2R2F-L-GP

1D05V_S5

1
PWR_VCORE_NTC1N_0 VIDALERT#_CPU_R PR4665 1 DY 2 200R2F-L-GP

2
PC4614
VIDSCK_CPU_R PR4601 1 2 200R2J-L1-GP

1
1
PR4602

2
PR4677
1K74R2F-GP VIDSOUT_CPU_R

PR4659
1 2

1D8V_S5

2
VIDALERT#_CORE PR4663 1 300R2F-GP
2 49D9R2F-GP
VIDALERT#_CPU_R [18,48]
PWR_VCORE_REF VIDSOUT_CORE PR4669 1 2 20R2J-3-GP VIDSOUT_CPU_R [18,48]

1
VIDSCK_CORE PR4645 2 1 200R2J-L1-GP
PR4635 VIDSCK_CPU_R [18,48]
DY 20KR2J-L2-GP

PWR_VCORE_IBAS
2
3D3V_S5

PWR_VCORE_IMON
SCD1U16V2KX-3GP
PC4618

1
2 1
5V_VCC_CPU PR4633
DY 10KR2J-3-GP

PWR_VCORE_RGND_1

2
39K2R2F-L-GP

A00_0527
86K6R2F-GP

28K7R2F-GP

10KR2F-2-GP
1

31

10

15
13
14
1

5
PU4601
PR4649 0R0402-PAD

IMON

VREF

IBIAS

VCLK
VDIO
ALERT#

RGND
2 1 PWR_VCORE_EN 26 22 PWR_VCORE_BT1 [47]
[48] GFX_PWRGD PR4638 0R0402-PAD EN BOOT
2

[40] IMVP_PWRGD 2 1 PWR_VCORE_READY 17

2

PR4640 0R0402-PAD VR_READY

PR4650

PR4647

PR4642

PR4653

25 PWR_VCORE_UG1 [47]
PWR_VCORE_VRHOT# UGATE
[18,24,44,48] H_PROCHOT# 2 1 12
VR_HOT#
PWR_VCORE_SET3 9 23 PWR_VCORE_PH1 [47]
C SET3 PHASE C
PWR_VCORE_SET1 7
SET1
20 PWR_VCORE_LG1 [47]
PWR_VCORE_SET2 LGATE
8
SET2
30 19
510R2F-L-GP

100R2F-L1-GP-U

SETGND_CPU SETGND PGND

PWR_VCORE_VBOOTSEL 29
PR4668 390R2F-2GP

VBOOTSEL
DRV_EN#24
24 PWR_VCORE_EN2 A00_0527
1

1
18 PR4674
A00_0527 DRV_EN#18 0R0402-PAD
PR4672

PR4671
PR4680
2

PWR_VCORE_SET1_0 1

2
2 1 PWR_VCORE_SEN 4 PWR_VCORE_EN1
0R0402-PAD VSEN
1 PWR_VCORE_SET3_0

PWR_VCORE_SET2_0

PWR_VCORE_COMP 2 33
COMP GND

TONSET
PWR_VCORE_FB 3
FB

NC#32

ISENN

ISENP
PVCC
TSEN
VCC
5V_S5 RT8199BGQW-GP
24K9R2F-L-GP

11

16

21

32

27

28
1KR2F-3-GP
13K7R2F-GP

10KR2F-2-GP

20R2J-3-GP
1

PWR_VCORE_TSEN

PWR_VCORE_TONSET
PWR_VCORE_ISEN1P [47]
PR4666

PR4670

PWR_VCORE_PVCC
5V_S5 680R2F-GP
5V_VCC_CPU PWR_VCORE_ISENN 1 2
PWR_VCORE_ISEN1N [47]
PR4656

PR4673

PR4631

PR4654

2D2R2J-GP
2

1
DY

1
PC4612
SCD1U16V2KX-3GP

2
1
PC4615
SC2D2U10V3KX-1GP

PR4637
DCBATOUT

2
SETGND_CPU

X02_0213

1
5V_VCC_CPU PR4667
1R2J-GP

1
PQ4601
PC4611 G

100KR2F-L1-GP
5V_S5 PR4664

2
PR4655 PR4641 PR4657 SC2D2U10V3KX-1GP
DY
PR4661 NTC-100K-1-GP-U

2
10KR2F-2-GP 0R2J-2-GP 68KR2F-GP D PWR_VCORE_TONSETQ 1 2 PWR_VCORE_TONSET_1
1

PWR_VCORE_SEN_1 2 1 2 1PWR_VCORE_COMP_1 2 1
PWR_VCORE_TONSET S
976KR2F-GP
2

1
PC4616 PC4609 2N7002K-2-GP PC4617
1 2 1 2 84.2N702.J31 SCD1U25V2KX-GP

2
2ND = 084.27002.0A31
2

1
PR4660

B
SC470P50V2KX-3GP SC47P50V2JN-3GP 3rd = 84.07002.I31 B
PR4658
[18] VCC_SENSE 1 2 PWR_VCORE_TSEN_1
2R2F-GP PR4684
1 2
PR4652
1

1 2
[18] VSS_SENSE PR4643 0R0402-PAD
2R2F-GP 5K36R2F-GP

A00_0601
2

X02_0203
1

PR4644

PR4676 2R2F-GP 8K87R2F-2-GP

1 2 PWR_VCORE_SEN_1
[18] VCC_VCORE1_SENSE
2

1 2 PWR_VCORE_RGND_1
[18] VSS_VCORE1_SENSE
PR4678 2R2F-GP
1

SETGND_CPU
PC4619 DY DY PC4620
SCD1U16V2KX-3GP SCD1U16V2KX-3GP
2

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

RT8171B_CPUCORE(1/3)
Size Document Number Rev
A1
A00
Date: Monday, June 01, 2015 Sheet 46 of 109
5 4 3 2 1
 5 4 3 2 1

SSID = CPU Regulator

DCBATOUT PW R_DCBATOUT_CPU_CORE

Vinafix.com 2
PG4701
1

D GAP-CLOSE-PW R-3-GP D
PW R_DCBATOUT_CPU_CORE PG4702
2 1

1
PT4702 DY GAP-CLOSE-PW R-3-GP

ST33U25VDM-2-GP
PG4703

2
2 1

SC10U25V5KX-GP

SC10U25V5KX-GP
PC4705

PC4702
1

1
EC4701 GAP-CLOSE-PW R-3-GP
DY

SCD1U50V3KX-GP
2

2
For Acoustic noise

PU4701 2
3
1 4
[46] PW R_VCORE_UG1 10
9Change to 84.00920.037
[46] PW R_VCORE_PH1 7
8 6
5
1 PC4711
SCD22U25V3KX-GP
2
ZZ.00215.037
FDMS3600-02-RJK0215-COLAY-GP Iccmax=6.4A
C PW R_VCORE_BT1_1 1st = 84.00920.037 C
1

1V_CPU_CORE
PR4705
2D2R3J-2-GP PL4701
1 2
2

IND-D36UH-26-GP-U

[46] PW R_VCORE_BT1

SC22U6D3V3MX-1-GP

SC22U6D3V3MX-1-GP

SC22U6D3V3MX-1-GP
1

1
PC4706

PC4707

PC4708

1
PR4704 PG4707 PG4709
DY 2D2R5J-1-GP GAP-CLOSE-PW R-3-GP GAP-CLOSE-PW R-3-GP PT4701

2
SE470UF2VDM-GP

2
DY DY
[46] PW R_VCORE_LG1 2

PHASE1G
PW R_VCORE_SNUB
DY

PC4710
SC1000P50V3JN-GP-U
1

DY
2

B B

1
PR4711
1K2R2F-1-GP

2
1 2
PC4709
SCD1U50V3KX-GP

PR4712
1 DY 2 PW R_VCORE_ISEN1N [46]
11KR2F-L-GP

PW R_VCORE_ISEN1P [46]

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

RT8171B_CPUCORE(2/3)
Size Document Number Rev
A3
A00
Date: Thursday, May 28, 2015 Sheet 47 of 109
5 4 3 2 1
 5 4 3 2 1

SSID = GFX Regulator

Vinafix.com
D D
PWR_GFX_REF

IMON Compesatiom

2
1
PR4810
PR4840 NTC-10K-26-GP-U
3K4R2F-GP
69.60037.011 1D05V_S5

1
PWR_GFX_NTC1P DCBATOUT PWR_DCBATOUT_GFX_CORE
VIDALERT#_CPU_R PR4843 1 DY 2 200R2F-L-GP
PG4801

100KR2F-L1-GP
1
2 1

SCD47U25V3KX-1GP
PR4801 VIDSCK_CPU_R PR4804 1 2 200R2J-L1-GP
360R2F-GP GAP-CLOSE-PWR-3-GP
PR4805
PG4802
VIDSOUT_CPU_R 1 2 2 1

2
GAP-CLOSE-PWR-3-GP
300R2F-GP

1
PWR_GFX_NTC1N_0 PG4803

1
2 1
PC4806
GAP-CLOSE-PWR-3-GP

2
PR4831
1D8V_S5 VIDALERT#_GFX PR4854 1 2 49D9R2F-GP
VIDALERT#_CPU_R [18,46]

1
VIDSOUT_GFX PR4855 1 2 20R2J-3-GP PWR_DCBATOUT_GFX_CORE
PWR_GFX_REF VIDSOUT_CPU_R [18,46]
PR4841
4K42R2F-GP VIDSCK_GFX PR4875 2 1 200R2J-L1-GP
VIDSCK_CPU_R [18,46]

1
PR4820 PC4801

2
20KR2J-L2-GP
DY

SC10U25V5KX-GP

SC10U25V5KX-GP
1

1
PC4811 EC4801

2
3D3V_S5

PWR_GFX_IBAS
DY

SCD1U50V3KX-GP
2

2
PWR_GFX_IMON
1
PU4801 2
PR4817 3
5V_VCC_GFX 1 4
10KR2F-2-GP PWR_GFX_UG1 10
9Change to 84.00920.037

2
PWR_GFX_RGND_1 PWR_GFX_PH1 7
SCD1U16V2KX-3GP 8 6
16KR2F-GP

PC4837 5
976R2F-3-GP

86K6R2F-GP

10KR2F-2-GP
1

2 1 1 PC4819

31

10

15
13
14
2014.03.18 EE del pull high
DY
2

5
PU4802 SCD22U25V3KX-GP
C PR4826 0R0402-PAD 2 C
ZZ.00215.037

IMON

VREF

IBIAS

VCLK
VDIO
ALERT#

RGND
[18,24,40,51,53] PM_SLP_S3# 2 1 PWR_GFX_EN 26 22 PWR_GFX_BT1
PR4823 0R0402-PAD EN BOOT
2

PWR_GFX_READY FDMS3600-02-RJK0215-COLAY-GP
2 1 17
[46] GFX_PWRGD
Iccmax=13A
1

PR4824

PR4853 0R0402-PAD VR_READY PWR_GFX_BT1_1

PR4827

PR4825

PR4806

UGATE
25 PWR_GFX_UG1 1st = 84.00920.037
2 1 PWR_GFX_VRHOT# 12
[18,24,44,46] H_PROCHOT# VR_HOT#
A00_0527

1
PWR_GFX_SET3 9 23 PWR_GFX_PH1 GFX_CORE
SET3 PHASE PR4844
PWR_GFX_SET1 7 2D2R3J-2-GP PL4801
SET1
20 PWR_GFX_LG1 1 2
PWR_GFX_SET2 LGATE
8

2
SET2 IND-D36UH-26-GP-U
SETGND_GFX 30 19
SETGND PGND
PWR_GFX_BT1

SC22U6D3V3MX-1-GP

SC22U6D3V3MX-1-GP

SC22U6D3V3MX-1-GP
PWR_GFX_VBOOTSEL 29
VBOOTSEL

1
PC4814

PC4816

PC4818
24 PWR_GFX_EN2
A00_0527
100R2F-L1-GP-U

DRV_EN#24 PR4847 PG4805 PG4804 PT4801 PT4802

PR4850 390R2F-2GP

DY

1
2D2R5J-1-GP GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP SE470UF2VDM-GP
SE470UF2VDM-GP
PR4849 390R2F-2GP

2
18 PR4839
A00_0527

1
DRV_EN#18 0R0402-PAD DY DY

2
2

PR4837 DY DY
1

0R0402-PAD PWR_GFX_LG1

PHASE1G_GFX
2
2 1 PWR_GFX_SEN 4 PWR_GFX_EN1 PWR_GFX_SNUB
VSEN
PWR_GFX_COMP
PR4848

2 33
1

COMP GND PC4817

2

TONSET
PWR_GFX_FB 3 SC1000P50V3JN-GP-U
FB

NC#32

ISENN

ISENP
PVCC
TSEN
2 PWR_GFX_SET2_R

VCC

1
1PWR_GFX_SET3_R

1PWR_GFX_SET1_R

DY
5V_S5 RT8199BGQW-GP
6

11

16

21

32

27

28

2
20R2J-3-GP
24K9R2F-L-GP

1
PWR_GFX_ISEN1P
PR4811
1KR2F-3-GP

10KR2F-2-GP

PR4845
10R2F-L-GP

1K2R2F-1-GP
PWR_GFX_TSEN

PWR_GFX_TONSET

PR4835
PWR_GFX_PVCC
1

5V_S5 680R2F-GP
5V_VCC_GFX PWR_GFX_ISENN PWR_GFX_ISEN1N
PR4829

1 2

2
2D2R2J-GP
2

1
PR4838

PR4802

PR4807

1 2
2

DY
1
PC4804 PC4835
SCD1U16V2KX-3GP SCD1U50V3KX-GP

2
1

PC4807
SC2D2U10V3KX-1GP
PR4803

PR4846
2

1 DY 2 PWR_GFX_ISEN1N

11KR2F-L-GP

SETGND_GFX PWR_GFX_ISEN1P
5V_VCC_GFX
1

PC4803
SC2D2U10V3KX-1GP
100KR2F-L1-GP

PR4828 PR4816 PR4830

PR4812 NTC-100K-1-GP-U

10KR2F-2-GP 0R2J-2-GP 68KR2F-GP

1

B PWR_GFX_SEN_1 B
2 1 2 1PWR_GFX_COMP_1 2 1
2

PC4812
SC68P50V2JN-1GP
1 2 2 1
2

PC4808 SC470P50V2KX-3GP
PR4814

9/11 power team modify

PWR_GFX_TSEN_1 DCBATOUT

X02_0213
1

PR4813 PR4815
5K36R2F-GP 1R2J-GP A00_0601
0R0402-PAD PR4809
PR4834 PR4821
2

1 2 PWR_GFX_SEN_1
[18] VCC_AXG_SENSE 0R0402-PAD PR4808 PWR_GFX_TONSET_1 1 2PWR_GFX_TONSET_Q 1 2
1 2 PWR_GFX_RGND_1 0R0402-PAD
[18] VSS_AXG_SENSE X02_0203 1M2R2F-GP
S PWR_GFX_TONSET
1

A00_0527 DY PC4834 PR4842 PC4809

D DY
1

SCD1U16V2KX-3GP 9K1R2F-1-GP SCD1U25V2KX-GP G 5V_S5

2

DY PC4839
SCD1U16V2KX-3GP 2N7002K-2-GP
2

PQ4801
3rd = 84.07002.I31
2ND = 084.27002.0A31
84.2N702.J31
SETGND_GFX

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

RT8171B_GFXCORE(3/3)
Size Document Number Rev
A1
A00
Date: Monday, June 01, 2015 Sheet 48 of 109
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C
Blanking C

B B

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

PWR Plane Enable & Sequence

Size Document Number Rev
A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 49 of 109
5 4 3 2 1
 5 4 3 2 1

SSID = PWR.Plane.Regulator_1p05v
PW R_DCBATOUT_1D05V

SY8206D for 1D05V X04_0513

1
PC5008 PC5004
X01
Vinafix.com PR5001

SC4D7U25V5KX-GP
SC4D7U25V5KX-GP PU5001 PC5006

2
1 2 1D05V_PW R_BS_R 1 2

D SCD1U25V2KX-GP Design Current=1.333A D

0R0603-PAD
OCP>2A
8 6 1D05V_PW R_BS
IN BS 1D05V_S5
3D3V_S5 PL5001
PR5013

3D3V_S5 1 2 10 1D05V_PW R_PH 1 2

LX

GAP-CLOSE-PWR-3-GP
COIL-1UH-73-GP
1KR2J-1-GP
1 DY 100KR2J-1-GP

1
2 1D05V_PW RGD 1D05V_PW R_FB PC5011 PC5012 PC5010 PC5013 PC5005
PR5008 2 PG FB 4
PG5001 DY DY PC5003

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP
PR5002 2 1 PW R_1D05V_PW R_ILIM 3 7 1D05V_PW R_BYP SCD1U16V2KX-3GP

2
0R2J-2-GP ILMT BYP 3D3V_S5

1
[40,52] 1D05V_VNN_EN 1 PR5004 2 PW R_1D05V_PW R_EN 1 EN
1 PR5007 2
0R0402-PAD 9 5 1D05V_PW R_LDO 1D05V_PW R_FBL
GND LDO

1
0R0402-PAD
X04_0513
1

1
PR5003
PC5001 DY DY 1MR2J-1-GP SY8206DQNC-GP-U PC5007 X04_0513 PR5040

1
DCBATOUT PW R_DCBATOUT_1D05V PC5009 SC1U10V2KX-1GP 100R2F-L1-GP-U
74.08206.C73
2

2
SCD1U16V2KX-3GP SC2D2U10V3KX-1GP
2 PR5039
PG5006

2
2 1 1D05V_PW R_FBH 1 2
VSS_VNN_SENSE [18]

1
GAP-CLOSE-PW R-3-GP 10R2F-L-GP
PG5007 PR5006 PC5002
OCP setting 75KR2F-GP SC220P50V2KX-3GP
2 1

2
C
High 12A C
GAP-CLOSE-PW R-3-GP

2
Float 8A
Low 6A

1
Vo=0.6x(1+R1/R2) PR5005
=0.6x(1+75/100) 100KR2F-L1-GP
To enable 1D15V =1.05V
PR5066

2
1D05V_PW RGD 2 1 1D05V_VNN_PW RGD
1D05V_VNN_PW RGD [18]

0R0402-PAD X04_0513

SSID = PWR.Plane.Regulator_1p15v
SYW232 for 1D15V_S5
2014.03.18 EE modify

3D3V_S5 PW R_1D15V_PVDD 3D3V_S5

PG5005
2 1
1

1
PC5014 PC5016 PC5015 GAP-CLOSE-PW R
DY
SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC1U10V2KX-1GP
B PR5012 PG5004 B
10KR2J-3-GP 2 1
2

2
GAP-CLOSE-PW R
2

[52,54] PW R_1D15V_PG
PU5002

5 3 Design Current =0.7A

NC#5 IN
PW R_1D15V 1D15V_S5
8 1 PW R_1D15V_FB
SGND FB PL5002
2 PW R_1D15V_PG PG5003
PG PW R_1D15V_PHASE
4 PGND LX 6 1 2 1 2
9 7 PW R_1D15V_S5_EN IND-1UH-145-GP
PGND EN GAP-CLOSE-PW R
68.1R050.10H

1
PG5002

1
SYW 232DFC-GP PR5011 1 2
74.00232.033 95K3R2F-GP PC5017
R1

SC22P50V2JN-4GP
GAP-CLOSE-PW R

2
PW R_1D15V_FB 2

1
PC5018 PC5019

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
1D05V_VNN_PW RGD 1 PR5009 2
[18] 1D05V_VNN_PW RGD

2
0R0402-PAD
1
1

PR5010
A
X04_0513 DY PC5000 102KR2F-GP
<Core Design> A

SC1U10V2KX-1GP R2
2

Wistron Corporation
2

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Close Pin1 Taipei Hsien 221, Taiwan, R.O.C.

Title
Vo=0.6x(1+R1/R2)
=0.6x(1+95.3/102)
DCDC_VNN_1D05V_1D15V
Size Document Number Rev
=1.16 A3
A00
Date: Friday, May 29, 2015 Sheet 50 of 109
5 4 3 2 1
 5 4 3 2 1

DCBATOUT +PWR_SRC_1D35V
PG4903
1 2

GAP-CLOSE-PWR-3-GP
Main Func = VDDQ PG4904
1 2

GAP-CLOSE-PWR-3-GP
PG4905

Vinafix.com 1 2

GAP-CLOSE-PWR-3-GP
1D35V_PWR 1D35V_S3

PG4906
D 1 2 PG4908 D
1 2
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
PG4909
1 2

GAP-CLOSE-PWR-3-GP
PG4910
1 2

+PWR_SRC_1D35V GAP-CLOSE-PWR-3-GP
PG4911
1 2
5V_S5
GAP-CLOSE-PWR-3-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

PC4914
SCD1U50V3KX-GP
PG4912

SC4D7U25V5KX-GP
PC4913
1 2

1
3D3V_S0

PC4909

PC4911

PC4912
DY GAP-CLOSE-PWR-3-GP

1
PC4901 PG4913

2
1 2
1

5
6
7
8
SC1U25V3KX-1-GP

D
D
D
D
SIS412DN-T1-GE3-GP

84.00412.037
PR4904 PU4902 GAP-CLOSE-PWR-3-GP
X02_0205 DY
20KR2F-L-GP
2

3D3V_S0 Check PH voltage. PU4901

PR4605_2

G
S
S
S
20 12 PC4919
[40] 1D35V_S3_PWRGD PGOOD V5IN SCD1U50V3KX-GP

4
3
2
1
R4909 1 DY 2 10KR2J-3-GP DDR_VTT_PG_CTRL_R 17 S3
PR4905 Design Current=3.4A
15 PWR_1D35V_VBST 1 2 1 2
R4910 2 1 0R0402-PAD PWR_1D35V_EN 16
VBST 4.65A<OCP>5.27A
[18,24,40,48,53] PM_SLP_S3# S5 2D2R3-1-U-GP
A00_0528 PWR_1D35V_VREF 6
VREF DRVH
14 PWR_1D35V_DRVH
1

1D35V_PWR
PR4903 PL4902
C 13 PWR_1D35V_SW 1 2 C
10KR2F-2-GP SW
IND-1D5UH-23-GP
2

PWR_1D35V_REFIN PWR_1D35V_DRVL

GAP-CLOSE-PWR-3-GP
8 REFIN DRVL 11

5
6
7
8

2
84.00412.037
SCD1U16V2KX-3GP

SCD01U50V2KX-1GP

30K1R2F-L-GP

D
D
D
D

1
SIS412DN-T1-GE3-GP

PG4907
10 1D35V_PWR PU4903 PC4905 PC4907 PC4908 PC4910 PC4920 EC4601
PGND
2 PR4901 1

PWR_1D35V_MODE 19 DY PR4912 DY DY DY
MODE
1

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SCD1U50V3KX-GP
PC4903

PC4902

PC4904 2D2R5F-2-GP
12KR2F-L-GP

2
93K1R2F-L-GP

2
1

PWR_1D35V_TRIP 18 9 PWR_1D35V_VDDQS SC1U25V3KX-1-GP

2

2
TRIP VDDQSNS

PWR_1D35V_VDDQS
G
S
S
S
PR4908

TPS51216_PHS_SET
PR4601_1

4
3
2
1
PWR_1D35V_VTTREF VLDOIN
5
VTTREF Design Current=0.42A
1

1
PR4906

3 +0D675V_DDR_P
2

VTT
1

SC10U25V5KX-GP

SC10U10V5KX-2GP
PC4918 PC4922
0R2J-2-GP

SCD1U16V2KX-3GP DY
1

1
SC330P50V2KX-3GP
PR4902

PC4915

PC4916
SCD22U10V2KX-1GP 1
2

2
VTTSNS

PC4917
21 DY
2

GND
4
2

2
VTTGND
7
GND
TPS51716RUKR-GP
A00_0527
DDR_VTT_PG_CTRL_R +0D675V_DDR_P 0D675V_S0
GAP-CLOSE-PWR-3-GP
PG4901 DDR_VREF_S3
1

1 2 1 PR4907 2 PWR_1D35V_EN
PC4921 PR4911 [18,24] PM_SLP_S4#
DY SCD1U16V2KX-3GP PWR_1D35V_VTTREF 1 DY 2 0R0402-PAD
2

1
PG4902
1 2 0R3J-0-U-GP DY PC4906
SCD1U16V2KX-3GP

2
GAP-CLOSE-PWR-3-GP

B B

State S3 S5 VDDR VTTREF VTT

S0 Hi Hi On On On
S3 Lo Hi On On Off(Hi-Z)
S4/S5 Lo Lo Off Off Off

I/P cap: 10U 25V K0805 X5R/ 78.10622.51L

Inductor:CHIP CHOKE 1.5U PCMC063T-1R5MN 14~15mohm Isat =18Arms 68.1R510.10K
TPS51716 MODE H/S MOS: FET MOS SIS412DN-T1-GE3 NC 8P / 84.00412.037 / Rds(on)=24~30mohm @Vgs=4.5V
PR4908 Frequency Discharge Mode L/S MOS: FET MOS SIS412DN-T1-GE3 NC 8P / 84.00412.037 / Rds(on)=24~30mohm @Vgs=4.5V
33k ohm 500kHz
Non-tracking Discharge
22k ohm 670kHz
12k ohm 670kHz
Tracking Discharge
1k ohm 500kHz

A A
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

TPS51716 DDR 1D35V/0.675V

Size Document Number Rev
Custom
A00
Date: Thursday, May 28, 2015 Sheet 51 of 109
5 4 3 2 1
 5 4 3 2 1

SSID = PWR.Plane.Regulator_1p8v

Vinafix.com
D SYW232 for 1D8V_S5 PWR_1D8V_PVDD
PG5207
3D3V_S5 D

2 1

1
PC5219 PC5220 PC5221 GAP-CLOSE-PWR
DY

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC1U10V2KX-1GP
PG5208
2 1

2
GAP-CLOSE-PWR

PU5204 Design Current =0.82A

5 NC#5 IN 3
2014/10/09 PWR_1D8V 1D8V_S5
8 1 PWR_1D8V_FB PH at page 40.
SGND FB 1D8V_S5_PG PG5209
PG 2 1D8V_S5_PG [40] PL5201
4 6 PWR_1D8V_PHASE 1 2 1 2
PGND LX PWR_1D8V_S5_EN IND-1UH-145-GP
9 PGND EN 7
C 68.1R050.10H GAP-CLOSE-PWR C

2
PG5210

1
SYW232DFC-GP PR5211 1 2
74.00232.033 PC5222
200KR2F-L-GP
R1

SC22P50V2JN-4GP
GAP-CLOSE-PWR

2
1

1
PWR_1D8V_FB PC5223 PC5224

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
[50,54] PWR_1D15V_PG 1 DY 2

2
PR5202

1
0R2J-2-GP PR5213
1

PC5225 100KR2F-L1-GP
R2
SC1U10V2KX-1GP

DY
2

2
Close Pin1
B B

PR5219
Vo=0.6x(1+R1/R2)
[40,50] 1D05V_VNN_EN 1 2 =0.6x(1+200/100)
0R0402-PAD =1.8
X04_0513

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
SYW232DFC_1D8V
Size Document Number Rev
A4
A00
Date: Thursday, May 28, 2015 Sheet 52 of 109
5 4 3 2 1
 5 4 3 2 1

Vinafix.com X02_0212
D D

3D3V_S5
S-1339D15-M5001 for 1D5V_S0

1
DY PC5301
SC1U10V2KX-1GP

2
Design Current =23mA
C 1D5V_S0 C
PU5301 PR5316

1 5 1D5V_S0_VOUT 1 DY 2 0R3J-6-GP
VIN VOUT
2 VSS
3 DY NC#4
ON/OFF 4
PR5315

1
1 DY 2 1D5V_S0_EN S-1339D15-M5001-GP
[18,24,40,48,51] PM_SLP_S3#
74.01339.B3F DY PC5306
SC1U10V2KX-1GP

2
0R2J-2-GP

1
DY PC5326
SCD1U16V2KX-3GP

2
B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

S1339D15_1D5V
Size Document Number Rev
A4 A00
Date: Thursday, May 28, 2015 Sheet 53 of 109
5 4 3 2 1
 5 4 3 2 1

APL5930 for 1D24V

X03_0319
1D8V_S5 3D3V_S5
5V_S5 PW R_1D24V_IN
X03_0310
PR5403A00_0528

1
PR5402

0R0805-PAD

0R5J-6-GP
DY
Vinafix.com

2
D D

PC5402 Design Current = 550mA

SC10U6D3V3MX-GP
1

1
PC5401
SC1U10V2KX-1GP PW R_1D24V
X03_0310

2
PU5402
PW R_1D24V 1D24V_S5
2014/10/09 5
PH at page 40. VIN#5 PG5408
6 VCNTL VOUT#4 4
[40] PW R_1D24V_POK 7 POK VOUT#3 3 1 2
[50,52] PW R_1D15V_PG 1 PR5417 2 PW R_1D24V_EN 8 EN FB 2
9 1 GAP-CLOSE-PW R
0R0402-PAD VIN#9 GND

47KR2J-2-GP
PG5409

1
APL5930KAI-TRG-GP PR5419 PC5405 PC5404 PC5407

PR5401
X04_0513 DY 1 2

SC68P50V2JN-1GP
PC5427
74.05930.03D

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP
7K32R2F-GP
SCD1U16V2KX-3GP

PWR_1D24V_FB
DY GAP-CLOSE-PW R

2
2ND = 74.07175.031

2
3ND = 74.G9731.03D

X03_0409

1
PR5420
C 13K3R2F-L1-GP C

Vout=0.8V*(R1+R2)/R2

2
B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
APL5930_1D24V
Size Document Number Rev
A3
A00
Date: Thursday, May 28, 2015 Sheet 54 of 109
5 4 3 2 1
 5 4 3 2 1

Hi:2.0V 3D3V_S0
Main Func = LCD D5201 Lo:0.8V
LCDVDD_CONN LCDVDD EDP_VDD_EN 1 U5201

EDP_VDD_EN_R
Layout 40 mil
Trace width = 80mil DY 3 1
EN VIN#5
5
R5227 1 2 0R5J-5-GP 2
Panel Conn. [24] LCD_VDD_EN 2 LCDVDD 3
GND
VOUT VIN#4
4

1
LCD1 DCBATOUT_LCD LCDVDD_CONN C5218 C5210 BAT54C-7-F-3-GP
EE Note: DY

1
41 75.00054.E7D RT9724GB-GP

1
SC1U10V2KX-1GP SCD1U16V2KX-3GP C5212
Never change R5227 to short pad after MP 74.09724.09F

2
1 R5204 SC4D7U6D3V3KX-GP

2
1
R5232 2ND = 74.03514.07F

Vinafix.com
2 1 2 100KR2J-1-GP C5211
3 SC4D7U6D3V3KX-GP 3rd = 74.06288.B7F

2
4 0R0402-PAD
5
6 X04_0513 A00_0528
7 Intel recommends having a pull-up resistor of 100 kΩ for AUXN
D DBC_EN_R R5201 0R0402-PAD
8 1 2 DBC_EN [8] Layout Note: and a pull-down resistor of 100 kΩ for AUXP
D
9 DP_HPD0_C R5202 1 2 100KR2J-1-GP
10 LCD_TST_C R5202 close to LCD1 between the AC capacitor and the connector,
11
12
DP_AUXP_CPU_C
DP_AUXN_CPU_C
C5201
C5205
1
1
2 SCD1U16V2KX-3GP
2 SCD1U16V2KX-3GP
DP_AUXP_CPU [8]
DP_AUXN_CPU [8]
to assist source detection by the sink device.
INVERTER POWER
13
14 DP_TXN0_CPU_C C5206 1 2 SCD1U16V2KX-3GP
15 DP_TXP0_CPU_C C5207 1 2 SCD1U16V2KX-3GP
DP_TXN0_CPU [8]
DP_AUXP_CPU_C R5228 1 DY 2 100KR2J-1-GP
EE Note:
DP_TXP0_CPU [8]
16
DP_TXN1_CPU_C C5214 2 SCD1U16V2KX-3GP DP_AUXN_CPU_C R5229 1 2 100KR2J-1-GP
Never change R5208 to short pad after MP
17
DP_TXP1_CPU_C C5215
1 DP_TXN1_CPU [8] DY 3D3V_S0
18 1 2 SCD1U16V2KX-3GP DP_TXP1_CPU [8]
19
LCD_BRIGHTNESS DCBATOUT DCBATOUT_LCD
20
21 BLON_OUT_C Level shift X02_0203
22 PANEL_SIZE_ID_CONN F5201
23 1 2
24
3D3V_S5 1D8V_S0 1D8V_S0
25
X04_0513 POLYSW-1D1A24V-GP-U

1
26 MIC_GND C5204 C5203 C5202
27 DMIC_CLK_EDP 3D3V_S0
69.50007.A31

SCD1U25V2KX-GP

SC1KP50V2KX-1GP

SC4D7U25V5KX-GP
28 DMIC_DATA_EDP R5225 RN5203

2
1
29 3D3V_CAMERA_S0 1 2 1 4 BKLT_CTRL

1
30 USB_CAMERA_N_EDP 2 3 BLON_OUT_C R5517
USB_CAMERA_P_EDP 0R0402-PAD 2K2R2J-2-GP R5209
2nd = 69.50007.G71
31 DY

1
32
SRN100KJ-6-GP R5213 3D3V_S0 DY 10KR2J-3-GP
33

2
34 USB_PN3_TPNL

2
35 USB_PP3_TPNL MIC_GND 2K2R2J-2-GP Q5502
36 G

2
37 TPNL_INT TPAN_VDD
38 TPNL_RST D L_BKLT_CTRL_D D S L_BKLT_CTRL_CPU [8]
39
40 LCD_BRIGHTNESS L_BKLT_CTRL S Q5202
DY DMN5L06K-7-GP EE Note:
42 2N7002K-2-GP 84.05067.031
1
EC5203 Need to check LCD Panel spec for
ACES-CON40-18-GP DY SC6D8P50V2DN-GP 84.2N702.J31 HPD voltage level.
20.K0678.040 2ND = 084.27002.0A31 Layout Note:
2

3rd = 84.07002.I31 Place PL resistor of DP_HPD0_C close to LCD1.

R5226
1 2
1D8V_S5
0R0402-PAD
A00_0528

1
R5211
C R5203 C
LCD_BRIGHTNESS 1 AFTP5203 0R2J-2-GP 3D3V_S0 1D8V_S0 1D8V_S5 10KR2J-3-GP
BLON_OUT_C 1 AFTP5205 1 DY 2

2
LCD_TST_C 1 AFTP5207
DP_AUXP_CPU_C 1 AFTP5206
DP_HPD [8]

1
DP_AUXN_CPU_C 1 AFTP5208 D5202
DP_TXN0_CPU_C AFTP5213 RN5201 L_BKLT_CTRL R5516 R5521 R5522 2.25~2.75V
DP_TXP0_CPU_C
1
1 AFTP5210 1 8
1
2K2R2J-2-GP
DY DY 2K2R2J-2-GP DY 100KR2J-1-GP
X04_0513
DP_TXN1_CPU_C 1 AFTP5211 LCD_BRIGHTNESS 2 7 BKLT_CTRL 3

D
DP_TXP1_CPU_C 1 AFTP5212 BLON_OUT_C 3 6 BLON_OUT [24] R5210

2
DMIC_CLK_EDP 1 AFTP5222 LCD_TST_C 4 5 LCD_TST [24] 2 EC_BRIGHTNESS [24] DP_HPD0_C 1 2 DP_HPD0_G Q5203
DMIC_DATA_EDP 1 AFTP5228 2N7002K-2-GP
USB_CAMERA_N_EDP AFTP5225 BAT54C-7-F-3-GP LVDS_VDD_EN_B 0R0402-PAD
1 EC (BIST MODE) 84.2N702.J31

B
USB_CAMERA_P_EDP 1 AFTP5226 SRN100J-4-GP 75.00054.E7D
3D3V_CAMERA_S0 1 AFTP5227 2ND = 84.2N702.031
EDP_VDD_EN C DY E LVDS_VDD_EN_CPU [8,24]
DP_HPD0_C 1 AFTP5201

S
G
LCDVDD_CONN 1 AFTP5202
DCBATOUT_LCD 1 AFTP5204 Q5501
TPNL_INT 1 AFTP5209 LMBT3904LT1G-GP
TPNL_RST 1 AFTP5214 84.T3904.H11
PANEL_SIZE_ID_CONN
2nd = 84.T3904.K11
1 3rd = 84.T3904.C11
TP5201
TPAD14-OP-GP

Main Func = Camera + DMIC Main Func = TS

A00_0528

Touch Screen
USB_CAMERA_N_EDP USB_CPU_PN4 [16]

Camera + Microphone TR5203

A00_0605
2 1
USB_PN3_TPNL USB_CPU_PN3 [16]
068.02012.2011
B
EE Note:
3 4
TOUCH PANEL POWER B

FILTER-4P-183-GP TR5202
Never change R5212 to short pad after MP 2 1
3D3V_S0 5V_S0 TPAN_VDD
USB_CAMERA_P_EDP USB_CPU_PP4 [16] 3 4 A00_0605
3D3V_S0 3D3V_CAMERA_S0
FILTER-4P-137-GP
CAMERA POWER X04_0513
A00_0528 68.01012.20B

1
R5212 1 2 0R3J-0-U-GP R5216 R5222
USB_PP3_TPNL USB_CPU_PP3 [16] DY 0R3J-0-U-GP 0R0603-PAD 69.50007.A31
A00_0605

2
1

EC5204 C5213 2nd = 69.50007.G71

SC33P50V2JN-3GP
DY SC4D7U6D3V3KX-GP F5202
2

TPAN_VDD_F 1 DY 2

R5220 X02_0210 POLYSW-1D1A24V-GP-U

TPNL_INT 1 2 2 TPNL 1
TOUCH_PANEL_INTR# [24]
R5217 0R3J-0-U-GP
0R0402-PAD X02_0210
EE Note: X02_0210
1

RN5204 C5217

1
DMIC_CLK_EDP
DMIC_DATA_EDP
2 3 DMIC_CLK [27] DY SC10P50V2JN-4GP
Never change R5217 C5208
1 4 DMIC_DATA [27] TPNL
2

to short pad after MP SC2D2U10V3KX-1GP

2
USB_CAMERA_N_EDP SRN33J-5-GP-U
EC5201 EC5202
1

USB_CAMERA_P_EDP
X04_0513
R5221
SC22P50V2JN-4GP

SC22P50V2JN-4GP

X03_0325 3.3V
2

TPNL_RST 1 2 PLT_RST# [18,24,61,68]

X03_0325
1

0R0402-PAD Wistron Confidential document, Anyone can not

1

ED5201 C5216 Duplicate, Modify, Forward or any other purpose

application without get Wistron permission
AZ5315-02F-GP
DY SC10P50V2JN-4GP
DY
2

83.05315.0A0
3

X01 DY_TPNL

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LCD/Camera/MIC/TouchPanel
Size Document Number Rev
Custom
Iris BSW A00
Date: Friday, June 05, 2015 Sheet 55 of 109
5 4 3 2 1
 5 4 3 2 1

Vinafix.com
D D

C C

Blanking
B B

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 56 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = HDMI

HDMI Level Shifter & Connector HDMI1
HDMI / VGA CONN

PTH10 PTH9
PTH12 PTH7
PTH11 NP1
PTH8
HDMI_DATA2_R_C HP1
HP2
6
11
X02_0203
HDMI_DATA2#_R_C
X04_0513 X04_0513 HDMI_DATA1_R_C
HP3 1 CRT_R [58]

Vinafix.com
HP4
R5419 R5431 HP5 7
HDMI_CLK#_R 1 2 HDMI_CLK#_R_C HDMI_DATA0#_R 1 2 HDMI_DATA0#_R_C HDMI_DATA1#_R_C HP6 12 CRT_DDCDATA_CON [58]
HDMI_DATA0_R_C HP7 2 CRT_G [58]
0R0402-PAD 0R0402-PAD HP8
HDMI_DATA0#_R_C 5V_HDMI_CRT_S0_R
D
X02_0203 HDMI_CLK_R_C
HP9 8 D

A00_0528 HP10 13 CRT_HSYNC_CON [58]

A00_0528 HP11 3 CRT_B [58]

1
HDMI_CLK#_R_C HP12
HDMI R5424 HDMI R5421 HP13 9
150R2J-L1-GP-U 150R2J-L1-GP-U HP14 14 CRT_VSYNC_CON [58]
5V_HDMI_CRT_S0_R DDC_CLK_HDMI HP15 4
DDC_DATA_HDMI HP16

2
HP17 10
HP18 15 CRT_DDCCLK_CON [58]
HP19 5
X04_0513 X04_0513 PTH3
PTH5 NP2

1
R5426 R5432 C5418 HDMI PTH6 PTH1
HDMI_CLK_R 1 2 HDMI_CLK_R_C HDMI_DATA0_R 1 2 HDMI_DATA0_R_C PTH4 PTH2

SCD1U16V2KX-3GP
2
0R0402-PAD 0R0402-PAD PAD-D-SUB-HDMI-COLAY-GP-U

HPD_HDMI_CON
X04_0513 X04_0513
R5433 R5435 ZZ.00PAD.BI1
HDMI_DATA2#_R 1 2 HDMI_DATA2#_R_C HDMI_DATA1#_R 1 2 HDMI_DATA1#_R_C
HDMI_Manual:22.10296.981
0R0402-PAD 0R0402-PAD
1D8V_S5
A00_0528
A00_0528
1

1
HDMI R5423 HDMI R5422 R5405
150R2J-L1-GP-U 150R2J-L1-GP-U HDMI
X04_0513 10KR2J-3-GP
R5402 Q5404
2

2
1 2 HDMI_HPD_G G
Low active
0R0402-PAD D HDMI_CRT_DET [8,58]
X04_0513 X04_0513 S HDMI

1
R5436
HDMI_DATA2_R 1 R5434 2 HDMI_DATA2_R_C HDMI_DATA1_R 1 2 HDMI_DATA1_R_C R5403 2N7002K-2-GP
HDMI 84.2N702.J31
0R0402-PAD 0R0402-PAD 100KR2J-1-GP 2ND = 84.2N702.031

2
C C
close to connector
X03_0319
RN5407
C5410 1 HDMI
2 SCD1U16V2KX-3GP HDMI_CLK#_R 1 4 HDMI_DATA1#
[8] HDMI_CLK# C5411 SCD1U16V2KX-3GP HDMI_CLK_R [8,58] HDMI_CRT_N1 HDMI_DATA1
[8] HDMI_CLK
1 HDMI
2
[8,58] HDMI_CRT_P1
2 HDMI 3

C5416 1 HDMI
2 SCD1U16V2KX-3GP HDMI_DATA0#_R SRN0J-6-GP
[8] HDMI_DATA0# C5412 SCD1U16V2KX-3GP HDMI_DATA0_R
[8] HDMI_DATA0
1 HDMI
2
RN5408
1 4 HDMI_DATA2#
[8,58] HDMI_CRT_N0 HDMI_DATA2
[8,58] HDMI_CRT_P0
2 HDMI 3

HDMI_DATA1# C5415 1 HDMI

2 SCD1U16V2KX-3GP HDMI_DATA1#_R SRN0J-6-GP
HDMI_DATA1 C5413 1 HDMI
2 SCD1U16V2KX-3GP HDMI_DATA1_R

HDMI_DATA2# C5414 1 HDMI

2 SCD1U16V2KX-3GP HDMI_DATA2#_R
HDMI_DATA2 C5417 1 HDMI
2 SCD1U16V2KX-3GP HDMI_DATA2_R
8
7
6
5

8
7
6
5

RN5406 RN5404
SRN620J-GP HDMI SRN620J-GP
HDMI
1
2
3
4

1
2
3
4

HDMI_PLL_GND
2

R5425
DY 0R2J-2-GP
Level shift
D

5V_S0 D5401
Q5405
1

2N7002K-2-GP 1 5V_DDC_HDMI1
84.2N702.J31
HDMI 3 HDMI
2ND = 84.2N702.031
B 3rd = 84.07002.I31 2 5V_DDC_HDMI2 B

4th = 84.2N702.W31
G

5V_S0
LBAW56LT1G-GP
83.00056.Y11
2nd = 83.00056.G11

3
4
1D8V_S0
R5420
RN5401
1 DY 2 HDMI Vth(GS) = 1V , Ciss < 50pF
SRN2K2J-1-GP
100KR2J-1-GP

G
2
1
HDMI
DDC_DATA_HDMI D S HDMI_DATA_CPU [8]
Q5401 pull-high at p.8
DMN5L06K-7-GP
(1D8V_S0)
84.05067.031
1D8V_S0

G
HDMI
DDC_CLK_HDMI D S HDMI_CLK_CPU [8]
Q5402 pull-high at p.8
DMN5L06K-7-GP
(1D8V_S0)
84.05067.031

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
A application without get Wistron permission A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

HDMILevelShifter/Conn
Size Document Number Rev
A2
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 57 of 109
5 4 3 2 1
 5 4 3 2 1

5V_HDMI_CRT_S0 5V_S0

CRT_R 1 AFTP5501 AFTE14P-GP

CRT_G 1 AFTP5302 AFTE14P-GP
CRT_B 1 AFTP5303 AFTE14P-GP
5V_HDMI_CRT_S0_R 1 For DIODE in case of leakage from HDMI1
AFTP5304 AFTE14P-GP
CRT_DDCDATA_CON 1 AFTP5305 AFTE14P-GP
CRT_DDCCLK_CON 1
CRT_VSYNC_CON AFTP5306 AFTE14P-GP R5318
1 AFTP5307 AFTE14P-GP
CRT_HSYNC_CON

Vinafix.com HDMI
1 AFTP5308 AFTE14P-GP 2 1

0R3J-0-U-GP

D 5V_HDMI_CRT_S0_R D
D5301
F5301
1 2 K CRT A

POLYSW-1D1A6V-9-GP-U RB551V30-GP

83.R5003.H8H
69.48001.081
2ND = 69.50011.081
3RD = 69.50013.101

CRT RGB
CRT_DDCDATA_CON CRT H/VSYNC
CRT_HSYNC_CON
CRT_VSYNC_CON CRT SMBUS
CRT_DDCCLK_CON

C5316
SC100P50V2JN-3GP

SC10P50V2JN-4GP
1

1
C5313

SC10P50V2JN-4GP
C5311

C5307
DY DY DY DY SC100P50V2JN-3GP

2
L5303
DP_CRT_R 1 CRT 2 BLM18BB220SN-GP CRT_R
CRT_R [57]
68.00084.A11
2nd = 68.00245.011

L5301
DP_CRT_G 2 BLM18BB220SN-GP CRT_G
1 CRT CRT_G [57]
68.00084.A11
C 2nd = 68.00245.011 C

L5302

DP_CRT_B 2 BLM18BB220SN-GP CRT_B

1 CRT CRT_B [57]
1 R5301

1 R5313

1 R5314

68.00084.A11
5V_HDMI_CRT_S0
SC2P50V2CN-GP

2nd = 68.00245.011
1

1
SC2P50V2CN-GP

SC2P50V2CN-GP

SC2P50V2CN-GP

SC2P50V2CN-GP

SC2P50V2CN-GP

DP_CRT_HSYNC_CON R5311 1 CRT 2 33R2J-2-GP CRT_HSYNC_CON [57]

C5306

C5312

C5309

C5314

C5310

C5318

CRTCRT CRT CRTCRT CRT DP_CRT_VSYNC_CON R5307

CRT 1 CRT 2 33R2J-2-GP CRT_VSYNC_CON [57]
2

CRT CRT

4
3
75R2F-2-GP 2

75R2F-2-GP 2

75R2F-2-GP 2

RN5301 CRT
SRN2K2J-1-GP

1
2
CRT_DDCDATA_CON

CRT_DDCCLK_CON

Layout note: U5302

All cap need close to chip AVCC33 CRT_PCH_HPD CRT_PCH_HPD R5317 HDMI_CRT_DET_G G
Q5301

SCD1U16V2KX-3GP
2 CRT
1
C5317
24
AVCC_33 HPD
1 1 CRT 2
3D3V_S0 AVCC33 VCCK_12 0R2J-2-GP
2 CRT
1 25 2 PCU_SMB_CLK [12,16,65] D HDMI_CRT_DET [8,57]

1
SCD1U16V2KX-3GP C5303 AVCC_12 SMB_SCL
3 PCU_SMB_DATA [12,16,65]
3D3V_S0 SMB_SDA R5310
R5304 2
SCD1U16V2KX-3GP2
CRT
1
3D3V_S0
5
DVCC_33
S CRT
1C5320
CRT 20 4 CRT_DDCCLK_CON [57] CRT100KR2J-1-GP
SCD1U16V2KX-3GP C5322 DVCC_33 VGA_SCL 2N7002K-2-GP
1 CRT 2
VCCK_12 VGA_SDA
6 CRT_DDCDATA_CON [57]
2 CRT
1 19 84.2N702.J31

2
SCD1U16V2KX-3GP2 VCCK_12
1C5301
CRT 2ND = 84.2N702.031
2

0R3J-0-U-GP C5323 SC2D2U10V3KX-1GP

2 1C5304
CRT VDD_DAC_33 9 7 DP_CRT_VSYNC_CON
VDD_DAC_33 VSYNC DP_CRT_HSYNC_CON
CRT SC10U6D3V3MX-GP SCD1U16V2KX-3GP2
SC10U6D3V3MX-GP
1C5324
CRTC5302 HSYNC
8
1

LDO_EN 21 15 DP_CRT_R
LDO_EN RED_P
16
C5327 1CRT 2 SCD1U16V2KX-3GP CPU_DPC_AUXP_U RED_N
[8] HDMI_AUXP_CPU 26
B C5328 1CRT 2 SCD1U16V2KX-3GP CPU_DPC_AUXN_U AUX_P DP_CRT_G B
[8] HDMI_AUXN_CPU 27 12
AUX_N GREEN_P
C5329 1CRT 2 SCD1U16V2KX-3GP CPU_DPC_P0_U
CRT GREEN_N 13
[8,57] HDMI_CRT_P0 29
3D3V_S0 VDD_DAC_33 C5326 1CRT 2 SCD1U16V2KX-3GP CPU_DPC_N0_U LANE0P DP_CRT_B
[8,57] HDMI_CRT_N0 30 10
LANE0N BLUE_P
11
C5330 1CRT 2 SCD1U16V2KX-3GP CPU_DPC_P1_U BLUE_N
R5303 [8,57] HDMI_CRT_P1 31
C5325 1CRT 2 SCD1U16V2KX-3GP CPU_DPC_N1_U LANE1P POL1_SDA
[8,57] HDMI_CRT_N1 32 22
LANE1N POL1_SDA POL2_SCL
1 CRT 2
POL2_SCL
23

CLK_DP2VGA 17
[18] CLK_DP2VGA
2

0R3J-0-U-GP C5321 CPU_DPC_XO XI/CKIN

18 14
XO GND_DAC
CRT SC10U6D3V3MX-GP RRX 28 33
1

RRX GND

Vendor suggestion:
PIN18 (XO) 0R 透透 接接 RTD2168-CGT-GP
1

071.02168.0003
1

CRT R5305
0R2J-2-GP CRT12KR2F-L-GP
R5306
2
2

3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0

2

R5309 R5315 R5302 U5304

4K7R2J-2-GP DY 4K7R2J-2-GP CRT 4K7R2J-2-GP CRT
1 8
A0 VCC
2 DY 7
1

A1 WP POL2_SCL
3 6
POL1_SDA POL2_SCL LDO_EN A2 SCL POL1_SDA
4 5
A VSS SDA A
2

R5308 R5316 R5312 CAT24C128WI-GT3-GP

4K7R2J-2-GP CRT 4K7R2J-2-GP DY 4K7R2J-2-GP DY 72.24128.J01
1

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
(Reserved)DP to VGA Converter
Size Document Number Rev
A2
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 58 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = WLAN

Vinafix.com
D D

C C

Blanking
B B

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

(Reserved)
Size Document Number Rev
A3
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 59 of 109
5 4 3 2 1
 5 4 3 2 1

X01
Main Func = HDD 3D3V_S0
HDD Re_driver HDD Re_driver

C5629
SC1U10V2KX-1GP

C5630
SC1U10V2KX-1GP

C5631
SC1U10V2KX-1GP
1

1
SATA HDD Connector HDD Re_driver

2
HDD Re-driver HDD Re_driver

5V_S0
X04_0513
5V_HDD_S0
[19] HDD_DEVSLP_R
Vinafix.com HDD_DEVSLP_R
[19] SATA_TX_CPU_P0
HDD Re_driver
C5625 1 2SCD01U50V2KX-1GP
U5601

SATA3_DTX_CRX_P0
C5627 1
C5628 1
2 SCD01U50V2KX-1GP
2 SCD01U50V2KX-1GP
SATA_RX_CPU_P0 [19]
SATA_RX_CPU_N0 [19]

[19] SATA_TX_CPU_N0 1 2 10
VCC TX1P
15
SATA3_DTX_CRX_N0
HDD Re_driver
R5601 HDD1 C5626 SCD01U50V2KX-1GP 20 14
D
80 mils 1 2 14 3D3V_S0
HDD Re_driver
VCC TX1N
5 SATA3_PRX_DTX_P0_L 3D3V_S0
D
TX2P SATA3_PRX_DTX_N0_L
12 4
0R0805-PAD-2-GP-U SATA3_DTX_CRX_P0 SCD01U50V2KX-1GP SATA_TXP0_C SATA3_PTX_DRX_P0_R TX2N
2 C5601
1SATA 11 1

2
SATA3_DTX_CRX_N0 SCD01U50V2KX-1GP SATA_TXN0_C SATA3_PTX_DRX_N0_R RX1P SATA3_EQ1_HDD
2 C5602
1SATA 10 2 17
1

1
C5605 C5606 C5608 C5607 R5612 SATA3_DRX_CTX_P0 RX1N EQ1 SATA3_EQ2_HDD R5610
9 11 19
RX2P EQ2

SC10U25V5KX-GP

SCD1U16V2KX-3GP
SATA3_DRX_CTX_N0 SCD01U50V2KX-1GP 2 C5603 SATA_RXN0_C 10KR2J-3-GP SATA3_DRX_CTX_N0 3D3V_S0 10KR2J-3-GP
DY DY SATA SATA 1SATA 8 DY 12
RX2N DY
SC10U10V5KX-2GP

SCD1U16V2KX-3GP

SATA3_DRX_CTX_P0 SCD01U50V2KX-1GP 2 C5604

1SATA SATA_RXP0_C 7 7 3D3V_S0
2

2
EN
6 SATA

1
2
HDD_DEVSLP_R 5 SATA3_DE1_HDD 9
MSATA_3D3V_S0 SATA3_DE2_HDD DE1 R5608
MSATA_3D3V_S0 4 8 3
DE2 GND

2
3D3V_S0 10KR2J-3-GP
Layout Note 5V_HDD_S0 3
3D3V_S0 HDD_DEW1 GND
13 DY
2 R5613 16 18
DEW1 GND

2
AC coupling Cap; DY 10KR2J-3-GP HDD_DEW2 6 21

1
2
DEW2 GND R5611
place near CONN(<100mils) 1
13 R5614 DY 10KR2J-3-GP

1
DY 10KR2J-3-GP HDD Re_driver
HDD Re-driver SN75LVCP601RTJR-GP STAR-CON12-1-GP R5619

1
2
4K7R2J-2-GP 3D3V_S0 SN75LVCP601RTJR-GP
020.K0125.0012 DY

1
71.75601.003 R5609
DY 10KR2J-3-GP

2
3D3V_S0 MSATA_3D3V_S0
X04_0513

1
R5615 R5617

1
R5604 DY 10KR2J-3-GP 4K7R2J-2-GP
DY
1 2 R5618
4K7R2J-2-GP
HDD Re_driver

2
0R0402-PAD

2
EMI Request

1
R5616
4K7R2J-2-GP HDD Re_driver
EU5601

2
DY
SATA_TXP0_C 1 10 SATA_TXP0_C
SATA_TXN0_C LINE_1 NC#10 SATA_TXN0_C
2 9
3
LINE_2
GND
NC#9
GND
8 0110: Add
SATA_RXN0_C 4 7 SATA_RXN0_C
SATA_RXP0_C LINE_3 NC#7 SATA_RXP0_C
5 6
LINE_4 NC#6
C C

AZ1045-04F-R7G-GP
75.01045.073

X01 NON HDD Re-driver

SATA_RX_CPU_P0 1 R5605
DY_NON SN75L 2SATA3_DRX_CTX_P0_R 1 R5606 2 DY_NON SN75L SATA3_DRX_CTX_P0
SATA_RX_CPU_N0 1 R5622
DY_NON SN75L 2SATA3_DRX_CTX_N0_R 1 R5625 2 DY_NON SN75L SATA3_DRX_CTX_N0
SATA_TX_CPU_P0 1 R5623
DY_NON SN75L 2SATA3_DTX_CRX_P0_R 1 R5626 2 DY_NON SN75L SATA3_DTX_CRX_P0
SATA_TX_CPU_N0 1 R5624
DY_NON SN75L 2SATA3_DTX_CRX_N0_R 1 R5627 2 DY_NON SN75L SATA3_DTX_CRX_N0

0R2J-2-GP 0R2J-2-GP
0R2J-2-GP 0R2J-2-GP
0R2J-2-GP 0R2J-2-GP
0R2J-2-GP 0R2J-2-GP

B
Main Func = ODD B

ODD Connector
X01
ODD1

22
20
19
18 ODD_PWR_5V ODD_PWR_5V 5V_S0
SATA_ODD_DA#_C
17
16
1
TP5602 TPAD14-OP-GP
X01
15
14 R5603 1 2 0R3J-0-U-GP
13 R5602 1
DY_ODD
2 0R3J-0-U-GP
12
DY_ODD
11
1

C5613
10 X01
DY_ODD9 SATA_ODD_PRSNT#_C TP5601 TPAD14-OP-GP
DY_ODD
SC10U6D3V3MX-GP
8 1
2

7
6 SATA_RXP1_R C5610 2 SCD01U50V2KX-1GP
1DY_ODD SATA_RX_CPU_P1 [19]
5 SATA_RXN1_R C5609 2 SCD01U50V2KX-1GP
1DY_ODD SATA_RX_CPU_N1 [19]
4
3 SATA_TXN1_R C5611 2 SCD01U50V2KX-1GP
1DY_ODD SATA_TX_CPU_N1 [19]
2 SATA_TXP1_R C5612 2 SCD01U50V2KX-1GP
1DY_ODD SATA_TX_CPU_P1 [19]
1
21
X01
ACES-CON20-30-GP-U
20.K0708.020
A A

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

HDD/ODD
Size Document Number Rev
A2
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 60 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = WLAN EMI request

3D3V_S0 3D3V_S0

PEG_CLK0_CPU#

PEG_CLK0_CPU
3D3V_S0
3D3V_WLAN_S0 level shift

1
A00_0528 R5803 R5804

1.1A
1
R5805
2
Vinafix.com DY 10KR2J-3-GP DY 2K2R2J-2-GP

2
EC5801
SC33P50V2JN-3GP

EC5802
SC33P50V2JN-3GP
D 0R0805-PAD CLK_PCIE_WLAN_REQ#_B D

1
C5802
SC10U6D3V3MX-GP

C5805
SC10U6D3V3MX-GP

C5806
SCD1U16V2KX-3GP

C5804
SCD1U16V2KX-3GP
1

1
DY DY
DY

G
2

2
2

2
Q5801
DMN5L06K-7-GP
CLK_PCIE_WLAN_REQ# D DY S PEG_CLKREQ0_WLAN# [19]
84.05067.031
pull-high at p.19
(1D8V_S0)
R5815 1 2 0R2J-2-GP

DY

WLAN1

NP2 NP1
3D3V_WLAN_S0 NP2 NP1
76 77
76 77
74 75
3_3V GND
72 73
3_3V REFCLKN1
70 71
PEWAKE1#_0/3_3V REFCLKP1
68 69
CLKREQ1#_0/3_3V GND
66 67
PERST1#_0/3_3V PETN1
X04_0513 64
62
RESERVED#64
ALERT_0/3_3
PETP1
GND
65
63
60 61
TPAD14-OP-GP TP5802 E51_RX2 I2C_CLK_0/3_3 PERN1
1 58 59
R5806 WLAN_DISABLE#1 I2C_DATA_0/3_3 PERP1
[24] WIFI_RF_EN 1 20R0402-PAD 56 57
R5808 BLUETOOTH_EN_NGFF W_DISABLE#1_0/3_3V GND WLAN_WAKE
[24] BLUETOOTH_EN 1 20R0402-PAD 54 55 1 TP5803 TPAD14-OP-GP
R5809 PLT_RST_NGFF# RESERVED/W_DISABLE#2_0/3_3V PEWAKE0#_0/3_3V CLK_PCIE_WLAN_REQ#
[18,24,55,68] PLT_RST# 1 20R0402-PAD 52 53
50
PERST0#_0/3_3V 3.3V CLKREQ0#_0/3_3V 51
SUSCLK/32KHZ_0/3_3V GND
48 49 PEG_CLK0_CPU# [19]
TPAD14-OP-GP TP5801 E51_RX1 COEX1_0/1_8V REFCLKN0
1 46 47 PEG_CLK0_CPU [19]
E51_TX1 COEX2_0/1_8V REFCLKP0
44 45
COEX3_0/1_8V GND
C 42 43 PCIE_RX_CPU_N0 [19]
C
CLINK_CLK PETN0
40 41 PCIE_RX_CPU_P0 [19]
E51_TX2 CLINK_DATA PETP0
38 39
CLINK_RESET GND
36 37 PCIE_TX_CON_N0 [19]
GND PERN0
34 35 PCIE_TX_CON_P0 [19]
DP_ML0P PERP0
32 33
DP_ML0N GND
30 31
GND DP_HPD_0/3_3V
28
26
DP_ML1P
DP_ML1N Module Key GND
DP_ML2P
29
27
X04_0513
24 25
GND DP_ML2N
Reserved for NGFF Debug Card 22
20
DP_AUXP
DP_AUXN
GND
DP_ML3P
23
21
R5801
18 19 USB_HUB_PN1_R 2 1
GND DP_ML3N USB_HUB_PN1 [34]
16 17
3D3V_S5 3D3V_WLAN_S0 LED#2 DP_MLDIR
3D3V_WLAN_S0 0R0603-PAD
R5807
6 7
LED#1 GND USB_HUB_PN1_R
1 DY 2 4
3_3V USB_D-
5
USB_HUB_PP1_R
2 3
3_3V USB_D+
1
R5810 0R2J-2-GP 0R2J-2-GP E51_TX1 NGFF_KEY_A 75P GND
[24] E51_TXD 1 DY 2 A00_0528
SKT-MINI67P-12-GP-U
R5811 1 DY 2 0R2J-2-GP E51_TX2

062.10007.0081
R5802
EE Note:
USB_HUB_PP1_R 2 1
For NFGG Debug Card: USB_HUB_PP1 [34]
Stuff R5807,R5810,R5811(optional). 0R0603-PAD
DY R5805. X04_0513

AFTE14P-GP AFTP5801 1 3D3V_WLAN_S0

AFTE14P-GP AFTP5802 1 CLK_PCIE_WLAN_REQ#
AFTE14P-GP AFTP5803 1 WLAN_DISABLE#1
AFTE14P-GP AFTP5804 1 BLUETOOTH_EN_NGFF
AFTE14P-GP AFTP5805 1 PLT_RST_NGFF#
B AFTE14P-GP AFTP5806 1 USB_HUB_PN1_R B
AFTE14P-GP AFTP5807 1 USB_HUB_PP1_R

A A

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

WLAN CONN
Size Document Number Rev
A2
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 61 of 109
5 4 3 2 1
 5 4 3 2 1

SSID = WWAN
Vinafix.com
D D

C C

Blanking
B B

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

(Reserved) WWAN
Size Document Number Rev
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 62 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = mSATA

U6301B 2 OF 2
3D3V_S5_PRIME 1D8V_S5
A00_0602
X02_0204 A1 NC#A1 NC#J3 J3

2
A2 J12
A00_0602 1D8V_S0
eMMC
Vinafix.com A8
A9
NC#A2
NC#A8
NC#A9
NC#J12
NC#J13
NC#J14
J13
J14

2
R6311 R6325 A10 K1
0R3J-0-U-GP 0R3J-0-U-GP U6301A 1 OF 2 NC#A10 NC#K1
D A11 K2 D

1
NC#A11 NC#K2
eMMC
R6324 EMMC_VCCQ EMMC_DATA_0_R R6315 1eMMC
A12 NC#A12 NC#K3 K3
1 DY 2 C6 VDD DAT0 A3 210R2J-2-GP EMMC_DATA_0 [8] A13 NC#A13 NC#K12 K12
0R3J-0-U-GP M4 A4 EMMC_DATA_1_R R6316 1eMMC 210R2J-2-GP A14 K13
EMMC_DATA_1 [8]
1
VDD DAT1 NC#A14 NC#K13

1
C6303 C6304 N4 A5 EMMC_DATA_2_R R6317 1eMMC 210R2J-2-GP B1 K14
3D3V_S0 VDD DAT2 EMMC_DATA_2 [8] NC#B1 NC#K14
SCD1U16V2KX-3GP SC4D7U6D3V2MX-GP-U P3 B2 EMMC_DATA_3_R R6318 1eMMC 210R2J-2-GP B7 L1
VDD DAT3 EMMC_DATA_3 [8] NC#B7 NC#L1
0R3J-0-U-GP eMMC eMMC EMMC_DATA_4_R R6319 1eMMC 210R2J-2-GP
X03_0318 P5 B3 EMMC_DATA_4 [8] B8 L2

2
R6310 VDD DAT4 EMMC_DATA_5_R R6320 1eMMC NC#B8 NC#L2
DAT5 B4 210R2J-2-GP EMMC_DATA_5 [8] B9 NC#B9 NC#L3 L3
1 DY 2 C6302 EMMC_VCC E6 B5 EMMC_DATA_6_R R6321 1eMMC 210R2J-2-GP B10 L12
VDDF DAT6 EMMC_DATA_6 [8] NC#B10 NC#L12
1

1
C6305 F5 B6 EMMC_DATA_7_R R6322 1eMMC 210R2J-2-GP B11 L13
VDDF DAT7 EMMC_DATA_7 [8] NC#B11 NC#L13
SC4D7U6D3V2MX-GP-U eMMC SCD1U16V2KX-3GP J10 B12 L14
C6301 VDDF NC#B12 NC#L14
K9 B13 M1
2

2
SC1U10V2KX-1GP VDDF NC#B13 NC#M1
eMMC VSS A6 B14 NC#B14 NC#M2 M2
2 1 EMMC_VDDI C2 VDDI VSS C4 C1 NC#C1 NC#M3 M3
1D8V_S5
X03_0318 eMMC VSS E7 C3 NC#C3 NC#M7 M7
VSS G5 C5 NC#C5 NC#M8 M8

R6312 1 10R2J-2-GP EMMC_CLK_R

eMMC VSS H10 C7 NC#C7 NC#M9 M9
[8] EMMC_CLK
R6313 1
eMMC210R2J-2-GP EMMC_CMD_R
M6 CLK VSS J5
EMMC_CMD R6329 10KR2J-3-GP
C8 NC#C8 NC#M10 M10
[8] EMMC_CMD eMMC2R6314 10R2J-2-GP
M5 CMD VSS K8 DY
1 2 C9 NC#C9 NC#M11 M11
VSS N2 C10 NC#C10 NC#M12 M12
1 eMMC2 EMMC_RCLK_R H5 N5 C11 M13
[8] EMMC_RCLK DATA_STROBE VSS NC#C11 NC#M13
EMMC_RESET#1 eMMC2 EMMC_RESET#_R K5 P4 EMMC_DATA_0 R6330 DY
1 2 10KR2J-3-GP C12 M14
RST# VSS NC#C12 NC#M14
VSS P6 C13 NC#C13 NC#N1 N1
R6309 10R2J-2-GP C14 N3
EMMC_DATA_1 R6331 10KR2J-3-GP NC#C14 NC#N3
EMMC_RCLK_R X04_0512 DY
1 2 D1 NC#D1 NC#N6 N6
D2 NC#D2 NC#N7 N7
072.KMBG4.0C0U D3 N8
EMMC_DATA_2 R6332 10KR2J-3-GP NC#D3 NC#N8
DY
1 2 D4 NC#D4 NC#N9 N9
1

D12 NC#D12 NC#N10 N10

C R6338 D13 N11 C
EMMC_DATA_3 R6333 10KR2J-3-GP NC#D13 NC#N11
DY 10KR2J-3-GP DY
1 2 D14 NC#D14 NC#N12 N12
E1 NC#E1 NC#N13 N13
EMMC_VCCQ 1D8V_S5 E2 N14
2

EMMC_DATA_4 R6334 10KR2J-3-GP NC#E2 NC#N14

DY
1 2 E3 NC#E3 NC#P1 P1
E12 NC#E12 NC#P2 P2
E13 NC#E13 NC#P8 P8
2

EMMC_DATA_5 R6335 DY 10KR2J-3-GP eMMC

X02_0213 R6326
1 2 E14
F1
NC#E14
NC#F1
NC#P9
NC#P11
P9
P11
10KR2J-3-GP DY
Layout note: R6328 close to CPU F2 P12
G

EMMC_DATA_6 R6336 10KR2J-3-GP NC#F2 NC#P12

DY
1 2 F3 NC#F3 NC#P13 P13
X04_0513 F12 P14
1

R6328 NC#F12 NC#P14

F13 NC#F13
EMMC_RESET# DY PLTRST#_CPU_D 1 EMMC_DATA_7 R6337 DY 10KR2J-3-GP
S D
Vth(max)=1.0V
2 PLTRST#_CPU [18,99] 1 2 F14
G1
NC#F14
NC#G1
X02_0204
RFU#A7 A7
0R0402-PAD G2 E5
Q6301 NC#G2 RFU#E5
G12 NC#G12 RFU#E8 E8
DMN5L06K-7-GP eMMC_E9
84.05067.031 X02_0209 G13
G14
NC#G13
NC#G14
RFU#E9
RFU#E10
E9
E10 eMMC_E10
H1 F10 eMMC_F10
NC#H1 RFU#F10
H2 NC#H2 RFU#G3 G3

R6327
1 eMMC20R2J-2-GP H3 NC#H3 RFU#G10 G10
H12 NC#H12 RFU#K6 K6
eMMC_E9 1 TP6301 TPAD14-OP-GP H13 K7
eMMC_E10 TP6302 TPAD14-OP-GP NC#H13 RFU#K7 eMMC_K10
A00_0602 eMMC_F10
1
1 TP6303 TPAD14-OP-GP
H14
J1
NC#H14
NC#J1
RFU#K10
RFU#P7
K10
P7
eMMC_K10 1 TP6304 TPAD14-OP-GP J2 P10
NC#J2 RFU#P10

B X02_0209 B

072.KMBG4.0C0U

X03_0315

A A

Wistron Corporation
Wistron Confidential document, Anyone can not 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Duplicate, Modify, Forward or any other purpose Taipei Hsien 221, Taiwan, R.O.C.
application without get Wistron permission
Title

eMMC
Size Document Number Rev
A3
Iris BSW A00
Date: Tuesday, June 02, 2015 Sheet 63 of 109
5 4 3 2 1
 5 4 3 2 1

3D3V_S5 1 AFTP6103
Main Func = Power BTN
Power Button & Hall Sensor LID_CLOSE#_CONN 1 AFTP6104

1
G6401
Vinafix.com GAP-OPEN
6
PWR1

2
D 4 D
R6106 1 2 33R2J-2-GP LID_CLOSE#_CONN 3
[24] LID_CLOSE#
R6102 1 2 330R2J-3-GP KBC_PWRBTN#_C 2
[24] KBC_PWRBTN#

3D3V_S5 1
AFTP6101 1

1
5

1
ED6101 EC6101 EC6104

1
C6102 C6103 DY DY DY C6101 ETY-CON4-34-GP

AZ5725-01FDR7G-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP
DY DY DY 20.K0465.004

SCD1U16V2KX-3GP
SC1KP50V2KX-1GP

SC1KP50V2KX-1GP
2

2
2
1 AFTP6102

C C

Main Func = LED 5V_S5

Q6101 R2
R6104 E
1 2 AMBER_LED_BAT_B B R6108
[24] CHG_AMBER_LED# R1
C AMBER_LED_BAT_R 1 2
0R0402-PAD
Battery LED1 X04_0513 DDTA144VCA-7-F-GP 470R2J-2-GP

1
EC6102
84.00144.N11 X01
DY
Low actived from KBC GPIO SC220P50V2JN-3GP LED1

2
AMBER_LED_BAT 1 + Yellow
- 3
2 +
White
WHITE_LED_BAT

5V_S5

Q6102 R2 LED-YW-5-GP
B R6105 E 083.1212A.0070 B
1 2 WHITE_LED_BAT_B B R6109
[24] BATT_WHITE_LED# R1
C WHITE_LED_BAT_R 1 2 2ND = 083.00327.0070
0R0402-PAD
Battery LED2 X04_0513 DDTA144VCA-7-F-GP 1 330R2J-3-GP
84.00144.N11 EC6103
DY HDLED1
Low actived from KBC GPIO SC220P50V2JN-3GP
2

3
SATA_LED 1A 2K
DY
LED-W-27-GP-U
5V_S0
83.01221.R70
1D8V_S0 Q6104
Q6103 R6107
R2
E Wistron Confidential document, Anyone can not
SATA_LED#_C SATA_LED#_B R6110 Duplicate, Modify, Forward or any other purpose
DY
R1
3 1DY 2 B R1 DY SATA_LED_R application without get Wistron permission
1 C 1DY 2
2 0R2J-2-GP
R2 DDTA143ECA-7-F-GP 330R2J-3-GP
1

LTC043ZUB-FS8-GP 84.00143.K11 EC6105

A 84.00043.011
R1 = 4.7K R2 = 4.7K
DY SC220P50V2JN-3GP
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2

R1 = 4.7K R2 = 47K Taipei Hsien 221, Taiwan, R.O.C.

[19,24] SATA_LED# SATA HDD LED Title

pull-high at p.19
Low actived from CPU GPIO LEDBard/PowerButton
(1D8V_S0) Size Document Number Rev
Custom
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 64 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = KB Main Func = TPAD

Keyboard
Touchpad Power Touchpad Power Discharge
Internal Keyboard Connector (14") Vinafix.com 3D3V_S5 3D3V_S0 1D8V_S5 1D8V_S0 EE Note:
R6209,R6216,Q6206,R6226,R6227 are for Touchpad discharge.
D
X04_0513 X04_0513 Need to confirm the solution base on test result. D

1
AFTP6202 1 KB1 R6211 R6214 R6219 R6218
32
0R0402-PAD
DY 0R2J-2-GP 0R0402-PAD
DY
0R2J-2-GP
30
[24] KB_DET# AFTP6221 KROW7 TP_VDD TP_VDD_1D8V
1 29

2
AFTP6222 KROW6
AFTP6230
1
1 KROW4
28
27
X03_0315

1
AFTP6218 1 KROW2 26
AFTP6214 1 KROW5 25 C6204 C6205 R6209 R6216
AFTP6227 1 KROW1
KROW3
24 SCD1U16V2KX-3GP
TP_VDD_S
X03_0310 SCD1U16V2KX-3GP DY
AFTP6234 1 23 1 2 1 2 TP_VDD_1D8V_S 4K7R2J-2-GP 4K7R2J-2-GP
AFTP6228 1 KROW0 22 DY

2
AFTP6215 1 KCOL5 21
AFTP6224 1 KCOL4 20 X03_0310

S
AFTP6213 1 KCOL7 19 R6217

2
AFTP6223 1 KCOL6 18 1 2 TP_ON#_GATE G TP_ON#_GATE G
[24] TP_ON#
AFTP6231 KCOL8
G G
AFTP6208
1
KCOL3
17
1KR2J-1-GP
DY
[24] KROW[0..7]
AFTP6206
1
KCOL1
16
Q6204 D DY
R6215 Q6205 D
R6220
1 15 R6226
AFTP6226 1 KCOL2 14 DMP2130L-7-GP DMP2130L-7-GP Q6206

1
D

D
AFTP6207 KCOL0 84.02130.031 0R2J-2-GP TP_VDD 84.02130.031 0R2J-2-GP TP_VDD_1D8V TP_VDD_DISCHG
[24] KCOL[0..16]
AFTP6233
1
KCOL12
13 4 S1 D1
3 2 DY 1 TP_VDD
1 12 2ND = 84.03413.A31 2ND = 84.03413.A31 DY
AFTP6225 1 KCOL16 11 TP_ON#_GATE 5 G2
2 TP_ON#_GATE
AFTP6229 KCOL15 R6227
G1
220R2J-L2-GP
1 10
AFTP6203 1 KCOL13 9 X03_0310 TP_VDD_1D8V 1 DY 2 TP_VDD1D8_DISCHG 6 D2 S2
1
AFTP6216 1 KCOL14 8
AFTP6219 1 KCOL9 7 220R2J-L2-GP DMN2004DWK-7-GP
AFTP6220 KCOL11
AFTP6232
1
KCOL10
6 84.02004.03F
1 5
AFTP6204 1 CAP_LED 4 20.K0592.030
3
2

AFTP6201 1 1
31
INT#
ACES-CON30-10-GP
Check Level shift Check
C C

TP_VDD TP_VDD 3D3V_S5

pull-high at p.16
(TP_VDD) X01

1
R6204
[16] TP_I2C_DATA

1
R6203 Q6202 2K2R2J-2-GP I2C [16] TP_I2C_CLK
G

2
2K2R2J-2-GP
D
CAP LED Control

1
INT_TP# [8] EC6205 EC6206
5V_S0 INT_TP#_CONN S DY DY

SC4D7P50V2BN-GP

SC4D7P50V2BN-GP
LOW actived from KBC GPIO

2
2N7002K-2-GP
Q6201 84.2N702.J31
R6202 R2
E 2ND = 84.2N702.031 X03_0310
1 2 CAP_LED_R# B R6201
[24] CAP_LED# R1
CAP_LED_Q CAP_LED
C 1 2
0R0402-PAD DDTA144VCA-7-F-GP 1KR2J-1-GP R6205
DY
1 2 0R2J-2-GP
A00_0528 84.00144.N11

CAP_LED_Q
1

EC6207 (#514849)I2C PTP Pins

DY SCD1U16V2KX-3GP TP LID_CLOSE#
‧‧
Standard I2C pins for interrupt driven I2C device:
+3.3V VDD
2

‧‧
GND
SCL (clock)
TP_VDD
X01 ‧
SDA (data)
INT# (or INTR#, interrupt), also known at ATTN# (attention)
—Active low

B
1
R6225
DY 2 TP_LID_CLOSE# ‧
Other pins needed on I2C PTP:
wake# - level trigger signal from PTP to Host
—Overload the INTR#/ATTN# line (on the same pin) B
10KR2J-3-GP
—Only used during S3
—Active low

‧‧ —Connect to either wake capable mechanism on chipset

GPIO pin (Suspend Well powered) for S3 platform

TP_VDD
‧ GPIO on EC (and route to GPIO27 or PWRBTN# on chipset)
DIS# (Interrupt disable)
—level trigger signal from senor (slate mode decider) to PTP

‧ —Active low (active = disable any interrupt, including wake)

(Optional) +1.8V VDD

Touch Pad TP_VDD

2
1

RN6201
X01 SRN10KJ-5-GP C6201
2 1
3
4

SCD1U16V2KX-3GP Pin No. Pin name

pull-high at p.16 TPAD1
(3D3V_S0) X01 10 1 VDD (3.3V)
8
R6213 0R2J-2-GP TP_I2C_DATA 2 DAT(I2C)
R6206
[12,16,58] PCU_SMB_DATA
R6212
1 DY 2
0R2J-2-GP TP_I2C_CLK
7
SMBUS [12,16,58] PCU_SMB_CLK 1 DY 2 6
1 DY 2KB_LED_DET_C 1 5 3 CLK(I2C)
AFTP6246 INT_TP#_CONN 4
200KR2J-L1-GP TP_LID_CLOSE# 3 4 GND
R6221 33R2J-2-GP [24] TP_LID_CLOSE# TPDATA_C
[24] TPDATA 1 2 2
[24] KB_BL_CTRL
1
PS2 [24] TPCLK
R6222 1 2 33R2J-2-GP 5 INT#
AFTP6247 TPCLK_C 1
9 6 GPIO
EC6201
SC33P50V2JN-3GP

EC6202
SC33P50V2JN-3GP

EC6203
SC33P50V2JN-3GP

EC6204
SC33P50V2JN-3GP
AFTP6235 1 ACES-CON8-40-GP 7 DAT(PS2)
1

1
20.K0667.008
DY DY DY DY 8 CLK(PS2)
2

2
A A

TP_VDD 1 AFTP6239
TPCLK_C 1 AFTP6238 Wistron Confidential document, Anyone can not
TPDATA_C 1 AFTP6236 Duplicate, Modify, Forward or any other purpose
TP_I2C_CLK 1 AFTP6237 application without get Wistron permission
TP_I2C_DATA 1 AFTP6240
INT_TP#_CONN 1 AFTP6241
TP_LID_CLOSE# 1 AFTP6242
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
KeyBoard/TouchPad
Size Document Number Rev
A2
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 65 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = IO Connector

A00_0528 I/O Board Connector
Vinafix.com X01
USB_HUB_PN2_C
[34] USB_HUB_PN2
D D
CN6301
25

1
2
USB_HUB_PN2_C 3

TR6301
USB2 (USB2.0) USB_HUB_PP2_C 4
5
From Hub DLW 21HN121SQ2L-1GP USB_HUB_PP3_C 6
68.00201.201 USB3 (USB2.0) USB_HUB_PN3_C 7
USB2 (USB2.0) CMC IOBD_RSVD1
8
9
10

4
11
USB20_VCCA 12
13
14
USB_HUB_PP2_C IOBD_RSVD2 15
[34] USB_HUB_PP2
AUD_AGND 16
A00_0528 [29] AUD_PORTA_L_R_B 17
A00_0528 [29] AUD_PORTA_R_R_B
[29] SLEEVE_R
18
19
20
[34] USB_HUB_PN3
USB_HUB_PN3_C
Universal Jack [29] RING2_R 21
22
[29] JACK_PLUG 23
AUD_AGND 24
C C
26
3

PTW O-CON24-6-GP

68.00201.201
From Hub
DLW 21HN121SQ2L-1GP
TR6302 USB3 (USB2.0) CMC IOBD_RSVD1
MAIN = 020.K0139.0024
2ND = 020.K0095.0024
IOBD_RSVD2
moat
2

Pitch: 1mm

1
R6306 R6307 R6305 1 DY 2 0R3J-0-U-GP
[34] USB_HUB_PP3
USB_HUB_PP3_C DY 0R2J-2-GPDY 0R2J-2-GP Power: 5 pins
GND: 4 pins

2
A00_0528
AUD_AGND AGND: 2 Pins
X01

B B

USB_HUB_PN2_C 1 AFTP6301 AFTE14P-GP

USB_HUB_PP2_C 1 AFTP6302 AFTE14P-GP
USB_HUB_PN3_C 1 AFTP6303 AFTE14P-GP
USB_HUB_PP3_C 1 AFTP6304 AFTE14P-GP
RING2_R 1 AFTP6305 AFTE14P-GP
AUD_PORTA_L_R_B 1 AFTP6306 AFTE14P-GP
JACK_PLUG 1 AFTP6307 AFTE14P-GP

AUD_PORTA_R_R_B 1 AFTP6309 AFTE14P-GP

SLEEVE_R 1 AFTP6310 AFTE14P-GP
USB20_VCCA 1 AFTP6311 AFTE14P-GP

AUD_AGND 1 AFTP6313 AFTE14P-GP

1 AFTP6314 AFTE14P-GP

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

IO Board Connector
Size Document Number Rev
A3
Iris BSW A00
Date: Monday, June 01, 2015 Sheet 66 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = Hall Sensor

Vinafix.com
D D

C C

Blanking

B B

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Title

(Reserved)
Size Document Number Rev
A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 67 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = Debug

Layout Note:
Vinafix.com
Place near trace separated point
Debug Connector
D D
3D3V_S0
X01 12

RN6501 10
4 5 LPC_LAD0_R 9
[18,24] LPC_AD_CPU_R_P0
3 6 LPC_LAD1_R 8
[18,24] LPC_AD_CPU_R_P1
2 DY_DEBUG
7 LPC_LAD2_R 7
[18,24] LPC_AD_CPU_R_P2
1 8 LPC_LAD3_R 6 DY_DEBUG
[18,24] LPC_AD_CPU_R_P3
LPC_FRAME#_DEBUG 5
SRN0J-7-GP-U PLT_RST#_DEBUG 4
3
2
R6507 2 0R2J-2-GP
1DY_DEBUG
[18,24] LPC_FRAME#_CPU_R
[18,24,55,61] PLT_RST# R6508 2 0R2J-2-GP
1DY_DEBUG 1 A00_0529
[18] LPC_CLK_LPC
11
DB1
PAD-ACES-CON10-14-GP
C
ZZ.00PAD.GV1 C

20.F1180.010: Dummy Pad with solder mask is ZZ.00PAD.GV1

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Title

Debug connector
Size Document Number Rev
A4
Iris BSW A00
Date: Friday, May 29, 2015 Sheet 68 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = Sensor Hub+Accelerometer (G-Sensor)+Gyro+Proximity SAR+ALS

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Title

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Size Document Number Rev
A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 69 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = G-Sensor

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A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 70 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = Thunderbolt

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A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 71 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = Thunderbolt

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A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 72 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = Thunderbolt

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A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 73 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = Thunderbolt

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A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 74 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = Thunderbolt

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A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 75 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = dGPU

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A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 76 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = dGPU

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A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 77 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = dGPU

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A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 78 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = dGPU

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Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 79 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = dGPU

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Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 80 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = dGPU

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Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 81 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = dGPU

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Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 82 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = dGPU

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Size Document Number Rev
A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 83 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = dGPU

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Title

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Size Document Number Rev
A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 84 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = GFXCRT

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C
(Blanking) C

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Title

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Size Document Number Rev
A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 85 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = dGFX_CORE

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Title

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Size Document Number Rev
A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 86 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = GFXLCD

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Title

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Size Document Number Rev
A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 87 of 109
5 4 3 2 1
 5 4 3 2 1

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Title

(Reserved)
Size Document Number Rev
A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 88 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = Unused Parts

HS1 HS2 HS3 HS4 A00_0604 X03_0311
STF236R128H101-2-GP STF236R128H101-2-GP STF236R128H101-2-GP STF236R128H101-2-GP SPR4
Vinafix.com

SPRING-7-GP
SPR1 SPR2 SPR3
DY SPRING-31-GP SPRING-102-GP SPRING-13-GP-U
34.49U26.001
D D

1
1

1
34.49U24.001 34.41V01.001 34.43E24.001

34.4YG18.101 34.4YG18.101 34.4YG18.101 34.4YG18.101 A00_0604

CPU stand-off EMI spring
X03_0316 X03_0316 A00_0604
SPR8 SPR9 SPR10
H1 H2 H3 H5 H7 SPR5 SPR6 SPR7 DY SPRING-12-GP-U1 DY SPRING-12-GP-U1
HOLE256R126-1-GP HOLE335R115-GP HOLE335R115-GP HOLE335R115-GP HOLE296R182-GP DY SPRING-12-GP-U1

1
SPRING-12-GP-U1 SPRING-12-GP-U1 SPRING-31-GP

1
34.41Y19.001 34.41Y19.001 34.41Y19.001
34.41Y19.001 34.41Y19.001 34.49U24.001
1

1
ZZ.00PAD.Z61 ZZ.00PAD.D01 ZZ.00PAD.D01 ZZ.00PAD.D01 ZZ.00PAD.Y51

C C

Main Func = EMI Capacitors 1D35V_S3

X04_0512
X03_0312 X03_0312
DCBATOUT DCBATOUT
X03_0318

EC8911 EC8910 EC8909 EC8901 EC8902 EC8903 EC8904 EC8905 EC8912 EC8920 EC8921 EC8913
1

2
EC9716 EC9713 EC9712 EC9711 EC9710 EC9708 EC9709 EC9747 EC9748 EC9749 EC9751

SC22P50V2JN-4GP

SC22P50V2JN-4GP

SC22P50V2JN-4GP

SC22P50V2JN-4GP
DY EC9706 DY DY DY DY
SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP
SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP
SCD1U25V2KX-GP
SC1KP50V2KX-1GP
2

1
X03_0312
B B
1

EC9714 EC9717 3D3V_S0

DY EC9715 X02_0306 X04_0512
X02_0306 X02_0306
SCD1U25V2KX-GP

SCD1U25V2KX-GP

SC1KP50V2KX-1GP
2

EC9740 EC9741 EC9742 EC9746 EC9750 EC9752

X02_0306 EC8914 EC8915 EC8916 EC8917 EC8918 EC8919
2

1
EC8906 EC8907 EC8908 EC9736 EC9738

2
DY

SC1U10V2KX-1GP

SC1U10V2KX-1GP
SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SC22P50V2JN-4GP

SC22P50V2JN-4GP

SC22P50V2JN-4GP

SC22P50V2JN-4GP

SC22P50V2JN-4GP

SC22P50V2JN-4GP
5V_S0

SC22P50V2JN-4GP

SC22P50V2JN-4GP

SC22P50V2JN-4GP

SC22P50V2JN-4GP

SC22P50V2JN-4GP

SC22P50V2JN-4GP
1

2
X04_0512

1
1

EC9718 EC9719 EC9720 EC9723 EC9721 EC9724 EC9725 EC9726 EC9727 EC9728
DY DY DY DY DY DY
SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP
2

AUD_AGND 5V_S5
X03_0315 X03_0315 X03_0315
Wistron Confidential document, Anyone can not
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EC9733 EC9734 EC9732 EC9735 application without get Wistron permission
A A
1

2
EC9739 EC9744 EC9743 EC9745
X04_0512 DY DY DY DY DY

SC1U10V2KX-1GP
SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP
Wistron Corporation
2

1
1

EC9729 EC9730 EC9731 EC9737

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SC22P50V2JN-4GP

SC22P50V2JN-4GP

SC22P50V2JN-4GP

SC22P50V2JN-4GP
2

Title

UnusedParts/EMICapacitors
Size Document Number Rev
A3
Iris BSW A00
Date: Thursday, June 04, 2015 Sheet 89 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = NFC

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D D

C C

Blanking
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Title

(Reserved)
Size Document Number Rev
A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 90 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = TPM

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C C

Blanking
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Title

(Reserved)
Size Document Number Rev
A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 91 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = FPR

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C C

Blanking
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Title

(Reserved)
Size Document Number Rev
A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 92 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = SmartCard

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C C

Blanking
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Title

(Reserved)
Size Document Number Rev
A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 93 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = SmartCard

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D D

C C

Blanking
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Title

(Reserved)
Size Document Number Rev
A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 94 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = Switchable

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D D

C C

Blanking
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Title

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Size Document Number Rev
A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 95 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = Dock

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C C

Blanking
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Title

(Reserved)
Size Document Number Rev
A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 96 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = LAN

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D D

C C

Blanking
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Title

(Reserved)
Size Document Number Rev
A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 97 of 109
5 4 3 2 1
 5 4 3 2 1

Main Func = LAN

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C C

Blanking

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Title

(Reserved)
Size Document Number Rev
A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 98 of 109
5 4 3 2 1
 5 4 3 2 1

SSID = DEBUG PORT

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1 TP9601 TPAD14-OP-GP
D
TBD Routing to CPU [18]
[18]
XDP_PREQ#
XDP_PRDY# 1
TP9602 TPAD14-OP-GP
D

R9606
2 1 RSMRST#_XDP
[18,24,25] RSMRST#_KBC
DEBUG XDP
1KR2J-1-GP RSMRST#_XDP TP9607 TPAD14-OP-GP
1
1D8V_S5 COREPWROK_XDP 1 TP9608 TPAD14-OP-GP
R9601
SRTC_RST#_XDP 1 TP9609 TPAD14-OP-GP
2 1 COREPWROK_XDP
[18,40] COREPWROK
DEBUG XDP 1 TP9610 TPAD14-OP-GP
PLT_RST#_XDP 1
1KR2J-1-GP TP9611 TPAD14-OP-GP

1
C9602
R9604
DEBUG XDP [18] XDP_TDO 1 TP9613 TPAD14-OP-GP

SCD1U16V2KX-3GP
2 1 PLT_RST#_XDP [18] XDP_TRST# 1 TP9614 TPAD14-OP-GP
[18,63] PLTRST#_CPU

2
[18] XDP_TDI 1 TP9615 TPAD14-OP-GP
[18] XDP_TMS 1 TP9616 TPAD14-OP-GP
1KR2J-1-GP TP9617 TPAD14-OP-GP
C
[18] XDP_TCK 1 C
DEBUG XDP

3D3V_S5 3D3V_S5

2
R9603
DEBUG XDP
1KR2J-1-GP
100KR2J-1-GP R9602
DEBUG XDP

1
Q9601
3 4

SRTC_RST#_XDP_D 2 5 SRTC_RST#_XDP
B DEBUG XDP B
1 6

1
C9601
2N7002KDW-GP
84.2N702.A3F SCD1U16V2KX-3GP

2
DEBUG XDP

RTC_TEST# [18]

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU_XDP
Size Document Number Rev
A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 99 of 109
5 4 3 2 1
 5 4 3 2 1

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D D

C C

Blanking
B B

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A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Table of Content
Size Document Number Rev
A4
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 100 of 109
5 4 3 2 1
 5 4 3 2 1

Power IC Type
Load
Regulator LDO
Vinafix.com Switch
D D

Adapter

DCBATOUT 5V_S5 G524B2T11U 5V_USB30

AD+

G524B2T11U 5V_USB20_PORT2
SI7121DN

G524B2T11U 5V_USB20_PORT3
RT6576DGW

SI7121DN TPS22966DPUR 5V_S0

C C
3D3V_S5 SYW232DFC 1D24V_S5
BT+
Charger

Battery BQ24727RGRR 1339D15-M5001 1D5V_S0

SYW232DFC 1D8V_S5 TPS22966DPUR 1D8V_S0

TPS22966DPUR 3D3V_S0 RT9724GB LCDVDD

SYW232DFC 1D15V_S5

SY8206DQNC 1D05V_S5
TPS22966DPUR 3D3V_S5_PRIME
B B

RT8171BGQW 1V_CPU_CORE

RT8171BGQW GFX_CORE

1D35V_S3
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A
0D675V_S0 A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Power Block Diagram

Size Document Number Rev
A3
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 101 of 109
5 4 3 2 1
 5 4 3 2 1

Intel-Power Up Sequence Intel-Power Up Sequence

(AC mode) (DC mode)

RTC_AUX_S5

RTC_AUX_S5 t1
t1
Vinafix.com RTC_RST#
RTC_RST#
D DCBATOUT D

DCBATOUT
3D3V_AUX_S5

3D3V_AUX_S5
KBC_PWRBTN#
S5_ENABLE

3D3V_S5/5V_S5 S5_ENABLE

1D05V_VNN_EN 3D3V_S5/5V_S5

1D05V_S5(V1P05A) 1D05V_VNN_EN

1D8V_S5(V1P8A) 1D05V_S5(V1P05A)

1D15V_S5(V1P15S) 1D8V_S5(V1P8A)

C 1D24V_S5(V1P24A) 1D15V_S5(V1P15S) C

3D3V_S5_PRIME(V3P3A) 1D24V_S5(V1P24A)

t2
PM_RSMRST# 3D3V_S5_PRIME(V3P3A)

t2
PM_RSMRST#

KBC_PWRBTN#
PM_PWRBTN#
PM_PWRBTN#

B PM_SLP_S4# B

PM_SLP_S4#
1D35V_S3(VDDQ)
1D35V_S3(VDDQ)
DDR3_DRAM_PWROK
DDR3_DRAM_PWROK
PM_SLP_S3# t5
PM_SLP_S3# t5
1D5V_S0
1D5V_S0
GFX_CORE(VGG)
GFX_CORE(VGG)
1V_CPU_CORE
1V_CPU_CORE
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t6a/b
DDR3_VCCA_PWROK
A DDR3_VCCA_PWROK A
COREPWROK
Wistron Corporation
COREPWROK t7 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
PM_SUS_STAT#_CPU Taipei Hsien 221, Taiwan, R.O.C.
t7
PM_SUS_STAT#_CPU t8 Title
PLT_RST#
t8 Power Up Sequence
PLT_RST# Size Document Number Rev
Custom
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 102 of 109
5 4 3 2 1
 5 4 3 2 1

Intel-Power Down Sequence Intel-Power Down Sequence

(AC mode) (DC mode)

PLT_RST# PLT_RST#

PM_SLP_S3# PM_SLP_S3#

SYS_PWROK

DDR3_VCCA_PWROK
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DDR3_VCCA_PWROK
D D
COREPWROK COREPWROK

5V_S0 5V_S0

3D3V_S0 (V3P3S) 3D3V_S0 (V3P3S)

1D5V_S0 (V1P5S) 1D5V_S0 (V1P5S)

0D675V_S0 (VDDQ_VTT) 0D675V_S0 (VDDQ_VTT)

GFX_CORE (VGG) GFX_CORE (VGG)

1V_CPU_CORE 1V_CPU_CORE

IMVP_PWRGD IMVP_PWRGD

PM_SLP_S4# PM_SLP_S4#

DDR3_DRAM_PWROK (DDR3_DRAM_PWROK) DDR3_DRAM_PWROK (DDR3_DRAM_PWROK)

1D35V_S3 (VDDQ) 1D35V_S3 (VDDQ)

DDR_VREF_S3 (VDDQ_VREF) DDR_VREF_S3 (VDDQ_VREF)

PM_RSMRST#

SUSPWRDNACK_ACK_CPU

1D05V_S5 (V1P05A)

1D15V_S5 (V1P15A)

1D24V_S5 (V1P24A)

1D8V_S5 (V1P8A)
C C
3D3V_S5_PRIME (V3P3A_PRIME)
S5_ENABLE

5V_S5

3D3V_S5

B B

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Power Down Sequence

Size Document Number Rev

Iris BSW A00

Date: Thursday, May 28, 2015 Sheet 103 of 109
5 4 3 2 1
 5 4 3 2 1

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D
CPU SMBus / I2C Block Diagram KBC SMBus Block Diagram D

1D8V_S5 1D8V_S5 3D3V_S5 3D3V_S0 3D3V_S0

. . .
4.7KR 4.7KR
10KR 10KR
2.2KR 3D3V_S5 3D3V_S0

. . DIMM SLOT1
SMBCLK
SMB_CLK
. . . PCU_SMB_CLK
SCL
. .
SMBDATA
SMB_DATA
. . PCU_SMB_DATA
SDA 3D3V_S0

. SMBus Address:0xA0/0xA1
2.2KR
. 2.2KR

NCT7718W
.
C C

CPU SMCLK1 . SML1_CLK NCT_CLK

SCL
SMDAT1 . SML1_DATA
. NCT_DATA
SDA

Braswell M PCU_SMB_CLK
SCL SMBus Address:0x98/0x99
PCU_SMB_DATA CRT 2N7002SPT
SDA

SMBus Address:0xC0H/0x40H
I2C0_CLK
KBC GL850G
SCL
I2C0_DATA
NPCE985P SDA

SMBus Address:0x2C
3D3V_AUX_S5

TP_VDD_1D8V TP_VDD .
B
. 1D8V_S5
. 3.3KR B

2.2KR
Battery Conn.
2.2KR 2.2KR

TouchPad Conn. SMCLK0

BAT_SCL
. 100R PBAT_SMBCLK1
CLK_SMB
. SMDAT0
BAT_SDA
. PBAT_SMBDAT1
DAT_SMB
. . . PCU_SMB_CLK
SCL
SMBus address:0x16
. . PCU_SMB_DATA
SDA

SMBus Address:0x58/0x59

1D8V_S5 1D8V_S0 5V_S0 BQ24727

SCL
. . SDA

SMBus address:0x12
2.2KR 2.2KR

.
DDPB_CTRLCLK . PCH_HDMI_CLK DDC_CLK_HDMI
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DDPB_CTRLDATA . PCH_HDMI_DATA DDC_DATA_HDMI
. HDMI CONN Duplicate, Modify, Forward or any other purpose
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A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

SMBUS BLOCK DIAGRAM

Size Document Number Rev
Custom
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 104 of 109
5 4 3 2 1
 A B C D E

Thermal Block Diagram

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SCL1
SML1_CLK
LEVEL D+
P2800_DXP
SML1_DATA SHIFT
1 SDA1 1

KBC System

NCT_DATA
D-

NCT_CLK
P2800_DXN Place near CPU
Thermal
NPCE985P PWM CORE
NCT7718W 3D3V_S0

(ADC) GPIO03 SDA

PH
ALERT#
GPIO80 SCL
GPIO94 3V/5V
THERM_SYS_SHDN# PURE_HW_SHUTDOWN#
T_CRIT# EN
FAN_TACH1

3D3V_S0

NTC 2N7002

2 2
VIN 3D3V_S0
Put under CPU(T8 HW shutdown)
FAN Conn.

Audio Block Diagram SPK-OUT-L-

SPK-OUT-L+ SPEAKER

SPK-OUT-R-

Codec SPK-OUT-R+ SPEAKER

3
ALC3234 3

HPOUT-L/PORT-T-L
HPOUT-R/PORT-T-R
MIC2-L/PORT-F-L
HP
MIC2-R/PORT-F-R OUT
SENSE_A

DMIC_CLK MIC
DMIC_DAT
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Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

THERMAL/AUDIO BLOCK DIAGRAM

Size Document Number Rev
A3
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 105 of 109
A B C D E
 5 4 3 2 1

SSID = CLK Block Diagram

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D D

PEG_CLK0_CPU
RTCX1

X1802 CPU PEG_CLK0_CPU# WLAN

32.768MHZ
RTCX2

C C

OSCIN

X1601 0 ohm
19.2MHZ HDA_BITCLK_CPU
CODEC
OSCOUT ALC3234

LPC_CLK_CPU_P1
0 ohm KBC
NPCE985PB1

0 ohm
B
LPC_CLK_CPU_P0 LPC DB1 B

M_A_CLK0
M_A_CLK#0

M_A_CLK1
DM1
M_A_CLK#1

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CLK Block Diagram

Size Document Number Rev
A3 A00
Iris BSW
Date: Thursday, May 28, 2015 Sheet 106 of 109
5 4 3 2 1
 5 4 3 2 1

Change History
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D D

C C

B B

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application without get Wistron permission

A
Wistron Corporation A

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

Change History
Size Document Number Rev
Custom
Iris BSW A00
Date: Thursday, May 28, 2015 Sheet 107 of 109
5 4 3 2 1
 5 4 3 2 1

Item Page# Date Request By Issue description

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D D

C C

B B

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Change History-02
Size Document Number Rev

Iris BSW A00

Date: Thursday, June 04, 2015 Sheet 108 of 109
5 4 3 2 1
 5 4 3 2 1

Item Page# Date Request By Issue description

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D D

C C

B B

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Change History-03
Size Document Number Rev

Iris BSW A00

Date: Thursday, June 04, 2015 Sheet 109 of 109

5 4 3 2 1