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bq24230, bq24232
SLUS821F – OCTOBER 2008 – REVISED NOVEMBER 2014

bq2423x USB-Friendly Lithium-Ion Battery Charger And Power-Path Management IC

1 Features The bq2423x features dynamic power-path
management (DPPM) that powers the system while
1• Fully Compliant USB Charger simultaneously and independently charging the
– Selectable 100-mA and 500-mA Maximum battery. The DPPM circuit reduces the charge current
Input Current when the input current limit causes the system output
– 100-mA Maximum Current Limit Ensures to fall to the DPPM threshold, thus supplying the
Compliance to USB-IF Standard system load at all times while monitoring the charge
current separately. This feature reduces the number
– Input-based Dynamic Power Management of charge and discharge cycles on the battery, allows
(VIN- DPM) for Protection Against Poor USB for proper charge termination, and enables the
Sources system to run with a defective or absent battery pack.
• 28-V Input Rating With Overvoltage Protection Additionally, this enables instant system turn-on even
• Integrated Dynamic Power-Path Management with a totally discharged battery. The power-path
management architecture also permits the battery to
(DPPM) Function Simultaneously and
supplement the system current requirements when
Independently Powers the System and Charges the adapter cannot deliver the peak system currents,
the Battery enabling the use of a smaller adapter.
• Supports up to 500-mA Charge Current With
The battery is charged in three phases: conditioning,
Current Monitoring Output (ISET) constant current, and constant voltage. In all charge
• Programmable Input Current Limit up to 500 mA phases, an internal control loop monitors the IC
for Wall Adapters junction temperature and reduces the charge current
• Programmable Termination Current (bq24232) if the internal temperature threshold is exceeded.
• Programmable Precharge and Fast-Charge Safety The charger power stage and charge current sense
Timers functions are fully integrated. The charger function
• Reverse Current, Short-Circuit, and Thermal has high-accuracy current and voltage regulation
loops, charge status display, and charge termination.
Protection
The input current limit and charge current are
• NTC Thermistor Input programmable using external resistors.
• Proprietary Start-Up Sequence Limits Inrush
Current Device Information(1)
• Status Indication – Charging/Done, Power Good PART NUMBER PACKAGE BODY SIZE (NOM)

• Small 3 mm × 3 mm 16-Lead QFN Package bq24230

VQFN (16) 3.00 mm × 3.00 mm
bq24232
2 Applications (1) For all available packages, see the orderable addendum at
the end of the datasheet.
• Bluetooth™ Devices
• Low-Power Handheld Devices Typical Application Circuit
1 kΩ
3 Description 1 kΩ
The bq2423x series of devices are highly integrated
Li-ion linear chargers and system power-path
7

management devices targeted at space-limited

PGOOD

CHG

SYSTEM
portable applications. The devices operate from either Adaptor
IN
a USB port or ac adapter and support charge DC 13
OUT 10
11
1mF
currents between 25 mA and 500 mA. The high-input- GND 4.7mF
voltage range with input overvoltage protection 8 VSS
bq24230 EN2 5

supports low-cost, unregulated adapters. The USB BAT 2

3
input current limit accuracy and start-up sequence 15 TD 4.7mF
allow the bq2423x to meet USB-IF inrush current PACK+
TEMP

specification. Additionally, the input dynamic power TS 1

TMR

ISET
EN1

ILIM
CE

management (VIN-DPM) prevents the charger from

14

12

16
6
4

crashing poorly designed or incorrectly configured 2.94 kΩ 4.32 kΩ

PACK-

USB sources.

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
bq24230, bq24232
SLUS821F – OCTOBER 2008 – REVISED NOVEMBER 2014 www.ti.com

Table of Contents
1 Features .................................................................. 1 9 Application and Implementation ........................ 28
2 Applications ........................................................... 1 9.1 Application Information............................................ 28
3 Description ............................................................. 1 9.2 Typical Applications ................................................ 28
4 Revision History..................................................... 2 10 Power Supply Recommendations ..................... 34
5 Device Comparison Table..................................... 4 10.1 Requirements for OUT Output .............................. 34
10.2 USB Sources and Standard AC Adapters ............ 34
6 Pin Configuration and Functions ......................... 4
10.3 Half-Wave Adapters .............................................. 34
7 Specifications......................................................... 6
7.1 Absolute Maximum Ratings ...................................... 6 11 Layout................................................................... 34
11.1 Layout Guidelines ................................................. 34
7.2 Handling Ratings....................................................... 6
11.2 Layout Example .................................................... 35
7.3 Recommended Operating Conditions....................... 6
11.3 Thermal Package .................................................. 35
7.4 Thermal Information ................................................. 7
7.5 Electrical Characteristics........................................... 7 12 Device and Documentation Support ................. 36
7.6 Typical Characteristics ............................................ 11 12.1 Documentation Support ........................................ 36
12.2 Related Links ........................................................ 36
8 Detailed Description ............................................ 13
12.3 Trademarks ........................................................... 36
8.1 Overview ................................................................. 13
12.4 Electrostatic Discharge Caution ............................ 36
8.2 Functional Block Diagram ....................................... 14
12.5 Glossary ................................................................ 36
8.3 Feature Description................................................. 15
8.4 Device Functional Modes........................................ 21 13 Mechanical, Packaging, and Orderable
Information ........................................................... 36

4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision E (January 2014) to Revision F Page

• Added Device Information and Handling Rating tables, Feature Description section, Device Functional Modes,
Programming section, Application and Implementation section, Power Supply Recommendations section, Layout
section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information
section ................................................................................................................................................................................... 1
• Changed VRCH spec MIN, TYP, MAX terminology from VO(REG) to VBAT(REG) .......................................................................... 9
• Added "Reset the timers by toggling CE pin." in the Dynamic Charge timers (TMR) Input description. ............................. 24

Changes from Revision D (December 2013) to Revision E Page

• Added TJ= 85°C to conditions statement for IBAT(PDWN) specification...................................................................................... 7

Changes from Revision C (July 2010) to Revision D Page

• Changed the ILIM pin Description From: Connect a 3.1-kΩ to 7.8-kΩ resistor To: Connect a 2.75-kΩ to 8.4-kΩ resistor ... 4
• Changed POWER PATH IIN max Test Condition From: RILIM = 3.1 kΩ to 7.8 kΩ To: RILIM = 2.75 kΩ to 8.4 kΩ .................. 8
• Changed UNITS from "ms" to "V" for VLOWV specification in Electrical Characteristics table................................................. 9
• Changed text following Equation 1 From: The valid resistor range is 3.2 kΩ to 8 kΩ To: The valid resistor range is
2.75 kΩ to 8.4 kΩ ................................................................................................................................................................. 17
• Changed the Program the Input Current Limit (ILIM) section: KILIM = 1470 AΩ To: KILIM = 1530 AΩ.................................. 30
• Changed the Program the Input Current Limit (ILIM) section: RISET = 1470 AΩ / 0.5 A = 2.94 kΩ To: RISET = 1530
AΩ / 0.5 A = 3.06 kΩ ............................................................................................................................................................ 30
• Changed Program the Input Current Limit (ILIM) text From: Select the closest standard value, which for this case is
2.94 kΩ To: Select the closest standard value, which for this case is 3.06 kΩ ................................................................... 30

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Changes from Revision B (March 2009) to Revision C Page

• Changed globally RT1 and RT2 to Rs and Rp..................................................................................................................... 20

• Added Equation 2 and Equation 3, term explanations and resistance table........................................................................ 20

Changes from Revision A (December 2008) to Revision B Page

• Changed Absolute Maximum Ratings IO, OUT From: 600 mA To: 1700 mA......................................................................... 6
• Changed Absolute Maximum Ratings IO, BAT (Discharge mode) From: 600 mA To: 1700 mA............................................ 6
• Changed Recommended Operating Conditions IBAT From 500 MA To: 1500 mA ................................................................. 6
• Changed Recommended Operating Conditions ICHG From 500 MA To: 1500 mA................................................................. 6
• Added POWER PATH KILIM Test Conditions: ILIM = 200 mA to 500 mA................................................................................. 8
• Changed the POWER PATH KILIM Values From: MIN =1320 TYP = 1470 MAX = 1620 To: MIN = 1380 TYP = 1530
MAX =1680............................................................................................................................................................................. 8
• Changed BATTERY CHARGER VBAT(REG) MAX value From: 4.24 To: 4.23 .......................................................................... 9

Changes from Original (October 2008) to Revision A Page

• Changed the second paragraph of the DESCRIPTION ......................................................................................................... 1

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5 Device Comparison Table

OPTIONAL
PART NUMBER (1) VOVP VOUT(REG) VDPM MARKING
FUNCTION
bq24230 6.6 V 4.4 V VO(REG) – 100 mV TD CGN
bq24232 10.5 V 4.4 V VO(REG) – 100 mV ITERM NXK

(1) This product is RoHS compatible, including a lead concentration that does not exceed 0.1% of total product weight, and is suitable for
use in specified lead-free soldering processes. In addition, this product uses package materials that do not contain halogens, including
bromine (Br) or antimony (Sb) above 0.1% of total product weight.

6 Pin Configuration and Functions

16-Pin RGT Package with Thermal Pad

(Top View)

ITERM
ISET

TMR

ISET

TMR
TD

IN

IN
16 15 14 13
16 15 14 13
TS 1 12 ILIM
TS 1 12 ILIM
BAT 2 11 OUT BAT 2 11 OUT
bq24230 bq24232
BAT 3 10 OUT BAT 3 10 OUT
CE 4 9 CHG
5 6 7 8 CE 4 9 CHG
5 6 7 8
EN2
EN1
PGOOD
VSS

EN1
PGOOD
VSS
EN2

Pin Functions
PIN
NUMBER I/O DESCRIPTION
NAME
bq24230 bq24232
External NTC Thermistor Input. Connect the TS input to the NTC thermistor in the battery pack. TS monitors a 10-
TS 1 1 I kΩ NTC thermistor. For applications that do not utilize the TS function, connect a 10-kΩ fixed resistor from TS to
VSS to maintain a valid voltage level on TS.
Charger Power Stage Output and Battery Voltage Sense Input. Connect BAT to the positive terminal of the
BAT 2,3 2, 3 I/O
battery. Bypass BAT to VSS with a 4.7-μF to 47-μF ceramic capacitor.
Charge Enable Active-Low Input. Connect CE to a high logic level to place the battery charger in standby mode. In
standby mode, OUT is active and battery supplement mode is still available. Connect CE to a low logic level to
CE 4 4 I
enable the battery charger. CE is internally pulled down with ~285 kΩ. Do not leave CE unconnected to ensure
proper operation.
EN2 5 5 I Input Current Limit Configuration Inputs. Use EN1 and EN2 control the maximum input current and enable USB
compliance. See Table 2 for the description of the operation states. EN1 and EN2 are internally pulled down with
EN1 6 6 I ~285 kΩ. Do not leave EN1 or EN2 unconnected to ensure proper operation.
Open-drain Power Good Status Indication Output. PGOOD pulls to VSS when a valid input source is detected.
PGOOD 7 7 O PGOOD is high-impedance when the input power is not within specified limits. Connect PGOOD to the desired
logic voltage rail using a 1-kΩ – 100-kΩ resistor, or use with an LED for visual indication.
VSS 8 8 – Ground. Connect to the thermal pad and to the ground rail of the circuit.
Open-Drain Charging Status Indication Output. CHG pulls to VSS when the battery is charging. CHG is high
CHG 9 9 O
impedance when charging is complete and when charger is disabled.
System Supply Output. OUT provides a regulated output when the input is below the OVP threshold and above
OUT 10,11 10, 11 O the regulation voltage. When the input is out of the operation range, OUT is connected to VBAT. Connect OUT to
the system load. Bypass OUT to VSS with a 4.7-μF to 47-μF ceramic capacitor.
Adjustable Current Limit Programming Input. Connect a 2.75-kΩ to 8.4-kΩ resistor from ILIM to VSS to program
ILIM 12 12 I the maximum input current (EN2=1, EN1=0). The input current includes the system load and the battery charge
current.

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Pin Functions (continued)

PIN
NUMBER I/O DESCRIPTION
NAME
bq24230 bq24232
Input Power Connection. Connect IN to the connected to external DC supply (AC adapter or USB port). The input
IN 13 13 I operating range is 4.35 V to 6.6 V. The input can accept voltages up to 26 V without damage but operation is
suspended. Connect bypass capacitor 1 μF to 10 μF to VSS.
Timer Programming Input. TMR controls the precharge and fast-charge safety timers. Connect TMR to VSS to
disable all safety timers. Connect a 18-kΩ to 72-kΩ resistor between TMR and VSS to program the timers a
TMR 14 14 I
desired length. Leave TMR unconnected to set the timers to the 5-hour fast charge and 30-minute precharge
default timer values.
Termination Dsable Input. Connect TD high to disable charger termination. Connect TD to VSS to enable charger
termination. TD is checked during start-up only and cannot be changed during operation. See the TD section in
TD 15 - I
this data sheet for a description of the behavior when termination is disabled. TD is internally pulled down to VSS
with ~285 kΩ. Do not leave TD unconnected to ensure proper operation.
Termination Current Programming Input. Connect a 0-Ω to 15-kΩ resistor from ITERM to VSS to program the
ITERM - 15 I
termination current. Leave ITERM unconnected to set the termination current to the internal default 10% threshold.
Fast-Charge Current Programming Input. Connect a 3-kΩ to 36-kΩ resistor from ISET to VSS to program the fast-
charge current level. Charging is disabled if ISET is left unconnected. While charging, the voltage at ISET reflects
ISET 16 16 I/O
the actual charging current and can be used to monitor charge current. See the Charge Current Translator section
for more details.
An internal electrical connection exists between the exposed thermal pad and the VSS pin of the device. The
Thermal
– thermal pad must be connected to the same potential as the VSS pin on the printed-circuit board. Do not use the
Pad
thermal pad as the primary ground input for the device. The VSS pin must be connected to ground at all times.

Table 1. EN1/EN2 Settings

EN2 EN1 Maximum Input Current Into IN Pin
0 0 100 mA. USB100 mode
0 1 500 mA. USB500 mode
1 0 Set by an external resistor from ILIM to VSS
1 1 Standby (USB suspend mode)

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7 Specifications
7.1 Absolute Maximum Ratings
(1)
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
IN (with respect to VSS –0.3 28
OUT (with respect to VSS) –0.3 7
VI Input voltage BAT (with respect to VSS) –0.3 5 V
EN1, EN2, CE, TS, ISET, PGOOD, CHG, ILIM, TMR, TD, –0.3 7
ITERM (with respect to VSS)
II Input current IN 600 mA
OUT 1700
IO Output current (continuous) mA
BAT (Discharge mode) 1700
Output sink current CHG, PGOOD 15 mA
TJ Junction temperature –40 150 °C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage
values are with respect to the network ground terminal unless otherwise noted.

7.2 Handling Ratings

MIN MAX UNIT
Tstg Storage temperature range –65 150 °C
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all
–1000 1000
pins (1)
V(ESD) Electrostatic discharge V
Charged device model (CDM), per JEDEC specification
–250 250
JESD22-C101, all pins (2)

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
IN voltage range 4.35 26 V
VI bq24230 4.35 6.4 V
IN operating voltage range
bq24232 4.35 10.2
IIN Input current, IN pin 500 mA
IOUT Current, OUT pin 1500 mA
IBAT Current, BAT pin (discharging) 1500 mA
ICHG Current, BAT pin (charging) 500 mA
TJ Junction temperature –40 125 °C
RILIM Maximum input current programming resistor 3.1 7.8 kΩ
RISET Fast-charge current programming resistor 1.8 36 kΩ
RTMR Timer programming resistor 18 72 kΩ
RITERM Termination programming resistor bq24232 0 15 kΩ

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7.4 Thermal Information

bq24230 bq24232
THERMAL METRIC (1) RGT RGT UNIT
16 PINS 16 PINS
RθJA Junction-to-ambient thermal resistance 44.5 44.5
RθJC(top) Junction-to-case (top) thermal resistance 54.2 54.2
RθJB Junction-to-board thermal resistance 17.2 17.2
°C/W
ψJT Junction-to-top characterization parameter 1.0 1.0
ψJB Junction-to-board characterization parameter 17.1 17.1
RθJC(bot) Junction-to-case (bottom) thermal resistance 3.8 3.8

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

7.5 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT
UVLO Undervoltage lockout VIN: 0 V → 4 V 3.2 3.3 3.4 V
Vhys(UVLO) Hysteresis on UVLO VIN: 4 V → 0 V 200 300 mV
Input power detected when VIN > VBAT +
VIN(DT) Input power detection threshold VIN(DT) 55 80 130 mV
VBAT = 3.6 V, VIN: 3.5 V → 4 V
Vhys(INDT) Hysteresis on VIN(DT) VBAT = 3.6 V, VIN: 4 V → 3.5 V 20 mV
Deglitch time, input power Time measured from VIN: 0 V → 5 V 1-μs
tDGL(PGOOD) 2 ms
detected status rise time to PGOOD = LO

Input overvoltage protection ('230) VIN: 5 V → 7 V 6.4 6.6 6.8

VOVP V
threshold ('232) VIN: 5 V → 11 V 10.2 10.5 10.8
Vhys(OVP) Hysteresis on OVP ('230) VIN: 7 V → 5V 110 mV
('232) VIN: 11 V → 5 V 175
tDGL(OVP) Input overvoltage blanking time 50 μs
Time measured from VIN: 11 V → 5 V 1 μs
tREC(OVP) Input overvoltage recovery time 2 ms
fall time to PGOOD = LO
ILIM, TEST ISET SHORT CIRCUIT
ISC Current source VIN > UVLO and VIN > VBAT+VIN(DT) 1.3 mA
VSC VIN > UVLO and VIN > VBAT+VIN(DT) 520 mV
QUIESCENT CURRENT
CE = LO or HI, input power not detected,
IBAT(PDWN) Sleep current into BAT pin 6.5 μA
no load on OUT pin, TJ=85°C
EN1= HI, EN2=HI, VIN = 6 V, TJ=85°C 50 μA
IIN(STDBY) Standby current into IN pin
EN1= HI, EN2=HI, VIN = 10 V, TJ=85°C 200
CE = LO, VIN = 6 V, no load on OUT pin,
ICC Active supply current, IN pin 1.5 mA
VBAT > VBAT(REG), (EN1, EN2) ≠ (HI, HI)

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Electrical Characteristics (continued)

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POWER PATH
VDO(IN-OUT) VIN – VOUT VIN = 4.3 V, IIN = 500 mA, VBAT = 4.2 V 150.0 237.5 mV
VDO(BAT-OUT) VBAT – VOUT IOUT = 500 mA, VIN = 0 V, VBAT > 3 V 62.5 mV
VO(REG) OUT pin voltage regulation VIN > VOUT + VDO (IN-OUT) 4.3 4.4 4.5 V
EN1 = LO, EN2 = LO 90 95 100
mA
IINmax Maximum input current EN1 = HI, EN2 = LO 450 475 500
EN2 = HI, EN1 = LO KILIM/RILIM A
KILIM Maximum input current factor ILIM = 200 mA to 500 mA 1380 1530 1680 AΩ
Programmable input current limit
IINmax EN2 = HI, EN1 = LO, RILIM = 2.75 kΩ to 8.4 kΩ 200 500 mA
range
Input voltage threshold when
VIN-DPM EN2 = LO, EN1 = X 4.35 4.50 4.63 V
input current is reduced
Output voltage threshold when VO(REG) – 180 VO(REG) – VO(REG) – 30
VDPPM V
charging current is reduced mV 100 mV mV
VBAT = 3.6 V, RILIM = 1.5 kΩ, RLOAD = 10 Ω →2 VOUT ≤ VBAT
VBSUP1 Enter battery supplement mode V
Ω –40 mV
VBAT = 3.6 V, RILIM = 1.5 kΩ, RLOAD = 2 Ω →10 VOUT ≥
VBSUP2 Exit battery supplement mode V
Ω VBAT–20 mV
Output short-circuit detection VIN > UVLO and VIN > VBAT+VIN(DT)
VO(SC1) 0.8 0.9 1 V
threshold, power-on
Output short-circuit detection VIN > UVLO and VIN > VBAT+VIN(DT)
threshold, supplement mode
VO(SC2) 200 250 300 mV
VBAT – VOUT > VO(SC2) indicates
short circuit
Deglitch time, supplement mode
tDGL(SC2) 250 μs
short circuit
Recovery time, supplement mode
tREC(SC2) 60 ms
short circuit

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Electrical Characteristics (continued)

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
BATTERY CHARGER
Source current for BAT pin short- VBAT = 1.5 V
IBAT(SC) 4 7.5 11 mA
circuit detection
BAT pin short-circuit detection VBAT rising
VBAT(SC) 1.6 1.8 2 V
threshold
VBAT(REG) Battery charge voltage 4.16 4.20 4.23 V
Precharge to fast-charge VIN > UVLO and VIN > VBAT + VIN(DT)
VLOWV 2.9 3 3.1 V
transition threshold
Deglitch time on precharge to
tDGL1(LOWV) 25 ms
fast-charge transition
Deglitch time on fast-charge to
tDGL2(LOWV) 25 ms
precharge transition
VBAT(REG) > VBAT > VLOWV, VIN = 5 V, CE = LO,
Battery fast-charge current range 25 500 mA
EN1 = LO, EN2 = HI

ICHG CE = LO, EN1= LO, EN2 = HI,

VBAT > VLOWV, VIN = 5 V, IINmax > ICHG, no
Battery fast-charge current KISET/RISET A
load on OUT pin, thermal loop and DPM loop
not active
KISET Fast-charge current factor 25 mA ≥ ICHG≥ 500 mA 797 870 975 AΩ
IPRECHG Precharge current 2.5 mA ≥ IPRECHG≥ 30 mA 70 88 106 AΩ
CE = LO, (EN1,EN2) ≠ (LO,LO), A
VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPM loop 0.09*ICHG 0.1*ICHG 0.11*ICHG
Termination comparator threshold and thermal loop not active
ITERM
for termination detection CE = LO, (EN1,EN2) = (LO,LO),
VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPM loop 0.027*ICHG 0.033*ICHG 0.040*ICHG
and thermal loop not active
Termination current threshold A
ITERM ITERM = 0% to 50% of ICHG KITERM*RITERM/RISET
factor (bq24232)
Current for external termination-
IBIAS(ITERM) 72 75 78 μA
setting resistor
CE = LO, (EN1,EN2) ≠ (LO,LO), A
VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPM loop 0.024 0.030 0.036
K factor for termination detection and thermal loop not active
KITERM threshold (externally set)
(bq24232) CE = LO, (EN1,EN2) = (LO,LO),
VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPM loop 0.009 0.010 0.011
and thermal loop not active
Current for external μA
IBIAS(ITERM) termination_setting resistor 72 75 78
(bq24232)
Deglitch time, termination ms
tDGL(TERM) 25
detected
VBAT(REG) VBAT(REG) VBAT(REG)
VRCH Recharge detection threshold VIN > UVLO and VIN > VBAT+VIN(DT) V
–140 mV –100 mV –60 mV
Deglitch time, recharge threshold
tDGL(RCH) 62.5 ms
detected
Delay time, input power loss to VBAT = 3.6 V. Time measured from
tDGL(NO-IN) 20 ms
charger turnoff VIN: 5 V → 3 V 1-μs fall time
IBAT(DET) Sink current for battery detection VBAT=2.5 V 5 7.5 10 mA
tDET Battery detection timer BAT high or low 250 ms

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Electrical Characteristics (continued)

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
BATTERY CHARGING TIMERS
tPRECHG Precharge safety timer value TMR = floating 1440 1800 2160 s
tMAXCHG Charge safety timer value TMR = floating 14400 18000 21600 s
tPRECHG Precharge safety timer value 18 kΩ < RTMR < 72 kΩ RTMR × KTMR s
tMAXCHG Charge safety timer value 18 kΩ < RTMR < 72 kΩ 10×RTMR ×KTMR s
KTMR Timer factor 30 40 50 s/kΩ
BATTERY-PACK NTC MONITOR (1)
INTC NTC bias current VIN > UVLO and VIN > VBAT+VIN(DT) 72 75 78 μA
VHOT High-temperature trip point Battery charging, VTS Falling 270 300 330 mV
VHYS(HOT) Hysteresis on high trip point Battery charging, VTS Rising from VHOT 30 mV
VCOLD Low-temperature trip point Battery charging, VTS Rising 2000 2100 2200 mV
VHYS(COLD) Hysteresis on low trip point Battery charging, VTS Falling from VCOLD 300 mV
Deglitch time, pack temperature
tDGL(TS) Battery charging, VTS Falling 50 ms
fault detection
VDIS(TS) TS function disable threshold TS unconnected VIN-200 mV V
THERMAL REGULATION
TJ(REG) Temperature regulation limit 125 °C
TJ(OFF) Thermal shutdown temperature TJ rising 155 °C
TJ(OFF-HYS) Thermal shutdown hysteresis 20 °C
LOGIC LEVELS ON EN1, EN2, CE, TD
VIL Logic LOW input voltage 0 0.4 V
VIH Logic HIGH input voltage 1.4 6.0 V
IIL Input sink current VIL = 0 V 1 μA
IIH Input source current VIH = 1.4 V 10 μA
LOGIC LEVELS ON PGOOD, CHG
VOL Output LOW voltage ISINK = 5 mA 0.4 V

(1) These numbers set trip points of 0°C and 50°C while charging, with 3°C hysteresis on the trip points, with a Vishay Type 2 curve NTC
with an R25 of 10 kΩ.

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7.6 Typical Characteristics

Typical Application Circuit, EN1=0, EN2=1, TA=25°C, unless otherwise noted.

250 0.3

0.3
200

Dropout Voltage - VIN-VOUT

0.2
IBAT - mA

150 0.2

0.1
100
0.1

50
0.0

0 0
120 125 130 135 140 145 0 25 50 75 100 125
TA - Free-Air Temperature - °C TJ - Junction Temperature - °C
IL = 500 mA

Figure 1. Thermal Regulation Figure 2. Dropout Voltage vs Temperature

60 4.45

50 4.43
Dropout Voltage - VBAT-VOUT

VO - Output Voltage - V
40 VBAT = 3 V 4.40

30 4.38
VBAT = 3.9 V

20 4.35

10 4.33

0 4.30
0 25 50 75 100 125 0 25 50 75 100 125
TJ - Junction Temperature - °C
TJ - Junction Temperature - °C
IL = 500 mA
VIN = 5 V IL = 500 mA
Figure 3. Dropout Voltage vs Temperature
Figure 4. Output Regulation Voltage vs Temperature
4.210 6.70
VOVP - Output Voltage Threshold - V

4.205 6.65
VBAT - Regulation Voltage - V

VI Rising
4.200
6.60

4.195
6.55
4.190
VI Falling
6.50
4.185

4.180 6.45
0 25 50 75 100 125 150 0 25 50 75 100 125
TJ - Junction Temperature - °C
TJ - Junction Temperature - °C
6.6 V

Figure 5. Battery Regulation Voltage vs Temperature Figure 6. Overvoltage Protection Threshold vs Temperature
bq24230

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Typical Characteristics (continued)

Typical Application Circuit, EN1=0, EN2=1, TA=25°C, unless otherwise noted.
10.70 800
10.65
VOVP - Output Voltage Threshold - V

700
10.60 VI Rising
600

ILIM - Input Current - mA

10.55
500 USB500
10.50

10.45 400

10.40 VI Falling
300
10.35
200
10.30
USB100
10.25 100

10.20 0
0 25 50 75 100 125 5 6 7 8 9 10
TJ - Junction Temperature - °C VI - Input Voltage - V
10.5 V

Figure 7. Overvoltage Protection Threshold vs Temperature Figure 8. Input Current Limit Threshold vs Input Voltage
bq24232
310 31.5

305 31
IBAT - Fast Charge Current - A

IBAT - Precharge Current - A

300 30.5

295 30

290 29.5

285 29

280 28.5
3 3.2 3.4 3.6 3.8 4 4.2 2 2.2 2.4 2.6 2.8 3
VBAT - Battery Voltage - V VBAT - Battery Voltage - V
RISET = 3.3 kΩ RISET = 3.3 kΩ

Figure 9. Fast-Charge Current vs Battery Voltage Figure 10. Precharge Current vs Battery Voltage

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8 Detailed Description

8.1 Overview
The bq2423x devices are integrated Li-ion linear chargers and system power-path management devices targeted
at space-limited portable applications. The device powers the system while simultaneously and independently
charging the battery. This feature reduces the number of charge and discharge cycles on the battery, allows for
proper charge termination, and enables the system to run with a defective or absent battery pack. It also allows
instant system turnon even with a totally discharged battery. The input power source for charging the battery and
running the system can be an AC adapter or a USB port. The devices feature dynamic power-path management
(DPPM), which shares the source current between the system and battery charging and automatically reduces
the charging current if the system load increases. When charging from a USB port, the input dynamic power
management (VIN-DPM) circuit reduces the input current limit if the input voltage falls below a threshold,
preventing the USB port from crashing. The power-path architecture also permits the battery to supplement the
system current requirements when the adapter cannot deliver the peak system currents.

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8.2 Functional Block Diagram

250 mV
VO (SC1) OUT- SC1 VBAT OUT- SC 2
tDGL(SC2)

IN Q1
OUT

Short Detect EN2

225 mV
VIN-LOW Precharge ISET
USB100 2. 25
. V
Fastcharge
USB500 TJ
ILIM V REF-ILIM
USB-susp TJ (REG) Short Detect

VDPPM
VO (REG) Q2
VOUT

EN2 VBAT(REG)
EN1 BAT
V OUT
CHARGEPUMP
I BIAS-ITERM 40 mV
Supplement
V LOWV
225 mV
ITERM VBAT(SC)
VRCH
bq24232

~3 V ITERM- floating
tDGL1(LOWV)

tDGL2(LOWV)
tDGL(TERM)

tDGL(RCH)

VIN

I NTC
BAT-SC
VBAT+VIN-DT

t DGL (NO-IN)
V HOT
TS
t DGL(PGOOD) t DGL (TS )
Charge Control
VUVLO
V COLD
V OVP
t BLK (OVP)

VDIS(TS)
EN1 USB Suspend
EN2 TD
bq24230
CE
Halt timers
CHG
VIPRECHG Reset timers
Dynamically
V CHG
I Controlled PGOOD
Oscillator
VISET
Fast- Charge
Timer Timer fault
TMR
Pre -Charge
Timer

~100 mV Timers disabled

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8.3 Feature Description

8.3.1 Undervoltage Lockout
The bq2423x family remains in power-down mode when the input voltage at the IN pin is below the undervoltage
lockout (UVLO) threshold.
During the power-down mode, the host commands at the control inputs (CE, EN1 and EN2) are ignored. The Q1
FET connected between IN and OUT pins is off, and the status outputs CHG and PGOOD are high impedance.
The Q2 FET that connects BAT to OUT is ON. During power-down mode, the VOUT(SC2) circuitry is active and
monitors for overload conditions on OUT.

8.3.2 Power On
When VIN exceeds the UVLO threshold, the bq2423x powers up. While VIN is below VBAT + VIN(DT), the host
commands at the control inputs (CE, EN1, and EN2) are ignored. The Q1 FET connected between IN and OUT
pins is off, and the status outputs CHG and PGOOD are high impedance. The Q2 FET that connects BAT to
OUT is ON. During this mode, the VOUT(SC2) circuitry is active and monitors for overload conditions on OUT.
When VIN rises above VBAT + VIN(DT), PGOOD is low to indicate that the valid power status and the CE, EN1, and
EN2 inputs are read. The device enters standby mode whenever (EN1, EN2) = (1, 1) or if an input overvoltage
condition occurs. In standby mode, Q1 is OFF and Q2 is ON. (If SYSOFF is high, FET Q2 is off). During standby
mode, the VOUT(SC2) circuitry is active and monitors for overload conditions on OUT.
When the input voltage at IN is within the valid range: VIN > UVLO AND VIN > VBAT + VIN(DT) AND VIN < VOVP, and
the EN1 and EN2 pins indicate that the USB suspend mode is not enabled [(EN1, EN2) ≠ (HI, HI)], all internal
timers and other circuit blocks are activated. The device checks for short circuits at the ISET and ILIM pins. If no
short conditions exists, the device switches on the input FET Q1 with a 100-mA current limit to check for a short
circuit at OUT. If VOUT rises above VSC, the FET Q1 switches to the current-limit threshold set by EN1, EN2, and
RILIM and the device enters normal operation where the system is powered by the input source (Q1 is on), and
the device continuously monitors the status of CE, EN1, and EN2 as well as the input voltage conditions.

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Feature Description (continued)

Begin Startup
PGOOD = Hi -Z I IN (MAX) 100 mA
CHG = Hi -Z
BATTFET ON

Yes
V OUT short ?
V UVLO<V IN <V OVP No
and
V IN >V BAT+V IN(DT)
No

Yes Input Current

Limit set by EN 1
PGOOD = Low and EN2

Yes No
EN 1= EN 2 =1 CE = Low

No
Yes

Yes
ILIM or ISET short ? Begin Charging

No

Figure 11. Start-Up Flow Diagram

8.3.3 Power-Path Management

The bq2423x features an OUT output that powers the external load connected to the battery. This output is
active whenever a source is connected to IN or BAT. The following sections discuss the behavior of OUT with a
source connected to IN to charge the battery and a battery source only.

8.3.3.1 Input Source Connected – Adapter or USB

With a source connected, the power-path management circuitry of the bq2423x monitors the input current
continuously. The OUT output is regulated to a fixed voltage (VO(REG)). The current into IN is shared between
charging the battery and powering the system load at OUT. The bq2423x has internal selectable current limits of
100 mA (USB100) and 500 mA (USB500) for charging from USB ports, as well as a resistor-programmable input
current limit.

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Feature Description (continued)

The bq2423x is USB-IF compliant for the inrush current testing. The USB spec allows up to 10μF to be hard-
started, which establishes a 50 μF as the maximum inrush charge value when exceeding 100 mA. The input
current limit for the bq2423x prevents the input current from exceeding this limit, even with system capacitances
greater than 10 μF. Note that the input capacitance to the device must be selected small enough to prevent a
violation (<10 μF), as this current is not limited. Figure 12 demonstrates the startup of the bq2423x and
compares it to the USB-IF specification.
USB100 Current Limit

10 μC 50 μC

20 mA/div
100 μs/div

Figure 12. USB-IF Inrush Current Test

The input current limit selection is controlled by the state of the EN1 and EN2 pins as shown in . When using the
resistor-programmable current limit, the input current limit is set by the value of the resistor connected from the
ILIM pin to VSS and is given by the Equation 1:
IIN-MAX = KILIM/RILIM (1)
The input current limit is adjustable up to 500 mA. The valid resistor range is 2.75 kΩ to 8.4 kΩ.
When the IN source is connected, priority is given to the system load. The DPPM and Battery Supplement
modes are used to maintain the system load. Figure 13 illustrates examples of the DPPM and supplement
modes. These modes are explained in detail in the following sections.

8.3.3.1.1 Input DPM Mode, VIN-DPM

The bq2423x uses the VIN-DPM mode for operation from current-limited USB ports. When EN1 and EN2 are
configured for USB100 (EN2=0, EN1=0) or USB500 (EN2=0, EN2=1) modes, the input voltage is monitored. If
VIN falls to VIN-DPM, the input current limit is reduced to prevent the input voltage from falling further. This prevents
the bq2423x from crashing poorly designed or incorrectly configured USB sources.

8.3.3.1.2 DPPM Mode

When the sum of the charging and system load currents exceeds the preset maximum input current
(programmed with EN1, EN2, and ILIM pins), the voltage at OUT decreases. Once the voltage on the OUT pin
falls to VDPPM, the bq2423x enters DPPM mode. In this mode, the charging current is reduced as the OUT
current goes up in order to maintain the system output. Battery termination is disabled while in DPPM mode.

8.3.3.1.3 Battery Supplement Mode

While in DPPM mode, if the charging current falls to zero and the system load current increases beyond the
programmed input current limit, the voltage at OUT reduces further. When the OUT voltage drops below the
battery voltage by VBSUP1, the battery supplements the system load. The battery stops supplementing the system
load when the voltage on the OUT pin rises above the battery voltage by VBSUP2.

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Feature Description (continued)

During supplement mode, the battery supplement current is not regulated; however, a short-circuit protection
circuit is built in. If during battery supplement mode, the voltage at OUT drops 250 mV below the BAT voltage,
the OUT output is turned off if the overload exists after tDGL(SC2). The short-circuit recovery timer then starts
counting. After tREC(SC2), OUT turns on and attempts to restart. If the short circuit remains, OUT is turned off and
the counter restarts. Battery termination is disabled while in supplement mode.
500 mA

400 mA
IOUT

250 mA

0 mA

400 mA
IIN

150 mA

0 mA

150 mA
IBAT

0 mA

-100 mA

4 .4 V DPM loop active

4 .3 V

~ 3 .6 V
VOUT

Supplement
Mode

Figure 13. bq2423x DPPM And Battery Supplement Modes

(VOREG = 4.4 V, VBAT = 3.6 V, ILIM=400 mA, ICHG = 150 mA)

8.3.3.2 Input Source Not Connected

When no source is connected to the IN input, OUT is powered strictly from the battery. During this mode, the
current into OUT is unregulated, similar to Battery Supplement Mode; however, the short-circuit circuitry is active.
If the OUT voltage falls below the BAT voltage by 250 mV for longer than tDGL(SC2), OUT is turned off. The short-
circuit recovery timer then starts counting. After tREC(SC2), OUT turns on and attempts to restart. If the short-circuit
remains, OUT is turned off and the counter restarts. This ON/OFF cycle continues until the overload condition is
removed.

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Feature Description (continued)

8.3.4 Thermal Regulation and Thermal Shutdown
The bq2423x contain a thermal regulation loop that monitors the die temperature. If the die temperature exceeds
TJ(REG), the device automatically reduces the charging current to prevent the die temperature from increasing
further. In some cases, the die temperature continues to rise despite the operation of the thermal loop,
particularly under high VIN and heavy OUT system load conditions. Under these conditions, if the die
temperature increases to TJ(OFF), the input FET Q1 is turned OFF. FET Q2 is turned ON to ensure that the
battery still powers the load on OUT. Once the device die temperature cools by TJ(OFF-HYS), the input FET Q1 is
turned on and the device returns to thermal regulation. Continuous overtemperature conditions result in a hiccup
mode. Safety timers are slowed proportionally to the charge current in thermal regulation. Battery termination is
disabled during thermal regulation and thermal shutdown.
Note that this feature monitors the die temperature of the bq2423x. This is not synonymous with ambient
temperature. Self-heating exists due to the power dissipated in the IC because of the linear nature of the battery
charging algorithm and the LDO mode for OUT.
A modified charge cycle with the thermal loop active is shown in Figure 14:

PRECHARGE THERMAL CC FAST CV TAPER DONE

REGULATION CHARGE

VO(REG)

IO(CHG)

Battery Voltage

Battery Current

V(LOWV) HI-z

I(PRECHG)

I(TERM)

TJ(REG)
IC Junction Temperature, TJ

Figure 14. Mofified Charge Cycle

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Feature Description (continued)

8.3.5 Battery Pack Temperature Monitoring
The bq2423x features an external battery pack temperature monitoring input. The TS input connects to the NTC
resistor in the battery pack to monitor battery temperature and prevent dangerous overtemperature conditions.
During charging, INTC is sourced to TS and the voltage at TS is continuously monitored. If, at any time, the
voltage at TS is outside of the operating range (VCOLD to VHOT), charging is suspended. The timers maintain their
values but suspend counting. When the voltage measured at TS returns to within the operation window, charging
is resumed and the timers continue counting. When charging is suspended due to a battery pack temperature
fault, the CHG pin remains low and continues to indicate charging.
For the bq24230, battery pack temperature sensing is disabled when termination is disabled (TD = High) and the
voltage at TS is greater than VDIS(TS). The battery pack temperature monitoring is disabled in all devices by
connecting a 10-kΩ resistor from TS to VSS.
The allowed temperature range for a 103AT-2 type thermistor is 0°C to 50°C. However, the user can increase
the range by adding two external resistors. See Figure 15 for the circuit. The values for Rs and Rp are calculated
using the following equations:
æ 2 ì VH ´ VC üö
-(RTH + RTC ) ± çç (RTH +RTC ) - 4 íRTH ´ RTC + ´ (RTC - RTH )ý ÷
(VH - VC ) ´ ITS ÷
è î þø
Rs =
2 (2)
VH ´ (R TH + RS )
Rp =
ITS ´ (R TH + RS ) - VH (3)
Where:
RTH: Thermistor Hot Trip Value found in thermistor data sheet
RTC: Thermistor Cold Trip Value found in thermistor data sheet
VH: IC's Hot Trip Threshold = 0.3V nominal
VC: IC's Cold Trip Threshold = 2.1V nominal
ITS: IC's Output Current Bias = 75µA nominal
NTC Thermsitor Semitec 103AT-4
Rs and Rp 1% values were chosen closest to calculated values

Cold Temp Resistance and Hot Temp Resistance and Trip

External Bias Resistor, Rs (Ω) External Bias Resistor, Rp (Ω)
Trip Threshold; Ω (°C) Threshold; Ω (°C)
28000 (–0.6) 4000 (51) 0 ∞
28480 (–1) 3536 (55) 487 845000
28480 (–1) 3021 (60) 1000 549000
33890 (–5) 4026 (51) 76.8 158000
33890 (–5) 3536 (55) 576 150000
33890 (–5) 3021 (60) 1100 140000

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RHOT and RCOLD are the thermistor resistance at the desired hot and cold temperatures, respectively. Note
that the temperature window cannot be tightened more than using on the thermistor connected to TS, it can only
be extended.

INTC

bq2407x

TS RS PACK+
+ TEMP

VCOLD
RP
PACK-
+ VHOT

Figure 15. Extended TS Temperature Thresholds

8.4 Device Functional Modes

8.4.1 Battery Charging
Set CE low to initiate battery charging. First, the device checks for a short circuit on the BAT pin by sourcing
IBAT(SC) to the battery and monitoring the voltage. When the BAT voltage exceeds VBAT(SC), the battery charging
continues. The battery is charged in three phases: conditioning precharge, constant-current fast charge (current
regulation), and a constant-voltage tapering (voltage regulation). In all charge phases, an internal control loop
monitors the IC junction temperature and reduces the charge current if an internal temperature threshold is
exceeded.
Figure 16 illustrates a normal Li-ion charge cycle using the bq2423x:

PRECHARGE CC FAST CHARGE CV TAPER DONE

VBAT(REG)

IO(CHG)

Battery Current

Battery Voltage

VLOWV
CHG = Hi-z
I(PRECHG)

I(TERM)

Figure 16. Normal Li-Ion Charge Cycle

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Device Functional Modes (continued)

In the precharge phase, the battery is charged with the precharge current (IPRECHG). Once the battery voltage
crosses the VLOWV threshold, the battery is charged with the fast-charge current (ICHG). As the battery voltage
reaches VBAT(REG), the battery is held at a constant voltage of VBAT(REG) and the charge current tapers off as the
battery approaches full charge. When the battery current reaches ITERM, the CHG pin indicates charging done by
going high impedance.
Note that termination detection is disabled whenever the charge rate is reduced because of the actions of the
thermal loop, the DPPM loop, or the VIN(LOW) loop.
The value of the fast-charge current is set by the resistor connected from the ISET pin to VSS, and is given by
the equation:
ICHG = KISET/RISET (4)
The charge current limit is adjustable from 25 mA to 500 mA. The valid resistor range is 1.8 kΩ to 36 kΩ. Note
that if ICHG is programmed as greater than the input current limit, the battery does not charge at the rate of ICHG,
but at the slower rate of IIN(MAX) (minus the load current on the OUT pin, if any). In this case, the charger timers
are proportionately slowed down.

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Device Functional Modes (continued)

Begin Charging

Yes Yes
Battery short detected ?
Termination Reached
BATTFET Off
Wait for V BAT < VRCH
No

Start Precharge
CHG = Low
No
VBAT < VRCH

Yes
No

No tPRECHARGE Run Battery Detection

VBAT > VLOWV
Elapsed?

Yes

No
Battery Detected ?
Start Fastcharge End Charge
ICHARGE Flash/CHG
set by ISET
Yes

No

No tFASTCHARGE
I BAT< ITERM
Elapsed?

Yes

End Charge
Charge Done Flash CHG
CHG = Hi-Z

TD = Low
(’72, ’73 Only) No
(’74, ’75 = YES )

Figure 17. Battery Charging Flow Diagram

8.4.1.1 Charge Current Translator

When the charger is enabled, internal circuits generate a current proportional to the charge current at the ISET
input. The current out of ISET is 1/400 (±10%) of the charge current. This current, when applied to the external
charge current programming resistor, RISET, generates an analog voltage that can be monitored by an external
host to calculate the current sourced from BAT.
VISET=(ICHARGE / 400)×RISET (5)

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Device Functional Modes (continued)

8.4.1.2 Battery Detection and Recharge
The bq2423x automatically detects if a battery is connected or removed. Once a charge cycle is complete, the
battery voltage is monitored. When the battery voltage falls below VRCH, the battery detection routine is run. The
detection routine first applies IBAT(DET) for tDET to see if VBAT drops below VLOWV. If not, it indicates that the battery
is still connected, but has discharged. If CE is low, the charger is turned on again to top off the battery. During
this recharge cycle, the CHG output remains high-impedance as recharge cycles are not indicated by the CHG
pin. If the BAT voltage falls below VLOWV during the battery detection test, it indicates that the battery has been
removed or the protector is open. Next, the precharge current is applied for tDET to close the protector if possible.
If the battery voltage does not rise above VRCH, it indicates that the protector is closed, or a battery has been
inserted, and a new charge cycle begins. If the voltage rises above VRCH, the battery is determined missing and
the detection routine continues. The battery detection runs until a battery is detected.

8.4.1.3 Termination Disable (TD Input, bq24230)

The bq24230 contains a TD input that allows termination to be enabled/disabled. Connect TD to a logic high to
disable charge termination. When termination is disabled, the device goes through the precharge, fast-charge,
and CV phases, then remains in the CV phase. During the CV phase, the charger maintains the output voltage at
BAT equal to VBAT(REG), and charging current does not terminate. BAT sources currents up to ICHG or IIN-MAX,
whichever is less. Battery detection is not performed. The CHG output is high impedance once the current falls
below ITERM and does not go low until the input power or CE are toggled. When termination is disabled, the
precharge and fast-charge safety timers are also disabled. Battery pack temperature sensing (TS pin
functionality) is also disabled if the TD pin is high and the TS pin is unconnected.

8.4.1.4 Adjustable Termination Threshold (ITERM Input, bq24232)

The termination current threshold for the bq24232 is user-programmable. Set the termination current by
connecting a resistor from ITERM to VSS. For USB100, mode (EN1 = EN2 = VSS), the termination current value
is calculated as:
ITERM = 0.01 × RITERM / RISET (6)
In the other input current limit modes (EN1 ≠ EN2), the termination current value is calculated as:
ITERM = 0.03 × RITERM / RISET (7)
The termination current is programmable up to 50% of the fast-charge current. The RITERM resistor must be less
than 15 kΩ. Leave ITERM unconnected to select the default internally set termination current.

8.4.1.5 Dynamic Charge Timers (TMR Input)

The bq2423x devices contain internal safety timers for the precharge and fast-charge phases to prevent potential
damage to the battery and the system. The timers begin at the start of the respective charge cycles. The timer
values are programmed by connecting a resistor from TMR to VSS. The resistor value is calculated using the
following equation:
tPRECHG = KTMR × RTMR (8)
tMAXCHG = 10 × KTMR × RTMR (9)
Leave TMR unconnected to select the internal default timers. Disable the timers by connecting TMR to VSS.
Reset the timers by toggling CE pin.
Note that timers are suspended when the device is in thermal shutdown, and the timers are slowed proportionally
to the charge current when the device enters thermal regulation. For the bq24230, the timers are disabled when
TD is connected to a high logic level.
During the fast-charge phase, several events increase the timer durations.
1. The system load current activates the DPPM loop which reduces the available charging current
2. The input current is reduced because the input voltage has fallen to VIN(LOW)
3. The device has entered thermal regulation because the IC junction temperature has exceeded TJ(REG)
During each of these events, the internal timers are slowed down proportionately to the reduction in charging
current. For example, if the charging current is reduced by half for two minutes, the timer clock is reduced to half
the frequency and the counter counts half as fast resulting in only one minute of counted time.

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www.ti.com SLUS821F – OCTOBER 2008 – REVISED NOVEMBER 2014

Device Functional Modes (continued)

8.4.1.6 Status Indicators (PGOOD, CHG)
The bq2423x contains two open-drain outputs that signal its status. The PGOOD output signals when a valid
input source is connected. PGOOD is low when (VBAT + VIN(DT)) < VIN < VOVP. When the input voltage is outside
of this range, PGOOD is high impedance.
The CHG output signals when a new charge cycle is initiated. After a charge cycle is initiated, CHG goes low
once the battery is above the short-circuit threshold. CHG goes high impedance once the charge current falls
below ITERM. CHG remains high impedance until the input power is removed and reconnected or the CE pin is
toggled. It does not signal subsequent recharge cycles.

Table 2. PGOOD Status Indicator

Input State PGOOD Output
VIN < VUVLO Hi impedance
VUVLO < VIN < VIN(DT) + VBAT Hi impedance
VIN(DT) + VBAT < VIN < VOVP Low
VIN > VOVP Hi impedance

Table 3. CHG Status Indicator

Charge State CHG Output
Charging Low (first charge cycle)
Charging terminated Hi impedance until power or CE is toggled
Recharging after termination Hi impedance
Carging suspended by thermal loop Low (first charge cycle)
Safety timers expired Flashing at 2Hz
IC disabled or no valid input power Hi impedance

8.4.1.6.1 Timer Fault

If the precharge timer expires before the battery voltage reaches VLOWV, the bq2423x indicates a fault condition.
Additionally, if the battery current does not fall to ITERM before the fast-charge timer expires, a fault is indicated.
The CHG output flashes at approximately 2 Hz to indicate a fault condition.

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8.4.2 Explanation of Deglitch Times and Comparator Hysteresis

Figures not to scale

VOVP
VOVP - Vhys(OVP)

VIN
Typical Input Voltage
t < tDGL(OVP) Operating Range

VBAT + VIN(DT)
VBAT + VIN(DT) - Vhys(INDT)

UVLO
UVLO - Vhys(UVLO)

PGOOD tDGL(PGOOD)
tDGL(OVP) tDGL(NO-IN)
tDGL(PGOOD)

Figure 18. Power Up, Power Down

VBAT tDGL1(LOWV)

VLOWV

t < tDGL1(LOWV) tDGL1(LOWV) tDGL2(LOWV) t < tDGL2(LOWV)

ICHG
Fast-Charge Fast-Charge
Pre-Charge
IPRE-CHG
Pre-Charge

Figure 19. Pre- To Fast-Charge, Fast- To Precharge Transition – TDGL1(LOWV), TDGL2(LOWV)

VBAT
VRCH

Re-Charge
t < tDGL(RCH) tDGL(RCH)

Figure 20. Recharge – TDGL(RCH)

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Turn Force Turn Force

Q2 OFF Q2 ON Q2 OFF Q2 ON
tREC(SC2) tREC(SC2)

VBAT - VOUT

Recover
VO(SC2)

t < tDGL(SC2) tDGL(SC2) tDGL(SC2) t < tDGL(SC2)

Figure 21. Out Short-Circuit – Supplement Mode

VCOLD
VCOLD - Vhys(COLD)

Suspend
Charging
t < tDGL(TS) tDGL(TS) Resume
Charging
VTS

VHOT - Vhys(HOT)
VHOT

Figure 22. Battery Pack Temperature Sensing – TS Pin. Battery Temperature Increasing

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9 Application and Implementation

NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.

9.1 Application Information

The bq2423x devices power the system while simultaneously and independently charging the battery. The input
power source for charging the battery and running the system can be an AC adapter or a USB port. The devices
feature dynamic power-path management (DPPM), which shares the source current between the system and
battery charging and automatically reduces the charging current if the system load increases. When charging
from a USB port, the input dynamic power management (VIN-DPM) circuit reduces the input current limit if the
input voltage falls below a threshold, preventing the USB port from crashing. The power-path architecture also
permits the battery to supplement the system current requirements when the adapter cannot deliver the peak
system currents.
The bq2423x can be configured as host controlled for selecting different input current limits based on the input
source connected; or, as a fully stand-alone device for applications that do not support multiple types of input
sources.

9.2 Typical Applications

9.2.1 Using The bq24232 In A Stand-Alone Charger Application
See Figure 23 for the Design Example Schematic.
VIN = VUVLO to VOVP , IFASTCHG = 200 mA, IIN(MAX) = 500 mA, 25-mA Termination Current, ISET mode (EN1=0,
EN2=1), Battery Temperature Charge Range 0°C to 50°C, 6.25-hour Fast Charge Safety Timer.

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Typical Applications (continued)

R5 R6
1.5 kΩ 1.5 kΩ

SYSTEM

PGOOD

CH G
Adaptor

DC+ IN OUT

GND C1 C2
1 μF 4.7μF
VSS

bq 24232

EN 2

EN 1
TS
CE

BAT

C3 TMR
PACK + 4.7 μF
TEMP
IT E R M

IS E T

R4
IL IM

56 .2 kΩ

PACK -
R1 R2 R3
3.57 kΩ 2.94 kΩ 4 .32 kΩ

Figure 23. Using The bq24232 in a Stand-Alone Charger Application

9.2.1.1 Design Requirements

• Supply voltage = 5 V
• Fast-charge current of approximately 200 mA; ISET - pin 16
• Input Current Limit =500 mA; ILIM - pin 12
• Termination Current = 25 mA - pin 15 (bq24232)
• Safety timer duration, Fast charge = 6.25 hours; TMR – pin 14
• TS – Battery Temperature Sense = 10 kΩ NTC (103AT-2)

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Typical Applications (continued)

9.2.1.2 Detailed Design Procedure

9.2.1.2.1 Calculations

9.2.1.2.1.1 Program The Fast-Charge Current (ISET):

RISET = KISET / ICHG
KISET = 870 AΩ from the electrical characteristics table.
RISET = 870 AΩ/0.2 A = 4.35kΩ
Select the closest standard value, which for this case is 4.32 kΩ. Connect this resistor between ISET (pin 16)
and VSS.

9.2.1.2.1.2 Program The Input Current Limit (ILIM)

RILIM = KILIM / II_MAX
KILIM = 1530 AΩ from the electrical characteristics table.
RISET = 1530 AΩ / 0.5 A = 3.06 kΩ
Select the closest standard value, which for this case is 3.06 kΩ. Connect this resistor between ILIM (pin 12) and
VSS.

9.2.1.2.1.3 Program The Termination Current Threshold (ITERM, bq24232)

RITERM = RISET × ITERM / KITERM
KITERM = 0.03 A from electrical characteristics table
RITERM = 4.32 kΩ × 0.025 A/0.03 A = 3.6 kΩ
Select the closest standard value, which for this case is 3.57 kΩ. Connect this resistor between ITERM (pin 15)
and VSS

9.2.1.2.1.4 Program 6.25-Hour Fast-Charge Safety Timer (TMR)

RTMR = tMAXCHG / (10 × KTMR )
KTMR = 40 s/kΩ from the electrical characteristics table.
RTMR = (6.25 hr × 3600 s/hr) / (10 × 40 s/kΩ) = 56.25 kΩ
Select the closest standard value, which for this case is 56.2 kΩ. Connect this resistor between TMR (pin 2) and
VSS.

9.2.1.2.2 TS Function
Use a 10-kΩ NTC thermistor in the battery pack (103AT). To disable the temperature sense function, use a fixed
10-kΩ resistor between the TS (pin 1) and VSS. Pay close attention to the linearity of the chosen NTC so that it
provides the desired hot and cold turnoff thresholds.

9.2.1.2.3 CHG and PGOOD

LED Status: connect a 1.5-kΩ resistor in series with a LED between OUT and CHG and OUT and PGOOD.
Processor Monitoring Status: connect a pullup resistor (approximately 100 kΩ) between the processor’s power
rail and CHG and PGOOD.

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Typical Applications (continued)

9.2.1.2.4 Selecting In, Out, and BAT Pin Capacitors
In most applications, all that is needed is a high-frequency decoupling capacitor (ceramic) on the power pin,
input, output, and battery pins. Using the values shown on the application diagram is recommended. After
evaluation of these voltage signals with real system operational conditions, the user can determine if capacitance
values can be adjusted toward the minimum recommended values (dc load application) or higher values for fast,
high-amplitude, pulsed load applications. Note, if the application is designed with high input voltage sources (bad
adapters or wrong adapters), the capacitor needs to be rated appropriately. Ceramic capacitors are tested to 2x
their rated values so a 16-V capacitor may be adequate for a 30-V transient (verify the tested rating with
capacitor manufacturer).

9.2.1.3 Application Curves

VIN 5 V/div VCHG

5 V/div
VOUT
4.4 V
1 V/div
VBAT VBAT 2 V/div
4V Battery Inserted

VPGOOD Battery Detection Mode

Battery Supplying Load
Mandatory Precharge 200 mA/div Charging Initiated
IBAT 100 mA/div
IBAT
Fastcharge

4 ms/div 400 ms/div

RLOAD = 25Ω

Figure 24. Adapter Plug-In With Battery Connected Figure 25. Battery Detection -- Insertion

VCHG ILOAD
2 V/div 500 mA/div

VBAT IBAT 200 mA/div

Battery Removed 200 mA/div

Battery Detection Mode

VOUT
IBAT 4.4 V 200 mV/div
2 V/div

400 ms/div 400 ms/div

RLOAD = 25Ω To 9Ω
Figure 26. Battery Detection -- Removal Figure 27. Entering And Exiting DPPM Mode

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Typical Applications (continued)

500 mA/div VCE 5 V/div

ILOAD

IBAT Supplement Mode

VCHG
5 V/div
500 mA/div

VBAT 500 mV/div

VOUT
3.6V
4.4 V
200 mV/div
IBAT Mandatory Precharge
100 mA/div
VBAT
3.9 V

2 ms/div 10 ms/div
RLOAD = 25Ω To 4.5Ω

Figure 28. Entering And Exiting Battery Supplement Mode Figure 29. Charger ON/OFF Using CE

VIN 10 V/div

IBAT

200 mA/div

VOUT
4.4 V
VBAT 200 mV/div
4.2 V

40 ms/div
RLOAD = 25Ω

Figure 30. OVP Fault VIN = 6 V To 15 V

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Typical Applications (continued)

9.2.2 Using The bq24230 in a Host Controlled Charger Application
See Figure 31 for the Design Example Schematic.
VIN = VUVLO to VOVP , IFASTCHG = 200 mA, IIN(MAX) = 500 mA, Battery Temperature Charge Range 0°C to 50°C,
6.25-hour Fast Charge Safety Timer.

R4 R5
1.5 kΩ 1.5 kΩ

SYSTEM

PGOOD

C HG
Adaptor

DC+ IN OUT

GND C1 C2
1μF 4.7μF

VSS

bq24230 HOST

EN2

EN1
TS
TD

CE
BAT

C3
TEMP PACK+ 4.7μF

PACK -
R1 R2 R3
56.2 kΩ 2.94 kΩ 4.35 kΩ

Figure 31. Using The bq24230 in a Host Controlled Charger Application

9.2.2.1 Design Requirements

See the bq24232 Design Requirements.

9.2.2.2 Detailed Design Procedure

See the bq24232 Detailed Design Procedure.

9.2.2.3 Application Curves

See the bq24232 Application Curves.
Copyright © 2008–2014, Texas Instruments Incorporated Submit Documentation Feedback 33
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10 Power Supply Recommendations

10.1 Requirements for OUT Output

In order to provide an output voltage on SYS, the bq2423x require either a power supply between 4.35 V and 6.0
V input for bq24230 and between 4.35V and 10V for bq24232 to fully charge a battery. The supply must have at
least 100 mA current rating connected to IN; or, a single-cell Li-Ion battery with voltage > VBATUVLO connected
to BAT. The source current rating needs to be at least 1.5 A in order to provide maximum output current to SYS.

10.2 USB Sources and Standard AC Adapters

In order for charging to occur the source voltage measured at the IN terminals of the IC, factoring in cable/trace
losses from the source, must be greater than the VINDPM threshold (in USB mode), but less than the maximum
values shown above. The current rating of the source must be higher than the load requirements for OUT in the
application. For charging at a desired charge current of ICHRG, IIN > (ISYS+ ICHRG). The charger limits IIN to
the current limit setting of EN1/EN2.

10.3 Half-Wave Adapters

Some low-cost adapters implement a half rectifier topology, which causes the adapter output voltage to fall below
the battery voltage during part of the cycle. To enable operation with low-cost adapters under those conditions,
the bq2423x family keeps the charger on for at least 20 ms (typical) after the input power puts the part in sleep
mode. This feature enables use of external low-cost adapters using 50-Hz networks.

11 Layout

11.1 Layout Guidelines

• To obtain optimal performance, the decoupling capacitor from IN to GND (thermal pad) and the output filter
capacitors from OUT to GND (thermal pad) must be placed as close as possible to the bq2423x, with short
trace runs to both IN, OUT, and GND (thermal pad).
• All low-current GND connections must be kept separate from the high-current charge or discharge paths from
the battery. Use a single-point ground technique incorporating both the small signal ground path and the
power ground path.
• The high current charge paths into the IN pin and from the OUT pin must be sized appropriately for the
maximum charge current in order to avoid voltage drops in these traces.
• The bq2423x family is packaged in a thermally enhanced MLP package. The package includes a thermal pad
to provide an effective thermal contact between the IC and the printed-circuit board (PCB); this thermal pad is
also the main ground connection for the device. Connect the thermal pad to the PCB ground connection. Full
PCB design guidelines for this package are provided in the application report entitled: QFN/SON PCB
Attachment (SLUA271).

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11.2 Layout Example

11.3 Thermal Package

The bq2423x is packaged in a thermally enhanced MLP package. The package includes a thermal pad to
provide an effective thermal contact between the IC and the printed-circuit board (PCB). The power pad must be
directly connected to the Vss pin. Full PCB design guidelines for this package are provided in the application
report entitled: QFN/SON PCB Attachment (SLUA271). The most common measure of package thermal
performance is thermal impedance (θJA ) measured (or modeled) from the chip junction to the air surrounding the
package surface (ambient). The mathematical expression for θJA is:
θJA = (TJ - T) / P (10)
Where:
TJ = chip junction temperature
T = ambient temperature
P = device power dissipation
Factors that can greatly influence the measurement and calculation of θJA include:
1. Whether the device is board mounted
2. Trace size, composition, thickness, and geometry
3. Orientation of the device (horizontal or vertical)
4. Volume of the ambient air surrounding the device under test and airflow
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Thermal Package (continued)

5. Whether other surfaces are in close proximity to the device being tested
Due to the charge profile of Li-ion batteries, the maximum power dissipation is typically seen at the beginning of
the charge cycle when the battery voltage is at its lowest. Typically, after fast charge begins, the pack voltage
increases to ~3.4 V within the first 2 minutes. The thermal time constant of the assembly typically takes a few
minutes to heat up so when doing maximum power dissipation calculations, 3.4 V is a good minimum voltage to
use. This is easy to verify, with the system and a fully discharged battery, by plotting temperature on the bottom
of the PCB under the IC (pad must have multiple vias), the charge current and the battery voltage as a function
of time. The fast-charge current starts to taper off if the part goes into thermal regulation.
The device power dissipation, P, is a function of the charge rate and the voltage drop across the internal
PowerFET. It can be calculated from the following equation when a battery pack is being charged :
P = [V(IN) – V(OUT)] × I(OUT) + [V(OUT) – V(BAT)] × I(BAT) (11)
The thermal loop feature reduces the charge current to limit excessive IC junction temperature. It is
recommended that the design not run in thermal regulation for typical operating conditions (nominal input voltage
and nominal ambient temperatures) and use the feature for nontypical situations such as hot environments or
higher than normal input source voltage. With that said, the IC still performs as described, if the thermal loop is
always active.

12 Device and Documentation Support

12.1 Documentation Support

12.1.1 Related Documentation
Application report QFN/SON PCB Attachment, SLUA271

12.2 Related Links

The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.

Table 4. Related Links

TECHNICAL TOOLS & SUPPORT &
PARTS PRODUCT FOLDER SAMPLE & BUY
DOCUMENTS SOFTWARE COMMUNITY
bq24230 Click here Click here Click here Click here Click here
bq24232 Click here Click here Click here Click here Click here

12.3 Trademarks
Bluetooth is a trademark of Bluetooth SIG, Inc..
All other trademarks are the property of their respective owners.
12.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.

12.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.

13 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
36 Submit Documentation Feedback Copyright © 2008–2014, Texas Instruments Incorporated

Product Folder Links: bq24230 bq24232

 PACKAGE OPTION ADDENDUM

www.ti.com 10-Jun-2014

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)

BQ24230RGTR ACTIVE QFN RGT 16 3000 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 CGN
& no Sb/Br)
BQ24230RGTRG4 ACTIVE QFN RGT 16 3000 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 CGN
& no Sb/Br)
BQ24230RGTT ACTIVE QFN RGT 16 250 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 CGN
& no Sb/Br)
BQ24232RGTR ACTIVE QFN RGT 16 3000 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 NXK
& no Sb/Br)
BQ24232RGTT ACTIVE QFN RGT 16 250 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 NXK
& no Sb/Br)
BQ24232RGTTG4 ACTIVE QFN RGT 16 250 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 NXK
& no Sb/Br)

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

Addendum-Page 1
 PACKAGE OPTION ADDENDUM

www.ti.com 10-Jun-2014

(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 2
 PACKAGE MATERIALS INFORMATION

www.ti.com 15-Feb-2014

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
BQ24230RGTR QFN RGT 16 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2
BQ24230RGTT QFN RGT 16 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2
BQ24232RGTR QFN RGT 16 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2
BQ24232RGTT QFN RGT 16 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2

Pack Materials-Page 1
 PACKAGE MATERIALS INFORMATION

www.ti.com 15-Feb-2014

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
BQ24230RGTR QFN RGT 16 3000 367.0 367.0 35.0
BQ24230RGTT QFN RGT 16 250 210.0 185.0 35.0
BQ24232RGTR QFN RGT 16 3000 367.0 367.0 35.0
BQ24232RGTT QFN RGT 16 250 210.0 185.0 35.0

Pack Materials-Page 2
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