1

Dr. N.G.P.INSTITUTE OF TECHNOLOGY, COIMBATORE - 641048.

Department of Electronics and Communication Engineering

TWO MARKS
YEAR/SEM: IV/VII

EC8791 – EMBEDDED AND REAL TIME SYSTEMS

Prepared by,
Mr. U. Vinothkumar, ECE/Dr.N.G.P.IT
Dr. J. Chitra, ECE/Dr.N.G.P.IT

Approved by

HoD / ECE Principal

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EC8791 EMBEDDED AND REAL TIME SYSTEMS LTPC

3003
OBJECTIVES:
The student should be made to:
 Understand the concepts of embedded system design and analysis
 Learn the architecture and programming of ARM processor
 Be exposed to the basic concepts of embedded programming
 Learn the real time operating systems

UNIT I INTRODUCTION TO EMBEDDEDSYSTEM DESIGN 9

Complex systems and microprocessors– Embedded system design process –Design example:
Model train controller- Design methodologies- Design flows - Requirement Analysis – Specifications-
System analysis and architecture design – Quality Assurance techniques - Designing with computing
platforms – consumer electronics architecture – platform-level performance analysis.

UNIT II ARM PROCESSOR AND PERIPHERALS 9

ARM Architecture Versions – ARM Architecture – Instruction Set – Stacks and Subroutines –
Features of the LPC 214X Family – Peripherals – The Timer Unit – Pulse Width Modulation Unit – UART
– Block Diagram of ARM9 and ARM Cortex M3 MCU.

UNIT III EMBEDDED PROGRAMMING 9

Components for embedded programs- Models of programs- Assembly, linking and loading –
compilation techniques- Program level performance analysis – Software performance optimization –
Program level energy and power analysis and optimization – Analysis and optimization of program size-
Program validation and testing.

UNIT IV REAL TIME SYSTEMS 9

Structure of a Real Time System –– Estimating program run times – Task Assignment and
Scheduling – Fault Tolerance Techniques – Reliability, Evaluation – Clock Synchronization.

UNIT V PROCESSES AND OPERATING SYSTEMS 9

Introduction – Multiple tasks and multiple processes – Multirate systems- Preemptive real-time
operating systems- Priority based scheduling- Inter-process communication mechanisms – Evaluating
operating system performance- power optimization strategies for processes – Example Real time operating
systems-POSIX-Windows CE. - Distributed embedded systems – MPSoCs and shared memory
multiprocessors. – Design Example - Audio player, Engine control unit – Video accelerator.

TOTAL: 45 PERIODS
OUTCOMES:
At the end of the course, the student should be able to:
 Describe the architecture and programming of ARM processor
 Outline the concepts of embedded systems
 Explain the basic concepts of real time operating system design
 Model real-time applications using embedded-system concepts

TEXT BOOKS:

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1. Marilyn Wolf, “Computers as Components - Principles of Embedded Computing System Design”, Third
Edition ―Morgan Kaufmann Publisher (An imprint from Elsevier), 2012. (UNIT I, II, III, V)
2. Jane W.S.Liu,” Real Time Systems”, Pearson Education, Third Indian Reprint, 2003. (UNIT IV)

REFERENCES:
1. Lyla B.Das, “Embedded Systems: An Integrated Approach” Pearson Education, 2013.
2. Jonathan W.Valvano, “Embedded Microcomputer Systems Real Time Interfacing”, Third Edition
Cengage Learning, 2012.
3. David. E. Simon, “An Embedded Software Primer”, 1st Edition, Fifth Impression, Addison-Wesley
Professional, 2007.
4. Raymond J.A. Buhr, Donald L.Bailey, “An Introduction to Real-Time Systems from Design to
Networking with C/C++”, Prentice Hall, 1999.
5. C.M. Krishna, Kang G. Shin, “Real-Time Systems”, International Editions, Mc Graw Hill 1997
6. K.V.K.K.Prasad, “Embedded Real-Time Systems: Concepts, Design & Programming”, Dream Tech
Press, 2005.
7. Sriram V Iyer, Pankaj Gupta, “Embedded Real Time Systems Programming”, Tata Mc Graw Hill, 2004.

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UNIT I
INTRODUCTION TO EMBEDDEDSYSTEM DESIGN
Syllabus:
Complex systems and microprocessors– Embedded system design process –
Design example: Model train controller- Design methodologies- Design flows -
Requirement Analysis – Specifications-System analysis and architecture design –
Quality Assurance techniques - Designing with computing platforms – consumer
electronics architecture – platform-level performance analysis.

Two mark questions:

1. What is an embedded computer system? (Nov/Dec-2012)

It is defined as any device that includes a programmable computer but is not
itself intended to be general-purpose computer. Thus, a PC is not itself an embedded
computing system. But a fax machine or a clock built from a microprocessor is an
embedded computing system.

2. Why a programmable CPU is used rather than a hardwired unit?

A programmable CPU is used rather than a hardwired unit for two reasons:
first, it made the system easier to design and debug; and second, it allowed the
possibility of upgrades and using the CPU for other purposes.

3. List the characteristics of embedded computing applications. (Nov/Dec-

2013)
The characteristics of embedded computing applications are,
 Complex algorithms
 User interface
 Real time
 Multirate
 Manufacturing cost
 Power and Energy

4. Why use microprocessors?

There are two reasons for using microprocessors in embedded computing
applications.
 Microprocessors are very efficient way to implement digital systems.
 Microprocessors make it easier to design families of products that can
be built to provide various feature sets at different price points and can

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be extended to provide new features to keep up with rapidly changing

markets.

5. Why not use PCs for all embedded computing? How many different
hardware platforms do we need for embedded computing systems?
PCs are widely used and provide a very flexible programming environment.
Components of PCs are, in fact, used in many embedded computing systems. But
several factors keep us from using the stock PC as the universal embedded
computing platform.

6. Define Cyber-physical systems. (Nov/Dec-2013)

A cyber-physical system is one that combines physical devices, known as the
plant, with computers that control the plant. The embedded computer is the cyber-
part of the cyber-physical system. We can, in general, make certain trade-offs
between the design of the control of the plant and the computational system that
implements that control.

7. List the challenges in embedded computing system design.

The important problems that must be taken into account in embedded system
design are,
 How much hardware do we need?
 How do we meet deadlines?
 How do we minimize power consumption?
 How do we design for upgradeability?
 Does it really work?

8. What are the ways in which the nature of embedded computing machines
makes their design more difficult? (Apr-2014)
The nature of embedded computing machines makes their design more difficult
in some ways. That are,
 Complex testing
 Limited observability and controllability
 Restricted development environments

9. What are the different levels of abstractions in real-time behavior of an

embedded computing system?
In order to understand the real-time behavior of an embedded computing system,
we have to analyze the system at several different levels of abstraction. That are,
 CPU
 Platform

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 Program
 Task
 Multiprocessor

10. What are the objectives of embedded system design process?

There are two objectives for embedded system design process, that are,
 It will give us an introduction to the various steps in embedded system
design before we delve into them in more detail.
 It will allow us to consider the design methodology itself.

11. Why the design methodology is so important? (Nov/Dec-2012)

A design methodology is important for three reasons,
 It allows us to keep a scorecard on a design to ensure that we have done
everything we need to do, such as optimizing performance or
performing functional tests.
 It allows us to develop computer-aided design tools.
 A design methodology makes it much easier for members of a design
team to communicate.

12. What are the major level of abstraction in the design process?
The major level of abstraction in the Top-down design are,
 Requirements
 Specification
 Architecture
 Components
 System integration
The major level of abstraction in the Bottom-up design are,
 System integration
 Components
 Architecture
 Specification
 Requirements

13. What are all the major goals and the tasks we need to perform at every steps
in the design process?
Goals:
 Manufacturing cost
 Performance
 Power consumption

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Tasks at every steps:

 We must analyze the design at each step to determine how we can meet
the specifications.
 We must then refine the design to add detail.
 We must verify the design to ensure that it still meets all system goals,
such as cost, speed, and so on.

14. What are all the non-functional requirements in embedded system design
process? (Nov/Dec-2013)
The typical non-functional requirements includes,
 Performance
 Cost
 Physical size and weight
 Power consumption

15. List out the entries in the requirements form as a check list.
The entries in the requirement form are,
 Purpose
 Inputs
 Outputs
 Functions
 Performance
 Manufacturing cost
 Power
 Physical size and weight

16. Define Unified Modeling Language (UML).

The UML is an Object-Oriented modeling language. Object-oriented design
emphasizes two concepts of importance:
 It encourages the design to be described as a number of interaction
objects, rather than a few large monolithic blocks of code.
 At least some of the objects will corresponds to real pieces of software
or hardware in the system.

17. State the two complementary ways of Object-Oriented specification.

The two complementary ways Object-Oriented specification are,
 Object-Oriented specification allows a system to be described in a way
that closely models real-world objects and their interactions.

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 Object-Oriented specification provides a basic set of primitives that can

be used to describe systems with particular attributes, irrespective of
the relationships of those systems’ components to real-world objects.

18. Figure an object describing a display in UML notation. (Nov/Dec-2014)

An object in UML notation

19. Figure out A class in UML notation.

20. What are the types of relationships that can exist between objects and
classes?
The types of relationships that can exist between objects and classes
 Association occurs between objects that communicate with each other
but have no ownership relationship between them.
 Aggregation describes a complex object made of smaller objects.
 Composition is a type of aggregation in which the owner does not
allow access to the component objects.
 Generalization allows us to define one class in terms of another.

21. List the characteristics of Instruction set.

Instruction set can have a variety of characteristics, which are,
 Fixed versus variable length.
 Addressing modes.

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 Numbers of operands.
 Types of operations supported.

22. Compare RISC vs CISC. (Nov/Dec-2013)

23. What are the basic features of assembly language?

Assembly languages usually share the same basic features:
 One instruction appears per line
 Labels, which gives names to memory locations, start in the first
column
 Instructions must start in the second column or after to distinguish them
from labels
 Comments run from some designated comment character to the end of
the line.

24. Define Packets & Data dependency.

A set of instructions is bundled together into a VLIW packet, which is a set of
instructions that may be executed together. The execution of the next packet will not
start until all the instruction in the current packet have finished executing. The
compiler identifies packets by analyzing the program to determine sets of
instructions that can always execute together.
A Data dependency is a relationship between the data operated on by instructions.

25. Compare VLIW vs Superscalar.

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VLIW processors examine inter-instruction dependencies only within a packet of

instructions. They rely on the compiler to determine the necessary dependencies and
group instructions into a packet to avoid combinations of instructions that can’t be
properly executed in a packet. Superscalar processors, in contrast, use hardware to
analyze the instruction stream and determine dependencies that need to be obeyed.

26. Define Load-Store Architecture in ARM Programming. (Nov/Dec-2013)

ARM is a load-store architecture-data operands must first be loaded into the CPU
and then stored back to main memory to save the results.

27. What are the advanced ARM features?

The advanced ARM features are,
 DSP
 SIMD
 NEON
 TrustZone
 Jazelle
 Cortex

28. Define Busy-wait I/O and Polling.

The simplest way to communicate with devices in a program is busy-wait I/O.
Devices are typically slower than the CPU and may require many cycles to complete
and operation. If the CPU is performing multiple operations on a single device, such
as writing several characters to an output devices, then it must wait for one operation
to complete before starting the next one.
Asking an I/O device whether it is finished by reading its status register is
often called polling.

29. What are the ways to generalized interrupts?

There are two ways in which interrupts can be generalized to handle multiple devices
and to provide more flexible definitions for the associated hardware and software:
 Interrupt priorities allow the CPU to recognize some interrupts as more
important than others
 Interrupt vectors allow the interrupting device to specify its handler
30. Define Masking. (Nov/Dec-2014)
The priority mechanism must ensure that a lower-priority interrupt does not occur
when a higher-priority interrupt is being handled. The decision process is known as
masking.

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UNIT II
ARM PROCESSOR AND PERIPHERALS
Syllabus:
ARM Architecture Versions – ARM Architecture – Instruction Set – Stacks
and Subroutines – Features of the LPC 214X Family – Peripherals – The Timer Unit
– Pulse Width Modulation Unit – UART – Block Diagram of ARM9 and ARM Cortex
M3 MCU.

Two mark questions:

1. What are all the major hardware components included in a typical

computing platform?
 CPU: provides basic computational facility
 RAM: used for program and data storage.
 ROM: holds the boot program and some permanent data.
 DMA controller: provides direct memory access capabilities.
 Timers: used by the operating system for variety of purpose.
 High speed bus: connect to the CPU bus through a bridge, allows fast
devices to communicate efficiently with the rest of the system.
 Low speed bus: provides an inexpensive way to connect simpler devices
and may be necessary for backward compatibility as well.

2. Define CPU bus. (Nov/Dec-2014)

The bus is the mechanism by which the CPU communicates with memory and
devices. A bus is, at a minimum, collection of wires but it also defines a protocol by
which the CPU, memory, and devices communicate. One of the major roles of the
bus is to provide an interface to memory.

3. What is four cycle handshake? (Nov/Dec-2012)

The basic building block of most bus protocol is the four-cycle handshake. The
handshake ensures that when two devices want to communicate, one is ready to
transmit and the other is ready to receive. The handshake uses a pair of wires
dedicated to the handshake: ENQ (enquiry) and ACK (acknowledge).

4. What are the major components on a typical bus?

The major components on a typical bus are,
 Clock provides synchronization to the bus components
 R/W is true when the bus is reading and false when the bus is writing

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 Address is an a-bit bundle of signals that transmits the address for an

access.
 Data is an n-bit bundle of signals that can carry data to or from the CPU
 Data ready signals when the values on the data bundle are valid.

5. What is timing diagram? (Nov/Dec-2014)

Sequence diagram don’t give us enough detail to fully understand the hardware.
To provide the required detail, the behavior of a bus is most often specified as a
timing diagram. A timing diagram shows how the signals on a bus vary over time,
but because values like the address and data can talk on many values, some standard
notation is used to describe signals.

6. Define Burst transfer.

The CPU sends one address but receives a sequence of data values. We add an
extra line to the bus, called burst’ here, which signals when a transaction is actually
a burst. Releasing the burst’ signal tells the device that enough data has been
transmitted. To stop receiving data after the end of data 4, the CPU releases the
burst’ signal at the end of data 3 because the device requires some time to recognize
the end of the burst. Those values come from successive memory locations starting
at the given address.

7. Write short note on DMA. (Nov/Dec-2012)

Direct memory access (DMA) is a bus operation that allows reads and writes not
controlled by the CPU. A DMA transfer is controlled by a DMA controller, which
requests control of the bus from the CPU. After gaining control, the DMA controller
performs read and write operations directly between devices and memory.
The DMA requires the CPU to provide two additional bus signals:
 The bus request is an input to the CPU through which DMA controllers ask
for ownership of the bus.
 The bus grant signals that the bus has been granted to the DMA controller.

8. What are the three registers included in DMA controller?

The CPU controls the DMA operation through registers in the DMA controller.
A typical DMA controller includes the following three registers:
 A starting address register specifies where the transfer is to begin.
 A length register specifies the number of words to be transferred.
 A status register allows the DMA controller to be operated by the CPU.

9. What are the three reasons for a bridge allows the bus to connect to each
other.

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A small block of logic known as a bridge allows the buses to connect to each
other. There are three reasons to do this:
 Higher-speed buses may provide wider data connections.
 A high-speed bus usually requires more expensive circuits and connectors.
The cost of low-speed devices can be held down by using a lower-speed,
lower-cost bus.
 The bridge may allow the buses to operate independently, thereby providing
some parallelism in I/O operations.

10. Construct the ARM AMBA bus system. (Apr-2014)

11.Explain about ARM bus Systems?

ARM has created a separate bus specification for single-chip systems. The
AMBA bus [ARM99A] supports CPUs, memories, and peripherals integrated in a
system-on-silicon. The AMBA specification includes two buses. The AMBA high-
performance bus (AHB) is optimized for high-speed transfers and is directly
connected to the CPU. It supports several high-performance features: pipelining,
burst transfers, split transactions, and multiple bus masters.
A bridge can be used to connect the AHB to an AMBA peripherals bus (APB).
This bus is designed to be simple and easy to implement; it also consumes relatively
little power. The AHB assumes that all peripherals act as slaves, simplifying the
logic required in both the peripherals and the bus controller. It also does not perform
pipelined operations, which simplifies the bus logic.

12.List the types of DRAM.

Many types of DRAM are available. Each has its own characteristics, usually
centering on how the memory is accessed.
 Synchronous DRAM (SDRAM)

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 Extended data out DRAM (EDO DRAM)

 Fast page mode DRAM (FPM DRAM)
 Double data rate DRAM (DDR DRAM)

13. Define boot-block flash. (Nov/Dec-2014)

A common application is to keep the boot-up code in a protected block but allow
updates to other memory blocks on the device. As a result, this form of flash is
commonly known as boot-block flash.

14. Write note on intellectual property.

Intellectual property (IP) is something that we can own but not touch: software,
net lists, and so on. Some examples of the wide range of IP that we use in embedded
system design are,
 Run-time software libraries
 Software development environment
 Schematics, net lists, and other hardware design information.

15. Define cross-compiler.

A cross-compiler is a compiler that runs on one type of machine but generates
code for another. After compilation, the executable code is downloaded to the
embedded system by a serial link or perhaps burned in a PROM and plugged in.

16.What is test bench program? (Nov/Dec-2012)

A testbench program can be built to help debug the embedded code. The
testbench generates inputs to simulate the actions of the input devices; it may also
take the output values and compare them against expected values, providing valuable
early debugging help. The embedded code may need to be slightly modified to work
with the testbench, but careful coding (such as using the #ifdef directive in C) can
ensure that the changes can be undone easily and without introducing bugs.

17.What are the important debugging tools available?

The two debugging tools are USB port & breakpoint.

18.Define In-circuit emulator (ICE).

The microprocessor in-circuit emulator (ICE) is a specialized hardware tool that
can help debug software in a working embedded system. At the heart of an in-circuit
emulator is a special version of the microprocessor that allows its internal registers
to be read out when it is stopped. The in-circuit emulator surrounds this specialized
microprocessor with additional logic that allows the user to specify breakpoints and
examine and modify the CPU state.

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19.Write short note on Logic analyzer. (Nov/Dec-2012)

The logic analyzer [Ald73] is the other major piece of instrumentation in the
embedded system designer’s arsenal. Think of a logic analyzer as an array of
inexpensive oscilloscopes—the analyzer can sample many different signals
simultaneously (tens to hundreds) but can display only 0, 1, or changing values for
each. All these logic analysis channels can be connected to the system to record the
activity on many signals simultaneously.

20. What are the two modes that a typical logic analyzer can acquire data?
A typical logic analyzer can acquire data in either of two modes that are typically
called state and timing modes. State and timing mode represent different ways of
sampling the values. Timing mode uses an internal clock that is fast enough to take
several samples per clock period in a typical system.

21.Draw the hardware architecture of a generic consumer electronics device.

22.What is flash memory? (Nov/Dec-2014)

Many consumer electronic devices use flash memory for mass storage. Flash
memory is a type of semiconductor memory that, unlike DRAM or SRAM, provides
permanent storage. Values are stored in the flash memory cell as an electric charge
using a specialized capacitor that can store the charge for years. The flash memory
cell does not required an external power supply to maintain its value.

23. What are the steps to be performed to get data from memory to the CPU?
 Read from the memory
 Transfer over the bus to cache
 Transfer from the cache to the CPU

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24. Define circular buffer.

The circular buffer is a data structure that lets us handle streaming data in an
efficient way. Bellow figure illustrates how a circular buffer stores a subset of the
data stream. At each point in time, the algorithm needs a subset of the data stream
that forms a window into the stream. The window slides with time as we throw out
old values no longer needed and add new values.

25. What is control/data flow graph (CDFG)? (Nov/Dec-2012)

Our fundamental model for programs is the control/data flow graph (CDFG).
(We can also model hardware behavior with the CDFG.) As the name implies, the
CDFG has constructs that model both data operations (arithmetic and other
computations) and control operations (conditionals). Part of the power of the CDFG
comes from its combination of control and data constructs. To understand the CDFG,
we start with pure data descriptions and then extend the model to control.
26. Define Data flow graph.
A data flow graph is a model of a program with no conditionals. In a high-level
programming language, a code segment with no conditionals—more precisely, with
only one entry and exit point—is known as a basic block.

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27. Write note on Loader & Absolute address.

Loader: The program that brings the program into memory for execution is
called a loader.
Absolute address: The simplest form of the assembler assumes that the starting
address of the Assembly language program has been specified by the programmer.
The addresses in such a program are known as absolute addresses.

28. Define Linker. (Nov/Dec-2013)

A linker allows a program to be stitched together out of several smaller
pieces.The linker operates on the object files created by the assembler and modifies
the assembled code to make the necessary links between files.

29. Define re-entrant and re-locatable type of programming.

Re-entrant: A program is reentrant if can be interrupted by another call to the
function without changing the results of either call. If the program changes the value
of global variables, it may give a different answer when it is called recursively.
Re-locatable: A program is re-locatable if it can be executed when loaded into
different parts of memory. Relocatability requires some sort of support from
hardware that provides address calculation.

30. Draw the compilation process and state the formula. (Nov/Dec-2012)

Compilation Formula:
Compilation = translation + optimization
Compilation Process:

31. Define loop unrolling & Loop fusion.

A simple but useful transformation is known as loop unrolling. Loop unrolling
is important because it helps expose parallelism that can be used by later stages of
the compiler.

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Loop fusion combines two or more loops into a single loop. For this
transformation to be legal, two conditions must be satisfied. First, the loops must
iterate over the same values. Second, the loop bodies must not have dependencies
that would be violated if they are executed together

32. Define Loop distribution & Loop tiling.

Loop distribution is the opposite of loop fusion that is, decomposing a single
loop into multiple loops. Loop tiling breaks up a loop into a set of nested loops,
with each inner loop performing the operations on a subset of the data.

33.What is dead code? (Apr-2014)

Dead code is a code that can never be executed. Dead code can be generated by
programmers, either inadvertently or purposefully. Dead code can also be generated
by compilers. Dead code can be identified by reachability analysis-finding the other
statements or instructions from which it can be reached. If a given piece of code
cannot be reached, or it can be reached only by a piece of code that is unreachable
from the main program, then it can be eliminated.

34.What is array padding?

Array padding adds dummy data elements to a loop in order to change the layout
of the array in the cache.

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UNIT III
EMBEDDED PROGRAMMING
Syllabus:
Components for embedded programs- Models of programs- Assembly, linking
and loading – compilation techniques- Program level performance analysis –
Software performance optimization – Program level energy and power analysis and
optimization – Analysis and optimization of program size- Program validation and
testing.

Two mark questions:

1. Define Process & Threads. (Nov/Dec-2014)

A process is a single execution of a program. If we run the same program two
different times, we have created two different processes. Each process has its own
state that includes not only its registers but all of its memory. In some OSs, the
memory management unit is used to keep each process in a separate address space.
In others, particularly lightweight RTOSs, the processes run in the same address
space. Processes that share the same address space are often called threads.

2. Define Jitter. (Nov/Dec-2013)

Jitter of task is the allowable variation in the compilation of the task. Jitter can be
important in a variety of applications: in the playback of multimedia data to avoid
audio gaps or jerky images; I the control of machines to ensure that the control signal
is applied at the right time.

3. What is CPU usage metrics?

The simplest and most direct measure of CPU usage metrics is utilization
Utilization = CPU time for useful work
Total available CPU time
4. What is preemptive operating system?
A Preemptive real time operating system solves the fundamental problems of
a cooperative multitasking system. It executes processes based upon timing
requirements provided by the system designer. The most reliable way to meet
timing requirements accurately to build a preemptive operating system and use
priorities to control what process runs at any given time.

5. Define kernel and time quantum. (Nov/Dec-2012)

The kernel is the part of the operating system that determine what process is
running. The kernel is activated periodically by the timer. The length of the timer

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period is known as the time quantum because it is the smallest increment in which
we can control CPU activity.
6. What is Context, Context Switching & record?
The set of registers that defines a process is known as its context, and switching
from one process’s register set to another is known as context switching. The data
structure that holds the state of the process known as the record.

7. What is active object & active class?

UML often refers to processes as active objects, that is, objects that have
independent threads of control. The class that defines an active object is known as
an active class.

8. Write short note on round-robin scheduling. (Nov/Dec-2012)

A common scheduling algorithm is general purpose operating system is round-
robin. All the processes are kept on a list and scheduled one after another. This is
generally combined with preemption so that one process does not grab all the CPU
time. Round-robin scheduling provides a form of fairness in that all processes get a
chance to execute. However, it does not guarantee the completion time of any task;
as the number of process increases, the number of response time of all the processes
increases.

9. Define Rate-monotonic scheduling.

It was one of the first scheduling policies developed for real-time systems and is
still very widely used. RMS is a static scheduling policy it assigns fixed priorities to
processes. It turns out these fixed priorities are sufficient to effectively schedule the
processes in many situations.

10.Define Rate-monotonic analysis. (Nov/Dec-2014)

The theory underlying RMS is known as rate-monotonic analysis (RMA). That
are,
 All processes run periodically on a single CPU.
 Context switching time is ignored.
 There are no data dependencies between processes.
 The execution time for a process is constant.
 All deadlines are at the ends of their periods.
 The highest-priority ready process is always selected for execution.

11.Define critical instant for a process.

The critical instant for a process is defined as the instant during execution at
which the task has the largest response time.

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12. State the equations for CPU utilization for a set of n tasks.
The total CPU utilization for a set of n tasks is

13.Define Semaphore. (Nov/Dec-2014)

Semaphore is a protocol mechanism offered by most multitasking kernels. A
semaphore ‘S’ is a synchronization tool which is an integer value that, apart from
initialization, is accessed only through two standard atomic operations; wait and
signal. Semaphores are used to
 Control access to shared resources
 Signal the occurrence of an event
 Allow two task to synchronize their activities

14.Define Mutex.

Mutex- Mutual exclusion.

It is the easiest way for tasks to communicate with each other is through shared
data structure. This process is especially easy when all tasks exist in a single address
space and can reference elements, such as global variables, pointers, linked lists and
ring buffer. The most common methods of obtaining exclusive access to shared
resources are,
 Disabling interrupts
 Performing test and set operations
 Disabling scheduling and
 Using semaphores
15.What is mean by priority inversion? (Nov/Dec-2013)

When tasks share a resource there is a possibility of getting into a problem,

known as priority inversion problem. Priority inversion problem arises when a high
priority task has to wait while a lower priority task execute. To overcome this
problem, priority inheritance protocol is used.
16.Define Deadlock. (Nov/Dec-2012)
It is a situation in which a task waiting for semaphore. The release of a semaphore
from a task and another different task waiting for another semaphore release to run.
None of these is proceed further.

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17.What are the advantages of building ISR queues?

 Multiple function pointers are queued by the ISRs and device driving ISRs.
 If the multiple sources are provided then at the time of return from a service,
the function called gets the function pointers from queue and then it executes
the pointed functions.

18.Justify the term “Cyclic scheduling”.

Cyclic scheduling means that the tasks from a list of ready tasks are scheduled in
sequence. Thus a task that is executed first now becomes a last priority task.
19.What is dynamic program scheduling?

The software design may be such that the priorities can be rescheduled and fixed
times redefined when a message or error message is received during the run.
20.List the ways in which an RTOS handles the ISR in a multitasking
environment?(au-2004)
 Cyclic cooperative scheduling
 Cooperative scheduling with precedence constraints
 Cyclic cooperative scheduling with time slicing
 Preemptive scheduling
 Fixed time scheduling etc.
21.When do you use OS_ENTER_CRITICAL () and OS_EXIT_CRITICAL
()?(au-2004)
OS_ENTER_CRITICAL ()- Macro to disable interrupts
OS_EXIT_CRITICAL ()- Macro to enable interrupts
22.What are the three common model strategies that a scheduler may adapt?
 Control flow strategy
 Data flow strategy
 Control –Data flow strategy
23.What are the advantages of C++?
 A class binds all the member function together for creating objects
 A class can derive from another class also
 Methods can have same name in the inherited class(method overloading)
 Method can have same name, same number and type of arguments in the
inherited class(method overloading)

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24.Define high level language.

Programming language in which it is easier to write codes than in the assembly

language and which also gives the important benefits of short development cycle for
a complex and portability to system hardware modification.
25.Write the objective of a kernel. (Nov/Dec-2013)

The objectives of a kernel are

 Creation of deletion
 Processing resource request
 Allocation and de allocation
 Scheduling process communication services
 Mechanism device management

26.What is mean by thread?

Thread is a concept in Java and UNIX and it is a light weight sub process or
process in an application program. It is controlled by the OS kernel. It has a process
structure, called thread stack, at the memory. It has a unique ID .It have states in the
system as follows: stating, running, blocked and finished.

27.How to assign the priority to a task? (Nov/Dec-2012)

Rate monotonic scheduling has been established to assign task priority based on
how often tasks executes. Simply put, tasks with the highest rate of execution are
given the highest priority RMS assumption:
 All tasks are periodic
 Task do not synchronize with one another, share resources or exchange data
 The CPU must always execute the highest priority task that is ready to run.

28.Mention the two operation of mutex? (Nov/Dec-2014)

 Lock
 Unlock

29.Why does a processor system always need an “interrupt Controller”?

In many embedded systems there are more external sources for interrupts than
interrupt pins on the processor. In this case, it is necessary to use an interrupt
controller to provide a larger number of interrupt signals.
An interrupt controller performs several functions.

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 It provides a large number of interrupt pins that can be allocated too many
external devices. Typically this is at least eight and higher numbers can be
supported by cascading two or more controllers together.
 It orders the interrupt pins in a priority level so that a high level interrupt will
inhibit a lower level interrupt.
 This may provide registers for each interrupt pin which contain the vector
number to be used during an acknowledge cycle.
 It allows the peripherals that do not have the ability to provide a vector to do
so.
 This can provide interrupt masking.

30.When do you use cooperative scheduling and when preemptive?

Cooperative scheduling: A waiting task lets another task run till it finishes
Preemptive scheduling: A scheduling algorithm in which a higher priority task is
forced (preempted) to block by the scheduler to let a higher priority task run

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UNIT IV
REAL TIME SYSTEMS
Syllabus:
Structure of a Real Time System –– Estimating program run times – Task
Assignment and Scheduling – Fault Tolerance Techniques – Reliability, Evaluation
– Clock Synchronization.

Two mark questions:

1. What is the usage of mailboxes and pipes in RTOS?

Mailboxes are software-engineering components used for inter process
communication, or for inter-thread communication within the same process. A
mailbox is a combination of a Semaphore and a message queue (or pipe).
Message queue is same as pipe with the only difference that pipe is byte oriented
while queue can be of any size.

2. What is meant by a pipe? How does a pipe differ from a queue?

In programming a "pipe" usually refers to a connection to a data source (a

database). The difference between a queue and a pipe is that a queue usually caches
some data from the data source while a pipe is just a connection to the data source.
3. Write the re-entrant function conditions. (Nov/Dec-2013)
 All the arguments pass the values and none of the argument is a pointer,
whenever a calling function calls that function.
 When an operation is not atomic that function should not operate on any
variable which is declared outside the function or which an interrupt
 Service routine uses or which is a global variable but passed by reference and
not passed by value as an argument in to the function.
 Reentrant function doesn’t call any other function that is not itself reentrant.

4. Why do you need a cross complier? (Nov/Dec-2012)

Two compliers are required. One compiler is for the host computer which does
the development and design and also the testing and debugging. The second
complier is cross a complier. The cross compiler runs on a host, but develops the
machine codes for a targeted system.

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5. What is meant by RTOS?

OS for soft or hard real time tasks with scheduling with real time constraints
(deadlines) using priority based scheduling, interrupt latency control,
synchronization of tasks with IPCs, and predictable timing and synchronization
behavior of the system.
Or
An RTOS is an OS for response time controlled and event controlled processes.
RTOS is an OS for embedded systems, as these have real time programming issues
to solve.
Or
Define RTOS. (Nov/Dec-2014)
A real-time operating system (RTOS) is an operating system that has been
developed for real-time applications. It is typically used for embedded applications,
such as mobile telephones, industrial robots, or scientific research equipment.

6. What is the advantage of reentrant functions in embedded systems

software?

The reentrant functions are used by several tasks at the same time, because its
parameters required from stack data structure.
7. When is an RTOS needed in embedded software?(au-2004)
 An RTOS is necessary when scheduling of multiple processor, ISR.
 An RTOS is must to monitor the processor that is response time controlled
and event controlled processors

8. Name the two important functions of RTOS.

 Inter Process Communication
 Multitasking

9. List out the task service functions.

 Unsigned byte OS Task create (void* task) (void *task pointer
),(void*pmdata, OS_STK*task stack poniter , unsigned byte task priority)- to
create a task

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 Unsigned byte OSTaskSuspend(unisigned byte task priority) –to

suspend(block) a task
 Unsigned byte OStaskResume (unsigned byte task priority) – to
resume(unblocking task)
 Void OSTimeset 9unsigned int counts)- to set a system clock
 Unsigned int OSTimeGet (void)- To Get a system clock

10.What are the strategies used by RTOS on interrupt source calls?

 Direct call to ISR by an Interrupting Source
 Direct call to RTOS by an Interrupting Source and Temporary Suspension of
a Scheduled Task
 Direct call to RTOS by an Interrupting Source and Scheduling of Tasks as
well as ISRs by the RTOS

11.List the function of a Kernel. What can be the functions outside the kernel?
 Process management
 Process creation to deletion
 Processing resource requests
 Scheduling
 IPC
 Memory management
 I/O management
 Device management

12.When do use cooperative scheduling and when pre-emptive?

Co-operative scheduling: A waiting task lets another task run till it finishes.
Pre-emptive scheduling: A scheduling algorithm in which a higher priority task
is forced (preempted) to block by the scheduler to let a higher priority task run.
13.What is meant by action plan? (Nov/Dec-2014)

A plan for action for the development process.

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14.What is a target system? How does this differ from the final embedded
system?

A system for the targeted embedded system that is used during development
phase and the final products of software and hardware are made from it.

15.Define emulator and ICE. (Nov/Dec-2013)

Emulator:
A circuit which emulates the target system
ICE:
An In Circuit Emulator for emulating the target system after connecting to
processor at one end and to PC at another end
16.Compare between the assembler and dissembler.

An assembler is a program that translates the assembly mnemonics into the binary
op-codes and instruction, i.e. into an executable file, called object file. It also creates
a list file that can be printed.
A dissembler translates the object codes into the mnemonics form of assembly
language. It helps in understanding previously made object codes.
17.What is meant by Human machine Interactions?

The Human-Machine Interface is quite literally where the human and the
machine meet. It is the area of the human and the area of the machine that interact
during a given task.

Interaction can include touch, sight, sound, heat transference or any other
physical or cognitive function.

18.Define ROM emulator. (Nov/Dec-2012)

A circuit that helps debugs a ROM chip by simulating the ROM with RAM. The
RAM circuit plugs into the ROM socket. Since RAM can be written over, whereas
ROM cannot, programming changes can be made easily.

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19.What is the use of a simulator in a development phase?

It is usable during the development phase for application software for the system
that is expected to employ a particular processor or processing device chip. The
simulator is essentially software to simulate all functions of an embedded system
circuit that includes any additional memory, peripherals devices and buses.
Simulator uses the cross complier, linker, and locator like the actual target system.
20.What are a complier, linker, loader and interpreter? (Nov/Dec-2014)

Compiler - Translates High level language (C, C++ etc.) and generates Object
code (machine readable but not directly executable)
Interpreter - Same as compiler but do that interactively (simply saying line by
line)
Linker - Connects the compiler generated object code with library code to
generated independent executable (like in C, you don’t write how printf() works,
linker add the code for printf() function in your program)
21.What are the various component of emulator? (Nov/Dec-2013)
 Interface circuit
 Socket
 External memory
 Emulator board display unit
 Twenty keys pad
 Registers
 Connectors

22. State the need for inter-process communication.

Inter-process communication (IPC) is a set of techniques for the exchange of data
among multiple threads in one or more processes. Processes may be running on one
or more Computers connected by a network. IPC techniques are divided into
methods for message passing, synchronization, shared memory, and remote
procedure calls (RPC). The method of IPC used may vary based on the bandwidth
and latency of communication between the Threads and the type of data being
communicated.

23.When is an RTOS necessary and when is it not necessary in the

embedded system?

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An RTOS may not be necessary in a small scale embedded system. An RTOS is

necessary when scheduling of multiple processor, ISR. An RTOS is must to monitor
the processor that is response time controlled and event controlled processors.

24. What are the functions of queues? (Nov/Dec-2013)

 Creating a queue for an IPC
 Waiting for an IPC message at a queue
 Emptying the queue and eliminating all
 Sending a message pointer to the queue
 Sending a message pointer and inserting it at the queue front
 Querying to find the message and error information for the queue ECB.

25.Define software interrupt.

An interrupt by an instruction, by a software timer or by an error condition trap

or illegal op-code.
26.Define transfer rate. (Nov/Dec-2012)

The bandwidth or maximum theoretical throughput of the front-side bus is

determined by the product of the width of its data path, its clock frequency (cycles
per second) and the number of data transfers it performs per clock cycle. For
example, a 64-bit (8-byte) wide FSB operating at a frequency of 100 MHz that
performs 4 transfers per cycle has a bandwidth of 3200 megabytes per second (MB/s)
27.List the best strategies for synchronization between the tasks and ISRs?
 Use appropriate precedence assignment strategy.
 The ISR coding should be like a reentrant function with no shared data
problem. The ISR should be short and execute the codes that should not wait
for actions by the RTOS and tasks.
 A task should not call another task as each task has to be under the RTOS
control. Such an attempt should generate an error.
 A task can get the message and send the messages using the RTOS calls only.
 Semaphores, queues, and messages should not be globally shared variables,
and each should be shared between a set of tasks only and encapsulated from
the rest.

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28.What is meant by watchdog timer? (Nov/Dec-2012)

Most embedded systems have no provision for resetting the processor. To

facilitate the processor resetting, a watchdog timer is used.
This timer is set to a large value and is counted down. When the value reaches
zero, the processor is reset. If everything is going fine and there is no need to reset
the processor, the processor resets the watchdog timer to a large value again.
This procedure takes care of undiscovered bugs in the software. The watchdog
Timer’s use is to support time outs in a program while keeping the program structure
simple.
29.What are the advantages of time slice scheduling by an RTOS?

Time slicing scheduling means that each task is allotted a time slice after which
it blocks and wait for its turn on the next cycle. Cyclic scheduling with time slicing
is simple and there is no insertion or deletion into the queue or list.
30.Write the condition for pre-emption events occur? (Nov/Dec-2014)
 Preemption event takes place when an interrupts occurs
 Preemption event takes when an RTCSWT(Real Time Clock driven Software
Timer ) interrupt occurs at the RTOS
 Preemption event takes place when any call to the RTOS occurs to enter the
critical section.

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UNIT V
PROCESSES AND OPERATING SYSTEMS
Syllabus:
Introduction – Multiple tasks and multiple processes – Multirate systems-
Preemptive real-time operating systems- Priority based scheduling- Inter-process
communication mechanisms – Evaluating operating system performance- power
optimization strategies for processes – Example Real time operating systems-
POSIX-Windows CE. - Distributed embedded systems – MPSoCs and shared
memory multiprocessors. – Design Example - Audio player, Engine control unit –
Video accelerator.

Two mark questions:

1. Illustrate the UML Collaboration diagram for the data compressor.

2. What are the additional behavior we provided for a fully functional system
data compressor? (Nov/Dec-2012)
For a fully functional system, we have to provide the following additional
behavior.
 We have to be able to provide the compressor with a new symbol table.
 We should be able to flush the symbol buffer to cause the system to release
all pending symbols that have been partially packed. We may want to do this
when we change the symbol table or in the middle of an encoding session to
keep a transmitter busy.

3. What are the three methods for table attributes in data compressor?
The class has three methods as follows:
 Encode performs the basic encoding function. It takes in a 1-byte input
symbol and returns two values: a Boolean showing whether it is returning a
full buffer and, if the Boolean is true, the full buffer itself.
 New-symbol-table installs a new symbol table into the object and throws away
the current contents of the internal buffer.

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 Flush returns the current state of the buffer, including the number of valid bits
in the buffer.

4. Draw the diagram for relationships between classes in the data compressor.
(Nov/Dec-2014)

5. State the requirements for alarm clock.

The time is shown as four digits in 12-h format; we use a light to distinguish
between AM and PM. We use several buttons to set the clock time and alarm time.
When we press the hour and minute buttons, we advance the hour and minute,
respectively, by one. When setting the time, we must hold down the set time button
while we hit the hour and minute buttons; the set alarm button works in a similar
fashion. We turn the alarm on and off with the alarm on and alarm off buttons. When
the alarm is activated, the alarm ready light is on. A separate speaker provides the
audible alarm.

6. Draw the class diagram for alarm clock. (Nov/Dec-2013)

7. Illustrate preprocessing button inputs for alarm clock.

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8. What are the three types of test has to be performed in Alarm clock?
Three types of tests can be performed. First, the clock’s accuracy can be checked
against a reference clock. Second, the commands can be exercised from the buttons.
Finally, the buzzer’s functionality should be verified.

9. State the theory of operations and basic functions of audio player.

Audio players are often called MP3 players after the popular audio data format.
The earliest portable MP3 players were based on compact disc mechanisms. Modern
MP3 players use either flash memory or disk drives to store music. An MP3 player
performs three basic functions: audio storage, audio decompression, and user
interface.

10.Define perceptual coding. (Nov/Dec-2012)

Audio compression is a lossy process that relies on perceptual coding. The coder
eliminates certain features of the audio stream so that the result can be encoded in
fewer bits. It tries to eliminate features that are not easily perceived by the human
audio system. Masking is one perceptual phenomenon that is exploited by perceptual
coding.

11.What are the three layers of audio compression standards?

 Layer 1: (MP1) uses a lossless compression of sub-bands and an optional,
simple masking model.
 Layer 2: (MP2) uses a more advanced masking model.
 Layer 3: (MP3) Performs additional processing to provide lower bit rates.

12.Figure out the MPEG Layer 1 encoder diagram. (Nov/Dec-2013)

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13.Figure out the MPEG Layer 1 encoder diagram.

14.Illustrate the MPEG Layer1 data frame format. (Nov/Dec-2012)

15.Draw the state diagram for audio playback.

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16. Draw the architecture of a cirrus audio processor for CD/MP3 player.

17. State the theory of operation and requirements for software modem.
The modem will use frequency-shift keying (FSK), a technique used in 1200-
baud modems. Keying alludes to Morse code—style keying. The FSK scheme
transmits sinusoidal tones, with 0 and 1 assigned to different frequencies. Sinusoidal
tones are much better suited to transmission over analog phone lines than are the
traditional high and low voltages of digital circuits. The 01 bit patterns create the
chirping sound characteristic of modems.

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18. Draw the frequency shift keying and FSK detection scheme in the Software
modem. (Nov/Dec-2014)
FSK: FSK detection scheme:

19.Draw the class diagram for the modem.

20. What is loop-back testing? (Nov/Dec-2013)

Single-unit testing, called loop-back testing in the telecommunications industry,
is simpler and a good first step. Loop-back can be performed in two ways. First, a
shared variable can be used to directly pass data from the transmitter to the receiver.
Second, an audio cable can be used to plug the analog output to the analog input. In
this case it is also possible to inject analog noise to test the resiliency of the detection
algorithm.

21.What are the steps performed by the modern digital camera?

Digital still cameras must perform many functions:
 It must determine the proper exposure for the photo.
 It must display a preview of the picture for framing.
 It must capture the image from the image sensor.

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 It must transform the image into usable form.

 It must convert the image into a usable format, such as JPEG, and store the
image in a file system.

22.What is Pixels, Luminance & Chrominance? (Nov/Dec-2012)

The image is divided into pixels; a pixels brightness is often referred to as its
luminance; a color pixels brightness in a particular color is known as chrominance.

23.Define histogram.
The histogram is composed by sorting the pixels into bins by luminance; 265 bins
is a common choice for the resolution of the histogram. The histogram gives us more
information than does a single average.

24.What are major approaches are used to determine focus in digital camera?
The three major approaches are used to determine focus that are,
 Active range finding
 Phase detection
 Contrast detection
25.What are the major types of image sensors used in modern camera?
The major types of image sensors used in the modern cameras are
 Charged coupled devices (CCDs)
 CMOS

26.Define Bayer pattern. (Nov/Dec-2013)

A Bayer filter mosaic is a color filter array (CFA) for arranging RGB color
filters on a square grid of photo sensors. Its particular arrangement of color filters is
used in most single-chip digital image sensors used in digital cameras, camcorders,
and scanners to create a color image. The filter pattern is 50% green, 25% red and
25% blue, hence is also called RGBG, GRGB, or RGGB.

27.What are the five major steps used for JPEG images in the compression
process?
 Color space conversion
 Color down sampling
 Block-based discrete cosine transform (DCT)
 Quantization
 Entropy coding

28.Draw the block diagram of ADPCM compression system.

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29. Define Block-motion estimation.

JPEG-style of compression alone does not reduce video bandwidth enough for
many applications.MPEG uses motion to encode one frame in terms of another.
Rather than send each frame separately, as in motion JPEG, some frames are sent as
modified forms of other frames using a technique known as block motion estimation.

30. Draw the block diagram for block-motion estimation. (Nov/Dec-2014)

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