0% found this document useful (0 votes)
33 views21 pages

Nexperia 74LVC2G02GF, 115 Datasheet

Nokia 74LVC2G02GF

Uploaded by

kareemhamed
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
33 views21 pages

Nexperia 74LVC2G02GF, 115 Datasheet

Nokia 74LVC2G02GF

Uploaded by

kareemhamed
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 21

74LVC2G02

Dual 2-input NOR gate


Rev. 12 — 12 December 2016 Product data sheet

1. General description
The 74LVC2G02 provides a 2-input NOR gate function.

Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these
devices as translators in a mixed 3.3 V and 5 V environment.

This device is fully specified for partial power-down applications using IOFF. The IOFF
circuitry disables the output, preventing a damaging backflow current through the device
when it is powered down.

2. Features and benefits


 Wide supply voltage range from 1.65 V to 5.5 V
 5 V tolerant outputs for interfacing with 5 V logic
 High noise immunity
 24 mA output drive (VCC = 3.0 V)
 CMOS low power consumption
 Complies with JEDEC standard:
 JESD8-7 (1.65 V to 1.95 V)
 JESD8-5 (2.3 V to 2.7 V)
 JESD8-B/JESD36 (2.7 V to 3.6 V)
 Latch-up performance exceeds 250 mA
 Direct interface with TTL levels
 Inputs accept voltages up to 5 V
 ESD protection:
 HBM JESD22-A114F exceeds 2000 V
 MM JESD22-A115-A exceeds 200 V
 Multiple package options
 Specified from 40 C to +85 C and 40 C to +125 C
Nexperia 74LVC2G02
Dual 2-input NOR gate

3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74LVC2G02DP 40 C to +125 C TSSOP8 plastic thin shrink small outline package; 8 leads; SOT505-2
body width 3 mm; lead length 0.5 mm
74LVC2G02DC 40 C to +125 C VSSOP8 plastic very thin shrink small outline package; 8 leads; SOT765-1
body width 2.3 mm
74LVC2G02GT 40 C to +125 C XSON8 plastic extremely thin small outline package; no leads; SOT833-1
8 terminals; body 1  1.95  0.5 mm
74LVC2G02GF 40 C to +125 C XSON8 extremely thin small outline package; no leads; SOT1089
8 terminals; body 1.35  1  0.5 mm
74LVC2G02GD 40 C to +125 C XSON8 plastic extremely thin small outline package; no leads; SOT996-2
8 terminals; body 3  2  0.5 mm
74LVC2G02GM 40 C to +125 C XQFN8 plastic, extremely thin quad flat package; no leads; SOT902-2
8 terminals; body 1.6  1.6  0.5 mm
74LVC2G02GN 40 C to +125 C XSON8 extremely thin small outline package; no leads; SOT1116
8 terminals; body 1.2  1.0  0.35 mm
74LVC2G02GS 40 C to +125 C XSON8 extremely thin small outline package; no leads; SOT1203
8 terminals; body 1.35  1.0  0.35 mm

4. Marking
Table 2. Marking codes
Type number Marking code[1]
74LVC2G02DP V02
74LVC2G02DC V02
74LVC2G02GT V02
74LVC2G02GF VB
74LVC2G02GD V02
74LVC2G02GM V02
74LVC2G02GN VB
74LVC2G02GS VB

[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.

74LVC2G02 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved

Product data sheet Rev. 12 — 12 December 2016 2 of 21


Nexperia 74LVC2G02
Dual 2-input NOR gate

5. Functional diagram

$
<
%
%
$ 
< <
%
$
DDK DDK PQD

Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram (one gate)

6. Pinning information

6.1 Pinning

/9&*

$   9&&

%   <
/9&*

$   9&& <   %

%   <
<   % *1'   $
*1'   $
DDE

DDE 7UDQVSDUHQWWRSYLHZ

Fig 4. Pin configuration SOT505-2 and SOT765-1 Fig 5. Pin configuration SOT833-1, SOT1089,
SOT1116 and SOT1203

74LVC2G02 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved

Product data sheet Rev. 12 — 12 December 2016 3 of 21


Nexperia 74LVC2G02
Dual 2-input NOR gate

/9&*
WHUPLQDO

9&&
LQGH[DUHD


<   $
/9&*

$   9&&
%   %
%   <

<   % $   <


*1'   $

*1'
DDH
DDL

7UDQVSDUHQWWRSYLHZ 7UDQVSDUHQWWRSYLHZ

Fig 6. Pin configuration SOT996-2 Fig 7. Pin configuration SOT902-2

6.2 Pin description


Table 3. Pin description
Symbol Pin Description
SOT505-2, SOT765-1, SOT833-1, SOT1089, SOT902-2
SOT996-2, SOT1116 and SOT1203
1A, 2A 1, 5 7, 3 data input
1B, 2B 2, 6 6, 2 data input
GND 4 4 ground (0 V)
1Y, 2Y 7, 3 1, 5 data output
VCC 8 8 supply voltage

7. Functional description
Table 4. Function table[1]
Input Output
nA nB nY
L L H
X H L
H X L

[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care.

74LVC2G02 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved

Product data sheet Rev. 12 — 12 December 2016 4 of 21


Nexperia 74LVC2G02
Dual 2-input NOR gate

8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 0.5 +6.5 V
VI input voltage [1] 0.5 +6.5 V
VO output voltage Active mode [1] 0.5 VCC + 0.5 V
Power-down mode [1][2] 0.5 +6.5 V
IIK input clamping current VI < 0 V 50 - mA
IOK output clamping current VO < 0 V or VO > VCC - 50 mA
IO output current VO = 0 V to VCC - 50 mA
ICC supply current - 100 mA
IGND ground current 100 - mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation Tamb = 40 C to +125 C [3] - 300 mW

[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal condition.
[3] For TSSOP8 package: above 55 C the value of Ptot derates linearly with 2.5 mW/K.
For VSSOP8 package: above 110 C the value of Ptot derates linearly with 8 mW/K.
For XSON8 and XQFN8 packages: above 118 C the value of Ptot derates linearly with 7.8 mW/K.

9. Recommended operating conditions


Table 6. Operating conditions
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 1.65 5.5 V
VI input voltage 0 5.5 V
VO output voltage Active mode 0 VCC V
Power-down mode 0 5.5 V
Tamb ambient temperature 40 +125 C
t/V input transition rise and fall rate VCC = 1.65 V to 2.7 V - 20 ns/V
VCC = 2.7 V to 5.5 V - 10 ns/V

74LVC2G02 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved

Product data sheet Rev. 12 — 12 December 2016 5 of 21


Nexperia 74LVC2G02
Dual 2-input NOR gate

10. Static characteristics


Table 7. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ[1] Max Unit
Tamb = 40 C to +85 C
VIH HIGH-level input voltage VCC = 1.65 V to 1.95 V 0.65  VCC - - V
VCC = 2.3 V to 2.7 V 1.7 - - V
VCC = 2.7 V to 3.6 V 2.0 - - V
VCC = 4.5 V to 5.5 V 0.7  VCC - - V
VIL LOW-level input voltage VCC = 1.65 V to 1.95 V - - 0.35  VCC V
VCC = 2.3 V to 2.7 V - - 0.7 V
VCC = 2.7 V to 3.6 V - - 0.8 V
VCC = 4.5 V to 5.5 V - - 0.3  VCC V
VOH HIGH-level output voltage VI = VIH or VIL
IO = 100 A; VCC = 1.65 V to 5.5 V VCC  0.1 - - V
IO = 4 mA; VCC = 1.65 V 1.2 1.53 - V
IO = 8 mA; VCC = 2.3 V 1.9 2.13 - V
IO = 12 mA; VCC = 2.7 V 2.2 2.50 - V
IO = 24 mA; VCC = 3.0 V 2.3 2.60 - V
IO = 32 mA; VCC = 4.5 V 3.8 4.10 - V
VOL LOW-level output voltage VI = VIH or VIL
IO = 100 A; VCC = 1.65 V to 5.5 V - - 0.1 V
IO = 4 mA; VCC = 1.65 V - 0.08 0.45 V
IO = 8 mA; VCC = 2.3 V - 0.14 0.3 V
IO = 12 mA; VCC = 2.7 V - 0.19 0.4 V
IO = 24 mA; VCC = 3.0 V - 0.37 0.55 V
IO = 32 mA; VCC = 4.5 V - 0.43 0.55 V
II input leakage current VI = 5.5 V or GND; VCC = 0 V to 5.5 V - 0.1 1 A
IOFF power-off leakage current VI or VO = 5.5 V; VCC = 0 V - 0.1 2 A
ICC supply current VI = 5.5 V or GND; - 0.1 4 A
VCC = 1.65 V to 5.5 V; IO = 0 A
ICC additional supply current per pin; VI = VCC  0.6 V; IO = 0 A; - 5 500 A
VCC = 2.3 V to 5.5 V
CI input capacitance - 2.5 - pF

74LVC2G02 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved

Product data sheet Rev. 12 — 12 December 2016 6 of 21


Nexperia 74LVC2G02
Dual 2-input NOR gate

Table 7. Static characteristics …continued


At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ[1] Max Unit
Tamb = 40 C to +125 C
VIH HIGH-level input voltage VCC = 1.65 V to 1.95 V 0.65  VCC - - V
VCC = 2.3 V to 2.7 V 1.7 - - V
VCC = 2.7 V to 3.6 V 2.0 - - V
VCC = 4.5 V to 5.5 V 0.7  VCC - - V
VIL LOW-level input voltage VCC = 1.65 V to 1.95 V - - 0.35  VCC V
VCC = 2.3 V to 2.7 V - - 0.7 V
VCC = 2.7 V to 3.6 V - - 0.8 V
VCC = 4.5 V to 5.5 V - - 0.3  VCC V
VOH HIGH-level output voltage VI = VIH or VIL
IO = 100 A; VCC = 1.65 V to 5.5 V VCC  0.1 - - V
IO = 4 mA; VCC = 1.65 V 0.95 - - V
IO = 8 mA; VCC = 2.3 V 1.7 - - V
IO = 12 mA; VCC = 2.7 V 1.9 - - V
IO = 24 mA; VCC = 3.0 V 2.0 - - V
IO = 32 mA; VCC = 4.5 V 3.4 - - V
VOL LOW-level output voltage VI = VIH or VIL
IO = 100 A; VCC = 1.65 V to 5.5 V - - 0.1 V
IO = 4 mA; VCC = 1.65 V - - 0.70 V
IO = 8 mA; VCC = 2.3 V - - 0.45 V
IO = 12 mA; VCC = 2.7 V - - 0.60 V
IO = 24 mA; VCC = 3.0 V - - 0.80 V
IO = 32 mA; VCC = 4.5 V - - 0.80 V
II input leakage current VI = 5.5 V or GND; VCC = 0 V to 5.5 V - - 1 A
IOFF power-off leakage current VI or VO = 5.5 V; VCC = 0 V - - 2 A
ICC supply current VI = 5.5 V or GND; - - 4 A
VCC = 1.65 V to 5.5 V; IO = 0 A
ICC additional supply current per pin; VI = VCC  0.6 V; IO = 0 A; - - 500 A
VCC = 2.3 V to 5.5 V

[1] All typical values are measured at Tamb = 25 C.

74LVC2G02 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved

Product data sheet Rev. 12 — 12 December 2016 7 of 21


Nexperia 74LVC2G02
Dual 2-input NOR gate

11. Dynamic characteristics


Table 8. Dynamic characteristics
Voltages are referenced to GND (ground 0 V); for test circuit see Figure 9.
Symbol Parameter Conditions 40 C to +85 C 40 C to +125 C Unit
Min Typ[1] Max Min Max
tpd propagation delay nA, nB to nY; see Figure 8 [2]

VCC = 1.65 V to 1.95 V 1.2 3.8 8.9 1.2 11.2 ns


VCC = 2.3 V to 2.7 V 0.8 2.4 5.4 0.8 6.8 ns
VCC = 2.7 V 0.8 3.2 6.0 0.8 7.5 ns
VCC = 3.0 V to 3.6 V 0.6 2.4 4.9 0.6 6.2 ns
VCC = 4.5 V to 5.5 V 0.6 1.8 4.3 0.6 5.5 ns
CPD power dissipation per gate; VI = GND to VCC [3] - 14 - - - pF
capacitance

[1] Typical values are measured at nominal VCC and at Tamb = 25 C.
[2] tpd is the same as tPLH and tPHL.
[3] CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD  VCC2  fi  N + (CL  VCC2  fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL  VCC2  fo) = sum of outputs.

12. Waveforms

9,

Q$Q%LQSXW 90

*1'
W 3+/ W 3/+
92+

Q<RXWSXW 90

92/ DDH

Measurement points are given in Table 9.


VOL and VOH are typical output voltage levels that occur with the output load.
Fig 8. Input (nA, nB) to output (nY) propagation delays

74LVC2G02 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved

Product data sheet Rev. 12 — 12 December 2016 8 of 21


Nexperia 74LVC2G02
Dual 2-input NOR gate

Table 9. Measurement points


Supply voltage Input Output
VCC VM VM
1.65 V to 1.95 V 0.5  VCC 0.5  VCC
2.3 V to 2.7 V 0.5  VCC 0.5  VCC
2.7 V 1.5 V 1.5 V
3.0 V to 3.6 V 1.5 V 1.5 V
4.5 V to 5.5 V 0.5  VCC 0.5  VCC

W:
9,

QHJDWLYH
SXOVH 90 90

9
WI WU

WU WI
9,

SRVLWLYH
SXOVH 90 90

9
W:

9(;7
9&&
5/
9, 92
38/6(
'87
*(1(5$725
57 &/ 5/

DDH

Test data is given in Table 10.


Definitions for test circuit:
RL = Load resistor.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
VEXT = Test voltage for switching times.
Fig 9. Test circuit for measuring switching times

Table 10. Test data


Supply voltage Input Load VEXT
VCC VI tr, tf CL RL tPLH, tPHL
1.65 V to 1.95 V VCC  2.0 ns 30 pF 1 k open
2.3 V to 2.7 V VCC  2.0 ns 30 pF 500  open
2.7 V 2.7 V  2.5 ns 50 pF 500  open
3.0 V to 3.6 V 2.7 V  2.5 ns 50 pF 500  open
4.5 V to 5.5 V VCC  2.5 ns 50 pF 500  open

74LVC2G02 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved

Product data sheet Rev. 12 — 12 December 2016 9 of 21


Nexperia 74LVC2G02
Dual 2-input NOR gate

13. Package outline

76623SODVWLFWKLQVKULQNVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPPOHDGOHQJWKPP 627

' ( $
;

F

\ +( Y 0 $

=

 

$
$ $ 
$
SLQLQGH[

ș
/S

/

  GHWDLO;

H Z 0
ES

  PP
VFDOH

',0(16,216 PPDUHWKHRULJLQDOGLPHQVLRQV 
$ '  
81,7 $ $ $ ES F (   H +( / /S Y Z \ =   ș
PD[
         ƒ
PP       
         ƒ

1RWH
3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG

287/,1( 5()(5(1&(6 (8523($1


,668('$7(
9(56,21 ,(& -('(& -(,7$ 352-(&7,21

627 
 

Fig 10. Package outline SOT505-2 (TSSOP8)

74LVC2G02 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved

Product data sheet Rev. 12 — 12 December 2016 10 of 21


Nexperia 74LVC2G02
Dual 2-input NOR gate

96623SODVWLFYHU\WKLQVKULQNVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP 627

' ( $
;

\ +( Y $

 

$
$
$ $
SLQLQGH[

ș
/S

  GHWDLO; /

H Z
ES

 PP
VFDOH

'LPHQVLRQV PPDUHWKHRULJLQDOGLPHQVLRQV
$
8QLW $ $ $ ES F '  (  H +( / /S 4 Y Z \ =  ș
PD[
PD[           ƒ
PP QRP       
PLQ           ƒ
1RWH
3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG
3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG VRWBSR

2XWOLQH 5HIHUHQFHV (XURSHDQ


,VVXHGDWH
YHUVLRQ ,(& -('(& -(,7$ SURMHFWLRQ

627 02 

Fig 11. Package outline SOT765-1 (VSSOP8)

74LVC2G02 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved

Product data sheet Rev. 12 — 12 December 2016 11 of 21


Nexperia 74LVC2G02
Dual 2-input NOR gate

;621SODVWLFH[WUHPHO\WKLQVPDOORXWOLQHSDFNDJHQROHDGVWHUPLQDOVERG\[[PP 627

E
   

î
/ 
/

   
H H H

î $


$

'

WHUPLQDO
LQGH[DUHD

  PP
VFDOH
',0(16,216 PPDUHWKHRULJLQDOGLPHQVLRQV

81,7 $   $ E ' ( H H / /


PD[ PD[
    
PP    
    
1RWHV
,QFOXGLQJSODWLQJWKLFNQHVV
&DQEHYLVLEOHLQVRPHPDQXIDFWXULQJSURFHVVHV

287/,1( 5()(5(1&(6 (8523($1


,668('$7(
9(56,21 ,(& -('(& -(,7$ 352-(&7,21


627  02 


Fig 12. Package outline SOT833-1 (XSON8)

74LVC2G02 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved

Product data sheet Rev. 12 — 12 December 2016 12 of 21


Nexperia 74LVC2G02
Dual 2-input NOR gate

;621H[WUHPHO\WKLQVPDOORXWOLQHSDFNDJHQROHDGV
WHUPLQDOVERG\[[PP 627

WHUPLQDO
LQGH[DUHD

' $
$

GHWDLO;

î 
H

/
î 

E  

H

 

WHUPLQDO
LQGH[DUHD / ;
  PP

'LPHQVLRQV VFDOH

8QLW $  $ E ' ( H H / /

PD[       


PP QRP       
PLQ     
1RWH
,QFOXGLQJSODWLQJWKLFNQHVV
9LVLEOHGHSHQGLQJXSRQXVHGPDQXIDFWXULQJWHFKQRORJ\ VRWBSR

2XWOLQH 5HIHUHQFHV (XURSHDQ


,VVXHGDWH
YHUVLRQ ,(& -('(& -(,7$ SURMHFWLRQ

627  02 


Fig 13. Package outline SOT1089 (XSON8)

74LVC2G02 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved

Product data sheet Rev. 12 — 12 December 2016 13 of 21


Nexperia 74LVC2G02
Dual 2-input NOR gate

;621SODVWLFH[WUHPHO\WKLQVPDOORXWOLQHSDFNDJHQROHDGV
WHUPLQDOVERG\[[PP 627

' % $

( $ $

GHWDLO;

WHUPLQDO
LQGH[DUHD

H
&
Y & $ %
/ H E
Z & \ & \
 

/

 
;

  PP
VFDOH

'LPHQVLRQV PPDUHWKHRULJLQDOGLPHQVLRQV

8QLW  $ $ E ' ( H H / / / Y Z \ \

PD[       


PP QRP       
PLQ       
VRWBSR

2XWOLQH 5HIHUHQFHV (XURSHDQ


,VVXHGDWH
YHUVLRQ ,(& -('(& -(,7$ SURMHFWLRQ

627


Fig 14. Package outline SOT996-2 (XSON8)

74LVC2G02 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved

Product data sheet Rev. 12 — 12 December 2016 14 of 21


Nexperia 74LVC2G02
Dual 2-input NOR gate

;4)1SODVWLFH[WUHPHO\WKLQTXDGIODWSDFNDJHQROHDGV
WHUPLQDOVERG\[[PP 627

' % $

WHUPLQDO
LQGH[DUHD

( $

$

GHWDLO;

H
&
Y & $ %
E
Z & \ & \


 
H
WHUPLQDO
LQGH[DUHD  

/  


PHWDODUHD
/ QRWIRUVROGHULQJ
/ N /

/
  PP

'LPHQVLRQV VFDOH

8QLW  $ $ E ' ( H H N / / / / Y Z \ \

PD[         
PP QRP             
PLQ         
1RWH
3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG VRWBSR

2XWOLQH 5HIHUHQFHV (XURSHDQ


,VVXHGDWH
YHUVLRQ ,(& -('(& -(,7$ SURMHFWLRQ

627  02 


Fig 15. Package outline SOT902-2 (XQFN8)

74LVC2G02 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved

Product data sheet Rev. 12 — 12 December 2016 15 of 21


Nexperia 74LVC2G02
Dual 2-input NOR gate

;621H[WUHPHO\WKLQVPDOORXWOLQHSDFNDJHQROHDGV
WHUPLQDOVERG\[[PP 627

E
    î 

/ /

   

H H H

î 
$ $

'

WHUPLQDO
LQGH[DUHD

  PP

'LPHQVLRQV VFDOH

8QLW $  $ E ' ( H H / /

PD[       


PP QRP       
PLQ     
1RWH
,QFOXGLQJSODWLQJWKLFNQHVV
9LVLEOHGHSHQGLQJXSRQXVHGPDQXIDFWXULQJWHFKQRORJ\ VRWBSR

2XWOLQH 5HIHUHQFHV (XURSHDQ


,VVXHGDWH
YHUVLRQ ,(& -('(& -(,7$ SURMHFWLRQ

627   


Fig 16. Package outline SOT1116 (XSON8)

74LVC2G02 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved

Product data sheet Rev. 12 — 12 December 2016 16 of 21


Nexperia 74LVC2G02
Dual 2-input NOR gate

;621H[WUHPHO\WKLQVPDOORXWOLQHSDFNDJHQROHDGV
WHUPLQDOVERG\[[PP 627

E
    î 

/ /

   
H H H

î 
$ $

'

WHUPLQDO
LQGH[DUHD

  PP

'LPHQVLRQV VFDOH

8QLW $  $ E ' ( H H / /

PD[       


PP QRP       
PLQ     
1RWH
,QFOXGLQJSODWLQJWKLFNQHVV
9LVLEOHGHSHQGLQJXSRQXVHGPDQXIDFWXULQJWHFKQRORJ\ VRWBSR

2XWOLQH 5HIHUHQFHV (XURSHDQ


,VVXHGDWH
YHUVLRQ ,(& -('(& -(,7$ SURMHFWLRQ

627   


Fig 17. Package outline SOT1203 (XSON8)

74LVC2G02 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved

Product data sheet Rev. 12 — 12 December 2016 17 of 21


Nexperia 74LVC2G02
Dual 2-input NOR gate

14. Abbreviations
Table 11. Abbreviations
Acronym Description
CMOS Complementary Metal-Oxide Semiconductor
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
TTL Transistor-Transistor Logic

15. Revision history


Table 12. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74LVC2G02 v.12 20161212 Product data sheet - 74LVC2G02 v.11
Modifications: • Table 7: The maximum limits for leakage current and supply current have changed.
74LVC2G02 v.11 20130408 Product data sheet - 74LVC2G02 v.10
Modifications: • For type number 74LVC2G02GD XSON8U has changed to XSON8.
74LVC2G02 v.10 20120622 Product data sheet - 74LVC2G02 v.9
Modifications: • For type number 74LVC2G02GM the SOT code has changed to SOT902-2.
74LVC2G02 v.9 20111130 Product data sheet - 74LVC2G02 v.8
Modifications: • Legal pages updated.
74LVC2G02 v.8 20101020 Product data sheet - 74LVC2G02 v.7
74LVC2G02 v.7 20080606 Product data sheet - 74LVC2G02 v.6
74LVC2G02 v.6 20080222 Product data sheet - 74LVC2G02 v.5
74LVC2G02 v.5 20070904 Product data sheet - 74LVC2G02 v.4
74LVC2G02 v.4 20060515 Product data sheet - 74LVC2G02 v.3
74LVC2G02 v.3 20050201 Product specification - 74LVC2G02 v.2
74LVC2G02 v.2 20040915 Product specification - 74LVC2G02 v.1
74LVC2G02 v.1 20031015 Product specification - -

74LVC2G02 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved

Product data sheet Rev. 12 — 12 December 2016 18 of 21


Nexperia 74LVC2G02
Dual 2-input NOR gate

16. Legal information

16.1 Data sheet status


Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.

[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nexperia.com.

16.2 Definitions Suitability for use — Nexperia products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
Draft — The document is a draft version only. The content is still under
malfunction of a Nexperia product can reasonably be expected
internal review and subject to formal approval, which may result in
to result in personal injury, death or severe property or environmental
modifications or additions. Nexperia does not give any
damage. Nexperia and its suppliers accept no liability for
representations or warranties as to the accuracy or completeness of
inclusion and/or use of Nexperia products in such equipment or
information included herein and shall have no liability for the consequences of
applications and therefore such inclusion and/or use is at the customer’s own
use of such information.
risk.
Short data sheet — A short data sheet is an extract from a full data sheet
Applications — Applications that are described herein for any of these
with the same product type number(s) and title. A short data sheet is intended
products are for illustrative purposes only. Nexperia makes no
for quick reference only and should not be relied upon to contain detailed and
representation or warranty that such applications will be suitable for the
full information. For detailed and full information see the relevant full data
specified use without further testing or modification.
sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the Customers are responsible for the design and operation of their applications
full data sheet shall prevail. and products using Nexperia products, and Nexperia
accepts no liability for any assistance with applications or customer product
Product specification — The information and data provided in a Product design. It is customer’s sole responsibility to determine whether the Nexperia
data sheet shall define the specification of the product as agreed between product is suitable and fit for the customer’s applications and
Nexperia and its customer, unless Nexperia and products planned, as well as for the planned application and use of
customer have explicitly agreed otherwise in writing. In no event however, customer’s third party customer(s). Customers should provide appropriate
shall an agreement be valid in which the Nexperia product is design and operating safeguards to minimize the risks associated with their
deemed to offer functions and qualities beyond those described in the applications and products.
Product data sheet.
Nexperia does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
16.3 Disclaimers customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using Nexperia
Limited warranty and liability — Information in this document is believed to
products in order to avoid a default of the applications and
be accurate and reliable. However, Nexperia does not give any
the products or of the application or use by customer’s third party
representations or warranties, expressed or implied, as to the accuracy or
customer(s). Nexperia does not accept any liability in this respect.
completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no Limiting values — Stress above one or more limiting values (as defined in
responsibility for the content in this document if provided by an information the Absolute Maximum Ratings System of IEC 60134) will cause permanent
source outside of Nexperia. damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
In no event shall Nexperia be liable for any indirect, incidental,
the Recommended operating conditions section (if present) or the
punitive, special or consequential damages (including - without limitation - lost
Characteristics sections of this document is not warranted. Constant or
profits, lost savings, business interruption, costs related to the removal or
repeated exposure to limiting values will permanently and irreversibly affect
replacement of any products or rework charges) whether or not such
the quality and reliability of the device.
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory. Terms and conditions of commercial sale — Nexperia
Notwithstanding any damages that customer might incur for any reason products are sold subject to the general terms and conditions of commercial
whatsoever, Nexperia’s aggregate and cumulative liability towards sale, as published at http://www.nexperia.com/profile/terms, unless otherwise
customer for the products described herein shall be limited in accordance agreed in a valid written individual agreement. In case an individual
with the Terms and conditions of commercial sale of Nexperia. agreement is concluded only the terms and conditions of the respective
agreement shall apply. Nexperia hereby expressly objects to
Right to make changes — Nexperia reserves the right to make applying the customer’s general terms and conditions with regard to the
changes to information published in this document, including without purchase of Nexperia products by customer.
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior No offer to sell or license — Nothing in this document may be interpreted or
to the publication hereof. construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.

74LVC2G02 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved

Product data sheet Rev. 12 — 12 December 2016 19 of 21


Nexperia 74LVC2G02
Dual 2-input NOR gate

Export control — This document as well as the item(s) described herein Nexperia’s specifications such use shall be solely at customer’s
may be subject to export control regulations. Export might require a prior own risk, and (c) customer fully indemnifies Nexperia for any
authorization from competent authorities. liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond Nexperia’s
Non-automotive qualified products — Unless this data sheet expressly
standard warranty and Nexperia’s product specifications.
states that this specific Nexperia product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested Translations — A non-English (translated) version of a document is for
in accordance with automotive testing or application requirements. Nexperia reference only. The English version shall prevail in case of any discrepancy
accepts no liability for inclusion and/or use of between the translated and English versions.
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer 16.4 Trademarks
(a) shall use the product without Nexperia’s warranty of the
Notice: All referenced brands, product names, service names and trademarks
product for such automotive applications, use and specifications, and (b)
are the property of their respective owners.
whenever customer uses the product for automotive applications beyond

17. Contact information


For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com

74LVC2G02 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved

Product data sheet Rev. 12 — 12 December 2016 20 of 21


Nexperia 74LVC2G02
Dual 2-input NOR gate

18. Contents
1 General description . . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2
4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3
6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3
6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
7 Functional description . . . . . . . . . . . . . . . . . . . 4
8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5
9 Recommended operating conditions. . . . . . . . 5
10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6
11 Dynamic characteristics . . . . . . . . . . . . . . . . . . 8
12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10
14 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 18
15 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 18
16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 19
16.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 19
16.2 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
16.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
16.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 20
17 Contact information. . . . . . . . . . . . . . . . . . . . . 20
18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

© Nexperia B.V. 2017. All rights reserved


For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 12 December 2016

You might also like

pFad - Phonifier reborn

Pfad - The Proxy pFad of © 2024 Garber Painting. All rights reserved.

Note: This service is not intended for secure transactions such as banking, social media, email, or purchasing. Use at your own risk. We assume no liability whatsoever for broken pages.


Alternative Proxies:

Alternative Proxy

pFad Proxy

pFad v3 Proxy

pFad v4 Proxy