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Exp 1 Induction To 8085 Micro P

The document describes the architecture of the 8085 microprocessor, including its general purpose registers, accumulator, program counter, stack pointer, arithmetic logic unit, flags, timing and control unit, and instruction register and decoder. It also describes the pin descriptions and specifications of the 8085 microprocessor trainer kit, including the memory configuration, I/O components, and integrated circuits used. The document concludes with steps for entering a program into the trainer kit and executing the program.

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0% found this document useful (0 votes)
96 views10 pages

Exp 1 Induction To 8085 Micro P

The document describes the architecture of the 8085 microprocessor, including its general purpose registers, accumulator, program counter, stack pointer, arithmetic logic unit, flags, timing and control unit, and instruction register and decoder. It also describes the pin descriptions and specifications of the 8085 microprocessor trainer kit, including the memory configuration, I/O components, and integrated circuits used. The document concludes with steps for entering a program into the trainer kit and executing the program.

Uploaded by

hardik Chandera
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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EXPERIMENT NO.

INTRODUCTION TO MICROPROCESSOR 8085

Aim
To study the microprocessor 8085

Architecture of 8085 Microprocessor

a) General purpose register


It is an 8 bit register i.e. B,C,D,E,H,L. The combination of 8 bit register is
known as register pair, which can hold 16 bit data. The HL pair is used to act as
memory pointer is accessible to program.

b) Accumulator
It is an 8 bit register which hold one of the data to be processed by ALU and
stored the result of the operation.

c) Program counter (PC)


It is a 16 bit pointer which maintain the address of a byte entered to line stack.

d) Stack pointer (Sp)


It is a 16 bit special purpose register which is used to hold line memory address
for line next instruction to be executed.

e) Arithmetic and logical unit


It carries out arithmetic and logical operation by 8 bit address it uses the
accumulator content as input the ALU result is stored back into accumulator.

f) Temporary register
It is an 8 bit register associated with ALU hold data, entering an operation, used
by the microprocessor and not accessible to programs.

g) Flags

Flag register is a group of fire, individual flip flops line content of line flag
register will change after execution of arithmetic and logic operation. The line
states flags are
i) Carry flag (C)
ii) Parity flag (P)
iii) Zero flag (Z)
iv) Auxiliary carry flag (AC)
v) Sign flag (S)

h) Timing and control unit

Synchronous all microprocessor, operation with the clock and generator and
control signal from it necessary to communicate between controller and
peripherals.
i) Instruction register and decoder
Instruction is fetched from line memory and stored in line instruction register
decoder the stored information.

j) Register Array

These are used to store 8 bit data during execution of some instruction.
PIN Description

Address Bus
1. The pins Ao – A15 denote the address bus.
2. They are used for most significant bit

Address / Data Bus


1. AD0 – AD7 constitutes the address / Data bus
2. These pins are used for least significant bit

ALE : (Address Latch Enable)


1. The signal goes high during the first clock cycle and enables the lower order
address bits.

IO / M
1. This distinguishes whether the address is for memory or input.
2. When this pins go high, the address is for an I/O device.

S0 – S1
S0 and S1 are status signal which provides different status and functions.

RD
1. This is an active low signal
2. This signal is used to control READ operation of the microprocessor.

WR
1. WR is also an active low signal
2. Controls the write operation of the microprocessor.

HOLD
1. This indicates if any other device is requesting the use of address and data
bus.

HLDA
1. HLDA is the acknowledgement signal for HOLD
2. It indicates whether the hold signal is received or not.

INTR
1. INTE is an interrupt request signal
2. IT can be enabled or disabled by using software
INTA
1. Whenever the microprocessor receives interrupt signal
2. It has to be acknowledged.

RST 5.5, 6.5, 7.5


1. These are nothing but the restart interrupts
2. They insert an internal restart junction automatically.
TRAP 1. Trap is the only non-maskable interrupt
2. It cannot be enabled (or) disabled using program.

RESET IN
1. This pin resets the program counter to 0 to 1 and results interrupt enable and
HLDA flip flops.

X1, X2
These are the terminals which are connected to external oscillator to produce the
necessary and suitable clock operation.

SID
This pin provides serial input data

SOD
This pin provides serial output data

VCC and VSS


1. VCC is +5V supply pin
2. VSS is ground pin

Specifications

1. Processors
Intel 8085 at E144 MHz clock

2. Memory
Monitor RAM: 0000 – IFFF
EPROM Expansion: 2000 – 3FFF’s
0000 – FFF
System RAM: 4000 – 5FFF
Monitor data area 4100 – 5FFF
RAM Expansion 6000 – BFFF

3. Input / Output
Parallel: A8 TTL input timer with 2 number of 32-55 only input timer available
in -85 EBI.
Serial: Only one number RS 232-C, Compatible, crucial interface using 8281A
Timer: 3 channel -16 bit programmable units, using 8253 channel ‘0’ used for
no band late. Clock generator. Channel ‘1’ is used for single stopping used
program.
Display: 6 digit – 7 segment LED display with filter 4 digit for adder display
and 2 digit for data display.
Key board: 21 keys, soft keyboard including common keys and hexa decimal
keys.
RES: Reset keys allow to terminate any present activity and retain to  - 85 its
on initialize state.
INT: Maskable interrupt connect to CPU’s RST 7.5 interrupt
DEC: Decrement the adder by 1
EXEC: Execute line particular value after selecting address through go
command.
NEXT: Increment the address by 1 and then display its content.
IC’s Used
8085 - 8 bit p
8253 - programmable internal timer
8255 - programmable peripheral interface
8279 - programmable key boards / display interface
8251 - programmable communication interface
2764 - 8 KV VV EPROM
6264 - 8K STATIC PROM
7414 - Hex inverter
7432 - Quad 21/p OR GATE
7409 - Quad 21/p AND GATE
7400 - NAND Gate
7404 - Dual D-FF
74373 - Octal ‘D’ Latch
74139 - Dual 2 to 4 line decoder
74138 - 3 to 8 line decoder
In Enter Program into Trainer Kit
1. Press ‘RESET’ key
2. Sub (key processor represent address field)
3. Enter the address (16 bit) and digit in hex
4. Press ‘NEXT’ key
5. Enter the data
6. Again press “NEXT”
7. Again after taking the program, are use HLT instruction its Hex code
8. Press “NEXT”

How to executive program


1. Press “RESET”
2. Press “GO”
3. Enter the address location in which line program was executed
4. Press “Execute” key

Result:
Thus 8085 microprocessor was studied successfully.

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