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U2 Lmh5401Irmsr: Title: Digvga-Schematic

1. The document describes a circuit board layout with mounting holes, fixed gain and variable gain amplifiers, and various passive components like capacitors and resistors. 2. It includes an LMH5401 fixed gain amplifier with a maximum current of 70mA and an LMH6401 digitally controlled variable gain amplifier with a maximum current of 100mA. 3. The layout also shows coaxial cable connections, ground connections, and resistors and capacitors used for feedback networks and power/ground filtering on the different amplifiers.

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212 views1 page

U2 Lmh5401Irmsr: Title: Digvga-Schematic

1. The document describes a circuit board layout with mounting holes, fixed gain and variable gain amplifiers, and various passive components like capacitors and resistors. 2. It includes an LMH5401 fixed gain amplifier with a maximum current of 70mA and an LMH6401 digitally controlled variable gain amplifier with a maximum current of 100mA. 3. The layout also shows coaxial cable connections, ground connections, and resistors and capacitors used for feedback networks and power/ground filtering on the different amplifiers.

Uploaded by

H SM
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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1 2 3 4 5 6 7 8 9 10

FB4
330 Ohm @100MHz

Vcc
FB2
330 Ohm @100MHz C27
0,1u
Vcc
A H1 H3 A
C21 Vcc_emfil2 GND
MountingHole MountingHole
LMH5401 - FDA fixed GAIN 4 V/V 0,1u
Vcc_emifil1
LMH6401 dig VGA
H2 H4 I_max = 70mA
MountingHole MountingHole GND
I_max = 100mA

0,01u

0,01u
C9

C5

0,01u

0,01u
C11

C15
J8
Conn_Coaxial
2
GND GND

2,2n

2,2n
GND GND

C6
C10

2,2n

2,2n
1
U2 GND

C12

C16
IS2_IN+
LMH5401IRMSR

VS+ 10
VS+ 1
Output

13
8
J5 VOCM1 2 CM IS2_R_IN+ J13
U4

VS+
VS+
Conn_Coaxial GND GND Conn_Coaxial

R54
LMH6401IRMZR GND GND

0
R41
2 R38 2

0
R45 IS2_R+ R49
B 175 B
0 0
1

1
R12 R20 R34 FB2+ 4
FB+ R61 R77 R81

R3 0
R26

R30

R65

R70
DNI

DNI
IS2_OUT+ IS2_IN_AMP+

DNI

DNI
DNI GND 0 50 50 0 GND DNI
IN2- IN2_R- IN2_R_AMP- 5 OUT+ 13 2 11 OUT2_R_AMP+ OUT2_R+ OUT2+
IN- Interstage Resistive Loss INP OUTP
IN2+ IN2_R+ IN2_R_AMP+ 6 3 10 OUT2_R_AMP- OUT2_R- OUT2-
IN+ GND INM OUTM
OUT- 12
R13 R21 R35 R62 R78 R82

R5 0
R27

R31

R66

R71
DNI

DNI

IS2_OUT- IS2_IN_AMP-

DNI

DNI
DNI 0 50 FB2- 7 FB- 50 0 DNI
R46 R50
1

1
GND R39 IS2_R- GND
0 0 15

R67
R42
2 CS2 2
175 CS

0
GND GND PD2 6 PD GND GND
Conn_Coaxial PD1 9 IS2_R_IN- 7 Conn_Coaxial
PD VOCM

14 GND
11 GND
J6 GND SCLK 14 GND J14

VS-
VS-
SCLK
MOSI 1 SDI VOCM2

8
3
IF - Signal Input (max. 100mVppd) MISO 4
CM - Dissipation DNI resistor SDO
IS2_IN-

EPAD
EPAD
EPAD
EPAD
1

GND
GND
VS-

VS-
2
GND
C Conn_Coaxial C
GND

12
20
19
18
17
16
5
9
J10

GND

USB-SPI-FIFO-Interface pin-header
OCM-Setting of FDA OCM Setting VGA
FT2232

Vcc SPI = 0.25dB Step, Parallel = 2dB Step (LMH6881)


Vcc
SPI = 0.25dB Step (LMH6401)

_SPI______PARALLEL(LMH6881)
R16
1k

R57

MISO =>D0 (Pin 4)


1k

MOSI =>D1 (Pin 3)


VOCM1 SCLK => D2 (Pin 15)
VOCM2 CS => D3 (Pin 16)
0,1u
C2 0,1u _________LMH6881________
R25
DNI

C20 SPI1 = 0
R17
1k

=> Parallel Mode


R60
DNI
R58

D SPI1 = 1 D
1k

=> Serial Mode

J1
GND
GND Conn_02x08_Counter_Clockwise
GND
GND PWR_FLAG 1 16 PD3
GND
PWR_FLAG Vcc 2 15 PD1
MOSI 3 14 PD4
MISO 4 13 PD2
FB1 CS2 5 12 VOCM3
330 Ohm @100MHz SCLK 6 11 VOCM1
SPI1 7 10 VOCM4
Vcc
CS1 8 9 VOCM2

FB3 C26
LMH5401 - FDA fixed GAIN 4 V/V 0,1u
330 Ohm @100MHz

I_max = 70mA Vcc


GND
LMH6881
C22 vollsymmetrischer dig. VGA
Vcc_emifil3 0,1u
0,01u

0,01u

Vcc_emifil4
C7

C3

E E
GND J7
0,01u

0,01u
C13

C17
Conn_Coaxial I_max = 135mA
2
1

GND
GND GND
C14

C18
2,2n

2,2n

2,2n

2,2n

IS1_IN+
C8

C4

U1
LMH5401IRMSR U3

Conn_Coaxial
VS+ 10
VS+ 1

GND GND
VCC 19

VCC 20

VCC 23

VCC 24

LMH6881SQ_NOPB
J2 VOCM3 2 CM

J9
Conn_Coaxial Interstage Resistive Loss
GND GND GND GND
2 R36 2
R7
40

R43 IS1_R+R47
R53

175
0

0 0
1

1
FB1+ 4
R1DNI

R4 R18 R32 FB+ 9 R63 R79 R83


R23

R28

R68

R75
DNI

DNI

IS1_OUT+ IS1_IN_AMP-
DNI

DNI
INMD
DNI GND 0 50 OUTP 22 OUT1_R_AMP+ 50 0 GND DNI
IN1+ IN1_R+ IN1_R_AMP- 5 OUT+ 13 OUT1_R+ OUT1+
IN-
VOCM4 2 OCM
IN1- IN1_R- IN1_R_AMP+ 6 IN+ GND
OUT1_R- OUT1-
F OUT- 12 F
R2DNI

R11 R19 R33 10 INPD OUT1_R_AMP-R64 R80 R84


OUTM 21
R24

R29

R69

R76
DNI

DNI

IS1_OUT- IS1_IN_AMP+
DNI

DNI

DNI 0 50 FB1- 7 FB- 50 0 DNI


R44 IS1_R- R48
1

1
R10

GND R37
0

0 0 GND
R52

2 175 2
0

SPI1 5 SPI
GND GND GND GND
Conn_Coaxial PD3 9 PD4 17 SD 1 GND Conn_Coaxial
PD NC
14 GND
11 GND

J3 GND J16
VS-
VS-

MISO 4 MISO NC 14
MOSI 3 MOSI NC 18
8
3

IF - Signal Input (max. 100mVppd) IS1_IN-


CM-Dissipation/Termination DNI resistor SCLK 15 SCLK INPS 11
R51
250
1

CS1 16 CS INMS 8
2
GND
GND
12 GND
13 GND
25 PAD

GND Conn_Coaxial
GND GND
J4
6
7

V_dig_H = 10mA * R

OCM-Setting of FDA
G GND G
OCM(x2) Setting VGA
Vcc

Vcc
R14
1k

R55

VOCM3
3k

0,1u
C1 VOCM4
R22
DNI
R15
1k

0,1u
C19
R59
DNI
R56

Kivanc Karagülle
1k

Sheet: /
GND File: digVGA.sch
GND
Title: digVGA-Schematic
GND
GND Size: User Date: 2021-05-06 Rev: 1.0
H H
KiCad E.D.A. kicad (5.1.10)-1 Id: 1/1
1 2 3 4 5 6 7 8 9 10

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