Hindawi

Security and Communication Networks

Volume 2019, Article ID 1294267, 17 pages
https://doi.org/10.1155/2019/1294267

Research Article
FPGA Implementation of Digital Images Watermarking System
Based on Discrete Haar Wavelet Transform

Mohamed Ali Hajjaji ,1 Mohamed Gafsi ,1,2

Abdessalem Ben Abdelali ,1 and Abdellatif Mtibaa1,2
1
Université de Monastir, Laboratoire d'Electronique et de Microelectronique, LR99ES30, 5000, Monastir, Tunisia
2
Université de Monastir, Ecole Nationale d’Ingénieurs de Monastir, 5000, Monastir, Tunisia

Correspondence should be addressed to Mohamed Ali Hajjaji; daly fsm@yahoo.fr

Received 14 August 2018; Revised 11 November 2018; Accepted 9 December 2018; Published 3 January 2019

Academic Editor: Stelvio Cimato

Copyright © 2019 Mohamed Ali Hajjaji et al. This is an open access article distributed under the Creative Commons Attribution
License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly
cited.

In this paper we propose a novel and efficient hardware implementation of an image watermarking system based on the Haar
Discrete Wavelet Transform (DWT). DWT is used in image watermarking to hide secret pieces of information into a digital content
with a good robustness. The main advantage of Haar DWT is the frequencies separation into four subbands (LL, LH, HL, and HH)
which can be treated independently. This permits ensuring a better compromise between robustness and visibility factors. A Field
Programmable Gate Array (FPGA) that is based on a very large scale integration architecture of the watermarking algorithm is
developed to accelerate media authentication. A hardware cosimulation strategy using the Matlab-Xilinx system generator (XSG)
was applied to prove the validity of the suggested implementation. The hardware cosimulation results show the effectiveness of the
developed architecture in terms of visibility and robustness against several attacks. The proposed hardware system presents also a
high performance in terms of the operating speed.

1. Introduction (DCT), Discrete Wavelet Transform (DWT), and Karhunen

Loeve Transform (KLT) provide a special authentication to
Digital watermarking is a technique of hiding information host images. They are especially used in telemedicine, e-
on a digital support such as images, video, or audio for healthcare, legal domains, telesurgery, etc.
authentication control, copyright protection, integrity veri- The performance of a watermarking system is generally
fication, etc. The hidden information is called a watermark subject to the following requirements.
and the marked documents are named watermarked data.
Distortion caused by the hidden watermark on the host (i) Imperceptibility. The watermark should not affect the
data should be made as low as possible. The watermarked quality of the original image after any watermarking oper-
and original images must be perceptually equivalent so that ation. Cox et al. [2] defined the imperceptibility as a visual
the embedded watermark can remain imperceptible by a similarity between the original and watermarked images. The
Human Visual System (HVS). The Peak Signal to Noise Ratio watermark has to be inserted in a way that it still is completely
(PSNR) parameter is used for the imperceptibility measure. invisible to HVS [3]. Indeed, the insertion process must not
Even if the distortion, caused by the watermark, is small, damage the host image. However, not only the image but also
it can be undesirable in some image types such as the the watermark should not be distorted. This latter must be
medical and military ones. For these types of applications, invisible, but also easy to extract.
the PSNR value must be greater than 40 dB [1]. In this case,
watermarking in the transform domain is recommended. In (ii) Capacity. The ability of a watermarking system refers to
fact, transform spaces such as Discrete Cosine Transform the ratio of the amount of data to be hidden according to
2 Security and Communication Networks

the size of the host document [4]. Sometimes the size of the fragile watermarking system operating in the spatial domain.
watermark is limited just to 1 bit. Their proposed watermarking scheme was imperceptible and
robust against geometric attacks, but fragile against filtering
(iii) Robustness. Robustness is the resistance of the watermark and compression. Hirak Kumar Maitya et al. [6] put forward
system against intentional transformations on a watermarked a hardware implementation of reversible watermarking in
image [5]. These transformations can be of a given geometric the spatial domain by using a reversible contrast mapping
type such as rotation and cropping and they include all types technique. The principal advantage of the proposed work was
of image degradation caused by lossy compression, high-pass the operation frequency (more than 98.76 MHz). In [18],
filter, low-pass filter, etc. Sakthivel and S.M. et al. put forward a VLSI architecture of a
To these requirements, we can add the computational digital image watermarking system. Their embedding process
complexity. In fact, execution time can be an important was based on the Pixel Value Search Algorithm (PVSA)
factor for many applications. Watermarking algorithms with applied in the spatial domain. The system was implemented
a low computation cost can be used to reduce the execution using verilog Hardware Description Language (HDL) and
time. However, this can highly affect the system performance. the Altera Quartus-II 11.0 tool with Matlab R-2012b. The
Elsewhere, the algorithm can be adapted for hardware imple- presented results showed that the proposed system was not
mentation to accelerate the processing while maintaining highly fast with an average quality of the watermarked image
the techniques effectiveness [6]. In the related literature, and the extracted watermark resulting in different attacks. In
software implementation of the watermarking algorithms [19], Manas N. et al. suggested a hardware implementation
is largely applied in contrast to hardware implementation, of a watermarking algorithm based on phase congruency
despite the performance that can be achieved by applying and singular value decomposition. Their idea consisted in
this type of development [7]. In a software implementation, embedding watermark data in the host image using the Sin-
the algorithm’s operations are performed as a code running gular Value Decomposition (SVD) in the congruency phase
on a microprocessor [8]. The main drawback of this type mapping points applied in the spatial domain. Their system
of implementation [8] is the limited means for improving was implemented using the Xilinx ISE 14.3 tool and a Virtex
the system speed and the hardware performances. Although 5 FPGA device. In [6], Hirak M. et al. proposed an FPGA
it might be faster to implement an algorithm in software, implementation of an image watermarking algorithm using
there are a few compelling reasons for a move to hard- Reversible Contrast Mapping (RCM) in the spatial domain.
ware implementation. In this kind of implementation the The implemented algorithm and the resulting architecture
algorithm’s operations are fully implemented in a custom- were relatively simple. In [20], Karthigai kumara P. et al. put
designed circuitry. This investigates great advantages such as forward an FPGA implementation of an image watermarking
hardware area and consumption decrease and mainly speed system using the XSG tool. Their suggested system consists
increase [7–9]. in embedding a binary watermark in the discrete wavelet
In the given literature, a number of hardware designs for domain of a host image. The main disadvantage of the
conventional watermarking algorithms have been reported. proposed system is that the corresponding hardware design
The Very Large Scale Integration (VLSI) architecture for a consumed a lot of hardware resources despite that the system
conventional watermarking algorithm in the spatial domain used only the DWT tool.
proposed by Gerimella et al. [10] might be considered as a After this review of the existing work that addresses the
noteworthy early work. Later, Mohanty et al. [11] proposed hardware implementation of watermarking systems, we can
a watermarking hardware architecture that can insert two note that the majority of their present inefficiency is in terms
visible watermarks into digital images using a spatial domain of hardware performances or in terms of robustness of the
watermarking technique. Mohanty et al. [12] put forward a hardware design against attacks. Many of them are applied in
VLSI architecture that could insert invisible or visible water- the spatial domain with, some time, very simple techniques to
marks into digital images in the DCT domain. Mohanty et al. be implemented as well as a lack of hardware speed efficiency.
[13] developed two versions (low-power, high-performance) However, hiding confidential data in the spatial domain is
of watermarking hardware module. The DC component and generally vulnerable against hackers. In this work, we suggest
the three low frequency components are considered for a novel and efficient hardware implementation of a water-
insertion in the DCT domain. Maity et al. [14] suggested a marking system based on Haar DWT. We aim at developing a
fast Walsh transform (FWT) based on a Spread Spectrum (SS) watermarking system that ensures high performance in terms
image watermarking scheme that would serve for authen- of hardware efficiency with high imperceptibility (PSNR) and
tication in data transmission. In [15], Korrapati Rajitha et robustness (Normalized Cross-Correlation, NC). The system
al. proposed an FPGA implementation of a watermarking is designed using the XSG tool and synthesized for Xilinx
system using the Xilinx System Generator (XSG). Insertion Virtex-5 FPGA of the ML507 platform. A comparison with
and extraction of information were applied in the spatial existing watermarking systems will be undergone to show the
domain. In [16], Rohollah Mazrae Khoshki et al. put forward effectiveness of the proposed module in terms of hardware
a hardware implementation of a watermarking system based performances with the high imperceptibility and robustness
on DCT. Their work was developed using Matlab-Simulink against several attacks.
followed by Altera DSP Builder (integrated with Simulink The rest of the paper is organized as follows: In Section 2,
Embedded coder) for Auto-Code generation. In [17], Rahate a description of the different steps of the adopted watermark-
Kunal B. et al. suggested a hardware implementation of a ing algorithm is given. In Section 3, we describe the hardware
Security and Communication Networks 3

Original image Watermark Original

OriginalOriginal
riginal
iimagemage
image Watermarked image

2-D DWT at
second level Second level 2D-DWT

XOR Key
LL2 LH2 Watermarked LH2
Original LH2
LH1
HL2 HH2
X 
Subtraction
W’
HL1 HH1 +

Thresholding
IDWT 2-D

Watermarked Ciphered watermark

image

Figure 1: The insertion step. Key

XOR
design of the watermarking system. The implementation
results and the performance evaluation of the developed
watermarking system are presented in Section 4.

2. Description of Watermarking Algorithm Extracted

watermark
Watermarking systems of digital images are composed of
two main parts: insertion and detection [21]. The diffusion Figure 2: The extraction step.
process includes the attacks applied to watermarked images.

2.1. Insertion Step. As illustrated in Figure 1, the proposed (ii) The watermark (W), which represents the informa-
system is an additive scheme. The watermark insertion is tion to be inserted (a binary information).
expressed by
(iii) The key (C), which is a binary sequence to be mixed
𝑃𝑖 = 𝑃𝑜𝑟𝑖 + (𝑞𝑖 (𝐶) ⊕ 𝑊𝑖 ) × 𝛼 with the watermark for its protection.
𝑤𝑖𝑡ℎ 𝑞 = key generator (iv) The visibility factor (𝛼), which is the marking strength
in the image. This coefficient must be adequately
C = Binary random sequence chosen to maintain a best compromise between
robustness and imperceptibility factors of the scheme.
𝑖 = i𝑡ℎ iteration
(1) After the second level of decomposition using the 2D
𝛼 = Visibility factor
Haar DWT, we obtain four subbands of 1/8 of the input image
𝑃𝑖 = i𝑡ℎ watermarked coefficient size (Figure 1): approximation (LL2 band: low frequencies)
and details (horizontal (LH2), vertical (HL2), and diagonal
𝑃𝑜𝑟𝑖 = i𝑡ℎ original coefficient (HH2)). In our adopted method, we opt for inserting the
watermark in the LH2 subband, which includes the medium
𝑊𝑖 = i𝑡ℎ bit of the watermark frequencies. In the end of this phase, 2D IDWT is applied to
construct the watermarked image.
In the insertion phase, our system requires four data
inputs:
2.2. Extraction Step. As depicted in Figure 2, the extraction
(i) The original image (I) that will contain the data to be step consists in following the same steps as in the insertion
preserved and protected. phase. The 2D Haar DWT is applied at the second level of
4 Security and Communication Networks

the decomposition. After that, the watermark is recovered by The watermarked image may be subject to alterations caused
using the following equation: by attacks. Indeed, a thresholding phase is necessary for the
proper extraction of the watermark. Equation (3) is applied
[𝐿𝐻𝑡 (𝑖) − 𝐿𝐻𝑜 (𝑖)]
𝑊󸀠 (𝑖) = [ ⊕ 𝐶 (𝑖)] to set the value of the watermark.
𝛼
𝑊𝑖𝑡ℎ 𝐿𝐻𝑡: 𝑊𝑎𝑡𝑒𝑟𝑚𝑎𝑟𝑘𝑒𝑑 𝑠𝑢𝑏 − 𝑏𝑎𝑛𝑑 (2)

𝐿𝐻𝑜: 𝑂𝑟𝑖𝑔𝑖𝑛𝑎𝑙 𝑠𝑢𝑏 − 𝑏𝑎𝑛𝑑

{Ρ𝑎𝑙 (i) ≥ S 󳨐⇒ W (i) = 1

𝑖𝑓 {
𝑒𝑙𝑠𝑒 󳨐⇒ W (i) = 0
{
(3)
with Pal (i) : ith is the difference between watermarked and the original coefficient

S: Threshold value, determined empirically

3. Hardware Design of reconstruction of the DWT at the second level. The second
the Watermarking System one corresponds to the insertion step.

Xilinx Company proposes an Integrator Design Environment

3.1.1. 2D Haar DWT
(IDE) for FPGA under the Matlab tool. This IDE is aiming to
increase the abstraction level of the hardware design and to (a) Decomposition Step of the 2D DWT of Haar. The one-
minimize the manual intervention of the HDL code genera- dimensional decomposition is obtained by applying the
tion [22]. This tool is named XSG; it is a high-level design tool equations of the decomposition “A” for approximations and
that allows using the MathWorks Simulink environment in “M” for details.
the design of digital circuits dedicated to Xilinx FPGAs [23].
It is used for hardware system generation, simulation, and X(2n) + X(2n+1)
A= : X: Input signal
validation throughout the hardware cosimulation technique. 2
The structure of a system is created in the Simulink (4)
Y(2n) − Y(2n+1)
modeling environment using a specific library offered by M= : Y: Output signal
Xilinx. All the designing steps for the implementation on 2
FPGA, including synthesis, placement, and routing, are As shown in Figure 5, the Haar wavelet decomposition in
automatically performed to generate an FPGA programming two dimensions is mainly performed in two stages. The first
file. stage consists in applying (1) and (2) along lines. This allows
The designer starts with creating the system model in obtaining two subbands, generally denoted as L and H. Then
Simulink. Next, “Sysgen” automatically generates the bit- a transposition is made in order to reach the second stage,
stream to program the FPGA. Intermediate steps, which are which consists in applying the same equations on columns.
synthesis, placement, and routing, are performed by interme- So, the four subbands named LL, LH, HL, and HH will be
diate tools. Figure 3 describes the XSG based design flow. obtained.
In our design, the acquisition and display of input and Figure 6 gives the various parts of the 2D Haar DWT
output images are performed using the Matlab tool. At global design.
this phase, data are presented in a double-precision float-
ing number. The processing algorithm is implemented by (i) Preprocessing Subsystem. The preprocessing subsystem
using XSG blocks. In the XSG design, boolean and fixed- allows the preparation of the input data for accelerating the
point formats are used for data representation. To adapt wavelet computing. The idea consists in decomposing the
the representation differences between the XSG design and entire image into four components, so, separating the even
the Matlab software part, Xilinx offers a simple interfacing and odd pixels from each even and odd image line. This
utilizing predefined “Gateway-In” and “Gateway-Out” blocks process allows performing the wavelet steps in one go. The
provided in the Xilinx Blockset Library. The global design design is presented in Figure 7.
of the watermarking system is divided into two principal
modules: insertion and extraction. (ii) Calculation of the Subsystem. This subsystem computes
the coefficient of wavelet field. Thus, it receives and processes
3.1. Insertion Module. As shown in Figure 4, the global the outputs of the preprocessing subsystem in order to
design of the insertion module is composed of two main produce four outputs, which are LL, LH, HL, and HH
blocks. The first one corresponds to the decomposition and coefficients. Obviously, as shown in Figure 8, the calculation
Security and Communication Networks 5

.m .mdl

MATLAB Simulink

Model
Simulation

ISIM /
Waveform ModelSIM

Simulator
External
Synthesis HW in the loop
/ HW CoSIM
Test bench
ISE DS FPGA

.bit

Implementation

Figure 3: XSG based design flow.

System
Generator
Insertion

[A]
Ol ln1 Go1
[A]
Fro1
W_l To W
[B]
[B]
Go2
[C] Fro2
[C]
Go3
[D] Fro3
pretreatment [D]
2_2D-DWT-HAAR Go4
Fro4
OW ln2 2D-IDWT-HAAR

Figure 4: Part 1: XSG blocks for the insertion phase.

is done by the addition, subtraction, and multiplication we have opted for using internal RAM blocks. The Storage
blocks. subsystem design is presented in Figure 9.

(iii) Storage Subsystem. After wavelet computing, a storage (b) Inverse Transformation of 2D DWT of Haar. The principle
stage is required; hence we present the objective of “Storage” of calculating the coefficients of the original image is depicted
subsystem. However, to accelerate the write/read of data, in Figure 10. From four subbands (LL, LH, HH, and HL), the
6 Security and Communication Networks

L and H Matrix
X11 X12 X18 L11 L14 H11 H14

X21 L21 H21

Transformation
on the rows
X81 X82 X88 L81 L84 H81 H84

Original Matrix Transformation

sized 8∗8 on columns

LL 11 LL 14 LH11 LH14

LL41 LL44 LH41 LH44

LL0 and LH0,
HL0 and HH0 HL11 HL14 HH11 HH14

HL41 HL44 HH41 HH44

Figure 5: Principle of the 2D Haar DWT.

(ii) Thereafter, with HL and HH, we calculate the coeffi-

Input : monochrome Output cients of band H. This is achieved by the following equations:
image
𝐻𝐿 (𝑗) + 𝐻𝐻 (𝑗)
Pre-processing Storage 𝐻 (2 × 𝑖) =
2
Calculation 𝐻𝐿 (𝑗) − 𝐻𝐻 (𝑗) (6)
𝐻 (2 × 𝑖 − 1) =
2
𝑁
𝑖, 𝑗 = 1 󳨀→ ; 𝑁 = nombre de pixels d’un colonnes.
Figure 6: Different blocks of the proposed architectures of the 2D 2
Haar DWT. (iii) At this stage, the original pixels are calculated,
browsing at the same time the two bands L and H along lines
using the following equations:
first step is to calculate L and H. Then in the second step, the 𝐿 (𝑖) − 𝐻 (𝑖)
𝑃 𝑜𝑟𝑖 (2 × 𝑖 − 1) =
original pixels are calculated. 2
The process of calculation is as follows: (7)
𝐿 (𝑖) + 𝐻 (𝑖)
(i) We begin with the computation of the L subband 𝑃 𝑜𝑟𝑖 (2 × 𝑖) =
coefficients. This is done by browsing, at the same time, 2
the two LL and LH subbands along the columns using the (iv) After this last step, we have the original pixels. Finally
following equations: the pixels are organized to reform the input image.
For the implementation of the IDWT of Haar with XSG
𝐿𝐿 (𝑗) + 𝐿𝐻 (𝑗) tools, we propose the subsystem shown in Figure 10. Thus,
𝐿 (2 × 𝑖) = the subsystem processes the coefficients of wavelet field in
2
order to acquire the original data. Hence, the computing of
𝐿𝐿 (𝑗) − 𝐿𝐻 (𝑗) (5) the original data is done with addition and subtraction blocks.
𝐿 (2 × 𝑖 − 1) = Also, we use other logic blocks for data control and shaping.
2
𝑁 3.1.2. Hiding Watermark on the Host Image. As presented in
𝑖, 𝑗 = 1 󳨀→ ; 𝑁 = number of pixels in a column
2 Figure 11, the second step is about the insertion system. At
Security and Communication Networks 7

1
P1

1
2
P2

3
P3

4
P4

Figure 7: Block diagram of the “pre-processing” subsystem.

1
in1
2
in2 1
Reg1
LL
TDD1

2
Reg2
LH
TDD2

4 3
Reg3
HL
TDD3

4
HH
TDD4

Figure 8: Block diagram of calculation sub-system.

this step, the totality of the watermark is embedded in LH2 The inputs of the “DSP48 macro” block are, respectively,
(second horizontal subband). The watermark is scrambled LH2, alpha, and the scrambled watermark. Its output is the
by a secret key generated by the “LFSR” block. Afterward, watermarked LH2.
the “DSP48 macro” block is used to carry out the addition
of the scrambled watermark multiplied by the “𝛼” visibility 3.2. Extraction Module. The extraction step is the last phase
factor. of the watermarking system, which aims to extract the
8 Security and Communication Networks

Figure 9: Block diagram of storage subsystem.

Output

Inputs

Figure 10: Block diagram of different subsystems of inverse Haar DWT.

Security and Communication Networks 9

Input

Output

Figure 11: Watermark insertion model.

inserted data. Figure 12 represents the global design of 4.1. Cosimulation Results. After the validation of the adopted
the extraction system. At this step, the same procedure is algorithm by the software simulation, we proceed to the
reversely used. implementation on a Xilinx platform. The configuration file
The main difference, relative to the insertion step, is is obtained automatically by following the necessary steps
the extraction block. Figure 13 presents the design of the to convert the design into an FPGA synthesizable module
extraction block. We obtain the original and watermarked (Figure 14). The target device selected for this work is Virtex-5
subbands. After that, a subtraction is applied to extract the FPGA on the ML507 platform.
modified watermark, named W’. The latter is stocked in FIFO. The hardware implementation of the insertion and
Finally, by using the thresholding, the final watermark is extraction steps, on the ML 507 target, generates the results
extracted. of the FPGA resource consumer in Table 1. The Register
Transfer Level (RTL) diagrams of the insertion and extraction
4. Implementation Results and systems are presented in Figure 15.
Performance Evaluation For the validation of our study, we considered an ordinary
image base known as the image “Cameraman,” “Lena,”
In this section, we start by presenting the hardware imple- “Barbara,” etc. In Figure 16, we present some implementation
mentation results of the adopted system. Some examples of results of the adopted watermarking system, on the “Camera-
the cosimulation results of the generated hardware block will man” image with a variation of the value 𝛼 (equal to 3, 6, 10,
be present. The efficiency of the proposed system is then and 20). However, we notice that the increase in the visibility
discussed according to the PSNR value, between the original factor leads to the loss of the psychovisual quality of the
and the watermarked image, and the NC value between the watermarked image. It should be noted that, in the absence of
original and the detected watermark against several attacks. attacks, the watermark is well extracted, from which we can
A comparison with some existing works will be described in conclude that the implemented system gives results similar to
the following. those obtained by software implementation.
10 Security and Communication Networks

Figure 12: Part 2: XSG blocks for extraction phase.

Figure 13: Extraction Block.

Security and Communication Networks 11

(a)

(b)

Figure 14: Hardware block generation of insertion and extraction steps.

Table 1: Consumed hardware resources in insertion and extraction steps resources.

Insertion Step Extraction Step

Resources
Used Available Percentage Used Available Percentage
Number of 1,536 32,640 4% 619 32,640 2%
register slices
Number of slice 2,092 32,640 6% 1,002 32,640 3%
LUT
Number of used 2,494 32,640 8% 532 32,640 1%
logic blocks
Number of DSP48 1 48 2% 1 48 2%
Number of BRAM 9 148 6% 12 148 8%
Maximum frequency =224 MHz Maximum frequency =232 MHz
12 Security and Communication Networks

(a)

(b)

Figure 15: RTL schematic of insertion and extraction steps.

4.2. Performance Evaluation against Several Attacks of Imple- ∑𝑚 ∑𝑛 (𝑋(𝑚,𝑛) − 𝑋) × (𝑌(𝑚,𝑛) − 𝑌)

𝑁𝐶 =
mented System. Following the literature, the main constraints 2 2
of the watermarked scheme are imperceptibility and robust- √ (∑𝑚 ∑𝑛 (𝑋(𝑚,𝑛) − 𝑋) ) × (∑𝑚 ∑𝑛 (𝑌(𝑚,𝑛) − 𝑌) ) (9)
ness factors. The first one is named PSNR and presented in
(8). PSNR is accepted if its value is greater than 30 dB [24]. X and Y: Mean values of the coefficients of two matrices
The second one, named NC, is presented in (9). The NC value
After several empirical tests, applied to ordinary images
is accepted if its value is greater than 0.7 [25].
with and without attacks, we have found that, for 𝛼 equal to
3, the adopted algorithm ensures a maximum compromise
2
[ 𝐴 × 𝐵 × max (𝐼(𝑖,𝑗) ) ]
between robustness and imperceptibility factors.
(𝑃𝑆𝑁𝑅)𝑑𝐵 = 10 log10 [ 2] Figure 17 shows the results of the hardware cosimulation
∑𝐴 ∑ 𝐵
(𝐼(𝑖,𝑗) − 𝐼 󸀠 )
of ordinary images in the absence of attacks. It can be
[ 𝑖=1 𝑗=1 (𝑖,𝑗) ]

(8) concluded that the values of PSNR are well acceptable with
I(i,j) , I󸀠(i,j) : pixel values of the pixel (i, j) respect to the previous work and with respect to results
obtained for the software implementation.
in the host and watermarked image.
Our algorithm, implemented on the hardware, is more
A, B: Width and Height of the host image. robust against other types of attacks. After applying several
Security and Communication Networks 13

=33
=3 =6
Original Image
Extracted
Watermark

Original
Watermark
=10
10 =20

Figure 16: Hardware co-simulation results of insertion system.

PSNR= 48.4715 PSNR =48.2478 PSNR=48.4715 PSNR=48.3581

Figure 17: Hardware co-simulation results of watermarked ordinary images without attacks.

attacks, we extract the watermark and we compare it to the our hardware implementation provides very good results
original one. The main goal is to ensure that the extracted compared to the software implementation ones.
watermark is not modified by attacks. It is important to As provided in Table 6, in the absence of any type of
get an NC value close to 1 and a good PSNR value. The attack, PSNR, for the image “Lena” is equal to 48.4715,
robustness against diverse types of attacks such as JPEG 2000 which represents a better result than those aforementioned
attacks, impulsive noise, median filter, cropping, flipping, and algorithms. Among the most serious attacks, we apply the
stretching is among the important watermarking constraints. JPEG attack. The obtained result shows that the proposed
After attacking the 6 types of ordinary images, we attempt scheme is very effective against this kind of attacks. In fact,
to extract our watermark and calculate the NC value. Our the results presented in Table 2 show that, from a compression
aim is to conclude on the degree of robustness of our scheme rate equal to 50%, the NC value is greater than 0.7. Compared
against diverse attacks. Tables 2, 3, 4, and 5 and Figure 18 show with previous work (Table 6), we note that our implemented
the experimental results relative to the NC and PSNR values system gives better results.
between the host and extracted watermark after applying The evaluation of our implemented method against
attacks. impulsive noises shows very promising results as presented in
Table 3. In fact, the recovery of the watermark is greater than
4.3. Discussion of the Proposed Scheme. In this section, we 0.7 for a density equal to 0.01. Beyond this value, the recovery
compare the obtained results of the suggested system with of the watermark is not acceptable. Indeed, our implemented
results relative to the systems cited in the related work approach has proven its robustness against this type of attack,
section. For this comparison, we consider the most typical and, compared to other works, our implemented system gives
and recent related papers [6, 18–20]. The latter represent better results.
almost the most important works addressing watermarking Also, we test our system against the median filter. The test
systems hardware design with interesting results. First, for is evaluated with various sized windows (from [3×3] until
psychovisual quality of the original and watermarked images, [9×9]) (Table 4). The detection by correlation between the
14 Security and Communication Networks

Table 2: NC and PSNR values for watermarked and attacked images by JPEG-2000 compression.

PSNR NC
Ratio (%)
Cameraman Mandrill Lena Pepper Cameraman Mandrill Lena Pepper
10 44.05 42.10 44.05 40.15 1 1 1 1
20 39.09 38.47 39.09 38.19 1 1 1 1
30 37.36 36.61 37.36 34.55 1 1 1 1
40 37.04 35.23 37.04 32.76 0.957 0.925 0.962 0.941
50 36.12 34.19 36.12 30.17 0.872 0.870 0.771 0.868
60 35.68 33.12 35.68 28.9 0.764 0.753 0.694 0.772
70 35.24 31.82 35.03 25.01 0.744 0.679 0.690 0.679
80 34.73 29.95 34.21 23.66 0.730 0.520 0.654 0.453
90 31.34 26.78 32.91 22.12 0.665 0.489 0.618 0.432

Table 3: NC and PSNR values for watermarked, decrypted and attacked images by impulsive noise.

PSNR NC
Density
Cameraman Mandrill Lena Pepper Cameraman Mandrill Lena Pepper
0.0001 41.71 41.94 42.48 42.09 1 1 1 1
0.0005 37.59 36.80 36.87 37.10 1 1 1 1
0.0009 35.65 35.94 35.14 35.28 1 1 1 1
0.001 34.74 35.05 34.16 34.89 0.980 0.968 0.986 0.984
0.005 27.76 28.25 28.23 28.39 0.945 0.911 0.969 0.948
0.009 25.53 26.14 25.84 25.79 0.894 0.867 0.879 0.829
0.01 25.00 25.54 25.38 24.99 0.780 0.691 0.678 0.714
0.05 18.06 18.57 18.49 18.33 0.677 0.578 0.577 0.609
0.09 15.50 16.04 15.84 15.74 0.603 0.502 0.497 0.532
0.01 15.10 15.56 15.45 15.27 0.585 0.492 0.471 0.510

Table 4: NC and PSNR values for watermarked, decrypted and attacked images by median filter.

PSNR NC
Window size
Cameraman Mandrill Lena Pepper Cameraman Mandrill Lena Pepper
[2×2] 29.64 26.80 29.55 29.56 1 1 1 1
[3×3] 36.52 29.80 35.30 35.12 1 1 1 1
[4×4] 28.81 25.05 28.89 28.45 0.874 0.812 0.898 0.856
[5×5] 31.07 24.61 31.23 31.02 0.771 0.754 0.780 0.756
[6×6] 27.36 22.92 27.77 27.48 0.529 0.524 0.551 0.531
[7×7] 27.10 22.61 29.03 28.45 0.517 0.512 0.535 0.530
[8×8] 25.28 21.88 26.78 25.07 0.371 0.331 0.348 0.312
[9×9] 25.31 21.82 27.66 24.69 0.114 0.103 0.135 0.175

Table 5: NC and PSNR values for watermarked, encrypted and attacked images by cropping.

PSNR NC
Window size
Cameraman Mandrill Lena Pepper Cameraman Mandrill Lena Pepper
[8×8] 38.88 42.05 38.73 40.96 0.988 0.952 0.980 0.746
[16×16] 33.92 38.01 33.84 36.82 0.793 0.812 0.898 0.736
[32×32] 28.17 31.51 28.16 28.77 0.759 0.780 0.766 0.698
[64×64] 22.10 23.93 22.30 22.85 0.657 0.587 0.570 0.605
[128×128] 15.70 17.94 18.09 18.09 0.452 0.406 0.388 0.410
Security and Communication Networks 15

Watermarked and Extracted Watermarked and Extracted

Original image flipped image Watermark Stretched image Watermark

NC=0.8742 NC=0.8132

NC=0.9279 NC=0.7582

NC=0.8145
NC=0.8610

NC=0.701 6
NC=0.9279

Figure 18: NC value for watermarked, encrypted and attacked images by flipping and stretching.

Table 6: NC and PSNR comparison against other works.

Attacks Method PSNR NC

Ref [18] 32.1072 0.989
JPEG-2000 Q=80 Ref [19] 44.06 0.994
Proposed algorithm 39.09 1
Ref [18] 23.1951 0.918
In presence of attacks Salt & pepper 0.05 Ref [19] 26.33 0.847
Proposed algorithm 28.23 0.969
Ref [18] --- ---
Cropping 25% Ref [19] 29.07 0.847
Proposed algorithm 18.09 0.410

extracted and inserted watermarks has shown that our imple- The proposed architecture gives also acceptable results
mented system is robust against median-filter attacks (NC (NC greater than 0.7) against geometric attacks such as
is greater than 0.7 for a window size coefficient less than or the flapping and stretching of the watermarked images. The
equal to [5x5]) and keeps the visual appearance of the image last attack applied on the proposed system is the so-called
after watermarking. As illustrated in Table 6, in general, the “cropping” attack. Note that for a window lower than or equal
proposed architecture gives relatively good results. to 25% of the size of the watermarked image, the NC value is
16 Security and Communication Networks

Table 7: Hardware performance comparison.

Method Device Number of Slice Number of Slice Max Frequency

LUT Register (MHz)
Proposed algorithm Xilinx Virtex-5 2092 1536 224
Ref [18] Altera Flex 10K 1477 45 58.48
Ref [19] Xilinx Virtex-5 103 203 183.8
Ref [6] Xilinx Spartan-3E --- 9881 98.7
Ref [20] Xilinx Virtex-6 4708 3922 344.34

less than 0.7. Compared to previous works we note that this is References
also an acceptable result for our architecture.
The hardware performances of the proposed system [1] M. A. Hajjaji, E.-B. Bourennane, A. Ben Abdelali, and A.
Mtibaa, “Combining Haar wavelet and Karhunen Loeve trans-
have been evaluated relatively to the operating frequency
forms for medical images watermarking,” BioMed Research
the FPGA resources occupancy rate. According to Table 7, International, vol. 2014, Article ID 313078, 15 pages, 2014.
broadly the proposed architecture gives better results. The
[2] I. J. Cox, J. Kilian, F. T. Leighton, and T. Shamoon, “Secure
highest operating frequency reported in previous work is
spread spectrum watermarking for multimedia,” IEEE Transac-
183.8 MHz [19]. However, for our algorithm, the maximum tions on Image Processing, vol. 6, no. 12, pp. 1673–1687, 1997.
operating frequency is 224 MHz. Compared to [20], we noted
[3] Y. Zhang, “Blind watermark algorithm based on HVS and RBF
that even if the proposed architecture is slower, it presents a
neural network in DWT domain,” WSEAS Transactions on
better hardware resources occupation rate. Computers, vol. 8, no. 1, pp. 174–183, 2009.
[4] R. O. Preda and D. N. Vizireanu, “A robust digital watermarking
5. Conclusion scheme for video copyright protection in the wavelet domain,”
Measurement, vol. 43, no. 10, pp. 1720–1726, 2010.
In this paper a novel and efficient hardware implementation [5] W.-B. Lee and T.-H. Chen, “A public verifiable copy protection
of an image watermarking system based on the Haar Discrete technique for still images,” The Journal of Systems and Software,
Wavelet Transform has been developed. The performance vol. 62, no. 3, pp. 195–204, 2002.
of the proposed hardware implementation in terms of pro- [6] H. K. Maity and S. P. Maity, “FPGA implementation of reversible
cessing latency has been evaluated and compared to other watermarking in digital images using reversible contrast map-
previous work. The XSG tool has been used for system ping,” The Journal of Systems and Software, vol. 96, pp. 93–104,
development. The utilization of this tool has a big benefit in 2014.
terms of conception time, since the same design has been [7] S. P. Mohanty, N. Ranganathan, and R. K. Namballa, “VLSI
firstly used for the software validation and then for hardware implementation of invisible digital watermarking algorithms
system generation. A hardware cosimulation strategy using towards the development of a secure JPEG encoder,” in Proceed-
the XSG was applied to prove the validity of the proposed ings of the 2003 IEEE Workshop on Signal Processing Systems,
implementation. The hardware cosimulation results showed SIPS 2003, pp. 183–188, August 2003.
the effectiveness of the developed architecture in terms of [8] N. J. Mathai, D. Kundur, and A. Sheikholeslami, “Hardware
visibility and robustness against several attacks. implementation perspectives of digital video watermarking
algorithms,” IEEE Transactions on Signal Processing, vol. 51, no.
4, pp. 925–938, 2003.
Data Availability
[9] A. Basu, T. S. Das, S. K. Sarkar et al., “FPGA prototype of visual
The obtained results used to support the findings of this study information hiding,” in Proceedings of the 2010 Annual IEEE
are included within the article. India Conference: Green Energy, Computing and Communica-
tion, INDICON 2010, pp. 1–4, 2011.
[10] A. Garimella, M. V. V. Satyanarayan, R. S. Kumar, P. S.
Conflicts of Interest Murugesh, and U. C. Niranjan, “VLSI Impementation of Online
Digital Watermarking Techniques With Difference Encoding
The authors declare no conflicts of interest. for the 8-bit Gray Scale Images,” in Proceedings of the Interna-
tional Conference on VLSI Design, pp. 792–796, 2003.
Authors’ Contributions [11] S. P. Mohanty, N. Ranganathan, and R. K. Namballa, “A VLSI
architecture for visible watermarking in a secure still digital
All authors helped in conceiving the experiments. Mohamed camera (S 2DC) design,” IEEE Transactions on Very Large Scale
Ali Hajjaji designed and performed the experiments. At the Integration (VLSI) Systems, vol. 13, no. 8, pp. 1002–1011, 2005.
same time, Mohamed Ali Hajjaji and Mohamed Gafsi wrote [12] S. P. Mohanty, N. Ranganathan, and K. Balakrishnan, “A dual
the main part of the paper. Abdellatif Mtibaa and Abdessalem voltage-frequency VLSI chip for image watermarking in DCT
Ben Abdelali contributed to interpreting the results and domain,” IEEE Transactions on Circuits and Systems II: Express
revising and writing of the paper. Briefs, vol. 53, no. 5, pp. 394–398, 2006.
Security and Communication Networks 17

[13] S. P. Mohanty, O. B. Adamo, and E. Kougianos, “VLSI Architec-

ture of an Invisible Watermarking Unit for a Biometric-Based
Security System in a Digital Camera,” in Proceedings of the 2007
Digest of Technical Papers International Conference on Consumer
Electronics, pp. 1-2, Las Vegas, NV, USA, 2007.
[14] M. Santi, A. Banerjee, A. Abhijit, and K. Malay, “VLSI Design
of Spread Spectrum Image Watermarking,” in Proceedings of the
13th National Conference on Communication NCC, 2007, IIT
Kanpur, India, 2007.
[15] K. Rajitha, U. R. Nelakuditi, V. N. Mandhala, and T.-H. Kim,
“FPGA implementation of watermarking scheme using XSG,”
International Journal of Security and Its Applications, vol. 9, no.
1, pp. 89–96, 2015.
[16] R. M. Khoshki, “Hardware Based Implementation of an Image
Watermarking System,” International Journal of Advanced
Research in Computer and Communication Engineering, vol. 3,
no. 5, 2014.
[17] B. Rahate Kunal, A. S. Bhalchandra, and S. S. Agrawal, “VLSI
Implementation of Digital Image Watermarking,” International
Journal of Engineering Research & Technology (IJERT), vol. 2, no.
6, 2013.
[18] S. M. Sakthivel and A. Ravi Sankar, “A real time watermarking of
grayscale images without altering it’s content,” in Proceedings of
the 2015 International Conference on VLSI Systems, Architecture,
Technology and Applications, VLSI-SATA 2015, IEEE, January
2015.
[19] M. R. Nayak, J. Bag, S. Sarkar, and S. K. Sarkar, “Hardware
implementation of a novel water marking algorithm based
on phase congruency and singular value decomposition tech-
nique,” International Journal of Electronics and Communica-
tions, 2017.
[20] P. Karthigai kumara and K. B. Anumolb, “FPGA Implemen-
tation of High Speed Low Area DWT Based Invisible Image
Watermarking Algorithm,” in Proceedings of the International
Conference on Communication Technology and System Design,
Procedia Engineering, Elsevier, 2011.
[21] M. A. Hajjaji, A. Ben Abdellali, N. Farhani, M. Gafsi, and A.
Mtibaa, “Real time implementation of numerical watermarking
system using Xilinx system generator,” in Proceedings of the 16th
International Conference on Sciences and Techniques of Auto-
matic Control and Computer Engineering, STA 2015, pp. 404–
409, 2016.
[22] R. Hmida, A. Ben Abdelali, and A. Mtibaa, “Hardware imple-
mentation and validation of a traffic road sign detection and
identification system,” Journal of Real-Time Image Processing,
pp. 1–18, 2016.
[23] M. Gafsi, S. Ajili, M. A. Hajjaji, and A. Mtibaa, “XSG for hard-
ware implementation of a robust watermarking system,” in
Proceedings of the 17th International Conference on Sciences and
Techniques of Automatic Control and Computer Engineering,
STA 2016, pp. 117–122, December 2016.
[24] P. M. Naini, Digital Watermarking Using MATLAB, INTECH
Open Access Publisher, pp. 465-480, 2011.
[25] H. Guan, Z. Zeng, J. Liu, and S. Zhang, “A novel robust digital
image watermarking algorithm based on two-level DCT,” in
Proceedings of the 2014 International Conference on Information
Science, Electronics and Electrical Engineering, ISEEE 2014, pp.
1804–1809, April 2014.
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