Subject Name: Computer Architecture

Subject Code: IT-4005

Semester: 4th
Downloaded from be.rgpvnotes.in

UNIT-1
Computer architecture refers to those parameters of a computer system that are visible
to a programmer or those parameters that have a direct impact on the logical execution of
a program. Examples of architectural attributes include the instruction set, the number of
bits used to represent diferent data types, I/O mechanisms, and techniques for addressing
memory.
Computer Architecture refers to those attributes of a system visible to a programmer or
those attributes that have a direct impact on the logical execution of a program.
Examples of architectural attributes include:
a. Instruction set designing
b. Instruction format
c. No of bits used to represent various types of data
d. Diferent addressing mechanism to access data

Computer organization refers to the operational units and their interconnections that
realize the architectural speciications. Examples of organizational attributes include those
hardware details transparent to the programmer, such as control signals, interfaces
between the computer and peripherals, and the memory technology used.
Ex: Two diferent models from a same vendor like Intel are brought to analyze. Both the
models (laptop and desktop) have same processor like core 2 duo. That means both models
understand the same instruction set as you know each processor understands a ixed no of
instructions. Hence forth their architecture is same. Due to the placement of various
hardware components, one model (laptop) is slim and other is bulky. Hence their
organization is diferent.

Computer Generations
First Generation (1940-1956) Vacuum Tubes
The irst computers used vacuum tubes for circuitry and magnetic drums for memory, and
were often enormous, taking up entire rooms. They were very expensive to operate and in
addition to using a great deal of electricity, the irst computers generated a lot of heat,
which was often the cause of malfunctions. First generation computers relied on machine
language, the lowest-level programming language understood by computers, to perform
operations, and they could only solve one problem at a time, and it could take days or
weeks to set-up a new problem. Input was based on punched cards and paper tape, and
output was displayed on printouts. The UNIVAC and ENIAC computers are examples of irst-
generation computing devices.
Advantages
• Vacuum tubes were the only electronic component available during those days.
• Vacuum tube technology made pssible to make electronic digital computers.
• These computers could calculate data in millisecond.
Disadvantages
• The computers were very large in size.
• They consumed a large amount of energy.
• They heated very soon due to thousands of vacuum tubes.
• They were not very reliable.
• Air conditioning was required.

Page no: 1 Follow us on facebook to get real-time updates from RGPV

Downloaded from be.rgpvnotes.in

• Constant maintenance was required.

• Non-portable.
• Costly commercial production.
• Very slow speed.
• Limited programming capabilities.
• Used machine language only.
• Used magnetic drums which provide very less data storage.

Second Generation (1956-1963) Transistors

The period of second generation was from 1956-1963. In this generation, transistors were used that
were cheaper, consumed less power, more compact in size, more reliable and faster than the irst-
generation machines made of vacuum tubes. In this generation, magnetic cores were used as the
primary memory and magnetic tape and magnetic disks as secondary storage devices. In this
generation, assembly language and high-level programming languages like FORTRAN,
COBOL were used. The computers used batch processing and multiprogramming operating
system.

Advantages
• Smaller in size as compared to the irst-generation computers.
• The 2nd generation Computers were more reliable
• Used less energy and were not heated.
• Wider commercial use.
• Better portability as compared to the irst-generation computers.
• Better speed and could calculate data in microseconds
• Used faster peripherals like tape drives, magnetic disks, printer etc.
• Used Assembly language instead of Machine language.
• Accuracy improved.
Disadvantages
• Cooling system was required
• Constant maintenance was required
• Commercial production was diicult
• Only used for speciic purposes
• Costly and not versatile
• Punch cards were used for input.
Third Generation (1964-1971) Integrated Circuits
The period of third generation was from 1965-1971. The computers of third generation used
Integrated Circuits (ICs) in place of transistors. A single IC has many transistors, resistors, and
capacitors along with the associated circuitry. The IC was invented by Jack Kilby. This
development made computers smaller in size, reliable, and eicient. In this generation
remote processing, time-sharing, multiprogramming operating system were used. High-
level languages (FORTRAN-II TO IV, COBOL, PASCAL PL/1, BASIC, ALGOL-68 etc.) were used
during this generation.
The main features of third generation are:
• IC used
• More reliable in comparison to previous two generations
• Smaller size
• Generated less heat
• Consumed lesser electricity
• Supported high-level language

Page no: 2 Follow us on facebook to get real-time updates from RGPV

Downloaded from be.rgpvnotes.in

Advantages
• Smaller in size as compared to previous generations.
• Used less energy
• Produced less heat as compared to the previous two generations of computers.
• Better speed and could calculate data in nanoseconds.
• Used fan for heat discharge to prevent damage.
• Totally general purpose
• Could be used for high-level languages.
• Good storage
• Less expensive
• Better accuracy
• Commercial production increased.
• Used mouse and keyboard for input.
Disadvantages
• Air conditioning was required.
• Highly sophisticated technology required for the manufacturing of IC chips.

Fourth Generation (1971-Present) Microprocessors

Fourth generation computers became more powerful, compact, reliable, and afordable. As
a result, it gave rise to Personal Computer (PC) revolution. In this generation, time sharing,
real time networks, distributed operating system were used. All the high-level languages
like C, C++, DBASE etc., were used in this generation.

Advantages
• More powerful and reliable than previous generations.
• Small in size
• Fast processing power with less power consumption
• Fan for heat discharging and thus to keep cold.
• No air conditioning required.
• Totally general purpose
• Commercial production
• Less need of repair.
• Cheapest among all generations
• All types of High level languages can be used in this type of computers
Disadvantages
• The latest technology is required for manufacturing of Microprocessors.

Fifth Generation (Present and Beyond) Artiicial Intelligence

The period of ifth generation is 1980-till date. In the ifth generation, VLSI technology
became ULSI (Ultra Large-Scale Integration) technology, resulting in the production of
microprocessor chips having ten million electronic components.
This generation is based on parallel processing hardware and AI (Artiicial Intelligence)
software. AI is an emerging branch in computer science, which interprets the means and
method of making computers think like human beings. All the high-level languages like C
and C++, Java, .Net etc. are used in this generation.

AI includes −
• Robotics
• Neural Networks

Page no: 3 Follow us on facebook to get real-time updates from RGPV

Downloaded from be.rgpvnotes.in

• Game Playing
• Development of expert systems to make decisions in real-life situations
• Natural language understanding and generation

Von Neumann Model

It is developed in 1945 and Von Neumann Architecture also known as the Von Neumann
model, the computer consisted of a CPU, memory and I/O devices. The program is stored in
the memory. The CPU fetches an instruction from the memory at a time and executes it.

The Von Neumann architecture is a design model for a stored-program digital computer
that uses a processing unit and a single separate storage structure to hold both instructions
and data. It is named after mathematician and early computer scientist John von Neumann.

Fig 1.1 Von

Neumann Model
A. Central Processor Unit [CPU]:
Central processor unit consists of two basic blocks:
The program control unit has a set of registers and control circuit to generate control
signals. The execution unit or data processing unit contains a set of registers for storing
data and an Arithmetic and Logic Unit (ALU) for execution of arithmetic and logical
operations. In addition, CPU may have some additional registers for temporary storage of
data.

B. Input Unit:
With the help of input unit data from outside can be supplied to the computer. Program or
data is read into main storage from input device or secondary storage under the control of
CPU input instruction. Example of input devices: Keyboard, Mouse, Hard disk, Floppy disk,
CD-ROM drive etc.

C. Output Unit:
With the help of output unit computer results can be provided to the user or it can be
stored in storage device permanently for future use. Output data from main storage go to
output device under the control of CPU output instructions.
Example of output devices: Printer, Monitor, Plotter, Hard Disk, Floppy Disk etc.

Page no: 4 Follow us on facebook to get real-time updates from RGPV

Downloaded from be.rgpvnotes.in

D. Memory Unit:
Memory unit is used to store the data and program. CPU can work with the information
stored in memory unit. This memory unit is termed as primary memory or main memory
module. These are basically semiconductor memories.
There are two types of semiconductor memories -
• Volatile Memory: RAM (Random Access Memory).
• Non-Volatile Memory: ROM (Read only Memory), PROM (Programmable ROM) EPROM
(Erasable PROM), EEPROM (Electrically Erasable PROM).

Secondary Memory:
There is another kind of storage device, apart from primary or main memory, which is
known as secondary memory. Secondary memories are non-volatile memory and it is used
for permanent storage of data and program.
Example of secondary memories:
Hard Disk, Floppy Disk, Magnetic Tape

CPU organization

Fig 1.2 CPU Block Diagram

Depending on the internal organization computers can be categorized into one of the three
CPU organization
1. Single Accumulator Organization
2. Stack Organization
3. General Register Organization

1. The single accumulator organizations are performed with the implied accumulator
register. The instruction format in this type of organization uses one address ield.
Example:
ADD X --> AC
2.The stack organized computer can use 1 or 0 address instruction and uses on y two
instructions POP and PUSH
Example:
PUSH X --> TOS ss-M[X]
POP --> TOS
3.When there are more than one register, general register organization can be used and
the instruction format may contain 2 or 3 address ield.
Example:

Page no: 5 Follow us on facebook to get real-time updates from RGPV

Downloaded from be.rgpvnotes.in

ADD R1, R2 --> R1

ADD R1, R2, R3 --> R1

Register organization
The CPU is made up of three major parts: Register Set, ALU, and Control Unit as shown in
igure below. The register set stores intermediate data used during the execution of the
instructions. The arithmetic logic unit (ALU) performs the required microoperations for
executing the instructions. The control unit supervises the transfer of information among
the registers and instructs the ALU as to which operation to perform.
A bus organization for 7 CPU register is shown in a igure below. All registers are connected
to two multiplexers (MUX) that select the registers for bus A and bus B. Registers selected
by multiplexers are sent to ALU. Another selector (OPR) connected to ALU selects the
operation for the ALU. Output produced by ALU is stored in some register and this
destination register for storing the result is activated by the destination decoder (SELD).

Fig 1.3
General register organization
Example: R1
– MUX selector (SELA): BUS A
– MUX selector (SELB): BUS B
– ALU operation selector (OPR): ALU to ADD
– Decoder destination selector (SELD): R1

Various CPU Registers

1. Memory Address Register (MAR):
This register holds the address of memory where CPU wants to read or write data. When
CPU wants to store some data in the memory or reads the data from the memory, it places
the address of the required memory location in the MAR.

2. Memory Bufer Register (MBR):

This register holds the contents of data or instruction read from, or written in memory. The
contents of instruction placed in this register are transferred to the Instruction Register,
while the contents of data are transferred to the accumulator or I/O register.

Page no: 6 Follow us on facebook to get real-time updates from RGPV

Downloaded from be.rgpvnotes.in

3. I/O address Register (I/O AR):

I/O Address register is used to specify the address of a particular I/O device.

4. I/O Bufer Register (I/O I3R):

I/O Bufer Register is used for exchanging data between the I/O module and the processor.

5. Program Counter (PC)

Program Counter register is also known as Instruction Pointer Register. This register is used
to store the address of the next instruction to be fetched for execution. When the
instruction is fetched, the value of IP is incremented. Thus, this register always points or
holds the address of next instruction to be fetched.

6. Instruction Register (IR):

Once an instruction is fetched from main memory, it is stored in the Instruction Register.
The control unit takes instruction from this register, decodes and executes it by sending
signals to the appropriate component of computer to carry out the task.

7. Accumulator Register:
The accumulator register is located inside the ALU, it is used during arithmetic & logical
operations of ALU. The control unit stores data values fetched from main memory in the
accumulator for arithmetic or logical operation.

8. Stack Control Register:

A stack represents a set of memory blocks; the data is stored in and retrieved from these
blocks in an order, i.e. First In and Last Out (FILO). The Stack Control Register is used to
manage the stacks in memory. The size of this register is 2 or 4 bytes.

9. Flag Register:
The Flag register is used to indicate occurrence of a certain condition during an operation of
the CPU. It is a special purpose register with size one byte or two bytes. Each bit of the lag
register constitutes a lag (or alarm), such that the bit value indicates if a speciied
condition was encountered while executing an instruction.

Register Transfer:
The symbolic notation used to describe microoperation transfer among registers is known
as RTL. The three basic components of a RTL are:
1. The set of registers.
2. The sequence of microoperation performed on the binary information stored in
registers.
3. The control function that initiates the sequence of microoperation. It is a Boolean
variable that can be either 0 or 1.

The RTL is represented as:

P: R2 ss R1 where R1 & R2 denotes the registers designates the control function, arrow
denotes the transfer from R1 to R2. The : indicates that the transfer operation be executed
by the hardware only if Pss1.

The RTL can be shown by means of if-then statement:

if(P=1) then (R2 ss R1)

Page no: 7 Follow us on facebook to get real-time updates from RGPV

Downloaded from be.rgpvnotes.in

Basic symbols for register transfer language

Symbol Description Examples

Uppercase letters Denotes a register A, R1, MDR
Subscript An individual cell A5,B9
Parenthesis A portion of register PC(H), MDR(ADR)
Arrow A transfer R1 ss R2
Colon Terminates a control function T1:
Comma Multiple operation T:R1ss R2, R3 ss R4
Square Brackets Address for memory MDR ss M[MAR]

Bus & Memory Transfers:

A more eicient scheme for transferring information between registers in a multiple register
coniguration is a common bus system. The information from a bus to any of destination
registers can be transferred by connecting the bus line to the inputs of all destination
registers and activating the load control.
The symbolic notation is as follows:
BUS ss C, R1 ss BUS

Memory Transfer:
Read Operation: The transfer of information from a memory word to the outside
environment is called a read operation.
Read: DR ss M[AR]
Write Operation: The transfer of new information to be stored into the memory is called a
write operation.
Write: M[AR] ss R1

M denotes a memory word

AR is address register {memory unit receives the address from a AR}
DR is data register {The data are transferred to another register}
A bus transfer can be constructed by two ways:
• Using multiplexers
• Using three state bufers

BUS transfer
Using Multiplexers
Rather than connecting wires between all registers, a common bus is used A bus structure
consists of a set of common lines, one for each bit of a register Control signals determine
which register is selected by the bus during each transfer Multiplexers can be used to
construct a common bus Multiplexers select the source register whose binary information is
then placed on the bus the select lines are connected to the selection inputs of the
multiplexers and choose the bits of one register

In general, a bus system will multiplex k registers of n bits each to produce an n-line
common bus
• This requires n multiplexers – one for each bit
• The size of each multiplexer must be k x 1
• The number of select lines required is log k

Page no: 8 Follow us on facebook to get real-time updates from RGPV

Downloaded from be.rgpvnotes.in

• To transfer information from the bus to a register, the bus lines are connected to the
inputs of all destination registers and the corresponding load control line must be
activated rather than listing each step as

BUS ← C, R1 ← BUS,
R1 ← C, since the bus is implied

Three-state gates
Instead of using multiplexers, three-state gates can be used to construct the bus
system
A three-state gate is a digital circuit that exhibits three states
• Two of the states are signals equivalent to logic 1 and 0
• The third state is a high-impedance state – this behaves like an open circuit, which
means the output is disconnected and does not have a logic signiicance

The three-state bufer gate has a normal input and a control input which determines the
output state With control 1, the output equals the normal input With control 0, the gate
goes to a high-impedance state This enables a large number of three-state gate outputs to
be connected with wires to form a common bus line without endangering loading efects
Decoders are used to ensure that no more than one control input is active at any given
time This circuit can replace the multiplexer in igure 1.4.
To construct a common bus for four registers of n bits each using three-state bufers, we
need n circuits with four bufers in each Only one decoder is necessary to select between
the four registers.

Fig 1.4 Three state bus bufer

Memory Transfer

We Designate a memory word by the letter M. It is necessary to specify the address of M

when writing memory transfer Operations Designate the address register by AR and the
data register by DR.
The read operation can be stated as:
Read: DR ← M[AR]
The write operation can be stated as:
Write: M[AR] ← R1
The address register (AR) is used to select a memory address, and the data register (DR) is
used to send and receive data. Both these registers are connected to the internal bus. DR is
a bridge between the internal BUS and the memory data BUS.
Memory can also be connected directly to the internal BUS in theory.
Diagram showing connections to memory unit.
M[AR] ← DR
DR ← M[AR]

Page no: 9 Follow us on facebook to get real-time updates from RGPV

Downloaded from be.rgpvnotes.in

Hence, accessing memory outside the CPU requires at least two clock cycles. First, we load
AR with the desired memory address, and then transfer to or from DR. In most typical
computer systems, memory transfers take many clock cycles, known as wait states.

Arithmetic, Logic and Shift micro-operations

Micro-operations perform basic operations on data stored in one or more registers,
including transferring data between registers or between registers and external buses of
the central processing unit (CPU), and performing arithmetic or logical operations on
registers.

Types of Microoperations
- Register transfer micro-operations: These types of micro operations are used to
transfer from one register to another binary information.
- Arithmetic micro-operations : These micro-operations are used to perform on numeric
data stored in the registers some arithmetic operations.
- Logic micro-operations: These micro operations are used to perform bit style
operations / manipulations on non-numeric data.
- Shift micro operations: As their name suggests they are used to perform shift
operations in data store in registers.

Register transfer micro-operations: These types of micro operations are used to

transfer from one register to another binary information. The register transfer micro
operation does not change the value of the information, but the rest of the three micro
operations change the value of the content.
Ex: R1←R2 Transfers the content of R2 to R1 but content of R2 does not get changed
after transfer.

Arithmetic Microoperation
The basic arithmetic microoperations are
• Addition
• Subtraction
• Increment
• Decrement
The arithmetic microoperations deined by the statement R3 ss R1 + R2 speciies the odd
microoperation. It means the content of registers R1 and R2 are added together and
transferred to the register R3. The subtraction microoperation is implemented by
complementation and addition instead of subtracting directly. The increment and
decrement microoperations are indicated by +1 and -1 operations.
The additional arithmetic microoperations are
• Add with carry
• Subtract with borrow

Logic microoperations

Logic microoperations can be used to manipulate individual bits or a portion of a word in a

register. Consider the data in a register A. Bits of register B will be used to modify the
contents of A.

Page no: 10 Follow us on facebook to get real-time updates from RGPV

Downloaded from be.rgpvnotes.in

Arithmetic Circuit Function Table

Select Input Output Microoperation
S S Ci Y D=A+Y+ Cin
1 o n
0 0 0 B D=A+B ADD
0 0 1 B D=A+B+1 ADD with Carry
0 1 0 BB D=A+ BB Subtract with Borrow
0 1 1 BB D=A+ BB +1 Subtract
1 0 0 0 D=A Transfer A
1 0 1 0 D=A+1 Increment A
1 1 0 1 D=A-1 Decrement A
1 1 1 1 D=A Transfer A

– Selective-set A ss A + B
– Selective-complement A ss A ⊕ B
– Selective-clear A ss A • B’
– Mask (Delete) A ss A • B
– Clear A ss A ⊕ B
– Insert A ss (A • B) + C
– Compare A ss A ⊕ B
Selective Set
In a selective set operation, the bit pattern in B is used to set certain bits in A.
1100 At
1010 B
---------------------
1110 At+1 (A ss A + B)
Bits in resister A are set to 1 when there are corresponding 1's in resister B. It does not
afect the bit positions that have 0's in B.
Selective-complement
In a selective complement to operation, the bit pattern in B is used to complement certain
bits in A.
1100 At
1010 B
---------------------
0110 At+1 (A ss A ⊕ B)
If a bit in B is 1, corresponding position in A get complemented from its original value,
otherwise it is unchanged.
Selective-clear
In a selective clear operation, the bit pattern in B is used to clear certain bits in A.
1100 At
1010 B
----------------------
0100 At+1 (A ss A • B')
If a bit in B is 1, corresponding position in A is set to 0, otherwise it is unchanged.
Mask Operation
In a mask operation, the bit pattern in B is used to clear certain bits in A.
1100 At
1010 B
----------------------
1000 At+1 (AssA•B)

Page no: 11 Follow us on facebook to get real-time updates from RGPV

Downloaded from be.rgpvnotes.in

If a bit in B is 0, corresponding position in A is set to 0, otherwise, it is unchanged. This is

achieved logically ANDing the corresponding bits of A and B.
Clear Operation
In clear operation, if the bits in the same position in A and B same, that bit in A is cleared
(putting 0 there), otherwise same bit in A is set (putting 1 there). This operation is achieved
by exclusive-OR microoperation.
1100 At
1010 B
----------------------
0110 At+1 (AssA⊕B)
Insert Operation
An insert operation is used to introduce a speciic bit pattern into A register, leaving the
other bit positions unchanged. This is done as:

• Amask(ANDing)operation to clear the desired bit positions, followed by

• AnORoperation to introduce the new bits into the desired positions
Example: -
»

Suppose you want to introduce 1010 into the low order four bits of A:
1101 1000 1011 0001 A (Original)
1101 1000 1011 1010 A (Desired)
1101 1000 1011 0001 A (Original)
1111 1111 1111 0000 B (Mask)
---------------------------
1101 1000 1011 0000 A (Intermediate)
0000 0000 0000 1010 Added bits
---------------------------
1101 1000 1011 1010 A (Desired)

Shift Microoperations
Shift microoperations are used for serial transfer of data. They are also used in conjunction
with arithmetic, logic and other data processing operations. The contents of are sister can
be shifted left or right. There are three types of shifts
1. Logical shift
2. Circular shift
3. Arithmetic shift

Logical Shift
A logical shift is one that transfers 0 through the serial input. In a Register Transfer
Language, the following notation is used
– shl for a logical shift left
– shr for a logical shift right
Examples:
Page no: 12 Follow us on facebook to get real-time updates from RGPV
Downloaded from be.rgpvnotes.in

R2 ss-shrR2
R3

Circular Shift
Circular-shift circulates the bits of the resister around the two ends without the loss of
information.

In a RTL, the following notation is used

• cil for a circular shif tleft
• cir for a circular shift right
• Examples:
R2 sscirR2
R3 sscilR3

Arithmetic Shift
An arithmetic shift is meant for signed binary numbers (integer). An arithmetic left shift
multiplies a signed number by 2 and an arithmetic right shift divides a signed number by 2.
Arithmetic shifts must leave the sign bit unchanged because the sign of the number
remains the same when it is multiplied or divided by 2. The left most bit in a resister holds
a sign bit and remaining hold the number. Negative numbers are in 2's complement form.
In a Resister Transfer Language, the following notation is used
– a shl for an arithmetic shift left
– a shr for an arithmetic shift right

Arithmetic shift-right
Arithmetic shift-right leaves the sign bit unchanged and shifts the number (including a sign
bit) to the right. Thus ,Rn-1remains same; Rn-2receives input from Rn-1and so on.

Fig 1.5 Arithmetic Shift &

left
Arithmetic shift-left
Arithmetic shift-left inserts a 0
into R0 and shifts all other bits to
left. Initial bit of Rn-1is lost and
replaced by the bit from Rn-2.

Arithmetic Logic Shift Unit

This is a common operational
unit called arithmetic logic unit
(ALU). To perform a microoperation, the contents of speciied registers are placed in the
inputs of the common ALU. The ALU performs the operation and transfer result to
destination resister.
• A particular microoperation is selected with inputs s1 and s0.
• A 4x1 MUX at the output chooses between an arithmetic output in Di and logic output
Ei.
• Other two inputs to the MUX receive inputs Ai-1 for right-shift operation and Ai+1for
left-shift operation.
• The diagram shows just one typical stage. The circuit must be repeated n times for an
n-bit ALU.

Page no: 13 Follow us on facebook to get real-time updates from RGPV

Downloaded from be.rgpvnotes.in

This circuit provides 8 arithmetic operations, 4 logic operations and 2 shift operations. Each
operation is elected with ive variables s3, s2, s1, s0 and cin. The input carry cin is used
for arithmetic operations only.
Table below lists the 14 operations of the ALU.

Fig 1.6 ALU

Arithmatic Micro Operations Table

Operation Operation Function
Select
S S S S Ci
3 2 1 0 n
0 0 0 0 0 F=A Transfer A
0 0 0 0 1 F=A+1 Increment A
0 0 0 1 0 F=A+B Addition
0 0 0 1 1 F=A+B+1 Add with Carry
0 0 0 0 0 F=A+ BB Subtract with borrow
0 0 1 0 1 F=A+ BB+1 Subtraction
0 0 1 1 0 F=A-1 Decrement A
0 0 1 1 1 F=A Transfer A
0 1 0 0 X F=A Ʌ B AND
0 1 0 1 X F=A V B OR
0 1 1 0 X F= A ⊕ B XOR
0 1 1 1 X F=AB Compliment A
1 0 X X X F= shr A Right Shift A into F
1 1 X X X F= shl A Left Shift A into F

Page no: 14 Follow us on facebook to get real-time updates from RGPV

 We hope you find these notes useful.
You can get previous year question papers at
https://qp.rgpvnotes.in .

If you have any queries or you want to submit your

study notes please write us at
rgpvnotes.in@gmail.com