NOIDA INSTITUTE OF ENGINEERING AND

TECHNOLOGY
GREATER NOIDA

LABORATORY MANUAL

INTEGRATED CIRCUITS LAB

(KEC-551)

COURSE: B.TECH. (EC) SEMESTER: V

Department of Electronics and Communication Engineering

(NAAC & NBA ACCREDITED)
Integrated Circuits Lab KEC 551

Approved by AICTE and Affiliated to Dr. A.P.J. Abdul Kalam

Technical University Uttar Pradesh, Lucknow
VISION

To be an Institute of academic excellence in the field of education, with future plan of

becoming a deemed university, earn name and hence win faith of the society.

MISSION

To impart to its students a high-quality education, develop their skills, broaden their mental
horizon and nurture them into competent and talented professionals to meet the challenges of
the new millennium.

VISION OF THE DEPARTMENT

To prepare the students for global competence, with core knowledge in Electronics and
Communication Engineering having focus on research to meet the needs of industry and
society.
MISSION OF THE DEPARTMENT

1. To become dynamic and vigorous knowledge hub with an exposure to state of art
technologies for connecting world.
2. To provide in-depth knowledge of Electronics and Communication Engineering
ensuring the effective teaching learning process.
3. To train students to take up innovative projects in group with sustainable and inclusive
technology relevant to the industry and social needs.
4. Empower students to become skilled and ethical entrepreneurs.
5. To promote and adapt professional development in a perpetual demanding
environment and nurture the best minds for the future.

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 2
Integrated Circuits Lab KEC 551

PROGRAMME EDUCATIONAL OBJECTIVES (PEOs)

The graduates will be able to:

PEO1. CORE COMPETENCY WITH EMPLOYABILITY SKILLS: Building on fundamental

knowledge, to analyze, design and implement electronic circuits and systems in Electronics and
Communication Engineering by applying knowledge of mathematics and science or in closely
related fields with employability skills.

PEO2. PROMOTE HIGHER EDUCATION AND RESEARCH AND DEVELOPMENT: To

develop the ability to demonstrate technical competence and innovation that initiates interest for
higher studies and research.

PEO3. INCULCATING ENTREPRENEUR SKILLS: To motivate the students to become

Entrepreneurs in multidisciplinary domain by adapting to the latest trends in technology catering
the social needs.

PEO4. ETHICAL PROFESSIONALISM: To develop the graduates to attain professional

excellence with ethical attitude, communication skills, team work and develop solutions to the
problems and exercise their capabilities.

PROGRAM SPECIFIC OUTCOMES (PSOs)

PSO1. Analyze and design the analog and digital circuits or systems for a given specification and
function.

PSO2. Implement functional blocks of hardware-software co-designs for signal processing and
communication applications.

PSO3. Design, develop and test electronic and embedded systems for applications with real time
constraint and to develop managerial skills with ethical behavior to work in a sustainable
environment.

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 3
Integrated Circuits Lab KEC 551

PROGRAM OUTCOMES (POs)

The Program Outcomes (POs) are described as.

1. Engineering Knowledge: Apply the knowledge of mathematics, science, engineering

fundamentals and an engineering specialization to the solution of complex engineering problems.

2. Problem Analysis: Identify, formulate, review research literature, and analyze complex
engineering problems reaching substantiated conclusions using first principles of mathematics,
natural sciences, and engineering sciences.

3. Design / Development of solutions: Design solutions for complex engineering problems and
design system components or processes that meet the specified needs with appropriate
consideration for the public health and safety, and the cultural, societal, and environmental
considerations.

4. Conduct investigations of complex problems: Use research-based knowledge and research

methods including design of experiments, analysis and interpretation of data, and synthesis of the
information to provide valid conclusions.

5. Modern tool usage: Create, select, and apply appropriate techniques, resources, and modern
engineering and IT tools including prediction and modeling to complex engineering activities with
an understanding of the limitations.

6. The engineer and society: Apply reasoning informed by the contextual knowledge to assess
societal, health, safety, legal and cultural issues and the consequent responsibilities relevant to the
professional engineering practice.

7. Environment and sustainability: Understand the impact of the professional engineering

solutions in societal and environmental contexts, and demonstrate the knowledge of, and need for
sustainable development.

8. Ethics: Apply ethical principles and commit to professional ethics and responsibilities and
norms of the engineering practice.

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 4
Integrated Circuits Lab KEC 551

9. Individual and team work: Function effectively as an individual and as a member or leader in
diverse teams, and in multidisciplinary settings.

10. Communication: Communicate effectively on complex engineering activities with the

engineering community and with society at large, such as, being able to comprehend and write
effective reports and design documentation, make effective presentations, and give and receive
clear instructions.

11. Project management and finance: Demonstrate knowledge and understanding of the
engineering management principles and apply these to one’s own work, as a member and leader in
a team, to manage projects and in multidisciplinary environments.

12. Life-long learning: Recognize the need for and have the preparation and ability to engage in
independent and lifelong learning in the broadest context of technological change.

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 5
Integrated Circuits Lab KEC 551

COURSE OBJECTIVE AND COURSE OUTCOMES (CO’S)

Course Objective: To design and implement the circuits to gain knowledge on performance
of the circuit and its application. These circuits should also be simulated on Pspice and
implemented using TL082, LM741, NE555, ASLK, and MPY634 KP connecting wires,
Power Supply, function generator and oscilloscope.

Course Outcomes

At the end of semester: - Student will be able to

KEC-551.1: Design different non-linear applications of operational amplifiers such as log,

antilog amplifiers and voltage comparators.
KEC-551.2: Explain and design different linear applications of operational amplifiers such as
filters.
KEC-551.3: Demonstrate the function of waveforms generator using op-Amp.

KEC-551.4: Construct multivibrator and oscillator circuits using IC555 and IC566 and perform
measurements of frequency and time.

KEC-551.5: Design and practically demonstrate the applications based on IC555 and IC566.
Mapping of COs and POs
Enter correlation levels 1, 2 or 3 as defined below:
1: Slight (Low) 2: Moderate (Medium) 3: Substantial (High)
If there is no correlation, put “-”

COs PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12
KEC-551.1 3 1 1 1 3 3 1 1 2 - 1 2
KEC-551.2 3 2 2 2 3 3 1 1 2 - 1 2
KEC-551.3 3 2 2 2 3 3 1 1 2 - 1 2
KEC-551.4 3 2 2 2 3 3 1 1 2 - 1 2
KEC-551.5 3 3 2 3 3 3 1 1 2 - 1 2

Average 3 2 1.8 2 3 3 1 1 2 - 1 2

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 6
Integrated Circuits Lab KEC 551

GENERAL SAFETY GUIDELINES

Following safety guidelines must be followed while performing lab experiments:

1. Student entry in the lab is ensured strictly as per the allocated time slots or seeking prior
proper permission from the lab faculty or instructor.
2. Students are expected to conduct themselves in a responsible manner while working in the
laboratory.
3. They should keep their bags on the shelf provided outside the lab and carry only essential
items such as lab record, manual, pen-pencil, copy and calculator etc. inside the lab.
4. Students are not allowed to carry food items (not even chewing gum), beverages and water
bottles while working in the laboratory.
5. They are expected to observe good housekeeping practices and ensure equipment, sitting
stools and components to be handled carefully and kept at proper place after finishing the
work to keep the lab clean and tidy.
6. While working in the lab
 Avoid stretching electrical cables and connectors while using the equipment.
 Rig the circuit and get it verified from the lab instructor before connecting it to power
source.
 Pay proper attention towards earthing of electrical equipment. Ensure proper
ventilation in the lab while working.
 Ensure use of wire clippers, insulating tape, plug-pins to prevent any electrical
shocking hazards.
 In case of any short circuit, sensing burning smell or observing any smoke switch off
power supply and immediately report to the faculty/lab instructor available in the lab.
7. In case of any minor injury please contact the lab instructor or lab faculty. The first aid Box
is available in the department.
8. In case of any fire emergency, contact the faculty or lab instructor. For your information, the
fire safety equipment is available on each floor near notice board.

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 7
Integrated Circuits Lab KEC 551

INSTRUCTIONS TO STUDENTS FOR WRITING THE RECORD

In the record, the index page should be filled properly by writing the corresponding experiment
number, experiment name, date on which it was done and the page number.

On the right side page of the record following has to be written:

1. Title: The title of the experiment should be written in the page in capital letters.
2. In the left top margin, experiment number and date should be written.
3. Aim: The purpose of the experiment should be written clearly.
4. Apparatus/Tools/Equipments/Components used: A list of the Apparatus/Tools/ Equipments/
Components used for doing the experiment should be entered.
5. Theory: Simple working of the circuit/experimental set up/algorithm should be written.
6. Procedure: Steps for doing the experiment and recording the readings should be briefly
described (flow chart/ Circuit Diagrams / programs in the case of computer/processor related
experiments)
7. Results: The results of the experiment must be summarized in writing and should be fulfilling
the aim.

On the Left side page of the record following has to be recorded:

1. Circuit/Program: Neatly drawn circuit diagrams for the experimental set up.
2. Design: The design of the circuit components for the experimental set up for selecting the
components should be clearly shown if necessary.
3. Observations:
 Data should be clearly recorded using Tabular Columns.
 Unit of the observed data should be clearly mentioned
 Relevant calculations should be shown. If repetitive calculations are needed, only show a
sample calculation and summarize the others in a table.

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 8
Integrated Circuits Lab KEC 551

EVALUATION SCHEME

B.TECH. ELECTRONICS & COMMUNICATION ENGINEERING

YEAR 3rd/ SEMESTER V

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 9
Integrated Circuits Lab KEC 551

KEC-551 INTEGRATED CIRCUITS LAB

1. Design the following using Op-Amp: (Through Virtual Lab Link 1)

a) A unity gain amplifier.
b) An inverting amplifier with a gain of “A”.
c) A non-inverting amplifier with a gain of “A”
2. Study and design Log and antilog amplifiers.
3. Voltage to current and current to voltage convertors.
4. Second order filters using operational amplifier for: (Through Virtual Lab Link 1)
a) Low pass filter of cutoff frequency 1 KHz.
b) High pass filter of frequency 12 KHz.
5. Realization of Band pass filter with unit gain of pass band from 1 KHz to 12 KHz.
6. Study and design voltage comparator and zero crossing detectors.
7. Function generator using operational amplifier (sine, triangular & square wave).
8. Design and construct astable multivibrator using IC 555 and
a) Plot the output waveform
b) Measure the frequency of oscillation (Through Virtual Lab Link 2)
9. Design and construct a monostable multivibrator using IC 555 and
a) Plot the output waveform
b) Measure the time delay (Through Virtual Lab Link 2)
10. Implement Schmitt Trigger Circuit using IC 555. (Through Virtual Lab Link 2)
11. Implement voltage-controlled oscillator using IC566 and plot the waveform.
(Through Virtual Lab Link 2)
12. Study and design ramp generator using IC 566.
Virtual Lab Link:
1. http://vlabs.iitkgp.ernet.in/be/exp17/index.html
2. http://hecoep.vlabs.ac.in/Experiment8/Theory.html?domain=ElectronicsandCommunicati
ons&lab=Hybrid%20Electronics%20Lab
Available on: http://www.vlab.co.in/broad-area-electronics-and-communications

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 10
Integrated Circuits Lab KEC 551

INDEX

S NO. LIST OF THE EXPERIMENT COs

1. Design the following amplifiers: C01
a) A unity gain amplifier.
b) A non-inverting amplifier with a gain of “A”.
c) An inverting amplifier with a gain of “A”.
2. Study and design Log and antilog amplifiers. CO1
3. Voltage to current and current to voltage convertors. CO1
4. Second order filters using operational amplifier for: (Through CO3
Virtual Lab Link 1)
a) Low pass filter of cutoff frequency 1 KHz.
b) High pass filter of frequency 12 KHz.
5. Realization of Band pass filter with unit gain of pass band from 1 CO3
KHz to 12 KHz.
6. Study and design voltage comparator and zero crossing detectors. CO1
7. Function generator using operational amplifier (sine, triangular & CO1
square wave).
8. Design and construct Astable multivibrator using IC 555 and CO5
a) Plot the output waveform
b) Measure the frequency of oscillation
9. Design and construct a Monostable multivibrator using IC 555 and CO5
a) Plot the output waveform
b) Measure the time delay
10. Implement Schmitt Trigger Circuit using IC 555. CO5
11. Implement voltage-controlled oscillator using IC566 and plot the CO5
waveform.
12. Study and design ramp generator using IC 566. CO5
13. Design and test a PLL to get locked to a given frequency “f”. CO5
Measure the locking range of the system and also measure the
change in phase of the output signal as input frequency is varied
within the lock range.

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 11
Integrated Circuits Lab KEC 551

IC 741 - General Description:

The IC 741 is a high performance monolithic operational amplifier constructed using the
planar epitaxial process. High common mode voltage range and absence of latch-up
tendencies make the IC 741 ideal for use as voltage follower. The high gain and wide range
of operating voltage provides superior performance in integrator, summing amplifier and
general feedback applications.
Pin Configuration:

Block Diagram of Op-Amp:

Features:

1. No frequency compensation is required

2. Short circuit protection
3. Offset voltage null capability
4. Large common mode and differential voltage ranges
5. Lower power consumption
6. No Latch-up

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 12
Integrated Circuits Lab KEC 551

Specifications:-
1. Voltage gain A = ∞ typically 2,00,000
2. Input resistance RL = ∞ Ω, practically 2MΩ
3. Output resistance R =0, practically 75Ω
4. Bandwidth = ∞ Hz. It can be operated at any frequency
5. Common mode rejection ratio = ∞ ; (Ability of op amp to reject noise voltage)
6. Slew rate + ∞ V/μsec ; (Rate of change of O/P voltage with respect to applied I/P)
7. When V1 = V2, VD=0
8. Input offset voltage (Rs ≤ 10KΩ) max 6 mv
9. Input offset current = max 200nA
10. Input bias current : 500nA
11. Input capacitance : typical value 1.4pF
12. Offset voltage adjustment range : ± 15mV
13. Input voltage range : ± 13V
14. Supply voltage rejection ratio : 150 μV/V
15. Output voltage swing: + 13V and – 13V for RL > 2KΩ
16. Output short-circuit current: 25mA
17. Supply current: 28mA
18. Power consumption: 85mW
19. Transient response: rise time = 0.3 μs; Overshoot = 5%

Applications:-
1. AC and DC amplifiers.
2. Active filters.
3. Oscillators.
4. Comparators.
5. Regulator, etc.

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 13
Integrated Circuits Lab KEC 551

IC TL082 - General Description:

These devices are low cost, high speed, dual JFET input operational amplifiers with an
internally trimmed input offset voltage. They require low supply current yet maintain a large
gain bandwidth product and fast slew rate. In addition, well matched high voltage JFET input
devices provide very low input bias and offset currents. The TL082 is pin compatible.

These amplifiers may be used in applications such as high speed integrators, fast D/A
convertors, sample and hold circuits and many other circuits requiring low input offset
voltage, low input bias current, high input impedance, high slew rate and wide bandwidth.
The devices also exhibit low noise and offset voltage drift.

Pin Configuration:

Features:

1. Low input bias and offset current

2. Output Short circuit protection
3. Wide common mode and differential voltage ranges
4. High input impedance JFET input stage
5. Internal frequency compensation
6. Latch up free operation
7. High slew rate: 16V/μs (typical)

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 14
Integrated Circuits Lab KEC 551

Specifications:

1. Internally Trimmed Offset Voltage : 15mV

2. Low Input Bias Current : 50pA
3. Low Input Noise Voltage: 16nV/√𝐻𝑧
4. Low Input Noise Current: 0.01pA/√𝐻𝑧
5. Wide Gain Bandwidth: 4 MHz
6. High Slew Rate: 13V/μs
7. Low Supply Current: 3.6mA
8. High Input Impedance: 1012 𝛺
9. Low Total Harmonic Distortion:≤0.02%
10. Low 1/f Noise Corner: 50Hz
11. Fast Settling time to 0.01%: 2μs

Applications:
1. AC and DC amplifiers.
2. Active filters.
3. Oscillators.
4. Comparators.
5. Regulator, etc.

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 15
Integrated Circuits Lab KEC 551

EXPERIMENT NO. 1

AIM: Design the following amplifiers: a) A unity gain amplifier. b) A non-inverting amplifier with
a gain of “A”. c) An inverting amplifier with a gain of “A”.

APPRATUS:

S.NO TYPE NAME OF RANGE QUANTITY

EQUIPMENT/COMPONENT
1 Analog system lab kit IC TL082 - 1
pro
2 Function generator - 0-30MHz 1
3 Regulated power supply - 0-30V(dual) 1
4 Cathode Ray - 0-30MHz 1
Oscilloscope
5 Patch cards and CRO - - As required
probes

THEORY:
Unity Gain amplifier is a special case of the non-inverting amplifier is the source follower. In this
case, we let the ratio of Rf/R1 go to zero. This is done in practice by replacing Rf with a short
circuit and replacing R1 with an open circuit.
The gain of the amplifier is:
𝑉𝑂
Av = =1
𝑉𝑖

This configuration has the properties of having very high input impedance, very low output
resistance, and unity gain. It is used as a “buffer” to isolate a source from its load. It is very useful
amplifier for the instrumentation circuits.

APPLICATIONS:

It can be used when impedance matching or circuit isolation is more important than amplification as it
maintains the signal voltage.

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 16
Integrated Circuits Lab KEC 551

CIRCUIT DIAGRAM:

Fig 1.1: The source follower buffer circuit

OBSERVATIONS:

Frequency (Hz) Input Voltage(v) Output Voltage(v) Gain (Vo/Vi)

Table 1.1: Observation Table

PROCEDURE:

1. Construct a non-inverting amplifier. Calculate numerically value of inverting amplifier gain.

2. Power the op-amp with +10V and -10V and apply a 1Vp-p, 1 kHz sinusoidal input signal to
the amplifier.
3. Increase the input voltage until distortion occurs at the output. Display 𝑉𝑖𝑛 and 𝑉𝑜𝑢𝑡 at the
same time on the scope. Measure the input voltages Vin and Vout. From this, calculate the
gain of the inverting amplifier.

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 17
Integrated Circuits Lab KEC 551

4. Capture the input, output waveforms for your lab report.

5. The input resistance of non-inverting and buffer amplifier is infinity for ideal op-amp and for
real op-amps this value is very high.
6. Inverting Amplifier:
7. This is the most widely used of all the Op-amp circuits. The output 𝑉𝑜 is fed back to the
inverting input through the 𝑅𝑓 − 𝑅𝑖𝑛 network as shown in figure where 𝑅𝑓 is the
feedback resistor. The input signal 𝑉𝑖𝑛 is applied to the inverting input terminal through
𝑅𝑖𝑛 and non-inverting input terminal of Op-amp is grounded. The output 𝑉𝑜 is given by
𝑅
8. 𝑉𝑜 = 𝑉𝑖 (− 𝑅 𝑓 )
𝑖𝑛
𝑅
9. Where, the gain of amplifier is − 𝑅 𝑓
𝑖𝑛
10. The negative sign indicates a phase-shift of 180 degrees between 𝑉𝑖 and 𝑉𝑜 . The effective
input impedance is Ri. An inverting amplifier uses negative feedback to invert and
amplify a voltage. The 𝑅𝑖𝑛 , 𝑅𝑓 resistor network allows some of the output signal to be
returned to the input. Since the output is 180° out of phase, this amount is effectively
subtracted from the input, thereby reducing the input into the operational amplifier.
This reduces the overall gain of the amplifier and is dubbed negative feedback.

CIRCUIT DIAGRAM:

Fig 1.2: The Inverting Amplifier

OBSERVATION TABLE:
𝑽𝒊 = ________
𝑹𝒊𝒏 = ______
S.NO 𝑹𝒇 OBSERVED 𝑽𝑶 CALCULATED 𝑽𝑶
𝑅𝑓
𝑉𝑜 = 𝑉𝑖 (− )
𝑅𝑖𝑛

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 18
Integrated Circuits Lab KEC 551

Table 1.2 Observation Table

MODEL GRAPH:

Fig 1.3: Input and Output waveform of Inverting Amplifier

Non-Inverting Amplifier:

The circuit diagram of non-inverting amplifier is shown in figure. Here the signal is
applied to the non-inverting input terminal and feedback is given to inverting terminal.
The circuit amplifiers the input signals without inverting it. The output 𝑉𝑜𝑢𝑡 is given by
𝑅2
𝑉𝑜𝑢𝑡 = 𝑉𝑖𝑛 (1 + )
𝑅1
The voltage gain is given by

𝑉𝑂𝑢𝑡 𝑅2
𝐴𝐶𝐿 = = [1 + ]
𝑉𝑖𝑛 𝑅1

Compared to the inverting amplifier, the input resistance of the non-inverting is extremely
large.

CIRCUIT DIAGRAM:
Department of Electronics & Communication Engineering, NIET Gr. NOIDA
Page 19
Integrated Circuits Lab KEC 551

Fig 1.4: The Non-Inverting Amplifier

OBSERVATION TABLE:

S.NO 𝑹𝒇 OBSERVED 𝑽𝑶 CALCULATED 𝑽𝑶

𝑅2
𝑉𝑜𝑢𝑡 = 𝑉𝑖𝑛 (1 + )
𝑅1

1. 𝑽𝒊 = ________
𝟐. 𝑹𝒊𝒏 = ______
Table 1.3 Observation Table
MODEL GRAPH:

Fig 1.5: Input and Output waveform of Non-Inverting Amplifier

PROCEDURE:

Inverting and Non-inverting amplifier

1. Make connections as given in fig 1 and 2 for inverting and non-inverting amplifiers
respectively.
2. Give sine wave input of 𝑉𝑖 volts using AFO with the frequency of 1 kHz.
3. The output voltage 𝑉𝑜 observed on a CRO. A dual channel CRO to be used to see 𝑉𝑖 and 𝑉𝑜 .
4. Vary 𝑅𝑓 and measure the corresponding 𝑉𝑜 and observe the phase of 𝑉𝑜 with respect to 𝑉𝑜 .
5. Tabulate the readings and verify with theoretical values.

PRECAUTIONS:
1. Avoid loose connections.
2. Handle the ASLK KIT with carefully.

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 20
Integrated Circuits Lab KEC 551

3. Check the Power supply polarities and Switch ON after connections once verified.

RESULT: The unity gain amplifier, Inverting & Non-inverting amplifiers has been designed and
studied.

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 21
Integrated Circuits Lab KEC 551

EXPERIMENT NO. 2

AIM: Study and design Log and antilog amplifiers.

APPRATUS:

S.NO TYPE NAME OF RANGE QUANTITY

EQUIPMENT/COMPONENT
1 Analog system lab kit IC TL082 - 1
pro
2 Function generator - 0-30MHz 1
3 Regulated power supply - 0-30V(dual) 1
4 Cathode Ray - 0-30MHz 1
Oscilloscope
5 Patch cards and CRO - - As required
probes

THEORY:

Logarithmic Amplifier:

Log amplifiers are widely used for analog signal compression applications. When a diode used in
the feedback loop of an operational amplifier is forward biased by a constant current of
magnitude 𝑉𝑖 ⁄𝑅 then it develops a potential

𝑉𝑖
𝑉𝐷 = 𝑉𝑇 𝑙𝑛 ( )
𝑅𝐼0

across the diode. Note that the input voltage and diode voltage are related in a logarithmic
fashion. If we take the diode voltage as an output voltage then the input and output will be
related in a logarithmic fashion.

The base emitter junction of a bipolar junction transistor can be used as diode when collector and
base are shorted. So a transistor can also be used in the feedback loop of an op-amp.

Anti-Logarithmic Amplifier:

Antilog is inverse operation of log operation so; antilog amplifiers can be designed by reversing
the arrangement of diodes and resistors in the log amplifiers. It is important to note that a single
Department of Electronics & Communication Engineering, NIET Gr. NOIDA
Page 22
Integrated Circuits Lab KEC 551

polarity of current can only forward bias the diode. That means the log operation or antilog
operation is single quadrant operation.

Log Amplifier using Diode

Fig 2.1: Log-Amplifier

PROCEDURE:

1. Set the supply voltage at +12V.

2. Set the input voltage to 1V.
3. See the voltage across the diode. Note the negative sign.
4. Increase the input voltage in the step of 1V up to 20V.
5. Plot the characteristics of input voltage and output voltage.
6. Reverse the polarity of the diode and see the effect for positive input voltage.

Anti-log Amplifier

Fig 2.2: Antilog Amplifier

PROCEDURE:

1. Set the input voltage to 100mV.

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 23
Integrated Circuits Lab KEC 551

2. See the voltage across the Resistor. Note the negative sign.
3. Increase the input voltage in the step of 50mV up to 500mV.
4. Plot the characteristics of input voltage and output voltage.
5. Reverse the polarity of the diode and see the effect for positive input voltage.

PRECAUTIONS:
1. Avoid loose connections.
2. Handle the ASLK KIT with carefully
3. Check the Power supply polarities and Switch ON after connections once verified

RESULT:

The experiment has been performed and successfully verified.

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 24
Integrated Circuits Lab KEC 551

EXPERIMENT NO. 3

AIM: Design and study voltage to current and current to voltage convertors.

APPARATUS:

S.NO TYPE NAME OF RANGE QUANTITY

EQUIPMENT/COMPONENT
1 Analog system lab kit IC TL081C - 1
2 Function generator - 0-30MHz 1
3 Regulated power supply - 0-30V(dual) 1
4 CATHODE RAY - 0-30MHz 1
OSCILLOSCOPE
5 Patch cards and CRO - - As required
probes

SOFTWARE USED: TINA 90(PSPICE)

THEORY:

Voltage to Current convertor (Trans-conductance Amplifier):

A voltage to current converter in which load resistor RL is floating (not connected to ground).
The input voltage is applied to the non-inverting input terminal and the feedback voltage across
R drives the inverting input terminal. This circuit is also called a current series negative
feedback, amplifier because the feedback voltage across R depends on the output current iL and
is in series with the input difference voltage vd.
Writing the voltage equation for the input loop.

𝑉𝑖𝑛 = 𝑉𝑑 + 𝑉𝑓

But 𝑉𝑑 ≫ since A is very large, therefore,

𝑉𝑖𝑛 = 𝑉𝑓

𝑉𝑖𝑛 = 𝑅𝑖𝑖𝑛

𝑉𝑖𝑛
𝑖𝑖𝑛 =
𝑅

and since input current is zero.

Department of Electronics & Communication Engineering, NIET Gr. NOIDA
Page 25
Integrated Circuits Lab KEC 551

𝑉𝑖𝑛
𝑖𝐿 = 𝑖𝑖𝑛 =
𝑅

The value of load resistance does not appear in this equation. Therefore, the output current is
independent of the value of load resistance. Thus the input voltage is converted into current; the
source must be capable of supplying this load current.

CIRCUIT DIAGRAM:

Fig3.1: V to I Convertor

Current to Voltage converter (Trans-impedance amplifier).

An active current to voltage converter (trans-impedance amplifier) is based on active elements

like BJTs, FETs or an op-amp. Trans-impedance amplifier using opamp is the commonly used
one. The circuit diagram of an op-amp based current to voltage converter is shown below.

𝑉𝑜𝑢𝑡 = 𝑅𝑖𝑖𝑛

CIRCUIT DIAGRAM:

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 26
Integrated Circuits Lab KEC 551

Fig3.2: Simplified I to V Convertor

Where RL = 10KΩ , R = 10KΩ,

PROCEDURE:

1. Connect the components/equipment as shown in the circuit diagram.

2. Switch ON the power supply.
3. Using multi-meter find the value of input voltage/current, then apply the input to the
circuit of V to I / I to V convertor.
4. Then calculate the value of output current/voltage using multi-meter.
5. Do the 5-6 entries in the observation table.
6. Calculate the Gain corresponding to every input.
7. At the end do the p-spice simulation on TINA 90 software.

OBSERVATION TABLE:
For V to I convertor:

S.NO Vin Iout Gain= Vin/Iout

For I to V convertor:

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 27
Integrated Circuits Lab KEC 551

S.NO Iin Vout Gain= Iin/Vout

CALCULATIONS:
Gain= Vin/Iout (for V to I convertor)
Gain= Iin/Vout (for I to V Convertor)

PRECAUTIONS:

1. Avoid loose connections.

2. Check the Power supply and Switch ON after connections once verified.

RESULT: The V to I convertor and I to V convertor is designed, studied and observed

successfully.

POST EXPERIMENT QUESTIONS:

1. What is the other name of V to I convertor?

2. What is the other name of I to V convertor?
3. List few applications of V to I and I to V convertor.

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 28
Integrated Circuits Lab KEC 551

EXPERIMENT NO. 4

AIM: Second order filters using operational amplifier in universal active filter topology for-

a) Low pass filter of specified cut off frequency of 1kHz.

b) High pass filter of specified frequency 12kHz.

APPARATUS:

S.NO TYPE NAME OF RANGE QUANTITY

EQUIPMENT/COMPONENT
1 Analog system lab kit IC TL081C - 1
2 Function generator - 0-30MHz 1
3 Regulated power supply - 0-30V(dual) 1
4 CATHODE RAY - 0-30MHz 1
OSCILLOSCOPE
5 Patch cards and CRO - - As required
probes

SOFTWARE USED: TINA 90(PSPICE)

THEORY:

A filter is a circuit that produces a prescribed frequency response as described in the experiment on
Passive Filters. Passive filters are combination circuits containing only resistors, inductors, and
capacitors (RLC). Active filters contain resistance and capacitance plus circuit elements that
provide gain, such as transistors or operational amplifiers. The major advantage of active filters is
that they can achieve frequency response characteristics that are nearly ideal and for reasonable
cost for frequency up to about 100 kHz. Above this, active filters are limited by bandwidth.

Active filters can be designed to optimize any of several characteristics. These include
flatness of the response in the pass band, steepness of the transition region, or minimum phase
shift. The Butterworth form of filter has the flattest pass band characteristic, but is not as steep as
other filters and has poor phase characteristics. Since a flat pass band is generally the most
important characteristic, it will be used in this experiment.

The order of a filter, also called the number of poles, governs the steepness of the transition outside
the frequencies of interest. In general, the higher the order, the steeper the response. The roll-off
Department of Electronics & Communication Engineering, NIET Gr. NOIDA
Page 29
Integrated Circuits Lab KEC 551

rate for active filters depends on the type of filter but is approximately – 20dB/decade for each
pole. (A decade is a factor of 10 in frequency). A four pole filter, for example, has a roll-off of
approximately – 80dB/decade. A quick way to determine the number of poles is to count the
number of capacitors that are used in the frequency-determining part of the filter.

Figure 3.1 illustrates a two-pole active low-pass and a two-pole active high-pass filter. Each
of these circuits is a section. To make a filter with more poles, simply cascade these sections.

(a) Second Order Low-Pass Filter (b) Second Order High-Pass Filter

Fig4.1 Second Order Filter

Useful Relationships:

1
fc  (Single-pole filter) (2.1)
2 RC

1
fc  (Two-pole filter) (2.2)
2 R1 R2C1C2

Vout
ACL  (2.3)
Vin

ACL ( dB )  20 log ACL (2.4)

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 30
Integrated Circuits Lab KEC 551

PROCEDURE:

3.1 Second Order Low-Pass Active Filter

1. Calculate theoretical cutoff frequency for Second Order Low Pass Filter shown in
figure 3.1 and record it.
2. Construct circuit shown in Figure 3.1. Connect the function generator at input.
Adjust the function generator to produce 1 Vp sine wave at 500 Hz.
3. Increase the frequency from function generator until the output voltage V 0 is equal
to 0.707 times the input voltage. The frequency where this occurs is the cutoff
frequency of the filter. Measure and record this frequency, input voltage, output
voltage.
4. Set the frequency, measure and record input and output voltage.
5. Use the values to calculate the voltage gain, A and AdB . Complete TABLE and
plot the ideal and experiment voltage gain versus frequency.

C2

0.022uF

+15V
7

2
R1 R2 -
6
OUT PUT,Vout
3
+
IN PUT,Vin
LM741
15k 15k
4

C1 -15V
0.01uF

Fig 4.2 Second Order Low-pass filter

3.2 Second Order High-Pass Active Filter

1. Calculate theoretical cutoff frequency for Second Order High Pass Filter shown in Figure 3.2
and record in TABLE 2.
2. Construct circuit shown in Figure 3.2. Connect the function generator at input. Adjust the
function generator to produce 1 Vp sine wave at 1kHz.

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 31
Integrated Circuits Lab KEC 551

3. Increase the frequency from function generator until the output voltage V 0 is equal to 0.707
times the input voltage. The frequency where this occurs is the cutoff frequency of the filter.
Measure and record this frequency, input voltage, output voltage in TABLE 1 and TABLE 2.
4. Set the frequency to the value in TABLE 1, measure and record input and output voltage.
Complete TABLE 2.
5. Use the values to calculate the voltage gain, A and AdB . Complete TABLE 1 and plot the
ideal and experiment voltage gain versus frequency on GRAPH 2.

R1

10k

+15V

7
2
C1 C2 -
6
OUT PUT,Vout
3
+
IN PUT,Vin
LM741
0.01uF 0.01uF
4
R2
22k -15V

Fig4.3 Second Order High-pass filter

OBSERVATION TABLE:

Frequency Frequency (Experiment)

(Calculated)

1
fC LPF 
2 R1R2C1C2 Vout  0.707Vin

TABLE 1: Second Order Low-Pass Filter

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 32
Integrated Circuits Lab KEC 551

Frequency Frequency (Experiment)

(Calculated)

1
fC LPF 
2 R1R2C1C2 Vout  0.707Vin

TABLE 2: Second Order High-Pass Filter

PRECAUTIONS:

1. Avoid loose connections.

2. Check the Power supply and Switch ON after connections once verified.

RESULTS:
Low pass filter and high pass filter is designed and studied successfully. The magnitude and gain of
the filter is also calculated.

POST EXPERIMENT QUESTIONS:

1. What is a filter circuit?

2. Classify various filters?
3. Calculate the cut-off frequency of low pass filter.
4. What is 3db frequency.
5. Why active filters are preferred over passive active?
6. Discuss the effect of order of the filter on frequency response.
7. How will you vary Q factor of the frequency response.
8. Discuss the need for going to Sallen Key circuit.
9. Compare the performance of Butterworth filter with that of Chebyshev filter.

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 33
Integrated Circuits Lab KEC 551

EXPERIMENT NO. 5

AIM: Realization of Band pass filter with unit gain of pass band from 1 KHz to 12 KHz.

APPARATUS:

S.NO TYPE NAME OF RANGE QUANTITY

EQUIPMENT/COMPONENT
1 Analog system lab kit IC TL081C - 1
2 Function generator - 0-30MHz 1
3 Regulated power supply - 0-30V(dual) 1
4 CATHODE RAY - 0-30MHz 1
OSCILLOSCOPE
5 Patch cards and CRO - - As required
probes

SOFTWARE USED: TINA 90(PSPICE)

THEORY:

Band pass is an adjective that describes a type of filter or filtering process; it is to be

distinguished from pass band which refers to the actual portion of affected spectrum. Hence, one
might say "A dual band pass filter has two pass bands." A band pass signal is a signal containing
a band of frequencies not adjacent to zero frequency, such as a signal that comes out of a band
pass filter.
An ideal band pass filter would have a completely flat pass band (e.g. with no gain/attenuation
throughout) and would completely attenuate all frequencies outside the pass band. Additionally,
the transition out of the pass band would have brick wall characteristics. The bandwidth of the
filter is simply the difference between the upper and lower cutoff frequencies. The shape factor is
the ratio of bandwidths measured using two different attenuation values to determine the cutoff
frequency, e.g., a shape factor of 2:1 at 30/3 dB means the bandwidth measured between
frequencies at 30 dB attenuation is twice that measured between frequencies at 3 dB attenuation.
A band-pass filter can be characterized by its Q factor. The Q-factor is the inverse of the
fractional bandwidth. A high-Q filter will have a narrow pass band and a low-Q filter will have a
wide pass band. These are respectively referred to as narrow-band and wide-band filters.

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 34
Integrated Circuits Lab KEC 551

MODEL GRAPH:

Fig5.1: Second Order Butterworth Band Pass Filter frequency Response

CIRCUIT DIAGRAM:

Fig5.2: Second Order Butterworth Band Pass Filter

PROCEDURE:

1. Connect the circuit as per circuit diagram

2. Frequency response:
a. Apply a sine wave of fixed amplitude as a input signal
b. Obtain the gain bandwidth product of individual amplifiers.

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 35
Integrated Circuits Lab KEC 551

3. Calculate the gain in dB for wide range of frequencies for the configuration of op-amp
4. Plot the frequency response of op-amp for configuration.

OBSERVATIONS:

Frequency(Hz) Output voltage(v) Gain(Vo/Vi) Magnitude in db

TABLE 5.1: Second Order Butterworth Band Pass Filter

PRECAUTIONS:

1. Avoid loose connections.

2. Check the Power supply and Switch ON after connections once verified.

RESULT:

Band pass filter is designed and studied successfully. The magnitude and gain of the filter is also
calculated.

POST EXPERIMENT QUESTIONS:

1. Define a filter. How are filters classifieds?

2. What is a pass band and a stop band for a filter?
3. What are the advantages of active over passive ones?
4. What is the Butterworth response?
5. List the most commonly used filters.

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 36
Integrated Circuits Lab KEC 551

EXPERIMENT NO. 6

AIM: Study and design voltage comparator and zero crossing detectors.

APPRATUS:

S.NO TYPE NAME OF RANGE QUANTITY

EQUIPMENT/COMPONENT
1 Analog system lab kit IC TL082 - 1
pro
2 Function generator - 0-30MHz 1
3 Regulated power supply - 0-30V(dual) 1
4 Cathode Ray - 0-30MHz 1
Oscilloscope
5 Patch cards and CRO - - As required
probes

THEORY:

Voltage Comparator:

A comparator is a circuit which compares a signal voltage applied at one input of an op-amp
with output ± 𝑉𝑠𝑎𝑡 = (𝑉𝑐𝑐 ). If the signal is applied to the inverting terminal of the op-amp it is
called inverting comparator and if the signal is applied to non-inverting terminal of the op-amp it
is called non-inverting comparator. In an inverting comparator, if an input signal is less than
reference voltage output will be +𝑉𝑠𝑎𝑡 . When input signal voltage is greater than reference
voltage output will be –𝑉𝑠𝑎𝑡 . The vice-versa takes place in non-inverting comparator.

In theory, a standard op-amp operating in open-loop configuration (without negative feedback)

may be used as a low-performance comparator. When the non-inverting input (V+) is at a higher
voltage than the inverting input (V-), the high gain of the op-amp causes the output to saturate at
the highest positive voltage it can output. When the non-inverting input (V+) drops below the
inverting input (V-), the output saturates at the most negative voltage it can output. The op-amp's
output voltage is limited by the supply voltage.

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 37
Integrated Circuits Lab KEC 551

CIRCUIT DIAGRAM:

Fig 6.1: Voltage Comparator

PROCEDURE:

1. Connect the circuit as shown in the figure.

2. Connect an alternating waveform to the non-inverting input of the op-amp.
3. Connect a reference voltage source to inverting input of the op-amp.
4. Plot the input and output waveform.

WAVE FORM:

Fig 6.2: Input and Output Waveform of Voltage Comparator

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 38
Integrated Circuits Lab KEC 551

2. ZERO CROSSING DETECTORS

Theory:
Zero crossing comparator (ZCD) is an application of voltage comparator. It converts any time
varying signal to the square of same time period with amplitude ±𝑉𝑠𝑎𝑡 . The reference voltage is set
as zero volts. When the polarity of the input signal changes, output square wave changes polarity.
Zero-crossing detector is an applied form of comparator. Either of the op-amp basic comparator
circuits discussed can be employed as the zero-crossing detector provided the reference voltage
𝑉𝑟𝑒𝑓 is made zero. Zero-crossing detector using inverting op-amp comparator is depicted in figure.
The output voltage waveform shown in figure indicates when and in what direction an input signal
𝑉𝑖𝑛 crosses zero volts.

Fig 6.3: Zero Crossing Detector

In some applications the input signal may be low frequency one (i.e. input may be a slowly
changing waveform). In such a case output voltage 𝑉𝑜𝑢𝑡 may not switch quickly from one
saturation state to the other. Because of the noise at the input terminals of the op-amp, there may be
fluctuation in output voltage between two saturation states (+𝑉𝑠𝑎𝑡 and – 𝑉𝑠𝑎𝑡 voltages). Thus zero
crossings may be detected for noise voltages as well as input signal 𝑉𝑖𝑛 .

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 39
Integrated Circuits Lab KEC 551

Both of these problems can be overcome, if we use regenerative or positive feeding causing the
output voltage 𝑉𝑜𝑢𝑡 to change faster and eliminating the false output transitions that maybe caused
due to noise at the input of the op-amp.

PROCEDURE:
1. Connect the circuit as shown in figure
2. Connect the input to a signal generator generating a sin wave with one volt peak to peak
at 1 kHz.
3. Connect the input and output to dual channel CRO and compare the input and output.
4. Plot the input and output waveform in a graph.

OUTPUT WAVEFORMS:

Fig 6.4: Input and Output Waveform of Zero Crossing Detector

PRECAUTIONS:
1. Avoid loose connections.
2. Handle the ASLK KIT with carefully.
3. Check the Power supply polarities and Switch ON after connections once verified.

RESULT:
Thus, the use of op-amp as Voltage Comparator zero crossing detectors was studied.

POST EXPERIMENT QUESTIONS:

1. Explain what is an operational amplifier?

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 40
Integrated Circuits Lab KEC 551

2. State assumptions made for analyzing ideal op-amp?

3. Explain what are differential gain and common-mode gain of a differential amplifier?
4. Define cmrr?
5. Explain why does an op-amp have high cmrr?
6. Explain why open-loop op-amp configurations are not used in linear applications?
7. List the parameters that should be considered for ac and dc applications?
8. Define offset voltage as applied to an op-amp?
9. Define slew rate?
10. Explain what is a voltage follower?
11. Explain what are the advantages of using a voltage follower amplifier?
12. In explain what way is the voltage follower a special case of the non-inverting amplifier?
13. Explain what is an inverting amplifier?
14. Explain what are the applications of an inverting amplifier?
15. Explain what is a differential amplifier?
16. Give examples of linear circuits?
17. Explain what is an adder or summing amplifier?
18. Explain what is an integrator?
19. Explain what are the applications of integrator?
20. Op-amp is used mostly as an integrator than a differentiation. Explain why?
21. What is characteristic of ideal op amp?

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 41
Integrated Circuits Lab KEC 551

EXPERIMENT NO. 7

AIM: Function generator using operational amplifier (sine, triangular & square wave).

APPARATUS:

S.NO TYPE NAME OF RANGE QUANTITY

EQUIPMENT/COMPONENT
1 Analog system lab kit IC TL081C - 1
2 Function generator - 0-30MHz 1
3 Regulated power supply - 0-30V(dual) 1
4 CATHODE RAY - 0-30MHz 1
OSCILLOSCOPE
5 Patch cards and CRO - - As
probes required

SOFTWARE USED: TINA 90(PSPICE)

THEORY:

For function generator: A function generator is a circuit that can generate waveforms of a fixed
frequency (depends on the selection of the components) at its output and these waveforms can be
of different shapes e.g. square wave and triangular wave. Function generator can be made using
two op-amps. In this an inverting integrator is used and a non-inverting bistable multivibrator is
used in its feedback path as shown in fig: 1.1.At Vo1 output square wave can be obtained and at
V02 triangular wave can be obtained.

Fig: 1.2 is the alternative circuit for the function generator in which square wave is obtained at
the output of astable multivibrator (first op-amp), and this is fed to the input of integrator to get
the triangular wave output.

For VCO: The voltage controlled oscillator can be obtained using multiplier in the feedback
loop of bistable multiplier as shown in fig 1.3.If no input signal is given to the VCO then it
works in free running mode, and if the input modulating signal is given to the VCO then it can
work as a FSK (frequency shift keying) Generator.

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 42
Integrated Circuits Lab KEC 551

CIRCUIT DIAGRAM:

Fig7.1: Function Generator that can generate square wave and triangular wave

ALTERNATIVE CIRCUIT DIAGRAM:

Fig7.2: Function Generator that can generate square wave and triangular wave

VCO- VOLTAGE CONTROLLED OSCILLATOR:

Fig7.3: VCO

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 43
Integrated Circuits Lab KEC 551

PROCEDURE:

For Square and Triangular Wave Generation:

1. Connect the circuit as per the circuit diagram shown in Fig 7.1.
2. Observe square wave at Vo1 and Triangular wave at Vo2 as shown in fig 7.2.
3. Plot the waveforms on trace paper.
4. Calculate the output frequency theoretically and compare them with the practical one.
5. At the end simulate the circuit on TINA 90 Software and compare the simulated result
with the practical result.

For VCO:

1. Connect the circuit as per the circuit diagram shown in fig 7.3.
2. At VF1 and VF2 we get the output waveform(those are FSK modulated according to
applied input at VG1)
3. Note down the output waveforms frequency when input VG1 is not given to it, that is the
free running frequency.
4. Now see the output frequency variations when different inputs are given to it.
5. At the end simulate the circuit on TINA 90 Software and compare the simulated result
with the practical result.

EXPECTED WAVEFORMS:

Fig 7.4: Waveform for function generator

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 44
Integrated Circuits Lab KEC 551

Fig7.5: Waveform for FSK modulated VCO output

CALCULATIONS:

𝑅1
𝑓=
4𝑅2 𝑅3 𝐶

OBSERVATION TABLE:
𝑅1
S.NO 𝑅1 𝑅2 𝐶 𝑓=
4𝑅2 𝑅3 𝐶

PRECAUTIONS:
1. Avoid loose connections.
2. Check the Power supply and Switch ON after connections once verified.

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 45
Integrated Circuits Lab KEC 551

RESULT/CONCLUSION:
A function generator is designed and tested to generate square wave and triangular wave.

POST EXPERIMENT QUESTIONS:

1. What is the other name of square wave generator?

2. What is the effect of slew rate of the op-amp in the square wave generator?
3. Which component is required to convert a square wav generator into a triangular wave?
4. What is a comparator?
5. When input of a square wave generator is a D.C signal, then what is the output of a
square wave generator?

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 46
Integrated Circuits Lab KEC 551

EXPERIMENT NO. 8

AIM: Design and construct Astable multivibrator using IC 555 and

a) Plot the output waveform
b) Measure the frequency of oscillation

APPARATUS:

S.NO NAME OF RANGE QUANTITY

EQUIPMENT/COMPONENT
1. Breadboard - 1
2. 555 Timer IC 4.5V-15V 1
3. Resistors  1
4. Capacitor 0.1μ,0.01μ,0.001p,100,100μ 1
5. Diode IN4007 1
6. Dual Regulated D.C power 0-30V(dual) 1
supply
7. CATHODE RAY 0-30MHz 1
OSCILLOSCOPE
8. Function generator 0-30MHz 1
9. Connecting Wires and CRO - As required
probes

SOFTWARE USED: TINA 90(PSPICE)

THEORY:
555 is a very commonly used IC for generating accurate timing pulses. It is an 8pin timer
IC.The 555 has three operating modes:
1. Monostable mode
2. Astable — free running mode
3. Bistable mode or Schmitt trigger

The input/output relationships for the various multivibrators are shown in Figure 5.1

Fig 8.1: Different Multivibrators

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 47
Integrated Circuits Lab KEC 551

ASTABLE MULTIVIBRATOR

The astable multivibrator generates a square wave, the period of which is determined by the
circuit external to IC 555. The astable multivibrator does not require any external trigger to
change the state of the output. Hence the name free running oscillator. The time during which the
output is either high or low is determined by the two resistors and a capacitor which are
externally connected to the 555 timer.
CIRCUIT DIAGRAM:

Fig 8.2: Response of Astable Multivibrator

R1=10KΩ, R2=100KΩ, C=0.1 μf, C1=0.01 pf

OBSERVATIONS:

INPUT OUTPUT
AMPLITUDE TIME PERIOD AMPLITUDE TIME PERIOD
ON OFF CHARGING DISCHARGING
TIME TIME TIME TIME

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 48
Integrated Circuits Lab KEC 551

Table 2: Observation Table of Astable Multivibrator

MODEL GRAPH:

Fig 8.3: Response of Astable Multivibrator

PROCEDURE:
1. Connections are made as per the circuit diagram.
2. A supply voltage of 5v to be given.
3. The output waveform sat pin3 and pin 2 are observed on a CRO.
4. Measure Ton and Toff of the waveform.

PRECAUTIONS:
1. Check the continuity of the connecting terminals before connecting them.
2. Keep the band switches of the C.R.O. and adjust the value of R3 such that steady wave
forms are observed on the screen.
3. Observe the output sine wave on the screen of CRO and measure the horizontal length
accurately.

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 49
Integrated Circuits Lab KEC 551

RESULT:
Thus the Astable multivibrator circuits are designed and constructed and the output waveforms
are drawn.

POST EXPERIMENT QUESTIONS:

1. Define Duty Cycle?

2. What are the other applications of 555 timer?
3. Draw the internal circuit diagram of 555 timer?
4. Explain the operation of 555 timer?
5. Explain the function of reset?
6. Derive the expression for time delay of monostable multivibrator?
7. Discuss the applications of timer in monostable multivibrator?
8. Give methods for obtaining symmetrical square wave?
9. What are the modes of operation of a 555 timer?
10. Discuss the operation of a FSK generator using timer?
11. Draw the circuit of Schmitt trigger using timer and explain its operation?

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 50
Integrated Circuits Lab KEC 551

EXPERIMENT NO. 9

AIM: Design and construct a Monostable multivibrator using IC 555 and

a) Plot the output waveform
b) Measure the time delay

APPARATUS:

S.NO NAME OF RANGE QUANTITY

EQUIPMENT/COMPONENT
1. Breadboard - 1
2. 555 Timer IC 4.5V-15V 1
3. Resistors  1
4. Capacitor 0.1μ,0.01μ,0.001p,100,100μ 1
5. Diode IN4007 1
6. Dual Regulated D.C power 0-30V(dual) 1
supply
7. CATHODE RAY 0-30MHz 1
OSCILLOSCOPE
8. Function generator 0-30MHz 1
9. Connecting Wires and CRO - As required
probes

SOFTWARE USED: TINA 90(PSPICE)

THEORY:

555 is a very commonly used IC for generating accurate timing pulses. It is an 8pin timer
IC.The 555 has three operating modes:
4. Monostable mode
5. Astable — free running mode
6. Bistable mode or Schmitt trigger

The input/output relationships for the various multivibrators are shown in Figure 5.1

Fig 9.1: Different Multivibrators

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 51
Integrated Circuits Lab KEC 551

MONOSTABLE MULTIVIBRATOR

Monostable multivibrator often called a one shot multivibrator is a pulse generating circuit in
which the duration of this pulse is determined by the RC network connected externally to the 555
timer. In a stable or standby state, the output of the circuit is approximately zero or a logic-low
level. When external trigger pulse is applied output is forced to go high (Vcc). The time for
which output remains high is determined by the external RC network connected to the timer. At
the end of the timing interval, the output automatically reverts back to its logic-low stable state.
The output stays low until trigger pulse is again applied. Then the cycle repeats. The monostable
circuit has only one stable state (output low) hence the name monostable.

DESIGN OF MONOSTABLE MULTIVIBRATOR

Time period of pulse=T=1.1RC=10ms

Let C=100f
T=1.1RC
10ms=1.1*R*100f
R=100K

CIRCUIT DIAGRAM:

Fig 9.2:Monostable Multivibrator

Cl = .0lμf, C2 = 100μf, C3 = .001pf

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 52
Integrated Circuits Lab KEC 551

OBSERVATIONS:

INPUT OUTPUT
AMPLITUDE TIME PERIOD AMPLITUDE TIME PERIOD

Table 1: Observation Table of Monostable Multivibrator

MODEL GRAPH:

Fig 9.3: Response of Monostable Multivibrator

PROCEDURE:

1. Connections are made as per the circuit diagram.

2. A trigger pulse is given to pin No 2.
3. Note the time for which the LED glows and note down Ton.

PRECAUTIONS:
4. Check the continuity of the connecting terminals before connecting them.
5. Keep the band switches of the C.R.O. and adjust the value of R3 such that steady wave
forms are observed on the screen.
6. Observe the output sine wave on the screen of CRO and measure the horizontal length

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 53
Integrated Circuits Lab KEC 551

accurately.

RESULT:
Thus the Monostable multivibrator and Astable multivibrator circuits are designed and
constructed and the output waveforms are drawn.

POST EXPERIMENT QUESTIONS:

1. Define Duty Cycle?

2. What are the other applications of 555 timer?
3. Draw the internal circuit diagram of 555 timer?
4. Explain the operation of 555 timer?
5. Explain the function of reset?
6. Derive the expression for time delay of monostable multivibrator?
7. Discuss the applications of timer in monostable multivibrator?
8. Give methods for obtaining symmetrical square wave?
9. What are the modes of operation of a 555 timer?
10. Discuss the operation of a FSK generator using timer?
11. Draw the circuit of Schmitt trigger using timer and explain its operation?

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 54
Integrated Circuits Lab KEC 551

EXPERIMENT NO. 10

AIM: Implement Schmitt Trigger Circuit using IC 555.

APPARATUS:

S.NO NAME OF RANGE QUANTITY

EQUIPMENT/COMPONENT
1. Breadboard - 1
2. 555 Timer IC 4.5V-15V 1
3. Resistors  1
4. Capacitor 0.1μ,0.01μ,0.001p,100,100μ 1
5. Diode IN4007 1
6. Dual Regulated D.C power 0-30V(dual) 1
supply
7. CATHODE RAY 0-30MHz 1
OSCILLOSCOPE
8. Function generator 0-30MHz 1
9. Connecting Wires and CRO - As required
probes

SOFTWARE USED: TINA 90(PSPICE)

THEORY

Schmitt can be constructed from a 555 timer. Some of the other function of the 555 timer, apart
from the timer operation, is to use the two internal comparators as independent units to form a
Schmitt Trigger. The general operation of the Schmitt trigger built from a 555 timer is inverting
but the discussion will be for non-inverting.

Pins 4 and 8 are connected to the supply (VCC). The pins 2 and 6 are tied together and the input
is given to this common point through a capacitor C. this common point is supplied with an
external bias voltage of VCC / 2 with the help of the voltage divider circuit formed by the
resistors R1 and R2.
Inverting Schmitt Trigger

The normal operation of the 555 timer as a Schmitt trigger is inverting in nature. When the
trigger input, which is same as the external input, falls below the threshold value of 1/3 VCC, the
output of the lower comparator goes high and the flip-flop is SET and the output at pin 3 goes
high.

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 55
Integrated Circuits Lab KEC 551

Similarly, when the threshold input, which is same as the external input, rises above the
threshold value of 2/3 VCC, the output of the upper comparator goes high and the flip-flop is
RESET and the output at pin 3 goes low.

The waveform of the inverting Schmitt trigger is shown below.

CIRCUIT DIAGRAM:

Fig10.1: Schmitt Trigger Circuit using IC 555.

MODEL WAVEFORM:

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 56
Integrated Circuits Lab KEC 551

Fig10.2: Schmitt Trigger Circuit waveform using IC 555.

PROCEDURE:
1. Build the circuit on Bread-Board as shown in circuit diagram.
2. Measure the Input Frequency & voltage.
3. Vary the resistance & Capacitances
4. Plot output wave forms on graph sheet.

PRECAUTIONS:
1. Avoid loose connections.
2. Handle the ASLK KIT with carefully
3. Check the Power supply polarities and Switch ON after connections once verified.

RESULT
Schmitt Trigger Circuit using IC 555 has been designed.

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 57
Integrated Circuits Lab KEC 551

POST EXPERIMENT QUESTIONS:

1. What is Schmitt Trigger?

2. Define Hysteresis Width.
3. Draw the Inverting & Non-Inverting Schmitt Trigger Circuit using IC 555.
4. What is UTH & LTH for Schmitt Trigger Circuit using IC 555?
5. Draw the circuit diagram for Inverting & Non-Inverting Schmitt Trigger using Op-Amp.

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 58
Integrated Circuits Lab KEC 551

EXPERIMENT NO. 11

AIM: Implement voltage-controlled oscillator using IC566 and plot the waveform.

APPARATUS:

S.NO NAME OF RANGE QUANTITY

EQUIPMENT/COMPONENT
1. Breadboard - 1
2. IC 566 4.5V-15V 1
3. Resistors  1
4. Capacitor 0.1μ,0.01μ,0.001p,100,100μ 1
5. Diode IN4007 1
6. Dual Regulated D.C power 0-30V(dual) 1
supply
7. CATHODE RAY 0-30MHz 1
OSCILLOSCOPE
8. Function generator 0-30MHz 1
9. Connecting Wires and CRO - As required
probes

SOFTWARE USED: TINA 90(PSPICE)

THEORY

A PLL is a feedback system that includes a VCO, phase detector, and low pass filter within its
loop. Its purpose is to force the VCO to replicate and track the frequency and phase at the input
when in lock. The PLL is a control system allowing one oscillator to track with another. It is
possible to have a phase offset between input and output, but when locked, the frequencies must
exactly track.

𝜑𝑜𝑢𝑡 (𝑡) = 𝜑𝑖𝑛 (𝑡) + 𝑐𝑜𝑛𝑠𝑡.

𝜔𝑜𝑢𝑡 (𝑡) = 𝜔𝑖𝑛 (𝑡)

The PLL output can be taken from either Vcont, the filtered (almost DC) VCO control voltage, or
from the output of the VCO depending on the application. The former provides a baseband
output that tracks the phase variation at the input. The VCO output can be used as a local

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 59
Integrated Circuits Lab KEC 551

oscillator or to generate a clock signal for a digital system. Either phase or frequency can be used
as the input or output variables.

Of course, phase and frequency are interrelated by:

𝑑𝜑
𝜔 (𝑡 ) =
𝑑𝑡
𝑡

𝜑(𝑡) = 𝜑(0) + ∫ 𝑤(𝑡 ′ )𝑑𝑡 ′

0
APPLICATIONS:
There are many applications for the PLL,
VCO: In PLL applications, the VCO is treated as a linear, time-invariant system. Excess phase
of the VCO is the system output.
LOCK Range: Range of input signal frequencies over which the loop remains locked once it
has captured the input signal. This can be limited either by the phase detector or the VCO
frequency range.
Capture Range: Range of input frequencies around the VCO center frequency onto which the
loop will lock when starting from an unlocked condition. Sometimes a frequency detector is
added to the phase detector to assist in initial acquisition of lock.

CIRCUIT DIAGRAM:
VCO- VOLTAGE CONTROLLED OSCILLATOR:

Fig11.1: VCO

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 60
Integrated Circuits Lab KEC 551

APPLICATIONS:
1. Used in tracking band pass filter for angle modulated signals.
2. Used in Frequency divider and frequency multiplier circuits.
3. Used as Amplifiers for angle modulated signals.
4. Used in AM and FM Demodulators.
5. Used in Suppressed carrier recovery circuits.

MODEL WAVEFORM:

Fig11.2: Output of PLL

PROCEDURE:
1. Build the circuit on ASLK KIT as shown in circuit diagram.
2. Measure the lock range of the system and measure the change in the phase of the ouput signal
as input frequency is varied within the lock range.
3. Vary the input frequency and obtain the change in the control voltage.
4. Plot output wave forms on graph sheet.

PRECAUTIONS:
1. Avoid loose connections.
2. Handle the Circuit with carefully
3. Check the Power supply polarities and Switch ON after connections once verified.

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 61
Integrated Circuits Lab KEC 551

RESULT
The PLL has been designed and it has been observed that oscillating frequency of PLL decides
the capture and lock frequencies.
POST EXPERIMENT QUESTIONS:

1. What is the full form of PLL?

2. What is the working principle of PLL?
3. Write the need of Voltage controlled oscillator in PLL.
4. What is Lock Range?
5. What is capture range?

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 62
Integrated Circuits Lab KEC 551

EXPERIMENT NO. 12

AIM: Study and design ramp generator using IC 566.

APPARATUS:

S.NO NAME OF RANGE QUANTITY

EQUIPMENT/COMPONENT
1. Breadboard - 1
2. IC 566 4.5V-15V 1
3. Resistors  1
4. Capacitor 0.1μ,0.01μ,0.001p,100,100μ 1
5. Diode IN4007 1
6. Dual Regulated D.C power 0-30V(dual) 1
supply
7. CATHODE RAY 0-30MHz 1
OSCILLOSCOPE
8. Function generator 0-30MHz 1
9. Connecting Wires and CRO - As required
probes

SOFTWARE USED: TINA 90(PSPICE)

THEORY

The IC566 can be wired as a positive or negative ramp generator. In the positive ramp generator,
the external transistor driven by the Pin 3 output rapidly discharges Cl at the end of the charging
period so that charging can resume instantaneously. The pnp transistor of the negative ramp
generator likewise rapidly charges the timing capacitor Cl at the end of the discharge period.
Because the circuits are reset so quickly, the temperature stability of the ramp generator is
excellent. The period T is 1/2 fo, where f is the IC566 free-running frequency in normal
operation. Therefore, T = 1 = Rt C1 Vcc
2fo 5(Vcc - Vc)

where Vc is the bias voltage at Pin 5 and Rt is the total resistance between Pin 6 and Vcc. Note
that a short pulse is available at Pin 3. (Placing collector resistance in series with the external
transistor collector will lengthen the pulse.)

Connection shown for 566 function generator gives negative output ramp having period equal to
1/2f where f is normal free-running frequency of 566 as determined by supply voltage and RC
values used. Ramp has very fast reset because PNP transistor charges timing capacitor C1
rapidly at end of discharge period. Short output pulse is available at pin 3.
Department of Electronics & Communication Engineering, NIET Gr. NOIDA
Page 63
Integrated Circuits Lab KEC 551

CIRCUIT DIAGRAM:

Fig12.1: Ramp generator using IC 566.

PROCEDURE:
1. Build the circuit on Bread-Board as shown in circuit diagram.
2. Measure the Input Frequency & voltage.
3. Vary the resistance & Capacitances
4. Plot output wave forms on graph sheet.

PRECAUTIONS:
1. Avoid loose connections.
2. Handle the ASLK KIT with carefully
3. Check the Power supply polarities and Switch ON after connections once
verified.

RESULT
Ramp generator using IC 566 has been designed.

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 64
Integrated Circuits Lab KEC 551

POST EXPERIMENT QUESTIONS:

1. Draw ramp generator circuit using IC 566.

2. Draw ramp generator circuit using Op-Amp.
3. Write the difference between Saw-tooth & ramp generation circuit using IC 566.

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 65
Integrated Circuits Lab KEC 551

EXPERIMENT NO. 13

AIM: Design and test a PLL to get locked to a given frequency “f”. Measure the locking range of
the system and also measure the change in phase of the output signal as input frequency is
varied within the lock range.

APPARATUS:

S.NO TYPE NAME OF RANGE QUANTITY

EQUIPMENT/COMPONENT
1 Analog system lab kit IC TL081C, IC MPY634 - 1
2 Function generator - 0-30MHz 1
3 Regulated power - 0-30V(dual) 1
supply
4 CATHODE RAY - 0-30MHz 1
OSCILLOSCOPE
5 Patch cards and CRO - - As
probes required

SOFTWARE USED: TINA 90(PSPICE)

THEORY

A PLL is a feedback system that includes a VCO, phase detector, and low pass filter within its
loop. Its purpose is to force the VCO to replicate and track the frequency and phase at the input
when in lock. The PLL is a control system allowing one oscillator to track with another. It is
possible to have a phase offset between input and output, but when locked, the frequencies must
exactly track.

𝜑𝑜𝑢𝑡 (𝑡) = 𝜑𝑖𝑛 (𝑡) + 𝑐𝑜𝑛𝑠𝑡.

𝜔𝑜𝑢𝑡 (𝑡) = 𝜔𝑖𝑛 (𝑡)

The PLL output can be taken from either Vcont, the filtered (almost DC) VCO control voltage, or
from the output of the VCO depending on the application. The former provides a baseband
output that tracks the phase variation at the input. The VCO output can be used as a local
oscillator or to generate a clock signal for a digital system. Either phase or frequency can be used
as the input or output variables.

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 66
Integrated Circuits Lab KEC 551

Of course, phase and frequency are interrelated by:

𝑑𝜑
𝜔 (𝑡 ) =
𝑑𝑡
𝑡

𝜑(𝑡) = 𝜑(0) + ∫ 𝑤(𝑡 ′ )𝑑𝑡 ′

0
APPLICATIONS:
There are many applications for the PLL,
VCO: In PLL applications, the VCO is treated as a linear, time-invariant system. Excess phase
of the VCO is the system output.
LOCK Range: Range of input signal frequencies over which the loop remains locked once it
has captured the input signal. This can be limited either by the phase detector or the VCO
frequency range.
Capture Range: Range of input frequencies around the VCO center frequency onto which the
loop will lock when starting from an unlocked condition. Sometimes a frequency detector is
added to the phase detector to assist in initial acquisition of lock.

CIRCUIT DIAGRAM:

Fig13.1: PLL Circuit

APPLICATIONS:
1. Used in tracking band pass filter for angle modulated signals.
2. Used in Frequency divider and frequency multiplier circuits.
3. Used as Amplifiers for angle modulated signals.
4. Used in AM and FM Demodulators.
5. Used in Suppressed carrier recovery circuits.

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 67
Integrated Circuits Lab KEC 551

MODEL WAVEFORM:

Fig13.2: Output of PLL

PROCEDURE:
1. Build the circuit on ASLK KIT as shown in circuit diagram.
2. Measure the lock range of the system and measure the change in the phase of the ouput
signal as input frequency is varied within the lock range.
3. Vary the input frequency and obtain the change in the control voltage.
4. Plot output wave forms on graph sheet.

PRECAUTIONS:
1. Avoid loose connections.
2. Handle the ASLK KIT with carefully
3. Check the Power supply polarities and Switch ON after connections once verified.

RESULT
The PLL has been designed and it has been observed that oscillating frequency of PLL decides
the capture and lock frequencies.
POST EXPERIMENT QUESTIONS:

4. What is the full form of PLL?

5. What is the working principle of PLL?
6. Write the need of Voltage control oscillator in PLL.

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 68
Integrated Circuits Lab KEC 551

7. What is Lock Range?

8. What is capture range?
9. Draw the block diagram of a PLL based divider and multiplier and explain the functions
performed by each block.
10. Distinguish between Lock range and Capture Range, Explain the method of estimating the
same for a given PLL circuit.
11. Discuss the differences between Analog Phase Lock Loop and Digital Phase Lock Loop.

Department of Electronics & Communication Engineering, NIET Gr. NOIDA

Page 69