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UNIT I - BOOLEAN ALGEBRA AND LOGIC GATES

PART A – 2 MARKS

1. Define binary logic

Binary logic consists of binary variables and logical operations. The variables are
designated by the alphabets such as A, B, C, x, y, z, etc., with each variable having only two
distinct values: 1 and 0.

2. What is meant by Digital Systems?

A digital system is a system that manipulates discrete elements of information that is
represented by binary form i.e. 0’s and 1’s.

3. List the number systems

i) Decimal Number system
ii) Binary Number system
iii) Octal Number system
iv) Hexadecimal Number system

4. Convert 7368 into an equivalent binary number.

The binary equivalents of 7, 3 and 6 are 111,011 & 110 respectively.
Therefore 7368 = 1110111102

5. Which gates are called as the universal gates? What are its advantages?
The NAND and NOR gates are called as the universal gates. These gates are used to
perform any type of logic application.

6. State the sequence of operator precedence in Boolean expression?

Parenthesis
AND
OR

7. What are the different types of number complements?

Radix Complement
Diminished Radix Complement

8. Why complementing a number representation is needed.

Complementing a number becomes as in digital computer for simplifying the subtraction
operation and for logical manipulation complements are used.

9. How to represent a positive and negative sign in computers

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Positive (+) sign by 0

Negative (-) sign by 1.

10. What is meant by Map method?

The map method provides a simple straightforward procedure for minimizing Boolean
function.

11. What is meant by two variable map?

Two variable map have four minterms for two variables, hence the map consists of four
squares, one for each minterm.

12. State Duality principle.

The dual of any Boolean function can be obtained by changing each OR sign to an AND
sign and vice versa and complementing any 0 or 1 appearing in the expression.

13. Why parity checker is needed?

Parity checker is required at the receiver side to check whether the expected parity is equal
to the calculated parity or not. If they are not equal then it is found that the received data has error.

14. What is meant by parity bit?

Parity bit is an extra bit included with a binary message to make the number of 1’seither
odd or even. The message, including the parity bit is transmitted and then checked at the receiving
and for errors.

15. What are the needs for binary codes?

Code is used to represent letters, numbers and punctuation marks.
Coding is required for maximum efficiency in single transmission.
Binary codes are the major components in the synthesis (artificial generation) of speech
and video signals.
By using error detecting codes, errors generated in signal transmission can be detected.
Codes are used for data compression by which large amounts of data are transmitted in
very short duration of time.

16. Mention the different type of binary codes?

Binary weighted code
Binary non - weighted code
Sequential code
Alphanumeric code
Error-detecting and error-correcting code
17. List the advantages and disadvantages of BCD code?

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Advantages of BCD code:

a. Any large decimal number can be easily converted into corresponding binary number
b. A person needs to remember only the binary equivalents of decimal number from 0 to 9.
c. Conversion from BCD into decimal is also very easy.
Disadvantages of BCD code:
a. The code is least efficient. It requires several symbols to represent even small numbers.
b. Binary addition and subtraction can lead to wrong answer.
c. c. Special codes are required for arithmetic operations.
d. This is not a self-complementing code.
e. Conversion into other coding schemes requires special methods.

18. What is meant by self-complementing code?

A self-complementing code is the one in which the members of the number system
complement on themselves. This requires the following two conditions to be satisfied.
The complement of the number should be obtained from that number by replacing 1s
with0s and 0s with 1s.
The sum of the number and its complement should be equal to decimal 9.
Example of a self-complementing code is
i) 2-4-2-1 code. ii). Excess-3 code

19. Mention the advantages of ASCII code

There are 27 =128 possible combinations. Hence, a large number of symbols, alphabets
etc.., can be easily represented.
There is a definite order in which the alphabets, etc.., are assigned to each code word.
The parity bits can be added for error-detection and correction.

20. What are the disadvantages of ASCII code?

The length of the code is larger and hence more bandwidth is required for transmission.
With more characters and symbols to represent, this is not sufficient.

21. Application of octal number system:

It is highly in convenient to handle long strings of binary numbers while entering into the
digital systems. It may cause errors also. Therefore, octal numbers are used for entering binary
data and displaying certain information.

22. What is a Logic gate?

Logic gates are the basic elements that make up a digital system. The electronic gate is a
circuit that is able to operate on a number of binary inputs in order to perform a particular logical
function.
23. List out the advantages and disadvantages of K-map method?

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The advantages of the K-map method are

It is a fast method for simplifying expression up to four variables.
It gives a visual method of logic simplification.
Prime implicants and essential prime implicants are identified fast.
Suitable for both SOP and POS forms of reduction.
It is more suitable for class room teachings on logic simplification.
The disadvantages of the K-map method are
It is not suitable for computer reduction.
K-maps are not suitable when the number of variables involved exceed four.
Care must be taken to fill in every cell with the relevant entry, such as a 0, 1 (or)
don’t care terms.
24. Obtain truth table and name operation performed for A’B+AB’

PART B – 16 MARKS

1. a. Explain the various types of K-Map with Examples (12)

b. Prove that x + 1 = 1 (2)
c. Prove that x + xy = x (2)
2. a. Simply the Boolean Function Using Three Variable K-Map
F(X, Y, Z) = ∑ (3, 4, 6, 7) (8)
b. Simply the Boolean Function Using Four Variable K-Maps
F(W,X,Y,Z) = ∑ (0,1,2,4,5,6,8,9,12,13,14) (8)
34. a. Explain logic operations with NAND Gates? (8)
b. Explain Multilevel NAND Gates? (8)
4. a. Explain Implementation of NOR Gates ? (8)
b. Explain AND- OR Invert Implementation (8)
5. a. Explain BCD Code with Examples (6)
b. Explain Excess 3 Code with Examples? (6)
c. Convert the number (28) Decimal to Excess 3 Code (4)
6. a. List out the Procedure for converting Binary to Gray Code (4)
b. Convert the number (1011) binary to gray? (4)
c. Explain 7 - Bit ASCII Code ? (8)
7. simplify the Boolean function using tabulation method (16)
F= sum (0,1,4,11,15,32,29,28)

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UNIT II - COMBINATIONAL LOGIC

Part A – 2 Marks
.
1. Define Combinational circuit
A combinational circuit consist of logic gates whose outputs at anytime are determined
directly from the present combination of inputs without regard to previous inputs.

2. Explain the design procedure for combinational circuits

Determine the number of available input variables & required O/P variables.
Assigning letter symbols to I/O variables
Obtain simplified Boolean expression for each O/P.
Obtain the logic diagram.

3. What is code conversion?

If two systems working with different binary codes are to be synchronized in operation,
then we need digital circuit, which converts one system of codes to the other. The process of
conversion is referred to as code conversion.

4. What is code converter?

It is a circuit that makes the two systems compatible even though each uses a different
binary code. It is a device that converts binary signals from a source code to its output code. One
example is a BCD to Xs3 converter.

5. Analysis procedure for combinational circuits

Find the given circuit is combinational or sequential.
Combinational circuit has a logic gate with no feedback paths or memory elements.
A feedback path is a connection from the output of one gate to the input of second gate
that forms part of the input to the first gate

6. Design procedure for combinational circuits

i) Determine the required number of inputs and outputs and assign a symbol to each.
ii) Derive the truth table that defines the required relationship between inputs and outputs.
iii) Obtain the simplified Boolean functions for each output as a function of the input
variables.
iv) Draw the logic diagram and verify the correctness of the design.

7. What is a half-adder?
The combinational circuit that performs the addition of two bits is called a half-adder.

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8. What is a full-adder?
The combinational circuit that performs the addition of three bits is called a full-adder.

9. What is half-subtractor?
The combinational circuit that performs the subtraction of two bits is called a half-
subtractor.

10. What is a full-subtractor?

The combinational circuit that performs the subtraction of three bits is called a half-
subtractor.

11. What is Binary parallel adder?

A binary parallel adder is a digital function that produces the arithmetic sum of
two binary numbers in parallel.

14. Logic equation for half adder

S=X Y
C=X.Y

15. Limitations of Half-adder

In multidigit addition, add two bits along with the carry of previous digit addition.
Effectively such addition requires addition of three bits. This is not possible with half adder.
Hence, half-adders are not used in practice.

16. Limitations of Half-adder

In multidigit subtraction, subtract two bits along with the borrow of previous digit
subtraction. Effectively such subtraction requires subtraction of three bits. This is not possible
with half subtractor.

17. Define Hardware Description Language (HDL)

The size and complexity of the digital systems increases, they cannot be designed
manually; their design is highly complex. At the most detailed level, they may consists of
millions of elements i.e.) transistor or logic gates. So the computer-aided tools are used to design
the Hardware Description Language.

18. Structure of Verilog module

module <module name> <port list>;
<declares>
<module items>
endmodule

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19. Operators in Verilog HDL

Boolean logical
Unary reduction logical
Bitwise logical
Relational
Binary arithmetic
Unary arithmetic

20. What are the Verilog data types?

reg and wire
reg variables store the last value that was procedurally assigned to them whereas the wire
variables represent physical connections between structural entities such as gates.
21. What is BCD adder?
A BCD adder is a circuit that adds two BCD digits in parallel and produces a sum digit
also in BCD.

22. What is Magnitude Comparator?

A Magnitude Comparator is a combinational circuit that compares two numbers, A and B
and determines their relative magnitudes.

23. What is decoder?

A decoder is a combinational circuit that converts binary information from ‘n’ input lines
to a maximum of 2n unique output lines.

24. What is encoder?

An encoder is a combinational circuit that converts binary information from 2n Input lines
to a maximum of ‘n’ unique output lines.

25. Define Multiplexing

Multiplexing means transmitting a large number of information units over a smaller
number of channels or lines.

26. What is Demultiplexer?

A Demultiplexer is a circuit that receives information on a single line and transmits this
information on one of 2n possible output lines.

27. What is the function of the enable input in a Multiplexer?

The function of the enable input in a MUX is to control the operation of the unit.
28. Give the applications of Demultiplexer.

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Multiplexing means transmitting a large number of information units over a

smaller number of channels or lines.

29. What is priority encoder?

A priority encoder is an encoder that includes the priority function. The operation of the
priority encoder is such that if two or more inputs are equal to 1 at the same time, the input
having the highest priority will take precedence.
30. Can a decoder function as a Demultiplexer?
i) It finds its application in Data transmission system with error detection.
ii) One simple application is binary to Decimal decoder.

31. Mention the uses of Demultiplexer

Demultiplexer is used in computers when a same message has to be sent to different
receivers. Not only in computers, but any time information from one source can be fed to several
places.

32. List basic types of programmable logic devices.

. Read only memory
. Programmable logic Array
. Programmable Array Logic

33. List out the applications of multiplexer

The various applications of multiplexer are
a. Data routing.
b. Logic function generator.
c. Control sequencer.
d. Parallel-to-serial converter.

34. List out the applications of decoder

The applications of decoder are
a. Decoders are used in counter system.
b. They are used in analog to digital converter.
c. Decoder outputs can be used to drive a display system.
35. Give other name for Multiplexer and Demultiplexer.
Multiplexer is otherwise called as Data selector.
Demultiplexer is otherwise called as Data distributor.
36. What is logic synthesis? (May/June 2011)
37. What are the modeling techniques in HDL? May/June 2013,2012
38. Give the need for using carry look ahead adder (nov/dec 2011)

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Ans: To reduce the carry propagation delay and to reduce the complexity in designing
combimnational circuis
39. Construct 4x16 decoder using 3x8 decoders. (Nov/dec2012)
40. Implement full adder using 2 half adders (Nov/dec2012)
41.Draw the truthtable for BCD to excess 3 code (Nov/Dec2013)

Part B - 16 Marks

1. a. Explain the Design procedure for Combination Logic Circuits (6)

b. Explain the Logic implementation of half–adder and half-subtractor (10)

2. a. Explain Logical Implementation of Full – adder and Full – Subtractor (10)

b. Draw the Logic Diagram for BCD to Excess 3 code Converter with Explain (6)

3. a. Explain the analysis procedure for combinational circuit (6)

b. Explain the 4- bit Full adder (4)
c. Explain the Block Diagram of BCD Adder (6)

4. a. Explain the 4 – Bit Magnitude Comparator (10)

b. Explain the Design Procedure for HDL (6)

5. a. What is meant by model and modeling techniques in HDL? (5)

b. Explain the Hardware Simulation (5)
c. Explain Hardware Synthesis (6)

6. a. Explain the Binary to BCD Convertor (10)

b. Explain the Binary Parallel adder (6)

7. a. Explain the excess 3 to BCD Code Converter (10)

b. Explain the Binary Adder- Subtractor (6)

8. a. Explain the Logic Diagram of 3 to 8 line Decoder (8)

b. How to Construct the 4 x 16 Decoder with two 3 x 8 Decoder (8)

9. a. Explain the 4 to 1 line Multiplexer (8)

b. Explain the 2 to 1 line Multiplexer (8)

10. Implement Boolean function using mux (8)

F=sum (1,2,5,6,8,9,10,15,14)

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11. Construct 5 to 32 decoder using one 2 to 4decoder and four 3 to 8 decoder (8)

12. Construct 4 x16 decoder using 2 3x8 decoders with enable input (nov/dec2013)

13.Explain the Design Procedure for HDL

14.Explain the binary adder/subtractor circuit (April/may 2010)
15.Discuss the carry look ahead adder generation (April/may 2010)
16.Design binary multiplier circuit (nov/dec2010)
17. What is meant by model and modeling techniques in HDL?

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UNIT III
SYNCHRONOUS SEQUENTIAL LOGIC

Part A – 2 Marks

1. What is sequential circuit?

Sequential circuit is a broad category of digital circuit whose logic states depend on a
specified time sequence. A sequential circuit consists of a combinational circuit to which
memory elements are connected to form a feedback path.

2. List the classifications of sequential circuit.

i) Synchronous sequential circuit.
ii) Asynchronous sequential circuit.

3. What is Synchronous sequential circuit?

A Synchronous sequential circuit is a system whose behavior can be defined from the
knowledge of its signal at discrete instants of time.

4. What is a clocked sequential circuit?

Synchronous sequential circuit that use clock pulses in the inputs of memory elements are
called clocked sequential circuit. One advantage as that they don’t cause instability problems.

5. What is called latch?

Latch is a simple memory element, which consists of a pair of logic gates with
their inputs and outputs inter connected in a feedback arrangement, which permits a single bit
to be stored.

6. List different types of flip-flops.

i) SR flip-flop
ii) Clocked RS flip-flop
iii) D flip-flop
iv) T flip-flop
v) JK flip-flop
vi) JK master slave flip-flop

7. What do you mean by triggering of flip-flop?

The state of a flip-flop is switched by a momentary change in the input signal. This
momentary change is called a trigger and the transition it causes is said to trigger the flip-flop.

8. What is an excitation table?

During the design process we usually know the transition from present state to next state
and wish to find the flip-flop input conditions that will cause the required transition. A table
which lists the required inputs for a given chance of state is called an excitation table.

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9. Give the excitation table of JK-flip flop?

Present state Next state Flip-flop Inputs

Qn Qn+1 J K
0 0 0 X
0 1 1 X
1 0 X 1
1 1 X 0

10. Give the excitation table of SR-flip flop?

Present state Next state Flip-flop Inputs

Qn Qn+1 R S
0 0 X 0
0 1 0 1
1 0 1 0
1 1 0 X

11. What is counter?

A counter is used to count pulse and give the output in binary form.

12. What is synchronous counter?

In a synchronous counter, the clock pulse is applied simultaneously to all flip-flops. The
output of the flip-flops change state at the same instant. The speed of operation is high compared
to an asynchronous counter

13. What is Asynchronous counter?

In an Asynchronous counter, the clock pulse is applied to the first flip-flops. The change
of state in the output of this flip-flop serves as a clock pulse to the next flip-flop and so on. Here
all the flip-flops do not change state at the same instant and hence speed is less.

14. What is the difference between synchronous and asynchronous counter?

Synchronous counter:
1. Clock pulse is applied simultaneously Clock pulse is applied to the first flip-flop, the change
of output is given as clock to next flip-flop
Asynchronous counter:
1. Speed of operation is high Speed of operation is low.

15. Name the different types of counter.

a) Synchronous counter
b) Asynchronous counter
i) Up counter
ii) Down counter
iii) Modulo – N counter
iv) Up/Down counter

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16. What is up counter?

A counter that increments the output by one binary number each time a clock pulse is
applied.

17. What is down counter?

A counter that decrements the output by one binary number each time a clock pulse is
applied.

18. What is up/down counter?

A counter, which is capable of operating as an up counter or down counter, depending on
a control lead.

19. What is a ripple counter?

A ripple counter is nothing but an asynchronous counter, in which the output of the flip-
flop changes state like a ripple in water.

20. What are the uses of a counter?

i) The digital clock
ii) Auto parking control
iii) Parallel to serial data conversion.

21. What is Johnson counter?

It is a ring counter in which the inverted output is fed into the input. It is also known as a
twisted ring counter.

22. Define Flip flop.

The basic unit for storage is flip flop. A flip-flop maintains its output state either at1 or 0
until directed by an input signal to change its state.

23. Give the comparison between combinational circuits and sequential circuits

Combinational circuits Sequential circuits

Memory unit is not required Memory unit is required
Parallel adder is a combinational Serial adder is a sequential circuit.
circuit

PART – B

1. a. Write the verilog code generate for paralled load up / down counter (8)
b. Write a verilog code for D Flip Flop and R-S Flip Flop (8)
2. Explain R-S Flip Flop and Clocked R-S Flip Flop (16)
3 .a. Explain S-R Flip Flop (8)
b. Explain D Flip Flop (8)
4. a. Explain JK Flip Flop (11)
b. Explain T Flip Flop (5)

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5. a. Explain Master Slave Flip Flop (8)

b. Explain the Edge Triggered Flip Flop (8)
6. a. Convert it JK Flip Flop in to T Flip Flop (8)
b. Convert it JK Flip Flop in to D Flip Flop (8)
7. a. Convert it D Flip Flop in to T Flip Flop (8)
b. Convert it T Flip Flop in to D Flip Flop (8)
8. a. Explain Serial in Serial out Shift Register (8)
b. Explain Serial in parallel out Shift Register (8)
9. a. Explain parallel in parallel out Shift Register (8)
b. Explain parallel in Serial out Shift Register (8)
10. Design sequential circuit for a state diagram? (16)

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UNIT IV

ASYNCHRONOUS SEQUENTIAL LOGIC

Part A – 2 Marks

1. Define Asynchronous sequential circuit?

In asynchronous sequential circuits change in input signals can affect memory element at
any instant of time.

2. Comparison between synchronous & Asynchronous sequential circuits?

Synchronous sequential circuits Asynchronous sequential circuits

Memory elements are clocked flip- Memory elements are either unlocked flip -
flops flops or time delay elements.
Easier to design. More difficult to design.

3. What is fundamental mode sequential circuit?

-input variables changes if the circuit is stable
-inputs are levels, not pulses
-only one input can change at a given time.

4. What is the significance of state assignment?

In synchronous circuits-state assignments are made with the objective of circuit
reduction. Asynchronous circuits-its objective is to avoid critical races.

5. When do race conditions occur?

Two or more binary state variables change their value in response to the change in input
variable.

6. Write short note on shared row state assignment.

Races can be avoided by making a proper binary assignment to the state variables. Here,
the state variables are assigned with binary numbers in such a way that only one state variable
can change at any one state variable can change at any one time when a state transition occurs.
To accomplish this, it is necessary that states between which transitions occur be given adjacent
assignments. Two binary are said to be adjacent if they differ in only one variable.

7. Write short note on one hot state assignment.

The one hot state assignment is another method for finding a race free state assignment.
In this method, only one variable is active or hot for each row in the original flow table, i.e., it
requires one state variable for each row of the flow table. Additional row are introduced to
provide single variable changes between internal state transitions.

9. What are the different techniques used in state assignment?

shared row state assignment
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one hot state assignment

9. What are the steps for the design of asynchronous sequential circuit?
-construction of primitive flow table
-reduction of flow table
-state assignment is made
-realization of primitive flow table

10. What is hazard?

Hazard is an unwanted switching transient.

11. What are the steps for the design of asynchronous sequential circuit?
1. Construction of a primitive flow table from the problem statement.
2. Primitive flow table is reduced by eliminating redundant states using the state
reduction
3. State assignment is made
4. The primitive flow table is realized using appropriate logic elements.

12. Give the comparison between state Assignment Synchronous circuit and state
assignment asynchronous circuit.
In synchronous circuit, the state assignments are made with the objective of circuit
reduction. In asynchronous circuits, the objective of state assignment is to avoid critical races.

13. What are races?

When 2 or more binary state variables change their value in response to a change in an
input variable, race condition occurs in an asynchronous sequential circuit. In case of unequal
delays, a race condition may cause the state variables to change in an unpredictable manner.

14. Define non critical race.

If the final stable state that the circuit reaches does not depend on the order in which the
state variable changes, the race condition is not harmful and it is called a non critical race.

15. Define critical race?

If the final stable state depends on the order in which the state variable changes, the race
condition is harmful and it is called a critical race.

16. Define flow table in asynchronous sequential circuit.

In asynchronous sequential circuit state table is known as flow table because of the
behavior of the asynchronous sequential circuit. The stage changes occur in independent of a
clock, based on the logic propagation delay, and cause the states to flow from one to another.

17. Define merger graph.

The merger graph is defined as follows. It contains the same number of vertices as the
state table contains states. A line drawn between the two state vertices indicates each compatible
state pair. It two states are incompatible no connecting line is drawn.

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18. What is fundamental mode?

A transition from one stable state to another occurs only in response to a change in the
input state. After a change in one input has occurred, no other change in any input occurs until
the circuit enters a stable state. Such a mode of operation is referred to as a fundamental mode.

PART – B

1. Explain the classification of Race- Free State Algorithm? (16)

2. Explain the Hazards in combinational circuits? (6)
3. Explain the Hazards in sequential circuits? (10)
4. Explain the analysis and design procedures of synchronous sequential circuits. (8)
5. With suitable example and diagram explain the hazards in combinational and sequential
logic circuits. (16)
6. With necessary example and diagram explain the concept of reduction of state and flow
tables. (16)
7. Explain race free state assignment with an example
8. Design and analysis problem solved in note

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UNIT V
MEMORY AND PROGRAMMABLE LOGIC
Part A – 2 Marks

1. List basic types of programmable logic devices.

. Read only memory
. Programmable logic Array
. Programmable Array Logic

2 Explain ROM
A read only memory (ROM) is a device that includes both the decoder and the OR gates
within a single IC package. It consists of n input lines and m output lines. Each bit combination
of the input variables is called an address. Each bit combination that comes out of the output
lines is called a word. The number of distinct addresses possible with n input variables is 2n.

3. Define address and word

In a ROM, each bit combination of the input variable is called on address. Each bit
combination that comes out of the output lines is called a word.

4. What is programmable logic array? How it differs from ROM?

In some cases the number of don’t care conditions is excessive, it is more economical to
use a second type of LSI component called a PLA. A PLA is similar to a ROM in concept;
however it does not provide full decoding of the variables and does not generates all the
minterms as in the ROM.
5. What is memory and draw the block diagram of memory cell. Refer note
6. What is the difference between programmable array logic (PAL) and programmable logic array (PLA)
refer note

7.. State the types of ROM

Masked ROM.
Programmable Read only Memory
Erasable Programmable Read only memory.
Electrically Erasable Programmable Read only Memory.
8. How error is detected and corrected in digital system . refer note

9.Draw the timing diagram of Write operation. Refer note

10.What is the significance of FPGA . refer note

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Part B
1. Write notes on RAM, its operation and its types
2. Discuss the operation of memory decoding and elaborate its application as address multiplexing and
coincident decoding circuits
3 a. Explain the Programmable Logic array (8)
b. Explain the Programmable array Logic (8)
4. a. Comparison between PROM, PLA and PAL (6)
b. Realise the function gives using a PLA with 6 Input, 4 Outputs and 10 AND gates (10)
F1(A,B,C,D,E,F) = ∑(0,1,7,8,9,10,11,15,19,23,27,31,32,33,35,39,40,41,47,63)
5. F2(A,B,C,D,E,F) = ∑(8,9,10,11,12,14,21,25,27,40,41,42,43,44,46,57,59) using PAL
6. Write notes on PLA and PAL
7. Define Memory and discuss the operation & types of RAM and ROM
8. Elaborate the construction of sequential programmable devices in detail

9. Explain ASIC in detail

10. Implement following function using PLA (8)

Z1= ab‘d’e+a’b’c’d’e’+bc+de, Z2=a’c’e, Z3=bc+de+c’d’e+bd, Z4=a’c’e+ce using
5x8x4 PLA
11. Implement the two following Boolean function using 8x2 PROM. (8)

F (x,y,z) = 13,5,6,7
F (x,y,z) = 1,2,3,4

CS6201-DIGITAL PRINCIPLES AND SYSTEM DESIGN Page 2

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