Teac Mt-2St/20D-Io Streaming Cassette Magnetic Tape Unit Maintenance Manual
Teac Mt-2St/20D-Io Streaming Cassette Magnetic Tape Unit Maintenance Manual
TEAC MT-2ST/20D-IO
STREAMING CASSETTE MAGNETIC TAPE UNIT
~~INTENANCE MANUAL
TEAC CORPORATION
fiN: 10 1(;03)4 - 0/
CONTENTS
3. THEORY OF OPERATION
3-1 Outline of construction and functions ••.••.....•..••..•••••••• 301
3-1-1 Overall block diagram ......•..•.••.•.•.•..••....••....••• 301
3-1-2 Outline of mechanical section .••.....•.•.•.••...•••...•.• 304
3-2 Operation of data recording/reproducing system
(PCBA Drive Control) ..•••••••••.••••.•.••••.••.•••.••••••••••• 311
3-2-1 Read circuit ..........................................•.. 311
3-2-2 Write circuit and erase circuit ••••••.•••.•••.••••••••••• 315
3-3 Operaiton of tape drive systm (PCBA Drive Control) ....••••..•. 317
3-3-1 Servo circuit •...•.••....•..•.•••.•••.•.••..••...••.•...• 317
3-3-2 Other control circuits ••..........•.....•••..•..•..••...• 319
3-4 "D/CAS" Interface control (PCBA Interface Control) ........... . 321
3-4-1 CPU .•.•.•..••••..........•..••••..................•.•.•.. 322
3-4-2 ROM 323
3-4-3 RAM 323
3-4-4 Host interface control ........•••..•••......••••••.....•• 324
3-4-5 DMAC 328
3-4-6 Counter/timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 329
3-4-7 Write/read control ..•.•.....••..•.•••....•......•.....••. 330
3-4-8 I/O port .....•••.•..•.••••..•....•••••..•••.••.•..•..•••• 334
3-5 "SCSI" Interface control (PCBA Interface Control)............. 335
3-5-1 CPU. . . . . . . . . . . . . . • • • • . . • . . . . . . • . . • • • • • . . . • . • • . . . . . • • . • • • . 336
3-5-2 ROM 337
3-5-3 RAM 337
3-5-4 Host interface control ......••.•...........•.............. 338
3-5-5 DMA.C ••••••••••••••••••••••••••••••••••••••••••••••••••••• 344
3-5-6 Counter/timer ..........•............•....•.......•••.•••. 345
3-5-7 Write/read control ..••......•...•.•.•..•••.•.••.....••.•. 346
3-5-8 I/O port ................••.............••.........••..... 350
3-6 "BASIC" Interface control (PCBA Interface Control)............ 351
3-6-1 Configuration .........••.................•.........•..... 351
3-6-2 Theory of operation ...•.....•..........................•• 354
- i -
3-7 Functions of test points, variable resistors and straps ..•.... 359
3-7-1 Functions of test points .............•....•.......•...... 361
3-7-2 Functions of variable resistors ••.....••....•.........•.. 377
3-7-3 Functions of straps .•.....•.•..•••..••••......•........•. 379
4. MAINTENANCE
4-1 Outline of maintenance ...••.•..•....•••........•••••.••.•••.•• 4001
4-1-1 Routine maintenance ..•.•.•.....•••......•••.•....•••.•••. 4001
4-1-2 Check and adjustment .•...••....••......•..••••..••.•••••• 4002
4-1-3 Maintenance parts ....•.•..•.•........••••••.•......•...•• 4004
4-1-4 Maintenance articles .••...•.•..•.••.....•........•..•.••. 4007
4-2 Precautions on maintenance ••..•••..•.•••....•...••...••••...•• 4009
4-2-1 Screw tightening torque and screw lock (red) .•••..••...•. 4009
4-2-2 Connector handling method ••••••..••...•.•••••.•.••••.•.•. 4010
4-2-3 How to handle the protector guide •...•••••.••...••.....•. 4015
4-2-4 Cable treatment within chassis .•••••..•......••.••...•.•. 4017
4-2-5 Initialization of SOA 4019
4-2-6 Initialization of SOB 4021
4-2-7 Initialization of SOD 4023
4-2-8 Initialization of SOE •.....•..••.••..•••••..•.•..•.•..••. 4025
4-3 Check and adjustment procedures .......•......•.•••••...•...•.. 4027
4-3-1 Positional adjustment of reel motor (F), (R) Ass'y .....•• 4027
4-3-2 Height adjustment of encoder roller 4029
4-3-3 Check of rotary direction of reel motor •••••••.......•.•• 4032
4-3-4 Check of file protect sensor ....•••....•••.........•....• 4034
4-3-5 Cassette loading/unloading check •••....••.•........•..... 4036
4-3-6 Check of head shift ....•....•.....••.......••........•..• 4037
4-3-7 Check and adjustment of tape winding .•.•......•.......... 4038
4-3-8 Check and adjustment of head alignment .....•............. 4042
4-3-9 Check of AGe operation •.........•...•...............•.... 4048
4-3-10 Check and adjustment of BOT/EOT hole sensor ..•...•....•.. 4050
4-3-11 Check and adjustment of tape speed .•.....••.••...•..•..•. 4054
4-3-12 Check of start/stop time ........••.......••......•.•..•.. 4058
4-3-13 Check of ISV .....•........•....•••........•..•......•.... 4060
4-3-14 Check and adjustment of read preamplifier level ......•... 4062
- ii -
4-3-15 Check and adjustment of read level ....•...•...•......•... 4064
4-3-16 Check of feed through .....•..............•••..•.•....••.. 4066
4-3-17 Check of resolution ...••.•••..••..•...•....••..•••••.•.•• 4067
4-3-18 Check of earse level ••......••••••.••.•...••.....•..••.•. 4069
4-3-19 Check of peak shif t ..•..•..••.••..•..••..••....••••...•.• 4070
4-3-20 Check of asymmetry ..•..••......•.•.••..•..•••••....•••••. 4071
4-3-21 Check and adjustment of VFO operating point •••••••••.•••• 4072
4-3-22 Overall check .••••••..•....•.•....•••••........••.•..••.. 4074
4-4 Replacement of maintenance parts .••.••.•••••...•..••••...••••. 4078
4-4-1 Replacement of head Ass'y ••....•.•.••••.•...••••.•......• 4078
4-4-2 Replacement of reel motor (F), (R) Ass'y ••.•..••..•..•... 4083
4-4-3 Replacement of interrupter C Ass'y 4087
4-4-4 Replacement of LED hole sensor Ass'y •••..•••••.•••••...•• 4090
4-4-5 Replacement of sensor guide Ass'y ..•.•••.••••••••••••.••. 4093
4-4-6 Replacement of encoder Ass'y, encoder roller .••.•.•..•••• 4095
4-4-7 Replacement of solenoid Ass'y •.••...••.•.•••••.••....•••. 4100
4-4-8 Replacement of head base Ass'y •.••.•••••••••••••••.••••.. 4105
4-4-9 Replacement of PCBA Drive Control •••...•.•••••.•.••.••.•. 4111
4-4-10 Replacement of PCB A Interface Control ••••.....•••..•..•.• 4112
4-4-11 Replacement of front bezel .••..........••.••.•••..•...... 4113
4-4-12 Replacement of ej ect button •.....•......••.....•...•..••• 4115
- iii -
FIGURES AND TABLES
- iv -
Fig. 333 RDP conversion 357
Fig. 334 Cassette load delay •••••..•...•.•.•.•.........•....•.••.... 357
Fig. 335 Tach pulse conversion •.•.••.....•.•...•.....•........•..... 358
Fig. 336 Positions of test points, variable resistors and straps •.•• 359
Fig. 337 Example of waveform at TP1 ....•.....••••..•....•......•••.• 361
Fig. 338 Example of waveform at TP7 •••..•.•.•••..•..•.•....•...••••• 362
Fig. 339 Example of waveform at TP8 362
Fig. 340 Example of waveform at TP11 363
Fig. 341 Example of waveform at TP13 364
Fig. 342 Example of waveform at TP14 364
Fig. 343 Example of waveform at TP1 366
Fig. 344 Example of waveform at TP2 367
Fig. 345 Example of waveform at TP3 367
Fig. 346 Example of waveform at TP4 368
Fig. 347 Example of waveform at TP5 368
Fig. 348 Example of waveform at TP6 369
Fig. 349 Example of waveform at TP9 370
Fig. 350 Example of waveform at TP1 371
Fig. 351 Example of waveform at TP2 372
Fig. 352 Example of waveform at TP3 372
Fig. 353 Exmaple of waveform at TP4 373
Fig. 354 Example of waveform at TP5 373
Fig. 355 Example of waveform at TP6 374
Fig. 356 Example of waveform at TP1 375
Fig. 357 Example of waveform at TP2 375
Fig. 358 Example of waveform at TP3 376
Fig. 359 Example of waveforms at TP4 and TP5 ..•.....•....•..•.•..•.. 376
- v -
Fig. 407 How to detach the protector guide 4016
Fig. 408 How to attach the protector guide 4016
Fig. 409 Cable treatment within chassis •••...••.•......•.•.........• 4018
Fig. 410 Setting of SAO MODE switch •.•...••.•••..••.•........•.•.... 4019
Fig. 411 Connections of SOA 4020
Fig. 412 Connections of SOB 4022
Fig. 413 Connections of SOD 4024
Fig. 414 Connections of SOE 4026
Fig. 415 Positional adjustment of reel motor (F), (R) Ass'y ....••••. 4028
Fig. 416 Set ting of J l.gs ..••.•.•...•..•••.•.•.••....••••••••..••...• 4030
Fig. 417 Height adjustment of encoder roller ..•......•••••••...••... 4031
Fig. 418 Bonding of encoder roller 4031
Fig. 419 Check of rotary direction of reel motor ....••••••••.•.•.•.. 4033
Fig. 420 Mounting of FPT J l.g •.••.•••.••••.••••..••••••..•••••.•.•••. 4035
Fig. 421 Check of file protect sensor •.•••.•••..•.••.•......•••..••. 4035
Fig. 422 Loading of mirror cassette •....•...••••••.•.••.••••••..•••• 4040
Fig. 423 Tape movement check (tape guide) ..•.............•..••...... 4041
Fig. 424 Tape movement check (encoder roller) ....•.................. 4041
Fig. 425 Burst signal ...........•.................••.......•..•..•.• 4043
Fig. 426 Adjusting screws of head alignment .....................•... 4047
Fig. 427 Check of AGC operation 4048
Fig. 428 Check of AGC operation 4049
Fig. 429 Hole detection waveform at TP13 4051
Fig. 430 Hole detection waveform at TP13 4053
Fig. 431 ISV measuring method ..••.••••••..•..•.••...••••.••••.•••.•. 4060
Fig. 432 Measurement of read preamplifier level ..................... 4062
Fig. 433 Indication of Error Count on SOD 4076
Fig. 434 Replacement of Head Ass'y 4080
Fig. 435 Replacement of Head Ass'y 4082
Fig. 436 Replacement of Reel Motor (F) , (R) Ass'y (1) ............... 4085
Fig. 437 Replacement of Reel Motor (F), (R) Ass'y (2) ............... 4086
Fig. 438 Replacement of interrupter C Ass'y (1) · .................... 4088
Fig. 439 Replacement of interrupter C ASs'y (2) · ..................... 4089
Fig. 440 Replacement of interrupter C Ass'y (3) · .................... 4089
- vi -
Fig. 441 Replacement of LED hole sensor Ass'y ••••••••••.••••••..•.•. 4092
Fig. 442 Replacement of sensor guide Ass' y •..••••.....••.•••..•••••• 4094
Fig. 443 Replacement of encoder roller •••..••••••••••.••••••••.•.••. 4097
Fig. 444 Replacement of encoder Ass'y ••••••••.•••••••....•••.••.••.• 4098
Fig. 445 Setting of tilt adjusting jig ............................. . 4099
Fig. 446 Tilt adjustment 4099
Fig. 447 Replacement of solenoid Ass'y (1) 4102
Fig. 448 Replacement of solenoid Ass'y (2) 4103
Fig. 449 Positioning of head base Ass'y 4104
Fig. 450 Replacement of head base Ass'y (1) 4109
Fig. 451 Replacement of head base Ass'y (2) 4109
Fig. 452 Replacement of head base Ass'y (3) 4110
Fig. 453 Replacement of front bezel Ass' y .......................... . 4114
Fig. 454 Replacement of eject Button .•••••••••••••••• '••••••••••••••• 4115 '
- vii -
- How to Display Model Classification -
"90 ips" Applied only to the models in which the tape speed is
90 ips (inch per second) during data write/read opera-
tion.
"30 ips" Applied only to the models in which the tape speed is
30 ips during data write/read operation.
- viii -
Model Classification Table
- ix -
SECTION 3
THEORY OF OPERATION
- 300 -
\.i.l \.i.l
........
I I
....
I
INDICAlOR,
I
I
RMDDE
WD
II I
I
CONTROL
I
I
?;'
, I
fRDN~ DMAC I
WRITE I
EelK
a TR 012 I
ERASE I
TR I/~
TR 0 II I
~y I
I
'---------' I
I I
I I
I I
\.i.l DSO I I
o TSI
.... ~_f_t_..l;TS""'-O--+_---_t_-_+-__i 1/0 PORTS 1-+ I
I
CONTROL fPT
I
a ACK
ClD RAM I
SERVO
I
GO
fWD
I
HIS I
9i :t:
~
lOK
I I
MOTOR. REV
MOTOR fWD
I I
I
II ONl
REQ
INTERFACE RST
I I I CONTROL I--f--
I
I
I
L-________J---------il------II-~R
I
I
I COUNTER
TIMER
L-..._ _ _....~ DIA
8=:1
XfR
ACK
RDY
EXC
I 12\1 OV I I
L-----t--t.------__ J
POWER
L ___________________
I • ov JI
(a) "D/CAS II
Fig. 301 Overall Block Diagram
i PCBA iNTERFAcE CoNrRoL- - - - - - - - - -l
I I
I
READ IIEAD
I
I
READ
TR 0/2
I
I
I
I
I
I
I
I
-- CPU
Bbll
I
I
I
I
WRITE/READ
I I I CONTROL
r- I
AMOOE
I I I I
INDICATOR. I WD I I I
fRONT PANEL WRIT[ HUD WEN I I I
r- DMAC
I------------~\ ~ f-I WRITE EEN I
ECLK
E\ I
TA 012
I ~
: : SOLENOID, I ERASE TA Ill.
II I
I
- -
Dp~ ~I
I
fJ-~'~ ~ ,~,,~
~ ENCOOE!i
~
:I
CONTROL
E\
SERVO
I
I
I
I
I
fPT
ACK
eLD
£] I
I
I
~
I LEO~~OT/EOT T GO I I
I I
- I I fWD
I I I
\~ - - - - - - - - - CAS~!!E LOAD I HIS
LOK I
FI . PRnTFC I
oor
~
0
MOTOR. REV
MOTOR fWD
I
I
BSY
110
INTERFACE ACK
~ r- CONTROL ~ RST
12'1 OV
I
I
.. POR
COUNTER
TIMER r-
=t:
-+-
I
SEL
MSG
CIO
REO
L-----t--~-----J
~V
L ..___________________ JI
POWER
(b) "SCSI"
,
: :
L
--
J
,i LI
,---
WRIT
ERASE ~EAD
II --GO
--L- REV
-L-TR3
I I;,
- 'I ~I CONTROL
- - t - TR2
-r- TRI
, I I :~j;~BOT/EOT
r-lSENSOR I a -r- TRO
,
,
MOTOR-REV
, , -- - i
HOLE SOLENOID' SERVO -r- RST
-r--
ENCODER I -050
-r--
LEO BOTIEOT
-T CASSETTE LOAD I UH
fiLE PROTECT
MOTOR REV I
-r--
- - - - SLD
-.--USF
-TCH
CIN
I : I THD
HSO
I -+-WEN
I -r- EEN
L ._~~ ________________ - J
,I
(c) "BASIC"
- 304 -
(b) Eject operation
\.fuen the ej ect button located at the lower right of the front
bezel, the loading base (M) Ass'y is pushed down, and at the same
time, the stopper of the loading base (C) Ass'y is released. and
the reverse action to item (a) is performed continuously, and the
cassette tape gets out up to halfway from the front bezel. and
then the MTU is placed in the cassette unloading status (Fig. 302.
303).
(c) Cassette tape face identifier mechanism
If the cassette tape is inserted into MTU with the face B of the
cassette tape up, the selector on the ejector is turned clockwise.
When the cassette tape is pushed in further in such status, the
selector touches the stopper of the chassis. and it is not able
to insert the cassette further (Fig. 304).
- 305 -
Transport
Loading base
(C) Ass'y
Cam lever
@
@~ Loading arm
0
@
0
G +
~--
~_~ ___ L
I
__________ ~_~
I
1______ - - ______ '
I
I
Cassette tape
I
'-~~~~~~-----------_/~--~,
Eject button
Fig.302 Cassette tape loading/unloading mechanism
Chassis
J " \
I
I
,..--,
I I
( Cassette
c=======
loading ----W.~~~~----~==~----~=;==~~=U
status) ::: Loading base
III
III
t L.':
(M) Ass'y
(Unloading status )------
- 306 -
o Asymmetrical slot
Stopper ( Chassis )
Selector
- 307 -
(2) Magnetic head shift mechanism
The main components of the magnetic head shift mechanism are a head
base Ass' y and solenoid Ass' y. A magnetic head is mounted on the
head base of the head base Ass'y.
The head base is shifted up and down (two positions) by the DC
solenoid. The head base Ass'y contains three kinds of adjusting
screws to adjust the appropriate head positions with respect to the
tape winding position (Fig. 305).
(3) Tape drive mechanism
The tape drive mechanism consists of two reel motor assemblies,
encoder and encoder roller.
The tape causes the encoder roller fixed to the shaft of encoder to
be rotated by friction. A feedback signal from the encoder is sent
to the reel motor to apply servo effect to it so that the tape speed
is kept always constant.
(4) Various detection mechanisms
(a) Cassette loading detection mechanism
This mechanism consists of a photo interrupter and a loading arm
(M) to detect the loading condition of the cassette tape. When
the cassette tape is loaded onto the MTU, the optical detection
path of the photo interrupter is interrupted by the tip of the
loading arm (M). In this status,' data can be written or read
(Fig. 306).
(b) Write inhibit hole detection mechanism
This mechanism consists of a photo interrupter and file protector
to detect the wire inhibit hole on the cassette half rear face.
When a cassette tape whose write inhibit hole is open is loaded,
the optical detection path of the photo interrupter is interrupted
by the file protector. In this status, the data write function is
deactivated and new write operation is inhibited, and then the
recorded data is protected (Fig. 307).
- 308 -
(c) Marker detection mechanism
This mechanism consists of LED hole sensor Ass'y and sensor guide
Ass'y to detect the BOT/EOT holes (markers) of cassette tape.
LED built in the LED hole sensor Ass'y and photo transistor in the
sensor guide Ass I y detect the holes (markers) provided at both
ends of magnetic tape (Fig. 308).
Adjusting screws
~ Solenoid Ass'y
- 309 -
Photo interrupter
Loading arm (M)
,
Interrupter J
- 310 -
3-2 Operation of data recording/reproducing system (PCBA Drive Control)
3-2-1 Read circuit
The read circuit consists of preamplifier, track select, AGC (Automatic Gain
Control) amplifier, low-pass filter, differentiator, zero crossing detector,
time domain filter, threshold detector, and read gate, etc.
The outout signal of several mV from the read head is amplified by the
preamplifier of differential input/output type. Two channels of pre-
amplifiers are prepared to correspond to the number of channels of the read
head. The output signals of the preamplifiers are led to the track select
circuit through attenuators to adjust the read preamplifier level.
The track select circuit performs changeover between the track 0/2 side and
track 1/3 side according to the track to be accessed. The output signal of
the track select circuit is amplified by a one-stage voltage-controlled
amplifier, and applied to the AGC amplifier.
The AGC amplifier adjusts automatically its own gain so that the sensitivity
difference of the magnetic tape used is corrected and the read level is kept
nearly constant. The output signal of the AGC amplifier is led to the
low-pass filter to reject the unwanted noise components. The output signal
of the low-pass filter is phase shifted by the differentiator so that the
peak position of the reproduced signal is set to the zero cross position,
and the phase-shifted signal is led to the zero crossing detector and time
domain filter. The zero crossing detector consists of two comparators.
pulse delay circuit, and flip-flop circuit, etc. to convert the output
signal of the differentiator into a pulse signal.
The output signal of the zero crossing detector is made free through the
time domain filter from the bad influence of the saddle generated during
reading of IF signal (1001 data pattern) to be led to the read gate circuit.
Meanwhile, the output signal of the low-pass filter is applied to the
differentia tor and at the same time, led to the level detect amplifier
through an attenuator to adjust the read level.
- 311 -
Since the frequency characteristic of the level detect amplifier is
determined so that the level difference between the 1F signal (1001 data
pattern) and 3F signal (1111 data pattern) may be controlled, the even
threshold level is set even during random data pattern. The threshold
detector monitors the output signal of the level detect amplifier by a
comparator to keep it at the constant level or more.
When the signal is applied to the threshold detector at the specified level
or more (threshold level), the following stage retriggerable
monostable multivibrator is retriggered continuously. If the input signal
level of the threshold detector is reduced due to drop-out, etc., the
trigger pulse signal to the retriggerable monostable multivibrator is
interrupted, and the output signal of the retriggerable monos table
multivibrator is inverted, and then read gate is closed.
The timing of this retriggerable monomultivibrator is set to the data length
of 7 - 15 bits.
Therefore, when the readout signal from the read head is dropped out over
the length of 7 - 15 bits or more, the transfer of the RD signal is stopped.
The threshold level is changed over by the threshold control circuit so that
the threshold level becomes 35% during write operation (read after write),
10% during gap read operation (read only), and 0% during data read operation
(read only).
Fig. 310 shows an example of the operational waveforms of the above-
mentioned read circuit.
- 312 -
51
-00-
GAIN
SELECT TP~
~ ~ C3~
L'-----',r--r-r:----~-l-----J
BIAS 6V "---
! TPIO .-L~T=H=R=ES=H=OL=D~
1 CONTROL l-
RMOOE
I IL-~====~______.__~
~~---------------------~
Magnetized
condition on tape
L
I
I
I
I
I
Preamplifier I
I
output TP3
Differentiator
output TP7
Level detect
amplifier
output TP8
Zero crossing
detector
output U6-16
RD signal
- 314 -
3-2-2 Write circuit and erase circuit
Fig. 311 shows the block diagram of the write circuit and erase circuit.
r--------------l
I I WRITE HEAD
WO
WRITE HEAD I
... :21
DRIVER I ..It --TR 0/2
...
WEN
I I
I
I
... :::lI ,_
ROY :ll -TR
J- 113
FP
LOGIC
I
I
... ~
I..VS
TRO
EEN
- TR 0/2
I
I
il jwRrrEGATE I
I
RMOOE
TR 0/2
TR 1/3
- TR 1/3
WRITE GATE
I
I
I
I
I
ERASE I
'--
GATE I
I
I ERASE HEAD
ERASEHEAO I ----:-zf x
ECI..K
DRIVER I ~;,
~a _____________ I
~
The write circuit and erase circuit consist of a write head driver, write
gate, erase head driver, erase gate, and logic circuit for the above
circuits, etc.
The write head driver feeds the write current to the write head according to
the write data given from the PCBA interface control. The write gate
changes over the supply current between the track 0/2 side and track 1/3
side according to the track to be data recorded.
- 315 -
The erase head driver feeds the erase current to the erase head according to
the erase clock signal given from the PCBA Interface Control. At this time,
the erase current is supplied from the erase gate.
- 316 -
3-3 Operation of tape drive system (PCBA Drive Control)
3-3-1 Servo circuit
TPI9 RDY - - - ,
~--------~-----------------------------------E~
r -----, r - - - - - --R43lr ---,M;--------..,
ENCODER I II ~ II ~ I IZV
I , , II ,
f::\
U
I ENCODER I I .... MONO- II'" FIV .-- MOTOR I POWER
~ ~----;"I--I PRE AMP I I TOR MULTI II _ ,~ DRIVE AMP I--T!-...,~I-{ TRANSISTOR
I~L ___ ~I
II r- Tt-
I
I
I,
f---4TPZO
I I START S-LIM
.---+---~...,
,
,
I
HIS
RST
I
,
I.
CONTROL ,
I
I
~R. :~OR.
HIS -----------:-i.f
_ _ _ _ _ _ _ _ _ _ _ _ _ _ _:..,1 CLK
I '- .::::-.CLK I
M M
~ I lOGIC I TENSION ~I CRI CRZ
_ I LOGIC ~ CONTROL I I
: GO INT I 6 c~ t-i,---+--..J
I I DIRECTION FWD I CR8
LY~ _________ J CONTROL I' CR7
REV
FWD ----------------------------------;-~ I
GO-----------------~~ I
LOK----------------------------------~~ ~----------_;_I------------~~~T~Ma
LY~~&.9!L ______ J
- 317 -
50% during tape movement. The output signal of the monomultivibrator is
converted by the following stage F/V (frequency/voltage) converter into a
voltage proportional to the rotary speed. The motor drive amplifier changes
the base current of the power transistor according to the output voltage of
the F/V converter, and finally controls the motor current.
Since the rotary speed of the motor is transmitted to the encoder via the
tape, a servo loop is formed to move the tape at a constant speed by the
above-mentioned signal flow.
The tape speed is changed over between 90 ips and 30 ips by changing the
setting time of the monostable nultivirator. The start controller generates
lamp waveform to determine the rise time at the start of the tape. As for
the direction controller, the direction of tape movement is determined by
changing over the FWD side motor and REV side motor to each other, and at
the same time, the brake is also. controlled at stop time.
As for the tension controller, the current of the feed side reel motor is
controlled to keep the tape tension constant during tape movement.
- 318 -
3-3-2 Other control circuits
Fig. 313 shows the block diagram of the other control circuits •
• --------1
050
I I
TSI
I I TROI2
I SELECT I
TSO TR 1/3
I
r-!-
I I
TRO
TPI4
I 5V,12V I
I LOW I LVS
I VOLT.AGE I
SENSE
I I CRII
I I
I
POWER ON I POR
RESET I
I L - - - - -1
I
I """--
I ROY
L-----1 READY I
CLD I ACK
I I
I I
I
*
TPI3 I
I
BOT/EOT
i I
I
I
HOLE
SENSOR
I
I
HOL
I I
I I
I I
I I
FILE
FPT
I PROTECT
I FP
I SENSOR I
I I
~ ~ - - - - - ..J TP21
i------l T -=-i
DOWN I
I
SOLENOID
DRIVER
I
I
1 SOLENOID.
HEAD SHIFT
I I
There are a select. low voltage sens. power ON reset. ready, hole sensor,
file protect sensor. and solenoid driver as the other control circuits.
The select outputs a head shift solenoid control signal and track changeover
signal. according to the drive select signal and track select signal given
from the PCBA interface control. The low voltage sense monitors both the
power voltages of 5 V and 12 V. and outputs an LVS signal when an excessive
- 319 -
voltage drop occurs. The power ON reset outputs a POWER ON RESET signal of
approx. 50 ms during power ON time. The ready detects the POWER ON RESET
signal and the loading of a cassette tape, and outputs the ROY signal and
ACK signal. The hole sensor converts the output signal of the
phototransistor for the hole sensor into a pulse signal and outputs it.
The file protect sensor converts the output signal of the photo interrupter
for detecting the write protect hole into a pulse signal and oututs it. The
solenoid driver feeds the drive current to the head shift solenoid when
track 1 and track 2 are selected. The solenoid driver drives that solenoid
for 200 ms by the power supply of 12 V to attract it, and after that, holds
it by the power supply of 5 V.
- 320 -
"D/CAS"
The data transfer between the individual blocks within MTC as shown in Fig.
301(a) is performed by DMAC in competition with CPU on the CPU bus (cycle
stealing mode). At this time, however, this system is programmed so that
the CPU bus is released to CPU once on every DMA cycle to prevent the CPU
bus from being occupied for a long time, when data transfer requests are
concentrated, thereby assuring the worst operating ratio of CPU.
- 321 -
3-4-1 CPU
The microprocessor 80C85A is used as the CPU. The CPU controls the opera-
tion of each LSI within MTC. It also controls directly controls the moving
system and write system signals GO, FWD, HIS WEN, and EEN, etc. with respect
to GMT via the output port, or monitors the ouptut signals CLD, FPT, and
HOL, etc. from GMT via the input port and feeds them back to the tape motion
control.
While, as for the data system, the CPU generates a data block by adding a
header (such as track No. and block address) to the data received from the
HOST during write operation, or generates File Mark Write, and control
block, and controls Rewrite, etc. during error occurrence. During read
operation, it also checks the header, and identifies the data block, file
mark block and control block, and then transfers only the data part of the
data block to the HOST.
- 322 -
3-4-2 ROM
3-4-3 RAM
- 323 -
3-4-4 Host interface control
The hardware of the host interface control consists of one gate array logic
IC (U11/2310 IC, interface control) and driver/receiver.
For the details of the interface signal timing, refer to the "MT-2ST/20D
Specifications".
Description is given below on the major operations of this IC.
HBO to HB7, and HBP are a bidirectional bus.
To prevent the bus competition between the driver IC and HOST side driver,
there is the timing relation as shown in Fig. 314 among this bus, DIR and
HBOEN.
DIR(HI
~
H80EN(HI I I~_
H8~ '" H87,H8P I I ~,--------) i I
W
CD ® ®
lJJ ® ®
TI ~ 1390s
Tz > 1380s
T3 > 1380s
T4 ~ 1390s
- 324 -
UIS
23",31 HB~
\
S
/ /
HOST \ DRIVER V \
DATA
/ f\ /
BUS
I
IRECEIVER
\ I
HB7
HBP
CLKO
38
- 7.2 MHz
UI7
UI8
~ HBOEN(H} 16
HBOEN
DIR(H}18 15
DIR DIR HDRQ HDRO(H}
RDY(H} 20 12
ROY '"'
~ ROY DACK~ HDACK(U
XFR(HI32 14
XFR XFR EOP EOP(L)
ACK(H}21 40
ACK ACK WR 10W(L)
41
RD 10R(Ll
- 325 -
HDRQ(H)~ HDACK(L) and EOP(L) are interface signals with DMAC. During write
operation~ these signals have the timing relation with the host interface
signals ACK(H), XFR(H)~ and RDY(H) as shown in Fig. 316; during read opera-
tion, they have the timing relation with ACK(H), XFR(N) and RDY(H) as shown
in Fig. 317.
ROY (HI
XFR (HI
ACK(HI
L
HORQ(HI
HOACKCL)
EOP (L)
f
Jl ----------~j~r-------.~
----------------------------------~!~{--------,LJ
o
Fig. 316 Timing in write operation
ROY(HI
~ I
XFR(HI
~
(
t~ I
ACK(HI r~ L
CD
HORQ(HI
r-----J I
HOACK(U
~~
(E
EOP(L) U
0
Fig. 317 Timing in read operation
- 326 -
In each case, the RDY(H) signal is set by CPU prior to the transfer of each
block. During read operation, the HDRQ(H) signal is also set simultaneously
(timing (!)).
During write operation, the data from the HOST is latched in the register
within this IC by the leading edge of HDRQ(H), and the data is stored in RAM
by the IOR(L) and NW(L) signals outputted from D¥~C together with HDACK(L).
During read operation, the beginning data request of each block to DMAC is
set by CPU (timing (!)). MR(L) and IOW(L) are outputted from DMAC, and the
data is written in the register within this IC.
In any case, the data block is transferred in 512 bytes units, and the RDY
signal is set by CPU prior to the transfer of each block (timing (!)).
When end data of each block is transferred, the EOP(L) signal is outputted
from DMAC together with the HDACK(L) signal, and Fly within this IC is set
(timing ~), and thereby the CPU identifies the transfer of one block to be
ended.
- 327 -
3-4-5 DMAC
The DMAC consists of an IC 82C37 DMA controller (Un and 8 bit address
latch.
The channel 0 is assigned with host interface control, and the channel 1
with write control, and then the channel 2 with read control.
During write/read operation, the relevant two channels are always operated
simultaneously. During write operation, the channel 2 is also operated only
for the beginning 4 bytes of each block on the tape in read after write
operation.
Namely, the three channels are operated simultaneously only in such a case.
BLKDET (TP I)
RDACK(U
EOP(U U
Fig. 318 Channel 2 timing in write operation
Note that the I/O system and memory system of the write/read signal of DMAC
are connected reversely to those of CPU as shown in Table 301 below.
MW(L) IOW
-
MR(L) IOR
IOW(L) MW
IOR(L) MR
- 328 -
3-4-6 Counter/timer
- 329 -
3-4-7 Write/read control
- 330 -
.---
CMT SIDE
WRITE GCR SHIFT
CPU
BUS
DATA MPX f---- CONVER- f-- REG.
WO
REG. TER ( WRITE DATA)
~
CRC
GENERATOR
Lr
'---
READ
DATA
REG.
GCR
CONVER-
TER - SHIFT
REG.
RO
(READ DATA)
VFO I--
- 331 -
(3) VFO circuit
In order to sample properly the serial read data. whose period
changes dynamically with fluctuation in the tape speed. the VFO
circuit controls the read clock to keep always the synchronization
with the serial read data.
TP5 TP9
I I
UP(H)
RD
PHASE LOW PASS Vc
COMPARA- FILTER VCO OUT
-
TOR
DWN(L)
T~2 ()
TP4
READ CLOCK
Reference timing (TP5 and TP9) is generated from the serial read data (RD).
Data sample timing (TP2) is also generated by dividing the frequency of the
read clock. The phase difference between these two timings is detected by
the phase comparator. When the data sample timing lags behind the reference
timing. UP(H) pulse is outputted to the following stage; when the former
leads the latter. DWN(L) pulses is outputted to it.
RD
REFERENCE TIMING
DWNILl
U
Fig. 321 VFO circuit timing
- 332 -
In the low-pass filter, each integral time is converted into level output Vc
potential so that it becomes higher against UP(R) and lower against DWN(L),
and thereby the oscillation frequency of the following stage VCO is
controlled.
The reference timing in read operation appears at TPS, and that in write
operation (read after yrite) appears at TP9.
- 333 -
3-4-8 I/O port
The I/O port consists of 81C55(U6). The CPU controls CMT directly via this
I/O port. and monitors the various status signals outputted from CMT.
SCSI
- 334 -
"SCSI"
- 335 -
3-5-1 CPU
The microprocessor 80C85A is used as the cpu. The CPU controls the opera-
tion of each LSI within MTC. it also controls directly the moving system
and write system signals GO, FWD, HIS WEN, and EEN, etc. with respect to CMT
via the ouptut port, or monitors the output signals CLD, FPT, and HaL, etc.
from CMT via the input port, and feeds them back to the tape motion control.
While, as for the data system, the CPU generates a data block by adding a
header (such as track No. and block address) to the data received from the
HOST during write opeeration, or generates File Mark and control block, and
controls Rewrite, etc. during error occurrence. During read operation, it
also checks the header, and identifies the data block, file mark block and
control block, and then transfers only the data part of the data block to
the HOST.
- 336 -
3-5-2 ROM
3-5-3 RAM
- 337 -
3-5-4 Host interface control
The hardware of the host interface control consists of a gate array logic IC
(U12/2557 IC, SCSI control) and TTL logic IC (U21, U22) and driver/receiver.
For the details of the interface signal timing. refer to the "MT-2ST/20S
Specifications".
TCLK
I I
I I
I 3
SEL
\\\\\\cb I
o o
I
111111
BSY
c/o
REO
- 338 -
(2) Command transfer
REQ is outputted one clock after c/n is outputted upon receipt of
selection. The command transfer is performed by handshakeing between
REQ and ACK.
Fig. 323 shows this status including the relation with nMAC.
- 339 -
52
HDRO
53
54
HDACK(L)
EOP{L)
1 TO OMAC
2557
UI2
2 0 ® 32 1-'2:.:..1_ _ _ -'-1,. . . 6
t-----;~ HINT TO CPU
U21
3 - 6
ACK >----.---I,c Q
36 ©
REO
10
12
o P 0
9 ®
OV U21
II c _ 0
R
13
+5V
TCLK ~
~Fl
REO
'-I
ACK _ _ _ .-1I _ _ _ _ _ _ _ JI
® \
® _____ JI "--_.... _ _ _ _ _ _ _ _ JI
©
HDRO
HDACK (Ll
IOR(U
MW(Ll U !( U
EOP (L)
U
HINT
.
_ _ _ _ _ .1I
CD ® @
- 340 -
CD REQ is set to FALSE 0.5 to 1.5 clock after ACK is outputted. At
this timing. the contents on the data bus (HBO - HB7, HBP) are
latched in the internal data register of 2557.
- 341 -
TCLK
REO
ACK
®
®
©
HDRO
HDACKILl
MR III LJ
IOWILl
U
EOP(LJ-U-
....---1----
HiNT I
CD ®
Fig. 324 Read data transfer timing
- 342 -
CD The data is written from RAM into the internal register of 2557 by
the MR(L) and roWeL) outputted from DMAC, and its contents are
outputted over the interface bus (HBO to HB7).
CD The HOST fetches the data on the interface bus, and outputs ACK.
The handshake timing of REQ and ACK is the same as in Fig. 323.
o When the ACK response is very fast, REQ is set to FALSE, and
interrupt request HINT to CPU is outputted 0.5 clock after (indi-
cated in break line in the figure).
- 343 -
3-5-5 D}f..AC
The DMAC consists of an IC 82C37 DMA controller (U8) and 8-bit address
latch.
The channel 0 is assigned with host interface control, and the channel 1
with write control. and then the channel 2 with read control.
During write/read operation. the relevant two channels are always operated
simultaneously. With the 30 ips model. during write operation, the channel
2 is also operated only for the beginning 4 bytes of each block on the tape
in read after write operation.
Namely, the three channels are operated simultaneously only in such a case.
BLKDET ITP I)
Note that the I/O system and memory system of the write/read signal of DMAC
are connected reversely to those of CPU as shown in Table 302 below.
MW(L) lOW
MR(L) IOR
10W(L)
-
MW
-
IOR(L) MR
- 344 -
3-5-6 Counter/timer
- 345 -
3-5-7 Write/read control
- 346 -
..----
CMT SIDE
CPU WRITE GCR SHIFT
BUS
DATA
REG.
MPX r--- CONVER- r-- REG.
WD
r
TER (WRITE DATA)
L....;.. CRC
GENERATOR
---- READ
DATA
REG.
GCR
CONVER-
TER
t--
SHIFT
REG.
RD
(READ DATAl
VFO r--
- 347 -
(3) VFO circuit
In order to sample properly the serial read data, whose period
changes dynamically with fluctuation in the tape speed, the VFO
circuit controls the read clock to keep always the synchronization
with the serial read data.
TP5 TP9
I I
UP(H)
RD
PHASE LOW PASS Vc
COMPARA- FILTER VCO OUT r---
TOR
DWN(L)
,--
()
T*2 TP4
READ CLOCK
Reference timing (TPS) is generated from the serial Read Data (RD).
Data sample timing (TP2) is also generated by dividing the frequency
of the read clock. The phase difference between these two timings is
detected by the phase comparator. When the data sample timing lags
behind the reference timing, UP(H) pulse is outputted to the follow-
ing stage; when the former leads the lat ter, DWN (L) pulse is out-
putted to it.
RD
REFERENCE TIMING
- 348 -
In the low-pass filter, each integral time is converted into level
output Vc potential so that it becomes higher against UP(H) and lower
against DWN(L) , and thereby the oscillation frequency of the next
stage VCO is controlled.
The reference timing differs betwen the write operation and read
operation.
- 349 -
3-5-8 I/O port
The I/O port consists of IC 81C55(U4). The CPU controls CMT directly via
this I/O port, and monitors the various status signals outputted from CMT.
- 350 -
"BASIC"
There are two types of interface controls; one is of a discrete type (exclu-
sive for 4 tracks) and the other is of a LSI type (in common to 4 tracks and
9 tracks). The discrete type interface control consists of individual
circuits of INITIAL CONTROL, MOTION CONTROL, TAPE POSITION MANAGEMENT. RDP
CONVERTER. CASSETTE LOAD DELAY. TACH PULSE CONVERTER (1/16) and CLOCK
GENERATOR. etc •• and all the I/O signals are of TTL level.
The LSI type interface control (PCBA interface control P /N 1553207300.
applied to issue D onward) is a LSI version of the discrete type interface
control. There is not operational difference between these two types except
with the track select signal added.
This interface control consists of a peripheral circuit and driver/receiver.
etc •• centering around the interface control LSI (hereinafter. referred to
as LSI).
The BASIC I/F side input/ output is of TTL level. and the DRIVE I/F side
input is of TTL level. and its output is of CMOS level.
The LSI is a CMOS type Gate Array. in which almost all processings required
for interface control are performed.
Fig. 329 shows the hardware block diagram of each type of interface control.
- 351 -
BASIC tlF DRIVE I/F
TR~ 2 2 TS ~ (HI
TRI TS I (HI
3
WOA WO
WEN WEN(HI
EEN(HI
EEN
2 2 OSO (Ll
050 a:
w INVERT LTH (HI
THO >
w
U
w 3 4
GO a: GO(H)
FWD(H)
REV
HIS(HI
HSD ,;-= LOK(Ll
II
II
II '--------,
II I
I(
II
RST II
\I INITIAL CLOCK
IIr- ECLK
CONTROL GEN.
II I
'--- 2\11
J.l-I
i
II I I
II I I
I II
I
II I I I I
\I 1 I I I
II I I
~ t
r---------4
II I I
r--- II I
UTH
2 2 I "\'- L-i TAPE I
POSITION HOUL)
I
I
I
LTH MANAGE
I
f---------'
CASSETTE
CIN a: t LOAD CLD(Ll
w
-a:>
I DELAY
0
TACH PULSE
TCH ENC(U
CONV.(J/16)
- 352 -
TR~ 4 r 4 TS& tH)
~ ~
TR3
I RECEIVER TS3(H)
WDA
I .--- 3 I WD
WEN
I WENlH)
EEN(HI
EEN
I
OSt\l
II 2
INVERT I
OS&ILl
THO LTHIH)
a:
GO II w
>
-
w
0
w
3 II II GOtH)
REV a: FWDtHI
MOTION
HSD
I CONTROL I I HIS(HI
I I ~
(,";.~ . LOKIL)
RST
II
II
II
II
i
INITIAL
t L __,
I
I
I
II I
,
I
I
I
RSTIL)
II , , - -
III : - CONTROL I I
2x:
" I I
"I I
I
I t ___~
I
I
I
I
I
J 11,1 I
l I J CLOCK
I
7.2MHz
III I I ! I
ECLK
GEN. ~_~ _____ I _ _ _ _ ~ I
III I I I
I
I
III I f r--I
t
III I I
III .... _
~
UTH 2 ~TAPE POSITION I HOLE SIG. l - HOUL)
LTH I MANAGE. I INHIBIT
I
I
I f -I
I
ROP
- I
I
I ROPCONV.
I
I
I
RD
I
I I
I
,I r-- I
- 353 -
3-6-2 Theory of operation
- 354 -
(2) Motion control
The motion control circuit consists of a CLEAR-LEADER CONTROL part,
DIRECTION CONTROL part, SPEED CONTROL part, STOP CONTROL part,
and GO CONTROL part.
THE CLEAR-LEADER CONTROL part is a circuit to control the tape motion
within the clear reader.
The CIRECTION CONTROL part is a circuit to control the tape motion by
the tape winding direction changeover (REV signal change).
The SPEED CONTROL part is a circuit to control the tape motion by the
tape speed changeover (HSD signal change).
The STOP CO~~ROL part is a circuit to control the tape motion when
any of the REV signal, HSD signal and GO signal from the BASIC IfF
changes. The REV signal, HSD signal and GO signal are inhibited
during stop motion.
The GO CONTROL part controls the GO(H) signal to the DRIVE IfF
according to the tape motion control signals from the above-mentioned
two control parts.
I----
I
GO r---:- GO (H)
UTH
I CLEAR-
GO
CONTROL
r------- GOD
LTH
I LEADER
FWDD
I
--------- CONTROL
I
FWDD --------- r-: STOP r--
CONTROL
-
r---
REV - - - - - ; - - - - - ; DIRECTION I I I FWD (H)
CONTROL r--,---,-------------,----- FWDD
- 355 -
(3) Tape position manangement
The TAPE POSITION MANAGEMENT CIRCUIT is a circuit to convert hole
information from the DRIVE IfF into tape position code. This circuit
becomes operable after initialization has been completed.
After Power ON (with the cassette loaded). cassette loading, or
resetting. this circuit is inhibited by the PRDY signal until the EOT
or BOT side clear leader is detected.
After the EOT or BOT side clear leader is detected and the tape
position is initialized (each signal of UTHI and LTHI is set to
either EOT position or BOT position status), the inhibit of this
circuit is released. Then, this circuit is placed in operable
status.
I
t
HOLE
HOL(H)
I CLOCKING
-----------~ HOLD
I I
I I I
RST PRDY eLK
- 356 -
(4) RDP conversion
The RDP CONVERSION CIRCUIT is a circuit to detect the leading and
trailing edges of the RD signal of the DRIVE IfF. and convert it into
pulses.
RD------i \ - - - - - - - - - RDP
RDP CONVERSION
CIRCUIT
ClK
ClD(U - - - - - - - 1 CIN
CASSETTE LOAD DELAY
CIRCUIT
- 357 -
(6) Tach pulse conversion
The TACH PULSE CONVERSION CIRCUIT is a circuit to divide the fre-
quency of the ENC(L) signal from the DRIVE I/F by 16, and supply the
resultant signal to the BASIC I/F as tach pulses.
ENC (U - - - - - - - t f-------TCH
TACH PULSE
CONVERSION
CIRCUIT
- 358 -
3-7 Functions of test points, variable resistors and straps
The positions of the test points, variable resistors and straps are shown in
Fig. 336.
R41 R43 R44 TP18 "oJ TP3 TPI R48
S2
Sl
TP22
2~ R21
TP19---t;1
Rl7
GND TP9
R12
TP7 8 G
- 359 -
GND TP6- TPI so ~ S3
Rl2---+---·
SO Sl
- 360 -
3-7-1 Functions of test points
The PCBA Drive Control and PCBA Interface Control are provided with the
following test points to facilitate observing the waveforms required during
MTU adjustment and test.
(1) TPl (GND) PCBA Drive Control
This point is connected to 0 V.
(2) TP3 (output of read preamplifier) PCBA Drive Control
Test point for measuring the output of the read preamplifier.
TP3 is used to adjust the level of the read preamplifier" ,and check
the various characteristics of the head Ass'y, etc.
- 361 -
(5) TP6 (GND) PCBA Drive Control
This point is connected to 0 v.
(6) TP7 (output of differential amplifier) PCBA drive control
Test point for measuring the output of the differentiator.
TP7 is used to check the operation of the read amplifier.
(7) TP8 (output of the level detect amplifier) PCBA Drive Control
Test point for measuring the output of the level detect amplifier.
TP8 is used to adjust the read level, and check the various
characteristics of the head Ass'y.
- 362 -
(8) TP9. 10 (threshold level) PCBA Drive Control
TP10 is a test point for measuring the threshold level. TP9 is the
output terminal of the 2.5 V bias power supply which is used as a
reference during threshold level measurement. The threshold level is
represented by the voltage difference (DC voltage) between TP9 and
TPlO.
TP9 and TPI0 are used to check the threshold level.
The voltage difference (DC voltage) between TP9 and TPI0 is approx.
450 mV during write operation, and approx. 330 mV during read
operation. (However, each value is that obtained when the write mode
and read mode are changed over to each other by turning ON/OFF the
WEN signal without moving the tape.)
(9) TPII (output of read level detecting monostable multivibrator)
PCBA Drive Control
Test point for measuring the output of the read level detecting
monostable multivibrator.
TPll is used to check the read level detection delay time. The
signal is the Q output of the monostable multivibrator.
TPll ~~______________~
l J - D e l a y time
- 363 -
(11) TP13 (input of hole sensor) PCBA Drive Control
Test point for measuring the input of the hole sensor.
TP13 is used to adjust the sensitivity of the hole sensor.
_ - - - - - - - . , . , - - - - - - - - - - 12 V
12 V power voltage
(When the voltage is - - - - - - --Sense voltage
changed gradually) I
I
I
I"
I oV
I
TP14
I
I
I
--------Approx. 5 V
" 0 V
- 364 -
(15) TPi7, 18 (GND) PCBA Drive Control
These points are connected to 0 v.
(16) TP19 (output of encoder preamplifer) PCBA Drive Control
Test point for measuring the output of the encoder preamplifier.
TP19 is used to check the operation of the encoder. Since TP19 is
the test point used during manufacturing of MTU, it is not used for
maintenance usually.
(17) TP20 (servo output) PCBA Drive Control
Test point for measuring the servo output.
TP20 is used to check the operation of the servo circuit. Since TP20
is the test point used during manufacturing of MTU, it is not used
for maintenance usually.
(18) TP21 (output of solenoid drive) PCBA Drive Control
Test point for measuring the output of the solenoid drive.
TP21 is used to check the operation of the solenoid driver. Since
TP21 is the test point used during manufacturing of MTU. it is not
used for maintenance usually.
(19) TP22 (RD output) PCBA Drive Control
Test point for measuring the RD (Read Data) output.
TP22 is used to check the operation of the read circuit. Since TP22
is the test point used during manufacturing of MTU. it is not used
for maintenance usually.
- 365 -
"D/CAS"
TPI
4Jr--------'-I---,U..-----
0.17 ms II 5.76 ms .1
(a) "90 ips"
TPI
--lJr-----'-/-----,U~-
- 366 -
TP2 ~ __~n~__~I1~__
278 ns I
-o+--i--
1111 ns
TP2
833 ns
--+--+-
3333 ns
TP3
TP3
- 367 -
(23) TP4 (frequency control) PCBA Interface Control
Test point for measuring the frequency control signal within the read
data separator.
TP4 is used to adjust the VFO operating point.
TP4 -- -- 2.5 V
J4-l7 RD signal ~
TPS
-L-6 ns
J4-l7 RD signal ~
TPS
ilio
, I
ns
- 368 -
(25) TP6 (CPU clock) PCBA Interface Control
Test point for measuring the CPU clock signal.
TP6 is used to check the CPU clock frequency.
TP6
TP6
Frequency = 1.5 MHz
- 369 -
J4-17 RD signal.-J
TP9
J4-17 RD signal ~
TP9
- 370 -
"SCSI"
TPl \
~r-----~----.U'-------
I
0.17 ms II 5.76 ms .1
(a) "90 ips"
TP1 ~'------_/!....------'U'----
o. 51 ms II 17 • 28 ms .1
(b) "30 ips"
- 371 -
TP2
278
ns IL, ns.1
(a) "90 ips"
TP2
250
TP3
TP3
- 372 -
(31) TP4 (frequency control) PCBA Interface Control
Test point for measuring the frequency control signal within the read
data separator.
TP4 is used to adjust the VFO operating point.
TP4 -
----------- ----- ---- 2.5 V
J4-17 RD signal ~
TP5
TP5
llions
. ,
- 373 -
(33) TP6 (CPU clock) PCBA Interface Control
Test point for measuring the CPU clock signal.
TP6 is used to check the CPU clock frequency.
TP6
- 374 -
"BASIC"
TPl
TP2 Cassette In
Delay time
I Delay time .1
(b) PCBA issue D~
- 375 -
(37) TP3 (TCH) PCBA Interface Control
Test point for measuring the tachometer pulses.
TP3 is used to check the tachometer pulse frequency.
TP3
TP4 ~
- 376 -
3-7-2 Functions of variable resistors
The PCBA Drive Control and PCBA Interface Control are provided with variable
resistors for various adjustments.
(1) R21. 17 (adjustment of read preamplifier lev~l) PCBA Drive Control
R21 and R17 are variable resistors to adjust the levels of the read
amplifiers for the track 0/2 and track 1/3. respectively.
While monitoring the read amplifier levels. adjust R21 and R17 until
they become the specified values.
(2) R48 (adjustment of read level) PCBA Drive Control
Variable resistor for adjusting the read level.
While monitoring the read level at TP8. adjust R48 until it becomes
the specified value.
(3) R41 (adjustment of hole sensor sensitivity) PCBA Drive Control
Variable resistor for adjusting the sensitivity of the hole sensor.
Adjust R41 until the voltage at TP13 becomes the specified value when
the hole sensor test tape is loaded.
(4) R44 (adjustment of 90 ips tape speed) PCBA Drive Control
Variable resistor for adjusting the tape speed of 90 ips. Adjust R44
until the frequency of ENC signal (J4-12) becomes the specified value
during tape movement at high speed (HIS signal at J4-26 is true).
(5) R43 (adjustment of 30 ips tape speed) PCBA Drive Control
Variable resistor for adjusting the tape speed of 30 ips.
Adjust R43 until the frequency of the ENC sign~l (J4-12) becomes the
specified value during tape movement at low speed (HIS signal at J4 -
26 is false).
At this time, it is necessary that the adjustment of R44 (90 ips tape
speed) has been completed prior to the adjustment of R43.
If R44 is adjusted later than R43. the 30 ips tape speed may also be
changed.
Remark The 30 ips tape speed is fixed in some model of MTU. In
such a model, not a variable resistor but a fixed resistor
is mounted as R43.
- 377 -
"D/CAS" "SCSI~
- 378 -
3-7-3 Functions of straps
The PCBA drive control and PCBA interface control are provided with straps
to change over the MTU functions. or make adjustment and check.
(1) Sl (changeover of read amplifier gain) PCBA Drive Control
Strap for changing over the gain of the read amplifier.
The read amplifier is set to AGC OFF status during check and
adjustment for head alignment. This strap is used to prevent the
gain of the read amplifier from becoming excessively high in such a
case.
The gain of the read amplifier is reduced by shorting Sl. Normally.
Sl is used in open status.
(2) S2 (AGC ON/OFF) PCBA Drive Control
Strap for turning ON/OFF the AGC of the read amplifier. When S2 is
shorted. AGC is turned ON; when opened. it is turned OFF.
Normally. S2 is used in shorted status.
"D/CAS"
"SCSI"
- 379 -
"BASIC"
- 380 -
SECTION 4
MAINTENANCE
- 4000 -
4-1 Outline of maintenance
4-1-1 Routine maintenance
The routine maintenance is required for the MTU to keep its operational
performance at the specified level or more, and prevent an error generation
as much as possible.
There are various routine maintenance items from cleaning of the magnetic
head to be made at short intervals by the user, to replacement of the head
to be made at long intervals by maintenance experts.
The magnetic head cleaning is intended to remove the dirt and dust generated
by the movement of tape or under the severe environmental conditions as much
as possible, and thereby prevent data dropout or damage to the tape, thus
enhancing the reliability.
Therefore, the magnetic head should be cleaned periodically at the intervals
shown in Table 401 in order to secure the reliability of data.
For how to clean the magnetic head, refer to Item 2-1-6 of the instruction
manual.
The parts with service lives used for the MTU are recommended to be replaced
in assembly units every time they reach the recommended periods shown in
Table 403.
The parts should be replaced according to the individual relevant items
given in Para. 4-4 on referring to the precautions shown in Para. 4-2.
Routine Required
Recommended Periods Remarks
Maintenance Item Time
- 4001 -
4-1-2 Check and adjustment
- 4002 -
Mainte- Required Descriptive
nance Check and Adjustment Items Time Item of
Order I
90ips 30ips Maintenance
- 4003 -
4-1-3 Maintenance parts
When the MTU is operated at specially heavy duty or MTU it operated over a
long period, it is recommended to replace the parts periodically according
to the list given below.
Table 403 shows the maintenance parts list. Replace the parts, whose
replacement periods recommended are shown in this table, every time their
replacement periods recommended are reached.
Notes:
(1) The parts whose replacement periods recommended are not shown need
not shown need not be replaced periodically. Replace them at the
time of fault occurrence, etc. as required.
(2) The replacement time required includes the time required for the
basic function check and adjustment after the replacement of parts.
(3) The reel motor (F) Ass'y and reel motor (R) Ass'y should be
replaced at the same time without fail.
(4) When the encoder Ass'y and the encoder roller is to be replaced, at
the same time.
(5) Part Nos. of the PCBA Drive Control and PCBA Interface Control
change depending upon model. Therefore, when ordering them, be
sure to specify them with Part Nos. given on the nameplates of the
PCB's.
(6) Part Nos. of the front bezel Ass'y and eject button given in the
table apply to the standard color (black) ones as an example. When
any other color one is to be specified, check its Part No. and
order the relevant part with that Part No.
(7) When ordering maintenance parts, be sure to specify their TEAC part
Nos.
(8) The required time indicated herein does not include the time
required for the overall check mentioned in Item 4-3-22.
- 4004 -
Table 403 Maintenance parts list
+:-
Interrupter C Assly 15532062-0) - 10 Min. 4-4-3
o
o
VI
LED hole sensor Assly 17070500-00 - 15 Min. 4-4-4
15532058-XX (Note 5) i
,
Front bezel Assly 17967210-00 (Note 6) - 5 Min. 4-4-11
Ej ect button
- - --_ .. _- -- - - - _.. _----- --- -
16787276-01 (Note 6) - 1 Min. 4-4-12
Table 403 Maintenance parts list
..,.
Interrupter C Ass'y 15532062-01 - 10 Min. 4-4-3
o
o
0\
LED hole sensor Ass'y 17070500-00 - 15 Min. 4-4-4
15532058-XX (Note 5)
PCBA Interface Control 15532068-XX - 15 Min. 4-4-10
15532073-XX
Eject button
-----------_._._--- _._---------
16787276-01 (Note 6)
---~~
- 1 Min. 4-4-12
4-1-4 Maintenance articles
The measuring instruments, jigs, and tools required for maintenance of MTD
are listed below.
(1) Measuring instruments
(a) Oscilloscope (two-channel trace type)
(b) Digital voltmeter (for measurement of DC voltage
(2) Tools
(a) Phillips screwdriver No. 0
(b) Phillips screwdriver No. 1
(c) Conventional type screwdriver, small size
(d) Torque driver 1.5 kg.cm
(e) Torque driver 2.5 - 4 kg.cm
(f) Hexagonal wrench 1.5 mm
(g) Nipper
(h) Radio pliers
(i) Tweezers
(3) Exclusive simulators and DC power supply
(a) Simulator OA (TEAC Part No. 19800020-00)
(hereinafter, referred to as SOA)
Remark The model of SOA to be used should be Version 3.22 onwards.
The version of SOA is indicated to the display by keying in
EF command.
"D/CAS"
"SCSI"
- 4007 -
"BASIG"
- 4008 -
4-2 Precautions on maintenance
4-2-1 Screw tightening torque and screw lock (red)
Each screw should be tightened with the torque shown in Table 404, unless
otherwise specified.
M2 2.5 kg.cm
M26 4 kg.cm
M3 6 kg.cm
- 4009 -
4-2-2 Connector handling methods
- 4010 -
PCBA
Drive Control
J5,J6,J7 J9
1:===_-,
I J4
I
o o I
I
I J2
I
I
I
I [==_==J
Top view of MTU
J2
J4
PCBA
Interrupter J9
J8 ,J10 --W--------:
PCBA
Drive Control
( Without PCBA Interface Control )
Bottom view of MTU
J4
PCBA Interface
Control
Jl
- 4011 -
(3) Precautions on handling of black connectors (J5, J6, J7, J8, JI0)
(a) How to extract the connector
Insert the tips of tweezers into the opening part of the connector
at the rear of the housing, and extract the connector straightly.
Opening part
Post pin
Polarizing
key
Connector
label
(i) (ii)
- 4012 -
(c) How to extract the contacts
To extract the contacts inserted into the housing, pullout the
cable with tweezers, while opening the stopper of the housing with
the edge of a cutter knife.
Open
Contacts Stopper (lift up)
Open
Triangular mark
1 7
m 2 8
- 4013 -
(4) Handling methods for FPC connector J9
(a) How to extract the FPC
Lift up the upper projection of the socket with the connector jig.
Then, grip FPC with the fingers, and extract it from the socket.
At this time, grip the reinforced portion of FPC. If any other
part than the reinforced portion is pulled forcibly, there is a
danger that FPC may be damaged.
(b) How to insert the FPC
While setting the groove of FPC to the partition of the socket,
insert FPC into the socket. Then, while depressing FPC to prevent
it from being disengaged from the socket, push in the top of the
socket with the finger.
After the completion of connection. lift FPC upward slightly with
the fingers, and check if the two are connected tight with each
other.
Connector jig
FPC
D Reinforced
portion
Groove
Connector J9
- 4014 -
4-2-3 How to handle the protector guide
- 4015 -
Protector
Mounting screws
Protector guide
o
Notch
Projection
- 4016 -
4-2-4 Cable treatment within chassis
Since the reel motor Ass' y and LED hole sensor Ass' yare mounted on the
sliding parts, it is necessary to clamp each cable at the specified position
so that the cassette tape can always be loaded or unloaded normally.
When rep lacing the reel motor (F), (R) Ass' y or LED hole sensor Ass' y ,
perform cable treatment in the following procedure:
(1) Push in the ej ector with the finger to set the main unit to the
cassete loading status (Fig. 302).
(2) Perform cable forming in accordance with Fig. 409.
(3) Clamp the cables of the reel motor (R) Ass'y and LED hole sensor
Ass'y from the outside of the tube with the cable tie at the position
which is kept approx. 10 mID away from the end of the tube.
At this time, place the LED hole sensor side tube as near to the
terminal part as possible.
(4) Clamp the individual cables of the encoder Ass'y, reel motor (F), (R)
Ass'y, and hole sensor Ass'y between the bead and solenoids stopper.
(5) Push the cables into the PCBA holder.
(6) Push the eject button to return to the cassette unloading status.
(7) Repeat the cassette loading/unloading operation several times by
using the work cassette, and check for the following items:
(a) The reel motor is not to be lifted when the back of the reel motor
is pushed in cassette loading status.
(b) Any cable is not to be caught by sliding parts.
(c) Any cable is not to be protruded from the drive body.
Note Be very careful about the cable clamping, since such trouble
as disconnection or malfunction may occur if a cable is
stretched too tight.
- 4017 -
Eject button
Reel motor (F)
Solenoid stopper
Assly
Cable tie
x
o
~
0...
0...
~
Bead
PCBA holder
sensor Ass'y
- 4018 -
4-2-5 Initialization of SOA
The SOA (Simulator OA) is a simulator to adjust and test only the drive
portions except for PCBA Interface Control in MTU.
Prior to the use of SOA, perform the following initialization.
(1) Detach the PCBA Interface Control from MTU in accordance with Item
4-4-10.
(2) Set the MODE switch mounted on the right side face of SOA as shown in
Fig. 410.
(3) Preset the output voltages of the DC power supply to +12 V and +5 V.
(4) Set the POWER switch of SOA to OFF.
(5) Turn off the DC power supply, and connect the power cable to the PSA
connector of SOA.
(6) Connect the interface cable between the MT2ST INTERFACE connector of
SOA and the SOA adapter B. Connect the interface cable coming out of
the SOA adapter to the J4 of MTU, so that the triangular mark of the
connector is set to the terminals 1 and 2 side.
(7) Connect the check cable C between the MT2ST TP connector of SOA and
check terminals TP1 to TP18 of MTU.
(8) Turn on the DC power supply, and set the POWER switch of SOA to the
PSA side.
- 4019 -
(9) Key in "E3" to SOA. (Hereinafter, the key-in operation performed
withthe keyboard of the simulator is represented by such that Key in
"E3" .
(0) Key in "D5".
(11) The +5 V power voltage is indicated to the display DATA 1 of SOA, and
the +12 V power voltage to the display DATA 2. Readjust the DC power
voltages until the +5 V power voltage is within the range of
4.95 V to 5.05V, and the +12 V power voltage is within the range of
11.88 V to 12.12V.
(2) Key in "F".
(3) Key in "E3 t1 •
DC POWER SUPPLY
~~
a:
[
..
w 1
~
..a
Il.
I-
INTERFACE CABLE
..
0 POw ER
~tn IJ)
N CAB LE
t
~
:;: 0
~
IJ)
MT~~~
TPI8
I
'r Ml'S' fP
II CHECK CABLE C MT2ST INTERFACE I I PSA
It
I
TPI
I POWER CABLE
TEAC SIMULATOR OA
- 4020 -
liD/CAS"
The SOB (Simulator OB) is a simulator to test the overall ~ITU including the
PCBA Interface Control.
This simulator permits the error rate, etc. to be checked with MTU set to
online status.
The PCBA Interface Control can also be adjusted and tested by connecting
SOB.
Prior to the use of SOB, perform the following initialization.
(1) Preset the output voltages of the DC power supply to +12 V and +5 V.
(2) Turn off the DC power supply, and connect the power cable to the DC
PWR connector of SOB.
(3) Connect the power cable to the POWER connector J2 of MTU.
(4) Connect the interface cable between the MT-2ST INTERFACE connector of
SOB and JI of MTU, so that the triangular mark of the connector is
set to the terminals 1 and 2 side.
(5) Turn on the DC power supply.
(6) Check if the power voltage supplied to MTU is within the range of -5%
to +5% of the rated voltage, using a digital voltmeter (DCV).
Between TPI5 and TPI8 of PCBA Drive Control: +12 V power voltage
(11.4 to 12.6 V)
Between TP16 and TPl8 of PCBA Drive Control: +5 V power voltage
(4.75 to 5.25 V)
- 4021 -
I
I I
MTU .... MT-2ST
r- INTERFACE
I
I
JI :
I
I
L_
[ J2 f---'~==~
L..j-
U=======:=::l
TEAC SIMULATOR OB
~~~--------------~---,
1,.------------'
DC POWER SUPPLY
+12V. +5V
- 4022 -
"SCSI"
The SOD (Simulator aD) is a simulator to test the overall }ITU including the
PCBA Interface Control
This simulator permits the error rate, etc. to be checked with HTU set to
online status.
The PCBA Interface Control can also be adjusted and tested by connecting
SOD.
Prior to the use of SOD, perform the following initialization.
(1) Preset the output voltages of the DC power supply to +12 V and +5 V.
(2) Turn off the DC power supply, and connect the power cable to the PWR
connector of SOD.
(3) Connect the power cable to the POWER connector J2 of HTU.
(4) Connect the interface cable between the MT2-ST IfF connector of SOD
and J1 of MTU, so that the triangular mark of the connector is set to
the terminals 1 and 2 side.
(5) Turn on the DC power supply.
(6) Check if the power voltage supplied to MTU is within the range of -5%
to +5% of the rated voltage, using a digital voltmeter (DCV).
Between TP1S and TP18 of PCBA Drive Control: +12 V power voltage
(11. 4 to 12.6 V)
- 4023 -
1
I J
MTU
A MT2-ST !IF PWR
r-
I
I
I
JI I
I
I
I
L_
r-h
[ J2:,-_1--1~==::;l
~==============~
TEAC SIMULATOR 00
II
DC POWER SUPPLY
+12V, +5V
- 4024 -
"BASIC"
The SOE (Simulator OE) is a simulator to test the overall MTU including the
PCBA Interface Control.
The SOE permits a simulation of the BASIC interface by switch operation.
Prior to the use of SOB. perform the following initialization.
(1) Preset the output voltages of the DC power supply to +12 V and +5 V.
(2) Turn off the DC power supply. and connect the power cable to the
pm'[ER connector of SOE.
(3) Connect the power cable to the POWER connector J2 of MTU.
(4) Connect the interface cable between the INTERFACE connector of SOE
and J1 of MTU. so that the triangular mark of the connector is set to
the terminals 1 and 2 side.
(5) Turn on the DC power supply.
(6) Check if the power voltage supplied to MTU is within the range of -5%
to +5% of the rated voltage, using a digital voltmeter (DCV).
Between TP15 and TP18 of PCBA Drive Control: +12 V power voltage
01.4 to 12.6 V)
Between TP16 and TP18 of PCBA Drive Control: +5 V power voltage
( 4 • 75 to 5. 25 V)
- 4025 -
~ I
I 1
MTU 'f'INTERFACE
POWER
r-
I
I
I TEAC SIMULATOR OE
JI I
I
I
L_
... h
[ J2 ~
'-+_...J
DC POWER SUPPLY
Il
+12V, +5V
- 4026 -
4-3 Check and adjustment procedures
4-3-1 Positional adjustment of reel motor (F), (R) ASs'y
- 4027 -
Ejector
Mounting screws
Guide motor jig
Loading arm
Eject button
Mounting screws stopper
- 4028 -
4-3-2 Height adjustment of encoder roller
- 4029 -
pins
REF. -...l
o
c=::J
Loading arm
o
@ 0
o
height jig
- 4030 -
Roller height jig
Encoder roller
Encoder
Stick
o Flange
( encoder roller side )
- 4031 -
4-3-3 Check of rotary direction of reel motor
- 4032 -
o @o
~ CJ
o Reel motor
(f)
o
- 4033 -
4-3-4 Check of file protect sensor
0) Articles to be used
(a) FPT jig
(b) FPT check jig
(c) SOA
(d) DC power supply (+12 V, +5 V)
(2) Check procedure
(a) Connect the SOA in accordance with Item 4-2-5 (it is not required
to connect a check cable C).
(b) Push in the ej ector with the finger to bring about the cassette
loading status (Fig. 302, 303).
(c) Attach the FPT jig. While pushing the loading arm with the finger
in the arrow direction, place the FPT jig on the holder base with
reference to the guide pins, and return the arm gradually. Then,
check if the reference plane touches the two guide pins (Fig.
420).
(d) Set the POWER switch on SOA to the PSA side.
(e) Make sure that the indicator CLD of SOA and the indicator FPT
light up.
(f) Put the FPT check jig on the FPT jig, check if the FPT indicator
goes out with the tip of the file protector touching the jig. At
this time, be careful not to allow a gap between the FPT jig and
FPT check jig (Fig. 421).
(g) Turn off the POWER switch on SOA.
(h) Remove the checking jig, and detach the FPT jig in the reverse
procedure to step (c).
(i) Push the eject button to return to the cassette unloading status.
- 4034 -
Guide pins FPT check jig
Loading arm
FPT jig
Eject button
Fig.420 Setting of FPT jig
- 4035 -
4-3-5 Cassette loading/unloading check
- 40'36 -
4-3-6 Check of head shift
- 4037 -
4-3-7 Check and adjustment of tape winding
Note When making the height adjustment, ej ect the mirror cassette
once, and push the top of the encoder roller with the finger to
remove the adhesive.
(f) Key in "0" or "1" to wind the tape forward and reversely, over the
total length of the tape and then visually check for the following
items:
(i) At the flange part of the tape guide on the encoder roller
side, there is no tape curl in both forward and reverse
directions (Fig. 423).
(ii) At the flange part of the encoder roller, there is no tape curl
in both forward and revers directions (Fig. 424).
- 4038 -
Note 1. Key in either "0" or "1" according to the winding status of
the tape; "0" for the forward winding, and "1" for the
reverse winding.
2. Since a tape curl status is identified by the reflection of
light, this check should be performed at a well-illuminated
place.
- 4039 -
Mirror cassette
Tape guides
Adjusting screw
- 4040 -
Tape guide Curl
Flange
Flange
Encoder roller
Curl
- 4041 -
4-3-8 Check and Adjustment of head alignment
- 4042 -
8 Key in "F" to stop the operation.
9 Key in "A2l", and further "I", and adjust the variable
resistor R17 (Fig. 336) until the burst signal VI is within
1.3 to 2 Vpp (Fig. 42S).
,--I. r - - - 'I
I I I
Vi V2 V31------ Vi V2 V3 va V5 v6lv7}--
I I I
IL.---"l..
I _ _ ~I
- 4043 -
8 Check if the individual values measured in steps 3, 5
and 7 are within the following ranges.
i) Azimuth -9 to +9 minutes (each track)
ii) Off track -50 to +50 micrometers (each track)
9 When only check may be made, successively follow the
procedure given in item (d).
Note 1: As for the above-mentioned check, key in "F"
successively, and repeat measurement on each track
three times or more, and then decide the measurement
values.
2: When the check is made with the burst signal VI less
than 1.3 Vpp, no data may be displayed on SOA. Since
this means that the value is out of the specification,
execute the alignment adjustment.
3: As for the values displayed on SOA, DATA 1 I+ I I 2. I 31
means 2.3 minutes, and DATA 2 I +.1 0 I 1 I 9 I means 19
micrometers.
4: If the measured azimuth value are out of the specifi-
cation, 1+ I 10 I F I is indicated on the DATA 1
display.
(c) If the results of measurement in item (b) are out of the specifi-
cations, make the alignment adjustment with the adjusting screws
in the following procedure (Fig. 426).
1 Key in "5" on rewind the tape.
2 Key in "A22", and further "0", and adjust each burst signal
of tack 2 displayed on the oscilloscope as follows (Fig.
425).
(i) Azimuth Turn the azimuth adjusting screw until the
difference between V4 and V5 is minimized.
(ii) Off track: Turn the off track adjusting screw A until
the difference between V2 and V3 is
minimized.
3 Key in "F" to stop the operation.
- 4044 -
4 Key in "A21" and further "1", and make the same adjustment
for track 1 as in step 2 .
5 Repeat steps 2 to 4 and make adjustment for both tracks 1
and 2 until the contents of (i) and (ii) above are satisfied.
6 Key in "A22", and further "B5", and repeat the measurement of
track 2 three times, and then calculate the mean value of off
track (DATA 2).
7 Key in "E2", and further "E3" to set the MTU to HOLE SKIP and
REPEAT modes.
8 Key in "A20", and further "B5", and turn the off track
adjusting screw B until the sequentially varying DATA 2 on
display is nearly equal to the mean value calculated in step
6 .
9 According to item (b), check if the measurement values of
each track meet the specifications.
10 After the completion of adjustment, successively follow the
procedure mentioned in item (d).
Remark 1: If the measurement by SOA is started from the clear
leader part, the tape runs away.
By sure to start the measurement after winding the
tape up to the magnetic face. If the tape runs away,
push the RESET switch on SOA to stop the operation.
2: After the completion of adjustment, make the check
of the alignment in the winding center of the tape.
(d) After the completion of check and adjustment, reset the MTU to the
status before the work.
1 Eject the alignment tape.
2 Turn off the POWER switch on SOA.
3 Apply the screw lock (red) to each adjusting screw.
4 Return the shorting plug from strap SI to S2.
5 Check and adjust of the read preamplifier level in accordance
with Item 4-3-14.
- 4045 -
Remark 1: For the specifications of the alignment tape, refer
to those corresponding to the Part No. of the
alignment tape used.
2: The alignment tape contains tracks on which the burst
signal is not recorded. Therefore, the following
measurements cannot be made.
i) Azimuth of track 0
ii) Off track and azimuth of track 3
3: The burst signals V6 and V7 shown in Fig. 425 is not
necessary for the maintenance.
- 4046 -
Off track adjusting
screw B
( Track 0 )
Azymuth
adjusting screw------t=~==~~~~~~~;;~~JJ
- 4047 -
4-3-9 Check of AGC Operation
"90 ips"
Clipped portion
TP8
LJ t Approx. 3 ms
(f) If any clipped portion shown in Fig. 427 does not appear. check if
the strap 51 is open and 52 is shorted on the PCBA Drive Control.
- 4048 -
"30 ips"
Clipped portion
TP8
u t Approx. 9 ms
(f) If the clipped portion shown in Fig. 428 does not appear, check if
the strap Sl is open and S2 is shorted on the PCBA Drive Control.
- 4049 -
4-3-10 Check and adjustment of BOT/EOT hole sensor
"90 ips"
- - - - 0.5 V
o V
- 4051 -
"30 ips"
- 4052 -
"Example" \.Jhen the voltage entered on the label of the hole
sensor test tape is 4.85 V, adjust R41 until the
reading voltage of the digital voltmeter becomes
4.85 V.
(0) Disconnect the digital voltmeter, and connect the oscilloscope to
TP13 on the PCBA Drive Control.
(p) Key in "E2" and "E3". The indicators HOLE SKIP and REPEAT on SOA
light up.
(q) Key in 2 The tape is wound forward and reversely alternately
with the BOT hole as a center.
(r) When the BOT hole passes through the front of the hole sensor,
observe the hole detection waveform at TP13, and check if the time
of the portion where the low level at the hole detection time is
0.5 V or less is 200 microseconds or more (Fig. 430).
- - - - 0.5 V
1- o V
- 4053 -
4-3-11 Check and adjustment of tape speed
"90 ips"
- 4054 -
(0) The forward winding encoder frequency is indicated to the display
DATA 1 on SOA, and the reverse one to DATA 2 (90 ips winding).
(p) Adjust R44 on the PCBA Drive Control until both the encoder
frequencies are within 8.58 kHz to 8.60 kHz (center value:
8.594 kHz).
(q) Key in "F" to stop the operation.
(r) Key in "8". The indicator HIS on SOA goes out (low speed mode).
(s) Key in "BA". The tape is wound forward and reversely at 30 ips.
(t) The forward winding encoder frequency is indicated to the DATA 1
display on SOA, and the reverse one to the DATA 2.
(u) Adjust R43 on the PCBA Drive Control until both the encoder
frequencies are within 2.86 to 2.88 kHz (tne center frequency:
2.865 kHz).
(v) Key in "F" to stop the operation.
(w) Key in "8". The indicator HIS on SOA lights up.
Remark 1. The tape speed should be adjusted in the order of
90 ips (R44) and 30 ips (R43) without fail. If R44
is adjusted later than R43, the tape speed of 30 ips
is also changed.
2. There is such a MTU that a fixed resistor is used for
R43. In such a case, R43 need not be adjusted.
- 4055 -
"30 ips"
- 4056 -
(t) Adjust R43 on the PCBA Drive Control until both the encoder
frequencies are within 2.86 kHz to 2.88 kHz (tne center frequency:
2.865 kHz).
(u) Key in "F" to stop the operation.
Remark The tape speed should be adjusted in the order of 90 ips
(R44) and 30 ips (R43) without fail. If R44 is adjusted
later than R43 the tape speed of 30 ips is also changed.
- 4057 -
4-3-12 Check of start/stop time
"90 ips"
- 4058 -
"30 ips"
- 4059 -
4-3-13 Check of ISV
JI
I
o
' ,
n , ,
IIII
I
50
" ' I
r
100%
4thriS~ ofwav:form
\ . , / from trlgger pOlnt
- 4060 -
(e) Check if the deviation width of the waveform at J4-17 is less than
10%.
(f) key in "F" to stop the operation.
(g) Key in "1". The tape is wound reversely. Measure the deviation
width of the waveform at J4-17 and perform the same check as in
step (e).
(h) Key in "F" to stop the operation.
- 4061 -
4-3-14 Check and adjustment of read preamplifier level
Signal level
TP3
- 4062 -
(k) Key in "A63F". Measure the signal level on the oscilloscope.
(1) Perform the same check as in step (h).
(m) If the result of the check mentioned in step (h) are out of the
specification, make the following adjustment.
(n) Erase again the level test tape used in the same procedure as in
step (a). Load the erased level test tape on MTU again.
(0) Key in "A22".
(p) Key in "A63F". Adjust R2l on the PCBA Drive Control until the
signal level becomes equal to the calibrated value of the level
test tape used.
(q) Key in "F" to stop the operation.
(r ) Key in "A2l".
(s) Key in "A63F". Adjust R17 on the PCBA Drive Control until the
signal level becomes equal to the calibrated value of the level
test tape used.
(t) Key in "F" to stop the operation.
Remark When the calibrated value of 1.0 V to 2.0 V is indicated
on the level test tape, find the calibrated value to be
used in the following method:
For example, assuming that 1.71 V is indicated on the
level test tape,
- 4063 -
4-3-15 Check and adjustment of read level
"Permalloy Head"
- 4064 -
"Ferrite Head"
- 4065 -
4-3-16 Check of feed through
- 4066 -
4-3-17 Check of resolution
"Permalloy Head"
"Ferrite Head"
- 4067 -
(e) Key in flCS". The measured value of resolution is indicated to the
display DATA 1 on SOA.
(f) Check if the resolution is 40% or more.
(g) Key in flA21". The write/read track on MTU is changed over to
Track 1.
Perform the same check as in steps (e) and (f).
- 4068 -
4-3-18 Check of erase level
"Permalloy Head"
"Ferrite Head"
- 4069 -
4-3-19 Check of peak shift
- 4070 -
4-3-20 Check of asymmetry
- 4071 -
"D/CAS" "SCSI"
"D/CAS"
- 4072 -
"SCSI"
- 4073 -
4-3-22 Overall check
The overall check is the final error rate test to be applied to MTU
for which various checks and adjustments have been made. This test
can be made on the user system side, if test program, etc. is
available there.
Description is given below on the overall check procedure using SOB
(D/CAS interface) and SOD (SCSI interface).
As for the MTU of BASIC interface, the interface signal can be
checked by using SOE. however, the SOE has not the error rate test
function. As for the MTU of BASIC interface, execute the overall
check by using the user system.
"D/CAS"
- 4074 -
Key in "B4". Then the write error count (write retry count) is
indicated in hexadecimal notation to the display of SOB.
(g) Check if the write error count is less than SO in hexadecimal
notation (12S in decimal notation).
Remark The write error count changes greatly depending upon the
status of the work tape used. Therefore, the above-
mentioned value is a reference value.
(h) Key in "A4". The tape is rewound up to BOT and the indicator RDY
on SOB lights up.
(i) Key in "BO". The MTU starts a read error test.
(j) After the completion of the read error test, the transfer block
count is indicated in hexadecimal notation to the display of SOB.
Therefore, check if it agrees with the transfer block count
obtained in the write error test.
(k) Key in "B2", and "B3". Then, EXCEPTION STATUS is indicated to the
display of SOB. Check i f the display is "SEAO".
Key in "B4". Then, the read error count (read retry count) is
indicated in hexadecimal notation to the display of SOB.
(1) Check if the read error count is less than 1.
Remark The read error count changes greatly depending upon the
status of the work tape used. Therefore, the
above-mentioned value is only a reference value.
- 4075 -
"SCSI"
flB7"
IIIIIII '--v-'
Most significant one byte
"B8"
IIIIIII
'---v---/
Least significant one byte
- 4076 -
(g) Check i f the write error count is less than SO in hexadecimal
notation (12S in decimal notation).
Remark The write error count changes greatly depending upon the
status of the work tape used. Therefore, the above-
mentioned value is a reference value.
(h) Key in "A4". The tape is rewound up to BOT.
(i) Key in "BO". The MTU starts a read error test.
(j) After the completion of the read error test, the transfer block
count is indicated in hexadecimal notation to the display of SOD.
Therefore, check if it agrees with the transfer block count
obtained in the write error test.
(k) Key in "DSO". Then, the compare error count and parity error
count are indicated to the display of SOD. Check if both counts
are a each.
(1) Key in "B2", and "B3". Then, SENSE DATA 0, 1, and 2 are indicated
to the display of SOD. Check of this display is "Fa, 00, 4S".
Key in "B6", "B7", and "BS", and read the read error count (read
retry count).
(m) Check if the read error count is less than 1.
Remark The read error count changes greatly depending upon the
status of the work tape used. Therefore, the
above-mentioned value is only a reference value.
- 4077 -
4-4 Replacement of maintenance parts
4-4-1 Replacement of head Ass'y
Permalloy Head
- 4078 -
(g) Check and adjust the head alignment in accordance with Item 4-3-8.
(h) Check the AGC operation in accordance with Item 4-3-9.
(i) Check and adjust the read preamplifier level in accordance with
Item 4-3-14.
(j) Check and adjust the read level in accordance with Item 4-3-15.
(k) Check the feed through in accordance with Item 4-3-16.
(1) Check for the resolution in accordance with Item 4-3-17.
(m) Check for the erase level in accordance with Item 4-3-18.
(n) Check the peak shift in accordance with Item 4-3-19.
(0) Check the asymmetry in accordance with 4-3-20.
(p) Attach the PCBA Interface Control in accordance with 4-4-10.
(q) Attach the protector guide in accordance with Item 4-2-3.(2).
(r) Perform the overall check in accordance with Item 4-3-22.
- 4079 -
Head screw
Head coller
Insulation sheet
- 4080 -
Ferrite head
- 4081 -
Head screw
('
!
Head Ass'y ~ ~~
Insulation sheet ~
- 4082 -
4-4-2 Replacement of reel motor (F), (R) Ass'y
- 4083 -
(j) Insert the contacts of both the reel motors into the connector
housing after threading their cables through the bead (Table 405).
Red 5
Reel motor (F)
Black 6
Red 7
Reel motor (R)
Black 8
- 4084 -
(R) Ass'y
Loading arm (M)
PCBA holder
Bead
Cable tie
- 4085 -
Reel motor (R) Ass'y
Reel motor
(F) Ass'y
Tube
- 4086 -
4-4-3 Replacement of interrupter C Ass'y
- 4087 -
2 x 5
i Pan sems screw
I
Interrupter C Ass'y
- 4088 -
Interrupter C Ass'y
I- ....
t===--> • • • • • •
Positional parts
Photo interrupter
Contact
Surface
Interrupter C Ass'y
Lever base
- 4089 -
4-4-4 Replacement of LED hole sensor Ass'y
- 4090 -
(k) Perform cable treatment within the chassis in accordance with Item
4-2-4.
(1) Check and adjust the BOT/EaT hole sensor in accordance with Item
4-3-10.
(m) Attach the PCBA Interface Control in accordance with Item 4-4-10.
(n) Perform the overall check in accordance with Item 4-3-22.
- 4091 -
Pan sems 2 x 5
- 4092 -
4-4-5 Replacement of sensor guide Ass'y
- 4093 -
Pan sems screw 2 x 5
- 4094 -
4-4-6 Replacement of encoder Ass'y, encoder roller
- 4095 -
(n) Adjust the height of the encoder roller in accordance with Item
4-3-2.
(0) Check and adjust the tape winding in accordance with Item 4-3-7.
(p) Check and adjust the head alignment in accordance with Item 4-3-8.
(q) Check the AGC operation in accordance with Item 4-3-9.
(r) Check and adjust the read level in accordance with Item 4-3-15.
(s) Attach the PCBA Interface Control in accordance with Item 4-4-10.
(t) Attach the protector guide in accordance with Item 4-2-3.(2).
(u) Perform the overall check in accordance with Item 4-3-22.
- 4096 -
~ Encoder roller
- 4097 -
Encoder Ass'y
Pin spring
Triple screw 2 x 8
- 4098 -
Tilt adjusting jig
Shaft
- 4099 -
4-4-7 Replacement of solenoid Ass'y
- 4100 -
(1) Insert the cable tip contacts of the solenoid Ass'y into the
connector housing. At this time, the red and white cables of the
solenoid Ass'y correspond to the pin 1 and pin 2, respectively.
(m) Connect the connector J8.
(n) Push the cables of the solenoid Ass'y into the PCBA holder.
(0) Fix the cables of the LED indicator to the cord clamper.
(p) Check the head shift in accordance with Item 4-3-6.
(q) Attach the PCBA Interface Control in accordance with Item 4-4-10.
(r) Attach the protector guide in accordance with Item 4-2-3.(2).
(s) Perform the overall check in accordance with Item 4-3-22.
- 4101 -
Binding screw 2 x 6
Solenoid ASs'y
LED indicator
- 4102 -
Cord clamper
Solenoid Ass'y
Shift spring
Shift collor
- 4103 -
Cut face of chassis
Positioning
portion of
head base Ass'y
Solenoid ASs'y
Encoder Ass'y
- 4104 -
4-4-8 Replacement of head base ASs'y
Permalloy Head
- 4105 -
(m) Attach the parts, which have been assembled in step (1), in the
reverse procedure to step (j) so that the three positioning
portion of the head base Ass'y are pressed to the cut face of the
chassis (Fig. 449).
(n) Perform the treatment of the cables of the solenoid Ass' y in
accordance with steps (1) to (n) of Item 4-4-7.
(0) Fix the cables of the LED indicator to the cord clamper.
(p) Attach the head Ass'y and insulation sheet detached at step (h).
while observing the remarks given in Item 4-4-1. (d).
(q) Connect the connector J6.
(r) Attach the tape guide and shims (tape guide) detached in step (i).
Remarks 1. Attach the tape guide straight. If the tape guide
is attached otherwise, it touches the cassette tape
windo,"1, thus preventing the cassette loading from
being made normally.
2. Reuse the same shims at the same place as used
before replacement of the head base ASs'y. Use of
other shims may affect the moving performance of
tape.
(s) Check the head shift in accordance with Item 4-3-6.
(t) Check and adjust the head alignment in accordance with Item 4-3-8.
(u) Check the AGC operation in accordance with item 4-3-9.
(v) Check and adjust the read level in accordance with Item 4-3-15.
(w) Attach the PCBA Interface Control in accordance with Item 4-4-10.
(x) Attach the protector guide in accordance with Item 4-2-3.(2).
(y) Perform the overall check in accordance with Item 4-3-22.
- 4106 -
"Ferrite head"
- 4107 -
(n) Perform the treatment of the cables of the solenoid Ass' y in
accordance with steps (1) to (n) of Item 4-4-7.
(0) Fix the cables of the LED indicator to the cord clamper.
(p) Attach the head Ass'y and insulation sheet tetached at step (h),
while observing the remarks given in Item 4-4-1.(d).
(q) Connect the connector J6.
(r) Reattach the tape guide and shims (tape guide) detached in step
(i) .
Remarks 1. Attach the tape guide straight. If the tape guide
is attached otherwise, it touches the cassette tape
window, thus preventing the cassette loading from
being made normally.
2. Reuse the same shims at the same place at used
before replacement of the head base Ass'y. Use of
other shims may affect the moving performance of
tape.
(s) Check the head shift in accordance with Item 4-3-6.
(t) Check and adjust the head alignment in accordance with Item 4-3-8.
(u) Check the AGC operation in accordance with Item 4-3-9.
(v) Check and adjust the read level in accordance with Item 4-3-15.
(w) Attach the PCBA Interface Control in accordance with Item 4-4-10.
(x) Attach the protector guide in accordance with Item 4-2-3.(2).
(y) Perform the overall check in accordance with Item 4-3-22.
- 4108 -
Pan scre,v 2 x 8
Binding screw 2 x 6
...
Cord clamper
LED indicator
- 4109 -
Pan sems screw 2.6 x 6
Cord clarnper
Solenoid Ass'y
Shif t s pr ing
Shift coller
- 4110 -
4-4-9 Replacement of PCBA Drive Control
- 4111 -
4-4-10 Replacement of PCBA Interface Control
"D/CAS" "SCSI"
"BASIC"
- 4112 -
4-4-11 Replacement of front bezel
- 4113 -
Cord clamper
LED indicator
- 4114 -
4-4-12 Replacement of eject button
- 4115 -
SECTION 5
- 500 -
5-1 Configuration
Interrupter C ASs'y
Encoder Ass'y
Encoder roller
Eject button
Head ASs'y
- 501 -
PCBA Drive Control
Protector guide
Eject button
- 502 -
Head Ass'y
Encoder roller
Solenoid Ass'y
- 503 -
Reel motor (R) Ass'y
PCBA
Encoder Ass'y Interface Control
- 504 -
LED hole sensor ASs'y Interrupter C Ass'y
- 505 -
5-2 Disassembly drawings and parts lists of mechanical section
5-2-1 Mechanical parts of MTU
Symbol
TEAC Part No. Part Name Q'ty Remarks
No.
- 506 -
Table 502 Parts list of MTU (2/2)
Symbol
TEAC Part No. Part Name Q'ty Remarks
No.
Note 1. The PCBA stud changes in the length of the hexagonal part,
depending upon the transport Sub Ass'y.
When ordering the PCBA stud, check its length, and specify the
relevant stud.
2. As for the shims used as adjusting parts, ones attached to the
main unit should be used as they are during replacement of
maintenance parts.
3. Parts Nos. of the front bezel Ass'y and eject button are
described in the standard color (black).
- 507 -
·~
- 508 -
5-2-2 Screws and washers
Symbol
TEAC Part No. Part Name Remarks
No.
I ..
- 509 -
5-3 Parts list of PCB ASs'y
Remarks
Nameplate ----115532089-00
\1
Issue display
- 510 -
5-3-1 PCBA Drive Control (Part No. 15532057-00)
Symbol
TEAC Part No. Part Name/Rating Remarks
No.
U3 13442529-00 IC Driver
U6 13447564 IC M51836FP
- 511 -
(15532057-00)
Symbol
TEAC Part No. Part Name/Rating Remarks
No.
- 512 -
(15532057-00)
Symbol
TEAC Part No. Part Name/Rating Remarks
No.
R17 13256714 Variable resistor 1/2W 10K OHM 20% Before issue H
R17 13256665 Variable resistor 1/2W 10K OHM 20% After issue J
R21 13256714 Variable resistor 1/2W 10K OHM 20% Before issue H
R21 13256665 Variable resistor 1/2W 10K OHM 20% After issue J
- 513 -
(15532057-00)
R48 13256665 Variable resistor 1/2W 10K OHM 20% Before issue C
R48 13256666 Variable resistor 1/2W 20K OHM 20% After issue D
- 514 -
(15532057-00)
Symbol
TEAC Part No. Part Name/Rating Remarks
No.
- 515 -
(15532057-00)
Symbol
TEAC Part No. Part Name/Rating Remarks
No.
- 516 -
(15532057-00)
Symbol
TEAC Part No. Part Name/Rating Remarks
No.
- 517 -
(15532057-00)
Symbol
TEAC Part No. Part Xame/Rating Remarks
No.
!
I
I
II
i
I i
[ I !
I
i
J2 I 13121109 i Connector 4P
I
- I Clamp i
16322368 I ,! Clamp for J2
J4 13122509-00
. Connector
! 30P
:
!,
I
51 13122468 i Connector
I
2P
!
I
52 113122468 Connector 2P
I
PI 13152467 Connector Plug for S2
I
,i
I
- 16803149-00 Shield case DC Before issue H
- 518 -
(15532057-00)
Symbol
TEAC Part No. Part Name/Rating Remarks
No.
- 16271176-04 Nameplate
- 519 -
5-3-2 PCBA Interface Control (Part No. 15532058-00)
Symbol
TEAC Part No. Part Name/Rating Remarks
No.
U1 l3441531 IC 74LS373N
U2 l3441531 IC 74LS373N
U3 l3700052-00 IC D/CAS2
U4 13442562 IC 82C54FP-6
US l3442571 IC HM6116LFP-4
U6 13442382 IC 81C55GS
U7 l3442563 IC 82C37AP
U8 l3441636 IC 74LS257AN
U9 l3442574 Ie 80C85AGS
- 520 -
(15532058-00)
Symbol Remarks
TEAC Part No. Part Name/Rating
No.
I
Rl 11186472 Resistor RD 1/5W 4.7K OHM 5%
- 521 -
(15532058-00)
Symbol
TEAC Part No. Part Name/Rating Remarks
No.
- 522 -
(15532058-00)
Symbol
TEAC Part No. Part Name/Rating Remarks
No.
- 523 -
(15532058-00)
Symbol
TEAC Part No. Part Name/Rating Remarks
No.
- 16271176-05 Nameplate
- 524 -
~1EMO :
- 525 -
5-3-3 Interrupter C Ass'y (Part No. 15532062-00)
Symbol
TEAC Part No. Part Name/Rating Remarks
No.
- 526 -
Fig. 506 Interrupter C Ass'y
- 527 -
5-4 Circuit diagrams and parts location diagrams
- 528 -
5-4-1 Overall circuit diagram
- 529 -
g!
21
g;,
61
01
I
I
HEAD ASSY
r
! r ---l ----------r--------
peBA DC PCBA IC
]f
r
r r -- lr- I
RED
BlU
J6-14 S""
cJlo12]
JI-IO HBP
l
TRO / 2 ... J( J6-!6 JI-12 H87
1 WHT
)) J6-13 FREAD JI-14 HB6
READ I BRN
-~ J6~18 c] 1/3
J6-i5 S H E A D JI-16 HB5
TR 1/3 '/{ J I GRY
JI-18 HB4
- J[
f VEL ) J6-17F JI-20 HB3
r TRO/2 I"")r. J 1
I RED
8lU
J6 - 6SJ . JI- 22 HB2
--
J:. , WHT
)) J6-8
) J6-5 F
C 0/2J J 1-24 HBI
1
VEL
ORG 5X J6-9 F
J6-1 SJ
JI- 32
JI- 34
RST
XFR
ERASE X
~
Jz: . BlK
VIO -] J6-4 FC ERAS~ HEAD
J6-3
JI-36 ACK
I
BlK j J6-12 HEAD GND JI-38 ROY
LG____
NDm- ~ I JI- 40 EXC
JI- 42 DIR
"" I!AI ·YEl
JJ5-1 A JI-I'\J49 GND
I NDICA TOR, r1~~.:..!.::..:.----.--...:...!..!::::-=-------X IN 01 CATOR ODD PIN
FRONTPANElUICI 8LK yJ5-2 C I
I
I
SENSOR, "
~ RED
IV) _______--.:::B:.:::l:.:.:K~_______ ~ J7-i C
SENSOR I
BOT I EOT HOLE \".b.,L J7 - 2 E I
I
I I
I
I
INTERRUPTOR C ASSY II J4 -I ,2,29,30 ---...r- OV I
I
C ~ ~J;:'~------II
J4 - 3, 4 5V
RED A J9 -
SOLENOID,
HEAD SH 1FT '--_ _----:W..;..;H..;..T'--_ ~J8:::..-_2=-------_7-:
X
_y
1
SOlENOIG
J9 _ 2
J4 - 5
J4 - 7 ---...r- PORC Ll
EClK I
I
J4 - 8 EEN CH)
I
RED Je- 5 I I I
MOTOR, FWD ~ I J4 - 9 ---...;-- WENCH I i
~________8_l_K_____ ~~Je:::..--~6_ _ _ _ _-r_~I__~J9_3 J4 -10 --""1- lTH CHI I
MOTOR FWD J4-f' ---,..r- WD I
b-~R.:E~D_ _crJ~8::..-_7!..-_ _ _--t_~;--Q J 9 -4 J4-12 ENCIL)
I
MOTOR, REV MOTOR '~EV J4-13--.., FPT(L)
I
BlK J8 - 8 I
J4 -14 ---...r- CLD( l) I
RAI 120
J4-15 ACK( Ll I
LEO.
r'" WHT Je-9
2
J9 - 9 5V
J4 -16 HOl Cl ) I
BOT/EOT LL
_____8::..!L=.:U::..-_.-o..:J:..:::8~-..:..IO~_ _.__t_t-("-_y J 9 -05 CV J4 -17-"-"'.r- RD
I
I
t J4 -f8 DSO CLl I
I J4 -20-""'"\. r - lOK Cl ) I
r-------~-
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-IN co N co I a I- I- U It..
~ 21 26 32 9 IS;l ~----2-0,---2~;-r--------4·t:~__________~I_O_~~,~-16--V_r--,-------~.-~~~2-7r2-0~1-1.-IO,-2-6T2-4-r-------
l~b~F
TPI3
OV
..
oM"- 1
+ oso ( L) 5V ~---o
r
.Y..Y.
r- r- l ov OV
...---t---jr-+<t_'~ <t ~ ~
Q:~ ~
6 R42
7 4 3 C63
,~
1+ r-
10
co
10
Ik
o?- R41
!2-
_ ~
OV 10 ~'~~T 0: 0: 1"T 100kM U<t TPI2
r-
N N CI) 0
N ~ ~ ~ !
_
t 1') ~ 1'1'"_-33 il-N
~
.~~ CI) ~
" I OV OV 2 I
~
I , , I 1 I I I I
<t <t ~. <;t <;t O'l O'l ~ r- C1l C1l C1l
-:;000-' -:> -, -, -, -, -, -, J -, -,
00 00 0 0
6 U l1J <I: U l1J
(f)
I I I I I
I- I- U U U
I o 0 Z Z Z
l1J l1J W l1J W
"- "-
I- I-
o 0
III m
PIN 15532057-00
, · - - - - . - - : - - - - - - - - - - : - - - - - , r - - : - - - - - - - - - - - - - , - - -issue
------ Jr-,...
---i-
t--l,-· -----------'~__j
H nil
T EAC T .0( )7 'y ? tr- :a:f± ~
r-J ---- _. __ ._._1 _____.._
, "--- ----.-------.- -. + - I -- .... -.... - -. . . .
i
! jf,,;t(, !·rr -2ST/7.0, 90, Fe nn;; J Loy
, I ------------------~-
11: J: ;
1 :j;';:lE:j.)_j~()):t:.;I ' / ,.::-{ .... t:
!
i
--".~
.)1. OJ::::'
:=h-~_-_it================~=~-~--=~~-~--=;~=:r-~-~-~-.T~S~--=E~..-..-._-..-..-..-..-..-.-...-.-..-.. -..-..-.~(~~~)-r-8l-~~I~----~~:--!r-~j----~---:t-
~~ ~ ilL mm \"f;::;jji l l
10010230--00
. - .. - ... ----------------------------.--~-----~-- _ __l.._ _ _. L __ _ --------'------'------,-l-5:-J-'-6:-J:l:------~
c
co
COMPONENT SIDE
SOLDER SIDE
LI~_8_~_7__________________________~__~___T_~~1 ~[.R:B'I
x
x
• G1 L8 \0
8 o ~@~~
x
~-8+ + 0
@@
~. x
0 v.
r<"1 v.
r<"1
U9
x
-@+
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€V
G-
-0 (Jc\
o 0
T x
8 -8+
v-,
@0
~
::>
N
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8T
r<"1
::>
I 05
04 III •
o 0
o
16 9
~O o~
m
-,
8
C3 ~~~~
m
a:: I C55 II C54 II C57 II C56 I
-.
~o
~.
•
NAME PLATE (SOLDER SIDE)
r---------,
L
I _ _ _ _" _ _ _ _ ...lI o
G-{ filil ~
o G1
R:l
R2 ~~
C52
I
EJ Ll
I ""j
~. " '
-
\
1001 G2"30"'OO
5-4-2 PCBA drive control
Circuit diagram
- 531 -
UI7
ALS240-1
If! ....a
AS t-----------------------------------------------------------------------------------------------------------------~ ALE(H)4
A8~1~8--~~--_r_+----~------------------------------~--~-----------------------------------------------------r------~--------_r----~
I. A9 8 A8(H)2
A9~1~9--~~--~ 8 6 x
CSC300 YI 20 AIO r----.... A9(H'2
r-
I ri
-~ 6.14MHz AIO All
AI I ~2::.:.1----.:~--.....,
5 8 AIO(H)Z
1 ----...----'
I
I
11--0--
CA I
30pK x21
I c1T 41
XI
A 12 ~2~3:....---.::A::..:.;12~_'1
A 13 ~2:...;4:....-~A::.:.;13::-._'1
A 14 ~2;.;;5:....-......:;A::.:.I..:.4--....,
ADI
AD2
3 0
,._.:..A:..:0:....;O:...----=-I
4
7
Q 2
6
AO
AI
A2
r-~A_=_D..::O-------3~ D
ADI
ADZ
4
7
a 2
6
A8
A9
AIO
AJ3 (H)2
I--
x
x
Ic H
'1---<-1>--_~_40-l X 2
L _"'!_J
A 15 r2;:.:6'-----=A::..:I.:::.5__~ I,..-..:;A:.:D:.;:3:....___--=-lB
A04 13
UI
LS373
9
12
A3
A4
A03
A04
B
13
UZ 9
12
All
AI2
AI4(H)2
AI5(H) Z
I,..-..:..;.::...:.-----.::.::.j LS373
A05 14 15 A5 A05 14 15 AI3 x
A06 17 16 A6 A06 17 16 AI4
U9
A07 18 19 A7 A07 18 19 AI5
OV SOC85AGS AO(H) 2,3 x
E OC 8 UI5 OC E 1,..---...... AI (H)2,3
LS 04 '--;":"-_-.--l
ALEr2;.;;8-----------+--~----------~1I1 ?~1__________~~+_--__~-------------4--~~5 6 I? II A2(H)2
x
+5V AOO~7~~A~D~0~~--L---------------------------4~~~~------------~--+-~~~----------4-----____________~8~--~ A3(H)2
AD I ~8:..----=A~0:..:.1--~ A4(H)2
J
17,159 Vc
ADZ !-=9'--__.:..A;.=0..::2:...._~
AD 3 ~I.::..O__--.::A~0:.,::3:...._~ r------------------------~---r--r-------------1---t--------------r_--~~------_r--~8+-----_t--_i====:
U7
A5(H)2
A6(H)2 -.
A041-=-12=--___=A::;:0:....;4:...._..., 8 9 82C37 8 - - -....~ A7(H12
A05 1-=-1::. 3__--.::A~0:.,::5:...._..., I'-.::A:=.O___---.:.IO~ AO DO ....I_I_ _ A_o_O____--'l 5,15 OPEN 8
A06 1-=-1..:.4__~A:..:0:..:6:...._..., t-.:...;A~I______..:.j9 AI DII-=-I~2____:..;A:::.D..:..I______--1 ADO 30 AEN ADSTB 32 AO
A2 8 13 A02 r----:..;;:;..:;----~ DO AD ;..:..:----~-----'I
...--__--.,.;,;16:..j Vs AD 7 ~1.;;.,5__....;..A;.=0;..;.7__-, r-';';A~3-----..:.j A2 D21-'---....;..A;..:Oc::3'--------1 f'-----::;A;..:D..:.I_ _ _29::.:...j 0 I AI ~3:.;;3_ _.:::A..:.I_ __'1
f'---.------I..
~ AoOCH)2,3,4
UI7 r--.::A'-=4------~7 A3 0 31-15-----A.;..;;0...:4=-------1 r----.:;;:A'-=D~2____~2::.:8::..j D2 A2 ~3::...;4=----.;,.A..::2:....---_'I
r---------I~ AOI (H)2,3,4
ALS240-1
r-'::A~5-----6=-l A 4 04;.;,'.;;.,6--.....:..A:.:D:...5=--------1 r--_Ac:;0..;:3_____2:;,;7:....j D3 A3 ~3::.:~:....---.::A:,:::3:....----1
t-_......::.44~ SID SO~ r-.::A'-=6------.;5::.j A 5
t-..::.:::...._____4~ A6
D5;.;,1.;,.7--.....:..A:.:D;.;;6'--------1
06;.;,'8"--___________-1
r--....;..A;..:0;....4=--_---'2::;6::..j 04
!'-_-=A:.:D~5_____.:;23=_l 05
A4 ;.:3:..:.7_____=A:..,:4___-1
A5 ;.:3:.,::8=--__.::A:,:::5___--1
r--------I~
1"------_+
A02 (H) 2,3,4
A03(H) 2,3,4
'--.::A:.;.7______.:..j3 A 7 D7 ;.;,1.;,.9____A.;,;;D;;,..7=--______ r--_A_0_6_____=Z2::..j D6 A 61;.:3;;:,9____:.:.A6=--____..., r-------I~ AD4(H) 2,3,4
....-____...;5-4 I NTR SI f-:3:.:.1__4~ r--------I~ AD 5(H) 2,3, 4
1'-___A:::..:::.8____....!::25::.j A8 U3 '--...:...;A~D.;,.7_____.:;21~ ~ A7 J..=4;;:,0____A::;:..:..7____-./
1'-__--=.A~9____-=:24:.j A9 2764 ...--____--=.3d MEMR 16 r--------~~ A06(H) 2,3,4
UI7
DR Q 3 ~ '-------~~ AD7(H) 2,3,4
__----....:I:..j TR AP ALS240-1 ,~
t... _ _ _.-::: 10:...-__-=.2!.j1 AIO
A.:::
A II 23 V PP ....2-6-----I~t> + 5 V
I I
......-li__--.....:..d lOR
-
G 1-2~0'______ 0 V t>
r-----=~----::.::.j All N C F--'" .-_...:.40 M EMW V c ..!.!.,
UI7 OV SOD ~
'--___A:. .:.I:. =2____~2 AI2 PG M ~ r-ii__---:;2;a lOW ROY ~6:!...40 ,-----t>
+5 V
CE OE H DR E Q ( H ) 3 ~----+_+__+__+_--....;1~9 0 RQ OAC K b=-2~:::________________________________.... HoAC K ( Ll3
ALSZ40-1
ROMSEL (L)2 _-----=::;20:::.J)~ y'------...,
22 WDREQ(H)2 18 oFfal OA~KI 244 WOACK(U2
~ READY RESETr4~2~----~~------------~~------------------~-------~
r>-->--ril RAt
I ~ .:> '> ~ I 5. I k x 4
OUT UI5 1 :;.: > :>
C9 LS04 I 11
_L..
6, I 1,22,38 OPEN L ____ J +5V
°1
~
r--··~==:======i==~==~=='=======:r*-~-,!t-i------------,--T-E-A-C--;r---:-/-;-'._~-5?-5:-2-:-~-:--:t-O±-O-t :::::1
Ul5
UI7 LS04
ALS240-1
I lq>o -- -. . ·------::---:--:----·--~-r --.. ---------------------------.-. ,--'-;-'-- ----- .---- -.-.--._- . -----.---.-- -----
~T' ~" I 71~:io"\.: MT~2ST /20D, 90ips
Lvo U17
._. __ ,----.
..... ~~-5. ct!TiE_ -Ii}
. --
m~ i
.1f: Fl
lOR ~
".-"---j---l t:: J:
--
a: 1'2 ~
!
~~
i::
i m w ~-~------------__l
!
m"ll":'l-::1~~o)I·:;:;I.11' t--;l.(J);:'C
~~
I'
____I -------.
PCBA
Interface Control
,
--
~--.!
... \
.
I
ALS240-1
~·!iiI---------I-. ----:-- .. /
/
: i:iIl~ i Circuit Diagram
-.------
~
,.., 0::' ,
~ \iii I
~~t 1 •• ~:='1i!'J;;tt ii'~. TS-E .............................. ( ~) I ; !
t-III-~-'---:-i-- - - - ' - I---+-.-i:i2- n -m",-1 -;j"~~ i I I
~lOOl-.O-?3-0-..-00-----------.-'-------------------------------------------________________________________~__________________~__~__~__________________.____________._L______~~~--:--LJ·~----~~~
. 539~ ~toP I
ADO(H l I .j Dca
..
ADI (H) I
AD2( H l I
)'
A03(H) I
8
A04(H) I 8 8
A05( H) I ADO Ve x
~le~--------------------~WENA(H)4 r--
A06(H)1 AD I 2 j!:2!:-0_ _ _ _ _ _ _ _ _ _.... E ENA (H )4
A07(Hll A02 3 _x
DO r=9_ _ADO
_ _ _..., t-_..;.A.;.:0;...0:::...-._ _ _..,8 DO
AO(H It ~-------~-8~AO A03 4 ~2~1_____________________~ WOATAIH)4 r--
AI(HlI .---------~_r--~
7 AI oI 1-10~_A...;;0_1___"4 t-_...:.A~D~I;""""_ _ _-:17 0 I AD4 F4~3_________________• W I NT (H)J
I _-:A-::0~2:,-_..., 1'-_~A:.:;0::.::2;-_ _ _:i6 02 TP 3
A2(H l I ~---___<Jr_t_+_--~6 A2 02 J.:I.:... A05 6 !=4~4,---____~___-:--_________• R IN T (H ) I x
t-_~A:.:;0~3;........_ _ _..,5 03 4~
A3(H) I ~---~r_r_;_-~5 A3 03 J..:1.::..3_...:..A.;,.;0:....,;3;........__..., A06
A4 (H )I .------t-r_r_~4:-1 A4 04 ~14~_A_D_4_ _..., ~__A~0~4;........_ _ _4~04
AD7
7
D5P~3~0
UI5
LS04 1~12
U"--..r:----..-.... BLKOET(H) 1,4
____________,
8
~------~--t_+--~3 A5 05 J-:15:::...-._A...:;D;..;:5;........_..., 1'-_...:..A.;.::0:-;;5:--_ _ _"j3 05 OO~I£O ________~~____________-, x
A5 (H)f
.-----~-r-+--2-1A6 06 j-:1.::..6__-:A-::0~6:--__..., ~-~~---~D6
A06 2 oI rl.;;..3_ _-.....~ TIMOUT(H)4
...-_________4..;,,;0oq WR
F3..;.,1-....."U DCER I
A6 (H II
07 \-!1.:...7__A...:;D;...:7_____ '-_...:..A~D...:..7_ _ __=~1 07
4!..,. RD 32 ~ DROP .. 4t
A7(HlI ~------~-r-T-~:il A7 02 17 EPCENO(H )4 +5V
,.-------'!..-:q C5 33 "SYNC U 15 TP2 TP I x
A8(HlI ~------~'-r_T---2-;3 AS U5 ~------------=~~RO
23 WR J
A9 (H)I .-------~--r-T-_:_22:-1 A9 51 17
r------- AO 9-1
28
- LS04
10
Ie AIO 21 CS
RI !-
4. 7k :~
r-------I018-1 AI UI5 " x
AIO(H )f .-----;--t"-;---, CS WE OE
...-----------19-:-1 AO 13 UI4 29 L504 9 .,
WOACK(L)I -----;---+-+-+-t-r-----~I~~ 2309
18 21120~ __- - - - - - - - - 2 " ' " 1 0 AI
~12~---';':~----~~--'WDREQIH)f
MEMW (LlI +5V U4 RDACK(L}I .----+----~~~-tI----:-1~4~
EOP( L) I I-=I!j~_ _ _ _--~~--~ RDREQ (H) I
MEMRIL)1 .~----+~~r_----~-~------- b. 82C54-6
..-________1t-_.9., CO ...-_.....2_4"'"1 RCLK
22 UP( H)
TCLK (H)3
J .I--~I"'"fl GO
__-14-15 CGIr
J,.-----------r_-'::1
BOTI EOT( Ll4
ROATA(L)4
23
2!,.
OWN(L)
+5V
IFCLK(H)4 . -------4~~--~-------_t-----------r_~18jC2 ~
ENC(H)4 • 16 G2 2 RST
CPUR5T(H II p- --------+-+-+-Hrl-t-t-4--t ROP ~
lOW (L)I
r~" t-llc c
~ UI3
Q
!I TP5
I------.=:
10R(L)1 OV B L5221
9 A
OLYR( L)
----------------------------------.------.--------------------.------------------------________-L~:'~~~:_______:__·___· __L~=-~~~mm~__-_____________________________________--~I~~5~4~~~O~~~~~~~~~~~~~~~
10010230-00
C20 .., !fll,;:t! ~
CI6 DO
I '
3.3M/16V OV 3.3M/16V + 5V
OV
- 8
"
-, -r +5V
"-r 120
IS 10\
J 1- 20
,.A T
-YY
"I
,. I
I 141
UI8
LS640-1 6
28
29
HB4
HB5
CI9 OV
19
X
HB3 V
,A
rv .. T I 30
HB6
HB7
3.3M/16V
'~+5V
HB4 -
. .."
J 1-18
.A
-yy"
121
T
I
I
15 5 31
HBP
OV
10 + 20
X
\ll J , ....
I
I
16 4 32
XFR ACK
21 e
A Y
12 JI-36.(')
ACK X
JI-14 14 I v I 17 3 33
HB6 0
.....
HB7 ""
JI-12 I
-yy.,.-
151
T
. I
I 18 2 22
REO
ONL ROY 20 6 A Y
141 JI-38,..
..... ROY
X
,o. T U20
I I G OIR
ALS240-1
I I OV
199 11
EXC 19 4
A Y
16 JI-40 ""
..... EXC
I RA2
220/330 I
I I
JI-IO I 61 ,y
,I.
I rc Y A Vr, ~
DIR 18 2
A
Gi
Y
18 JI-42..(")
..... OIR
HBP ....
I ...". T I
I ~ UI7
ALS240-1
A
~
UII
2310 I
I I
I I
-IG 2G
OV
I 13,34.35,44
I
I
I
I
I T 1'19
AD 0 ( H ) I 10------
AD I (H)I
AD2! H) I
2
3
DO
01
D2
OPEN
+5V
I U21 AD3(H II
41
03 +5V UI6
LS74A
XFR
J/-34 I 5fvv
A
I ! 41 LSI4 AD4(H}1
5
D4
V
I --".
-.v r I AD5(Hll
6
05
I .. U21
AD6( H)I
7
D6 VOO .!!...-
REQ -..... Ji -30
I
41
T
-YYI{'
I
I
5 6 LSI4
U21
AD7(H}1
8
D7
2
PR
4
5
TCLK(H)2,:3
D 0
ONL V-
J 1-28 I 11
-" ,A
I 9 8 LSI4 AO(H )1
9
AO
~
10 38 3
i I AI(Hli AI CLKO C 0
I 'V..-
U21
., lFCSEU L)2
II
CS
CLR
RST 0
J 1-32 I 21 • I II 10 LSI4 - .-. lOW(L)1 '"
40 1
Oi WR II
L_yn 1___ ..JI
I • lA 41
IOR(UI RO
42
CPURST( H} / RST
12 15
HOACK( L) I DACKO HDRO HOREO (H ) I
14
EOP (L)( EOP
J I -1,3,5,7,9, I I, 13, 15, 17, 19,2 1,23,25 43
GNO V- IFCLK(H )4 CLKI
CA2
i~'J.
GND -
....
J 1- 27, 29,31,33,35,37,39,41,43,45,47,49
1 JL
36
XTI
39
GND i - -
cSC3001
30pK x 2 I
I HI ( Y2,;r
l7.2MHz 37
XT2
L _".-1 OV
OV
--i
OV
.. EXT RST (H ) 4 - - ---1
PIN 15532058-00 Ii
r----:========================:-~-~-,!.j-.-I------------.,..--T-E-A-C--:r--(~-y-.:/-?-tr.-"'"-~-\.-~-:.t±--+~~~~~~~
i
I
-t----
.. t- -------
-----,---- --,-,-'--, -l:t.L:
mltJ.:..HH0X·y :;; l:1-f I- -" 0)': C
1b_~_":_~~~.2S_T_I 20D, 90ips
! PCBA
:
10010230-00 541 ~
i fiB ~ ~ '"
0"
• I I:<1l e I
i '"
0" :g . ~ ~ 11Ilol~: • "t jgm
------
>
i--
------
+5V x
J I----
RES 27 18 J4 -28 ,..
PBO PAO GO _. --- -
28 19 J4-27.f\
GND TP8 TP7
s.R3 ACK - 29
PBI PAl
20 J4-26 ,...
FWD - )<.
WR (L) I
5 -WR TOUT
I
IFCLK(H) 2,3 BLKDET(H)2 .. J4-10
0 LTH
HEM (L)J
2
101M
- ... J4 -9
0 WEN
WENA(Hl2
ALE (H) 1
6
<42
ALE Vee
17.39
16
+5V EENA(H)2 .. J4 -8
0 EEN
CPUCLK (H) 1 THIN GND OV
RST
143
CPURST (H) 1 J4-18 ,.. DSO (L)
SOD (L) 1
2,3 J4-S
-
,.. ECLK
TCLK(H)3
I
-
UIO
LS02 +5V 0
J4-3,4 t+ 5VA
C> +SV
4 Cit
47M/16VT
1 • C 1- CB
CIO,Ci I,CI5
0.IM/25V
1
T
J4-1,2
._- OV:: OV
(RES) '-'
J4-19 RES
OV ()
J4-29,30
UIO
LS02
l
OVA
UIO
LS02
RD 8
J4-17
RDATA{Hl2 POR(Uo-
J4-7
EXTRST (H)3 ..
It,12_
V I3 e
9DIO ... RST (L) I
J4 -16
HOL (L) ~ BOT/EOTILl2
J4 -15 ACK
-- - -1
ACK(L) ~
J4-14
--, ---1
CLD ------
CLD (Ll ~
! fi~~, MT-2ST/20D,90ips I
~:r~~~!:£ac~-::ntr~:--1j'-,I
f
, -
4/4; ~
.... n!.' J
I
if; lm . TS - E ... _.................... _.. _._ ( *11)
~ trz. mm -;i-$j§:;
"-------------------- -~.--------.
I
-------~---
10010230-·00 542 ~ ~q>
-.
,i rei ....
"" II ,,0
p • f"7I •
"C
'"
:g:lt:
L-~ __________ ~
LoOJ
_____________________________________ ji16l::ij ______
flo'; ~ ~~ ~ffl
+-~
0 GffiTh x
NAME PLATEO
em
§ I 15532058 -00 x
E1 EJ
(\j
co
- -
::> x
~
::>
(\j U2
<l: co
a:: - x
@ ::> It)
~
::> [TIJ
+ x
~ § ~ UI
~
B
x
+@D
- co
::>
[IT]
~
( \j
::>
o(\j
:::>
-0
0..
~
~+ ~8
co
m
o
~ ~ ~~ ~
Zo
~
§
EJ i ~ ~ i @~ ~ ~ ~ ; ;~ ~ EJ ~ I
~II<~')~ ~~~~~-J~~~~_{~
I
<!>0 o 29 ~l
PIN 15532058-00
I
r----------------~-~ ~~i I
::::1
1
I ._________.__:.... ____.__.______
. __ J , 11l~;o'( HT-2ST/20D. 90ips
: -111: J:
1~~-5 :!'Xnit-%
itl . !
- -
_.l~~
~-.~--
I j
~ I PfJr /
----.<- --
. . " // 9lb~ I
I
-- ~1J!!' !
~\tl!l
~-
f2l i i i ~:!; i
1
Parts Location Diagram
&t I l ~=1tl;z ~~
TS-E ..... .... ......... ... ..................... ( ~) : , : !I
: ,
.
~
.. "i$j£; f2l* , ,
t...-_ _ ._ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ ~ _ _ _ _ _ _ _ _ _ _ _ __
I I .It. i:Ir. mm : :
l001023r, 00 ------------------ -. i
l 543 '& ';f:=
5-4-3 PCBA interface control
Circuit diagram
- 538 -
T -1 :;~ ) tAitt~ T ~ /~c1i~ii
70"/ (:" -T -1 A.? I~ 717'
/\ - I~ T -1 A.? F 7 1 7'
T ~ v::J ~.
t: T ;;t v ::J ~.