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13.M.E. Applied Electronics 2021R

This document outlines the regulations for a Master of Engineering program in Applied Electronics, including program objectives, outcomes, curriculum details across four semesters with course codes, titles, categories and credits.

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0% found this document useful (0 votes)
2K views20 pages

13.M.E. Applied Electronics 2021R

This document outlines the regulations for a Master of Engineering program in Applied Electronics, including program objectives, outcomes, curriculum details across four semesters with course codes, titles, categories and credits.

Uploaded by

ilavarasi.t
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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ANNA UNIVERSITY, CHENNAI

NON - AUTONOMOUS COLLEGES AFFILIATED ANNA UNIVERSITY


M.E. APPLIED ELECTRONICS
REGULATIONS – 2021
CHOICE BASED CREDIT SYSTEM

1. PROGRAMME EDUCATIONAL OBJECTIVES (PEOs):


 To enable graduates to develop solutions to real world problems in the frontier areas
of Applied Electronics.
 To enable the graduates to adapt to the latest trends in technology through self-
learning and to pursue research to meet out the demands in industries and
Academia.
 To enable the graduates to exhibit leadership skills and enhance their abilities
through lifelong learning.
 To become entrepreneurs to develop indigenous solutions.

2. PROGRAM SPECIFIC OUTCOMES (PSOs):

 To critically evaluate the design and provide optimal solutions to problem areas in
advanced signal processing, Consumer and automotive systems, embedded systems
and VLSI design.
 To enhance and develop electronic systems, protocols between circuits using modern
engineering hardware and software tools.
 To work professionally and ethically in applied electronics and related areas.
 To acquire knowledge of fundamentals of power electronics, power management,
wireless, power supply circuits, RF circuits and FPGA circuits.
ANNA UNIVERSITY, CHENNAI
NON - AUTONOMOUS COLLEGES AFFILIATED ANNA UNIVERSITY
M.E. APPLIED ELECTRONICS
REGULATIONS – 2021
CHOICE BASED CREDIT SYSTEM
I TO IV SEMESTERS CURRICULA AND 1st SEMESTER SYLLABI
SEMESTER I
PERIODS TOTAL
S. COURSE CATE-
COURSE TITLE PER WEEK CONTACT CREDITS
NO. CODE GORY
L T P PERIODS
THEORY
Applied Mathematics for
1. MA4101 FC 3 1 0 4 4
Electronics Engineers
2. RM4151 Research Methodology and IPR RMC 2 0 0 2 2
Advanced Digital Signal
3. AP4151 PCC 3 0 0 3 3
Processing
4. AP4152 Advanced Digital System Design PCC 3 0 2 5 4
Semiconductor Devices and
5. AP4153 PCC 3 0 0 3 3
Modeling
6. VL4152 Digital CMOS VLSI Design PCC 3 0 0 3 3
7. Audit Course – I* AC 2 0 0 2 0
PRACTICALS
AP4111 Electronics System Design PCC 0 0 3 3 1.5
8.
Laboratory
9. AP4112 Signal Processing Laboratory PCC 0 0 3 3 1.5
TOTAL 19 1 8 28 22
*Audit course is optional
SEMESTER II
PERIODS TOTAL
S. COURSE CATE-
COURSE TITLE PER WEEK CONTACT CREDITS
NO. CODE GORY
L T P PERIODS
THEORY
AP4201 Analog and Mixed Signal IC PCC 3 0 0 3 3
1.
Design
2. AP4202 Industrial Internet of Things PCC 3 0 0 3 3

AP4203 Power Conversion Circuits for PCC 3 0 0 3 3


3.
Electronics
4. AP4204 Embedded Systems PCC 3 0 2 5 4
5. Professional Elective I PEC 3 0 0 3 3
6. Professional Elective II PEC 3 0 0 3 3
7. Audit Course – II* AC 2 0 0 2 0
PRACTICALS
8. AP4211 VLSI Design Laboratory PCC 0 0 4 4 2
9. AP4212 Mini Project with seminar EEC 0 0 2 2 1
TOTAL 20 0 8 28 22
*Audit course is optional
SEMESTER III

PERIODS TOTAL
S. COURSE CATE- PER WEEK
COURSE TITLE CONTACT CREDITS
NO. CODE GORY
L T P PERIODS
THEORY
1. Professional Elective III PEC 3 0 0 3 3
2. Professional Elective IV PEC 3 0 0 3 3
3. Professional Elective V PEC 3 0 2 5 4
4. Open Elective OEC 3 0 0 3 3
PRACTICALS
5. AP4311 Project Work I EEC 0 0 12 12 6
TOTAL 12 0 14 26 19

SEMESTER IV

PERIODS TOTAL
S. COURSE CATE- PER WEEK
COURSE TITLE CONTACT CREDITS
NO. CODE GORY
L T P PERIODS
PRACTICALS
1. AP4411 Project Work II EEC 0 0 24 24 12
TOTAL 0 0 24 24 12

TOTAL NO. OF CREDITS:75

PROFESSIONAL ELECTIVES
SEMESTER II, ELECTIVE I

PERIODS TOTAL
S. COURSE CATE-
COURSE TITLE PER WEEK CONTACT CREDITS
NO. CODE GORY
L T P PERIODS
Applications Specific Integrated
1. AP4001 PEC 3 0 0 3 3
Circuits
Computer Architecture and
2. AP4072 PEC 3 0 0 3 3
Parallel Processing
3. AP4071 Automotive Electronics PEC 3 0 0 3 3
4. AP4076 Robotics PEC 3 0 0 3 3
Soft Computing and
5. AP4079 PEC 3 0 0 3 3
Optimization Techniques
SEMESTER II, ELECTIVE II

PERIODS TOTAL
S. COURSE CATE-
COURSE TITLE PER WEEK CONTACT CREDITS
NO. CODE GORY
L T P PERIODS
1. CU4251 RF System Design PEC 3 0 0 3 3
Electromagnetic Interference
2. EL4071 PEC 3 0 0 3 3
and Compatibility
3. AP4002 VLSI Design Techniques PEC 3 0 0 3 3
4. AP4003 Nano Technologies PEC 3 0 0 3 3
5. VL4254 VLSI Testing PEC 3 0 0 3 3

SEMESTER III, ELECTIVE III

PERIODS TOTAL
S. COURSE CATE-
COURSE TITLE PER WEEK CONTACT CREDITS
NO. CODE GORY
L T P PERIODS
1. AP4075 Quantum Computing PEC 3 0 0 3 3
VLSI for Wireless
2. CU4075 PEC 3 0 0 3 3
Communication
3. AP4004 MEMS PEC 3 0 0 3 3
4. VL4072 CAD for VLSI Circuits PEC 3 0 0 3 3
5. AP4005 Hardware Secure Computing PEC 3 0 0 3 3

SEMESTER III, ELECTIVE IV

PERIODS TOTAL
S. COURSE CATE-
COURSE TITLE PER WEEK CONTACT CREDITS
NO. CODE GORY
L T P PERIODS
1. AP4077 Sensor and Actuators PEC 3 0 0 3 3
Signal Integrity for High Speed
2. AP4078 PEC 3 0 0 3 3
Design
3. AP4006 Consumer Electronics PEC 3 0 0 3 3
Advanced Microprocessors and
4. AP4007 PEC 3 0 0 3 3
Microcontrollers Architectures
5. AP4008 Biomedical Signal Processing PEC 3 0 0 3 3
SEMESTER III, ELECTIVE V

PERIODS TOTAL
S. COURSE CATE-
COURSE TITLE PER WEEK CONTACT CREDITS
NO. CODE GORY
L T P PERIODS
Modeling and Synthesis with
1. AP4009 PEC 3 0 2 5 4
HDL
2. IF4073 Deep Learning PEC 3 0 2 5 4
Advanced Digital Image
3. AP4010 PEC 3 0 2 5 4
Processing
Edge Analytics and Internet of
4. AP4073 PEC 3 0 2 5 4
Things
5. AP4074 PCB Design PEC 3 0 2 5 4

AUDIT COURSES (AC)

Registration for any of these courses is optional to students

PERIODS
SL. COURSE
COURSE TITLE PER WEEK
NO CODE CREDITS
L T P
1. AX4091 English for Research Paper Writing 2 0 0 0
2. AX4092 Disaster Management 2 0 0 0
3. AX4093 Constitution of India 2 0 0 0
4. AX4094 நற் றமிழ் இலக்கியம் 2 0 0 0
MA4101 APPLIED MATHEMATICS FOR ELECTRONICS ENGINEERS L T P C
3 1 0 4
COURSE OBJECTIVES:
 To introduce the fundamentals of fuzzy logic.
 To understand the basics of random variables with emphasis on the standard discrete and
continuous distributions.
 To understand the basic probability concepts with respect to two dimensional random
variables.
 To make students understand the notion of a Markov chain, and how simple ideas of
conditional probability and matrices can be used to give a thorough and effective account of
discrete – time Markov chains.
 To provide the required fundamental concepts in queueing models and apply these
techniques in networks, image processing.

UNIT I FUZZY LOGIC 12


Classical logic – Multivalued logics – Fuzzy propositions – Fuzzy qualifiers.

UNIT II PROBABILITY AND RANDOM VARIABLES 12


Probability – Axioms of probability – Conditional probability – Bayes theorem – Random variables –
Probability function – Moments – Moment generating functions and their properties – Binomial,
Poisson, Geometric, Uniform, Exponential, Gamma and Normal distributions – Function of a
random variable.

UNIT III TWO DIMENSIONAL RANDOM VARIABLES 12


Joint distributions – Marginal and conditional distributions – Functions of two dimensional random
variables – Regression curve – Correlation.

UNIT IV RANDOM PROCESSES 12


Classification – Stationary random process – Markov process – Markov chain – Poisson process –
Gaussian process - Auto correlation – Cross correlation.

UNIT V QUEUEING MODELS 12


Poisson process – Markovian queues – Single and multi server models – Little’s formula –
Machine Interference model – Steady state analysis – Self service queue.

TOTAL : 60 PERIODS
COURSE OUTCOMES:

At the end of the course, students will be able to

 apply the concepts of fuzzy sets, fuzzy logic, fuzzy prepositions and fuzzy quantifiers and in
relate.
 analyze the performance in terms of probabilities and distributions achieved by the
determined solutions.
 use some of the commonly encountered two dimensional random variables and extend to
multivariate analysis.
 classify various random processes and solve problems involving stochastic processes.
 use queueing models to solve practical problems.
REFERENCES:
1. Ganesh M., “Introduction to Fuzzy Sets and Systems, Theory and Applications”, Academic
Press, New York, 1997.
2. George J. Klir and Yuan B,” Fuzzy sets and Fuzzy logic” Prentice Hall,
New Delhi, 2006.
3. Devore J.L, “Probability and Statistics for Engineering and Sciences”, Cengage learning, 9 th
Edition, Boston, 2017.
4. Johnson R.A. and Gupta, C.B., “ Miller and Freunds Probability and Statistics for Engineers”,
Pearson India Education, Asia, 9th Edition, New Delhi, 2017.
5. Oliver C. Ibe,” Fundamentals of applied probability and Random process”, Academic press,
Boston, 2014.
6. Gross D. and Harris C.M., “Fundamentals of Queuing theory”, Willey student,
3rd Edition, New Jersey, 2004.

RM4151 RESEARCH METHODOLOGY AND IPR L T P C


2 0 0 2

UNIT I RESEARCH DESIGN 6


Overview of research process and design, Use of Secondary and exploratory data to answer the
research question, Qualitative research, Observation studies, Experiments and Surveys.

UNIT II DATA COLLECTION AND SOURCES 6


Measurements, Measurement Scales, Questionnaires and Instruments, Sampling and methods.
Data - Preparing, Exploring, examining and displaying.

UNIT III DATA ANALYSIS AND REPORTING 6


Overview of Multivariate analysis, Hypotheses testing and Measures of Association.
Presenting Insights and findings using written reports and oral presentation.

UNIT IV INTELLECTUAL PROPERTY RIGHTS 6


Intellectual Property – The concept of IPR, Evolution and development of concept of IPR, IPR
development process, Trade secrets, utility Models, IPR & Bio diversity, Role of WIPO and WTO
in IPR establishments, Right of Property, Common rules of IPR practices, Types and Features of
IPR Agreement, Trademark, Functions of UNESCO in IPR maintenance.

UNIT V PATENTS 6
Patents – objectives and benefits of patent, Concept, features of patent, Inventive step,
Specification, Types of patent application, process E-filling, Examination of patent, Grant of patent,
Revocation, Equitable Assignments, Licences, Licensing of related patents, patent agents,
Registration of patent agents.
TOTAL:30 PERIODS
REFERENCES
1. Cooper Donald R, Schindler Pamela S and Sharma JK, “Business Research Methods”,
Tata McGraw Hill Education, 11e (2012).
2. Catherine J. Holland, “Intellectual property: Patents, Trademarks, Copyrights, Trade
Secrets”, Entrepreneur Press, 2007.
3. David Hunt, Long Nguyen, Matthew Rodgers, “Patent searching: tools &
techniques”, Wiley, 2007.
4. The Institute of Company Secretaries of India, Statutory body under an Act of parliament,
“Professional Programme Intellectual Property Rights, Law and practice”, September 2013.

AP4151 ADVANCED DIGITAL SIGNAL PROCESSING L T P C


3 0 0 3

COURSE OBJECTIVES:
 To describe fundamental concepts of DSP and Discrete Transforms
 To design digital filters design
 To estimate power spectrum using non- parametric and parametric methods
 To analyze the Multirate Signal processing by decimation and interpolation.
 To apply the concept of multirate signal processing for various applications

UNIT I DIGITAL SIGNAL PROCESSING 9


Sampling of analog signals - Selection of sampling frequency - Frequency response - Transfer
functions - Filter structures - Fast Fourier Transform (FFT) Algorithms - Image coding - DCT.

UNIT II DIGITAL FILTER DESIGN 9


IIR and FIR Filters: Filter structures, Implementation of Digital Filters - 2nd Order Narrow Band
Filter and 1st Order All Pass Filter, Frequency sampling structures of FIR, Lattice structures,
Forward and Backward prediction error filters, Reflection coefficients for lattice realization,
Implementation of lattice structures for IIR filters, Advantages of lattice structures.

UNIT III ESTIMATION OF POWER SPECTRUM 9


Non-Parametric Methods: Estimation of spectra from finite duration observation of signals,: Bartlett,
Welch & Blackman-Tukey methods, Performance Comparison. Parametric Methods:
Autocorrelation & Its Properties, Relation between auto correlation & model parameters, AR
Models - Yule-Walker & Burg Methods, MA & ARMA models for power spectrum estimation.

UNIT IV MULTI RATE SIGNAL PROCESSING 9


Decimation by a factor D - Interpolation by a factor I - Sampling rate conversion by a rational factor
I/D, Multistage Implementation of Sampling Rate Conversion, Filter design and Implementation for
sampling rate conversion. Up-sampling using All Pass Filter.

UNIT V APPLICATIONS OF MULTI RATE SIGNAL PROCESSING AND DSP


INTEGRATED CIRCUITS 9
Design of Phase Shifters, Interfacing of Digital Systems with Different Sampling Rates,
Implementation of Narrow Band Low Pass Filters, Implementation of Digital Filter Banks, Subband
Coding of Speech Signals, Quadrature Mirror Filters, Over Sampling A/D and D/A Conversion.

TOTAL: 45 PERIODS
COURSE OUTCOMES:
Upon completion of the course, the students will be able to
CO1: Describe the basics of Digital Signal Processing and Discrete Time Transforms.
CO2. Design and implement FIR/IIR digital filters using various structures
CO3. Estimate power spectrum using appropriate parametric/non-parametric method.
CO4: Analyze discrete time system at different sampling frequencies using the concept of Multirate
signal processing
CO5: Design discrete time system for the given application using Multi rate signal processing

REFERENCES:
1. J.G.Proakis & D. G.Manolakis Digital Signal Processing: Principles, Algorithms &
Applications -, 4th Ed., Pearson Education, 2013.
2. Alan V Oppenheim & Ronald W Schaffer Discrete Time signal processing, Pearson
Education, 2014.
3. Keshab K. Parhi, ‘VLSI Digital Signal Processing Systems Design and Implementation”,
John Wiley& Sons, 2007.
4. Steven. M .Kay, Modern Spectral Estimation: Theory & Application –PHI, 2009.
5. P.P.Vaidyanathan, Multi Rate Systems and Filter Banks , Pearson Education, 1993.
6. Emmanuel C. Ifeachor, Barrie W. Jervis, “Digital Signal Processing–A practical
approach”, Second Edition, Harlow, Prentice Hall, 2011.

AP4152 ADVANCED DIGITAL SYSTEM DESIGN L T PC


3 02 4
COURSE OBJECTIVES:
 To design asynchronous sequential circuits.
 To learn about hazards in asynchronous sequential circuits.
 To study the fault testing procedure for digital circuits.
 To understand the architecture of programmable devices.
 To design and implement digital circuits using programming tools.

UNIT I SEQUENTIAL CIRCUIT DESIGN 9


Analysis of Clocked Synchronous Sequential Circuits and Modelling- State Diagram, State
Table, State Table Assignment and Reduction-Design of Synchronous Sequential Circuits
Design of Iterative Circuits-ASM Chart and Realization using ASM.

UNIT II ASYNCHRONOUS SEQUENTIAL CIRCUIT DESIGN 9


Analysis of Asynchronous Sequential Circuit – Flow Table Reduction-Races-State Assignment-
Transition Table and Problems in Transition Table- Design of Asynchronous Sequential Circuit -
Static, Dynamic and Essential hazards – Mixed Operating Mode Asynchronous Circuits –
Designing Vending Machine Controller.

UNIT III FAULT DIAGNOSIS AND TESTABILITY ALGORITHMS 9


Fault Table Method-Path Sensitization Method – Boolean Difference Method - D Algorithm ––
Tolerance Techniques – The Compact Algorithm – Fault in PLA – Test Generation - DFT
Schemes – Built in Self Test.

UNIT IV SYNCHRONOUS DESIGN USING PROGRAMMABLE DEVICES 9


Programming Logic Device Families – Designing a Synchronous Sequential Circuit using
PLA/PAL – Designing ROM with PLA – Realization of Finite State Machine using PLD – FPGA –
Xilinx FPGA - Xilinx 4000.

SYSTEM DESIGN USING VERILOG 9


UNIT V
Hardware Modelling with Verilog HDL – Logic System, Data Types And Operators For Modelling
In Verilog HDL - Behavioural Descriptions In Verilog HDL – HDL Based Synthesis – Synthesis
Of Finite State Machines– Structural Modelling – Compilation And Simulation Of Verilog Code –
Test Bench - Realization Of Combinational And Sequential Circuits Using Verilog – Registers –
Counters – Sequential Machine – Serial Adder – Multiplier- Divider – Design Of Simple
Microprocessor, Introduction To System Verilog.
45 PERIODS
SUGGESTED ACTIVITIES:
1: Design asynchronous sequential circuits.
2: Design synchronous sequential circuits using PLA/PAL.
3: Simulation of digital circuits in FPGA.
4: Design digital systems with System Verilog.

PRACTICAL EXERCISES: 30 PERIODS


1. Design of Registers by Verilog HDL.
2. Design of Counters by Verilog HDL.
3. Design of Sequential Machines by Verilog HDL.
4. Design of Serial Adders , Multiplier and Divider by Verilog HDL.
5. Design of a simple Microprocessor by Verilog HDL.

COURSE OUTCOMES:
At the end of this course, the students will be able to:

CO1: Analyse and design synchronous sequential circuits.


CO2: Analyse hazards and design asynchronous sequential circuits.
CO3: Knowledge on the testing procedure for combinational circuit and PLA.
CO4: Able to design PLD and ROM.
CO5: Design and use programming tools for implementing digital circuits of industry standards.

TOTAL:75 PERIODS
REFERENCES
1. Charles H.Roth jr., “Fundamentals of Logic Design” Thomson Learning,2013.
2. M.D.Ciletti , Modeling, Synthesis and Rapid Prototyping with the Verilog HDL, Prentice
Hall, 1999
3. M.G.Arnold, Verilog Digital – Computer Design, Prentice Hall (PTR), 1999.
4. Nripendra N Biswas “Logic Design Theory” Prentice Hall of India,2001.
5. Paragk.Lala “Fault Tolerant and Fault Testable Hardware Design” B S Publications,2002
6. Paragk.Lala “Digital System Design Using PLD” B S Publications,2003.
7. Palnitkar , Verilog HDL – A Guide to Digital Design and Synthesis, Pearson , 2003.

AP4153 SEMICONDUCTOR DEVICES AND MODELING L T PC


3 0 0 3
COURSE OBJECTIVES:
 To acquire the fundamental knowledge and to expose to the field of semiconductor theory
and devices and their applications.
 To gain adequate understanding of semiconductor device modelling aspects, designing
devices for electronic applications
 To acquire the fundamental knowledge of different semiconductor device modelling
aspects.
UNIT I MOS CAPACITORS 9
Surface Potential: Accumulation, Depletion, and Inversion, Electrostatic Potential and Charge
Distribution in Silicon, Capacitances in an MOS Structure, Polysilicon-Gate Work Function and
Depletion Effects, MOS under Nonequilibrium and Gated Diodes, Charge in Silicon Dioxide and at
the Silicon–OxideInterface, Effect of Interface Traps and Oxide Charge on Device Characteristics,
High-Field Effects, Impact Ionization and Avalanche Breakdown, Band-to-Band Tunneling,
Tunneling into and through Silicon Dioxide, Injection of Hot Carriers from Silicon into Silicon
Dioxide, High-Field Effects in Gated Diodes, Dielectric Breakdown.

UNIT II MOSFET DEVICES 9


Long-Channel MOSFETs, Drain-Current Model, MOSFET I–V Characteristics, Subthreshold
Characteristics, Substrate Bias and Temperature Dependence of Threshold Voltage, MOSFET
Channel Mobility, MOSFET Capacitances and Inversion-Layer Capacitance Effect, Short-Channel
MOSFETs, Short-Channel Effect, Velocity Saturation and High-Field Transport Channel Length
Modulation, Source–Drain Series Resistance, MOSFET Degradation and Breakdown at High
Fields

UNIT III CMOS DEVICE DESIGN 9


CMOS Scaling, Constant-Field Scaling, Generalized Scaling, Nonscaling Effects, Threshold
Voltage, Threshold-Voltage Requirement, Channel Profile Design, Nonuniform Doping, Quantum
Effect on Threshold Voltage, Discrete Dopant Effects on Threshold Voltage, MOSFET Channel
Length, Various Definitions of Channel Length, Extraction of the Effective Channel Length,
Physical Meaning of Effective Channel Length, Extraction of Channel Length by C–V
Measurements.

UNIT IV BIPOLAR DEVICES 9


n–p–n Transistors, Basic Operation of a Bipolar Transistor, Modifying the Simple Diode Theory for
Describing Bipolar Transistors, Ideal Current–Voltage Characteristics, Collector Current, Base
Current, Current Gains, Ideal IC–VCE Characteristics, Characteristics of a Typical n–p–n
Transistor, Effect of Emitter and Base Series Resistances, Effect of Base–Collector Voltage on
Collector Current, Collector Current Falloff at High Currents, Nonideal Base Current at Low
Currents, Bipolar Device Models for Circuit and Time-Dependent Analyses Basic dc Model, Basic
ac Model, Small-Signal Equivalent-Circuit Model, Emitter Diffusion Capacitance, Charge-Control
Analysis, Breakdown Voltages, Common-Base Current Gain in the Presence of Base–Collector
Junction Avalanche, Saturation Currents in a Transistor.

UNIT V MATHEMATICAL TECHNIQUES FOR DEVICE SIMULATIONS 9


Poisson equation, continuity equation, drift-diffusion equation, Schrodinger equation, hydrodynamic
equations, trap rate, finite difference solutions to these equations in 1D and 2D space, grid
generation.
TOTAL: 45 PERIODS
COURSE OUTCOMES:
Upon completion of this course, the students will be able to
CO1: Explore the properties of MOS capacitors.
CO2: Analyze the various characteristics of MOSFET devices.
CO3: Describe the various CMOS design parameters and their impact on performance of the
device.
CO4: Discuss the device level characteristics of BJT transistors.
CO5: Identify the suitable mathematical technique for simulation.
REFERENCES:
1. Yuan Taur and Tak H.Ning, "Fundamentals of Modern VLSI Devices", Cambridge
University Press, 2016.
2. A.B. Bhattacharyya “Compact MOSFET Models for VLSI Design”, John Wiley & Sons Ltd,
2009.
3. Ansgar Jungel, “Transport Equations for Semiconductors”, Springer, 2009
4. Trond Ytterdal, Yuhua Cheng and Tor A. Fjeldly Wayne Wolf, “Device Modeling for Analog
and RF CMOS Circuit Design”, John Wiley & Sons Ltd, 2004
5. Selberherr, S., “Analysis and Simulation of Semiconductor Devices”, Springer-Verlag., 1984
6. Behzad Razavi, “Fundamentals of Microelectronics” Wiley Student Edition, 2nd Edition,
2014
7. J P Collinge, C A Collinge, “Physics of Semiconductor devices” Springer, 2002.
8. S.M.Sze, Kwok.K. NG, “Physics of Semiconductor devices”, Springer, 2006.

VL4152 L T P C
DIGITAL CMOS VLSI DESIGN
3 0 0 3
COURSE OBJECTIVES:
 To introduce the transistor level design of all digital building blocks common to all
cmos microprocessors, network processors, digital backend of all wireless systems
etc.
 To introduce the principles and design methodology in terms of the dominant circuit
choices, constraints and performance measures
 To learn all important issues related to size, speed and power consumption

UNIT I MOS TRANSISTOR PRINCIPLES AND CMOS INVERTER 12


MOSFET characteristic under static and dynamic conditions, MOSFET secondary effects,
elmore constant , CMOS inverter-static characteristic, dynamic characteristic, power, energy,
and energy delay parameters, stick diagram and layout diagrams.

UNIT II COMBINATIONAL LOGIC CIRCUITS 9


Static CMOS design, different styles of logic circuits, logical effort of complex gates, static and
dynamic properties of complex gates, interconnect delay, dynamic logic gates.

UNIT III SEQUENTIAL LOGIC CIRCUITS 9


Static latches and registers, dynamic latches and registers, timing issues, pipelines, clocking
strategies, nonbistable sequential circuits.

UNIT IV ARITHMETIC BUILDING BLOCKS 9


Data path circuits, architectures for adders, accumulators, multipliers, barrel shifters, speed,
power and area tradeoffs.

UNIT V MEMORY ARCHITECTURES 6


Memory architectures and Memory control circuits: Read-Only Memories, ROM cells, Read-
Write Memories (RAM), dynamic memory design, 6 Transistor SRAM cell, sense amplifiers.

COURSE OUTCOMES:
At the end of this course, the students will be able to:
CO1: Use mathematical methods and circuit analysis models in analysis of CMOS
digital circuits
CO2: Create models of moderately sized static CMOS combinational circuits that realize
specified digital functions and to optimize combinational circuit delay using RC delay models
and logical effort
CO3: Design sequential logic at the transistor level and compare the tradeoffs of sequencing
elements including flip-flops, transparent latches
CO4: Understand design methodology of arithmetic building blocks
CO5: Design functional units including ROM and SRAM

TOTAL:45 PERIODS
REFERENCES:
1. N.Weste, K. Eshraghian, “ Principles Of Cmos VLSI Design”, Addision Wesley, 2nd
Edition, 1993
2. M J Smith, “Application Specific Integrated Circuits”, Addisson Wesley, 1997
3. Sung-Mo Kang & Yusuf Leblebici, “CMOS Digital Integrated Circuits Analysis And
Design”, Mcgraw-Hill, 1998
4. Jan Rabaey, Anantha Chandrakasan, B Nikolic, “ Digital Integrated Circuits: A Design
Perspective”, Prentice Hall Of India, 2nd Edition, Feb 2003

AP4111 ELECTRONIC SYSTEM DESIGN LABORATORY L T P C


0 0 3 1.5

COURSE OBJECTIVES:
 Design of instrumentation amplifier and voltage regulator
 Design of PCB layout
 Write a Verilog HDL coding of various combinational circuits
 Verify the design functionality for various memory modules
 Design of PLL circuits

LIST OF EXPERIMENTS:

1. Design of a 4-20 mA transmitter for a bridge type transducer.

Design the Instrumentation amplifier with the bridge type transducer (Thermistor or any resistance
variation transducers) and convert the amplified voltage from the instrumentation amplifier to 4 –
20 mA current using op-amp. Plot the variation of the temperature Vs output current.

2. Design of AC/DC voltage regulator using SCR

Design a phase controlled voltage regulator using full wave rectifier and SCR, vary the conduction
angle and plot the output voltage.

3. PCB layout design using CAD

Drawing the schematic of simple electronic circuit and design of PCB layout using CAD

4. HDL based design entry and simulation of Parameterizable cores of Counters, Shift registers,
State machines, 8-bit Parallel adders and 8 –Bit multipliers.
5. HDL based design entry and simulation of Parameterizable cores on the simple Distributed
Arithmetic system. Test vector generation and timing analysis.

6. HDL based design entry and simulation of Parameterizable cores on memory design and 4 – bit
ALU. Synthesis, P&R and post P&R simulation, Critical paths and static timing analysis results to
be identified. FPGA real time programming and I/O interfacing.

7. Interfacing with Memory modules in FPGA Boards. Verifying design functionality by probing
internal signals.

8. Realization of Discrete Fourier transform/Fast Fourier Transform algorithm in HDL and


observing the spectrum in simulation.

9. Invoke PLL module and demonstrate the use of the PLL for clock generation in FPGAs. Verify
design functionality implemented in FPGA by capturing the signal in Oscilloscope

TOTAL :45 PERIODS


COURSE OUTCOMES:
CO1: Design an instrumentation amplifier and voltage regulator
CO2: Design a PCB layout using CAD tool
CO3: Write a Verilog code for various combinational and sequential circuits
CO4: Develop a memory module with FPGA
CO5: Design an PLL circuit

REFERENCES:
1. Neil H.E. Weste, David Harris, Ayan Banerjee, “CMOS VLSI Design- A circuits and Systems
Perspective”, Third Edition, 2013, Pearson education.
2. M. Morris Mano, Michael D. Ciletti, “Digital Design with an introduction to Verilog HDL”, PHI,
6th Edition, 2018
3. James E. Palmer, David E. Perlman,``Schuams Outlines-Introduction to Digital Systems”,
Tata McGraw Hill, 2nd Edition 2003
4. Sergio Franco, “Design with operational amplifiers and analog integrated circuits”, 3rd
Edition, Tata McGraw Hill, 2007
5. D.Roy Choudhry, Shail Jain, “Linear Integrated Circuits”, New Age International Private
Limited, 4th Edition, 2010

AP4112 SIGNAL PROCESSING LABORATORY L T P C


0 0 3 1.5

COURSE OBJECTIVES:
 To provide the student with the basic understanding of audio signal analysis using filters
 To provide the students with the understanding of the working of statistical method based
approaches
 To impart the students with the design of filters
 To demonstrate the working of algorithms for different applications
 To provide knowledge of analyzing the images and video
LIST OF EXPERIMENTS:
1. Design of Adaptive channel equalizer
2. Realization of sub band filter using linear convolution
3. Realization of STFT using FFT
4. Demonstration of Bayes technique
5. Demonstration of Min-max technique
6. Realization of FIR Wiener filter
7. Generation of Multivariate Gaussian generated data with desired mean vector and the
required co-variance matrix.
8. Design and Realization of the adaptive filter using LMS algorithm (solved using steepest-
descent algorithm)
9. Representation of the 2D image signal as the linear combinations of PCA (Eigen faces)
10. Image compression using Discrete cosine transformation (DCT).
11. Multiple-input Multiple output (MIMO)
12. Speech recognition using Support Vector Machine (SVM)
13. LMS filtering implementation using TMS320C6x processor
14. Face detection and tracking in video using OpenCV
TOTAL :45 PERIODS

COURSE OUTCOMES:
CO1: Obtain the ability to apply knowledge of linear algebra, random process and multirate signal
processing in various signal processing applications.
CO2: Develop the student’s ability on conducting engineering experiments, analyze experimental
observations scientifically
CO3: Become familiar to fundamental principles of linear algebra
CO4: Familiarize the basic operations of filter banks through simulations
CO5: Apply the principles of random process in practical applications

REFERENCES
1. Vinay K.Ingle,John G.Proakis, Digital signal processing using MATLAB, Cengage Learning,
3rd edition, 2011
2. Michael R King, Nipa Mody, Numerical and statistical methods for Bio Engineering –
Applications using MATLAB , CAMBRIDGE University Press, 2010
3. V. Siahaan, R.H.Sianipar, Signal and Image processing with python GUI, Balige
Publishing,2021
AUDIT COURSES

AX4091 ENGLISH FOR RESEARCH PAPER WRITING LT PC


2 00 0
COURSE OBJECTIVES:
 Teach how to improve writing skills and level of readability
 Tell about what to write in each section
 Summarize the skills needed when writing a Title
 Infer the skills needed when writing the Conclusion
 Ensure the quality of paper at very first-time submission

UNIT I INTRODUCTION TO RESEARCH PAPER WRITING 6


Planning and Preparation, Word Order, Breaking up long sentences, Structuring Paragraphs and
Sentences, Being Concise and Removing Redundancy, Avoiding Ambiguity and Vagueness

UNIT II PRESENTATION SKILLS 6


Clarifying Who Did What, Highlighting Your Findings, Hedging and Criticizing, Paraphrasing and
Plagiarism, Sections of a Paper, Abstracts, Introduction

UNIT III TITLE WRITING SKILLS 6


Key skills are needed when writing a Title, key skills are needed when writing an Abstract, key
skills are needed when writing an Introduction, skills needed when writing a Review of the
Literature, Methods, Results, Discussion, Conclusions, The Final Check

UNIT IV RESULT WRITING SKILLS 6


Skills are needed when writing the Methods, skills needed when writing the Results, skills are
needed when writing the Discussion, skills are needed when writing the Conclusions

UNIT V VERIFICATION SKILLS 6


Useful phrases, checking Plagiarism, how to ensure paper is as good as it could possibly be the
first- time submission
TOTAL: 30 PERIODS
COURSE OUTCOMES:

CO1 –Understand that how to improve your writing skills and level of readability
CO2 – Learn about what to write in each section
CO3 – Understand the skills needed when writing a Title
CO4 – Understand the skills needed when writing the Conclusion
CO5 – Ensure the good quality of paper at very first-time submission

REFERENCES:
1. Adrian Wallwork , English for Writing Research Papers, Springer New York Dordrecht
Heidelberg London, 2011
2. Day R How to Write and Publish a Scientific Paper, Cambridge University Press 2006
3. Goldbort R Writing for Science, Yale University Press (available on Google Books) 2006
4. Highman N, Handbook of Writing for the Mathematical Sciences, SIAM. Highman’s book 1998.
AX4092 DISASTER MANAGEMENT LT PC
2 00 0
COURSE OBJECTIVES:
 Summarize basics of disaster
 Explain a critical understanding of key concepts in disaster risk reduction and
humanitarian response.
 Illustrate disaster risk reduction and humanitarian response policy and practice from
multiple perspectives.
 Describe an understanding of standards of humanitarian response and practical relevance
in specific types of disasters and conflict situations.
 Develop the strengths and weaknesses of disaster management approaches

UNIT I INTRODUCTION 6
Disaster: Definition, Factors and Significance; Difference between Hazard And Disaster; Natural
and Manmade Disasters: Difference, Nature, Types and Magnitude.

UNIT II REPERCUSSIONS OF DISASTERS AND HAZARDS 6


Economic Damage, Loss of Human and Animal Life, Destruction Of Ecosystem. Natural
Disasters: Earthquakes, Volcanisms, Cyclones, Tsunamis, Floods, Droughts And Famines,
Landslides And Avalanches, Man-made disaster: Nuclear Reactor Meltdown, Industrial Accidents,
Oil Slicks And Spills, Outbreaks Of Disease And Epidemics, War And Conflicts.

UNIT III DISASTER PRONE AREAS IN INDIA 6


Study of Seismic Zones; Areas Prone To Floods and Droughts, Landslides And Avalanches;
Areas Prone To Cyclonic and Coastal Hazards with Special Reference To Tsunami; Post-Disaster
Diseases and Epidemics

UNIT IV DISASTER PREPAREDNESS AND MANAGEMENT 6


Preparedness: Monitoring Of Phenomena Triggering a Disaster or Hazard; Evaluation of Risk:
Application of Remote Sensing, Data from Meteorological And Other Agencies, Media Reports:
Governmental and Community Preparedness.

UNIT V RISK ASSESSMENT 6


Disaster Risk: Concept and Elements, Disaster Risk Reduction, Global and National Disaster Risk
Situation. Techniques of Risk Assessment, Global Co-Operation in Risk Assessment and
Warning, People’s Participation in Risk Assessment. Strategies for Survival
TOTAL : 30 PERIODS
COURSE OUTCOMES:
CO1: Ability to summarize basics of disaster
CO2: Ability to explain a critical understanding of key concepts in disaster risk reduction and
humanitarian response.
CO3: Ability to illustrate disaster risk reduction and humanitarian response policy and practice
from multiple perspectives.
CO4: Ability to describe an understanding of standards of humanitarian response and practical
relevance in specific types of disasters and conflict situations.
CO5: Ability to develop the strengths and weaknesses of disaster management approaches
REFERENCES:
1. Goel S. L., Disaster Administration And Management Text And Case Studies”,Deep & Deep
Publication Pvt. Ltd., New Delhi,2009.
2. NishithaRai, Singh AK, “Disaster Management in India: Perspectives, issues and strategies
“’NewRoyal book Company,2007.
3. Sahni, PardeepEt.Al. ,” Disaster Mitigation Experiences And Reflections”, Prentice Hall OfIndia,
New Delhi,2001.

AX4093 CONSTITUTION OF INDIA L T P C


2 0 0 0
COURSE OBJECTIVES:
Students will be able to:
 Understand the premises informing the twin themes of liberty and freedom from a civil
rights perspective.
 To address the growth of Indian opinion regarding modern Indian intellectuals’
constitutional
 Role and entitlement to civil and economic rights as well as the emergence nation hood in
the early years of Indian nationalism.
 To address the role of socialism in India after the commencement of the Bolshevik
Revolutionin1917and its impact on the initial drafting of the Indian Constitution.

UNIT I HISTORY OF MAKING OF THE INDIAN CONSTITUTION


History, Drafting Committee, (Composition & Working)

UNIT II PHILOSOPHY OF THE INDIAN CONSTITUTION


Preamble, Salient Features

UNIT III CONTOURS OF CONSTITUTIONAL RIGHTS AND DUTIES


Fundamental Rights, Right to Equality, Right to Freedom, Right against Exploitation, Right to
Freedom of Religion, Cultural and Educational Rights, Right to Constitutional Remedies, Directive
Principles of State Policy, Fundamental Duties.

UNIT IV ORGANS OF GOVERNANCE


Parliament, Composition, Qualifications and Disqualifications, Powers and Functions, Executive,
President, Governor, Council of Ministers, Judiciary, Appointment and Transfer of Judges,
Qualifications, Powers and Functions.

UNIT V LOCAL ADMINISTRATION

of Elected Representative, CEO, Municipal Corporation. Pachayati raj: Introduction, PRI: Zila
Pachayat. Elected officials and their roles, CEO Zila Pachayat: Position and role. Block level:
Organizational Hierarchy(Different departments), Village level:Role of Elected and Appointed
officials, Importance of grass root democracy.

UNIT VI ELECTION COMMISSION


Election Commission: Role and Functioning. Chief Election Commissioner and Election
Commissioners - Institute and Bodies for the welfare of SC/ST/OBC and women.

TOTAL: 30 PERIODS
COURSE OUTCOMES:
Students will be able to:
 Discuss the growth of the demand for civil rights in India for the bulk of Indians before the
arrival of Gandhi in Indian politics.
 Discuss the intellectual origins of the framework of argument that informed the
conceptualization
 of social reforms leading to revolution in India.
 Discuss the circumstances surrounding the foundation of the Congress Socialist
Party[CSP] under the leadership of Jawaharlal Nehru and the eventual failure of the
proposal of direct elections through adult suffrage in the Indian Constitution.
 Discuss the passage of the Hindu Code Bill of 1956.

SUGGESTED READING
1. The Constitution of India,1950(Bare Act),Government Publication.
2. Dr.S.N.Busi, Dr.B. R.Ambedkar framing of Indian Constitution,1st Edition, 2015.
3. M.P. Jain, Indian Constitution Law, 7th Edn., Lexis Nexis,2014.
4. D.D. Basu, Introduction to the Constitution of India, Lexis Nexis, 2015.

AX4094 நற் றமிழ் இலக்கியம் L T P C


2 0 0 0

UNIT I சங் க இலக்கியம் 6


1. தமிழின் துவக்க நூல் ததொல் கொப் பியம்
– எழுத்து, த ொல் , தபொருள்
2. அகநொனூறு (82)
- இயற் கக இன்னிக அரங் கம்
3. குறிஞ் சிப் பொட்டின் மலர்க்கொட்சி
4. புறநொனூறு (95,195)
- பபொகர நிறுத்திய ஒளகவயொர்

UNIT II அறநநறித் தமிழ் 6


1. அறதநறி வகுத்த திருவள் ளுவர்
- அறம் வலியுறுத்தல் , அன்புகடகம, ஒப் புறவு அறிதல் , ஈகக, புகழ்
2. பிற அறநூல் கள் - இலக்கிய மருந்து
– ஏலொதி, சிறுபஞ் மூலம் , திரிகடுகம் , ஆ ொரக்பகொகவ (தூய் கமகய
வலியுறுத்தும் நூல் )

UNIT III இரட்டடக் காப் பியங் கள் 6


1. கண்ணகியின் புரட்சி
- சிலப் பதிகொர வழக்குகர கொகத
2. மூகப கவ இலக்கியம் மணிபமககல
- சிகறக்பகொட்டம் அறக்பகொட்டமொகிய கொகத

UNIT IV அருள் நநறித் தமிழ் 6


1. சிறுபொணொற் றுப் பகட
- பொரி முல் கலக்குத் பதர் தகொடுத்தது, பபகன்
மயிலுக்குப் பபொர்கவ தகொடுத்தது, அதியமொன் ஒளகவக்கு
தநல் லிக்கனி தகொடுத்தது, அர ர் பண்புகள்
2. நற் றிகண
- அன்கனக்குரிய புன்கன சிறப் பு
3. திருமந்திரம் (617, 618)
- இயமம் நியமம் விதிகள்
4. தர்ம ் ொகலகய நிறுவிய வள் ளலொர்
5. புறநொனூறு
- சிறுவபன வள் ளலொனொன்
6. அகநொனூறு (4) - வண்டு
நற் றிகண (11) - நண்டு
கலித்ததொகக (11) - யொகன, புறொ
ஐந்திகன 50 (27) - மொன்
ஆகியகவ பற் றிய த ய் திகள்
UNIT V நவீன தமிழ் இலக்கியம் 6
1. உகரநகடத் தமிழ் ,
- தமிழின் முதல் புதினம் ,
- தமிழின் முதல் சிறுககத,
- கட்டுகர இலக்கியம் ,
- பயண இலக்கியம் ,
- நொடகம் ,
2. நொட்டு விடுதகல பபொரொட்டமும் தமிழ் இலக்கியமும் ,
3. முதொய விடுதகலயும் தமிழ் இலக்கியமும் ,
4. தபண் விடுதகலயும் விளிம் பு நிகலயினரின் பமம் பொட்டில்
தமிழ் இலக்கியமும் ,
5. அறிவியல் தமிழ் ,
6. இகணயத்தில் தமிழ் ,
7. சுற் று சூ
் ழல் பமம் பொட்டில் தமிழ் இலக்கியம் .
TOTAL: 30 PERIODS

தமிழ் இலக்கிய நெளியீடுகள் / புத்தகங் கள்


1. தமிழ் இகணய கல் விக்கழகம் (Tamil Virtual University)- www.tamilvu.org
2. தமிழ் விக்கிப் பீடியொ (Tamil Wikipedia) -https://ta.wikipedia.org
3. தர்மபுர ஆதின தவளியீடு
4. வொழ் வியல் களஞ் சியம்
- தமிழ் ப் பல் ககலக்கழகம் , தஞ் ொவூர்
5. தமிழ் ககலக் களஞ் சியம்
- தமிழ் வளர் சி
் த் துகற (thamilvalarchithurai.com)
6. அறிவியல் களஞ் சியம்
- தமிழ் ப் பல் ககலக்கழகம் , தஞ் ொவூர்

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