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RFM119W/RFM119SW

Featurs
„ Embedded EEPROM
y Very Easy Development with RFPDK
y All Features Programmable
„ Frequency Range: 240 to 960 MHz
„ FSK, GFSK and OOK Modulation
„ Symbol Rate:
0.5 to 100 ksps (FSK/GFSK)
0.5 to 30 ksps (OOK)
„ Deviation: 1.0 to 200 kHz
„ Two-wire Interface for Registers Accessing and
EEPROM Programming
„ Output Power: -10 to +13 dBm
„ Supply Voltage: 1.8 to 3.6 V
„ Sleep Current: < 20 nA
„ FCC/ETSI Compliant RFM119W
„ RoHS Compliant
„ Module Size:17.8*12.8*5.0mm (RFM119W)
16*16*5.0mm (RFM119SW)

Descriptios
The RFM119W/RFM119SW is a high performance,
highly flexible, low-cost, single-chip (G)FSK/OOK
transmitter for various,240 to 960 MHz wireless
applications. It is a part of the HOPERF NextGenRFTM
family, which includes a complete line of transmitters,
receivers and transceivers. The RFM119W/RFM119SW
provides the simplest way to control the data
transmission. The transmission is started when an
effective level turnover is detected on the DATA pin,
while the transmission action will stop after the DATA pin
holding level low for a defined time window, or after a
two-wire interface (TWI) command is issued. The chip
RFM119SW
features can be configured in two different ways: setting
the configuration registers through the TWI, or
programming the embedded
Applications
RFPDK. The device operates from a supply voltage of 1.8 „ Low-Cost Consumer Electronics Applications
V to 3.6 V, consumes 27.6 mA (FSK @ 868.35 MHz) „ Home and Building Automation
when transmitting +10 dBm output power, and only leak
„ Remote Fan Controllers
20 nA when it is in sleep state. The
„ Infrared Transmitter Replacements
RFM119W/RFM119SW transmitter together with the
CMT2219A receiver enables a robust RF link.
„ Industrial Monitoring and Controls
„ Remote Lighting Control
„ Wireless Alarm and Security Systems
„ Remote Keyless Entry (RKE)

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RFM119W/RFM119SW
Abbreviations
Abbreviations used in this data sheet are described below

AN Application Notes PA Power Amplifier

BOM Bill of Materials PC Personal Computer
BSC Basic Spacing between Centers PCB Printed Circuit Board
EEPROM Electrically Erasable Programmable Read-Only PN Phase Noise
Memory RCLK Reference Clock
ESD Electro-Static Discharge RF Radio Frequency
ESR Equivalent Series Resistance RFPDK RF Product Development Kit
ETSI European Telecommunications Standards RoHS Restriction of Hazardous Substances
Institute Rx Receiving, Receiver
FCC Federal Communications Commission SOT Small-Outline Transistor
FSK Frequency Shift Keying SR Symbol Rate
GFSK Gauss Frequency Shift Keying TWI Two-wire Interface
Max Maximum Tx Transmission, Transmitter
MCU Microcontroller Unit Typ Typical
Min Minimum USB Universal Serial Bus
MOQ Minimum Order Quantity XO/XOSC Crystal Oscillator
NP0 Negative-Positive-Zero XTAL Crystal
OBW Occupied Bandwidth PA Power Amplifier
OOK On-Off Keying

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RFM119W/RFM119SW
Table of Contents
1. Electrical Characteristics............................................................................................................................................ 4

1.1 Recommended Operating Conditions ................................................................................................................... 4

1.2 Absolute Maximum Ratings................................................................................................................................... 4
1.3 Transmitter Specifications ..................................................................................................................................... 5

2. Pin Descriptions .......................................................................................................................................................... 6

3. Typical Performance Characteristics......................................................................................................................... 7

4. Typical Application Schematics ................................................................................................................................. 8

5. Functional Descriptions.............................................................................................................................................. 9

5.1 Overview ............................................................................................................................................................. 9

5.2 Modulation, Frequency, Deviation and Symbol Rate .......................................................................................... 9
5.3 Embedded EEPROM and RFPDK ...................................................................................................................... 10
5.4 Power Amplifier ................................................................................................................................................... 11
5.5 PA Ramping ........................................................................................................................................................ 12
5.6. Working States and Transmission Control Interface ....................................................................................... 13

5.6.1 Working States................................................................................................................................................. 14

5.6.2 Transmission Control Interface ........................................................................................................................ 14
5.6.2.1 Tx Enabled by DATA Pin Rising Edge................................................................................................... 14
5.6.2.2 Tx Enabled by DATA Pin Falling Edge ...................................................................................................14
5 6.2.3 Two-wire Interface ................................................................................................................................14

6. Ordering Information................................................................................................................................................. 17

7. Package Outline......................................................................................................................................................... 18

8. Contact Information .................................................................................................................................................... 19

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RFM119W/RFM119SW
1. Electrical Characteristics
VDD = 3.3 V, TOP = 25 ℃, FRF = 868.35 MHz, FSK modulation, output power is +10 dBm terminated in a matched 50 Ω
impedance, unless otherwise noted.

1.1 Recommended Operating Conditions

Table 2. Recommended Operation Conditions

Parameter Symbol Conditions Min Typ Max Unit

Operation Voltage Supply VDD 1.8 3.6 V
Operation Temperature TOP -40 85 ℃
Supply Voltage Slew Rate 1 mV/us

1.2 Absolute Maximum Ratings

Table 3. Absolute Maximum Ratings[1]

Parameter Symbol Conditions Min Max Unit

Supply Voltage VDD -0.3 3.6 V
Interface Voltage VIN -0.3 VDD + 0.3 V
Junction Temperature TJ -40 125 ℃
Storage Temperature TSTG -50 150 ℃
Soldering Temperature TSDR Lasts at least 30 seconds 255 ℃
ESD Rating Human Body Model (HBM) -2 2 kV
Latch-up Current @ 85 ℃ -100 100 mA
Note:
[1]. Stresses above those listed as “absolute maximum ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device under these conditions is not implied. Exposure to maximum rating
conditions for extended periods may affect device reliability.

Caution! ESD sensitive device. Precaution should be used when handling the device in order
to prevent permanent damage.

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1.3 Transmitter Specifications
Table 4. Transmitter Specifications
Parameter Symbol Conditions Min Typ Max Unit
[1]
Frequency Range FRF 240 960 MHz
Synthesizer Frequency FRF ≤ 480 MHz 198 Hz
FRES
Resolution FRF > 480 MHz 397 Hz
FSK/GFSK 0.5 100 ksps
Symbol Rate SR
OOK 0.5 30 ksps
(G)FSK Modulation
FDEV 1 200 kHz
Deviation Range
Bandwidth-Time Product BT GFSK modulation - 0.5 - -
Maximum Output Power POUT(Max) +13 dBm
Minimum Output Power POUT(Min) -10 dBm
Output Power Step Size PSTEP 1 dB
OOK PA Ramping Time[2] tRAMP 0 1024 us
OOK, 0 dBm, 50% duty cycle 6.7 mA
OOK, +10 dBm, 50% duty cycle 13.4 mA
Current Consumption OOK, +13 dBm, 50% duty cycle 17.4 mA
IDD-433.92
@ 433.92 MHz FSK, 0 dBm, 9.6 ksps 10.5 mA
FSK, +10 dBm, 9.6 ksps 23.5 mA
FSK, +13 dBm, 9.6 ksps 32.5 mA
OOK, 0 dBm, 50% duty cycle 8.0 mA
OOK, +10 dBm, 50% duty cycle 15.5 mA
Current Consumption OOK, +13 dBm, 50% duty cycle 19.9 mA
IDD-868.35
@ 868.35 MHz FSK, 0 dBm, 9.6 ksps 12.3 mA
FSK, +10 dBm, 9.6 ksps 27.6 mA
FSK, +13 dBm, 9.6 ksps 36.1 mA
Sleep Current ISLEEP 20 nA
Frequency Tune Time tTUNE 370 us
100 kHz offset from FRF -80 dBc/Hz
Phase Noise @ 433.92
PN433.92 600 kHz offset from FRF -98 dBc/Hz
MHz
1.2 MHz offset from FRF -107 dBc/Hz
100 kHz offset from FRF -74 dBc/Hz
Phase Noise @ 868.35
PN868.35 600 kHz offset from FRF -92 dBc/Hz
MHz
1.2 MHz offset from FRF -101 dBc/Hz
Harmonics Output for H2433.92 2nd harm @ 867.84 MHz, +13 dBm POUT -52 dBm
[3] rd
433.92 MHz H3433.92 3 harm @ 1301.76 MHz, +13 dBm POUT -60 dBm
nd
Harmonics Output for H2868.35 2 harm @ 1736.7 MHz, +13 dBm POUT -67 dBm
868.35 MHz [3] H3868.35 3rd harm @ 2605.05 MHz, +13 dBm POUT -55 dBm
OOK Extinction Ration 60 dB
Notes:
[1]. The frequency range is continuous over the specified range.
[2]. 0 and 2n us, n = 0 to 10, when set to “0”, the PA output power will ramp to its configured value in the shortest possible
time.
[3]. The harmonics output is measured with the application shown as Figure 10.

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2. Pin Descriptions

RFM119W. Pin Diagram

RFM119SW. Pin Diagram

Table 6. RFM119W/RFM119SW Pin Descriptions

Pin Number
Name I/O Descriptions
RFM119W RFM119SW

1 1 ANT O Transmitter RF Output

2 4 VDD I Power Supply 1.8V to 3.6V

Data input to be transmitted or

3 8 DATA I/O
Data pin to access the embedded EEPROM

4 2,7,9,14 GND I Ground

5 3,5,6, NC --- Connect to GND

6 11 CLK I Clock pin to access the embedded EEPROM

7 GND I Ground

8 10,12,13 NC --- Connect to GND

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3. Typical Performance Characteristics
Phase Noise @ 868.35 MHz
Phase Noise @ 433.92  MHz  15 
13.0 dBm
20  @ 868.35 MHz
13.4 dBm 5 
10   @ 433.92 MHz
 
‐5 
0 
   
‐10  ‐15 

Power (dBm)
   
Power (dBm)

‐20 
‐25 

‐30       
  ‐35 
‐40       
  ‐56.7 dBm  ‐45  -55.9 dBm
‐50  @ 869.55 MHz
 
@ 435.12 MHz 
 
‐55 
‐60 

‐70  ‐65 
432.42 432.67 432.92 433.17 433.42 433.67 433.92 434.17 434.42 434.67 434.92 435.17 435.42  866.85   867.1  867.35   867.6  867.85   868.1  868.35   868.6  868.85   869.1  869.35   869.6  869.85 

Frequency (MHz) (RBW=10 kHz) Frequency (MHz) (RBW = 10 kHz)

Figure 3. Phase Noise, FRF = 433.92 MHz, Figure 4. Phase Noise, FRF = 868.35 MHz,

POUT = +13 dBm, Unmodulated POUT = +13 dBm, Unmodulated

OOK Spectrum, SR = 9.6 ksps FSK vs. GFSK 

20
10 

10
0 
 
  0
‐10  FSK
Power (dBm)

 
Power (dBm)

-10
GFSK
‐20 
-20

‐30   
-30

‐40 
 
-40

‐50  -50
433.18         433.37         433.55         433.74         433.92         434.11         434.29         434.48         434.66  433.62 433.72 433.82 433.92 434.02 434.12 434.22
Frequency (MHz) Frequency (MHz)

Figure 5. OOK Spectrum, SR = 9.6 ksps, Figure 6. FSK/GFSK Spectrum,

POUT = +10 dBm, tRAMP = 32 us SR = 9.6 ksps, FDEV = 15 kHz

Spectrum of Various PA Ramping Options POUT vs. VDD

10  14 

  1024 us     
0  512 us 
 
12 
 
256 us 
  128 us  SR = 1.2 ksps 10   
‐10  64 us     
  32 us  8 
 
Power (dBm)

Power (dBm)

    0 dBm
    +10 dBm
  4  +13 dBm
‐30 
 
   
2 

‐40 
0 

‐2 
‐50 
1.6   1.8   2   2.2   2.4   2.6   2.8   3   3.2   3.4   3.6   3.8 
433.17   433.37   433.57   433.77   433.97   434.17   434.37   434.57 
Frequency (MHz) Supply Voltage VDD (V)

Figure 7. Spectrum of PA Ramping, Figure 8. Output Power vs. Supply

SR = 1.2 ksps, POUT = +10 dBm Voltages, FRF = 433.92 MHz

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4. Typical Application Schematics

RFM119W

RFM119SW

Figure 9: Typical Application Schematic

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5. Functional Descriptions

VDD
LDOs POR Bandgap
GND

XOSC
VCO
XTAL
PFD/CP Loop Filter PA RFO

Fractional-N
DIV

Modulator Ramp
EEPROM
Control

CLK
Interface and Digital Logic
DATA

Figure 11. RFM119W/RFM119SW Functional Block Diagram

5.1 Overview
The RFM119W/RFM119SW is a high performance, highly flexible, low-cost, single-chip (G)FSK/OOK transmitter for various 240
to 960
MHz wireless applications. It is part of the HOPERF NextGenRFTM family, which includes a complete line of transmitters,
receivers and transceivers. The chip is optimized for the low system cost, low power consumption, battery powered application
with its highly integrated and low power design.

The functional block diagram of the RFM119W/RFM119SW is shown in the figure above. The RFM119W/RFM119SW is
based on direct synthesis of the RF frequency, and the frequency is generated by a low-noise fractional-N frequency
synthesizer. It uses a 1-pin crystal oscillator circuit with the required crystal load capacitance integrated on-chip to minimize
the number of external components. Every analog block is calibrated on each Power-on Reset (POR) to the internal voltage
reference. The calibration can help the chip to finely work under different temperatures and supply voltages. The
RFM119W/RFM119SW uses the DATA pin for the host MCU to send in the data. The input data will be modulated and sent
out by a highly efficient PA, which output power can be configured from -10 to +13 dBm in 1 dB step size

The user can directly use the RFM119W/RFM119SW default configuration for immediate demands. If that cannot meet the
system requirement, on-line register configuration and off-line EEPROM programming configuration are available for the user
to customize the chip features. The on-line configuration means there is an MCU available in the application to configure the
chip registers through the 2-wire interface, while the off-line configuration is done by the HOPERF USB Programmer and the
RFPDK. After the configuration is done, only the DATA pin is required for the host MCU to send in the data and control the
transmission. The RFM119W/RFM119SW operates from 1.8 to 3.6 V so that it can finely work with most batteries to their
useful power limits. It only consumes 15.5 mA (OOK @ 868.35 MHz) / 27.6 mA (FSK @ 868.35 MHz) when transmitting +10
dBm power under 3.3 V supply voltage.

5.2 Modulation, Frequency, Deviation and Symbol Rate

The RFM119W/RFM119SW supports GFSK/FSK modulation with the symbol rate up to 100 ksps, as well as OOK modulation
with the symbol rate up to 30 ksps. The supported deviation of the (G)FSK modulation ranges from 1 to 200 kHz. The
RFM119W/RFM119SW continuously covers the frequency range from 240 to 960 MHz, including the license free ISM
frequency band around 315 MHz,
433.92 MHz, 868.35 MHz and 915 MHz. The device contains a high spectrum purity low power fractional-N frequency
synthesizer with output frequency resolution better than 198 Hz when the frequency is less than 480 MHz, and is about 397 Hz

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RFM119W/RFM119SW
when the frequency is larger than 480 MHz. See the table below for the modulation, frequency and symbol rate specifications.

Table 9. Modulation, Frequency and Symbol Rate

Parameter Value Unit

Modulation (G)FSK/OOK -
Frequency 240 to 960 MHz
Deviation 1 to 200 kHz
Frequency Resolution (FRF ≤ 480 MHz) 198 Hz
Frequency Resolution (FRF > 480 MHz) 397 Hz
Symbol Rate (FSK/GFSK) 0.5 to 100 ksps
Symbol Rate (OOK) 0.5 to 30 ksps

5.3 Embedded EEPROM and RFPDK

The RFPDK (RF Products Development Kit) is a very user-friendly software tool delivered for the user configuring the
RFM119W/RFM119SW in the most intuitional way. The user only needs to fill in/select the proper value of each parameter
and click the “Burn” button to complete the chip configuration. See the figure below for the accessing of the EEPROM and
Table 10 for the
summary of all the configurable parameters of the RFM119W/RFM119SW in the RFPDK.

RFM119W/S
RFPDK

EEPROM

CLK
HOPERF USB
Interface DATA Programmer

Figure 12. Accessing Embedded EEPROM

For more details of the HOPERF USB Programmer and the RFPDK, please refer to “AN103 CMT211xA-221xA One-Way RF
Link Development Kits Users Guide”. For the detail of RFM119W/RFM119SW configurations with the RFPDK, please refer to
“AN122
CMT2113/19A Configuration Guideline”.

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Table 10. Configurable Parameters in RFPDK

Category Parameters Descriptions Default Mode

To input a desired transmitting radio frequency in

Basic
Frequency the range from 240 to 960 MHz. The step size is 868.35 MHz
Advanced
0.001 MHz.
Basic
Modulation The option is FSK or GFSK and OOK. FSK
Advanced
The FSK frequency deviation. The range is from Basic
Deviation 35 kHz
1 to 100 kHz. Advanced
The GFSK symbol rate. The user does not need
Basic
Symbol Rate to specify symbol rate for FSK and OOK 2.4 ksps
Advanced
modulation.
To select a proper transmitting output power from
RF Settings Basic
Tx Power -10 dBm to +14 dBm, 1 dB margin is given above +13 dBm
Advanced
+13 dBm.
On-chip XOSC load capacitance options: from 10
Xtal Load 15 pF Basic Advanced
to 22 pF. The step size is 0.33 pF.
To select whether the frequency “Fo + Fdev”
Data represent data 0 or 1. The options are: 0: F-low
Advanced
Representation 0: F-high 1: F-low, or 1: F-high
0: F-low 1: F-high.
To control PA output power ramp up/down time
PA Ramping for OOK transmission, options are 0 and 2n us (n 0 us Advanced
from 0 to 10).
Start condition of a transmitting cycle, by Data Data Pin Rising
Start by Advanced
Pin Rising/Falling Edge. Edge
Transmitting
Data Pin
Settings Stop condition of a transmitting cycle, by Data
Stop by Holding Low for Advanced
Pin Holding Low for 2 to 90 ms.
20 ms

5.4 Power Amplifier

A highly efficient single-ended Power Amplifier (PA) is integrated in the RFM119W/RFM119SW to transmit the modulated
signal out. Depending on the application, the user can design a matching network for the PA to exhibit optimum efficiency at
the desired output power for a wide range of antennas, such as loop or monopole antenna. Typical application schematics
and the required BOM are shown in “Chapter 4 Typical Application Schematic”. For the schematic, layout guideline and the
other detailed information please refer to “AN101 CMT211xA Schematic and PCB Layout Design Guideline”.

The output power of the PA can be configured by the user within the range from -10 dBm to +13 dBm in 1 dB step size using
the HOPERF USB Programmer and RFPDK.

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5.5 PA Ramping
When the PA is switched on or off quickly, its changing input impedance momentarily disturbs the VCO output frequency. This
process is called VCO pulling, and it manifests as spectral splatter or spurs in the output spectrum around the desired carrier
frequency. By gradually ramping the PA on and off, PA transient spurs are minimized. The RFM119W/S has built-in PA
ramping configurability with options of 0, 1, 2, 4, 8, 16, 32, 64, 128, 256, 512 and 1024 us, as shown in Figure 13. These
options are only available when the modulation type is OOK. When the option is set to “0”, the PA output power will ramp up
to its configured value in the shortest possible time. The ramp down time is identical to the ramp up time in the same
configuration.

HOPERF recommends that the maximum symbol rate should be no higher than 1/2 of the PA ramping “rate”, as shown in the
formula below.

1 )
SRMax ≤ 0.5 * (
tRAMP

In which the PA ramping “rate” is given by (1/tRAMP). In other words, by knowing the maximum symbol rate in the application,
the PA ramping time can be calculated by formula below.

1
tRAMP ≤ 0.5 * ( )
SRMAX

The user can select one of the values of the tRAMP in the available options that meet the above requirement. If somehow the
tRAMP is set to be longer than “0.5 * (1/SRMax)”, it will possibly bring additional challenges to the OOK demodulation of the Rx
device. For more detail of calculating tRAMP, please refer to “AN122 CMT2113/19A Configuration Guideline”.

0 us
1 us
2 us
4 us
8 us

512 us
1024 us

Time
Data

Logic 1 Logic 0

Time

Figure 13. PA Ramping Time

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5.6. Working States and Transmission Control Interface

The RFM119W/S has following 4 different working states: SLEEP, XO-STARTUP, TUNE and TRANSMIT.

SLEEP
When the RFM119W/RFM119SW is in the SLEEP state, all the internal blocks are turned off and the current consumption is
minimized to
20 nA typically.

XO-STARTUP
After detecting a valid control signal on DATA pin, the RFM119W/RFM119SW goes into the XO-STARTUP state, and the
internal XO starts to work. The valid control signal can be a rising or falling edge on the DATA pin, which can be configured on
the RFPDK. The host MCU has to wait for the tXTAL to allow the XO to get stable. The tXTAL is to a large degree crystal
dependent. A typical value of tXTAL is provided in the Table 11.

TUNE
The frequency synthesizer will tune the RFM119W/RFM119SW to the desired frequency in the time tTUNE. The PA can be
turned on to transmit the incoming data only after the TUNE state is done, before that the incoming data will not be transmitted.
See Figure
16 and Figure 17 for the details.

TRANSMIT

The RFM119W/RFM119SW starts to modulate and transmit the data coming from the DATA pin. The transmission can be
ended in 2 methods: firstly, driving the DATA pin low for tSTOP time, where the tSTOP can be configured from 20 to 90 ms on the
RFPDK; secondly, issuing SOFT_RST command over the two-wire interface, this will stop the transmission in 1 ms. See
Section 6.2.3 for details of the two-wire interface.

Table 11.Timing in Different Working States

Parameter Symbol Min Typ Max Unit

[1]
XTAL Startup Time tXTAL 400 us
Time to Tune to Desired Frequency tTUNE 370 us
Hold Time After Rising Edge tHOLD 10 ns

Time to Stop the Transmission[2] tSTOP 2 90 ms

Notes:
[1]. This parameter is to a large degree crystal dependent.
[2]. Configurable from 2 to 9 in 1 ms step size and 20 to 90 ms in 10 ms step size.

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5.6.1 Tx Enabled by DATA Pin Rising Edge

As shown in the figure below, once the RFM119W/RFM119SW detects a rising edge on the DATA pin, it goes into the XO-
STARTUP state. The user has to pull the DATA pin high for at least 10 ns (tHOLD) after detecting the rising edge, as well as wait
for the sum of tXTAL and tTUNE before sending any useful information (data to be transmitted) into the chip on the DATA pin. The
logic state of the DATA pin is “Don't Care” from the end of tHOLD till the end of tTUNE. In the TRANSMIT state, PA sends out the
input data after
they are modulated. The user has to pull the DATA pin low for tSTOP in order to end the transmission.

SLEEP XO-STARTUP TUNE TRANSMIT SLEEP

STATE

Rising Edge
tXTAL tTUNE tSTOP

DATA pin 0 1 Don’t Care Valid Transmitted Data 0

tHOLD
PA out RF Signals

Figure 16. Transmission Enabled by DATA Pin Rising Edge

5.6.2 Tx Enabled by DATA Pin Falling Edge

As shown in the figure below, once the RFM119W/RFM119SW detects a falling edge on the DATA pin, it goes into XO-
STARTUP state and the XO starts to work. During the XO-STARTUP state, the DATA pin needs to be pulled low. After the XO
is settled, the RFM119W/RFM119SW goes to the TUNE state. The logic state of the DATA pin is “Don't Care” during the TUNE
state. In the TRANSMIT state, PA sends out the input data after they are modulated. The user has to pull the DATA pin low for
tSTOP in order to end the
transmission. Before starting the next transmit cycle, the user has to pull the DATA pin back to high.

SLEEP XO-STARTUP TUNE TRANSMIT SLEEP

STATE

Falling Edge
tXTAL tTUNE tSTOP

DATA pin 1 0 Don’t Care Valid Transmitted Data 0 1

PA out RF Signals

Figure 17. Transmission Enabled by DATA Pin Falling Edge

5.6.3 Two-wire Interface

For power-saving and reliable transmission purposes, the RFM119W/RFM119SW is recommended to communicate with
the host MCU over a two-wire interface (TWI): DATA and CLK. The TWI is designed to operate at a maximum of 1 MHz.
The timing requirement and data transmission control through the TWI are shown in this section.

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Table 12. TWI Requirements

Parameter Symbol Conditions Min Typ Max Unit

Digital Input Level High VIH 0.8 VDD
Digital Input Level Low VIL 0.2 VDD
CLK Frequency FCLK 10 1,000 kHz
CLK High Time tCH 500 ns
CLK Low Time tCL 500 ns
CLK delay time for the first falling edge of the
CLK Delay Time tCD 20 15,000 ns
TWI_RST command, see Figure 20
The data delay time from the last CLK rising
DATA Delay Time tDD edge of the TWI command to the time DATA 15,000 ns
return to default state
DATA Setup Time tDS From DATA change to CLK falling edge 20 ns
DATA Hold Time tDH From CLK falling edge to DATA change 200 ns

CLK

tCH tCL tDS tDH

DATA

Figure 18. Two-wire Interface Timing Diagram

Once the device is powered up, TWI_RST and SOFT_RST should be issued to make sure the device works in SLEEP state
robustly. On every transmission, TWI_RST and TWI_OFF should be issued before the transmission to make sure the TWI
circuit functions correctly. TWI_RST and SOFT_RST should be issued again after the transmission for the device going back to
SLEEP state reliably till the next transmission. The operation flow with TWI is shown as the figure below.

Reset TWI  One Transmission  Cycle  One Transmission  Cycle 

 
 
 
   
(1) ‐ TWI_RST  (1) ‐ TWI_RST  (1) ‐ TWI_RST  (1) ‐ TWI_RST  (1) ‐ TWI_RST 
TRANSMISSION  TRANSMISSION 
(2) ‐ SOFT_RST  (2) ‐ TWI_OFF  (2) ‐ SOFT_RST  (2) ‐ TWI_OFF  (2) ‐ SOFT_RST 
 
Figure 19. RFM119W/S Operation Flow with
TWI

Table 13. TWI Commands Descriptions

Command Descriptions
Implemented by pulling the DATA pin low for 32 clock cycles and clocking in 0x8D00, 48 clock cycles in total.

It only resets the TWI circuit to make sure it functions correctly. The DATA pin cannot detect the
Rising/Falling edge to trigger transmission after this command, until the TWI_OFF command is issued.

TWI_RST
Notes:
1. Please ensure the DATA pin is firmly pulled low during the first 32 clock cycles.
2. When the device is configured as Transmission Enabled by DATA Pin Falling Edge, in order to issue
the TWI_RST command correctly, the first falling edge of the CLK should be sent tCD after the DATA
falling edge, which should be longer than the minimum DATA setup time 20 ns, and shorter than 15 us,

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RFM119W/RFM119SW
Command Descriptions
as shown in Figure 20.
3. When the device is configured as Transmission Enabled by DATA Pin Rising Edge, the default state of
the DATA is low, there is no tCD requirement, as shown in Figure 21.
Implemented by clocking in 0x8D02, 16 clock cycles in total.

TWI_OFF
It turns off the TWI circuit, and the DATA pin is able to detect the Rising/Falling edge to trigger transmission
after this command, till the TWI_RST command is issued. The command is shown as Figure 22.
Implemented by clocking in 0xBD01, 16 clock cycles in total.

It resets all the other circuits of the chip except the TWI circuit. This command will trigger internal calibration
SOFT_RST
for getting the optimal device performance. After issuing the SOFT_RST command, the host MCU should
wait 1 ms before sending in any new command. After that, the device goes to SLEEP state. The command is
shown as Figure 23.

32 clock cycles  16 clock cycles 
 
CLK … …
tCD tDD
 
DATA 1   0  0x8D00   1 
 
 
Figure 20. TWI_RST Command When Transmission Enabled by DATA Pin Falling Edge

32 clock cycles  16 clock cycles 
 
CLK   … …

DATA   0  0x8D00   0 
 
Figure 21. TWI_RST Command When Transmission Enabled by DATA Pin Rising Edge

      16 clock cycles 
 
16 clock cycles     
       
CLK  …   CLK  …  
tDD tDD
Default 
DATA  0x8D02  (TWI_OFF)  Default 
State 
DATA  0xBD01 (SOFT_RST)  State 
 
 
Figure 22. TWI_OFF Command Figure 23. SOFT_RST Command

The DATA is generated by the host MCU on the rising edge of CLK, and is sampled by the device on the falling edge. The CLK
should be pulled up by the host MCU during the TRANSMISSION shown in Figure 19. The TRANSMISSION process should
refer to Figure 16 or Figure 17 for its timing requirement, depending on the “Start By” setting configured on the RFPDK.

The device will go to SLEEP state by driving the DATA low for tSTOP, or issuing SOFT_RST command. A helpful practice for the
device to go to SLEEP is to issue TWI_RST and SOFT_RST commands right after the useful data is transmitted, instead of
waiting the tSTOP, this can save power significantly.

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RFM119W/RFM119SW

6. Ordering Information
RFM119W-433 S1

Package
Operation Band
Mode Type

P/N: RFM119W-315S1
RFM119W module at 315MHz band,SMD Package
P/N: RFM119SW-433S1
RFM119SW module at 433.92MHz band ,SMD Package

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RFM119W/RFM119SW

7. Package Outline

 
 

Figure 18   S1 Package Outline Drawing

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RFM119W/RFM119SW
8. Contact Information
HOPE MICROELECTRONICS CO.,LTD
Add: 2/F, Building 3, Pingshan Private Enterprise Science and Technology Park, Lishan Road, XiLi Town, Nanshan 
District, Shenzhen, Guangdong, China
Tel: 86-755-82973805
Fax: 86-755-82973550
Email: sales@hoperf.com
Website: http://www.hoperf.com
http://www.hoperf.cn

This document may contain preliminary information and is subject to

change by Hope Microelectronics without notice. Hope Microelectronics
assumes no responsibility or liability for any use of the information
contained herein. Nothing in this document shall operate as an express or
HOPE MICROELECTRONICS CO.,LTD implied license or indemnity under the intellectual property rights of Hope
Add: 2/F, Building 3, Pingshan Private  Microelectronics or third parties. The products described in this document
Enterprise Science and Technology  are not intended for use in implantation or other direct life support
Park, Lishan Road, XiLi Town, Nanshan  applications where malfunction may result in the direct physical harm or
District, Shenzhen, Guangdong, China injury to persons. NO WARRANTIES OF ANY KIND, INCLUDING, BUT
Tel: 86-755-82973805 NOT LIMITED TO, THE IMPLIED WARRANTIES OF MECHANTABILITY
Fax: 86-755-82973550 OR FITNESS FOR A ARTICULAR PURPOSE, ARE OFFERED IN THIS
Email: sales@hoperf.com DOCUMENT.
Website: http://www.hoperf.com
http://www.hoperf.cn ©2006, HOPE MICROELECTRONICS CO.,LTD. All rights reserved.

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