APLUS MAKE YOUR PRODUCTION A-PLUS

ASM4106C

DATA SHEET

APLUS INTEGRATED CIRCUITS INC.

Address:
3 F-10, No. 32, Sec. 1, Chenggung Rd., Taipei, Sales E-mail: Mr. Jason
Taiwan 115, R.O.C. sales@aplusinc.com.tw
(115)台北市南港區成功路㆒段 32 號 3 樓之 10.
Technology E-mail: Mr. George
TEL: 886-2-2782-9266
service@aplusinc.com.tw
FAX: 886-2-2782-9255

WEBSITE : http: //www.aplusinc.com.tw

 Aplus
ASM4106C Data Sheet

ASM4106C – VERY LOW-COST VOICE SYNTHESIZER WITH 4-BIT MICROPROCESSOR

1.0 General Description

The ASM4106C is very low cost voice synthesizer with 4-bit microprocessor. It has various features
including 4-bit ALU, ROM, RAM, I/O ports, timers, clock generator, watchdog timer(WDT), voice
synthesizer, etc. It consists of 22 instructions in the device. With CMOS technology and halt function
can minimize power dissipation. Its architecture is similar to RISC, with two stages of instruction
pipeline. It allows all instructions to be executed in a single cycle, except for program branches and
data table read instructions (which need two instruction cycles).

1.1 Feature

‹ Single power supply can operate from 2.4V through 5V

‹ Internal Program ROM: 4K x 10-bit
‹ 1 sets of 17-bit DPR can access up to 128K x 10 bits data memory space
‹ Data Registers:
• 64 x 4-bit data RAM (00-1Fh plus 40h-5Fh)
• Unbanked special function registers (SFR) range: 20h-3Fh
‹ I/O Ports:
• PRA: 4-bit I/O Port A (2Bh)
• PRB: 2-bit Output Port B (2Dh)
‹ On-chip clock generator: Resistive Clock Drive(RM)
‹ Timer: 1
• Timer0: a 9-bit auto-reload timer/counter
‹ Stack: 2-level subroutine nesting
‹ HALT and Release from HALT function to reduce power consumption
‹ Watch Dog Timer (WDT)
‹ Instruction: 1-cycle instruction except for table read and program branches which are 2-cycles
‹ Number of instruction: 22
‹ The Voice function can be implemented by microprocessor instruction

1 Rev 1.0
 Aplus
ASM4106C Data Sheet

FIGURE 1.1 : Block Diagram of ASM4106C

Data Bus[3:0]

PCLATCH(8) ROM Latch

PCH(8) PCL(4)

Stack(12)
PC[11:0]
(2-Level) Instruction
(ADDR[16:12]) Latch
=00000b ADDR[16:0] 0 ROM_ADDR[16:0]
Instruction Bus [9:0]
1
DPR3,2,1 DPR[16:0] Program Instruction
(Data) Decoder
ROM

Control Signal

Instruction Bus [9:0]

DLATCH(10)
ROM_Data[9:0]

Data Bus[3:0] Instruction Bus [9:0]

Accumlator(4)
PRA(4)
SRAM PRB(2)
(64 x 4) Timer0(9)
Immediate(4)
ALU(4) 00h-1Fh
40h-5Fh
Register(4)
weak or strong
pull-low for PRA,
P1,P2,P3,P4 PRB, PRC
Clock Generator OSC
enter test mode PRASL(4)
Test select
One-Channel Reset Chip
( Voice synthesizer ) Power on Reset VDD/GND
Reset Chip
PRA0

RESET pin
COUT
COUT

2 Rev 1.0
 Aplus ASM4106C Data Sheet

FIGURE 1.2 : External ROM Map of ASM4106C

PC[11:0]

12bit x 2 STACK

17-bit Data Pointer

Reset Vector
00000h

00080h
Reserved for Testing 00080h-003FFh
00400h
00000h-00FFFh
Program and data ROM

00FFFh(4K)
00000h-1FFFFh
Data ROM

1FFFFh(128Kx10-bits)

3 Rev 1.0
 Aplus
ASM4106C Data Sheet

1.2 Pin-Out

ASM4106C Pin-Out
VDD I - Power supply during operation
PRA3-1 I/O STI I/O port with programmable strong pull-low or weak pull-low or fix-input-
Std./O.D. floating capability
Output type with standard or Open-Drain output
PRA0/RESET I/O STI I/O port with programmable strong pull-low or weak pull-low or fix-input-
Std./O.D. floating capability
Output type with standard or Open-Drain output
Mask option selected as an external RESET pin with weak pull-low capability
OSC I - RM mode Oscillator input
COUT O - Current Output of Audio
GND I - Circuit Ground Potential
TEST O - Enter Test Mode. ( TEST = High )
PRB0-1 O Std./O.D. Output type with standard or Open-Drain output

1.3 Application circuit

4 Rev 1.0
 Aplus
ASM4106C Data Sheet

1.4 Bonding Diagram

128K x 10 bit ROM

Y= 2170+100(um)

ASM4106C 11
1
CHIP SIZE: X= 1550+100(um) , Y= 2170+100(um)
10
2

3 4 5 6 7 8 9

X= 1550+100(um)

ASM4106C Pad Location Chip Size: X=1550+100 (um), Y=2170+100 (um)

PAD # PAD Name X Y PAD # PAD Name X Y
1 RA_PAD[3] -664.92 -675.72 7 TEST_PAD 105.44 -1000.4
2 RA_PAD[2] -664.92 -803.84 8 ACOUT 303.96 -1000.4
3 RA_PAD[1] -662.64 -1000.4 9 VDD 683.04 -1000.4
4 RA_PAD[0] -468.24 -1000.4 10 RB_PAD[0] 664.92 -799.4
5 AOSC -281.04 -1000.4 11 RB_PAD[1] 664.92 -681
6 GND -111.72 -1000.4

5 Rev 1.0
 Aplus
ASM4106C Data Sheet

1.5 DC Characteristics for ASM4106C

SYMBOL PARAMETER VDD MIN. TYP. MAX. UNIT CONDITION
OPERATING
VDD 2.4 3 5 V depending on Freq.
VOLTAGE
3 1 4MHz, RM
Isb SUPPLY STANDBY uA
5 1 in HALT Mode
CURREN
3 2 4MHz, RM
Iop T OPERATING mA
5 7 IO Floating
3 3 4MHz, RM
5 9 in HALT Mode
INPUT CURRENT
Iih uA (IO Ports with
/Internal pull low
5 -5.2 weak pull-high
pull-low)
OUTPUT HIGH 3 -3
Ioh
CURRENT 5 -8 4MHz, RM
mA
OUTPUT LOW 3 7 (IO ports)
Iol
CURRENT 5 20
Fosc(3v)-
FREQUENCY
dF/F -10 10 % Fosc(2.4v)
STABILITY
Fosc (3v)
VDD=3V,
dF/F Fosc VARIATION -20 20 %
Rosc=980k, 4MHz

FIGURE 1.3 : Frequency Range for Rosc in RM mode

Resistor(k ohm) 1200 1000 820 470

3v Freq.(MHz) 3.1 3.87 4.53 7.44

R osc & F req.

8
7.44
6
Freq. MHz

4.53
4 3.87
3.1
2

0
0 200 400 600 800 1000 1200 1400
R osc k ohm

6 Rev 1.0