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BSC 1 Sem Ecs Digital Electronics 1 SLR SC 6 2018

1. The document is an exam for a digital electronics course, covering topics like binary, hexadecimal, ASCII, logic gates, multiplexers, flip-flops, adders, and K-maps. 2. It contains 5 sections with multiple choice and written answer questions testing students' knowledge of digital concepts and circuits. 3. The questions cover topics ranging from number systems, logic gates, flip-flops, counters, adders, decoders, multiplexers, and Boolean algebra.

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0% found this document useful (0 votes)
60 views2 pages

BSC 1 Sem Ecs Digital Electronics 1 SLR SC 6 2018

1. The document is an exam for a digital electronics course, covering topics like binary, hexadecimal, ASCII, logic gates, multiplexers, flip-flops, adders, and K-maps. 2. It contains 5 sections with multiple choice and written answer questions testing students' knowledge of digital concepts and circuits. 3. The questions cover topics ranging from number systems, logic gates, flip-flops, counters, adders, decoders, multiplexers, and Boolean algebra.

Uploaded by

jonna
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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*SLRSC6*

SLR-SC – 6

Seat
No. Set P
B.Sc. (ECS) – I (Semester – I) (CBCS Pattern) Examination, 2018
digital electronics – I (Paper – V)
Day and Date : Wednesday, 4-4-2018 Total Marks : 70
Time : 10.30 a.m. to 1.00 p.m.
Instructions : 1) All questions are compulsory.
2) Figures to the right place indicate full marks.

1. Multiple choice questions : 14


1) A half adder makes _______ bit of addition.
a) 1 b) 2 c) 3 d) 4
2) Acronym of ASCII is
a) American Standard Code for Information Integer
b) American Standard Code for Information Interchange
c) American Standard Code for Informal Interchange
d) American Standard Code for Informal Interconversion
3) Flip-flop stores ________ bit information.
a) 0 b) 1 c) 3 d) 4
4) Shift counter is also known as
a) Ring counter b) MOD counter
c) Johnson counter d) Up counter
5) Demultiplexer means
a) One to many b) Many to one c) One to one d) Many to many
6) ________ is unweighted code.
a) BCD b) excess-3 c) binary d) hexadecimal
7) In hexadecimal number system _______ numbers are used.
a) 6 b) 10 c) 16 d) 20
8) The excess-3 code of 7 is
a) 1011 b) 1001 c) 1100 d) 1010
9) ________ is called as inverter.
a) NOT b) NAND c) NOR d) EX-OR
10) ________ gate whose output is 1 only when both inputs are 1.
a) OR b) NAND c) AND d) EX-OR
11) In 32 to 1 multiplexer ________ control lines are used.
a) 2 b) 3 c) 4 d) 5
12) A _________ flip-flop can be used to divide the input clock frequency by 2.
a) T b) D c) RS d) JK
P.T.O.

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SLR-SC – 6 *SLRSC6*
13) In IC 7490 _______ flip-flops are used.
a) 2 b) 3 c) 4 d) 5
14) A IC 74138 is _________ decoder.
a) Octal to binary b) 3 to 8
c) Hex to binary d) Decimal to binary

2. Answer any seven of the following : 14


1) Write four Boolean rules of Boolean algebra.
2) What is K-MAP ?
3) State De-Morgan’s theorems.
4) Draw block diagram of 4 to 1 multiplexer.
5) What is ASCII explain with example.
6) What is race around condition in JK flip-flop ?
7) Draw diagram of half subtractor.
8) Write conversion of gray to binary and binary to gray with one example
each.
9) What is 1’s complement and 2’s complement explain with one example.

3. A) Answer any two of the following : 10


1) Write conversion of binary to decimal and decimal to binary with one
example each.
2) Explain full adder with neat diagram.
3) Explain ring counter.
B) Explain IC 74150. 4

4. Attempt any two of the following : 14


1) What is counter ? Explain 3-bit synchronous and asynchronous up counter.
2) What are universal gates ? Explain interconversion of gates using NAND gate.
3) What is shift register ? Explain all types shift register with necessary diagrams.

5. Attempt any two of the following : 14


1) What is flip-flop ? Explain T flip-flop and D flip-flop.
2) What is tree multiplexing ? Explain how to build 32 to 1 multiplexer using
4 to 1 multiplexer.
3) Explain 4 variables K-MAP with one example.
______________

Set P

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