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PCIe NVMe FerriSSD PB EN

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0% found this document useful (0 votes)
77 views2 pages

PCIe NVMe FerriSSD PB EN

Uploaded by

Eduar Andres
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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PCIe NVMe PCIe NVMe

FerriSSD® FerriSSD
®

Single-Chip SSD

The PCIe NVMe FerriSSD® family consists of SM689 supporting PCIe Gen3 x4 NVMe 1.3 and SM681
SM689 / SM681 Series supporting PCIe Gen3 x2 NVMe 1.3 designed optimally for high-performance mission critical applica-
Single-Chip SSD tions. By combining industry proven controller technology, NAND flash and passive components into
a small single BGA package, PCIe NVMe FerriSSD® simplifies design efforts, reduces time-to-market
while protecting from NAND technology migration concerns.

The SM689 supports embedded DRAM with Data Redundancy with PCIe Gen3 x4 interface - exhibiting
sequential read speed of up to 1.6 GB/s and sequential write speed of up to 650MB/s. The SM681 DRAM-
Less series feature the best balance of saving/performance - cost saving from eliminating DRAM while
maintaining DRAM-like performance via HMB (Host Memory Buffer). Both available in 3D TLC/MLC/SLC
modes, the unique flexible design can support multiple capacity configurations ranging from 5GB to
480GB and include enterprise-grade advanced data integrity and reliability capabilities using Silicon
Motion's proprietary end-to-end data protection, ECC and data caching technologies.

End to End Data Path Protection


Key Features
SMI’s PCIe NVMe FerriSSDs incorporate full data error detection with recovery engines to provide
enhanced data integrity throughout the entire Host-to-NAND-to-Host data path. The PCIe NVMe
FerriSSD® data recovery algorithm can effectively detect any error in the SSD data path, including
hardware (i.e. ASIC) errors, firmware errors and memory errors arising in SRAM, DRAM or NAND.

Write flow w / encode Encode Encode Encode

ECC
ECC ECC Engine
Host Write CRC
Engine
Engine
DRAM Engine
SRAM RAID
Engine NAND

Encode
Decode Decode Decode
No error data will
be sent to host!
Read flow w / decode Encode Encode Encode

ECC
ECC ECC Engine
Host Read CRC
Engine
Engine
DRAM Engine
SRAM RAID
Engine NAND

Decode
Decode Decode Decode

NANDXtend™ ECC Engine


Conventional SSDs employ standard BCH and RS ECC (error correction coding) engines for initiate
first-level correction using NAND shift-read-retries. In addition to this first-level error correction, PCIe
NVMe FerriSSDs also implement a highly efficient second-level correction scheme using an LDPC
(low-density parity check)
code and a Group page Probability of RBER

RAID algorithm (a highly STD BCH ECC LDPC ECC Group Page RAID
efficient redundant backup)
to reduce potential dPPM at protect data further!
TLC when ~ Max PE
customer site while extend-
ing the service life of SSD.
20 44 72 120 #of Bit Error /1KB
FerriSSD®

IntelligentScan and DataRefresh to Enhance Data Integrity


Key Features
SMI’s proprietary IntelligentScan function will activate automatically to scan recharge, repair or
retire the cell block (DataRefresh) according to the host behavior and working environment (eg.
ambient temperature). As a result of the combination of IntelligentScan and DataRefresh, PCIe
NVMe FerriSSD® can effective prolong its service life much beyond typical NAND specifications.

Thermo impact on NAND Data Retention


Temp SLC @ max PE MLC @ max PE

40 75.58 Mo 12 Mo

55 12 Mo 1.88 Mo

70 2.14 Mo 0.34 Mo

85 0.45 Mo 0.07 Mo
Higher ambient temp
to increase Scan frequency
Based on Arrhenius Equation

85℃ data retention simulation


50

45 Max ECC
Correctable
DataRefresh
40

35

30
Error Bits

25
Preset / Programmable
Threshold
20

15

10

0
0 3 6 9 12 15 18 21 24 27 30 33 36 39 42 45 48 51 54 57 60 63 66 69 72 75 78 81 84 87 90 93 96 99 102 105 108 111 114 117 120
Month
Based on 1Ynm MLC, @ 1,000 PE
IntelligentScan/DataRefresh to proactively extend Data
Retention beyond the typical NAND flash limitation Not to scale, for illustration purpose

Easy to use
Why PCIe NVMe .Plug & Play only requires format/fdisk prior to use
FerriSSD® .Small footprint for space-limited design

Lower total cost of ownership


.Rugged & Reliable (no moving parts)
.Eliminate requalification cost from NAND generation change
.Cost saving with flexible TLC/MLC/SLC modes, configurable capacities.

Eliminate down time


.Support S.M.A.R.T. and advanced SSD Telemetry logging features
.IntelligentScan with DataRefresh for Data integrity enhancement
.Full End-to-End data path protection with recovery algorithms
.SMI’s 4th generation LDPC ECC engine with Group Page RAID
.Remote firmware update available via secured digital signature

Specifications
SM689 SM681 Density
Host Interface PCIe Gen3 x4 PCIe Gen3 x2
3D SLCmode 5~160GB
PCIe Protocal NVMe 1.3 NVMe 1.3
3D MLCmode 10~320GB
Embedded DRAM Yes DRAM-less
3D TLCmode 15~480GB*
Form Factor 20mm x 16mm BGA *1TB in Q3'2022
Green Product Compliant to RoHS (Restriction to Hazardous
Substances Directive) 2.0 / Halogen free
Temperature Commercial Temp ( 0°C to + 70°C )
Support Industrial Temp ( -40°C to + 85°C )

For more information about FerriSSD®, please go to www.siliconmotion.com


www.siliconmotion.com or send e-mail to ferri@siliconmotion.com © Copyright 2021 Silicon Motion, Inc.
FERRISSD-PB-202106

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