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Mike Tooley

The document contains multiple choice questions about digital electronics and computer systems. It covers topics like binary, octal, hexadecimal numbering systems; binary coded decimal; two's complement; and flight instruments. The questions test understanding of converting between numbering systems and identifying different types of flight displays.
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0% found this document useful (0 votes)
194 views37 pages

Mike Tooley

The document contains multiple choice questions about digital electronics and computer systems. It covers topics like binary, octal, hexadecimal numbering systems; binary coded decimal; two's complement; and flight instruments. The questions test understanding of converting between numbering systems and identifying different types of flight displays.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 37

INTRODUCTION 13

5. The term ‘glass cockpit’ refers to:

(a) the use of LCD and CRT displays


(b) the use of toughened glass windows
(c) the use of a transparent partition between
the flight deck and passenger cabin.

6. Basic air data instruments are:

(a) airspeed indicator, altimeter and magnetic


compass
(b) airspeed indicator, altimeter and vertical
speed indicator
(c) airspeed indicator, vertical speed indicator
1.26 Upgraded flight instruments on an Aero Commander and artificial horizon.
690A
7. Three airborne parameters that can be used to
1.3 MULTIPLE-CHOICE QUESTIONS assess aircraft position are:

1. A multifunction display (MFD) can be: (a) airspeed, height and weight
(b) heading, airspeed and height
(a) used only for basic flight information (c) heading, weight and airspeed.
(b) configured for more than one type of infor-
mation 8. The instrument shown in Figure 1.27 is the:
(c) set to display information from the standby
magnetic compass. (a) ADI
(b) ASI
2. Which standby instruments are driven from the (c) VSI.
aircraft’s pitot-static system:
9. Engine parameters such as turbine speed are
(a) Airspeed indicator, altimeter and vertical displayed on:
speed indicator
(b) Airspeed indicator, vertical speed indicator (a) ECAM
and magnetic compass (b) EHSI
(c) Airspeed indicator, altimeter and angle-of- (c) EADI.
attack indicator.
3. Static pressure is fed:
(a) only to the airspeed indicator
(b) only to the airspeed indicator and vertical
speed indicator
(c) to the airspeed indicator as well as the
altimeter and vertical speed indicator.
4. The horizontal situation indicator (HSI) uses
information derived from:

(a) the VOR receiver


(b) the pitot-static system
(c) the airspeed indicator. 1.27 See Question 8
14 AIRCRAFT DIGITAL ELECTRONIC AND COMPUTER SYSTEMS

10. The aircraft slip indicator is found in the:

(a) EADI
(b) ECAM
(c) CRTs in the passenger cabin.

11. Where is the ‘rising runway’:

(a) EADI
(b) ECAM
(c) CRTs in the passenger cabin.

12. Under visual flight rules (VFR) the pilot’s most


important source of information concerning the
aircraft’s position and attitude is: 1.28 See Question 14

(a) the view out of the cockpit window


(b) the altimeter and vertical speed indicators
(c) the airspeed indicator and the magnetic
compass.

13. The EFIS fitted to a large aircraft usually consists


of:

(a) a single multi-function display


(b) separate primary flight and navigation dis-
plays
(c) a primary display with several standby
instruments. 1.29 See Question 15

14. The instrument shown in Figure 1.28 is the:

(a) EADI 17. The flight director system receives information:


(b) EHSI
(c) ECAM. (a) only from the VOR/localiser
(b) only from the attitude gyro and altimeter
15. The instrument shown in Figure 1.29 is the: (c) from both of the above.

(a) EADI 18. EICAS provides the following information:


(b) EHSI
(c) ECAM. (a) engine parameters only
(b) engine parameters and system warnings
16. In a basic ‘T’ configuration of instruments: (c) engine parameters and navigational data.

(a) the ADI appears on the left and the ASI 19. The two sets of flight regulations that a pilot may
appears on the right fly by are:
(b) the ADI appears on the left and the HSI
appears on the right (a) VFR and IFR
(c) the ASI appears on the left and the altimeter (b) VHF and IFR
appears on the right. (c) VFR and IFU.
INTRODUCTION 15

20. Secondary heading information is obtained from:

(a) the gyro


(b) the compass
(c) the pitot-static system.

21. A major advantage of EFIS is a reduction in:

(a) effects of EMI


(b) wiring and cabling
(c) moving parts present in the flight deck.

22. The term ‘artificial horizon’ is sometimes used


to describe the indication produced by: 1.30 See Question 26

(a) the altimeter


(b) the attitude indicator
(c) the vertical speed indicator.

23. Typical displays on an EHSI are:

(a) engine indications


(b) VOR, heading, track
(c) VOR, altitude, rate of climb.

24. In a basic ‘T’ configuration of instruments:

(a) the ADI appears at the top and the HSI


appears at the bottom 1.31 See Question 27
(b) the HSI appears at the top and the ASI
appears at the bottom
(c) the ASI appears at the top and the ADI 27. The display marked Y in Figure 1.31 is the:
appears at the bottom.
(a) standby flight instruments
25. Operational faults in FMS can be detected by: (b) primary flight display
(c) FMS CDU.
(a) automatically comparing outputs on a
continuous basis 28. The upper ECAM display provides:
(b) routine maintenance inspection of the
aircraft (a) navigation information
(c) pre-flight checks. (b) secondary flight information
(c) engine parameters.
26. The display marked X in Figure 1.30 is the:

(a) navigation display


(b) primary flight display
(c) FMS CDU.
28 AIRCRAFT DIGITAL ELECTRONIC AND COMPUTER SYSTEMS

Table 2.3 continued

Decimal Octal Hexadecimal Binary ASCII Meaning

114 162 72 01110010 r Lowercase r

115 163 73 01110011 s Lowercase s

116 164 74 01110100 t Lowercase t

117 165 75 01110101 u Lowercase u

118 166 76 01110110 v Lowercase v

119 167 77 01110111 w Lowercase w

120 170 78 01111000 x Lowercase x

121 171 79 01111001 y Lowercase y

122 172 7A 01111010 z Lowercase z

123 173 7B 01111011 { Opening brace

124 174 7C 01111100 | Vertical bar

125 175 7D 01111101 } Closing brace

126 176 7E 01111110 ~ Tilde

127 177 7F 01111111 Delete

2.6 MULTIPLE-CHOICE QUESTIONS 4. The binary coded decimal (BCD) number


10010001 is equivalent to the decimal number:
1. The binary number 10101 is equivalent to the
decimal number: (a) 19
(b) 91
(a) 19 (c) 145.
(b) 21
(c) 35. 5. The decimal number 37 is equivalent to the
binary coded decimal (BCD) number:
2. The decimal number 29 is equivalent to the
binary number: (a) 00110111
(b) 00100101
(a) 10111 (c) 00101111.
(b) 11011
(c) 11101. 6. Which one of the following numbers could not
be an octal number:
3. Which one of the following gives the two’s com-
plement of the binary number 10110: (a) 11011
(b) 771
(a) 01010
(c) 139.
(b) 01001
(c) 10001.
NUMBER SYSTEMS 29

7. The octal number 73 is equivalent to the decimal 11. The binary number 10110011 is equivalent to
number: the hexadecimal number:

(a) 47 (a) 93
(b) 59 (b) B3
(c) 111. (c) 113.

8. The binary number 100010001 is equivalent to 12. The hexadecimal number AD is equivalent to the
the octal number: binary number:

(a) 111 (a) 10101101


(b) 273 (b) 11011010
(c) 421. (c) 10001101.

9. The hexadecimal number 111 is equivalent to the 13. The number 7068 is equivalent to:
octal number:
(a) 1C616
(a) 73 (b) 1110011102
(b) 273 (c) 48410.
(c) 421.

10. The hexadecimal number C9 is equivalent to the


decimal number:

(a) 21
(b) 129
(c) 201.
38 AIRCRAFT DIGITAL ELECTRONIC AND COMPUTER SYSTEMS

5. The advantage of an R–2R ladder DAC is that:


TEST YOUR UNDERSTANDING 3.2
(a) it uses fewer resistors overall
What type of ADC would be most suitable for (b) it uses a smaller number of analogue switches
each of the following applications? Give rea- (c) it avoids having a large number of different
sons for your answers. value resistors.

1. Sensing and recording the strain in a beam 6. A 10-bit DAC is capable of producing:
to an accuracy of better than 1 per cent and
with a resolution of 1 part in 103. (a) 10 different output levels
(b) 100 different output levels
2. Converting a high-quality audio signal into (c) 1,024 different output levels.
a digital datastream for recording on a CD-
ROM. 7. The process of sampling approximating an
3. Measuring DC voltages (that may be analogue signal to a series of discrete levels is
accompanied by supply-borne hum and referred to as:
noise) in a digital voltmeter.
(a) interfacing
(b) quantising
(c) data conversion.

3.4 MULTIPLE-CHOICE QUESTIONS 8. In a binary-weighted DAC the voltage gain for


each digital input is determined by:
1. A DAC can produce 256 different output
voltages.This DAC has a resolution of: (a) a variable slope ramp
(b) a variable reference voltage
(a) 8 bits (c) resistors having different values.
(b) 128 bits
(c) 256 bits. 9. The resolution of a DAC is stated in terms of:

2. In a bipolar ADC a logic 1 in the MSB position (a) the accuracy of the voltage reference
indicates: (b) the open-loop gain of the comparator
(c) the number of bits used in the conversion.
(a) zero input voltage
(b) negative input voltage 10. The conversion time of a flash ADC is typically
(c) positive input voltage. in the range:

3. Which one of the following types of ADC is the (a) 50 ns to 1 µs


fastest: (b) 50 µs to 1 ms
(c) 50 ms to 1 s.
(a) ramp type
(b) flash type 11. The DAC used in a successive approximation
(c) successive approximation type. ADC is usually:

4. Which one of the following ADC types uses a (a) ramp type
large number of comparators: (b) binary-weighted type
(c) successive approximation type.
(a) ramp type
(b) flash type
(c) successive approximation type.
DATA CONVERSION 39

12. In a successive approximation ADC, the time 13. An advantage of a dual-ramp ADC is:
interval between the SC and EOC signals is:
(a) a fast conversion time
(a) the clock time (b) an inherent ability to reject noise
(b) the cycle time (c) the ability to operate without the need for a
(c) the conversion time. clock.
DATA BUSES 51

comprises a single bus controller and two isolated 4.4 MULTIPLE-CHOICE QUESTIONS
buses, each of which can support up to 48 devices.
1. A bus that supports the transfer of data in both
directions is referred to as:
4.3.10 FDDI
(a) universal
The fibre distributed data interface (FDDI ) was (b) bidirectional
originally developed by Boeing for use on the Boeing (c) asynchronous.
777 aircraft. FDDI is a local area network (LAN)
based on a dual token-ring topology. Data in each ring 2. The main advantage of using a serial bus in an
flows in opposite directions.The data rate is 100 Mbps aircraft is:
and data is encoded into frames. CDDI (copper dis-
tributed data interface) and SDDI (shielded twisted (a) there is no need for data conversion
pair distributed data interface) are similar network bus (b) it supports the highest possible data rates
standards based on copper and shielded twisted pair (c) reduction in the size and weight of cabling.
as the physical media.The data format is NRZI (a data
format similar to NRZ, but in which a change in the 3. Which one of the following is used to minimise
line voltage level indicates a logic 1 and no change reflections present in a bus cable:
indicates a logic 0). For reasons of cost and in order
to reduce the number and complexity of network (a) coupler panels
standards used in its aircraft, Boeing now plans to (b) bus terminators
replace the system on the 777 with a less expensive (c) shielded twisted pair cables.
10 Mbps copper ethernet.
4. The data format in an ARINC 429 stub cable
consists of:
TEST YOUR UNDERSTANDING 4.3
(a) serial analogue doublets
(b) parallel data from the local bus
Which of the listed bus standards would be
(c) Manchester-encoded serial data.
most suitable for each of the following appli-
cations? Give reasons for your answers.
5. In order to represent negative data values, BNR
data uses:
1. A low-cost bus system for the simple
avionics fitted to a small business aircraft.
(a) two’s complement binary
2. Connecting a weather radar receiver to a (b) BCD data and a binary sign bit
radar display. (c) an extra parity bit to indicate the sign.
3. A bus system for linking the various avionics
systems of a modern passenger aircraft to
6. The physical bus media specified in ARINC 629
its flight data recorder.
is:

4. A bus system for the avionics of a military (a) fibre-optic


aircraft fitted with multiple radars and elec- (b) coaxial cable
tronic counter measures (ECMs). (c) shielded twisted pair.

7. The validity of an ARINC 429 data word is


checked by using:

(a) a parity bit


(b) a checksum
(c) multiple redundancy.
52 AIRCRAFT DIGITAL ELECTRONIC AND COMPUTER SYSTEMS

8. The label field in an ARINC 429 data word 13. A bus that is self-clocking is referred to as:
consists of:
(a) universal
(a) five bits (b) bidirectional
(b) three bits (c) asynchronous.
(c) eight bits.
14. The physical bus media specified in MIL-STD-
9. The voltages present on an ARINC 429 data bus 1773B is:
cable are:
(a) fibre-optic
(a) ±5 V (b) coaxial cable
(b) ±15 V (c) shielded twisted pair.
(c) +5 V and +10 V.
15. The length of an ARINC 429 word is:
10. The maximum bit rate supported by ARINC 429
is: (a) 16 bits
(b) 20 bits
(a) 12.5 kbps (c) 32 bits.
(b) 100 kbps
(c) 1 Mbps. 16. ARINC 573 is designed for use with:

11. An ARINC 429 NULL state is represented by: (a) INS


(b) FDR
(a) a voltage of –5 V (c) weather radar.
(b) a voltage of 0 V
(c) a voltage of +5 V. 17. The maximum data rate supported by the FDDI
bus is:
12. The maximum data rate supported by MIL-STD-
1553 is: (a) 1 Mbps
(b) 10 Mbps
(a) 12.5 kbps (c) 100 Mbps.
(b) 100 kbps
(c) 1 Mbps.
LOGIC CIRCUITS 69

5.9 MULTIPLE-CHOICE QUESTIONS 6. The most appropriate logic family for use in a
portable item of test equipment is:
1. The logic device shown in Figure 5.30 is:
(a) CMOS
(a) an OR gate (b) TTL
(b) a NOR gate (c) low-power Schottky TTL.
(c) an exclusive-OR gate.
7. The logic gate arrangement shown in Figure 5.32
performs the same function as:

(a) a NOR gate


(b) a NAND gate
5.30 See Question 1
(c) an exclusive-OR gate.

2. The normal supply voltage for a TTL logic device


is:

(a) 2.5 V ± 5 per cent


(b) 5V ± 5 per cent
(c) 12V ± 5 per cent.
5.32 See Question 7

3. A two-input NAND gate will produce a logic 0


output when: 8. The noise margin for standard TTL devices is:

(a) both of the inputs are at logic 0 (a) 400 mV


(b) either one of the inputs is at logic 0 (b) 800 mV
(c) both of the inputs are at logic 1. (c) 2V.

4. In a binary counter, the clock input of each 9. A CMOS logic gate is operated from a 12 V sup-
bistable stage is fed from: ply. If a voltage of 3 V is measured at the input to
the gate, this would be considered equivalent to:
(a) the same clock line
(b) the Q output of the previous stage (a) logic 0
(c) the CLEAR line. (b) indeterminate
(c) logic 1.
5. The device shown in Figure 5.31 is:
10. The truth table shown in Figure 5.33 is for:
(a) a low-power Schottky TTL device
(b) a high-density standard TTL device (a) a two-input OR gate
(c) a buffered CMOS device. (b) a two input NOR gate.

5.31 See Question 5 5.33 See Question 10


84 AIRCRAFT DIGITAL ELECTRONIC AND COMPUTER SYSTEMS

6.12 AIDS data recorder sub-system

storage.The QAR is able to search for and replay data


from a specified GMT reference before subsequently systems in which multiple processors have
returning to the current recording position. shared access to the system’s resources.
A data management entry panel (DMEP) provides Interconnection and data exchange between
keyboard input of hexadecimal data and a limited set the various avionic computer systems is based
of commands (such as ENTER, CLEAR, PRINT, on the use of serial bus standards such as
etc.). Data and status information is displayed on an ARINC 429, ARINC 629 and ARINC 717.
LCD display located on the control display unit
(CDU). The data recording system within the AIDS
system is shown in Figure 6.12. Interconnection and
data exchange with other aircraft systems is via the
ARINC 629 and ARINC 717 buses. 6.7 MULTIPLE-CHOICE QUESTIONS

1. The feature marked Q in Figure 6.13 is:


KEY POINT (a) RAM
(b) ROM
Modern transport aircraft make extensive (c) I/O.
use of distributed computer systems. Some of
these systems are based on the use of a single 2. In Figure 6.13, the address is the feature marked:
microprocessor device together with its support
devices connected in a local bus arrangement. (a) T
More complex systems use backplane bus (b) U
(c) V.
COMPUTERS 85

(b) random access


(c) sequential access.

8. Which one of the following memory devices can


be erased and reprogrammed:

(a) Mask-programmed ROM


(b) OTP EPROM
(c) EPROM.

9. The processor instruction HLT is classed as:

(a) a control instruction


(b) a data transfer instruction
(c) a logical instruction.

6.13 See Questions 1, 2 and 3 10. The VME bus standard uses:

(a) a single 32-way DIN 41612 connector


3. In Figure 6.13, which feature is responsible for (b) two 32-way DIN 41612 connectors
providing read/write memory: (c) a 100-way PCB edge connector.

(a) Q 11. What type of memory uses the principle of


(b) R charge storage:
(c) S.
(a) bipolar static RAM
4. Which computer bus is used to specify memory (b) MOS static memory
locations: (c) MOS dynamic memory.

(a) address bus 12. The memory cell shown in Figure 6.14 is:
(b) control bus
(c) data bus. (a) an MOS static cell
(b) a MOS dynamic cell
5. What is the largest hexadecimal address that can (c) a bipolar static cell.
appear on a 24-bit address bus:

(a) FFFF
(b) FFFFF
(c) FFFFFF.

6. Bus arbitration is required in order to:

(a) prevent memory loss


(b) avoid bus contention
(c) reduce errors caused by noise and EMI.

7. A memory device in which any item of data can 6.14 See Question 12
be retrieved with equal ease is known as:

(a) parallel access


86 AIRCRAFT DIGITAL ELECTRONIC AND COMPUTER SYSTEMS

13. How many 16K × 4-bit DRAM devices will be 16. In the assembly language instruction, MOV
required to provide 32K bytes of storage: AX,07FEh the operation code is:

(a) 2 (a) MOV


(b) 4 (b) AX
(c) 8. (c) 07FE.

14. A memory device has a pin marked CAS. The 17. A bus arbitration system based on the physical
function of this pin is: location of cards is referred to as:

(a) chip active select (a) serial arbitration


(b) control address signal (b) parallel arbitration
(c) column address select. (c) sequential arbitration.

15. A semiconductor memory consists of 256 rows


and 256 columns. The capacity of this memory
will be:

(a) 256 bits


(b) 512 bits
(c) 64K bits.
102 AIRCRAFT DIGITAL ELECTRONIC AND COMPUTER SYSTEMS

7.14 Basic core processor module used in the Boeing 777 Honeywell AIMS

TEST YOUR UNDERSTANDING 7.9

With the aid of a diagram, explain how a three-


bus architecture can be used to improve
processor performance.

7.6 MULTIPLE-CHOICE QUESTIONS

1. In the diagram of a CPU shown in Figure 7.15,


the accumulator is the feature marked:

(a) A
(b) B 7.15 See Questions 1, 2 and 3
(c) C.
THE CPU 103

2. In the diagram of a CPU shown in Figure 7.15, 8. The output of the instruction pointer appears on:
which feature indicates the current status of the
processor: (a) the address bus
(b) the data bus
(a) A (c) the control bus.
(b) B
(c) C. 9. The output of the circuit shown in Figure 7.16
will be:
3. In the diagram of a CPU shown in Figure 7.15,
which feature performs logical operations: (a) a square wave
(b) a sine wave
(a) A (c) a series of narrow pulses.
(b) B
(c) C. 10. Which component in Figure 7.16 determines the
frequency of the output:
4. The stack is used for:
(a) A
(a) permanent storage of data (b) B
(b) temporary storage of data (c) C.
(c) temporary storage of programs.
11. A typical application for the circuit shown in
5. The stack is a structure located: Figure 7.16 is:

(a) in the ALU (a) a bus interface


(b) in the general-purpose registers (b) a clock generator
(c) in external read/write memory. (c) a read/write memory.

6. A byte of data is to be inverted.This task is per- 12. The CPU data bus buffer is:
formed by:
(a) unidirectional
(a) the ALU (b) bidirectional
(b) the instruction register (c) omnidirectional.
(c) the instruction decoder.
13. Another way to describe the CPU register that
7. Data can be transferred from one bus to another acts as an instruction pointer is:
by means of:
(a) the program counter
(a) a bus cycle (b) the stack pointer
(b) a bus buffer (c) the instruction register.
(c) a bus bridge.
14. In which cycle is an instruction fetched and
decoded:

(a) M0
(b) M1
(c) M2.

7.16 See Question 9, 10 and 11


104 AIRCRAFT DIGITAL ELECTRONIC AND COMPUTER SYSTEMS

7.17 See Questions 20 and 21

15. If a microprocessor clock runs at 50 MHz, an 19. The advantage of pipelining is:
instruction requiring 11 T-states will execute in
a time of: (a) easier programming
(b) faster execution times
(a) 220 ns (c) more reliable operation.
(b) 440 ns
(c) 2.2 ms. 20. Figure 7.17 shows the architecture of a three-bus
microprocessor system.The instruction ROM is
16. An external device can gain the attention of the the feature marked:
CPU by generating a signal on the:
(a) A
(a) R/W line (b) B
(b) RESET line (c) C.
(c) IRQ line.
21. Figure 7.17 shows the architecture of a three-bus
17. When executing the assembly language instruc- microprocessor system. The bus bridge is the
tion MOV AX,07FEh, the operation code will be feature marked:
transferred to:
(a) A
(a) the accumulator (b) B
(b) the instruction register (c) C.
(c) the instruction pointer.
22. Segmentation is used with x86 processors in
18. After executing the assembly language instruc- order to:
tion MOV AX,07FEh, the binary data in the AL
register will be: (a) increase the speed of processing
(b) set up an instruction pipeline
(a) 11101111 (c) extend the addressing range.
(b) 00000111
(c) 11111110.
INTEGRATED CIRCUITS 109

8.4 MULTIPLE-CHOICE QUESTIONS

1. A standard logic gate manufactured in 1981 is


likely to be supplied in a:

(a) DIL package


(b) PGA package
(c) QFP package.

2. A standard logic gate is a typical example of:

(a) an SSI device


(b) an LSI device
8.6 Pin numbering for 20-pin DIP and 20-pin SOIC versions (c) a VLSI device.
of the same chip
3. Which one of the following scales of integration
is the largest:
circuits with a high pin count (several hundred pins,
or more). (a) SSI
Table 8.3 summarises the various types of integrated (b) LSI
circuit package; Figure 8.5 shows the corresponding (c) MSI.
pin numbering schemes.These are shown looking from
the top of the device. 4. A microprocessor is an example of:
It is important to note that manufacturers often
provide differently packaged versions of the same (a) SSI technology
integrated circuit device. The different variants are (b) MSI technology
usually distinguished by additional letters and/or (c) VLSI technology.
numbers in the device coding. Figure 8.6 shows an
example of two different styles of packaging used for 5. When compared with DIP packaging, PLCC
a small MSI device. offers:

(a) more pins


(b) larger size
TEST YOUR UNDERSTANDING 8.1 (c) greater reliability.
What do each of the following abbreviations 6. Which one of the following integrated circuit
stand for? packaging technologies requires that the chip
should always be soldered in place:
1. SSI 3. QFP
2. DIL 4. SOIC. (a) DIL
(b) SOIC
(c) PGA.

7. Which of the following integrated circuit pack-


aging technologies was the earliest to be used:
TEST YOUR UNDERSTANDING 8.2
(a) ceramic DIP
Explain what is meant by a hybrid integrated
(b) ceramic QFP
circuit and give two examples of such devices.
(c) PLCC.
110 AIRCRAFT DIGITAL ELECTRONIC AND COMPUTER SYSTEMS

8. The connections from the pads on an integrated


circuit die are:

(a) soldered to the internal wire links


(b) crimped to the internal wire links
(c) welded to the internal wire links.

9. An integrated circuit bus transceiver contains 64


logic gates and buffers. This chip is an example
of:

(a) SSI
(b) MSI
(c) LSI.

10. The integrated circuit packages shown in Figure 8.8 See Question 11
8.7 are:

(a) DIL 12. The number of the integrated circuit pin circled
(b) PGA in Figure 8.9 is:
(c) PLCC.
(a) 1
(b) 7
(c) 8.

8.7 See Question 10 8.9 See Question 12

11. The integrated circuit package shown in Figure 13. Production tests are performed on an integrated
8.8 is: circuit wafer:

(a) DIL (a) before cutting it into individual chips


(b) QFP (b) after cutting it into individual chips
(c) PLCC. (c) only when the chips are finally mounted.
INTEGRATED CIRCUITS 111

14. The programmed logic device shown in Figure 15. Each individual integrated circuit produced from
8.10 is an example of: a wafer is known as a:

(a) SSI technology (a) blank


(b) MSI technology (b) die
(c) LSI technology. (c) gate.

8.10 See Question 14


MSI LOGIC 121

9.23 See Question 3

9.22 Pin connections for the 74LS150 16-input multiplexer


(data selector)
3. A simple logic circuit is shown in Figure 9.23.
What is the minimum fan-out for G6:
A typical example of the use of multiplexers and
decoders is shown in the simplified block schematic (a) 1
of the altimeter data selector shown in Figure 9.21. (b) 5
This arrangement uses a dual four-channel multi- (c) 6.
plexer to select corresponding clock and data streams
from the four ARINC 429 bus receivers. 4. Another name for a multiplexer is:

(a) a data selector


9.6 MULTIPLE-CHOICE QUESTIONS (b) a bus transceiver
(c) a shift register.
1. A standard TTL logic gate has a fan-out of:
5. A four to one multiplexer has:
(a) 1
(b) 5 (a) one select input
(c) 10. (b) two select inputs
(c) four select inputs.
2. The equivalent number of standard input loads
(of the same logic family) imposed by the input 6. Which is the select input in the two-way multi-
of a logic circuit is known as: plexer shown in Figure 9.24:

(a) fan-in (a) A


(b) fan-out (b) B
(c) fan-load. (c) C.
122 AIRCRAFT DIGITAL ELECTRONIC AND COMPUTER SYSTEMS

7. The integrated circuit device shown in Figure


9.25 is:

(a) a dual two to four line decoder


(b) a dual four to two line multiplexer
(c) a dual four way data selector.

8. Additional enable inputs and outputs are pro-


vided in some encoders in order to permit:
9.24 See Question 6

(a) inverting
(b) cascading
(c) error detection.

9.25 See Question 7


130 AIRCRAFT DIGITAL ELECTRONIC AND COMPUTER SYSTEMS

10.6 MULTIPLE-CHOICE QUESTIONS 8. The typical cladding diameter for a monomode


fibre is:
1. In an optical fibre, the refractive index of the core
is: (a) 5 µm
(b) 50 µm
(a) the same as the cladding (c) 125 µm.
(b) larger than the cladding
(c) smaller than the cladding. 9. If the numerical aperture of a fibre has a value of
1, this indicates that:
2. A suitable optical transmitter for use with an
optical fibre is: (a) all of the light from the source is captured
by the fibre
(a) a photodiode (b) none of the light from the source is captured
(b) a phototransistor by the fibre
(c) a low-power laser diode. (c) 50 per cent of the light from the source is
captured by the fibre.
3. The typical core diameter for a monomode fibre
is: 10. When replacing a length of multi-way fibre-optic
cable, it is essential to ensure that:
(a) 5 µm
(b) 50 µm (a) the connectors are correctly aligned prior
(c) 125 µm. to mating the plug and the receptacle
(b) none of the red band is covered when the
4. In a multicore fibre-optic cable: coupling nut is tightened
(c) all of the red band is covered when the
(a) the cores are colour coded coupling nut is tightened.
(b) the cladding is colour coded
(c) the buffers are colour coded. 11. In order to support a high data rate, a fibre optic
cable should have:
5. The typical wavelength of light in a fibre is:
(a) zero bandwidth
(a) 1.3 µm (b) limited bandwidth
(b) 13 µm (c) wide bandwidth.
(c) 130 µm.
12. A significant advantage of fibre-optic networks
6. What aircraft standard applies to fibre-optic net- in large passenger aircraft is:
works:
(a) lower installation costs
(a) ARINC 429 (b) reduced weight
(b) ARINC 573 (c) ease of maintenance.
(c) ARINC 636.
13. A beam of light is directed towards a boundary
7. If a launcher has an acceptance angle of 45º, the between two optical media having different
corresponding numerical aperture will be: refractive indices. If the beam is incident at the
critical angle the ray emerging from the bound-
(a) 0.5 ary will travel:
(b) 0.707
(c) 1. (a) away from the boundary
(b) along the boundary
(c) back towards the light source.
FIBRE OPTICS 131

14. The bandwidth of an optical fibre is limited by: 18. A pulse of infrared light travelling down a multi-
mode fibre-optic becomes stretched.This is due
(a) attenuation and cross-talk in the cable to:
(b) modal dispersion occurring in the cable
(c) the number and severity of bends in the (a) reflection
cable. (b) refraction
(c) dispersion.
15. Light propagates in a fibre optic by means of:
19. Attenuation in an optical fibre is due to:
(a) modal dispersion
(b) continuous refraction (a) absorption, dispersion and radiation
(c) total internal reflection. (b) absorption, scattering and radiation
(c) absorption, cross-talk and noise.
16. The attenuation of an optical fibre is typically:
20. Light waves in fibre-optic cables are:
(a) less than 2 dB per kilometre
(b) between 2 dB and 20 dB per kilometre (a) in the infrared spectrum
(c) more than 20 dB per kilometre. (b) in the ultraviolet spectrum
(c) in the visible spectrum.
17. The main advantage of monomode fibres is:

(a) lower cost


(b) smaller data cables
(c) faster data rates.
144 AIRCRAFT DIGITAL ELECTRONIC AND COMPUTER SYSTEMS

6. The BCD input to a seven-segment display


TEST YOUR UNDERSTANDING 11.5 decoder is 1001.The digit displayed will be:

Explain the difference between active and (a) 7


passive matrix LCD. State two advantages of (b) 8
AMLCDs. (c) 9.

7. The potential at the grid of a CRT is:

(a) the same as the cathode


11.4 MULTIPLE-CHOICE QUESTIONS (b) negative with respect to the cathode
(c) positive with respect to the cathode.
1. The peak wavelength of light emitted from a red
LED is typically: 8. The function of the final anode of a CRT is:

(a) 475 nm (a) accelerating the electron beam


(b) 525 nm (b) deflecting the electron beam
(c) 635 nm. (c) controlling the brightness of the display.

2. The spectral response of the human eye peaks at 9. Electromagnetic deflection of a CRT uses:
around: (a) coils inside the CRT
(b) X- and Y-plates inside the CRT
(a) 450 nm (c) coils around the neck of the CRT.
(b) 550 nm
(c) 650 nm. 10. The three beams in a colour CRT are associated
with the colours:
3. Adjacent phosphors of blue and green are illu-
minated on the screen of a CRT. The resultant (a) red, yellow and blue
colour produced will be: (b) red, green and blue
(c) green, blue and yellow.
(a) cyan
(b) white 11. When compared with CRT displays, AMLCD
(c) magenta. displays have:
4. The human eye is most sensitive to: (a) larger volume and lower reliability
(b) larger volume and greater reliability
(a) red light (c) smaller volume and greater reliability.
(b) blue light
(c) green light. 12. The final anode of a CRT display requires:
5. A seven-segment LED display has segments a, b, (a) a low-voltage AC supply
c, d and g illuminated. The character displayed (b) a high-voltage AC supply
will be: (c) a high-voltage DC supply.

(a) 2 13. The deflecting waveform supplied to the plates


(b) 3 of an electrostatic CRT will be:
(c) 5.
(a) a sine wave
(b) a ramp wave
(c) a square wave.
DISPLAYS 145

14. The typical value of maximum forward current 16. When compared with passive matrix LCDs,
for an LED indicator is: AMLCDs are:

(a) 0.03 A (a) faster and sharper


(b) 0.3 A (b) faster and less sharp
(c) 3 A. (c) slower and less sharp.

15. The patterns required to display alphanumeric


characters in a CRT controller are stored in:

(a) static RAM


(b) dynamic RAM
(c) character generator ROM.
ESD 151

TEST YOUR UNDERSTANDING 12.4

Which one of the following situations is likely


to produce the greatest amount of stray static
charge:

1. Removing a PVC shrink wrap on a dry day.


2. Walking on a vinyl floor on a wet day.
3. Sitting at a bench wearing a wrist strap.

TEST YOUR UNDERSTANDING 12.5

Explain the difference between conductive and


static dissipative materials for ESD protection.
12.8 ESD wrist strap warning notice

that are neutral on the triboelectric scale, such as


cardboard, cotton and wood). Of these, conductive
materials offer the greatest protection while anti-static 12.5 MULTIPLE-CHOICE QUESTIONS
materials offer the least protection.
1. A particular problem with the build-up of static
charge is that:
KEY POINT (a) it is worse when wet
(b) it is invariably lethal
Stray static charges can very easily damage (c) it cannot easily be detected.
static-sensitive devices. Damage can be pre-
vented by adopting the correct ESD handling 2. The typical resistance of a wrist strap lead is:
procedures.
(a) 1 Ω
(b) 1 kΩ
(c) 1 MΩ.

3. Which one of the following devices is most sus-


TEST YOUR UNDERSTANDING 12.3
ceptible to damage from stray static charges:
Which one of the following semiconductor (a) a power rectifier
devices is likely to be most susceptible to dam- (b) a TTL logic gate
age from stray static charges: (c) a MOSFET transistor.
1. A dynamic memory. 4. The static voltage generated when a person walks
2. A silicon controlled rectifier. across a carpet can be:
3. A bipolar junction transistor. (a) no more than about 10 kV
(b) between 10 kV and 20 kV
(c) more than 20 kV.
152 AIRCRAFT DIGITAL ELECTRONIC AND COMPUTER SYSTEMS

5. Which of the materials listed is negative on the 7. To reduce the risk of damaging an ESD during
triboelectric scale: soldering it is important to:

(a) glass (a) use only a low-voltage soldering iron


(b) silk (b) use only a mains-operated soldering iron
(c) polyester. (c) use only a low-temperature soldering iron.

6. When transporting ESDs it is important to: 8. Which one of the following items of clothing is
most likely to cause static problems:
(a) keep them in a conductive package
(b) remove them and place them in metal foil (a) nylon overalls
(c) place them in an insulated plastic package. (b) a cotton T-shirt
(c) polyester–cotton trousers.
160 AIRCRAFT DIGITAL ELECTRONIC AND COMPUTER SYSTEMS

TEST YOUR UNDERSTANDING 13.5

Classify each of the following applications in


terms of level of software criticality:

1. Weather radar.

13.4 Typical portable data loader (PDL) arrangement 2. VOR.


3. In-flight entertainment.

TEST YOUR UNDERSTANDING 13.6

An FLS upgrade may have been corrupted


during transfer. What action should be taken?

13.5 Floppy disk with write protect window (the window TEST YOUR UNDERSTANDING 13.7
must be closed to write to the disk)
Distinguish between user modifiable software
and option selectable software. Give a typical
example of each.
13.4 DATA VERIFICATION

Various techniques are used to check data files and


executable code in order to detect errors. Common
methods involve the use of checksums and cyclic TEST YOUR UNDERSTANDING 13.8
redundancy checks (CRC). Both of these methods
will provide an indication that a file has become 1. Describe two methods of checking that a
corrupt, but neither is completely fool-proof. data file contains no errors.
Checksums involve adding the values of consecutive
bytes or words in the file and then appending the 2. Describe the precautions that should be
generated result to the file. At some later time (for taken when making backups of field load-
example, when the file is prepared for loading) the able software.
checksum can be re-calculated and compared with the
stored result. If any difference is detected the file
should not be used.
Cyclic redundancy checks involve dividing consecu- 13.5 MULTIPLE-CHOICE QUESTIONS
tive blocks of binary data in the file by a specified
number. The remainder of the division is then 1. A Level C software classification is one in which
appended to the file as a series of check digits (in much a failure could result in:
the same way as a checksum). If there is no remainder
when the file is later checked by dividing by the same (a) aircraft loss
number, the file can be assumed to be free from (b) fatal injuries to passengers or crew
errors. (c) minor injuries to passengers or crew.
SOFTWARE 161

2. A Level B software classification is one in which 5. Electronic engine control software is an example
the probability of failure is: of:

(a) extremely improbable (a) DFLD


(b) extremely remote (b) LSAP
(c) remote. (c) OSS.

3. A software configuration management plan must 6. OSS and UMS are specific classes of:
be created and maintained by:
(a) FLS
(a) the CAA or FAA (b) LSAP
(b) the aircraft operator (c) DFLD.
(c) the relevant DO.
7. The final stage of loading EEC software is:
4. Weather radar is an example of:
(a) disconnecting the PDL
(a) Class B software (b) verifying the loaded software
(b) Class C software (c) switching on and testing the system.
(c) Class D software.
EMC 173

• protect aircraft, crew and passengers against the charging should have a mechanically secure elec-
effects of lightning discharge; trical connection to the aircraft structure of
• provide return paths for current; adequate conductivity to dissipate possible static
• prevent the development of RF voltages and charges.
currents;
• protect personnel from shock hazards;
• maintain an effective radio transmission and
reception capability; KEY POINT
• prevent accumulation of static charge.
Initial control of EMI is achieved in modern
aircraft by careful design and rigorous testing.
The following general procedures and precautions
Routine maintenance helps to ensure the air-
apply when making bonding or grounding connec-
craft retains electromagnetic compatibility,
tions:
thereby keeping EMI problems to a minimum.
• bond or ground parts to the primary aircraft
structure where possible;
• make bonding or grounding connections so that no
part of the aircraft structure is weakened;
KEY POINT
• bond parts individually if feasible;
• install bonding or grounding connections against
Effective grounding and bonding provide a
smooth, clean surfaces;
means of ensuring the electrical integrity of
• install bonding or grounding connections so that
the aircraft structure as well as minimising the
vibration, expansion or contraction, or relative
effects of HIRF fields and the hazards asso-
movement in normal service, will not break or
ciated with lightning and static discharge.
loosen the connection;
• check the integrity and effectiveness of a bonded
or grounded connection using an approved bond-
ing tester.

14.7 MULTIPLE-CHOICE QUESTIONS


14.6.2 Bonding
1. Aperiodic noise is:
Bonding refers to the electrical connecting of two
or more conducting objects that are not otherwise (a) regular but not continuous
adequately connected.The main types of bonding are: (b) regular and continuous
(c) entirely random in nature.
• Equipment bonding: low-impedance paths to the
aircraft structure are generally required for elec- 2. EMI can be conveyed from a source to a receiver
tronic equipment to provide radio frequency by:
return circuits and to facilitate reduction in EMI.
• Metallic surface bonding: all conducting objects (a) conduction only
located on the exterior of the airframe should be (b) radiation only
electrically connected to the airframe through (c) conduction and radiation.
mechanical joints, conductive hinges or bond
straps, which are capable of conducting static 3. The display produced by a spectrum analyser
charges and lightning strikes. shows:
• Static bonds. All isolated conducting paths inside
and outside the aircraft with an area greater than (a) frequency plotted against time
three square inches and a linear dimension over (b) amplitude plotted against time
three inches that are subjected to electrostatic (c) amplitude plotted against frequency.
174 AIRCRAFT DIGITAL ELECTRONIC AND COMPUTER SYSTEMS

4. EMI can be reduced by means of: 8. Supply-borne noise can be eliminated by means
of:
(a) screening only
(b) screening and filtering (a) a low-pass filter
(c) screening, bonding and filtering. (b) a high-pass filter
(c) a band-pass filter.
5. The effects of HIRF can be reduced by:
9. Noise generated by a switching circuit is worse
(a) screening only when:
(b) screening and filtering
(c) screening, bonding and filtering. (a) switching is fast and current is low
(b) switching is slow and current is high
6. The typical maximum value of bonding resistance (c) switching is fast and current is high.
is:

(a) less than 0.005 Ω


(b) between 0.005 Ω and 0.05 Ω
(c) more than 0.05 Ω.

7. Effective protection against lightning and static


discharge damage to an aircraft requires that:

(a) all isolated conducting parts must have high


resistance to ground
(b) all parts of the metal structure of the aircraft
must be bonded to ground
(c) all power and bus cables must be well
insulated.
AVIONIC SYSTEMS 189

available, including utilisation of GPS systems and ATE systems usually incorporate computer control
automated en-route air traffic (AERA) systems with with displays that indicate what further action (repair
up to 99.99 per cent accuracy rates. AERA will or adjustment) is necessary in order to maintain the
evaluate all aircraft positions, altitude and speed.The equipment. Finally, it is worth noting that individual
intention is to improve the autonomy of aircraft and items of equipment may often require further detailed
thereby significantly reduce ATC involvement. tests and measurements following initial diagnosis
using ATE.

TEST YOUR UNDERSTANDING 15.7 15.10 BUILT-IN TEST EQUIPMENT


Give an example of a warning indication by the As the name implies, built-in test equipment (BITE)
TCAS system. How does the pilot receive this is primarily a self-test feature built into airborne
message? equipment as an integral fault indicator. BITE is
usually designed as a signal-flow type test. If the
signal flow is interrupted or deviates outside accepted
levels, warning alerts indicate a fault has occurred.
15.9 AUTOMATIC TEST EQUIPMENT The functions or capabilities of BITE include the
following:
Automatic test equipment (ATE) is a dedicated
ground test instrument that provides a variety of • real-time, critical monitoring
different tests and functional checks on an LRU or • continuous display presentation
printed circuit card. By making a large number of • sampled recorder readout
simultaneous connections with the equipment under • module and/or subassembly failure isolation
test,ATE is able to gather a large amount of data very • verification of systems status
quickly, thus avoiding the need to make a very large • go/no-go alarms
number of manual measurements in order to assess • quantitative displays
the functional status of an item of equipment. • degraded operation status
ATE systems tend to be dedicated to a particular • percentage of functional deterioration.
avionic system and are expensive to develop and
manufacture. Because of this they tend to be only used The ECAM system oversees a variety of aircraft sys-
by original equipment manufacturers (OEM) and tems and also collects data on a continuous basis.
licensed repairers. While ECAM automatically warns of malfunctions,
the flight crew can also manually select and monitor
individual systems. Failure messages (see Figure
15.16) recorded by the flight crew can be followed up
by maintenance personnel by using the system test
facilities on the maintenance panel in the cockpit and
on the BITE facility located on each computer. The
majority of these computers are located in the
aircraft’s avionics bay.

15.11 MULTIPLE-CHOICE QUESTIONS

1. The standard for ACARS is defined in:

(a) ARINC 429


15.16 ECAM cockpit print-out showing warning and failure (b) ARINC 573
messages (c) ARINC 724.
190 AIRCRAFT DIGITAL ELECTRONIC AND COMPUTER SYSTEMS

2. Engine parameters are displayed on: 9. The FMS navigation database is updated:

(a) ECAM (a) at the request of the flight crew


(b) EHSI (b) during pre-flight checks
(c) CDU. (c) every 28 days.

3. A basic IRS platform has: 10. The sweep voltage waveform used on an electro-
magnetic CRT is:
(a) three accelerometers and two laser gyros
(b) two accelerometers and three laser gyros (a) trapezoidal
(c) three accelerometers and three laser gyros. (b) sinusoidal
(c) sawtooth.
4. The operational FMS database is:
11. In an EFIS with three symbol generators, what is
(a) updated once a month the purpose of the third symbol generator:
(b) is fed with information on aircraft weight
before take-off (a) comparison with the pilot’s symbol gen-
(c) needs no update information. erator
(b) standby in case of failure
5. The left and right cockpit displays: (c) to provide outputs for ECAM.
(a) are supplied from separate symbol gener- 12. The ACARS system uses channels in the:
ators at all times
(b) are supplied from the same symbol generator (a) HF spectrum
(c) will only be supplied from the same symbol (b) VHF spectrum
generator when all other symbol generators (c) UHF spectrum.
have failed.
13. If one EICAS CRT fails:
6. A single failure in a fly-by-wire system should:
(a) the remaining CRT will display primary
(a) cause the system to revert to mechanical
EICAS data
operation
(b) the FMS CDU will display the failed CRT
(b) result in immediate intervention by the
data
flight crew
(c) the standby CRT will automatically take
(c) not have any effect on the operation of the
over.
system.

7. On a flight deck EFIS system, if all of the displays 14. A method used in modern aircraft for reporting
were missing information from a particular in-flight faults to an engineering and monitoring
source, the most likely cause would be: ground station is:

(a) the symbol generator and display (a) TCAS II


(b) the sensor, input bus or display controller (b) ACARS
(c) the display controller and symbol generator. (c) GPS.

8. A central maintenance computer provides:

(a) ground and in-flight monitoring and testing


(b) ground and BITE testing using a portable
control panel
(c) display of system warnings and cautions.
AIRCRAFT DATA NETWORKS AND AFDX 201

5. What is the maximum BAG for a VL that supplies


TEST YOUR UNDERSTANDING 16.10 messages at a rate of 400 per second:

What is the name given to each of the fol- (a) 2 ms


lowing? (b) 4 ms
(c) 8 ms.
1. The minimum period of time between the
6. What is the maximum bit-rate that can be sup-
transmission of two consecutive frames on
ported by an AFDX virtual link in which the
a virtual link.
maximum frame length is 256 bytes and the
2. The minimum indivisible unit of informa- bandwidth allocation gap is 128 ms:
tion that can be transmitted on a network.
(a) 4,000 bits per second
3. A byte of data added to an AFDX payload
(b) 8,000 bits per second
to manage redundancy and eliminate
(c) 16,000 bits per second.
duplicate messages.
7. Allowable bandwidth allocation gaps in AFDX
can range from:

(a) 1 to 8 ms
16.11 MULTIPLE-CHOICE QUESTIONS (b) 2 to 64 ms
(c) 1 to 128 ms.
1. In a simple ethernet arrangement a host is able
to detect whether a bus is idle or busy by means 8. Within an AFDX network, the ethernet frames
of: associated with a particular VL can originate at:
(a) parity checking (a) multiple end systems
(b) a status byte (b) one, and only one, end system
(c) carrier sense. (c) each end system present in the network.
2. In an AFDX network the links from each host to 9. Within the transmit protocol stack the ethernet
the switch are: header is added by the:

(a) simplex (a) UDP transport layer


(b) half-duplex (b) IP network layer
(c) full-duplex. (c) link layer.

3. Within an AFDX switch a buffer is used: 10. Within the AFDX frame the FCS appears:

(a) for received data only (a) after the sequence number
(b) for transmitted data only (b) immediately after the message field
(c) for both received and transmitted data. (c) after the IP address and before the message
field.
4. The back-off strategy for a simple ethernet
system is based on: 11. The order in which a message is passed through
the AFDX transmit protocol stack is:
(a) re-transmission at regular time intervals
(b) re-transmission at a random time within a (a) UDP transport layer, IP network layer, link
given time interval layer
(c) re-transmission immediately following the (b) link layer, IP network layer, UDP transport
detection of a collision. layer
202 AIRCRAFT DIGITAL ELECTRONIC AND COMPUTER SYSTEMS

(c) IP network layer, UDP transport layer, link 17. A pad field is introduced into the AFDX payload
layer. whenever a payload message is:

12. The fundamental network architecture used by (a) less than 17 bytes
an AFDX network is: (b) more than 17 bytes
(c) more than 17 and less than 65 bytes.
(a) bus
(b) tree 18. Integrity checking is used to:
(c) cascaded star.
(a) ensure that frames are received in the
13. In an AFDX network, the length of the FCS is: correct sequence
(b) drop any replica frames that have already
(a) one byte been received
(b) two bytes (c) ensure that all frames conform to the
(c) four bytes. correct size and format.

14. An AFDX frame sequence number can take a 19. Redundancy management is used to:
value between:
(a) eliminate invalid or erroneous frames
(a) 0 and 15 (b) drop replica frames that have already been
(b) 1 and 128 received
(c) 0 and 255. (c) ensure that all frames conform to the cor-
rect format.
15. In an AFDX network the length of the UDP
header is: 20. Sequence number zero is:

(a) four bytes (a) used for test purposes only


(b) six bytes (b) reserved for end system reset
(c) eight bytes. (c) used as a means of padding the payload.

16. The order of successive frames received by an


end system can be checked using:

(a) a checksum
(b) a parity check
(c) a sequence number.
214 AIRCRAFT DIGITAL ELECTRONIC AND COMPUTER SYSTEMS

17.13 Corresponding logic waveforms generated by the test bench code shown in Figure 17.12

5. Comments in VHDL code start with:


TEST YOUR UNDERSTANDING 17.7
(a) a single exclamation mark (!)
Explain the need for and use of bit vectors in (b) a single semi-colon (;)
VHDL code. (c) two adjacent hyphens (--).

6. In VHDL the std_logic type is defined:

(a) in a header file


17.11 MULTIPLE-CHOICE QUESTIONS (b) in the relevant IEEE file
(c) in the entity declaration.
1. The VHDL structural level describes a system
as: 7. Which one of the following comes earlier in the
development of a VHDL program:
(a) a collection of interconnected gates and
components (a) Simulation
(b) a set of logic signals and levels (b) Coding
(c) a list of signal names and logical expressions. (c) Verification.

2. The input and output signals of a VHDL entity 8. In VHDL code, signals that have not already been
are defined in: initialised are denoted by the letter:

(a) the entity declaration (a) U


(b) a series of sub-programs (b) X
(c) a separate architecture declaration. (c) Z.

3. A VHDL entity comprises an entity declaration 9. The assignment operator in VHDL is represented
followed by: by:

(a) an architectural description (a) =


(b) a truth table for the logic (b) =>
(c) a description of the semiconductor tech- (c) <=.
nology used.
10. When program statements are executed in
4. VHDL allows: parallel they are said to be:

(a) only concurrent signal assignment (a) concurrent


(b) only sequential signal assignment (b) sequential
(c) both concurrent and sequential signal (c) random.
assignment.
LARGE-SCALE LOGIC SYSTEMS AND VHDL 215

11. Which one of the following is an example of a 13. The internal workings of a VHDL entity:
VHDL data type:
(a) are hidden from other entities
(a) In (b) appear within the entity declaration
(b) Buffer (c) are defined in an external IEEE library.
(c) Boolean.
14. In VHDL the sum, s, output of a half-adder
12. When x = 101 and y = 011 the VHDL expression would be coded as:
not x and y will evaluate to:
(a) s = p + q
(a) 001 (b) s => p AND q
(b) 010 (c) s <= p XOR q.
(c) 110.

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